Method and apparatus for inferring irregularities in query data relative to referential data includes attempting to compose the query data, like a puzzle, from large chunks of the referential data, and inferring irregularities in the query data based on at least the size of the matching chunks. The larger the size of a matching chunk, the more likely it is that its corresponding region in the query data is valid and not irregular. Regions in the query data which cannot be composed from the referential data, or can only be composed using small fragmented pieces and not large chunks of the referential data, are considered irregular. The method and apparatus is applicable to all types of signals, including images, video data, medical data, one-dimensional signals and multi-dimensional signals, and can be used to identify, inter alia, suspicious behaviors, suspicious objects, irregular patterns and defects in goods.

The detection of irregularities in data, e.g., visual data, such as images and video sequences, has many practical applications. The detection of suspicious behaviors or unusual objects, for example, is important for surveillance and monitoring. Identifying spatial saliency in images is useful for quality control and automatic visual inspection. Detecting behavioral saliency in video is useful for drawing the attention of a viewer to particular areas of interest in the video.
One of the main problems in automating the detection of irregularities is that the notion of "irregular" or "suspicious" is dependent upon a context-based definition of "regular" or "valid". For example, in a library where fifty people are reading or browsing for books quietly, the behavior of one man cheering wildly is "irregular". However, in the context of a football stadium, and hundreds of wildly cheering fans, it is the behavior of a person reading quietly in the stands which is irregular.
Thus, while a casual human observer would effortlessly draw the conclusions described hereinabove regarding the regularity of reading or cheering in two different situations, a serious impediment to performing the detection of irregularities in data by automatic means lies in the impossibility of explicitly defining all possible valid configurations for a given context. Attempts to overcome this impediment in the prior art have included a variety of approaches for the various applications of irregularity detection in images and video sequences.
Previous approaches to recognition of suspicious behaviors or activities by automatic means can broadly be classified into two classes of approaches: rule-based methods (as taught by Ivanov et al., "Recognition of multi-agent interaction in video surveillance", ICCV, 1999) and statistical methods without predefined rules (as taught by Stauffer et al., "Leaning patterns of activity using real-time tracking", PAMI, 2000 and Zhong et al., "Detecting unusual activity in video", CVPR04). The statistical methods may be considered preferable since they do not assume a predefined set of rules for all valid configurations. Instead, they try to automatically learn the notion of regularity from the data, and thus infer what is suspicious. Nevertheless, the representations employed in previous methods have been either very restrictive (e.g., trajectories of moving objects in Stauffer et al.), or else too global (e.g., a single small descriptor vector for an entire frame in Zhong et al.).
Previous approaches for detecting image saliency (e.g., as taught by Itti et al., "A model of saliency-based visual attention for rapid scene analysis", PAMI, 1998) proposed measuring the degree of dissimilarity between an image location and its immediate surrounding region. Thus, for example, image regions which exhibit large changes in contrast are detected as salient image regions. The definition of "visual attention" is derived from the same reasoning. However, the notion of saliency cannot be necessarily determined by the immediate surrounding image regions. For example, a single yellow spot on a black paper may be salient. However, if there are many yellow spots spread all over the black paper, then a single spot will no longer draw our attention, even though it still induces a large change in contrast relative to its surrounding vicinity.
It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals may be repeated among the figures to indicate corresponding or analogous elements.


A memory device and a method of controlling an input signal of the memory device. In the method of controlling an input signal according to test modes, it is determined whether the input signal is in a first test mode or a second test mode. If the memory device is in the first test mode, in response to a control signal, an input signal is received through input pins. In response to a mode signal, the input signal is separated into data and an address. The separated data and address is applied to the core of a memory device. If the memory device is in the second test mode, an input signal is received through input pins and inverting input pins. In response to a mode signal, an address is separated from the input signal received through the input pins and the data is separated from the input signal received through the inverting input pins. The separated data and address are applied to the core of a memory device.

1. Field of the Invention
Embodiments of the present invention relate to a memory device or a method of controlling input signals input into a memory device. In embodiments, separation of data and addresses from input signals is controlled. This application claims the priority of Korean Patent Application No. 2003-76215, filed on Oct. 30, 2003, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety.
2. Description of the Related Art
Through the development of input/output (I/O) interface technology, a variety of I/O interface technologies have been adopted in memory devices. Such I/O interface technologies include differential signaling technology. In differential signaling technology, a pair of input signals having opposite phases are input into a memory device.
Compared to single-ended signaling technology (where a reference signal and an input signal are applied to a memory device), differential signaling technology can improve signal margin and decrease noise. However, differential signaling technology requires twice as many I/O pins compared to single-ended signaling technology. Even if a memory device usually has a high operating frequency, memory cells and cores are tested using a tester at a low operating frequency in a test mode. Further, in each stage of a test (e.g. a wafer test, a monitor burn-in test (MBT), and a package test), a method of inputting data and addresses to test memory cells and cores are different. In other words, while both the data and the address may be input through one input pin in the wafer test stage, the data and the address may be input through separate input pins in the MBT stage or the package stage.
Due to the limited number of pins and a complex design, memory devices that use single-ended signaling technology may be limited to either a first test mode (in which data and addresses are input through one pin) or a second test mode (in which data and addresses are inputted separately).

Memory device and input signal control method of a memory device


A RAN may receive a call request to establish a call involving a WCD. The RAN may serve WCDs of a first type and WCDs of a second type. WCDs of the first type may communicate with the RAN using a first air-interface or a second air-interface, and WCDs of the second type may communicate using the second air-interface. If the WCD is of the first type, the RAN may select wireless coverage areas from a first candidate set of wireless coverage areas. If the WCD is of the second type, the RAN may select wireless coverage areas from a second candidate set of wireless coverage areas. The RAN may assign, to the WCD, traffic channels from each wireless coverage area selected for supporting the call. The selected wireless coverage areas may be defined by the RAN and may operate in accordance with the second air-interface.

To provide wireless communication service, a wireless service provider, or "wireless carrier," typically operates a radio access network (RAN) that defines one or more coverage areas in which wireless communication devices (WCDs) can be served by the RAN. In this way, a WCD may obtain connectivity to broader networks such as the publically-switched telephone network (PSTN) and/or the Internet. A typical RAN may include one or more base transceiver stations (BTSs). These BTSs may be macro network cell towers and/or femtocells, each of which may radiate to define wireless coverage areas through which WCDs can communicate. Further, the RAN may include one or more base station controllers (BSCs), which may be integrated with or otherwise in communication with the BTSs. The BSCs may include, or be in communication with, a switch or gateway that provides connectivity with one or more transport networks. With this arrangement, a cell phone, personal digital assistant, wirelessly equipped computer, or any other WCD that is positioned within coverage of the RAN, may be able to communicate with a BTS and in turn, via the BTS, with other served devices or with other entities accessible via the transport network.

Selective simultaneous communication with a wireless communication device based on device type


The invention provides a hybrid ale strain of Saccharomyces cerevisiae and uses thereof.

Ales are beers fermented at relatively warm temperatures (18° C. to 24° C.) by strains of Saccharomyces cerevisiae. Some ale strains possess genes (e.g., STA1, STA2, and STA3) encoding secreted glucoamylase enzymes that catalyze the release of glucose from starches and dextrins. Such strains are referred to as S. cerevisiae var. diastaticus. S. cerevisiae var. diastaticus strains are typically also Phenolic Off Flavor positive (POF+). POF+ refers to the ability of strain to catalyze the conversion of ferulic acid to 4-vinyl guaiacol, which has the flavor and aroma of cloves. This conversion is catalyzed by the gene product of FDC1. In some cases, such as in German-style Hefeweizen ales and Belgian Ales, this is an expected and desired flavor. In many beer styles, however, 4-vinyl guaiacol is considered an off-flavor.
There are not currently existing many options for ale yeasts that are both diastatic and POF−. Such strains would be useful in creating highly attenuated beers with clean flavors. Diastatic, POF− strains could also be useful for creating low calorie beers because most of the dextrins not typically consumed by yeast can be metabolized by diastatic strains, resulting in a product with less carbohydrates.
Most yeast strains available to brewers are derived from strains used by breweries around the world for centuries. Little effort has been made to hybridize existing brewing strains to create strains with novel combinations of characteristics. Blending strains can lead to unpredictable results and beers pitched with yeast blends cropped from previous batches often have different ratios of the strains originally pitched. Thus, there exists a need in the art for novel ale brewing strains that possess diastatic activity without producing 4-vinyl guaiacol.


A method of testing a plurality of DUTs includes providing a plurality of shift registers to test a plurality of cores in each DUT, supplying test input data, a test mode input signal, a test clock signal, and a test reset signal to the shift registers and cores, receiving a master bit, a first control value, and a second control value, based on the test input data and the test mode input signal, according to the test clock signal and the test reset signal, selecting at least one core and a test method, according to the first control value, selecting a target DUT according to the master bit or the second control value, simultaneously testing and debugging the selected core according to the test method, and outputting the test data output of the target DUT to check a result of the testing when an output enable signal is received.

1. Field
One or more aspects of the inventive concept relate to a semiconductor test system and a method of controlling the same, and more particularly, to a semiconductor test system that includes cores and devices under test (DUTs) that are subject to the IEEE 1149.1 standards and the IEEE 1500 standards.
2. Description of the Related Art
The application specific integrated circuit (ASIC) technology has been developed from the concept of a chipset system to the concept of a system on chip (SoC) based on built-in cores. A SoC integrated circuit includes various functional blocks, e.g., a microprocessor, an interface, a memory array, and/or a digital signal processor (DSP). Such a functional block that has been designed and tested is referred to as a 'core'.
Even if a plurality of cores are individually tested and are determined as normally operating, the plurality of cores may operate abnormally when they are installed in a SoC. Thus, operations of the plurality of cores should be tested again after they are installed in the SoC.
Various methods, e.g., a built-in self test (BIST), test data compression (TDC), and a multi-site test, have been used for testing DUTs, e.g., a SoC. However, as the BIST and TDC require overheads of relatively large design automatic test equipment (ATE), the BIST and the TDC may be limited to testing SoCs for particular purposes. Further, as the multi-site test performs simultaneous testing of N SoCs, the testing costs may be relatively large, i.e., costs for testing one SoC may be 1/N of the cost of testing N SoCs.

Method of testing a device under test, device under test, and semiconductor test system including the device under test


Approaches for ensuring a document does not inadvertently link or contain to any malicious content. A request from a document embedded within a parent web page itself, or comprised within a window launched by the parent web page, is received. The request is executed in a memory address space separate from a memory address space in which the parent web page resides. The execution of the request is performed using a parent proxy that represents the parent web page. Any malicious actions resulting from the performance of the request affect the parent proxy rather than the parent web page. The parent proxy provides at least a portion of the results of executing the request to a child proxy, which in turn determines what, if any, content within the results should be sent to the web browser rendering the parent web page.

Web pages have, over the years, grown more complex. Currently, it is not uncommon for a web page to embed content from a variety of different sources, such as one or more advertisements served from an ad server, portions of content served from other sources, and/or links to social media services.
A common way in which such content is embedded into a web page is through the use of an iFrame. An iFrame is an HTML element that defines an inline frame in a document that may be used to embed another document, such as a web page, image, advertisement, and the like, into that document. To illustrate how an iFrame may be used, consider FIG. 1, which is a block diagram of a web page according to the prior art. Web page 10 includes three separate embedded documents. These three embedded documents reside within the bounded areas defined by iFrames 20, 22, and 24.
As an iFrame may be used to embed content from any source into a web page, iFrames 20, 22, and 24 may be used to display content from different sources. For example, iFrame 20 may be used to display an advertisement served from an ad server, iFrame 22 may embed a web page served from the same domain as web page 10, and iFrame 24 may embed a web page served from a different domain than which served web page 10.
Any data, such as content embedded into a web page, that originates from an untrusted source has the potential to carry malicious code. Thus, any content embedded within web page 10 that originates from outside the trusted domain that hosts web page 10 may contain code that can be used to hijack or otherwise alter the parent web page in an unauthorized manner. Because of this concern, an administrator of a web site may not allow web site 10 to embed any content from an external source. While this may be a good rule of thumb, it is naïve to think all web sites would adhere to this practice. Additionally, there may be instances when the administrator of a web site wishes a web site to link to or embed content originating from an untrusted source, as the perceived benefits of doing so might outweigh the perceived risks.
Given the semantics of the web, it is not always possible for someone using a web browser to determine when a portion of a web page is referencing content from a different domain than which served the web page. This introduces an unwelcome element of risk anytime a user ventures out on the World Wide Web. As a result, new approaches for addressing the security risks posed by content embedded within a web page are desirable.

Securing an endpoint by proxying document object models and windows


A cup sealing apparatus with a shaft, a heating element, an alignment plate, and a spring biasing the alignment plate into engagement with the alignment cone. The shaft extends has an alignment cone at an end thereof, the alignment cone having a modified cone taper surface centered about a longitudinal axis. The heating element includes a heating surface operable to adhere a seal to a cup presented to the heating surface. The alignment plate is spaced from the opposite axial surface, and has a profile corresponding with the taper surface so that the profile and the taper surface form a non-circular interface between the alignment cone and the alignment plate. With deflection of the spring, the alignment plate and the heating element are free to deviate from a prescribed orientation and out of coaxial alignment to match a cup axis of a cup presented to the heating surface.

The present disclosure relates to a cup sealing apparatus for attaching a seal to a cup lip, and more particularly to alignment features for movable portions of such a cup sealing apparatus.
Cup filling and sealing apparatuses are used to fill a cup with a filling substance, often comestibles in liquid or semi-liquid form, and subsequently enclose the filling substance within the cup. Such cups are generally provided with tapered walls with an open end having a lip to which a cap is affixed and sealed with a seal which prevents spilling and contamination of the contents of the comestibles. Heat sealing can be performed on variety of cup materials and geometries to apply the seal to the cup lip. Heat sealing is fast, efficient, and effective at protecting comestibles during transportation and storage. Food producers often incorporate graphic designs onto the cup, which requires the seal to be oriented correctly to the cup.


Various embodiments are generally directed to securing systems that include hardware accelerators, such as FPGA-based accelerators, and privileged system components. Some embodiments may provide a security broker. In various embodiments, the security broker may provide interfaces between the hardware accelerator and the privileged component. Some embodiments may receive an instruction from the hardware accelerator targeting the privileged component, and validate the instruction based on a configuration. In some embodiments, upon determining the instruction is not validated, the instruction is restricted from further processing.

FPGAs are semiconductor integrated circuits that can be configured after manufacturing. Generally, an FPGA includes an array of programmable logic blocks connected via programmable interconnects. As such, FPGAs can be reprogrammed to desired requirements after manufacturing.
Recently, FPGAs and other hardware-based accelerators have made inroads into the cloud computing space. One emerging model is the FPGA-as-a-service model, in which a public cloud service provider makes one or more FPGAs available for use by third-party users. In such cloud deployments, FPGAs may have access to privileged (or trusted) system resources, such as processors, network interfaces, memory, and other devices. However, users of the public cloud may not be trusted, creating significant security risks in the cloud platform. Therefore, security mechanisms are needed to allow untrusted users to utilize cloud-based FPGAs in a secure manner. Furthermore, any such security mechanisms should be capable of validation and audit to ensure the overall security of the cloud-based system.

Securely exposing an accelerator to privileged system components


Systems of electrically programmable and erasable memory cell are disclosed. In one exemplary implementation, a cell may have two storage transistors in a substrate of semiconductor material of a first cooductivity type The first storage transistor is of the type having a first region and a second region each of a second conductivity type in the substrate The second storage transistor is of the type having a third region and a fourth region each of a second conductivity type in the substrate. Arrays formed of such memory cells and non-volatile memory cells are also disclosed.

Non-volatile memory storage transistors are well known in the art. In particular a non-volatile memory storage transistors using a floating gate to store charges thereon which control the conduction of the channel region over which the floating gate is positioned is well known in the art. Referring to FIG. 1 there is shown a cross-sectional view of a non-volatile memory storage transistor 10 of the prior art. Such a storage transistor 10 is fully disclosed in U.S. Pat. No. 5,029,130 whose disclosure is incorporated in its entirety.
The storage transistor 10 comprises a substrate 12 of a first conductivity type, such as P type. A first region 14 and a second region 16 each of a second conductivity type is in the substrate 12 spaced apart from one another by a channel region 18. A floating gate 22 is over a portion of the channel region 18 and is insulated therefrom by an insulator. The floating gate 22 is also over a portion of the first region 14 and is capacitively coupled thereto, as disclosed in U.S. Pat. No. 5,029,130. A control gate 29 is adjacent to the floating gate 22, spaced apart therefrom, and controls the conduction of current in another portion of the channel region 18. The control gate 29 is capacitively coupled to the floating gate 22. In the operation of the storage transistor 10, during programming, a first current (or programming current) is applied to the second region 16, while during a read operation, a first voltage (read voltage) is applied to the second region 16. However, during programming, electrons from the second region 16 travel to the first region 14, and are injected onto the floating gate 22. Some electrons may be trapped at the insulator interface between the floating gate 22 and the substrate 12. Over time, this degrades the floating gate transistor transconductance and degrades the endurance of the storage transistor 10.
Referring to FIG. 2 there is shown a schematic view of an array of storage transistors 10. Referring to FIG. 3 there is shown a top view of an array of the storage transistors 10 of the prior art.
Referring to FIG. 4, there is shown a cross sectional view of another storage transistor 50 of the prior art. The storage transistor 50 is fully disclosed in U.S. Pat. No. 6,747,310 whose disclosure is incorporated herein in its entirety by reference. The storage transistor 50 is similar to the storage transistor 10. The storage transistor 50 comprises a substrate 12 of a first conductivity type, such as P type. A first region 34 and a second region 36 each of a second conductivity type is in the substrate 12 spaced apart from one another by a channel region 39. A floating gate 31 is over a portion of the channel region 39 and is insulated therefrom. A select gate 33 is adjacent to the floating gate 31, spaced apart therefrom, and controls the conduction of current in another portion of the channel region 39. The select gate 33 is capacitively coupled to the floating gate 31. In addition, a control gate 32 is on top of the floating gate 31. Finally, an erase gate 35 is over the first region 34, and is adjacent to the floating gate 31 on a side opposite to the select gate 33. Similar to the operation of the storage transistor 10 in the operation of the storage transistor 50, during programming, a first current (or programming current) is applied to the second region 36, while during a read operation, a first voltage (read voltage), is applied to the second region 36. Similar to the storage transistor 10, during programming, program disturbance may degrade the endurance of the storage transistor 50.
Hence it is one object of the present invention to reduce the affect of programming disturbance on the endurance of a non-volatile storage transistor.

High endurance non-volatile memory cell and array


A solid-state light source includes at least one stack of light emitting elements. The elements are an inorganic light emitting diode chip and at least one wavelength conversion chip or the elements are a plurality of light emitting diode chips and one or more optional wavelength conversion chips. The wavelength conversion chip may include an electrical interconnection means. The light emitting diode chip may include at least one GaN-based semiconductor layer that is at least ten microns thick and that is fabricated by hydride vapor phase epitaxy. A method is described for fabricating the solid-state light source.

Solid-state light sources can incorporate, for example, one or more LEDs and optionally may include one or more phosphor materials. A typical conventional, solid-state light source is constructed from one or more packaged LEDs. Each LED package may contain one light emitting, multilayer semiconductor structure mounted on a substrate that includes appropriate electrical contacts. Alternatively, each package may contain one multi-layer semiconductor structure mounted on a substrate and include a wavelength conversion material consisting of phosphor particles that may be embedded in a transparent polymer. The wavelength conversion material usually covers the emitting area of the LED.
Both the LEDs and the phosphors used in conventional solid-state light sources have deficiencies that can be eliminated in order to provide less expensive light sources and to provide sources with higher optical outputs. In addition, the standard combined LED/phosphor package is bulky and is deficient in many ways. Some of the deficiencies of conventional solid-state light sources are described below.
Conventional LEDs are fabricated by epitaxially growing multiple layers of semiconductors on a growth substrate. Inorganic light-emitting diodes can be fabricated from GaN-based semiconductor materials containing gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), indium nitride (InN), indium gallium nitride (InGaN) and aluminum indium gallium nitride (AlInGaN). Other appropriate materials for LEDs include, for example, aluminum gallium indium phosphide (AlGaInP), gallium arsenide (GaAs), indium gallium arsenide (InGaAs), indium gallium arsenide phosphide (InGaAsP), diamond, boron nitride and zinc oxide (ZnO). Especially important LEDs for this invention are GaN-based LEDs that emit light in the ultraviolet, blue, cyan and green regions of the optical spectrum and AlGaInP-based LEDs that emit in the orange and red spectral regions.
The total thickness of the semiconductor layers for a conventional GaN-based LED is only about 3 microns. The layers are fabricated by epitaxially growing a layered semiconductor structure on a growth substrate using metal organic chemical vapor deposition (MOCVD), which has a very slow growth rate of approximately 0.1 micron per hour. This results in deposition times of tens of hours and makes the growth of thicker layers prohibitively expensive. The approximately 3-micron thick multilayer semiconductor structure is very fragile and will break easily if removed from the growth substrate to form a free-standing die. The semiconductor layers must therefore either remain attached to the growth substrate or, alternatively, be attached to a transfer substrate using wafer bonding techniques followed by removal of the growth substrate. The wafer bonding techniques are expensive and can be unreliable. The added steps increase the cost of manufacturing LEDs. Removal of the growth substrate can be done by a laser liftoff process, chemical processing or mechanical polishing.
The growth substrate for GaN-based LEDs is usually sapphire or silicon carbide and is chosen to closely match the crystallographic structure of the epitaxial layers. A transfer substrate, if utilized, can be a metal, another semiconductor material such as silicon or a ceramic material such as aluminum nitride. Such growth or transfer substrates may not suitable for the final LED device. For example, sapphire is a poor thermal conductor and is therefore not the most effective thermal conductor to direct heat away from the semiconductor layers. Thermal considerations are very important for LEDs, which generate a significant amount of heat during operation. The heat lowers the light output and operating lifetime of the LED. As LED sizes become larger, such heating effects become more important and can seriously degrade the light-output performance and lifetime of the LEDs.
In addition, the growth or transfer substrate may absorb some of the light emitted by the LED, thereby lowering the optical output. The substrate may also trap some of the light generated by the LED, resulting in an additional loss in optical output. Light trapping is caused by the high refractive index of the substrate relative to air and results in total internal reflection of emitted light back through the substrate and back through the epitaxial layers.
It would be desirable to develop thick, rugged LED chips that do not include either growth or transfer substrates and that can be easily handled without breaking. Different growth techniques will be required to make such a structure since MOCVD is too slow to fabricate thick multi-layer semiconductor structures.
In standard LED-based light source designs, the back side of the LED opposite the light emitting side is a reflective surface. It would also be desirable to develop LED chips that do not have a back reflecting surface and that can emit light from all sides. Eliminated the back reflecting surface can reduce the average optical pathlength of the emitted light within the LED structure, thereby reducing optical absorption within the LED and increasing the external quantum efficiency.
A conventional wavelength conversion material for solid-state lighting typically consists of a phosphor powder that may be embedded in a transparent polymer. The wavelength conversion material can be deposited, for example, as a dome that covers the output surface of the LED.
The standard approach to produce wavelength conversion materials begins by making bulk solid phosphors using solid-state processing as known in the art. These phosphors are then ground down to powders in the micron size range and deposited on a surface using a variety of deposition techniques such as settling, encapsulation within a polymer matrix or spray coating. Though relatively inexpensive, the phosphors generated using these methods suffer from high levels of dislocations and lattice defects. In addition, the compositional purity is also difficult to maintain. In the majority of cases, this does not represent a major problem because of the reduced excitation levels. It has been shown in accelerated aging studies, however, that very high excitation levels can degrade the output luminescence of powdered phosphors severely and impact overall life performance. These levels of high excitation exist within solid-state lighting applications. This is mainly due to the small size and concentrated flux density of the LED die itself.
Several material characteristics such as lattice defects, out-gassing, and compositional purity contribute to the problems of light output degradation and/or loss in efficiency for phosphor materials. It has been shown that polycrystalline and mono-crystalline phosphor films either grown on a substrate or as single crystal boules tend to exhibit much better luminosity and life characteristics than powders. In addition, every phosphor has a thermal quenching level that can degrade the output at the temperatures created by elevated excitation levels. In the case of powdered phosphors, this can be a major issue because the phosphor particles are usually isolated from any reasonable thermal conduction path. At very high excitation levels, the energy associated with less than unity quantum efficiency and Stokes shift losses can induce a significant localized thermal rise within the phosphor particles. The need exists for the creation of an improved thermal conduction path for the luminescent material. Also, the scattering created by the use of a powder can reduce the overall light output due to the backscattering and subsequent absorption of the generated light.
Mueller-Mach et al. in U.S. Pat. No. 6,696,703 disclose the deposition of a thin film phosphor directly on the LED die. However, as-deposited thin film phosphors have relatively poor wavelength conversion efficiency. A high-temperature annealing step is required in order to properly activate the phosphor. This annealing step can damage the semiconductor layers of the LED. In addition, the absorption cross-sections of most thin film phosphors are low, especially for blue and near ultraviolet (UV) excitations typically used for solid-state lighting. It is neither economical nor practical in most cases to create a sufficiently thick layer of luminescent material grown directly on the LED. Another drawback to depositing a phosphor directly on the LED die is that a large portion of the light generated within a deposited phosphor layer can be trapped due to total internal reflectance. The need therefore exists for a method to utilize high performance phosphors within an LED package such that the best phosphor can be used efficiently (e.g. with sufficient quantity, minimal backscatter, and maximum light extraction). The need also exists for a method to fabricate high efficiency phosphors without damaging the LED semiconductor layers.
Mueller-Mach et al. in U.S. Pat. No. 6,630,691 disclose a thin single-crystal phosphor substrate onto which an LED structure is fabricated by epitaxial growth techniques. However, single-crystal phosphor substrates are expensive and finding a single crystal phosphor substrate that has the proper lattice match to allow the growth of the LED structure can be difficult.
Ng et al. in US Patent Application No. 20050006659 disclose a planar sheet of a single-crystal phosphor that is placed over the output surface of an LED as a portion of a preformed transparent cap. However, single-crystal phosphor sheets must be grown by epitaxial processes or sliced from bulk single crystals of phosphor material. Single crystal phosphor sheets are therefore too expensive for most practical applications. Planar sheets of polycrystalline phosphors are not disclosed in US Patent Application No. 20050006659. Bonding the planar sheet of a single-crystal phosphor directly to the surface of the LED to improve heat dissipation in the phosphor sheet is also not disclosed.
A need exists to maximize the efficiency of wavelength conversion materials within a solid-state lighting application and to improve the thermal conductivity properties of the materials. In addition, a need exits for low-cost phosphors that have light extraction enhancements and the ability to control the level and type of scatter within the phosphor in order to enhance the overall conversion efficiency.
It would be desirable to replace the conventional wavelength conversion material with a solid wavelength conversion chip that could be bonded to the surface of an LED chip. This cannot be done with most types of LED devices since the wavelength conversion chip would cover up one or both of the LED electrodes and prevent attachment of electrical connections to the LED. It would be desirable, therefore, to incorporate an electrical interconnection means within the wavelength conversion chip.
A conventional LED package containing an LED and a wavelength-converting phosphor is bulky compared to the light emitting epitaxial layered structure itself. If many LED packages are used in the solid-state light source, the light source is significantly larger and thicker than necessary.
It would be desirable to form stacks of light emitting chips, where each stack includes one LED chip and one or more wavelength conversion chips. Such stacks of chips can be handled individually or combined with other stacks to form larger distributed light sources. Such stacks of light emitting chips could be utilized for applications such as backlights for liquid crystal displays (LCDs) or for general lighting applications such as room lighting. It would also be desirable if the LED chip used in such a stack has a thick, rugged multilayer semiconductor structure and that the chip does not retain the growth substrate nor utilize a transfer substrate. Eliminating the transfer and growth substrates can improve the thermal conduction properties of the light emitting chips.
It would also be desirable to fabricate a solid-state light source that is a stack of two or more LED chips and optionally includes one or more wavelength conversion chips. Such stacks could be handled and used individually or formed into arrays to construct a distributed light source.
It would also be desirable if the stacks of LED chips and wavelength conversion chips could be electrically connected in series, parallel or anti-parallel configurations or in some combination of series, parallel or anti-parallel configurations. Anti-parallel electrical configurations are desirable if the electrical power source is an alternating current source.
U.S. Patent Publication No. 20050269582 discloses a ceramic phosphor layer bonded to a conventional LED. In one example, the LED is a flip chip device with both electrodes on the side of the LED opposite the ceramic phosphor so that no electrodes are in the way when bonding the ceramic phosphor layer to the LED. The LED includes a growth substrate that is still attached to the top surface of the semiconductor layers of the LED. The phosphor layer is also bonded to the growth substrate, but on the side opposite the semiconductor layers. In a second example, the p-contact layer of the LED is attached to a transfer (host) substrate and the ceramic phosphor layer is attached to the n-layer opposite the transfer (host) layer. The n-contact is adjacent to the ceramic phosphor layer and on the same side of the LED as the phosphor layer. The original growth substrate has been removed but the transfer substrate remains with the device.
U.S. Patent Publication No. 20050269582 does not disclose LEDs that have neither a growth substrate nor a transfer substrate as an element of the LED die. U.S. Patent Publication No. 20050269582 does not disclose LEDs where the n-type layer, the p-type layer or both the n-type layer and the p-type layers are thick enough so that the multilayer semiconductor structure of the LED is rugged and may be handled as a free-standing chip without having the growth or transfer substrate still attached. In addition, U.S. Patent Publication No. 20050269582 does not disclose wavelength conversion chips that include an electrical interconnection means. U.S. Patent Publication No. 20050269582 also does not disclose a stack of light emitting chips where one chip is an LED chip and another chip is a wavelength conversion chip that includes an electrical interconnection means. U.S. Patent Publication No. 20050269582 does not disclose a stack of light emitting chips where at least two of the chips are LED chips and where the stack optionally includes at least one wavelength conversion chip.
Many types of conventional solid-state light sources that emit high output lumens or high output power attempt to generate the required lumens or power from one large LED die or from an array of closely spaced LED die. Although useful for light sources requiring a small emitting area or etendue, this type of light source has two deficiencies for general lighting applications such as room lighting. One deficiency is that the high output intensity from such a concentrated source can exceed eye safety standards and can be a safety hazard. It would be desirable instead to make large-area, distributed light sources using many smaller light source chips so that light intensity safety standards are not exceeded. To accomplish this, the light source chips need to be inexpensive and easy to handle. It would also be desirable if the light source chips were constructed as stacks of LED chips and wavelength conversion chips.
For general lighting applications, a light source brightness of less than 1000 ftL (foot-lamberts) is preferred. Assuming such a brightness level on a lambertian-emitting surface would indicate that the area of a 1000 lumen source would be around 1 square foot. Presently only 10 square millimeters of LED emitter area are required to generate 1000 lumens at a current density of 1 ampere per square millimeter and with a total drive power of less than 20 watts. However, the same 1000 lumens can be generated for less than half the input power if the LED die are operated at their maximum efficiency point. The die area required to do this is larger but still represents less than 0.1% of the 1 square foot area needed to make the 1000 lumen distributed light source.
A conventional high powered LED typically operates at high current density, for example 1-2 amperes per square millimeter of LED area, resulting in lower external quantum efficiency than would be the case if the LED were operating at lower currents. Usually the highest external quantum efficiency for the LED device is obtained at a much lower current density of about 0.1-0.2 amperes per square millimeter of LED area. Using a single LED die operating at high current density instead of several smaller LEDs operating a low current density is usually dictated by the high cost of packaging multiple LED die. It would be desirable to develop lower cost methods to manufacture LEDs so that one large LED can be replaced by several smaller light source chips operating at the most efficient current density. This would allow the low cost production of a 1000 lumen sources with 1 square foot area, for example.
An additional problem with high powered light sources is that a single, high-powered LED die or a closely spaced array of LED die can produce a significant amount of heat that must be dissipated quickly to prevent the die from overheating. Metal heat sinks with large area fins are generally required for convection cooling of such devices. Unlike a 1000 lumen point source, a more desirable 1000 lumen distributed source that covers a 1 square foot area would not need any thermal management due to the large surface area available for cooling. A naturally convection-cooled surface can easily dissipate 30 to 50 watts with a reasonably small increase in temperature. It would be desirable to combine this cooling mechanism with the improved efficiency of operating a distributed array of small LED light source chips at low current densities in order to create an efficient, low cost, uniform light source useful for a variety of applications.
Conventional LED-based light sources are cooled by a heat sink in thermal contact with the LED die. The LED die includes either a growth substrate or a transfer substrate. Heat flows from the LED semiconductor layers, through the growth or transfer substrate and through the heat sink to ambient. The heat sink may include fins or other types of structures to transfer heat to an ambient fluid, such as air or water. It would be desirable to develop LED-based light sources where the LED die do include the growth substrate or a transfer substrate and where the LED die can be cooled without a special heat sink. In such cases, heat will flow directly from the light source to an ambient fluid such as air or water.
The deficiencies of conventional solid-state light sources described above can be eliminated by the various embodiments of this invention that are described below in the summary, the figures and the detailed descriptions of the preferred embodiments.

This patent is subject to a terminal disclaimer.


A spacing bolt assembly for securing to a surface includes a cylindrical inner bolt portion having a first end with external threads in a first direction and a second end with a head structure, an outer bolt portion having an axial bore for receiving the inner bolt portion and having a first end with external threads in a second direction and having a second end, and an aperture in the surface containing a central bore segment sized and threaded in the first direction to receive the first end of the inner bolt portion and a counterbore segment sized and threaded in the second direction to receive the first end of the outer bolt portion, so that the outer bolt portion can be screwed into the counterbore segment to a depth leaving a desired exposed length of the outer bolt portion protruding, and the inner bolt portion can be inserted through the axial bore and screwed into the central bore segment until the inner bolt portion head structure abuts and engages with friction the second end of the outer bolt portion to lock the inner and outer bolt portions together against rotation in either direction. The aperture is preferably provided in a mounting base portion including a plate to place against the surface and into which the aperture extends, and a structure for fastening the plate to the surface. A mass of solid material preferably extends from the plate into the surface, into which the aperture extends from the plate.

1. Field of the Invention
The present invention relates generally to the field of bolts and other threaded fasteners, and more specifically to a locking bolt assembly, which extends above a surface to an adjustable extent and which is lockingly inserted into an aperture in a base member fastened to the surface, the aperture having a central segment and a countersunk segment, including a tubular outer bolt portion having external threads at a first end for screwing into the threaded countersunk segment of the aperture and having an axial bore, and an inner bolt portion in the form of a shaft having external threads at a first end oriented opposite to the threads on the outer bolt portion and being of greater length than the outer bolt portion, for inserting through the axial bore of the outer bolt portion and engaging opposite threads in the central segment of the aperture beyond the counterbore, and having a head at its second end for abutting and creating a friction engagement with the second end of the outer bolt portion, thereby binding and locking the outer and inner bolt portions together against rotation in either direction.
2. Description of the Prior Art
There have long been fastening structures having internally threaded tubular portions for performing spacing and securing functions. These structures generally have either not been of adjustable protruding distance or have not been lockingly securable.
One such prior structure is that of Burke, U.S. Pat. No. 4,295,765, issued on Oct. 20, 1981. Burke teaches a tie-down structure which fits into a hole in the bed of a truck, the hole being surrounded by a downwardly beveled rim portion. A body member is provided having an externally threaded stem portion, a beveled rim portion and an axial bore with an internal thread. The stem portion is fit downward through the hole and the beveled flange portion abuts the beveled rim of the hole. An annular positioning member fits over the stem portion from underneath the bed and has a beveled recess to fit snugly against the beveled rim area around the hole. The positioning member helps center the body portion and secure it against lateral movement. A nut fits over the stem portion and against the positioning member to fasten the structure in place. Then an eye bolt is screwed into the axial bore. A problem with Burke if used as a spacing bolt is that no provision is made to extend the bolt to various distances and to lock the bolt in place at those distances.
Farrington, U.S. Pat. No. 824,983, issued on Jul. 3, 1906, discloses a double screw assembly having an externally threaded outer body portion for screwing into a surface. The body portion has a point at one end for penetrating the surface and a threaded axial bore in the other end for receiving a conventional machine screw. The body portion provides a permanent anchor in which the machine screw can be removably inserted. A problem with Farrington if used as a spacing bolt is that no means is provided for locking the machine screw at varying insertion depths, to leave various shank lengths protruding.
Brosseit, U.S. Pat. No. 3,461,769, Aug. 19, 1969, reveals an adjustable length shoulder screw. An internally threaded tube having an external flange at one end is inserted through a hole in a first work piece until the flange abuts the rim of the hole. A coil spring is placed around the protruding end of the tube and the protruding end is placed over a threaded hole in a second work piece. A threaded rod, having an Allen wrench socket in one end, is screwed into the tube and partially into the threaded hole in the second work piece. The coil spring enhances friction between the threaded rod and the tube and the threaded hole, to prevent the rod from working loose. A problem with Brosseit is that it is apparently useful only for joining two work pieces. It is not suited for providing a locking spacing bolt of adjustable extension length.
Rosan, U.S. Pat. No. 2,823,574, issued on Feb. 18, 1958, discloses a self-tapping fastener. The fastener has a self-tapping end with threads of slightly reduced outside diameter, and a subsequent series of threads of slightly larger diameter, so that their tips have a predetermined interference fit with the screw thread cut by the self-tapping end. A replacement fastener is provided with at least one additional screw thread arranged for an interference fit to restrain the replacement fastener against accidental loosening. A problem with Rosan is that the use of the fastener is limited to surfaces made of materials which lend themselves to self-tapping. Another problem is that once the fastener is in place, it cannot be re-adjusted to a lesser depth without becoming loose.
Zaydel, U.S. Pat. No. 4,186,645, issued on Feb. 5, 1980, teaches a plastic plug, nut and stud fastener assembly for securing a first member to an apertured second member. An externally threaded tubular plug is inserted through the aperture until an external radial flange on the plug abuts the aperture rim. A nut is screwed over the tubular plug to secure it in the aperture. Then an end of a stud having a centrally located radial flange is pressed into the tubular plug, the interior of plug being splined to increase gripping friction. The other end of the stud beyond the flange, which is externally threaded, is fastened into a hole in the second member. A problem with Zaydel is that the extent of second end projection from the first member is not readily adjustable after installation.
It is thus an object of the present invention to provide a spacing bolt assembly which can be secured to most surfaces and protrudes to an adjustable distance.
It is another object of the present invention to provide such an assembly which can be locked into position when the protrusion distance is selected.
It is still another object of the present invention to provide such an assembly which can be unlocked and readjusted to a new protrusion distance with conventional wrenches.
It is finally an object of the present invention to provide such an assembly which is sturdy, reliable and relatively inexpensive to manufacture.


A method and apparatus for testing integrated circuit devices includes a cooling chuck which is extensible within a bore in a cooling chuck body to a position in thermal contact with the integrated circuit device. The temperature of the cooling chuck is regulated by a fluid cooling system, which can be set to operate at a selected capacity to maintain the integrated circuit device at a desired temperature during testing.

1. Field of the Invention
The present invention relates to a method and apparatus for cooling an integrated circuit device which is mounted in a socket for testing. More particularly, the present invention relates to a cooling chuck system which thermally engages an integrated circuit device during testing to maintain it at a stable temperature.
2. Description of the Prior Art
In high speed super computers of the type produced by Cray Research, Inc., the assignee of this application, banks of printed circuit boards containing integrated circuit devices are used to complete the circuitry which enables high speed calculations to be performed. As computer design evolves toward circuitry of ever increasing density, the operating temperature thereof becomes higher and cooling systems must be integrated into the physical packing which is provided for the circuitry. By using various different methods, the actual operating temperature of any particular integrated circuit within the computer can be estimated.
Prior to beginning actual production of an expensive, complicate super computer, it is essential that each individual integrated circuit device be tested at its estimated operating temperature to ensure against temperature caused failure. From a cost standpoint, it is important that such testing be conducted quickly and efficiently. It is clear that there has existed a long and unfilled need in the prior art for an integrated circuit cooling apparatus and method to determine the actual performance of an integrated circuit device at a predetermined temperature.

Method and apparatus for cooling an integrated circuit chip during testing


A device serves for optically scanning a moving material web. The device is formed by a CCD camera comprising a lens and a CCD receiving element, which is provided with photodiodes. So as to be able to exactly adjust the area of the material web scanned by means of the device, the CCD receiving element can be adjusted transversely in relation to the optical axis of the lens. For adjusting the CCD receiving element, a template with a structure is provided. This structure is detected by the photodiodes, and the signals emitted by the photodiodes act on a controlling device. The controlling device adjusts the CCD receiving element so that it is aligned with the structure of the template.

Applicant claims priority under 35 U.S.C. xc2xa7119 of German Application No. 101 18 886.2 filed Apr. 18, 2001.
1. Field of the Invention
The invention relates to a device for optically scanning a moving web of material. The device is formed by at least one CCD camera directed against the material web. The camera includes a lens and a CCD receiving element scanning an area of the material web. The invention also relates to a method for adjusting the moving web of material.
2. The Prior Art
A device for scanning and analyzing the surface of a moving web of material is known from German Patent No. 37 09 500 C2. This device is formed by a CCD camera, which is directed against the web of material. The CCD camera includes a lens and a CCD receiving element. To completely analyze the surface of a very wide web of material, a plurality of such devices must be mounted next to one another. It is important in this connection that the scanned areas of the CCD receiving elements are coordinated so that they are exactly aligned with each other.
A device for measuring the speed of a jet of fluid and the detected length in a combined manner is known from German Patent No. 32 00 508 C2. From these two measured quantities, it is possible to determine the volume flow over the cross section of the jet. For this purpose, the devices include a receiving element that is formed by a plurality of diodes. Light reflected by the jet of fluid acts upon the diodes via a lens and a beam divider. By displacing the receiving element axially relative to the lens, it is possible to vary the area of the jet of fluid detected by the receiving element and to measure the illuminated area of the fluid.
An object of the present invention is to provide a device for optically scanning a moving web of material that permits a simple and highly sensitive adjustment of the area scanned by the CCD camera. Furthermore, the aim of the invention is to specify a simple method for adjusting the scanned area.
In accordance with the invention, these and other objects are accomplished by providing a device for optically scanning a moving material web formed by at least one CCD camera directed against the material web. The camera includes a lens and a CCD receiving element scanning an area of the material web. For adjusting the scanning range of the device, a template can be fixed in the area of the plane of the material web. The template has at least one structure extending transversely in relation to the direction of movement of the material web, which is detectable by the CCD camera. The CCD receiving element can be adjusted in relation to the lens transversely to its optical axis by at least one drive. The drive is actively connected with a controlling device responsive to signals from the CCD camera.
The template may include a digital coding detectable by the CCD camera. This coding is formed by a sequence of bits, in which any desired partial sequence of an xe2x80x9cnxe2x80x9d number of directly successive bits of the sequence supplies a clear n-bit code for the absolute position of the CCD camera along the template.
The device as defined by the invention serves for optically scanning a moving web of material. In particular, the device serves to control the surface of the moving web of material optically so as to detect any weaving, printing and dying defects. The device may also be used to detect the marginal edge or a printed marking of the web of material in order to detect the course along which the material web is moving. The device is formed by at least one CCD camera that is directed against the web of material and includes a lens and a CCD receiving element. Because the web of material is moving past the camera, the CCD receiving element may take the form of a line receiving element, with all light-sensitive photodiodes in the element arranged next to each other. By generating a plurality of images of the line that are offset in terms of time, it is possible to obtain a complete image of the surface of the web of material due to the movement of the material web. In particular in connection with wide webs of material, the range scanned by one single CCD camera is not adequate for detecting the surface of the web of material over the entire width of the material. Several CCD cameras generally are employed for that reason that are distributed over the width of the web of material. These CCD cameras have to be coordinated with each other. Specifically, their scanning ranges will be aligned with one another, so that the individual CCD cameras combined will supply a through-extending scanning line extending transversely in relation to the direction in which the web is running. In this way it is assured that the images generated by the individual CCD cameras can be correctly assembled to obtain an overall image, so that defects located in the area of transition between two CCD cameras can be correctly detected as well; so that the CCD cameras may scan the web of material without any gaps, it is important that the scanning ranges are correctly adjusted to one another, with a minor overlap, and to a narrow marking illuminated along the web of material. But even if only one single CCD camera is used, it is important that the CCD camera be positioned so that the area of the material web illuminated along a line is located within the range scanned by this CCD camera. To permit very fine adjustment of the areas of the web scanned by the CCD cameras, in accordance with the invention, the CCD receiving element of the CCD camera is adjusted transversely to the optical axis of the lens of the camera. In this way, adjusting the relatively lightweight CCD receiving element alone is sufficient without also having to drive the lens along with the help of an automatically focusing (xe2x80x9cautofocusxe2x80x9d) control device that may be installed. Because the lens of the CCD camera is not driven with the CCD receiving element, the CCD receiving element will be shifted away from (or to the outside of) the optical axis of the lens; however, this shifting is acceptable, particularly for finely adjusting the scanning range. So that the CCD cameras can be correctly aligned, a template can be fixed at the level of the plane of the material web with at least one structure aligned transversely to the direction of movement of the material web. In particular, the template is provided with a line extending transversely in relation to the direction in which the web of material is moving. This line supplies an adequately high optical contrast vis-à-vis the rest of the template, so that this line can be easily detected by the CCD camera. So that the adjustment process can be carried out in the simplest manner possible, the CCD receiving element is set by drives that are actively connected with a controlling device. This controlling device is influenced or regulated by the signals emitted by the CCD receiving elements. In this way, the CCD receiving elements are automatically adjusted to the structure on the template, so that adjustments are executed quickly and always with a constantly high quality.
So as to achieve an exact alignment of the scanning ranges of the CCD camera, it is sufficient to displace the CCD receiving element in the direction in which the material web is running, as well as transversely to the optical axis of the lens. Any additional transverse displacement of the CCD receiving element relative to the moving direction of the material web is unnecessary because these alignment errors can be taken into account by selecting a suitable amount of overlap between the CCD cameras.
So that the individual image lines generated by the CCD receiving elements can be easily assembled to form an image, it is important that the receiving elements be aligned in parallel with one another. However, the overall structure of the holding devices for mounting the CCD cameras contain manufacturing tolerances with respect to the alignment of the receiving line of the CCD receiving element. Such tolerances lead to a deviation of the alignment from the ideal parallelism that is relevant to the evaluation of the received image. It is therefore favorable if the CCD receiving element is supported so that it can be rotated about an axis of rotation that extends approximately parallel to the optical axis of the lens. Turning the CCD receiving element by one to three degrees generally suffices because the aforementioned manufacturing tolerances are minor. This arrangement enables the light source to emit a particularly narrow band of light, yet nonetheless assures that the CCD cameras will detect only the illuminated section of the material web.
So that the required adjustability of the CCD receiving element can be realized in the simplest possible way, it is advantageous if the CCD receiving element is mounted on a revolving table that is rotatably supported on a sliding carriage. In this way, the CCD receiving element can be both rotated and displaced transversely in relation to the optical axis in a very simple manner while nonetheless keeping the mechanical expenditure at a low level.
To achieve a precise displacement or turning of the CCD receiving element, it is important that the revolving table or the sliding carriage be driven with as little play as possible. Since the driving of the revolving table or sliding carriage requires gears that are always subject to play, it is favorable if such play is excluded by means of at least one spring engaging the revolving table or the sliding carriage.
So as to assure that the revolving table and the sliding carriage are driven in a simple and precise way, it is favorable if two spindle nuts engage the revolving table. Each spindle nut is engaged by a threaded spindle driven by a servo-motor, preferably an adjusting or stepping motor. By synchronously turning the two threaded spindles in the same sense of rotation, the sliding carriage is displaced along a guide without rotation of the revolving table. On the other hand, by synchronously turning the two threaded spindles in opposite directions of rotation, the revolving table is turned without moving the sliding carriage. When the revolving table is turned, the threaded spindles do not perform a pure sliding movement but are slightly pivoted at the same time. Because the required angles of rotation for turning the revolving table are very small, to simplify the structure of the device, the threaded spindle may be designed to pivot to a limited extent in the nut of the spindle or in the servo-motor. In this way, no additional means is necessary to compensate for the pivotal movement of the threaded spindle. Preferably, the threaded spindle engages the nut of the spindle or the servo-motor with play, so that the required pivotal movement of the threaded spindle can be absorbed by the spindle. By biasing the revolving table or sliding carriage in one direction with a spring in the proposed manner, such play will have no bearing on the precision of the movement of the CCD receiving element.
So that the scanning ranges of the individual CCD cameras can be adjusted to each other with a slight, preset amount of overlap, it is important to detect the absolute position of the individual CCD cameras on the web of material. For this purpose, the template is provided with a digital coding that is detected by the CCD receiving element. The coding consists of a sequence of bits that are scanned by the CCD receiving element. Because too much time and effort is required for start-up by first focusing the individual CCD cameras on a zero point of the measurement range, the coding contains an xe2x80x9cnxe2x80x9d number of bit codes that clearly reflect the absolute position of the CCD receiving element. It is important in this connection that any desired partial sequence of an xe2x80x9cnxe2x80x9d number of successive bits directly following each other supplies a clear n-bit code. In this case, reading of the xe2x80x9cnxe2x80x9d number of bits can be started at any desired point within the sequence while nonetheless assuring that the code that has been so read is suitable for clearly determining the position of the CCD receiving element. In this way, detecting the xe2x80x9cnxe2x80x9d number of successive bits of the sequence is sufficient to determine the position, so that only a very small portion of the sequence of bits has to be evaluated.
The method as defined by the invention has been successfully tested for adjusting the device specified above for optically scanning a moving web of material by means of at least one CCD receiving element. In this process, a template is first fixed in the area of the plane of the material web. The template has a structure that extends transversely in relation to the direction in which the web of material is moving. This structure can be detected by the CCD receiving element. The structure is preferably formed by a printed line that extends crosswise in relation to the direction in which the material web is moving. The photodiodes of the CCD receiving element generate signals that are dependent upon whether these photodiodes detect the structure or an area of the template located next to the structure. For example, the structure may be formed by a white line that is imprinted on an otherwise black template. The light reflected by the white line generates in the respective photodiodes a photo-signal, whereas the black surface of the template results substantially in a zero level on the receiver diodes. The signals generated by the photodiodes are evaluated as to which ones of the photodiodes detect the structure and which ones detect the areas located next to the structure. Depending on the result of the evaluation, the CCD receiving element is adjusted so that it is aligned with the structure. This adjustment is carried out automatically without any activity required by the operating personnel. The adjustment process is carried out rapidly with no change in the high quality of the adjustment. After the adjustment has been made, the CCD receiving element is maintained in the adjusted position. With the CCD receiving element in the adjusted position, the template may be subsequently removed in order for the CCD receiving element to scan surface structures of the moving web of material.
So that the CCD receiving element can be adjusted as precisely as possible, it is necessary to provide the structure applied to the template with a relatively narrow configuration. The consequence thereof, however, is that before the adjustment process starts, the structure most likely will be disposed completely outside of the detection range of the CCD receiving element. In that case, it is advantageous if the CCD receiving element is first displaced transversely to the structure until it is located within the scanning range of at least one of the photodiodes. Following this rough adjustment, clues at least can be obtained from the signals generated by the photodiodes about the possible configuration of the structure of the template in relation to the CCD receiving elements. Such clues are important for the further adjustment of the CCD receiving element. In particular, the point where the structure on the template intersects the scanning line of the CCD receiving element can be determined by evaluating the position of those photodiodes within the CCD receiving element that supply a corresponding active signal. Based on the number of the photodiodes that supply an active signal, it is then possible to deduce the angle that is enclosed by the two aforementioned lines between each other.
To obtain an adjustment algorithm that is simple yet nonetheless efficient, it is favorable if the CCD receiving element is turned and displaced so that the number of photodiodes detecting the structure of the template is maximized in each case. This maximization specification generally suffices for aligning the CCD receiving elements with the structure with a finite number of steps. The CCD receiving element is preferably turned and displaced in an alternating manner so that the two modes of adjustment will exert the smallest possible influence on each other. By rotating the CCD receiving element, the greater the number of receiving elements detecting the structure, the smaller the angle between the two receiving elements will be. If the axis of rotation of the CCD receiving element fails to coincide with the range of detection of the CCD receiving element, rotating the CCD receiving element will result in an apparent displacement of the structure in relation to the photodiodes. Such an apparent shift is corrected between each two rotations by a corresponding displacement of the CCD receiving elements.
Finally, to improve the efficiency of the adjustment algorithm, it is advantageous if the CCD receiving element is displaced so that the template structure extends approximately symmetrically through the axis of rotation. If the CCD receiving element is arranged approximately symmetrically with respect to the axis of rotation, it is generally sufficient if the axis of rotation is shifted so that the photodiodes supplying an active signal will be distributed approximately symmetrically around the center photodiode of the CCD receiving element. What is achieved with this measure is that the axis of rotation is approximately located within the range of detection of the CCD receiving element. In turn, the consequence thereof is that after the CCD receiving element has been turned, it has to be displaced only very slightly, so that the adjustment process will lead to an overall optimal adjustment of the CCD receiving element in just a few adjustment steps. The CCD receiving element may also be turned and displaced at the same time. In that case, maximizing of the number of photodiodes detecting the structure will have a bearing substantially only on the rotation of the CCD receiving element. Any detected asymmetry of the signals generated by the photodiodes will effect a displacement of the CCD element that will compensate for such rotation.

Device for optically scanning a moving web of material and method for adjusting said device


The memory device comprises a recording member in which perturbations are selectively formed, a probe for detecting the presence or absence of the perturbations, a first cantilever having the recording member at a forward end, and a second cantilever having the probe needle at a forward end. The probe is supported by the first and second cantilevers at a relative position in close proximity to and spaced from the recording member. Independent drive of the first and second cantilevers permits the probe to be scanned relatively across the recording member over a wide range.

1. Field of the Invention
This invention relates generally to computer memory devices and relates more particularly to a memory device for reading data by measurement of the tunnel current.
2. Description of the Related Art
The scanning tunneling microscope (STM) proposed by Gerd Binnig and Heinrich Rohrer of IBM is a device for measuring, on an atomic scale, the surface contours of a sample by bringing a probe having a sharp tip of a radius of curvature of about 10 nm within some tens of angstroms of the sample surface across which the tip is scanned and by detecting variations in the tunnel current.
While the STM in its early stage was of a bulk structure including vibration isolation equipment, the advent of the micromechanical technology has decreased the device in size to minimum and removed problems associated with vibrations and thermal drifts, as achieved by a group of Stanford University people headed by Calvin F. Quate, who succeeded in forming on a silicon substrate by an IC process a cantilever type STM provided with a cantilever generally formed of piezoelectric material and which is capable of three dimensional scanning.
A STM memory which reads data by recording digital data bits by selectively forming perturbations in the surface of a substrate, measuring the tunnel current flowing between the probe and the surface of the substrate while permitting the probe to be scanned across the surface, and by detecting the presence of the perturbations, is disclosed in U.S. Pat. No. 4,575,822 to Calvin F. Quate, entitled "Method and Means for Date Storage using Tunnel Current Data Readout". The writing of surface perturbations by using a STM has been disclosed by J. Schneir, R. Sonnenfeld and others in a report entitled "Tunneling microscopy, lithography and surface diffusion on an easily prepared atomic flat gold surface". The report discloses a hole of a width of 5 nm and a mound of 10 nm in diameter. It also discloses that a continuous observation by a STM indicated that the mound had been spread out and had become flat after 21 hours.
The cantilever type STM mentioned above is applicable to this STM memory. In a cantilever type STM of a size of 5 .mu.m.times.200 .mu.m.times.1000 .mu.m in which a vaporized ZnO film is employed as a piezoelectric element, the ZnO film is elongated or contracted by 22 .ANG./V in a longitudinal direction, by 220 .ANG./V in a lateral direction and by 7700 .ANG./V in a direction perpendicular to the surface, so that when it is driven at a voltage of 5 V the range of horizontal scan is on the order of 110 .ANG..times.1100 .ANG.. Such cantilever has sufficient stroke when used in a STM for monitoring the sample surface.
When, however, the cantilever is used for a STM memory its stroke is not enough to constitute a mass memory. That is, when the recording area per bit of a STM memory is set to be 5 .ANG..times.5 .ANG., the amount of data that is recorded on the horizontal scan range 110 .ANG..times.1100 .ANG. is on the order of 5 K bits. The amount of data that is recorded is on the order of 20 K bits even if the recording area per bit is set at 2.5 .ANG..times.2.5 .ANG.. Even if one-hundred STM memories are formed on a single chip thanks to an IC process, available memory capacity is only about 2 M bits and is subject to limitations to establish a mass memory.

Memory device with dual cantilever means


A system (100, 600, 700) for fastening objects to a wall or ceiling (120) comprises a rear, wall-anchor section (105, 607, 705) with a bore, and a front, pivotable section (110, 602, 604, 720), rigidly abutted together with no gap, aligned by a projection (135), and connected by a “living” hinge, strap, flap, lanyard or other type of connector (115). The pivotable section has a sharpened tip (112, 630, 635, 725) for penetrating the wall while the fastener is forced into the wall by a hammer or other driving tool or device, or manually by hand. The two sections of the fastener have a tapered, elliptical cross-section (111) which both prevents rotation of the fastener and locally reduces load-responsive pressure in the wallboard. To install, the axes of the wall-anchor and pivotable sections of the fastener are first aligned. The fastener is forced into the wall one of the above means. Then a pin (140) is manually inserted into the bore of the wall-anchor section. When the pin meets the projection the pivotable section is forced to rotate about the hinge. A locking tooth (139) secures the pin by interfering with either threads or notches in the pin. Alternatively, the pin forces past the projection and wedges between the projection and the bore of the wall-anchor section.

1. Field of Invention
The present invention relates to mounting systems, in particular to methods and apparatus for mounting fasteners to hollow walls and ceilings.
2. Prior Art Fasteners
Most walls and ceilings of residential and commercial structures have a hollow cavity construction, i.e., there is a hollow space behind the wall. The wall comprises a sheet of material, typically between 1 and 2.54 cm thick, affixed to a suitable frame which includes wood or metal framing members (studs or joists). The framing members typically are spaced on 41 or 61 cm centers. The sheet material is sold under the trademark SHEETROCK by United States Gypsum Co., Chicago, and is known generically as drywall, wallboard, plasterboard, and gypsum board. Another less common wall and ceiling material with similar characteristics is plaster applied over a lath substrate. In the discussion below, the terms wall and ceiling are synonymous.
A variety of fasteners are commercially available for attaching, hanging, or securing objects such as pictures, mirrors, shelving, cabinetry, towel racks, handrails, and other objects to a wall at a location other than over the area where a framing member is located. Most of these fasteners can be divided into two general types: toggle and expansion.

System and methods for wall and ceiling fastening


The technology disclosed relates to evolving deep neural network structures. A deep neural network structure includes a plurality of modules with submodules and interconnections among the modules and the submodules. In particular, the technology disclosed relates to storing candidate genomes that identify respective values for a plurality of hyperparameters of a candidate genome. The hyperparameters include global topology hyperparameters, global operational hyperparameters, local topology hyperparameters, and local operational hyperparameters. It further includes evolving the hyperparameters by training, evaluating, and procreating the candidate genomes and corresponding modules and submodules.

The subject matter discussed in this section should not be assumed to be prior art merely as a result of its mention in this section. Similarly, a problem mentioned in this section or associated with the subject matter provided as background should not be assumed to have been previously recognized in the prior art. The subject matter in this section merely represents different approaches, which in and of themselves can also correspond to implementations of the claimed technology.
The technology disclosed relates to evolving deep neural network structures. A deep neural network structure includes a plurality of modules with submodules and interconnections among the modules and the submodules. In particular, the technology disclosed relates to storing candidate genomes that identify respective values for a plurality of hyperparameters of a candidate genome. The hyperparameters include global topology hyperparameters, global operational hyperparameters, local topology hyperparameters, and local operational hyperparameters. The technology disclosed further includes evolving the hyperparameters by training, evaluating, and procreating the candidate genomes and corresponding modules and submodules.
Neuroevolution is a recent paradigm in the area of evolutionary computation focused on the evolution of co-adapted individuals with subcomponents without external interaction. In neuroevolution, a number of species are evolved together. The cooperation among the individuals and/or the subcomponents is encouraged by rewarding the individuals and/or the subcomponents based on how well they cooperate to solve a target problem. The work on this paradigm has shown that evolutionary models present many interesting features, such as specialization through genetic isolation, generalization, and efficiency. Neuroevolution approaches the design of modular systems in a natural way, as the modularity is part of the model. Other models need some a priori knowledge to decompose the problem by hand. In many cases, either this knowledge is not available or it is not clear how to decompose the problem.
However, conventional neuroevolution techniques converge the population such that the diversity is lost and the progress is stagnated. Also, conventional neuroevolution techniques require too many parameters to be optimized simultaneously (e.g., thousands and millions of weight values at once). In addition, the deep learning structures used by conventional neuroevolution techniques are excessively large and thus difficult to optimize.
Therefore, an opportunity arises to provide improved systems and methods for evolving deep neural network structures.

Evolution of deep neural network structures

Cognizant Technology Solutions U.S. Corporation


A method and apparatus for determining a unique wake word for devices within an incident. One system includes an electronic computing device comprising a transceiver and an electronic processor communicatively coupled to the transceiver. The electronic processor is configured to receive a notification indicative of an occurrence of an incident and one or more communication devices present at the incident, determine contextual information associated with the incident and the one or more communication devices, and identify one or more wake words based on the contextual information. The electronic processor is further configured to determine a phonetic distance for each pair of wake words included in the one or more wake words, and select a unique wake word from the one or more wake words for each communication device of the one or more communication devices based on the determined phonetic distance.

Communication devices, for example, two-way radios, land mobile radios, smart telephones, etc. are used in many applications throughout many industries. These communication devices may be configured to activate upon receipt (for example, via a microphone and audio processor) of a trigger or wake word. However, when multiple communication devices with similar wake words are in close proximity, a wake word intended for a first communication device may inadvertently trigger activation a second communication device.
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.
The apparatus and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.


An air-carbon arc system for reducing irregularities in a work piece surface including a control box, a torch head operationally connected to the control box and configured to cooperate with the work piece to generate an arc, and a pendant operationally connected to the control box and having a means for reducing irregularities in the work piece surface.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
Air-carbon arc systems and processes may be used in a wide variety of applications, such as metal fabrication and casting finishing, chemical and petroleum technology, construction, mining, general repair, and maintenance. With respect to metal fabrication and casting finishing, air-carbon arc metal removing systems and processes may be used to gouge, groove, cut, or flush metal from a surface. Nearly all metals may be fabricated, including, but not limited to: carbon steel, stainless steel and other ferrous alloys; gray, malleable and ductile iron; aluminum; nickel and copper alloys and other nonferrous metals.
It may be desirable to use air-carbon arc metal removing systems or processes to modify a working piece such as to have a generally flat, flush, smooth, and/or otherwise constant surface. However, if the work piece surface includes irregularities, then it may be difficult to create a generally flat, flush, smooth, and/or otherwise constant surface through the use of air-carbon arc systems processes.
It may be desirable to remove and/or reapply hardfaced material from an object. "Hardfacing" is a technique which involves applying a layer of hard material to a substrate for the purpose of increasing the wear and corrosion resistance of the substrate. The layer of hard material may be applied to the object by welding or thermal spraying. Hardfacing by arc welding may be used as a surfacing operation to extend the service life of industrial components, pre-emptively on new components, or as part of a maintenance program. Hardfacing may result in significant savings in machine down time and production costs; as a result this process has been adopted across many industries such as steel, cement, mining, petrochemical, power, sugar cane and food.
Steel mill rolls or shafts are often hardfaced. For example, rolls and shafts are commonly modified to have a series of concentric hardfaced circles adjacent to each other and evenly-spaced along all or a portion of the length of the roll or shaft. As another example, rolls or shafts may be modified to have a series of square-shaped hardfaced surfaces adjacent to each other and evenly-spaced along all or a portion of the length of the roll or shaft. Hardfaced steel mill rolls may be used in a variety of applications, such as a crushing roller for a paper mill.
Despite the advantages of hardfacing, hardfaced material may be subject to wear before the non-hardfaced material of a component. This may be due to many factors such as the brittleness or other properties of the hardfaced material or the fact that hardfaced portions of a component are often the working surfaces of the component and are therefore subject to disproportionate stresses and forces while the component is in operation. As a result of these and other factors and varying operating conditions, hardfaced materials may not wear evenly and may include irregular surfaces.
It is therefore desirous to provide an air-carbon arc system and apparatus for detecting and/or reducing irregularities in a work piece surface and a method of using the same.

Air-carbon arc system and apparatus for detecting and/or reducing irregularities in a work piece surface and method of using the same


A scrubbing pail having a support attached to the rim of the pail, two brackets attached to the support, a grip pivotally attached between the brackets, and two elongate, curved members spaced apart so as to define a channel therebetween that is narrower than the mop head but wider than the mop shaft and the members extending from the grip, under the support and over a minor portion of the pail opening so that, when the mop is in the pail and is moved into the channel between the two members and lifted by the shaft, the mop head is gripped by the members and the pail is thereby lifted and maintained generally level. The two elongate members can be rotated out of the way if desired.

1. Field of the Invention:
The present invention relates to scrubbing pails used for general cleaning. In particular, the present invention relates to an improved handle system for lifting pails when those pails are used with cleaning tools such as mops, long handled brushes and the like.
2. Discussion of Background:
Mopping a floor, carrying a scrubbing pail and cleaning in general require not only use of the back muscles but asymmetric use of these muscles. Back strain and soreness are dreary rewards for frequent bending to lift, to move, to lower the pail in the performance of cleaning activities such as mopping.
Some industrial pails have castors to permit the rolling of pails from place to place during a mopping activity, but the common variety of scrubbing pail must be lifted and carried from place to place, as has been the practice for many years. This effort requires frequent bending and lifting. There is a need for an ordinary pail that reduces the amount of bending and lifting of scrubbing pails in the process of general cleaning activities.