A modem for more efficiently processing a received analog signal into a digital output. The modem preferably estimates the carrier frequency offset in at least one stage, by receiving a synchronization field divided into at least two portions, calculating a difference of the phase between the portions, and then calculating the frequency offset from the phase difference. More preferably, the modem estimates the carrier frequency offset in two stages, with a first stage being a initial frequency estimate of the offset.

The present invention relates to a method for rapid carrier frequency estimation in a communication system.
Communication systems feature a transmitter and a receiver. In order for communication to occur, a transmitted signal must be accurately processed by the receiver for accurate recovery of the information contained within the signal.
For example, radio frequency signals are subject to distortion such as amplitude and phase distortion and carrier frequency offset. Amplitude and phase distortion, which cause time dispersion, are known as channel response. The transmission frame may include synchronization fields, which are required for correct processing of the frame to overcome the above-mentioned distortions, yet which must be minimized in order to maximize the available bandwidth. For example, for communication protocols which feature bursty transmissions, each burst may include synchronization fields. For example, these fields may appear at the beginning of the burst, and then they form the header. When bursts are relatively short, the synchronization overhead must be decreased as much as possible, such that the synchronization field must be as short as is practical.
Part of the processing of the synchronization field involves the estimation of the carrier frequency offset. The frequencies by which the signal are modulated, upconverted, downconverted and demodulated have some deviation from their ideal values. The sum of all these deviations is the carrier frequency offset. The estimation of the carrier frequency offset is necessary for processing the received signal. Methods for rapidly estimating the carrier frequency offset in the presence of channel distortion such as ISI (intersymbol interference) would therefore be very useful.
There is thus a widely recognized need for, and it would be highly advantageous to have, a system and a method for rapidly estimating the carrier frequency offset, in order to increase the efficiency of signal processing, and decrease the length of synchronization fields, and increasing the accuracy of the estimate.
According to the present invention there is provided a method for estimating a frequency offset of at least one frame, containing at least one synchronization field being divided into at least two subsections, the at least two subsections being composed of substantially equivalent pseudorandom symbols, the frame being received by a receiver from a transmitter, the receiver including at least an analog-to-digital processing unit, the steps of the method being performed by a data processor, the steps of the method comprising: (a) determining an initial frequency offset, finitial; (b) calculating a first phase in radians for at least a portion of a first subsection according to an equation:       ϕ    1    =      angle              (                        ∑                      i            =                          i              m                                            i            n                                            xe2x80x83                                              a            i            *                    *                      exp                                      (                                                -                  j                                *                i                *                                  f                  initial                                *                2                                                  xe2x80x83                                                π                *                                  T                  s                                            )                                                      Y            i                              )
wherein i denotes time in symbols; Ts is a symbol period; n and m are integers, inxe2x89xa7im; a length of the at least a portion of the first subsection is inxe2x88x92im+1; Yi is an output of the analog-to-digital processing unit; ai* is the complex conjugate of the ith training symbol ai; (c) calculating a second phase in radians for at least a portion of a second subsection according to an equation:             ϕ      2        =          angle                    (                              ∑                          i              =                              i                p                                                    i              q                                                      xe2x80x83                                                        a              i              *                        *                          exp                                            (                                                      -                    j                                    *                  i                  *                                      f                    initial                                    *                  2                                                        xe2x80x83                                                      π                  *                                      T                    s                                                  )                                                                Y              i                                      )              ,
wherein q and p are integers, iqxe2x89xa7ip; a length of the at least a portion of the second subsection is iqxe2x88x92ip+1; (d) calculating a phase difference of the first phase and the second phase angle according to an equation: xcex94xcfx86=xcfx862xe2x88x92xcfx861; (e) adjusting the phase difference such that if xcex94xcfx86 greater than xcfx80, then xcex94xcfx86=xcex94xcfx86xe2x88x922xcfx80, and alternatively such that if xcex94xcfx86 less than xe2x88x92xcfx80, then xcex94xcfx86=xcex94xcfx86+2xcfx80; and (f) calculating the frequency offset according to an equation: xcex94f=xcex94xcfx86/(xcex94t*2xcfx80) wherein xcex94t=(ipxe2x88x92im)*Ts.
Preferably, the analog-to-digital processing unit features an analog-to-digital converter and Yi is an output of the analog-to-digital converter.
Alternatively and preferably, the analog-to-digital processing unit features a receive filter and Yi is an output of the receive filter.
According to a preferred embodiment of the present invention, the first subsection features three portions, a first symbol of a first portion being denoted i1, a first symbol of a second portion being denoted i2, a last symbol of the second portion being denoted symbol i3; and a last symbol for a third portion being denoted symbol i4; and wherein the second subsection features three portions, a first symbol of a first portion being denoted i5, a first symbol of a second portion being denoted i6, a last symbol of the second portion being denoted symbol i7; and a last symbol for a third portion being denoted symbol i8; such that the second portions of the first and the second subsections are processed, such that n=3, m=2, p=6 and q=7.
According to other preferred embodiments of the present invention, the steps of the method are repeated for a plurality of frames n, such that a plurality of n frequency offsets is calculated, the method further comprising the step of: (g) averaging the plurality of n frequency offsets to obtain the frequency offset. Preferably, the step of averaging the plurality of n frequency offsets includes the following steps: (i) determining a weight wi for each frequency offset i; and (ii) calculating the frequency offset to be xcex94fw according to an equation:       Δ              xe2x80x83                  f      w        =            1                        ∑                      i            =            1                    n                                  xe2x80x83                                  w          i                      *                  ∑                  i          =          1                n                          xe2x80x83                          (                              w            i                    *          Δ                                xe2x80x83                                          f            i                          )
Preferably, the initial frequency offset is calculated by the steps of: (i) calculating for each fk of a set of frequencies {fk} a set of values T(fk) according to an equation:       T              (              f        k            )        =            "LeftBracketingBar"                        ∑                      i            =            1                    L                                  xe2x80x83                                              a            i                    *                      exp                                      (                                                -                  j                                *                i                *                                  f                  k                                *                2                                                  xe2x80x83                                                π                *                                  T                  s                                            )                                *                      Y            i                              "RightBracketingBar"        2
wherein L is a length of the synchronization field; j is the square root of xe2x88x921; and (ii) determining the initial frequency offset as a value of a frequency fk such that the set of values T(fk) is maximized.
According to another embodiment of the present invention, there is provided a method for estimating a frequency offset of at least one frame, containing at least one synchronization field being divided into at least a first subsection and a second subsection separated by a spacer portion, the at least two subsections being composed of substantially equivalent pseudorandom symbols, the first subsection featuring at least three portions, a first portion having a first symbol denoted symbol i1, a second portion having a first symbol denoted symbol i2 and a last symbol denoted symbol i3, and a third portion having a last symbol denoted symbol i4, the second subsection also featuring at least three portions, a first portion having a first symbol denoted symbol i5, a second portion having a first symbol denoted symbol i6 and a last symbol denoted symbol i7, and a third portion having a last symbol denoted symbol i8, the frame being received by a receiver from a transmitter, the receiver including at least an analog-to-digital processing unit, the steps of the method being performed by a data processor, the steps of the method comprising: (a) calculating for each frequency fk of a set of frequencies {fk} an equation: T(fk)   =            "LeftBracketingBar"                        ∑                      i            =            1                    L                                  xe2x80x83                                              a            i                    *                      exp                                      (                                                -                  j                                *                i                *                                  f                  k                                *                2                                                  xe2x80x83                                                π                *                                  T                  s                                            )                                *                      Y            i                              "RightBracketingBar"        2
wherein Ts is a symbol period; L is a length of at least a portion of the synchronization field; j is the square root of xe2x88x921; (b) determining an initial frequency estimate finitial as a value of a frequency fk such that a set of values T(fk) is maximized; (c) calculating a first phase in radians for the second portion of the first subsection according to an equation:       ϕ    1    =      angle              (                        ∑                      i            =                          i              2                                            i            3                                            xe2x80x83                                              a            i            *                    *                      exp                                      (                                                -                  j                                *                i                *                                  f                  initial                                *                2                                                  xe2x80x83                                                π                *                                  T                  s                                            )                                                      Y            i                              )
wherein i denotes time in symbols; a length of the second portion of the first subsection is i3xe2x88x92i2+1; Yi is an output of the analog-to-digital processing unit; ai* is the complex conjugate of the ith symbol ai; (d) calculating a second phase in radians for the second portion of the second subsection according to an equation:       ϕ    2    =      angle              (                        ∑                      i            =                          i              6                                            i            7                                            xe2x80x83                                              a            i            *                    *                      exp                                      (                                                -                  j                                *                i                *                                  f                  initial                                *                2                                                  xe2x80x83                                                π                *                                  T                  s                                            )                                                      Y            i                              )
wherein a length of the second portion of the second subsection is i7xe2x88x92i6+1; (e) calculating a difference of the first phase and the second phase according to an equation: xcex94xcfx86=xcfx862xe2x88x92xcfx861; (f) adjusting the difference such that if xcex94xcfx86 greater than xcfx80, then xcex94xcfx86=xcex94xcfx86xe2x88x922xcfx80, and alternatively if xcex94xcfx86 less than xe2x88x92xcfx80, then xcex94xcfx86=xcex94xcfx86+2xcfx80; and (g) calculating the frequency offset according to an equation: xcex94f=xcex94xcfx86/(xcex94t*2xcfx80) wherein xcex94t=(i6xe2x88x92i2)*Ts.
Hereinafter, a signal which corresponds to a particular burst Si (i being an integer) is defined as having been produced by processing at least a portion of burst Si, for example by sampling an analog signal obtained from the received burst Si to produce a xe2x80x9ccorrespondingxe2x80x9d digital sampled signal.

Method for rapid carrier frequency estimation in a communication system


Memory having an array of memory cells and a controller for access of the array of memory cells that is configured to generate a data value indicative of a level of a property sensed from a data line while applying potentials to control gates of memory cells of more than one string of series-connected memory cells connected to that data line.

Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic systems. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage of the cells, through programming of a charge storage structure, such as floating gates or trapping layers or other physical phenomena, determine the data state of each cell. Flash memory devices are commonly used in electronic systems, such as personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, cellular telephones, and removable memory modules, and the uses for flash memory continue to expand.
Flash memory typically utilizes one of two basic architectures known as NOR flash and NAND flash. The designation is derived from the logic used to read the devices. In NOR flash architecture, a logical column of memory cells is coupled in parallel with each memory cell coupled to a data line, such as those typically referred to as digit (e.g., bit) lines. In NAND flash architecture, a column of memory cells is coupled in series with only the first memory cell of the column coupled to a bit line.
Neural networks are networks which process information by modeling a network of neurons, such as neurons in a human brain, to process information (e.g., stimuli) which has been sensed in a particular environment. Similar to a human brain, neural networks typically comprise multiple neuron models to process information. The demand for improved operating characteristics of neural networks continues to increase. Such desirable neural network operating characteristics improvements are increased speed, capacity and processing power of neural networks, for example.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for methods and devices for improving operating characteristics of neural networks.

This patent is subject to a terminal disclaimer.

Memory configured to generate a data value from a data line connected to more than one string of series-connected memory cells


An RF coil assembly for use in a multiple receive-channel MRI system is provided. The RF coil assembly is configured as a multi-turn-element RF coil assembly to operate as a surface-coil array in cooperation with the MRI system which is configured to operate in a multiple-channel receive mode.

The invention generally relates to magnetic resonance imaging (MRI), and more particularly, to radio frequency (RF) surface coils used for MRI.
Generally, MRI is a well-known imaging technique. A conventional MRI device establishes a homogenous magnetic field, for example, along an axis of a person's body that is to undergo MRI. This homogeneous magnetic field conditions the interior of the person's body for imaging by aligning a majority of the nuclear spins of nuclei (in atoms and molecules forming the body tissue) along the axis of the magnetic field. If the orientation of the nuclear spin is perturbed out of alignment with the magnetic field, the nuclei attempt to realign their nuclear spins with an axis of the magnetic field. Perturbation of the orientation of nuclear spins may be caused by application of RF magnetic field pulses. During the realignment process, the nuclei process about the axis of the magnetic field and emit electromagnetic signals that may be detected by one or more surface coils placed on or about the person.
Imaging time is dependent upon the desired signal-to-noise ratio (SNR) and the speed with which the MRI device can fill the k-space matrix, which is transformed to create an image. In conventional MRI, the k-space matrix is filled one line at a time. Although many improvements and variants have been made in this general area, the speed with which the k-space matrix may be filled is limited. To overcome these inherent limits, several techniques have been developed to simultaneously acquire multiple lines of data for each application of a magnetic field gradient. These techniques, which may collectively be characterized as "parallel imaging techniques", use spatial information from arrays of RF detector coils to substitute for the spatial encoding which would otherwise have to be obtained in a sequential fashion using field gradients and RF pulses.
Two such parallel imaging techniques that have recently been developed and applied to in vivo MRI are SENSE (SENSitivity Encoding) and SMASH (SIMultaneous Acquisition of Spatial Harmonics). Both techniques include the use of a plurality of separate receiving elements operated in parallel, with each element having a different or spatially translated sensitivity profile. Combination of the respective spin resonance signals detected enables a reduction of the acquisition time required for an image (in comparison with conventional Fourier image reconstruction) by a factor which in the most favorable case may equal the number of the receiving members used (see Pruessmann et al., Magnetic Resonance in Medicine, Vol. 42, pp. 952-962, 1999).
A drawback of the SENSE technique, for example, results when the component coil sensitivities are either insufficiently well characterized or insufficiently distinct from one another. These instabilities may manifest as localized artifacts in the reconstructed image, or may result in degraded SNR. Accordingly, it is desirable to implement RF coil arrays in MRI systems that (among other aspects) provide increased SNR with or without the use of parallel imaging techniques such as SENSE.
Additionally, image artifacts are also attributable to the mutual couplings between coils in a cluster of closely situated surface coils, which have been separately tuned and matched. The mutual couplings between the coils generate coupled modes, which cause splitting in the coils' resonant spectrum. Consequently, the coils become detuned and mismatched, causing reductions in the SNR. To sustain the SNR of the coils and avoid image artifacts caused by coil coupling, some electrical decoupling mechanisms are needed to collapse the multiple coupled modes into a single degenerate mode that resonates at the MRI frequency.
More recently, parallel imaging techniques have been further developed to exploit multiple receive channels, for example, 8, 16 or 32 channels receiving signals from 8, 16 or 32 receiver coils respectively. In a typical multiple coil array arrangement, several adjacent coils are provided for receiving signals during imaging. However, there are a number of design challenges in providing the capability of multiple receive channels and multiple coils. For example, the size of coils needed to support a 32-channel MRI system must be sufficiently small to fit within a typical 40 cm field of view of a conventional MRI system, or a smaller field of view for some applications. Additionally, the coil size and corresponding arrangement within a coil array will present inherent inductive coupling and sensitivity issues which both can negatively impact the quality (Q) and loading factors of the coils, thereby limiting overall SNR performance of the coils and MRI system during imaging. To address the size and sensitivity issues described above certain coil configurations, for example spiral or multiple-looped coils, have been used in coil arrays designed for magnetic resonance operating below 30 MHz. There is now an increased need for additional receive channels and MRI system capability at higher frequencies, especially but not limited to 64 MHz and 128 MHz corresponding to 1.5 T and 3 T systems, respectively. However, spiral or multiple-looped coils used in MRI systems operating at or above 30 MHz may negatively impact the overall performance of the coils and MRI system during imaging.
The loading factor is the ratio of unloaded Q to loaded Q (when the coil is loaded by being placed on the subject), where the quality factor Q is a measure of the coil resonance frequency divided by the band-width of the coil resonance, as is known to those skilled in the art. The loading factor serves as a measure of the ratio of total resistive losses arising from the coil and the imaging subject divided by the losses from the coil alone. High loading factors generally mean that most of the noise is coming from the subject, not the coil, and in the absence of strong E-field coupling between the coil and the sample, are generally interpreted as a sign of good coil performance.
What is needed is a highly coupled RF coil assembly having high Q and high loading factor MRI coils for use in a multi-channel MRI system operating at higher frequencies.

Multi-turn element RF coil array for multiple channel MRI


A multi-directional power distribution unit (PDU) provides flexibility in the configuration of a computer system, disk drive array or other enclosure. The power distribution unit may be installed in one orientation for a power feed having a first configuration (e.g., from the front of the enclosure), and may be installed in a second orientation for a power feed in a second configuration (e.g., from the rear of the enclosure). In either orientation, a set of external power connectors couples to one or more external power feeds. Depending on the orientation, either a first or second internal connector will interface with the system or enclosure (e.g., a midplane, a power supply). The PDU may include circuitry for filtering electrical power and may also include a heat sink.

This invention relates to the field of electronics. More particularly, a multi-positionable power distribution unit is provided for a computer system or other system of electronic devices, to afford flexibility in the configuration of the system.
Enclosures for computer systems and other electronic systems require access for electrical power for operating the electronic device(s) within the enclosure. In addition to preferences regarding other configuration options (e.g., number or type of devices), different users may have different preferences regarding the configuration of a power feed.
For example, it may be preferable to have an external power feed connect to an enclosure at different points or locations, depending on the orientation of the enclosure when it is installed, whether the enclosure is to be rack-mounted, wall-mounted, floor-mounted, etc. Thus, one user may prefer to have a power feed connect to the rear of an enclosure, while another user may prefer to have it connect to the front.
Presently, in a system or enclosure for which a customer or user may specify different configurations regarding a power feed, the internal configuration of the enclosure will differ accordingly. In particular, a power distribution unit (PDU) for interfacing the system to an external electrical power feed is usually integral to the power supply or designed for installation in a specific position, or with a specific orientation, within the system. The PDU is typically configured to connect to the power feed at just one location (e.g., in the rear of the system). To accommodate a power feed at a different location (e.g., in the front of the system), a different PDU may be required. Thus, a PDU configured to receive a power feed at one access point may not be usable when the power feed is to connect to the system at a different point. Further, if the user""s needs change so that it later becomes desirable to alter the system configuration to receive power at the front instead of the rear (or vice versa), the user cannot readily modify the PDU orientation because of its inherent inflexibility.
Therefore, in one embodiment of the invention, a multi-positionable power distribution unit (PDU) is provided for accommodating a power feed at different locations in an enclosure for a computer or other electronic system.
In this embodiment, the PDU includes a set of external connectors for coupling to one or more external power sources, a first internal connector for transferring power to a power consumer (e.g., a power supply, a midplane) when the multi-positionable PDU is installed in a first position, and a second internal connector for transferring power to a power consumer when the multi-positionable PDU is installed in a second position.
The appropriate position or orientation in which to install the PDU may depend upon where the external power source(s) is/are accessible. For example, if the power is accessed through the front of the system, the PDU may be installed in the first position. But if the power is to be accessed through the rear of the system, then the PDU may be installed in the second position.
In one embodiment, a multi-positionable PDU may comprise circuitry for filtering the power and/or providing an indication to the system when the PDU is connected. Other circuitry may be included for management of multiple power feeds (e.g., to enable detection of a feed, monitor feed status or voltage). The PDU may also include a heat sink to provide cooling of internal circuitry.

Multi-positionable power distribution unit


The invention relates to a molded piston, in particular an injection-molded piston (1) of fiber-reinforced plastic, which is seated slidably in a receiving bore (2) of a housing (4) and is embodied as a cup-shaped body with a piston bottom (6) and a sleevelike piston wall (8) protruding away from the bottom, and the face (10) of the piston bottom (6) pointing away from the piston wall (8)is pressure-loadable, and there is at least one injection point (46) oriented with a molding channel of a molding tool.

The invention is based on a molded piston, in particular an injection-molded piston of fiber-reinforced plastic.
One such piston is known from German Patent DE 42 33 896 C2. The known piston is received slidably in a receiving bore of a housing and embodied as a cup-shaped body with a piston bottom and a sleevelike piston wall protruding away from it. Between the face of the piston bottom pointing away from the piston wall and the bottom of the receiving bore, a pressure chamber is formed, which when pressure is exerted on it increases in size, counter to the force of a piston spring that is prestressed counter to the piston.
The known piston is produced by injection molding in an injection-molding tool, which is likewise cup-shaped and on its bottom has an injection-molding channel for pressure-injection of a thermoplastic plastic into a chamber between the inner wall of the tool and a cylindrical core; this interstice, filled with injection-molding material under pressure, is shaped in accordance with the geometry of the piston. In the region of the so-called injection point of the molded piston, that is, opposite the outlet opening of the injection-molding channel, an injection cone forms on the face of the piston bottom on which pressure is exerted in operation, and this injection cone is troublesome in the sense that once the piston has been inserted into the receiving bore of the housing, the injection cone protrudes into the pressure chamber and must therefore be removed, for instance by cutting-type machining, which entails a certain amount of production effort and expense.
From U.S. Pat. No. 5,031,511, a piston of this generic type is known, having a peg formed centrally onto its bottom; the peg protrudes from the face that points away from the pressure-loadable face. A pivotable thrust piece for pressing a brake lining against a brake disk of a disk brake is received on the peg. The bottom of the piston is provided, toward the peg, with a rounded recess of low depth, which extends radially spaced apart from the peg and creates a free space into which the thrust piece can move upon a pivoting motion. U.S. Pat. No. 5,031,511 discloses nothing about the location of the injection point of the piston.
In International Patent Disclosure WO-A 97/18403, FIG. 7, a molded piston is disclosed that has an axially deep encompassing recess, which originates on the face end of the piston that points away from the pressureloadable face. The recess defines a peg, which like the recess and the face end of the piston is enveloped by a sheet-metal part that is indented in the injection molding of the piston. Consequently, an injection point can be located only in the region of the pressure-loadable face or of the piston jacket.
Accordingly, in the invention, the injection point is shifted to the other side, pointing away from the pressure-loadable face on the piston bottom, because in that location, the injection cone is not troublesome. Since from pressure exerted on the pressure chamber the piston bottom is a plate substantially stressed by bending, in operation on the one hand a region subject to compressive stresses develops in a known way, extending from the pressure-loadable face of the piston bottom as far as a neutral fiber in the interior of the piston bottom; on the other, a region subject to tensile stresses develops, which extends from the neutral fiber up to the face of the piston bottom that points away from the pressure-loadable face. If the injection point were not shifted to the face of the piston bottom pointing away from the pressure-loadable face, without any other provisions being made, then the injection point would be located at a point where the tensile stresses are greatest. Since the injection point of an injection-molded part is known to be shot through with bubbles and porosities, however, the strength properties there are critical. Another factor is that in injection-molding materials, as a rule the maximum tensile strength is less than the maximum pressure strength, so that under the high pressures that such a piston can be exposed to in operation, cracks and breaks can occur on the piston bottom.
As a result of at least one recess on its face pointing away from the pressure-loadable face of the piston bottom, the piston bottom has a lesser wall thickness in the region of the injection point than in the regions adjoining it. Since location of the neutral fiber of the entire piston bottom is determined essentially by the radially outer regions, adjoining the middle region of the injection point, the wall region of the piston bottom located on the side of the tensile stress is removed entirely or in part by means of the at least one recess in the region of the injection point. Accordingly, as a result of the recess in the region of the injection point that is critical in terms of strength, the wall region subjected to tensile is reduced in size, so that the remainder is free of tensile stress or predominantly pressure relieved, which has a favorable effect on the strength properties.
In order to avoid the tensile stresses in the piston bottom in the vicinity of the injection point, which are unfavorable in terms of strength, it is proposed in accordance with an especially preferred embodiment that the at least one recess is embodied as deep enough that the piston bottom face pointing away from the pressure-loadable face, extends from the direction of the pressure-loadable face, in the region of the injection point, at most as far as a plane that includes the neutral fiber of the regions of the piston bottom that adjoin the region of the injection point. If there is coplanarity between this plane that includes the neutral fiber and the face of the piston bottom pointing away from the pressure-loadable face, then the tensile stresses in this face are equal to zero, while in the case of relatively deep recesses, this face is subjected solely to pressure.
In the preferred embodiment, the at least one recess is embodied annularly and surrounds a truncated cone or feeder pointing away from the piston bottom and coaxial with the piston axis, on the free end of which truncated cone or feeder the injection point is located. Because of the centrally-disposed truncated cone, the strength-critical porosities are located in a substantially stress-free region. Moreover, this creates an additional volume, which can absorb any microstructural flaws, caused by erroneous injection-molding parameters, in a virtually stress-free region. Alternatively, the at least one recess can be a fully cylindrical recess disposed coaxially with the piston axis.

Abstract: The invention proposes that the injection point (46) is disposed on the other face (22) of the piston bottom (6), that is, the face pointing away from the pressure-loadable face (10), and the piston bottom (6), because of one or more recesses (48) present in this face (22), has a lesser wall thickness in the region of the injection point (46) than in the regions (52) adjoining it.


A neutral poly(ethyl acrylate, methyl methacrylate) copolymer is employed as a carrier in the manufacture of pharmaceutical formulations containing an active ingredient. The formulations are preferably made by melt extrusion, and can have rubbery characteristics and can exhibit tamper resistance.

Multiparticulates of uniform dimensions with modified drug release properties can readily be manufactured by melt extrusion technology. Melt extrusion is a solvent-free single-step process for manufacturing multiparticulates and is particularly useful for drug release modification. By selection of suitable thermoplastic polymers and additives, melt extrusion technology can be used both to enhance the solubility, and subsequently the bioavailability, of poorly water soluble drugs as well as to retard drug release of moderate to highly water soluble drugs for controlled release products.
The backbone of melt extrusion technology is the application of thermoplastic materials which act as binders for embedded drugs in solution or dispersion form within the matrix. Thermoplastic polymers with low glass transition temperatures (Tg) are preferred for processing by melt extrusion. Lower processing temperatures are also preferred with respect to the stability of heat sensitive drugs and other necessary excipients. Polymer glass transition temperatures can also be further reduced to facilitate processing at lower temperature with optional addition of plasticisers.
Illustratively, WO 9614058 provides a sustained-release pharmaceutical formulation, comprising a melt-extruded blend of a therapeutically active agent, one or more materials selected from the group consisting of alkylcelluloses, acrylic and methacrylic acid polymers and copolymers, shellac, zein, hydrogenated castor oil, hydrogenated vegetable oil, and mixtures thereof; and one or more hydrophobic fusible carriers which provide a further retardant effect and are selected from the group consisting of natural or synthetic waxes, fatty acids, fatty alcohols, and mixtures thereof, the fusible carrier having a melting point from 30 to 200° C. The melt-extruded blend is divided into a unit dose containing an effective amount of said therapeutically active agent to render a desired therapeutic effect and providing a sustained-release of said therapeutically active agent for a time period of from about 8 to about 24 hours.
Furthermore, WO 9614058 describes a method of preparing a sustained-release pharmaceutical extrudate suitable for oral administration. The method comprises:
blending a therapeutically active agent together with (1) a material selected from the group consisting of alkylcelluloses, acrylic and methacrylic acid polymers and copolymers, shellac, zein, hydrogenated castor oil, hydrogenated vegetable oil, and mixtures thereof and (2) a fusible carrier selected from the group consisting of natural or synthetic waxes, fatty acids, fatty alcohols, and mixtures thereof; said retardant material having a melting point between 30-200° C. and being included in an amount sufficient to further slow the release of the therapeutically active agent,
heating said blend to a temperature sufficient to soften the mixture sufficiently to extrude the same;
extruding said heated mixture as a strand having a diameter of from 0.1-3 mm;
cooling said strand; and
dividing said strand to form non-spheroidal multi-particulates of said extrudate having a length from 0.1-5 mm; and
dividing said non-spheroidal multi-particulates into unit doses containing an effective amount of said therapeutically active agent, said unit dose providing a sustained-release of said therapeutically active agent for a time period of from about 8 to about 24 hours.
In certain preferred embodiments of WO 9614058, the hydrophobic material is a pharmaceutically acceptable acrylic polymer, including but not limited to acrylic acid and methacrylic acid copolymers, methyl methacrylate, methylmethacrylate copolymers, ethoxyethyl methacrylates, cynaoethyl methacrylate, aminoalkyl methacrylate copolymer, poly(acrylic acid), poly(methacrylic acid), methacrylic acid alkylamine copolymer, poly(methyl methacrylate), poly(methacrylic acid)(anhydride), polymethacrylate, polyacrylamide, poly(methacrylic acid anhydride), and glycidyl methacrylate copolymers. Thus, in many of the Examples, the hydrophobic material is Eudragit RS PO (poly(ethyl acrylate, methyl methacrylate, trimethylammonium methacrylate chloride)), optionally in the presence of Eudragit L100 (poly(methacrylic acid, methyl methacrylate)).


A voice recognition apparatus includes: a first controller configured to acquire a voice signal of a user and acquire a phonebook list including at least one phonebook data piece in which a name and a phone number are matched from a user terminal; and a voice recognition engine to recognize the voice signal based on a voice recognition parameter, wherein the first controller is further configured to determine whether to change the voice recognition parameter value based on the phonebook list and change the voice recognition parameter value based on a determination result.

As technologies for vehicles are being developed, various functions for user convenience are available in addition to driving, which is a basic vehicle function.
Particularly, when a voice recognition technology for recognizing the voice of a user and performing a function corresponding to the voice is applied to the vehicle, the operation load of the user may be effectively reduced.
The vehicle to which the voice recognition technology is applied may perform various functions of an external terminal within the vehicle, such as a function of performing a telephone call of a user terminal within the vehicle through communication with the user terminal.

Voice recognition apparatus, vehicle including the same, and control method thereof


A supply modulator is provided, having a first amplifier circuit configured to generate a first electrical signal, a second amplifier circuit configured to generate a second electrical signal, the first and second electrical signals being for driving an electrical load, and a control circuit electrically coupled to the first and second amplifier circuits wherein the control circuit is configured to generate a pulsed electrical signal and to supply an output control signal to the second amplifier circuit for controlling generation of the second electrical output signal, wherein the supply modulator is configured to operate in two modes of operation, for the first amplifier circuit to generate the first electrical signals in response to quiescent current of the first amplifier circuit, for the control circuit to generate a modulated electrical signal in accordance with a clock signal in one mode, and, for the second amplifier circuit to operate.

Short battery lifespan is one of the challenges of mobile communication devices and is exacerbated with the demand for ever-increasing speed and data. This is in part due to the adopted communication protocols, e.g., LTE (Long-Term Evolution) and LTE-A (LTE Advanced), that employ spectrally efficient modulation schemes such as 16 or higher Quadrature Amplitude Modulation. These modulation schemes impose stringent requirements on the linearity of the Radio Frequency (RF) Power Amplifier (PA), yet requiring high Peak-to-Average-Power-Ratio-translating to low power-efficiency in known RF PAs, hence reduced battery-life.
Of the various known methods to improve the power-efficiency of RF PAs, the Envelope Tracking (ET), comprising a supply modulator and RF PA(s), as depicted in FIG. 1A, has been reported to be one of the most effective means. This is because ET PAs generally feature higher power-efficiency, yet with relatively wide signal bandwidth and good linearity. FIG. 1A shows a block diagram of a prior art ET PA (Envelope Tracking Power Amplifier) 180 having a hybrid supply modulator 181 and a RF PA (Radio Frequency Power Amplifier) 182. The hybrid supply modulator 181 includes a linear Class AB amplifier 183, a high-efficiency Class D amplifier 184 and a controller 185 which controls the switching of the Class D amplifier 184.
Hybrid supply modulators (e.g., 181; FIG. 1A), comprising a high-efficiency Class D amplifier and a wide-bandwidth Class AB amplifier, is commonly employed for ET PAs (see Table 2 later). The supply modulator provides a variable voltage supply, vDD_PA, to the linear RF PA based on the RF output, RFout; in the case of known RF PAs, the supply is a constant voltage. Consequently, as desired, the RF PA in the ET PA would nearly always operate in compression, hence featuring higher power-efficiency compared to known RF PAs. The operational modality of an ET PA and a known RF PA is depicted in FIG. 1B, where the power-efficiency of the ET PA is typically ˜20% higher.
Despite the power-efficiency advantage of ET PAs, one limitation of known supply modulators is that they are optimised for a single communications standard, e.g., LTE, or the optimisation is compromised when designed for multiple standards. Put simply, as modern communication devices, including smartphones and tablets, usually embody multiple communication standards where each standard requires different bandwidth, peak-to-average power ratio (PAPR), output power, etc. (see Table 1 further below), known supply modulators are often unoptimised or semi-optimised. For example, FIG. 2 depicts the block diagram of a known RF system 280 having a supply modulator 281. Of specific interest, although multiple RF PAs 282 are included in the RF system 280 to support multiple communication standards, only one supply modulator 281 is used. This is largely because of the limited form-factor (IC area) and the high cost.
Other limitations in known supply modulators include narrow (and insufficient) bandwidth, low (and insufficient) output power, low power-efficiency, and/or high switching noise (see Table 2 further below). Specifically, the major shortcoming of known supply modulators is their limited bandwidth of ≤20 MHz, which is insufficient for LTE-A applications whose bandwidth is 40 MHz-100 MHz. Known designs also have low output power of <0.2 W. This low output power is, however, generally unacceptable for the recent communication protocols including LTE and LTE-A. The typical output power of a LTE/LTE-A RF PA is ˜27 dBm (0.5 W) taking into account the duplexer and antenna losses. Hence, the output power of the supply modulator would need to be >1 W for the III/V-based RF PA (with ˜45% power-efficiency) and >2 W for CMOS-based RF PA (with ˜25% power-efficiency). The aforesaid limitations are in part due to the inevitable trade-offs between the parameters of the supply modulator. For instance, narrow bandwidth and low switching noise usually require high switching frequency which in turn leads to high switching loss, hence reducing the power-efficiency of the supply modulator.
There is therefore need for a supply modulator that addresses one or more of the above-mentioned issues of the prior art.

Supply modulator, power amplifier having the same, method for controlling the same, and method for controlling the power amplifier


Apparatus is provided for delivering a controllable, variable flow of pressurized fluid. Conduits define a circulating fluid flow system, the flow system passing through a transducer for transferring energy as a mechanical input or output to or from pressurized fluid circulating in the system. At least first and second volumetric pumps are connected to conduits of the flow system in parallel relation to each other and in flow communication with the transducer. An operating shaft, preferably a single shaft, engages the first and second pumps. Valves and piping are provided for selectively shunting and isolating the first and second pumps from the fluid flow system. Thus, energy applied to the fluid flow system through either the shaft or transducer may be applied to the other of the shaft or transducer with variable pressure and flow velocity in the flow system, depending on whether one or both of the pumps are in operating mode with the flow system.

The invention of this application is an apparatus for delivering a controllable, variable flow of pressurized fluid, and may be used in wide variety of environments where such an apparatus is desired. For example, the apparatus of this invention may be used as a transmission for vehicles or any other device where energy from an energy source is to be converted to either a higher power or a higher velocity form of energy.
For use as a transmission, the apparatus of this invention can operate entirely without gears, being typically entirely hydraulic or pneumatic in its operation, but for the preferred use of gear pumps. As an advantage of the apparatus, it can be designed to pass through a series of pumping states that are equivalent to a large number of separate gear settings, for example 13 or more gear settings with very simple equipment which is of relatively low cost.
Thus, the apparatus of this invention may serve as a simplified replacement for complex transmissions and for other uses in vehicles and elsewhere.

Apparatus for delivering a controllable variable flow of pressurized fluid


A clear aqueous emulsion of a complex comprising a moiety having a hydrophilic core to which is covalently bound the backbone of at least one monounsaturated C16-C20 fatty acid and appropriate surfactants is effective in controlling agricultural pests, including nematodes.

The negative impact of infestation by pests on agricultural production is well-known. Damage worldwide due to nematode infestation alone is estimated at $78 billion per year. Other sources of infestation include bacterial, fungal, and insect pathogens. Assault on these infestations has taken the form of use of synthetic pesticides derived from petroleum, use of natural predators, and use of compounds derived from natural sources, such a pyrethrins. No completely satisfactory pesticide which is specific, effective, and not harmful to the environment has been found. Thus, there is a considerable need for finding improved pesticides.
With regard to previous compositions related to those of the present invention, the effect of fatty acids on a particular species of plant nematodes (Meloidogyne javanica) has been described by-Sitaramaiah, K., et al., Indian J. Nematol. (1977) 7:58-65. Formic, acetic, propionic and butyric acids were tested. The effect of a collagenolytic/proteolytic enzyme secreted from Bacillus cereus after induction by collagen on this plant nematode species has also been reported by Sela, S., et al., Eur. J. Plant Pathol. (1998)104:59-67. The enzyme was effective to digest collagen from cuticles of second stage juveniles. U.S. Pat. No. 5,698,592 describes compositions for the control of plant infective nematodes using fatty acid compounds which compositions are microemulsions containing C8-C14 fatty acid esters. The esters were prepared synthetically and the nature of the microemulsions is not described.
Fatty acid or oil compositions have also been described for other purposes, including the use of a vegetable oil/mineral salt broth fermented by yeast as an emulsifier in the food industry, as described in U.S. Pat. No. 4,810,507; the use of a mixture of an oleate derivative, a lower alkanol, and an inert diluent as a pharmaceutical penetration agent, as described in U.S. Pat. No. 4,863,970; and the use of a solution of oleic acid, acetone, and ammonium hydroxide in water as a treatment for athlete's foot, as described in U.S. Pat. No. 4,172,888. Unsaturated lipid compounds containing polar head groups, including oleates, are described as cell-envelope disordering compounds.
The use of microbial infection to control nematode infestation in plants was described in U.S. Pat. No. 5,264,210. PCT Application WO98/59036 describes compositions for the control of nematode infestation using metabolites from fungi. In some cases, the fungi are cultured in media which include vegetable oil and the compositions may include surfactants.
U.S. Pat. Nos. 5,674,897; 5,698,592; and 6,124,359, all assigned to Mycogen describe microemulsions containing fatty acid esters for use as nematocides. These fatty acid esters are of C8-C14 fatty acids and they do not appear to include glyceride esters. Various other patents disclose the use of alkoxylated materials and other emulsifiers for use in pesticides or herbicides intended for application to plants. These include U.S. Pat. Nos. 4,975,110 and 5,098,467 to Safer; U.S. Pat. No. 5,827,522 to Troy and U.S. Pat. No. 6,093,681 to Monsanto. In addition, U.S. Pat. No. 5,362,707 assigned to Rhone Poulenc describes the use of "suspoemulsions" as vehicles to apply pesticides with solid active ingredients (having melting points >45° C.) to plants.
It has not heretofore been appreciated that complexes containing a hydrophilic core, at least one monounsaturated fatty acid backbone, surfactants, and including a polyalkoxylene, (such as compositions containing a denatured lipase with long chain fatty acids or their derivatives) prepared in the form of a clear microemulsion are particularly effective in controlling pests in agricultural settings.
In addition, the formulation of agents employed for dispersal and penetration of active ingredients is useful as a carrier for plant nutrients, pesticides in general, herbicides, and other materials suitable for application to plants and is also useful as a topical drug delivery system.
A wide variety of carriers for active ingredients has been devised in both the pharmaceutical and agricultural arts. For example, drug delivery systems have included various forms of liposomes, various polymeric slow-release compositions, detergents which aid in penetration, and other excipients that affect the behavior of small molecules or proteins or other biological molecules that are considered to be the active ingredients. The formulation of the present invention, originally developed as a carrier for nematocides, has been found useful as a delivery system for pesticides in general, for plant nutrients, and for topical application of drugs as well. The carrier of the present invention is particularly effective in dispersing active ingredients over a wide area and in effecting penetration of these active ingredients through cell walls and membranes and is thus useful both in agricultural and pharmaceutical contexts.

Pesticide microemulsions and dispersant/penetrant formulations


A .gamma.-ray detector that comprises a dislocation-free single crystal. Typical crystals include silicon and germanium, for example. The crystal is surrounded by an active shield that functions as an anticoincidence counter and a .gamma.-ray detector is disposed adjacent the crystal in order to detect received -65 -rays. The .gamma.-ray detector comprises an imaging proportional counter, scintillation counter, or a .gamma.-ray detecting charge coupled device, for example. The .gamma.-ray detector of the present invention is based on the Bormann effect, which is the anomalous transmission of .gamma.-rays through dislocation free single crystals at the Bragg angle. For extended sources, data processing is provided to separate the directional and wavelength dependence of the intensity variation. The .gamma.-ray detector has angular resolution of at least one arc second and may have an effective aperture of several square meters. Reduction in background radiation, which is essentially determined by the crystal thickness, may be made quite large, greater than 10.sup.12. Consequently, the use of the present invention makes it possible to detect a weak .gamma.-ray source even in the presence of a large isotropic background.

The present invention relates to devices for observing and mapping .gamma.-ray emitting objects, and more particularly to a .gamma.-ray detecting device which utilizes a dislocation-free crystal.
The existence of .gamma.-ray astronomical objects is a relatively recent discovery in scientific history. This is primarily due to the high absorption rate of .gamma.-rays by the atmosphere, whereby detection of such .gamma.-ray emitting sources can only be performed from high altitude observatories such as balloon or satellite-borne telescopes. Gamma ray telescopes have been developed to study these celestial .gamma.-ray emitting sources. One of the more interesting regions in the .gamma.-ray spectrum for celestial bodies is in the region of 511 keV. However, at this energy level, the short wavelength of the .gamma.-rays render grazing-incidence .gamma.-ray telescopes substantially ineffective, the upper energy level for such instruments being typically on the order of 40 keV. Coded aperture telescopes can extend the observation region to much higher energies, on the order of 1000 keV. However, no conventional high resolution .gamma.-ray telescopes exist that are suitable for studying .gamma.-rays in the higher intensity, short wavelength regions.
.gamma.-rays have also been used to examine the internal structure or contents of an object. Such examination is generally effective only when a significant spatial variation in the density of the object exists. This limitation is in part a result of (1) the ability of .gamma.-rays to penetrate materials and (2) limitations on the ability to distinguish between target emitted .gamma.-rays and background radiation.
Therefore, there has been a need in the art for an .gamma.-ray detector capable of detecting and resolving high energy .gamma.-rays up to 10-20 MeV. There has also been a need for an .gamma.-ray imaging system that is capable of examining the structure or contents of an object in a reliable manner.

.gamma.-ray detecting device using dislocation-free crystal


A system for treating uterine atony, and promoting contraction of a uterus includes a heat transference article having a chilled surface in contact with an inner or outer surface of the uterus for a length of time sufficient to promote contraction while avoiding tissue damage. A heat transference medium such as a chilled saline solution, or cold gel is introduced to the article by injection, pre-filling, immersion or other suitable means, and is circulating or non-circulating.

Uterine atony is a failure of the uterine muscles to contract following delivery, whether by normal vaginal delivery or caesarean section, and represents the most common cause of postpartum hemorrhage (PPH). Currently, there are 130 million deliveries a year, worldwide and 4 million a year in the United States. 33% of the delivers in the U.S. occur via a caesarean section. Currently, approximately 960 maternal deaths occur per year in the United States with 25% of maternal death due to hemorrhage. Presently, treatment for PPH is substantially pharmaceutical in nature, and includes, the administration of oxytocin (Pitocin, Syntocinon), ergot derivatives such as Ergometrine and Methergine, and Carboprost (Hemabate), and various synthetic prostaglandins such as Misoprostol. While pharmacologic treatments for uterine atony do work well in many cases, there are still disadvantages. Patients can have a contraindication to a standard pharmacologic agent. For example, ergot derivatives are contraindicated in hypertensive patients. Other medications are not recommended for patients with asthma. Pitocin has been shown to cause cardiac collapse, hypotension, chest pain and headaches.
More recently, as an adjunct to pharmacologic agents, bladder tamponades such as the Bakri catheter have gained acceptance in clinical settings. Typically, such balloons are expandable by means of a saline injection into the body of the bladder. While a laudable addition to available treatments, efficacy for bladder tamponades of this type is not well established. Accordingly, it would be desirable to provide a non-pharmacological solution that can be used alone or in combination with other pharmacological and non-pharmacological modalities to control uterine atony and thereby control or prevent bleeding after a cesarean section or other procedure.

Systems and methods for treating uterine atony


A semiconductor device includes first, second, and third wells. The first well is connected to a pad to which an external pin is connected and includes a first-type diffusion region that receives a well bias voltage. The second well is adjacent to the first well, and includes an insulating region and a second-type diffusion region outside the insulating region. The third well is adjacent to the second well and includes a first-type diffusion region that receives a first voltage. The insulating region inside the second well along with the first-type well diffusion region of the first well constitute a bipolar junction transistor that cuts off current flowing from the first well to the third well.

This application claims the priority of Korean Patent Application No. 2003-28176, filed on May 2, 2003, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Technical Field
The present disclosure relates to semiconductor devices, and more particularly, to semiconductor devices capable of preventing current flow caused by latch-up.
2. Discussion of Related Art
To perform a current test, a high voltage is applied to a bonding pad of a semiconductor device, which causes a current to flow in the semiconductor device. As such, defects occur in the semiconductor device, and the semiconductor device cannot operate properly.
FIG. 1 is a cross-sectional view of a layout of a conventional semiconductor device. FIG. 2 is a plane view of the semiconductor device of FIG. 1.
Referring to FIGS. 1 and 2, a P-type diffusion region 110 and an N-type diffusion region 120 are located in a first N-well NW1, and a P-type diffusion region 130 is located in an adjacent P-well PW. An N-type diffusion region 140 is located in a second N-well NW2 adjacent to the P-well PW.
A pad P1 is connected to the P-type diffusion region 110 of the first N-well NW1. A power supply voltage VDD is connected to the N-type diffusion region 120 of the first N-well NW1, and a ground voltage VSS is connected to the P-type diffusion region 130 of the P-well PW and the N-type diffusion region 140 of the second N-well NW2.
The P-type diffusion region 110 and the N-type diffusion region 120 of the first N-well NW1 and the P-type diffusion region 130 of the P-well PW, respectively, constitute an emitter, a base, and a collector of a first bipolar junction transistor (BJT) Q1. The N-type diffusion region 120 of the first N-well NW1, the P-type diffusion region 130 of the P-well PW, and the N-type diffusion region 140 of the second N-well NW2, respectively, constitute a collector, a base, and an emitter of a second bipolar junction transistor (BJT) Q2.
The first BJT Q1 is a PNP-type transistor, and the second BJT Q2 is an NPN-type transistor. Rn and Rnw represent the loads of the base and the emitter of the first BJT Q1 respectively. Rpw represents the load of the emitter of the second BJT Q2.
When a backward voltage is applied between the N-type diffusion region 120 (base B) of the first N-well NW1 and the P-type diffusion region 130 (collector C) of the P-well PW of the first BJT Q1, respectively, and then a forward voltage is applied between the P-type diffusion region 110 (emitter A) of the first N-well NW1 and the N-type diffusion region 120 (base B) of the first N-well NW1, the first BJT Q1 is activated, and a current IC1 flows through the first BJT Q1.
When performing a current test, a high voltage, i.e., a voltage higher than a voltage obtained by adding a turn-on voltage of a PN junction to the power supply voltage VDD, is applied to the pad P1, and thus the first BJT Q1 is activated.
When a backward voltage is applied between the N-type diffusion region 120 (collector B) of the first N-well NW1 and the P-type diffusion region 130 (base C) of the P-well PW of the second BJT Q2, and then a forward voltage is applied between the P-type diffusion region 130 (base C) of the P-well PW and the N-type diffusion region 140 (emitter D) of the second N-well NW2, the second BJT Q2 is activated.
When the voltage difference between the P-type diffusion region 130 (base C) of the P-well PW and the N-type diffusion region 140 (emitter D) of the second N-well NW2 of the second BJT Q2 is greater than the turn-on voltage, due to a resistor Rp, a forward voltage is applied between the P-type diffusion region 130 (base C) of the P-well PW and the N-type diffusion region 140 (emitter D) of the second N-well NW2, the second BJT Q2 is activated, and a current IC2 flows through the second BJT Q2.
Accordingly, a current path is formed between the P-type diffusion region 110 of the first N-well NW1 and the N-type diffusion region 140 of the second N-well NW2, and a current flows along the current path. This phenomenon is referred to as latch-up and causes defects in semiconductor devices.

Semiconductor device capable of preventing current flow caused by latch-up and method of forming the same


In a method for controlling a parallelism between a probe card having a number of probe pins and a mounting table, first, among the probe pins, one or more probe pins corresponding to each of plural distinct locations on an X-Y coordinate system whose origin lies at a probe center are selected. Then, a tip of each of the selected probe pins is detected to obtain position coordinates (X,Y,Z) thereof. Thereafter, a specific point on each of connection lines connecting tips of neighboring selected probe pins is selected and their position coordinates on the connection lines are calculated, wherein the position coordinates of the specific points are set as position coordinates (X,Y,Z) of tips of imaginary probe pins. Subsequently, the parallelism between the probe card and the mounting table based on the position coordinates (X,Y,Z) of the tips of the imaginary probe pins is adjusted.

A conventional probe apparatus includes a loader chamber for transferring a target object (e.g., a wafer) and a prober chamber for inspecting electrical characteristics of the wafer transferred thereto from the loader chamber. As illustrated in FIG. 9, the prober chamber includes: a mounting table (wafer chuck) 1 for mounting a target object (wafer) W thereon and being movable in X, Y and Z directions; a probe card 2 disposed to be located above the wafer chuck 1 and provided with a number of probe pins 2A; a card clamp mechanism 4 detachably fastening the probe card 2 via a card holder 3; an insert ring 5 supporting the probe card 2 via the card clamp mechanism 4; a head plate 6 supporting the insert ring 5; a docking mechanism 7 for electrically connecting the probe card 2 to a connection ring R of a test head T; and a test head clamp mechanism 8 fastening the test head T on the head plate 6. The test head T connected to the probe card 2 via the docking mechanism 7 is configured to be rotated via a hinge H provided on a side portion of the probe apparatus.
Recently, with the development of the probe card 2, there is a strong demand for a whole contact type inspection apparatus allowing a whole contact between the probe card 2 and the wafer W at a time. In the whole contact type inspection apparatus, parallelism between the probe card 2 and the wafer W is a very important factor for determining reliability of inspection. That is, if the parallelism between the probe card 2 and the wafer W is poor, the probe pins 2A of the probe card 2 cannot make a contact with the wafer W under a proper and uniform needle pressure, resulting in deterioration of inspection reliability. Moreover, the poor parallelism between the probe card 2 and the wafer W can sometimes cause damages to the probe card 2 or the wafer W.
For the reasons, various techniques for controlling parallelism between a probe card and a wafer have been proposed, and some of those techniques are disclosed in References 1 to 4.
In Reference 1 (Japanese Patent Laid-open Application No. H06-021166), a piezoelectric device is inserted into a chuck top, and a top end stage of the chuck top is slanted. Further, a DUT (Device Under Test) board having a probe card thereon is made to be slanted by using the piezoelectric device or an actuator (a rotary screw or the like). The slope of the probe card is detected by employing a non-contact type method, for example, by irradiating laser beams to the probe card. When using laser, the slope of the probe card is detected by irradiating laser beams to the peripheral portion of the probe card and detecting the heights thereof at more than two points thereon.
Further, the technique disclosed in Reference 2 (Japanese Patent Laid-open Application No. H11-251379) includes: an XY-direction driving unit for moving a wafer stage in X-direction and Y-direction; a Z-direction driving unit for moving the wafer stage in Z-direction; and a slope control unit disposed between the XY-direction driving unit and the Z-direction driving unit, for controlling a slope of the wafer stage with respect to a horizontal plane. When controlling the slope of the wafer stage, tip heights of four probe needles located on four corners of a probe card is detected by using a self-focusing camera, and the slope of the probe card with respect to the wafer stage is calculated based on differences between the detected tip heights.
Disclosed in Reference 3 (Japanese Patent Laid-open Application No. H07-231018) is an invention including: a contact-type displacement sensor for detecting tip heights of probe needles at plural locations on a probe card; a detection circuit for detecting a voltage variation of the displacement sensor; a control system for calculating slopes and slope directions of tip heights of the probe needle group based on the detection result from the detection circuit and outputting an instruction for correction; and a slope correction unit supporting an insert ring at three points and serving to correct the slopes of the tip heights of the probe needles by varying the supporting heights of the insert ring at the three points of the insert ring individually. In this configuration, after detecting tip heights of the probe needles at the plural locations (e.g., four locations in left-and-right and back-and-forth directions) on the probe card, slopes and slope directions of the tip heights of the probe needle group are calculated by using calculation software stored in a control system in advance. Further, in addition to the slopes of the probe needles, the slope of a wafer can also be measured, in which case the slope correction can be performed based on the two data. Moreover, Reference 4 (Japanese Patent Laid-open Application No. H08-162509) also discloses a technique for adjusting the slope of a wafer chuck, which is similar to the method described in Reference 3.
Though References 1 to 4 disclose various methods for adjusting a parallelism between a probe card and a wafer stage, those methods are all directed to measuring tip heights of a probe card or heights of the probe card at plural points thereof, calculating a slope of the probe card based on the measurements; modifying the slope of one of the probe card and the wafer stage to be made identical with the slope of the other, to thereby adjust the parallelism therebetween. However, any of those techniques in References 1 to 4 does not clearly disclose any specific method for adjusting the parallelism between the probe card and the wafer stage, and if any, the method requires a high level of skills or takes up much time.

Method for controlling parallelism between probe card and mounting table, storage medium storing inspection program, and inspection apparatus


When data is exchanged between a pair of LANs (3, 5) via a pair of route hubs (RH4, RH6), one of the route hubs (RH4) sends an address assignment frame to a first LAN (3) in a clockwise direction, assigns an address to each route hub (RH) and each node terminal (N), based on an address value, sequentially from the route hub (RH1) to route hub (RH4), and sends the address assignment frame, which has been returned, to the other route hub (RH6) of the pair. The other route hub (RH6) assigns the address to itself based on the address value contained in the received address assignment frame, sends the address assignment frame to a second LAN (5) in the clockwise direction, assigns the address to each route hub (RH) and each node terminal (N), based on the address value, sequentially from the route hub (RH7), and returns the address assignment frame, which has been returned, to the route hub (RH4). Thus, addresses are automatically assigned to each route hub (RH) and node terminal (N). Upon receiving communication data to be sent to a destination, each of the pair of route hubs (RH4, RH6) selects a route via which the communication data is to be sent, and for sending the communication data to the destination via the selected route.

1. Field of the Invention
The present invention relates to a communication method for exchanging data between node terminals, between routers, and between a node terminal and a router, for use in a communication system composed of a pair of networks which are connected by data transmission lines via a gateway and each of which has a plurality of routers each having one or more node terminals. In particular, the present invention relates to a communication method, a communication system, and a gateway used in the communication system that automatically assign addresses to routers and node terminals to reliably send communication data to destinations while significantly increasing the per-unit-time transmission amount.
2. Description of the Related Art
Conventionally, a communication system, such as the one disclosed in Japanese Patent Laid-Open Publication No. Sho 59-62245, is known in which LANs (Local Area Network), each of which allows a plurality of stations to exchange data, are connected via a gateway for data exchange between a pair of LANs.
In the technology disclosed in the above publication, a sender/receiver address specifying the data sender and receiver, as well as the station address indicating the station to or from which data is sent or received and the network address indicating the network to which the station belongs, is added to communication data. During data communication, this address is referenced to reliably send data between LANs even when data is transferred across networks.
However, because there are many types of addresses that are added to communication data used in the conventional communication system described above, a relatively large data description area must be reserved for the address description area within the data communication data. The need to reserve a large data description area prevents per-unit-time data transmission amount from increasing, offering a problem that must be solved.
The communication method, the communication system, and the gateway used in the communication system disclosed in Japanese Patent Laid-Open Publication No. Hei 10-294751 are known as a solution to this problem. The method disclosed in this publication is used in a communication system composed of a pair of networks which are connected by data transmission lines via a gateway and each of which has a plurality of routers each having one or more node terminals. When data is exchanged between node terminals, between routers, and between a node terminal and a router, the router writes the source/destination addresses in the address description area in the communication data in advance and then sends the communication data, in which the source/destination addresses are described, to the destination.
On the other hand, the gateway decodes the source/destination addresses included in the received communication data, checks if the destination and the source are in the same network based on the decoded source/destination addresses and the previously-stored network identification data, selects an appropriate route for the destination of the communication data based on the network identification checking, and then sends the communication data to the destination via the selected route.
Therefore, by simply storing the source/destination addresses in a small address description area provided in the communication data, this method significantly increases the per-unit-time data transmission amount and, at the same time, reliably sends communication data.
However, although the communication method, the communication system, and the gateway used in the communication system disclosed in Japanese Patent Laid-Open Publication No. Hei 10-294751 are used to exchange data between a pair of networks configured in the shape of the numeral 8, no method is disclosed for automatically assigning addresses to the routers and node terminals belonging to each network of the pair.
It is an object of the present invention to provide a communication method, a communication system, and a gateway used in the communication system that can automatically assign addresses to routers and node terminals, check, with the use of the assigned addresses, which network the communication data is to be addressed to, and reliably send the communication data to the destination while significantly increasing the per-unit-time data transmission amount.
To achieve the above object, there is provided a communication method for exchanging data between node terminals, between routers, or between a node terminal and a router using a communication system composed of a pair of networks each comprising a plurality of routers each having one or more the node terminals, the plurality of routers being connected via a first data transmission line, the pair of networks being connected via a pair of routers belonging to the pair of networks respectively and a second data transmission line connecting the pair of routers, the communication method comprising the steps of: causing one of the pair of routers to send into one direction an address assignment frame containing an address value to one of the pair of networks, to assign an address to each router and each node terminal, based on the address value, sequentially from the router, which is nearest to the one of pairs of routers, to the one of pairs of routers itself, and to send the address assignment frame, which has been returned, to the other router of the pair of routers; and causing the other router of the pair of routers to assign the address to itself based on the address value contained in the received address assignment frame, to send the address assignment frame to the other network into the one direction, to assign the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the other router, and to return the address assignment frame, which has been returned, to the one of the pair of routers.
According to this invention, one of the pair of routers sends into one direction an address assignment frame containing an address value to one of the pair of networks, assigns an address to each router and each node terminal, based on the address value, sequentially from the router, which is nearest to the one of pairs of routers, to the one of pairs of routers itself, and sends the address assignment frame, which has been returned, to the other router of the pair of routers. The other router of the pair of routers assigns the address to itself based on the address value contained in the received address assignment frame, sends the address assignment frame to the other network into the one direction, assigns the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the other router, and returns the address assignment frame, which has been returned, to the one of the pair of routers. Therefore, addresses may be assigned automatically to the routers and the node terminals belonging to the pair of networks.
In a preferred embodiment of the present invention, each of the routers adds at least a destination address to communication data to be sent and sends the communication data containing the destination address to a destination, and each of the pair of routers checks, based on the destination address contained in received communication data and the address assigned to itself, if the destination is included in the network to which the router itself belongs, selects, based on a result of the checking, a route via which the communication data is to be sent, and sends the communication data to the destination via the selected route.
In this mode, each of the routers adds at least a destination address to communication data to be sent and sends the communication data containing the destination address to a destination, and each of the pair of routers checks, based on the destination address contained in received communication data and the address assigned to itself, if the destination is included in the network to which the router itself belongs, selects, based on a result of the checking, a route via which the communication data is to be sent, and sends the communication data to the destination via the selected route. Therefore, communication data may be sent reliably to the destination while significantly increasing the per-unit-time data transmission amount.
In a preferred embodiment of the present invention, when assigning the address to each of the routers and the node terminals, each of the pair of routers increments or decrements the address.
In this mode, because each of the pair of routers increments or decrements the address when assigning the address to each router and each node terminal, it is easily determined which network the destination belongs to by comparing the destination address with the address of the router itself.
To achieve the above object, there is provided a communication system which is composed of a pair of networks each comprising a plurality of routers each having one or more node terminals and in which data is exchanged between the node terminals, between the routers, or between a node terminal and a router, the plurality of routers being connected via a first data transmission line, the pair of networks being connected via a pair of routers belonging to the pair of networks respectively and a second data transmission line connecting the pair of routers, wherein one of the pair of routers has first address assignment means for sending into one direction an address assignment frame containing an address value to one of the pair of networks, for assigning an address to each router and each node terminal, based on the address value, sequentially from the router, which is nearest to the one of pairs of routers, to the one of pairs of routers itself, and for sending the address assignment frame, which has been returned, to the other router of the pair of routers; and wherein the other router of the pair of routers has second address assignment means for assigning the address to itself based on the address value contained in the received address assignment frame, for sending the address assignment frame to the other network into the one direction, for assigning the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the other router, and for returning the address assignment frame, which has been returned, to the one of the pair of routers.
According to this invention, the first address assignment means provided by one of the pair of routers sends into one direction an address assignment frame containing an address value to one of the pair of networks, assigns an address to each router and each node terminal, based on the address value, sequentially from the router, which is nearest to the one of pairs of routers, to the one of pairs of routers itself, and sends the address assignment frame, which has been returned, to the other router of the pair of routers. The second address assignment means provided by the other router of the pair of routers assigns the address to itself based on the address value contained in the received address assignment frame, sends the address assignment frame to the other network into the one direction, assigns the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the other router, and returns the address assignment frame, which has been returned, to the one of the pair of routers. Therefore, addresses may be assigned automatically to the routers and the node terminals belonging to the pair of networks.
In a preferred embodiment of the present invention, each of the routers has sending means for adding at least a destination address to communication data to be sent and for sending the communication data containing the destination address to a destination, and each of the pair of routers comprises: checking means for checking, based on the destination address contained in received communication data and its own address stored in the storing means, if the destination is included in the network to which the router itself belongs; and route selection means for selecting, based on a result of the checking, a route via which the communication data is to be sent and for sending the communication data to the destination via the selected route.
In this mode, the sending means provided by each of the routers adds at least a destination address to communication data to be sent and sends the communication data containing the destination address to a destination. In each of the pair of routers, the checking means checks, based on the destination address contained in received communication data and its own address stored in the storing means, if the destination is included in the network to which the router itself belongs, and the route selection means selects, based on a result of the checking, a route via- which the communication data is to be sent and sends the communication data to the destination via the selected route. Therefore, communication data may be sent reliably to the destination while significantly increasing the per-unit-time data transmission amount.
In a preferred embodiment of the present invention, when assigning the address to each of the routers and the node terminals, each of the pair of routers increments or decrements the address.
In this mode, because each of the pair of routers increments or decrements the address when assigning the address to each router and each node terminal, it is easily determined which network the destination belongs to by comparing the destination address with the address of the router itself.
To achieve the above object, there is provided a communication method for exchanging data between node terminals, between routers, or between a node terminal and a router using a communication system composed of a pair of networks each comprising a plurality of routers each having one or more the node terminals, the plurality of routers being connected via a data transmission line, the pair of networks being connected via a gateway, the communication method comprising the steps, by the gateway, of sending into one direction an address assignment frame containing an address value to one of the pair of networks; assigning an address to each router, each node terminal, and the gateway itself, based on the address value, sequentially from the router, which is nearest to the gateway, to the gateway itself; sending the address assignment frame to the other route network into the one direction; and assigning the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the gateway.
According to this invention, the gateway sends into one direction an address assignment frame containing an address value to one of the pair of networks, assigns an address to each router, each node terminal, and the gateway itself, based on the address value, sequentially from the router, which is nearest to the gateway, to the gateway itself, sends the address assignment frame to the other route network into the one direction, and assigns the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the gateway. Therefore, addresses may be assigned to the routers and the node terminals, belonging to the pair of networks, automatically and more speedily.
In a preferred embodiment of the present invention, each of the routers adds at least a destination address to communication data to be sent and sends the communication data containing the destination address to a destination, and the gateway checks, based on the destination address contained in received communication data and the address assigned to the gateway itself, which network the destination belongs to, selects, based on a result of the checking, a route via which the communication data is to be sent, and sends the communication data to the destination via the selected route.
In this mode, each of the routers adds at least a destination address to communication data to be sent and sends the communication data containing the destination address to a destination. The gateway checks, based on the destination address contained in received communication data and the address assigned to the gateway itself, which network the destination belongs to, selects, based on a result of the checking, a route via which the communication data is to be sent, and sends the communication data to the destination via the selected route. Therefore, communication data may be sent reliably to the destination while significantly increasing the per-unit-time data transmission amount.
In a preferred embodiment of the present invention, when assigning the address to each of the routers, each of the node terminals, and the gateway, the gateway increments or decrements the address.
In this mode, because the gateway increments or decrements the address when assigning the address to each router, each node terminal, and to the gateway, it is easily determined which network the destination belongs to by comparing the destination address with the address of the gateway itself.
To achieve the above object, there is provided a communication system which is composed of a pair of networks each comprising a plurality of routers each having one or more node terminals and in which data is exchanged between the node terminals, between the routers, or between a node terminal and a router, the plurality of routers being connected via a data transmission line, the pair of networks being connected via a gateway, wherein the gateway has address assignment means for sending into one direction an address assignment frame containing an address value to one of the pair of networks, for assigning an address to each router, each node terminal, and the gateway itself, based on the address value, sequentially from the router, which is nearest to the gateway, to the gateway itself, for sending the address assignment frame to the other network into the one direction, and for assigning the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the gateway.
According to this invention, the address assignment means provided by the gateway sends into one direction an address assignment frame containing an address value to one of the pair of networks, assigns an address to each router, each node terminal, and the gateway itself, based on the address value, sequentially from the router, which is nearest to the gateway, to the gateway itself, sends the address assignment frame to the other network into the one direction, and assigns the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the gateway. Therefore, addresses may be assigned to the routers and the node terminals, belonging to the pair of networks, automatically and more speedily.
To achieve the above object, there is provided a gateway for use in a communication system in which a pair of networks, each comprising a plurality of routers each having one or more the node terminals, are connected so that data may be exchanged between the node terminals, between the routers, or between a node terminal and a router, the plurality of routers being connected via a data transmission line, the gateway comprising: address assignment means for sending into one direction an address assignment frame containing an address value to one of the pair of networks, for assigning an address to each router, each node terminal, and the gateway itself, based on the address value, sequentially from the router, which is nearest to the gateway, to the gateway itself, for sending the address assignment frame to the other network into the one direction, and for assigning the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the gateway; storing means for storing its own address assigned by the address assignment means; checking means for checking, based on the destination address contained in received communication data and its the own address stored in the storing means, which network the destination belongs to; and route selection means for selecting, based on a result of the checking, a route via which the communication data is to be sent, and for sending the communication data to the destination via the selected route.
According to this invention, the address assignment means sends into one direction an address assignment frame containing an address value to one of the pair of networks, and assigns an address to each router, each node terminal, and the gateway itself, based on the address value, sequentially from the router, which is nearest to the gateway, to the gateway itself. Then the address assignment means sends the address assignment frame to the other network into the one direction, and assigns the address to each router and each node terminal, based on the address value, sequentially from the router which is nearest to the gateway. The checking means checks, based on the destination address contained in received communication data and its the own address stored in the storing means, which network the destination belongs to. The route selection means selects, based on a result of the checking, a route via which the communication data is to be sent, and sends the communication data to the destination via the selected route. Therefore, addresses may be assigned to the routers and the node terminals, belonging to the pair of networks, automatically and more speedily. In addition, communication data may be sent reliably to the destination while significantly increasing the per-unit-time data transmission amount.

Communication method, communication system, and gateway used for the communication system