In one embodiment, a method dynamically configures a BL bandwidth in a conference based on bandwidth capabilities in the video conferencing network. In one embodiment, the conference may include any combination of endpoints characterized as BL endpoints and SVCL endpoints. The method includes determining one or more bandwidth capabilities for a plurality of endpoints participating in a conference. The bandwidth capabilities for each respective endpoint may be based on its video decoding capability, the maximum bit-rate it can accept, the video encoding capability of the other endpoints, or a bandwidth constraint manifestation in a portion of the network, etc.

In a video conference, scalable video coding (SVC) may be used to send compressed video to participating endpoints. SVC includes one or more incremental enhancement layers of compressed video in addition to the compressed video of the base layer (BL). The premise of SVC is that the picture quality rendered at a video conference's endpoint that decodes the BL and at least one SVC layer (SVCL) is higher than at an endpoint that only decodes the BL. The ITU H.264 video coding standard, also known as either MPEG-4 Part 10 or MPEG Advanced Video Coding (AVC), is one of several video specifications provisioned to extend the BL of compressed video with a SVCL. The BL may be considered a common denominator of picture quality, or system default, for the plurality of endpoints in a video conference, and is set at a low bit-rate, such as 128 kilobits per second (kbps), irrespective of whether a higher BL bit-rate can be provided to all the active or participating endpoints during an interval of time. SVC uses a bit-rate in the transmission of the video which is typically lower than the bit-rate of the BL. When SVC's corresponding enhancement layers are decoded at an SVLC endpoint, picture quality is improved via an increase of the decoded picture resolution, picture or frame rate and/or by at least one other improved picture characteristic. A video conference may include SVLC endpoints and BL endpoints. SVLC endpoints are capable of receiving and decoding one or more SVCLs and the BL. BL endpoints are capable of only receiving or decoding the BL. BL endpoints do not decode a SVCL but only decode the BL, while an SVCL endpoint can decode both, the BL and at least one SVLC. Thus, BL endpoints cannot use the enhancement layers and only the BL is used to display pictures. This usually results in a lower quality picture at BL endpoints.

Dynamic management of picture quality in a video conference with diversified constraints


The three-dimensional observation system of the present invention comprises an image picking-up part which has a parallax with respect to the object of observation and captures two images of the object of observation, an image display part which respectively displays the two images of the object of observation captured by the image picking-up part, and an optical system which is used to guide the two images of the object of observation displayed by the image display part to respective position in front of the left and right eyes of the observer facing the object of observation, such that the parallax direction of the image picking-up part and the parallax direction of the observer coincide, thus causing a three-dimensional image to be displayed.

1. Field of the Invention
The present invention relates to a three-dimensional observation system which allows the three-dimensional viewing of observation sites inside body cavities by means of an endoscope.
2. Description of the Related Art
Three-dimensional observation systems which allow the observation of three-dimensional images by picking up two images that have a parallax, and respectively guiding these captured images to the left and right eyes of an observer, have been known in the past.
Such three-dimensional observation systems have also attracted attention in the medical field, and surgical procedures using so-called three-dimensional endoscopes, in which this technique is applied to an endoscope, are becoming more widespread.
Meanwhile, fine surgical manipulation skill is required in surgical procedures that are performed while picking up the image of an observation site by means of an endoscope inserted into a body cavity and observing this endoscopic image; however, in the case of surgical procedures using a three-dimensional endoscope, delicate treatments that depend on a high degree of manipulation skill can be performed with greater assurance than in cases where surgical procedures are performed while observing a conventional two-dimensional endoscopic image.
In such a three-dimensional observation system, three-dimensional observation is generally made possible using a binocular system by picking up two images that have a parallax with respect to the object of observation, and respectively guiding these two captured images to the left and right eyes of the observer.
For example, devices in which two images are alternately displayed on a monitor screen that displays captured images, and these images are observed via viewing glasses equipped with a liquid crystal shutter that is synchronized with the switching of this display, and devices in which the direction of polarization of two images is varied, and the images are viewed via polarized viewing glasses that have different polarization directions for the left and right eyes and the like are known as display devices used to guide two such images that have a parallax to the eyes of the observer.
Meanwhile, in surgical procedures using an endoscope, the operating surgeon performing the procedure must perform an extremely delicate surgical manipulation while observing the endoscopic image, and it is important to alleviate the fatigue felt by the operating surgeon in realizing this delicate surgical manipulation.
Generally, in surgical procedures using endoscopic images, the images captured by the endoscope are displayed on a monitor placed inside the operating room. The surgical procedure is performed while viewing the operating site on the endoscopic image displayed on this monitor, and the operating instrument operated by the operating surgeon himself. In this case, the operating surgeon must work while directing his body toward the operating site on the patient undergoing the surgical procedure, and directing only his face toward the monitor. As a result, the operating surgeon is forced to adopt an unreasonable posture, so that fatigue tends to occur. In order to prevent the occurrence of such fatigue, it is desirable that the operating surgeon be able to observe the monitor screen while directing his face toward the front (a direction in which the operating surgeon views the operating site while facing the patient).
Furthermore, in order to perform the surgical procedure smoothly in addition to alleviating fatigue of the operating surgeon, numerous persons cooperating in the surgical procedure such as assistants that assist in the surgical procedure, anesthesiologists, nurses and the like are also involved, and it is necessary to perform the operation with the cooperation of these various cooperating persons. Accordingly, it is important that the operating surgeon himself be able to ascertain the status of the cooperating persons that surround the operating surgeon, and it is also necessary that the cooperating persons be able to grasp the surgical procedure being performed by the operating surgeon.
However, in cases where the viewing glasses equipped with a liquid crystal shutter or polarized viewing glasses are used in a surgical procedure that is performed while viewing a three-dimensional image, the monitor that displays this image is usually disposed in a position that is apart from observers such as the operating surgeon, cooperating persons and the like inside the operating room, so that the observers must constantly turn their faces toward the monitor when observing the three-dimensional image. This forces the observers into a posture that causes fatigue. Furthermore, the operating surgeon must ascertain the status of surrounding cooperating persons via the polarized viewing glasses or viewing glasses equipped with a liquid crystal shutter, so that it is difficult for the operating surgeon himself to ascertain the status of surrounding persons, and so that it is also difficult for the surrounding cooperating persons to ascertain the status of the operating surgeon.
Furthermore, in cases where the image that is observed is a three-dimensional image, the fatigue of the operating surgeon is also affected by the direction of the parallax. For example, in the image pickup device used for three-dimensional observation, two images that have a parallax in a certain direction are respectively viewed by the left and right eyes of the operating surgeon, so that a three-dimensional image is recognized. However, in cases where the parallax direction of the three-dimensional image viewed by the operating surgeon and the parallax direction of the operating surgeon are different, it is difficult to grasp the positional relationship between the orientation of the three-dimensional image and the orientation of the surgical operating instrument operated by the operating surgeon himself. This may cause the operating surgeon to become confused; as a result, the operating surgeon may suffer from fatigue.
As a display device for three-dimensional captured images that alleviates such fatigue of the operating surgeon and makes it easy to grasp surrounding conditions, a head-mounted display device, which has a monitor that displays two captured images and in which an optical system that guides the images displayed on this monitor to the eyes of the observer, has also been proposed (for example, see Japanese Patent Application Laid-Open No. 8-194172).
This head-mounted display device is mounted on the head of the operating surgeon; furthermore, switching means that allow the passage of external light to the monitor that displays the captured images, or that cut off such external light, are provided, so that the operating surgeon can visually recognize both three-dimensional captured images and the surrounding conditions by a switching operation between the passage and blocking of external light using the switching means.
The present invention provides a three-dimensional observation system used to perform surgical procedures while observing three-dimensional images, which makes it possible to perform fine surgical procedures while alleviating fatigue of the operating surgeon, and which also allows other persons cooperating in the surgical procedure to confirm images on the monitor observed by the operating surgeon, and thus facilitates mutual understanding between the operating surgeon and persons cooperating in the surgical procedure.


In one embodiment, the method for reading memory cells in an array of non-volatile memory cells includes reading data from a memory cell using a set of hard decision voltages and at least a first set of soft decision voltages based on a single read command.

The present disclosure herein relates to semiconductor memory devices, and more particularly, to a flash memory device and a read method thereof.
Semiconductor memory devices are generally classified into volatile memory devices (e.g., DRAMs and SRAMs) and nonvolatile memory devices (e.g., EEPROMs, FRAMs, PRAMs, MRAMs, and flash memories). A volatile memory device loses data stored therein when power supply thereto is interrupted; whereas a nonvolatile memory device retains data stored therein even when power supply thereto is interrupted. In particular, a flash memory device is widely used as a storage medium in a computer system because of its high program speed, low power consumption and large data storage capacity.
In the flash memory device, data states storable in each memory cell may be determined according to the number of bits stored in the memory cell. A memory cell storing 1-bit data per cell is called a single-bit cell or a single-level cell (SLC), and a memory cell storing multi-bit data (i.e., at least 2-bit data) per cell is called a multi-bit cell, a multi-level cell (MLC) or a multi-state cell. The multi-bit cell is advantageous for high integration. However, as the number of bits programmed in each memory cell increases, the reliability decreases and the read failure rate increases.
For example, if k bits are to be programmed in a memory cell, one of 2k threshold voltages must be formed in the memory cell. Due to the minute difference between the electrical characteristics of memory cells, the threshold voltages of memory cells programmed with the same data may form a desired (or, alternative a predetermined) range of threshold voltage distribution. Threshold voltage distributions may correspond respectively to 2k data values that may be generated by k bits.
However, a voltage window available for threshold voltage distributions is limited. Therefore, as the value k increases, the distance between the threshold voltage distributions decreases and the adjacent threshold voltage distributions may overlap each other. As the adjacent threshold voltage distributions overlap each other, read data may include a number of error bits (e.g., several error bits or several tens of error bits).

Non-volatile memory device and read method thereof


A dual field of view telescope for operating in both the medium infrared spectral band from 3.8 to 5 micrometers and the long infrared spectral band from 8 to 11.5 micrometers. The telescope includes an objective lens group A and an eyepiece lens group B. All of the lenses of each group are made of zinc sulfide, germanium or nonoxide chalcogenide glass. One of the lenses in the objective lens group is a negative germanium lens A3 which serves to correct for residual axial chromatic aberrations in both IR bands due to its different dispersion characteristics in these two bands.

1. Technical Field
This invention relates to optical devices, and more particularly, to telescopes capable of operating in the infrared frequency spectrum.
2. Discussion
There is a need for telescopes capable of operating over a wide band of infrared radiation. Two of the bands of particular interest are the medium infrared (IR) band having wavelengths of from 3.8 to 5.0 micrometers and the long IR band having wavelengths of from 8 to 11.5 micrometers. These two bands correspond to regions of high transmittance within the atmosphere. Such telescopes can be used with a forward-looking infrared (FLIR) scanner and imager systems. Other applications of such a telescope would include infrared search-track (IRST) sensors and dual-band, target-recognition systems.
Previously known dual-band or wide-band infrared telescope designs typically used toxic materials such as KRS-5 and As.sub.2 S.sub.3 or exotic materials such as potassium bromide, CdTe, GaAs or CsI. It was heretofore believed that it was necessary to employ these hard-to-use materials in order to correct chromatic aberrations in both spectral bands.


A high liquid alarm system for use in detecting the presence of water and oil in water present in a confined space is disclosed. In one implementation, the system includes an optical sensor capable of detecting water at a certain level, a sensing device capable of differentiating oil and water, and an alarm indicator. The sensors are in communication with an indicator which is capable of providing alert signals. The optical sensor is configured to activate a second alarm in the indicator when water is detected at about a predetermined level and the sensing device is configured to trigger a first alarm when oil in water is detected at about the predetermined level. The sensors can also be interconnected such that the sensing device is activated upon detection of water by the optical sensor, reducing the power consumption of the system.

1. Field of the Invention
The present invention relates generally to alarm systems used in signaling the presence of oil and/or water in a confined area and, in particular, concerns such an alarm system that can be used in conjunction with submersible pumps in areas such as transformer vaults and elevator shafts to detect pump malfunctions and substantially prevent oil leaks from being pumped with water into the environment.
2. Description of the Related Art
Important technological infrastructure, such as electrical hardware and elevator hydraulics and cables, are often located in enclosed spaces such as transformer vaults and elevator shafts. This infrastructure is enclosed for a variety of reasons, including engineering design, prevention of injury or theft, noise dampening, and aesthetics. However, these enclosed spaces are often subject to waste water accumulation as water from rain, irrigation, leaks, and other sources may enter these spaces, accumulate, and flood the enclosure.
To prevent water from rising above a certain level in these enclosed spaces, submersible pumps are often used to remove accumulated water from these locations. The water is typically pumped into a reservoir and ultimately released into the environment via a sewer system or the like. However, when submersible pumps malfunction, the accumulated waste water can reach an unacceptable level thereby flooding the enclosed space and damaging the equipment therein. Additionally, the waste water is often mixed with oil that leaked from the equipment in these structures. This oil-water mixture presents an environmental hazard if it is pumped into the sewer system.
One solution which has been developed for this problem is the use of a mechanical float switch interconnected to an oil sensor and a pump. As the water level in the enclosed space changes, the float switch moves up and down on the surface of water. The resulting tilting movement is sensed by an internal switch within the float and triggers the pump to activate. If the oil sensor detects oil, the pump is not allowed to activate, while if oil is not detected, the pump is allowed to activate.
However, these float switches could be problematic as a level sensing device. Float switches are relatively imprecise, as they do not trigger at a set level but rather trigger based on a tilting motion. As a result, there is a relatively wide water level range over which the float may trigger. This range is further widened should the water be turbulent. Furthermore, the mechanical trigger within the float may fail over time due to wear or fatigue.
In view of the foregoing, there is need for an improved alarm system which detects the presence of water so as to provide an alert that water has accumulated beyond a predetermined location. Further, there is need for an alarm system which is capable of differentiating between water and oil.


A method and apparatus is disclosed herein for secure search and retrieval. In one embodiment, the method comprises receiving an encrypted, permuted search tree with nodes that have been permuted and encrypted, the encrypted permuted search tree having been encrypted with a first private encryption key; receiving, at a server, a query from a client, the query comprising a set of keywords, wherein each query term is encrypted with the first private encryption key; performing a search using the query, including performing an oblivious matching keyword test in which an evaluation occurs at each node of the tree to determine if one or more matches exist; and returning results based on a match of keywords for each document, the results including one or more encrypted leaf nodes of the tree, the encrypted leaf nodes encrypted with the first private encryption key.

Several private information retrieval (PIR) schemes exist in the prior art. These (PIR) schemes allow a user to retrieve information (e.g., a document) from a database using a server without revealing the information they are retrieving. PIR is similar to 1-out-of-n oblivious transfer, where the user also does not get information about other information in the database. In the area of single-database symmetric PIR with preprocessing, a client making a query learns nothing more than the result of their query, while the server learns nothing about the contents of records returned for the query. The preprocessing stage in such a scheme is completed before engaging in the query stage.
PIR schemes generally require O(n) computation, with the exception of some systems with multiple servers. One prior art scheme achieves constant query time on a single server, but with O(n2) preprocessing per query. This scheme also makes use of a shuffling protocol to generate a shuffled hash table (as opposed to use in generating a shuffled tree structured index) and also requires use of a secure coprocessor. Other prior art techniques also make use of a shuffled hash table to achieve constant time queries with O(n) preprocessing, but require storing all data and performing the query at the client machine.
The PIR protocols used PIR schemes have employed various cryptosystems. A number of cryptosystems are well-known in the art and have a variety of properties.
Some cryptosystems have a commutative property. That is, the order in which encryption and decryption operations are applied does not affect the result of the operations. In a non-commutative encryption scheme, the order of the operations is relevant to the result. For example, consider a plaintext message m that has been encrypted with key k1 to yield the ciphertext c1=Ek1(m). Further, encrypt c1 with key k2 to yield the ciphertext c2=Ek2(Ek1(m)). In a noncommutative encryption scheme, decrypting with k1 before k2 yields garbage, while decrypting in the reverse order (k2, k1) yields the message m:
            D              k        2                        (                        D                      k            1                                            (                                    E                              k                2                                                                (                                                E                                      k                    1                                                                                (                  m                  )                                            )                                )                    )        =            ⊥                                                  D                      k            1                                            (                                    D                              k                2                                                                (                                                E                                      k                    2                                                                                (                                                            E                                              k                        1                                                                                (                      m                      )                                                        )                                            )                                )                      =    m
In other words:Dk2(Dk1(c2))≠Dk1(Dk2(c2))
Commutative cryptosystems differ in that the following relation holds:Dk2(Dk1(c2))=Dk1(Dk2(c2))
Thus, the order of the operations does not affect the result. A commutative encryption scheme is useful in that it enables the entries in the database to be securely shuffled without revealing the location of any element to either party. With respect to some previous solutions, the commutative encryption scheme will serve as the secure coprocessor for our protocol.
A cryptosystem with a homomorphic property allows some subset of mathematical operations to be performed on encrypted messages. This is a desirable property, as it allows many simple functions to be computed securely and efficiently. In general, a homomorphic cryptosystem supports some binary operator ⋄, where the following property holds:E(x)·E(y)=E(x⋄y)
A cryptosystem is additively homomorphic when ⋄ is the addition operator, or multiplicatively homomorphic when ⋄ is the multiplication operator. For example, the Paillier cryptosystem is additively homomorphic, while the ElGamal and Massey-Omura are multiplicatively homomorphic. The Goldwasser-Micali cryptosystem supports the more complex binary operator exclusive-or. A multiplicatively homomorphic encryption scheme satisfies the property:E(x)·E(y)=E(x·y)
At least one prior art PIR scheme uses Paillier's additively homomorphic cryptosystem, which requires O(n) computation and database communication of O(kd), where k is the security parameter and dε+.
U.S. Pat. No. 6,167,392 describes a single-database PIR scheme based on the use of homomorphic encryption and the quadratic residuosity assumption. This PIR scheme requires a repeated interaction between the client and server until the desired record can be retrieved. Here, our invention achieves the goal with a constant number of rounds.
U.S. Pat. No. 5,855,018 describes another PIR scheme that requires the use of non-colluding replicated database servers.


The present invention is an electronic circuit that significantly enhances timing margin in high-speed, digital memory modules. The circuit is implemented is applicable to all switching waveforms on both control and data signal lines that drive the memory bus. Implementation of the present invention also provides a significant reduction in power dissipation compared to memory modules of comparable size and speed utilizing the present art.

1. Field of the Invention
The present invention relates to the field of digital memory modules and more specifically it relates to means for transmitting data and control signals onto individual lines in the memory interface buss.
2. Background Art
Digital memory modules such as used in computers, printers, and telecommunications equipment are clocked devices that must communicate data, control, and status signals onto a memory buss. The signals are digital signals that are typically switched synchronously with the memory clock. Following a clocked transition, signals require a period of time to stabilize and allow switching transients to die off before their signal state can be considered "valid". The time difference between the time of signal stabilization and the start of the subsequent clocked transitioning minus the time required by the system to receive the valid information comprises the timing margin of the memory.
Historically, timing margin (as well as power consumption) has not represented a major problem with memory modules. When more than one signal was to be coupled onto a single line in the memory buss, memory buss driver outputs were connected together as the simplest and lowest cost method for driving the memory buss, because timing margin was not a concern. An example prior art configuration is illustrated in FIG. 1. Signals A and B are coupled to node 100 through buffers U100 and U101 respectively. The output of node 100 is strobed for A or B as desired.
With the increasing need for higher speed memory, timing margin can no longer be ignored. The combined transition and stabilization time now represents a significant portion of, if not the entire, clock period. Since transition times and time delays are subject to manufacturing variability, timing margin has become both small and widely variable. This makes for low yield production and very costly memory modules.
In addition to the timing margin problem, the trend has been toward larger and larger capacity memory modules. The transition period with associated high current draw has resulted in a major power consumption/distribution problem for state of the art memory modules. One of the major sources for high power consumption is the use of simple wired-OR connections of multiple line driver outputs driving the memory buss. During transitions, both upper and lower type switching devices within the line drivers attached to an individual line in the buss can be "on" or partially "on". This results in high transient current flow and resulting high power dissipation. At high memory clock rates, this represents a high "duty cycle" that will only become worse with increasing memory clock rates in the future. For large memory modules, there are such a large number of the transitions occurring at a typical clocked transition that the total power consumption is large and difficult to deal with given conventional memory module to motherboard interfacing.
As a result, it would be extremely desirable to have digital memory to memory buss interface circuitry that would provide adequate timing margin for memory modules at higher clock frequencies while reducing the total power consumption associated with the present buss interface.


A method includes steps of (A) detecting an activation of a user input that indicates that the system, or a program executed by the system, has become non-responsive to a user; (B) determining an identification of any currently open files and programs with which currently open files are associated; (C) determining an identification of those programs that are normally not in a non-responsive state; and (D) saving those currently open files that are associated with programs that are identified as being not normally in the non-responsive state. A next step notifies the user that any currently open files that are associated with programs identified as being not normally in the non-responsive state have been saved. In a further step the user may restart the digital data processing system, and retrieve at least one of the saved files. The step of detecting can be executed in response to the user manually activating a switch or by the user activating one or more keyboard keys. The step of saving saves in association with the currently open files an identification of their associated programs, and saves the currently open files in a data storage device that forms a part of the system, and/or in a data storage device that is remote from the system, and that is reached through a data communication network. The step of determining an identification of any currently open files preferably includes the preliminary step of monitoring system file open and file close operations, and maintaining a record of those files that are currently open and a record of a program that opened the file.

This invention relates generally to digital data processing systems and methods and, more particularly, to methods and apparatus for ameliorating the adverse effects of data processing system malfunctions.
As computer operating systems have grown more complex and feature-rich, they have also grown significantly larger. In order to more effectively manage these large software systems the functionality of the operating system has been partitioned into separate modules or components. The underlying rationale in partitioning the operating system is that dividing up a complex software system into smaller pieces makes the operating system easier to develop and maintain. While this may be true to a first order, the fact is that personal computer (PC)-based operating systems such as, but not limited to, Microsoft Windows 95(trademark), Microsoft Windows 98(trademark), and Microsoft Windows 2000(trademark) all experience xe2x80x9ccrashesxe2x80x9d or xe2x80x9changsxe2x80x9d, requiring the user to reboot the PC, or in some cases to cycle the power off and then on in order to restore the PC to an operational status.
It should be noted that not all of these problems are the fault of the operating system, and may instead actually be the fault of a running application. For example, the applications programmer may have forgotten to test a program path, or a program path was never traversed during testing so that some problem did not appear. In some cases, faults in the application may simply be the result of poor programming, or the failure to check the success or failure of a particular function call. Whatever the reason, the result is that the user""s PC can become unresponsive or non-responsive and effectively unusable until the system is rebooted or powered off and then back on. As many users have experienced, such problems typically occur at the most inopportune times, such as when a document or a spreadsheet must be quickly completed in order to make a deadline. Furthermore, the occurrence of these types of system failure events is unpredictable, and may occur at any time during use of the operating system or application.
One common failure mode is that a program is xe2x80x9cleakingxe2x80x9d memory, i.e., gradually using up small amounts of memory without releasing the used portions. This results in physical RAM memory capacity being slowly consumed until there is no more available. This type of failure mode typically causes the operating system to stop responding to user input such as keyboard strokes or mouse clicks. Because this type of failure occurs slowly over time, the user may have been working on a document or presentation for quite a while, and may have made many changes or additions to the work in progress. When the system stops responding, the user will be unable to save the work in progress, resulting in a high probability that the work in progress will be lost. In order to restore the system to a functional state the user is typically required to reboot or power cycle the system, resulting in the loss of all or at least some edits to the work in progress being lost.
Another less common problem occurs when a program consumes most or all of the computer""s processing capability, thereby starving other programs of computer time for proper execution. In this situation, the system may not respond to the user""s mouse movements and certain keyboard commands, including the command to restart the system, requiring the user power cycle the system in order to restore the system to a functional state.
As can be appreciated, a need exists to lessen and ideally avoid the negative impact of such system failures on the user""s work environment.
The foregoing and other problems are overcome by methods and apparatus in accordance with embodiments of this invention. The teachings of this invention provide methods and apparatus to enable an orderly shutdown of a malfunctioning computer system, while saving user-desired work in progress.
In one aspect this invention provides a software program and software device driver mechanism that is installed on a computer system to be protected. In accordance with these teachings of this invention the software program xe2x80x9chooksxe2x80x9d or connects or links to the operating mechanism that is the single point of entry for a file open request. When a program makes a request to open a file, the request is detected, and the name of the requesting program is identified and saved along with other information, including the name of any file or files that the program is requesting to open. The data is saved as a protected database in a protected area of system memory, preferably but not necessarily a local disk drive.
The software program also xe2x80x9chooksxe2x80x9d or connects or links to the single entry point for a file close function. Each time a program closes a file the close request is intercepted. The name of program closing the file is detected, along with other information, including the name of the file or files to be closed. The files are closed normally, and the protected database updated with the new information.
Each time a file is opened or closed, the protected program/file database on the disk is updated, as well as a copy stored in computer memory (RAM). When the system stops responding to user input, the offending program may still have one or more files open, and may be unable to respond to any user request to properly close the program. When this occurs, the user invokes the emergency shutdown procedure in accordance with these teachings by using a predetermined xe2x80x9cbuttonxe2x80x9d. The button may be located on the keyboard, or it may be mounted internally or externally from the computer system. The button may be implemented using a conventional type of pushbutton or other type of switch, or it may be implemented using some predetermined keyboard key sequence where the user depresses one or more keys, either sequentially or together. The special key combination is detected, and is used to invoke the operation of the orderly shutdown procedure in accordance with these teachings.
In operation, the orderly shutdown procedure enumerates the list of currently running programs and then by using a program state table determines which program or programs are no longer responding to user input. In accordance with a further aspect of these teachings, the resulting list of non-responding programs is compared to a list of non-responsive programs, i.e., a list of programs that are normally in a non-responsive state, to determine which user program or programs are not responding. The list of non-responsive programs preferably includes those programs that are part of the operating system and that normally run in a suspended or xe2x80x9cnot respondingxe2x80x9d mode.
After the identities of the user non-responding programs are determined, the orderly shutdown procedure attempts to read from the protected database to determine if any of the non-responding user programs have any files open. If the disk is not accessible, the information is read from the copy stored in the memory-resident database. The orderly shutdown procedure matches each non-responding program to any open file or files that it may have, copies the identified file or files to a temporary space on the local or a network disk while identifying these files with, by example, a date and time stamp, as well as the name of the non-responding program. When the open file copy procedure terminates, the orderly shutdown procedure may display a message box indicating that any open files have been saved, and that it is safe for the user to shutdown the system.
After the computer system is rebooted, the user locates the saved version of the file or files in the protected area and may then resume working at the point where work stopped.
In accordance with these teachings a method is disclosed for operating a digital data processing system, as is a digital data processing system that operates in accordance with the method.
The method includes steps of (A) detecting an activation of a user input that indicates that the system, or a program executed by the system, has become non-responsive to a user; (B) determining an identification of any currently open files and programs with which currently open files are associated; (C) determining an identification of those programs that are normally not in a non-responsive state; and (D) saving those currently open files that are associated with programs that are identified as being not normally in the non-responsive state. A next step notifies the user that any currently open files that are associated with programs identified as being not normally in the non-responsive state have been saved. In a further step the user may restart the digital data processing system, and retrieve at least one of the saved files.
The step of detecting can be executed in response to the user manually activating a switch or by the user activating one or more keyboard keys.
The step of saving saves in association with the currently open files an identification of their associated programs, and saves the currently open files in a data storage device that forms a part of the system, and/or in a data storage device that is remote from the system, and that is reached through a data communication network.
The step of determining an identification of any currently open files preferably includes the preliminary step of monitoring system file open and file close operations, and maintaining a record of those files that are currently open and a record of a program that opened the file.

Method and apparatus for performing emergency shutdown of a malfunctioning computer system saving all open files, data, and work in progress

International Business Machines Corporation


Three methods are used to minimize the interference between multiple FMCW radars. The first, basic method is to use spread spectrum waveforms which differ for each radar. The FMCW waveforms have different modulation slopes for each frequency excursion. The waveforms also have different center frequencies for each excursion thus in total spreading the spectrum in frequency and modulation slope. The second method used is to control the power output for FMCW radars which have narrow beam scanning antennas, according to the azimuth position of the antenna. The third method is to select separate frequency bands for any interference which would still be above threshold. Selection would be by either infrastructure information or by comparison of "own" radar code to that received from each interfering radar over a separate, but related modulated CW transmission.

In environments where there are many FMCW radars operating in the same vicinity and in the same frequency region, methods are necessary to reduce the interference such that the probability of an interfering signal being above threshold is low while simultaneously minimizing the total operating bandwidth covering all the radars.
One invention (Mehltretter U.S. Pat. No. 3,824,592) stochastically varies the frequency extent or introduces a time period of no frequency modulation. Neither of these techniques will work for a radar which needs the entire integration time during a required update rate, such as vehicle collision warning radars, for two reasons:
1. Non-modulated portions will reduce the integration time and thus the required detection range.
2. Changing frequency extent will change the range resolution.
Moreover with interfering radars at much less ranges than required detection ranges this single dimensional approach will not come close to providing interference levels below detection threshold.
This is especially true in applications where interference from any one scan will be sufficient to cause a significant loss in performance, requiring a very low probability of interference for satisfactory performance. Vehicle collision warning is one such application as a loss of information on any one scan of the environment will cause a significant loss of warning time.
Another invention (Chilak and Wehage U.S. Pat. No. 4,106,108) detects the approach of interfering signals towards an acceptable band pass of the radar with which it is associated. Their invention then shifts the phase of at least one of the radars in order to prevent interference. This requires coordination between the radars and only works with a small number of radars (their description covers just two radars). When there are many radars operating in the same vicinity, phase shifting is impractical. One such environment exists for vehicular collision warning radars in either an intracity or multilane highway environment. Here, the number of radars does not allow for coordination between the vehicles to reduce the interference.
In many of these applications, when FMCW modulation is used other factors (rain backscatter, required azimuth coverage, and multiple target separation) require a narrow beam scanning radar. Thus the problem resolves itself into two parts:
1. Minimizing the number of radars with interference levels above threshold, when in scan synchronization (FIG. 1). Subsequently, providing means to separate these interfering radars.
2. Minimizing interference when the scanning beams are not in synchronization with each other.
To solve this multiple part problem three techniques are used:
1. Spread spectrum FMCW signatures.
2. Power control as a function of angle.
3. Frequency band control either by external reference or by coordination between the radars.
Note that contrary to another invention (Brookner U.S. Pat. No. 3,787,853) here only one frequency is generated at any one time. Brookner's invention with multiple frequencies was designed to reduce clutter. Here the object is to significantly reduce interference from other multiple active radars.

Methods of minimizing the interference between many multiple FMCW radars


Crystals with improved scintillation and optical properties are achieved by codoping with a trivalent dopant and a divalent and/or a monovalent dopant. Embodiments include codoping LSO, YSO, GSO crystals and LYSO, LGSO, and LYGSO crystals. Embodiments also include codoped crystals with a controlled monovalent or divalent:trivalent dopant ratio of from about 1:1 for increased light yield to about 4:1 for faster decay time.

Scintillation detectors are used in a wide variety of applications, including medical diagnostics and therapy (PET, SPECT, therapy imaging, etc.), oil exploration, field spectrometry, and container and baggage scanning. Desirable properties for scintillation detectors include high light output (i.e., a high efficiency for converting the energy of incident radiation into scintillation photons), efficient detection of the radiation being studied, a high stopping power, good linearity over a wide range of energy, a short rise time for fast timing applications, and a short decay time to reduce detector dead-time and accommodate high event rates. Light output is particularly important, as it affects both the efficiency and resolution of the detector, where efficiency is the ratio of detected particles to the total number of particles impinging upon the detector, and energy resolution is the ratio of the full width at half maximum of a given energy peak to the peak position, usually expressed in percent. The light output is often quantified as a number of scintillation photons produced per MeV of deposited energy.
LSO is a scintillation crystal that is widely used in medical imaging applications, such as for gamma-ray detection in Positron Emission Tomography (PET). LSO is typically doped with 0.05 to 0.5% cerium (Ce), while controlling other impurities at low levels. The light yield of Ce doped LSO (Ce:LSO) crystals grown using prior art methods is on average significantly lower than the theoretical maximum, and the decay time of these crystals tends to be in the 40 ns range. In addition, new techniques for image data acquisition require faster decay times than those obtained with Ce:LSO. Further, scintillation properties of LSO grown under such conditions can vary significantly from boule to boule, and in different parts of the same boule, which consequently increases the cost of commercial crystal production caused by the large number of out-of-spec crystals produced.
Work has been done with codoping the LSO crystals in an attempt to improve the scintillation properties. For example, Ce:LSO has been doped with 0.02% calcium (Ca) or magnesium (Mg). However, although codoping improved light yield some, it failed to change decay time for the crystals.
A need therefore exists for scintillation crystals with improved light yield and light yield uniformity, controllable scintillation decay time that can be optimized for specific applications, and improved decay time uniformity. A need also exists for production techniques with improved yield by reducing the number of out-of-spec crystals produced.

Use of codoping to modify the scintillation properties of inorganic scintillators doped with trivalent activators

University of Tennessee Research Foundation


According to one embodiment, there is provided a nonvolatile semiconductor memory device including a first interconnection layer, memory cell modules each of which is formed by laminating a non-ohmic element layer with an MIM structure having an insulating film sandwiched between metal films and a variable resistance element layer, and a second interconnection layer formed on the memory cell modules, the insulating film of the non-ohmic element layer includes plural layers whose electron barriers and dielectric constants are different, or contains impurity atoms that form defect levels in the insulating film or contains semiconductor or metal dots. The nonvolatile semiconductor memory device using non-ohmic elements and variable resistance elements in which memory cells can be miniaturized and formed at low temperatures is realized by utilizing the above structures.

Recently, as new solid-state memories, memories utilizing a change in resistance (high resistance and low resistance) of a recording material and called a phase-change memory (phase-change random access memory [PCRAM]) and resistance-change memory (resistance-change random access memory [ReRAM]) are being developed to reach the practical application. The cell array of the above memories can be formed with a cross-point structure having variable resistance elements arranged between interconnection lines and a three-dimensional structure can be formed by laminating the cell arrays. Further, since the chip area can be made small by arranging a peripheral circuit below the cell array, the structure is suitable for large capacity.
As the feature of the cross-point structure, a cell structure having a non-ohmic element serially connected to a variable resistance element is attained since it is of a recording system that reads a resistance change by passing a current and a stray current that flows through an unselected cell at the read time of a selected cell is suppressed. As a result, suppression of a reverse current (prevention of reverse current) in the case of a unipolar operation and suppression of a low electric field leakage current (prevention of a leakage current) in the case of a bipolar operation can be achieved.
However, in this type of solid-state memory, the following problem occurs. That is, as the cells are further laminated, the aspect ratio of the whole cell becomes larger since the thickness of a diode portion is large in the case of pn, pin, Schottky diodes in which the non-ohmic element uses Si as a material and the miniaturization process becomes difficult. In addition, a diode peripheral portion such as a variable resistance element is thermally degraded by repeating activation heat treatment at high temperatures for each layer, problems of reading characteristic, switching characteristic degradation, variation in the resistance change of the cell, an increase in the operation current, an increase in the power consumption and the like occur.


To provide an operation vehicle monitoring device that can reduce man hours for maintenance and realize the maintenance efficiency, it includes an input unit (201) in which a signal for instructing registration of a selected monitoring item is input, a display unit (202) that sequentially updates and displays the current detection content of a monitoring item selected from a plurality of monitoring items related to the operation state of the construction machine, a memory (206) that registers the monitoring item for which the signal for instructing the registration is input by the input unit (201), and a controller (203) that causes the display unit (202) to display the current detection content of the registered monitoring item when there is the monitoring item registered in the memory (206).

Regarding a construction machine such as a hydraulic shovel, there is a case where, when performing various maintenances, a service personnel performs the operations while checking an operational state of the construction machine. In such a case, there is a known technique of monitoring an internal state of the construction machine using a monitoring device mounted on the construction machine (for example, see Patent Literature 1). This monitoring device has a function of displaying a maintenance screen in addition to a standard screen for displaying a normal operation of the construction machine, and can sequentially update and display a detection result of monitoring items selected by the service personnel. By such a technique, the service personnel can perform monitoring without connecting another terminal to the construction machine.


A sensing head for providing bi-dimensional and tri-dimensional data determinative of a position and an orientation of a target object is provided. The sensing head combines both a bi-dimensional and a tri-dimensional sensors. General illumination is associated to the bi-dimensional sensor to allow the acquisition of bi-dimensional data representative of the target object. A stripe-shaped laser light output is projected and diffused on the target object and is sensed by the tri-dimensional sensor. Tri-dimensional data is thus acquired. By proper processing of the bi-dimensional and tri-dimensional data, the position and orientation of the target object may be determined without moving the sensor head and without knowing its position and orientation.

The present invention relates to the field of optical sensors and more particularly concerns a more efficient sensor for determining the position and orientation of a target object.
Optical sensors are useful tools for position and orientation measurements of objects of various types and sizes.
In particular, in the automobile industry where an automobile body must be inspected for defects during the manufacturing process, such sensors are used to collect measurements of the position and orientation of selected objects on the car body. The resulting data is stored in a database for analysis. This type of inspection is carried out using an articulated robot with a laser-camera mounted on its wrist, the laser-camera providing the measurements. The robot is moved over the car body and the camera takes measurements of selected objects. The robot can move in any direction and orientation over a selected feature of the car body. However, in order to measure position and orientation, the robot has to go to the selected feature area and rotate, tilt and turn the camera in several directions in order to capture all the measurements needed for the database. Even with these robot movements, the camera will not be able to measure all the angles needed for a proper characterization of the object.
The above explained inspection process has two important drawbacks. Firstly, for a given cycle, the inspection time is lengthen by the many movements of the camera necessary in order to capture the angles needed to provide the required data. Secondly, in order to take orientation measurements, the camera must be moved in several angles. These movements are sometimes impossible because other objects can be in the way of the robot and camera. The geometry of the car body becomes a limiting factor.
There is therefore a need for an optical sensor providing the data necessary for describing the position and orientation of an object without moving the camera around during the measurement process and without knowing the orientation of the camera and the robot wrist, which is not the case of prior art devices.
In accordance with a first aspect of the present invention, there is provided a sensing head for providing bi-dimensional and tri-dimensional data determinative of a position and an orientation of a target object extending in a sensing area.
The sensing head includes a general illumination light source directed towards the sensing area, and a bi-dimensional sensor also directed towards said sensing area. The bi-dimensional sensor cooperates with the general illumination light source for acquiring the bi-dimensional data upon illumination of the target object by the general illumination light source. The bi-dimensional data is representative of an image of the target object along a plane.
The sensing head also has a laser light source, and an optical arrangement optically coupled to the laser light source for controllable projection of a light output generated by the laser light source along distinct lines extending in the plane. A tri-dimensional sensor is directed towards the sensing area for acquiring the tri-dimensional data, by sensing diffusion of the light output on the target object. The tri-dimensional data is representative of tri-dimensional coordinates of the target object along the above-mentioned lines.
A collector circuit is connected to the bi-dimensional and tri-dimensional sensors for receiving the bi-dimensional and tri-dimensional data therefrom, the collector circuit having an output for transmitting the same.
In accordance with another aspect of the present invention, there is also provided an apparatus for determining a position and an orientation of a target object extending in a sensing area.
The apparatus includes a sensing head for providing bi-dimensional and tri-dimensional data determinative of the position and orientation of the target object. The sensing head has a general illumination light source directed towards the sensing area, and a bi-dimensional sensor, also directed towards the sensing area and cooperating with the general illumination light source for acquiring the bi-dimensional data upon illumination of the target object by the general illumination light source. The bi-dimensional data is representative of an image of the target object along a plane. The sensing head further includes a laser light source and an optical arrangement optically coupled thereto for controllable projection of a light output generated by the laser light source along distinct lines extending in the plane. A tri-dimensional sensor is directed towards the sensing area for acquiring the tri-dimensional data by sensing diffusion of the light output on the target object. The tri-dimensional data is representative of tri-dimensional coordinates of the target object along the lines. The sensing head also includes a collector circuit connected to the bi-dimensional and tri-dimensional sensors for receiving the bi-dimensional and tri-dimensional data therefrom. The collector circuit has an output for transmitting the same.
The apparatus further includes a control circuit for controlling the light sources and the sensors, and a processing circuit for processing the bi-dimensional and tri-dimensional data received from the collector circuit to determine therefrom the position and orientation of the target object.
Further advantages and features of the present invention will be better understood upon reading of preferred embodiments thereof with reference to the appended drawings.

Sensing head and apparatus for determining the position and orientation of a target object


A medical implant and method for implantation of the same. One embodiment is an implant for use in the treatment of stress urinary incontinence that includes an implantable, elongated tape having a multiplicity of openings formed through the thickness thereof, the tape having a first end region and a second end region longitudinally opposite the first end region, and first and second bio-compatible fixation elements attached to the first and second end regions of the tape respectively. Each bio-compatible fixation element has a tissue adherence property greater than that of the tape.

1. Field of the Invention
This invention relates generally to minimally invasive medical implants and procedures for their use and insertion device for implanting the same, having particular application for treating urinary incontinence.
2. Description of the Prior Art
Stress urinary incontinence (SUI) is a female medical condition commonly associated with weakening of the pelvic muscles and/or connective tissues that support the urethra in its proper position. As a result of this condition, involuntary urine leakage occurs from simple physical activity, such as running or jumping, and even coughing or sneezing, as the urethra is not properly supported and does not remain fully closed during such activity.
A widely accepted medical procedure to correct SUI is the insertion of a tension-free or trans-vaginal tape that is surgically implanted in the pelvic tissue and that extends under and provides support for the urethra when pressure is exerted thereon.
U.S. Pat. No. 5,899,909, the disclosure of which is incorporated herein by reference, describes in detail a typical procedure for treating SUI using a trans-vaginal tape. The tape is implanted by passing an elongated curved needle that is attached to one end of the tape through an incision in the vaginal wall, to one lateral side of the urethra, through the pelvic tissue behind the pubic bone, and exiting out through an incision made in the abdominal wall. The procedure is repeated for the other end of the mesh tape, this time on the other lateral side of the urethra, with the needle exiting through a second incision made in the abdominal wall of the patient. After the mesh tape is adjusted for proper support of the urethra, its free ends extending outside of the abdominal wall are trimmed. Over time, fibroblasts grow into the mesh tape to anchor the tape in the surrounding tissue. Thus, the tape is left as an implant in the body to form an artificial ligament supporting the urethra in order to restore urinary continence. In another known method for implanting a trans-vaginal tape, the tape is inserted in a somewhat similar manner, but is brought out through the obturator hole and exits the body through a small incision in the upper leg.
The use of trans-vaginal tape for treating SUI has a number of advantages. It does not need to be attached through bone anchors, sutures or any other element to secure the tape in place, and there is minimal scarring. The procedure takes about 30 to 50 minutes, and may be performed on an outpatient basis under local, regional or general anesthesia. One of the few disadvantages of known procedures for implanting sub-urethral tapes is that the use of needles to pass the tape through the body poses a risk for vessel, bladder and bowel perforation. Also they require two separate, minimal incisions made through the abdominal wall (for a retropubic approach) or the upper leg (for an obtuator approach) through which exit the curved needles and attached tape is passed. This, of course, increases the risk of post-operative pain and/or infection to at least a small degree.
Accordingly, what is needed is an improved sub-urethral tape, and device and method for implanting the same.

Minimally invasive medical implant and insertion device and method for using the same


A hinged mounting assembly for use in connection with a gun-mounted light accessory is disclosed. The assembly has a light source disposed within a housing and a rail clamp connected to the housing. The rail clamp has a fixed clamp member attached to the housing and a hinged clamp member pivotally attached to the housing. The static clamp member and the hinged clamp member are disposed on opposite sides of the housing. A vertically moveable adjustment tab is attached to a first clamp post end. The adjustment tab has a cylindrical member with a lower half that is planar and an upper half that is arcuate. A vertically and horizontally adjustment tab is attached to a second clamp post end. The second adjustment tab also has a lower half that is planar and an upper half that is arcuate.

A large variety of accessories have been developed for use in combination with firearms, tools, and other devices. In particular, accessories have been designed and developed to be mounted to a firearm, tool, or other device to enhance its use. Examples of such accessories include lights, sighting lasers, scopes, night vision devices, grips, flash and sound control devices, and bipods.
A common means of mounting such accessories is accomplished with an accessory mount, often in the form of a rail attached to the firearm, tool, or other device. A popular type of rail is the Picatinny rail, which is generally wedge shaped and provides a standardized accessory mounting platform. The Picatinny rail carries the official U.S. Government designation MIL-STD-1913. Not all mounts use a Picatinny rail system. Moreover, not all rail systems have standardized dimensions.
Rails are currently offered on nearly every type of firearm, from handguns to rifles and shotguns. Rails of various lengths are available to be coupled in various locations that are convenient with the varying accessories. For example, a rail may be located on the underside and near the front of a rifle barrel to accommodate advantageous placement of a bipod or a rail may be located on the top of a tactical rifle's upper receiver to accommodate attachment of a scope.
Rail systems allow a variety of accessories to be mounted on a firearm, tool, or device. Interchangeability of accessories allows a single firearm, tool, or device to be reconfigured to meet different needs. Rail systems are also useful if accessory mounting and removal can be accomplished quickly and easily. Therefore, it is advantageous that the system that mounts the accessory to the rail is easy and convenient to operate.
Firearms, whether used for hunting, sport, or military and law enforcement, are deadly instruments and as such, accuracy is paramount. Lights are common accessories because they provide illumination in low-light environments, which is critical for accuracy. Laser sights are also common accessories that assist accuracy by projecting a laser in the same direction as the firearm's bore and provide a reference for the shooter. Of course other mounted accessories are contemplated for use herein. Because many of the accessories used contribute to the accuracy of the firearm, it is important that the accessory remained fixed, despite being bumped and jostled during transport and use and despite the recoil force created by discharging the firearm.
Therefore, it is advantageous if the accessory is both easily attached and removed to allow for accessories to be easily exchanged based on current need, but also to be firmly attached to maximize accuracy.


The present invention is an automatic firearm magazine loader that has an elevated hopper system, a loading system, and a mechanism for compressing a firearm magazine comprising a spring mechanism. The firearm magazine is compressible upon compression of the spring mechanism. The loading system facilitates the loading of a firearm ammunition into the firearm magazine upon the compression of the firearm magazine, and the compression of the firearm magazine is motor driven. The device is an automatic firearm magazine loader for a designated number of rounds of ammunition. The design consists of a user interface used to select the preferred number of rounds of ammunition to load, a hopper system which feeds individual rounds of ammunition in a set orientation, and a loading system which loads the individual rounds of ammunition into a firearm magazine.

1. Field of the Invention
The present invention relates to the field of firearms. More particularly, the present invention relates to a method and device for facilitating the loading of firearm ammunition into a firearm magazine.
2. Description of the Related Art
Firearm magazines are difficult and oftentimes ergonomically challenging to load by hand. This is time consuming, can be painful for the user, and requires the user to remove gloves in cold weather. The difficulties of loading firearm magazines even with the use of a hand loader are multiplied for users with certain conditions. Further, current loaders require user input which can lead to injury.
Current firearm magazine loaders such as the UpLULA Speed Loader (U.S. Pat. No. 7,637,048; Dec. 29, 2009; Tal, Guy (Rosh Ha'ayin, I L)) require orientation of ammunition by the user prior to loading the firearm magazine. This loading process is time consuming and stressful for the user. Another magazine loader such as the Caliber Magazine Loader (U.S. Pat. No. 5,301,449; Apr. 12, 1994; Jackson, Terry R. (Bozeman, M T)) requires the user to manually load the firearm magazine by rotating a cam. This loading process is also time consuming and can fatigue the user.


An imaging system having an imaging optics and a semiconductor sensor array which has a spatial distribution of sensing pixels to substantially match a distortion profile produced by the imaging optics.

The present application generally relates to optical imaging, and more particularly, to compensation for optical distortion in optical systems.
An optical imaging system having a defined optic axis can produce a geometrically-distorted image of an extended object with parts located away from the optic axis. Such distortion is in part caused by deviation of object points from the paraxial conditions. The amount of the distortion increases with the distance of an image point from the optic axis. One way to understand such distortion is that the magnification of the optical system varies across the imaging field. Other defects and imperfections in the optical components such as imaging lenses of the optical system also contribute to the total distortion of the image.
Two examples of some commonly-encountered geometrical distortions include pincushion distortion and barrel distortion as illustrated in FIG. 1. When magnification increases with the image point distance from the optic axis, the pincushion distortion occurs in which the image of a square has concave sides. In the opposite, when the magnification decreases with the image point distance from the optic axis, the barrel distortion occurs in which the image of a square has convex sides.
The distortion of an optical system can be reduced or compensated optically in the optical path of the system by controlling the physical attributes of one or more optical elements such as indices of refraction and physical dimensions of lenses in the system. One method uses composite lenses to achieve certain distortion correction. One limitation of such an approach is the complexity of the optical design. Manufacturing of such composite lens system often requires sophisticated fabrication and can be expensive. Hence, it may not be suitable for many mass-produced optical systems used in various applications such as digital cameras and camcorders.
Another limitation of the optical approach is that an optical design for compensating one type of geometric distortion may worsen one or more different aberrations. For example, a composite lens system designed for correcting either pincushion or barrel distortion may increase spherical aberration, chromatic aberration, coma, astigmatism, or Petzval curvature.
Therefore, it is desirable to find a different approach to correct geometrical distortions of an optical system.
In recognition of the above and other limitations of optical correction of distortions, the present disclosure provides a non-optical technique to correct the total distortion caused by the imaging optics at the image plane. This is accomplished by using a specially designed sensor array at the image plane to detect the distorted image and to reconstruct an image of the object with a substantially reduced distortion by using pixel signals.
An imaging device according to one embodiment includes imaging optics to receive radiation from an object and to project an image of the object to an image plane, and a semiconductor sensor array located adjacent or at the image plane to receive the image. The imaging optics produces a distortion having a distortion profile at least in a portion of said image. The sensor array has a plurality of sensing pixels arranged relative to one another to substantially reduce the distortion profile produced by the imaging optics so as to produce pixel signals indicative of the object with a reduced distortion.
The sensing pixels may be arranged in columns and rows and at least a portion of the columns and rows are curved in a manner determined by the distortion profile. In one implementation, each sensing pixel has a photosensitive area whose size depends on its position in the sensor array according to the distortion profile to correct a distortion in an intensity distribution associated with the distortion of the imaging optics. In another implementation, the sensing pixels each have photosensitive areas that are substantially identical to one another. Accordingly, a processing circuit is provided to modify the pixel signals to correct the distortion in the intensity distribution.
Further, an intensity distortion caused by the vignetting effect of the imaging optics and the sensor array may also be compensated for by changing the size of each photosensitive area or modifying output signal of each pixel according to its position in the sensor array.
A method for correcting optical distortion in an imaging system is also disclosed. First, a distortion profile of an imaging optics at a plane is determined. Then, a sensor array of sensing pixels is formed by arranging the sensing pixels in curved rows and columns based on the distortion profile. Next, the sensor array is placed adjacent or at the plane to convert an image produced by the imaging optics into pixel signals that represent an electronic version of the image with a reduced amount of distortion.

Compensation for optical distortion at imaging plane


A driver circuit includes: a variable power supply configured to apply a power supply voltage to a light emitting device and to vary a voltage value of the power supply voltage; a current-control switching device electrically connected to the light emitting device and configured to control a current flowing in the light emitting device; a detection part configured to detect a current value and a voltage value related to the current flowing in the light emitting device; and a control part configured to determine a minimum voltage of the power supply voltage based on a detection result of the detection part.

There is known a processing device for processing an object by light radiated from a light emitting device. Examples of such a processing device include a laser exposure device for performing light exposure of a resist with laser light, and a laser machining device for machining, for example, cutting, an object with laser light.
The processing device includes a light emitting device and a driver circuit for driving the light emitting device. The driver circuit includes a switching device for current-control electrically connected to the light emitting device. The current flowing in the light emitting device is controlled by the switching device for current-control to control the intensity of light radiated from the light emitting device.
In such a driver circuit and a processing device, heat generation in the switching device for current-control causes a decrease of the lifetime of the switching device for current-control. In this regard, for instance, a cooling mechanism may be used to cool the switching device for current-control. However, providing a large-capacity cooling mechanism causes an increase in the size of the driver circuit and an increase in manufacturing cost. Thus, in the driver circuit and the processing device, it is desired to reduce the heat generation in the switching device for current-control with a simple configuration.


A method and system for providing a user interface in a data processing system to be utilized for performing a plurality of tasks on a plurality of diverse central processing complexes, wherein processes utilized to perform the plurality of tasks are transparent to a user, and wherein the user interface utilized to perform the plurality of tasks is common across diverse central processor complexes. A library containing interface parameters for each central processing complex is established. The interface parameters include information necessary to tailor the user interface for the specific target central processing complex, as well as processes for performing selected tasks within each of the central processing complexes. The user is prompted to select a task for at least one of the diverse central processing complexes. At least one interface parameter from the library of interface parameters is selected in response to the user selecting a task for at least one of the diverse central processing complexes. The selected task is then performed, utilizing the interface parameter or parameters to execute processes for performing the selected task within a selected one of the diverse central processing complexes. As a result, the user interface allows the user to transparently execute processes utilized to perform a task on a central processing complex.

1. Technical Field
The present invention relates in general to improved data processing systems and in particular to a method and system for providing an improved interface for controlling a data processing system. Still more particularly, the present invention relates to a method and system for providing a common hardware system console interface for controlling a number of different data processing systems.
2. Description of the Related Art
A hardware system console is a display device that is directly connected to a processor controller or service processor for a central processing complex (CPC). The hardware system console provides an end-user interface, which may be utilized to perform functions related to operational control of the CPC such as, for example, initialization, configuration, diagnosis, customization, and recovery. A CPC is defined as those portions of a system, exclusive of I/O control units and devices, that can be controlled by a single operating system. A CPC typically consists of main storage, one or more central processing units, time-of-day clocks, and channels, which are or can be placed in a single configuration. A CPC also may include channel subsystems, service processors, and expanded storage, where installed.
A user may interact with the hardware system console by means of full screen panels and/or single line commands. The hardware system console user interface is generally not consistent across various hardware types, i.e., processor families. As a result, a user working with multiple processor types installed at a site may be faced with an unnecessary level of operational complexity due to the fact that the same task on different CPCs must be accomplished utilizing a different set of user interface interactions. The result of this added complexity is a steep learning curve for the user. Consequently, either more users are needed to control multiple diverse systems or additional time and expense are required to train a user to control multiple systems.
An additional cost also is present to the manufacturer of hardware system consoles since each time a new feature or function is to be supported on multiple processor types, duplicate development effort is required to add the support of that feature or function to the user interfaces of hardware system consoles.
Therefore, it would be desirable to have a hardware system console user interface that may be utilized on different hardware types while providing the same type of user interface interactions between different hardware types.

Method and system for providing a common hardware system console interface in data processing systems

International Business Machines Corporation


A tile shear testing apparatus and method is disclosed with a unit having a frame comprising a reaction head and an end plate secured together by a plurality of alignment rods. A movable head is positioned between the end plate and reaction head and is slidable along the alignment rods upon actuation of an expansion unit utilizing fluid pressure. The reaction head and movable head are positioned between two pieces of tile to impart force thereon to determine force necessary to shear the tile-floor bond as measured by a precise digital pressure readout. A swivel jaw engages the tile face and provides pivotable movement to reduce eccentric forces to reduce bending in the frame. Furthermore, the expansion unit's ram piston is positioned low, lying in or near the plane between the tile to reduce eccentric forces tending to bend the frame. The frame is configured to provide ample rigidity.

The present invention relates generally to testing bonding strength between a floor and tiles cemented to the floor, and more specifically is an improvement over the apparatus and method set forth in U.S. Pat. No. 4,823,611 to Young.
It is desirable to test the adhesion strength of cement used to bond tile to an underlying floor. One approach to this problem has been set forth in the aforementioned patent to Young. However, such device in actual usage has shortcomings which can produce inaccurate test results. For example, the Young device tends to pop out of the space between the two tiles being used in the test (reaction tile and test tile) when pressure is applied by the Young device on the tiles. As a result, operators of the Young device sometimes will actually stand on top of the device during operation to prevent it from popping out of the tiles. Such technique significantly distorts the accuracy of the data generated from the Young device.
The present applicant has concluded that two contributing causes to such inaccurate data from the Young device include: (1) force exerted in bending the Young device; and (2) frictional force between the Young device and the floor due especially to the operator standing on the Young device. Each of these problems tend to make the pressure readout on Young artificially higher since the readout actually reflects three forces: the force to bend the Young apparatus frame, frictional forces, and the force to overcome the tile-floor bond. However, with the first two forces not being accounted for, the Young readout tends to inaccurately suggest the tile-floor bond strength is greater than it actually is.
The present invention seeks to overcome these disadvantages of the Young apparatus and method, resulting in more accurate test data. Selected features of the present invention which help overcome these problems include the use of a swivel jaw to engage the face of at least one tile. Accordingly, if the faces of the two tiles to be engaged are not perfectly in alignment, the swivel jaw will compensate, thereby eliminating any eccentric or off-center forces which would tend to bend, twist, and distort the frame. Thus, undue forces are not introduced to bend the frame. Second, a more rigid frame is provided taking into account the cross-sectional moments of inertia along bending axes to provide greater rigidity. With this more rigid frame, less twisting or bending is likely to occur, resulting in more accurate test results. Third, the present invention is arranged so the test apparatus is bridged between the two tiles, rather than resting on the floor, avoiding any frictional forces between the test apparatus and the floor. Fourth, the present invention utilizes a more precise pressure readout with finer increments, allowing for greater precision of data. And fifth, the ram which moves the reaction head and the movable head apart is located on the bottom third of the heads, near the same plane as the tile being tested, to reduce eccentricity and associated bending of the test apparatus frame.


A wafer grounding apparatus and method adaptable to a charged particle beam apparatus is disclosed. A wafer substrate is supported by a wafer mount. A grounding pin is arranged to be in contact with a backside film formed on a backside of the wafer substrate. A grounding pulse generator provides at least one pulse to drive the grounding pin such that dielectric breakdown occurring at the backside film leads to establishment of a current path through the backside films. Accordingly, a current flows in the wafer substrate through this current path and then flows out of the wafer substrate via at least one current return path formed from capacitive coupling between the wafer substrate and the wafer mount.

A charged particle beam apparatus is one which is able to produce a 2-dimensional image of a wafer substrate by detecting secondary electrons, backscattered electrons, mirror electrons, or other kind of electrons from the surface of the wafer substrate upon impingement by a charged particle beam generated by the charged particle beam apparatus. Various charged particle beam apparatus are used on semiconductor wafers in semiconductor industry for various purposes such as wafer processing (for example e-beam direct write lithography system), process monitoring (for example critical dimension scanning electron microscope, or say CD-SEM), wafer inspection (for example e-beam inspection system), defect analysis (for example defect review SEM, or say DR-SEM and Focused Ion Beam system, or say FIB), etc. When such apparatus performs its function, the electrical potential of the wafer substrate needs to be held at a predetermined value, i.e. the wafer substrate has to be biased. This can be achieved by electrically, or more specifically saying, resistively connecting the target wafer substrate to a programmable DC voltage source (i.e. Wafer Bias Supply) when the wafer substrate interacts with the charged particle beam during which process excess charges are brought to the wafer substrate. This process will be referred to as "wafer biasing" in this specification.
For wafer biasing, the electrical contact from the wafer bias supply to the wafer substrate is conventionally made at the backside of the wafer substrate by using electrical contact(s) which press against the backside surface of the wafer substrate as the front surface of the wafer is inappropriate to place the electrical contact. However, the backside surface of the wafer substrate is usually covered by thin layers of dielectric materials such as silicon oxide and nitrides, created as sub-products of wafer manufacturing process steps. Therefore, the required conductance between the contact(s) and the wafer substrate generally cannot be established by simply pressing the contact(s) against the wafer's backside surface. A stable and low-resistance DC current path(s) between the electrical contact(s) and the wafer substrate must be established first. Such action is often referred to as "wafer grounding", and the term will be used throughout this application while the electrical contacts are called "grounding pins".
One of the conventionally used methods for wafer grounding is the mechanical piercing method. In this method, the grounding pin is made of hard conductive material with very sharp tip, which is used to physically pierce through the backside films and makes a direct contact to the wafer substrate thereby establishing a stable and low-resistance DC current path, which will be referred to as a wafer bias current path hereinafter, between the grounding pin and the substrate as the grounding pin is pressing against the backside surface of the wafer. Mechanical piercing method is simple and reliable, but it tends to create a large number of particles which may interfere with efforts to obtain high manufacturing yield of the finished products, i.e. semiconductor chips.
Another method commonly used is the electrical zapping method. FIG. 1 schematically illustrates the concept of conventional wafer grounding/wafer biasing apparatus employing the electrical zapping method. Wafer backside film(s) 12 is present on the back of a wafer substrate 13. Two contact pins 11A and 11B pressing against the wafer backside film(s) 12 are used as the grounding pins, and a high voltage pulse or pulses is applied between the two grounding pins 11A/11B by a grounding pulse generator 14 via a resistor 101R. The process produces two current paths, one 15A between drive-side grounding pin 11A and the wafer substrate 13 and the other 15B between return-side grounding pin 11B and the wafer substrate 13. In this specification, a drive-side grounding pin is a pin for creating a current path through which a current flows in the wafer substrate 13, and a return-side grounding pin is for creating another current path through which a current flows out of the water substrate 13. The electrical zapping method involves two successive dielectric breakdowns, the first between drive-side grounding pin 11A and the wafer substrate 13 whereupon the current path 15A is created, and the second between return-side grounding pin 11B and the wafer substrate 13 whereupon the current path 15B is established. When pulsing (by grounding pulse generator 14) is done and both of the current paths 15A/15B yield a stable and low-resistance DC current path, two wafer bias current paths with one between the drive-side grounding pin 11A and the wafer substrate 13 (will still be referred to as 15A) and the other between the return-side grounding pin 11B and the wafer substrate 13 (will still be referred to as 15B) are established. The wafer grounding is thus completed. Then, the grounding pins 11A and 11B are electrically disconnected from the grounding pulse generator 14 and the connection to the system ground, respectively, and the current return path from the wafer substrate 13 to the system ground is now switched to be connected to a wafer bias supply 16. The wafer bias supply 16 is for providing the proper bias voltage to the wafer substrate 13 through the above established two wafer bias current paths 15A/15B.
For more accurate description of the wafer grounding process, the following stray capacitances are taken in considerations. Small stray capacitances C1 and C2 are parasitic to drive-side grounding pin 11A and return-side grounding pin 11B, correspondingly. The grounding pins 11A and 11B are coupled to the system ground or the equivalent through the capacitances C1 and C2, respectively. Capacitance C3 is parasitic to wafer substrate 13. The wafer substrate 13 is coupled to the system ground or the equivalent through capacitance C3.
When the wafer grounding is being performed, the drive-side grounding pin 11A should be connected with the grounding pulse generator 14 i.e. node 102A is connected with node 102D, and the return-side grounding pin 11B should be electrically connected to the system ground i.e. node 102B is connected with node 102G.
As an initial state, the tips of the grounding pins 11A and 11B are pressing against the surface of the backside films 12. The wafer substrate 13 is electrically floated, DC wise, being isolated from the grounding pins 11A/11B by the backside dielectric film(s) 12. The potential of the substrate 13 is electro-statically held near ground level by capacitance C3.
A high-voltage (e.g., greater than 100 volts) grounding pulse or pulses are then applied from the grounding pulse generator 14 to the drive-side grounding pin 11A, via a resistor 101R and a connected switch SW (node 102A connected with node 102D, and node 102B connected with node 102G). When being applied to the grounding pin 11A, the grounding pulse(s) also charge up stray capacitance C1 and a small capacitance formed between the drive-side grounding pin 11A and the wafer substrate 13.
Very high electrical field is formed across the backside dielectric films 12 between drive-side grounding pin 11A and wafer substrate 13 (whose potential is held near ground level by the capacitance C3). This high electrical field causes a dielectric breakdown, the first dielectric breakdown, through the backside films 12 between the grounding pin 11A and the wafer substrate 13. A breakdown current thus flows through the backside films 12. The breakdown current is a very intense, short-duration pulse current sourced by the stray capacitance C1 and the small capacitance between the grounding pin 11A and the substrate 13. The flow of the breakdown current yields an initial current path 15A between the drive-side grounding pin 11A and the wafer substrate 13. The current path 15A initially may not necessarily be a stable current path and may be only temporarily present. Immediately following the breakdown current, additional current sourced by the grounding pulse generator 14 via resistor 101R starts to flow through the initial current path 15A. This subsequent current is named "grounding pulse current" for convenience of description in this application. There is no clear separation between the breakdown current and the grounding pulse current. However, the grounding pulse current may continue to flow until the grounding pulse generator 14 seizes pulsing. The grounding pulse current may reduce and/or stabilize the resistance of the current path 15A.
Generally, the dielectric breakdown process induces a structural damage on the backside dielectric films in the vicinity of the grounding pin, with a magnitude depending on the energy involved. The grounding pulse current may also lead to further damages on the backside film(s) 12 as it continues.
The current flowing into wafer substrate 13 (the breakdown current and the grounding pulse current combined) charges the capacitance C3, raising the electrical potential of the wafer substrate 13. Accordingly, a very high electrical field across the backside dielectric films 12 is formed between the wafer substrate 13 and the return-side grounding pin 11B and causes another dielectric breakdown, the second dielectric breakdown, through the backside films 12 between the wafer substrate 13 and the return-side grounding pin 11B, initiating a current path 15B. This time, the breakdown current (mainly sourced by the stray capacitance C2 and the small capacitance between the grounding pin 11B and the wafer substrate 13) may further include a rush current sourced by the charge stored in the capacitance C3 as the return-side grounding pin 11B is connected to the ground through low resistance DC path. As the current path 15B is generated, it will provide a DC return path for the grounding pulse current, increasing the current flowing through the current path 11A from the resistor 101R and letting a good portion of the current flow down to ground through the current path 15B and the rest flow into capacitance C3.
The breakdown current at the second break down produces a structural damage on the backside film(s) 12 in the vicinity of the return-side grounding pin 11B. As the grounding pulse current continues flowing until the grounding pulse(s) seizes, further structural damages may be caused on the backside films 12 in the vicinities of the grounding pins 11A and 11B. At the same time the resistances of the current paths 15A/15B may be reduced and/or stabilized.
When the grounding pulse generator 14 completes the last grounding pulse and each of the current paths 15A/15B yields a stable and low-resistance DC current path, a wafer bias current path is established at the same position of the individual current path 15A/15B, and the wafer grounding process is completed. The established wafer bias current paths will still be referred to as 15A (between grounding pin 11A and substrate 13) and 15B (between grounding pin 11B and substrate 13), respectively.
The overall wafer grounding/biasing process is then to be taken into the next phase, the wafer biasing process. The grounding pins 11A and 11B are electrically disconnected from the grounding pulse generator 14 and the connection to the system ground, respectively. Then, the both of the grounding pins 11A/11B are now connected to the wafer bias supply 16, i.e. node 102A is connected with node 102C and node 102B is connected with node 102F, in order to provide the proper bias voltage to the wafer substrate 13 through the wafer bias current paths for the subsequent operation.
Referring to FIG. 2, which is a schematic illustration of in-practice instrumentation of the conventional wafer grounding/wafer biasing apparatus. As shown, a wafer mount 17, such as an electrostatic chuck (e-chuck), is used to hold or support the wafer substrate 13. Before the wafer grounding is performed, the wafer substrate 13 needs be clamped by the e-chuck 17, which usually includes at least one positive electrode 17A (driven by a positive DC voltage V+), and at least one negative electrode 17B (driven by a negative DC voltage V−). An e-chuck power supply 19 supplies proper voltages to the positive electrode 17A and the negative electrode 17B.
Due to the substantially large areas of electrodes 17A/17B which face to the wafer substrate 13 with a small distance, large capacitances between each electrode(s) 17A/17B and wafer substrate 13 are incurred. For example, there is first chuck-referred capacitance Cw-ch+ between the wafer substrate 13 and the positive electrode(s) 17A, and second chuck-referred capacitance Cw-ch− between the wafer substrate 13 and the negative electrode(s) 17B.
In FIG. 1, the substrate stray capacitance C3 is assumed to be small as FIG. 1 is a conceptual model of wafer grounding apparatus where the effect of presence of e-chuck electrodes 17A and 17B is not considered. However, in real practice such as the configuration in FIG. 2, the size of capacitance hanging to the wafer substrate 13, Cw-ch+ and Cw-ch− combined, is substantially larger than the assumed capacitance C3 in FIG. 1. This may affect the structural damages actually caused to the backside film(s) 12 during the wafer grounding process.
For example, after the initial current path 15A is generated between the drive-side grounding pin 11A and the wafer substrate 13 by the first dielectric breakdown, the in-coming grounding pulse current needs to raise the potential of the wafer substrate 13 high enough to trigger the second dielectric breakdown between the wafer substrate 13 and return-side grounding pin 11B. This is done by the grounding pulse current charging the capacitances Cw-ch+ and Cw-ch−, both of which are significantly larger than the assumed stray capacitance C3 in FIG. 1. As a result, more significant structural damage may be caused to the backside films 12 in the vicinity of the drive-side grounding pin 11A as a much larger "net" current, i.e. the current integrated over time, flows through the current path 15A between drive-side grounding pin 11A and the substrate 13.
On the other hand, the rush current sourced by the capacitances Cw-ch+ and Cw-ch− running through the current path 15B created by the second dielectric breakdown between the wafer substrate 13 and the return-side grounding pin 11B will take a longer time to decay as a large quantity of charge has been stored in the capacitances Cw-ch+ and Cw-ch− and needs to be released. Therefore, severer structural damage on the backside film(s) in the vicinity of the return-side ground pin 11B may result.
For the foregoing discussions, a need has arisen to propose a novel wafer grounding/potential holding apparatus for effectively solving the grounding damage problem.

Wafer grounding and biasing method, apparatus, and application