A memory cell array (10) is divided into four blocks. Each block comprises a memory cell array block (10aand a memory cell array block (10b). A sense amplifier block (20) is disposed between the memory cell array blocks (10a) and (10b). Each sense amplifier block (20) is connected to the memory cell array blocks (10a) and (10b) via switching circuits (80a, 80b), respectively. Four decoders (51) are provided corresponding to the four blocks. The four decoders (51) are commonly provided with a driver (52) generating a high level driving signal. Each decoder (51) is responsive to an address signal for supplying a driving signal from the driver (52) to either one of the switching circuits (80a, 80b) and for applying a ground potential to the other one of the circuits. Accordingly, the sense amplifier block (20) is connected to either one of the memory cell array blocks (10a, 10b ).

1. Field of the Invention
This invention relates to a semiconductor memory device and a method of operation thereof, and more particularly to a dynamic type semiconductor memory device in which a sense amplifier is commonly used for a plurality of memory cell array blocks and an operating method thereof.
2. Description of the Background Art
FIG. 7 is a block diagram illustrating a configuration of a main section of a conventional dynamic random access memory (hereinafter referred to as DRAM) having 1M-bit memory capacity.
In a memory cell array 10 of FIG. 7, a plurality of word lines and bit lines are disposed to intersect one another, and memory cells are provided at their intersections. That is, a plurality of memory cells are arranged in a plurality of rows and columns. The memory cell array 10 is divided into four portions and each portion thereof is further divided into two memory cell array blocks 10a and 10b. The memory cell array 10 is thus divided into eight memory cell array blocks. Each of the memory cell array blocks 10a, 10b is of a 256.times.512 bit organization.
A row decoder 30 is disposed at the side portion of the memory cell array 10. Further, two column decoders 41 and 42 are disposed at the central section of the memory cell array 10. A decoder 30 selects any of the plurality of word lines in each memory cell array block 10a, 10b responsive to a row address signal. A plurality of memory cell array blocks 10a, 10b included in the memory cell array 10 are selected by a row address signal RA8. As shown in FIG. 7, if the row address signal RA8 is "1", four memory cell array blocks 10a (named A block) are selected and four memory cell array blocks 10b (named B block) are at a non-selected state. Conversely, if the row address signal RA8 is "0", four memory cell array blocks 10b are selected while four memory cell array blocks 10a are at the non-selected state.
A sense amplifier block 20 is disposed between the memory cell array blocks 10a and 10b in each portion of the memory cell array 10. This sense amplifier block 20 is of the configuration of a shared sense amplifier and is commonly used for two memory cell array blocks 10a and 10b. In each portion of the memory cell array 10, there is provided a switching signal generating circuit 60a generating a switching signal for connecting the sense amplifier block 20 to the memory cell array block 10a, and a switching signal generating circuit 60b generating a switching signal for connecting the sense amplifier block 20 to the memory cell array block 10b. For example, when the A block of the memory cell array 10 is selected as the row address signal RA8 is "1", the sense amplifier block 20 is connected to bit line pairs in the memory cell array block 10a responsive to a switching signal from the switching signal generating circuit 60a, while the sense amplifier block 20 is electrically separated from bit line pairs in the memory cell array block 10b responsive to a switching signal from the switching signal generating circuit 60b.
FIG. 8 is a circuit diagram illustrating the configuration of the main section of the DRAM in FIG. 7.
A plurality of bit line pairs and a plurality of word lines intersecting therewith are disposed in each of the memory cell array blocks 10a and 10b. In FIG. 8, a bit line pair BL, BL and a word line WL0 included in the memory cell array block 10a are typically illustrated, and a bit line pair BL, BL and a word line WL1 included in the memory cell array block 10b are also typically illustrated. A complementary signal appears on the bit lines BL and BL. Memory cells are provided at the intersections of the bit lines and word lines. A memory cell MC provided at the intersection of the bit line BL and word line WL0, and a memory cell MC provided at the intersection of the bit line BL and word line WL1 are typically illustrated in FIG. 8. Each memory cell MC is of an one-transistor one-capacitor configuration. That is, each memory cell MC is formed of a memory capacitor Cs for storing information and an N channel MOS transistor Q.sub.s.
An N channel-type sense amplifier 21 of flip-flop type and a P-channel type sense amplifier 22 of flip-flop type are provided between the memory cell array blocks 10a and 10b. These sense amplifiers 21 and 22 amplify a difference between the potentials of signals on the bit lines BL and BL. The N channel-type sense amplifier 21 is formed of N channel-type MOS transistors Q21 and Q22 while the P channel-type sense amplifier 22 is formed of P channel-type MOS transistors Q24 and Q25. These sense amplifiers 21 and 22 are activated by sense amplifier activating signals S0 and S0. An N channel type MOS transistor Q23 is turned on responsive to a sense amplifier activating signal S0 while a P channel-type MOS transistor Q26 is turned on responsive to a sense amplifier activating signal S0. Accordingly, the sense amplifier 21 discharges a bit line of low potential in the bit line pair BL, BL to a ground potential, while the sense amplifier 22 charges a bit line of high potential in the bit line pair BL, BL to a supply potential V.sub.CC. Each sense amplifier block 20 in FIG. 7 is formed of a plurality of N channel-type sense amplifiers and P channel-type sense amplifiers.
Since the memory cell array blocks 10a, 10b and the sense amplifier block 20 are of a shared sense amplifier configuration, there are provided a switching circuit 80a for electrically separating or connecting the bit line pair BL, BL in the memory cell array block 10a and the sense amplifiers 21 and 22, and a switching circuit 80b for electrically separating or connecting the bit line pair BL, BL in the memory cell array block 10b and the sense amplifiers 21 and 22. A switching circuit 80a is formed of N channel-type MOS transistors Q27, Q28 while the switching circuit 80b is formed of N channel-type MOS transistors Q29, Q30. The transistors Q27, Q28 have their gates supplied with a switching signal S1U from the switching signal generating circuit 60a shown in FIG. 7, while the transistors Q29, Q30 have their gates supplied with a switching signal S1L from the switching signal generating circuit 60b shown in FIG. 7. Both switching signals S1U and S1L are usually at the level of the supply potential V.sub.CC (hereinafter referred to as a V.sub.CC level).
Now, for example, when the potential of the word line WL0 goes to the "H" level so that information is read from the memory cell MC in the memory cell array block 10a, the switching signal S1L is at the level of ground potential (hereinafter referred to as a ground level) immediately before or at the same time the potential of the word line WL0 goes to the "H" level. Accordingly, the bit line pair BL, BL in the memory cell array block 10b is electrically separated from the sense amplifiers 21 and 22. The switching signal S1U subsequently goes to a higher level than the V.sub.CC level, so that the transistors Q27, Q28 become fully conductive, and the bit line pair BL, BL in the memory cell array block 10a is fully connected to the sense amplifiers 21 and 22.
When a column selecting signal Y supplied from column decoders 41 and 42 shown in FIG. 7 goes to the "H" level, N channel MOS transistors Q31 and Q32 are turned on, so that the information of sense nodes N1 and N2, which are common to both the sense amplifiers 21 and 22 is transmitted to an input and output line pair I/O, I/O.
Furthermore, an equalizing and precharging circuit 11 comprising N channel type MOS transistors Q33-Q35 is respectively connected to each bit line pair BL, BL of the memory cell array blocks 10a and 10b. In the standby periods before a memory cycle starts and after the memory cycle ends, the equalizing and precharging circuit 11 equalizes the potentials of respective bit lines of a corresponding bit line pair BL, BL responsive to an equalizing signal EQ, and precharges the bit line pair BL, BL to a prescribed precharging potential V.sub.BL. As above mentioned, since the switching signals S1U and S1L are at the V.sub.CC level in the standby period, the sense nodes N1 and N2 of the sense amplifiers 21 and 22 are also equalized and precharged.
Thus, the switching signals S1U and S1L are both usually at the V.sub.CC level; however, in memory operation, in order to connect the bit line pairs in the memory cell array blocks selected by the row address signals to the sense amplifiers, it is required that one of the switching signals S1U and S1L changes to a higher level than the V.sub.CC level while the other changes to the ground level.
FIG. 9 illustrates a circuit diagram of a switching signal generating circuit for generating a switching signal S1U or S1L. This switching signal generating circuit comprises N channel-type MOS transistors Q41-Q47 and capacitors C11, C12. In the case of the switching signal generating circuit 60a for generating the switching signal S1U, a transistor Q45 has its gate provided with a row address signal RA8. In the case of the switching signal generating circuit 60b for generating the switching signal S1L, the transistor Q45 has its gate provided with a row address signal RA8.
The operation of the switching signal generating circuit in FIG. 9 will now be described in reference to a timing chart of FIG. 10.
First of all, the operation of the switching signal circuit 60a for generating the switching signal S1U will be described. In a standby period, an input signal .phi..sub.P is at a higher level than the V.sub.CC level while an input signal .phi.3 is at the "L" level, and both the row address signals RA8 and RA8 are also at the "L" level. Accordingly, transistors Q41, Q42, Q43 shown in FIG. 9 are fully on while transistors Q45-Q47 are both off. The supply potential V.sub.CC is applied to the drains of the transistors Q41-Q43, so that the switching signal S1U outputted from an output terminal 61 is at the V.sub.CC level.
When the input signal .phi..sub.P then goes to the "L" level, the transistors Q41-Q43 are turned off. However, since the transistors Q45, Q47 are off, the switching signal S1U is maintained at the V.sub.CC level. When the row address signal RA8 then rises to the "H" level and then the row address signal RA8 is maintained at the "L" level, the transistors Q45, Q47 remain off since the row address signal RA8 is supplied to the gates of the transistors Q45, Q47. When the input signal .phi.3 rises to the "H" level thereafter, the gate potential of the transistor Q44 is boosted by the capacitor C11 so as to be a sufficiently higher level than V.sub.CC level. Further, the drain potential of the transistor Q44 is boosted by the capacitor C12 to be a sufficiently higher level than the V.sub.CC level. Accordingly, the switching signal S1U rises to a higher level than the V.sub.CC level via the transistor Q44. Finally, when the input signal .phi..sub.P rises to a higher level than the V.sub.CC level, the switching signal S1U goes back to the V.sub.CC level.
As described above, when the row address signal RA8 is at the "H" level, and the row address signal RA8 is at the "L" level, the switching signal S1U goes to a higher level than the V.sub.CC level.
The following description is about the case in which the row address signal RA8 falls down to the "L" level while the row address signal RA8 rises to the "H" level. The operation until the changes of the row address signals RA8 and RA8 is the same as the one mentioned above, so that a switching signal S1U is at the V.sub.CC level. As shown by a dashed line in FIG. 10, if the row address signal RA8 is maintained at the "L" level and the row address signal RA8 rises to the "H" level, the transistors Q45, Q47 are turned on. Accordingly, as shown by another dashed line in FIG. 10, the switching signal S1U goes to a ground level via the transistor Q45. The gate potential of the transistor Q44 also goes to a ground level via the transistors Q46, Q47. When the input signal .phi.3 rises to the "H" level, the drain potential of the transistor Q44 is boosted to a sufficiently higher level than the V.sub.CC level by the capacitor C12. However, since the gate potential of the transistor Q44 is at the ground level via the transistors Q46, Q47, and an output terminal 61 is grounded via the transistor Q45, the switching signal S1U remains at the ground level.
Both the row address signals RA8 and RA8 then fall down to the "L" level. The input signal .phi..sub.P remains at the "L" level at this time, so that the transistors Q41-Q43 are kept off while the switching signal S1U is maintained at the ground level. Finally, when the input signal .phi..sub.P rises to a sufficiently higher level than the V.sub.CC level, the switching signal S1U changes to the V.sub.CC level.
Thus, if the row address signal RA8 is at the "" level and the row address signal RA8 is at the "H" level, the switching signal S1U goes to the ground level.
In the case of the switching signal generating circuit 60b for generating the switching signal S1L, the transistor Q45 has its gate provided with the row address signal RA8 substituted for the row address signal RA8.
The operation of the switching signal generating circuits 60a and 60b is summarized in FIG. 11. That is, when all the row address signals RA8 and RA8 are at the "L" level, both the switching signals S1U and S1L are at the V.sub.CC level. Further, when the row address signal RA8 rises to the "H" level and the row address signal RA8 falls down to the "L" level, the switching signal S1U rises to a higher level than the V.sub.CC level and the switching signal S1L goes down to the "L" level (ground level). On the contrary, when the row address signal RA8 goes down to the "L" level and the row address signal RA8 goes to the "H" level, the switching signal S1U falls down to the "L" level while the switching signal S1L rises to a higher level than the V.sub.CC level.
As aforementioned, in a conventional DRAM shown in FIG. 7, the switching signal generating circuit 60a having the circuit configuration of FIG. 9 is provided at each memory cell array block 10a, and the switching signal generating circuit 60 b having the circuit configuration of FIG. 9 is provided at each memory cell array block 10b. The capacitor C12 for boosting the switching signal S1U or S1L to a higher level than the V.sub.CC level, requires a larger area than the other elements. In the above described conventional DRAM, while boosting operations are performed in the four switching signal generating circuits 60a, they are not performed in the other four switching signal generating circuits 60b. On the contrary, while the boosting operations are performed in the four switching signal generating circuits 60b, they are not performed in the other four switching signal generating circuits 60a. Nevertheless, one switching signal generating circuit 60a and one switching signal generating circuit 60b are required for each memory cell array block 10a and 10b, respectively. Therefore, a large number of capacitors necessary for boosting operations need to be formed, so that there is a problem that a large circuit area is needed.
It can also be conceived that one switching signal generating circuit is provided for four memory cell array blocks 10a, and one switching signal generating circuit is provided for four memory cell array blocks 10b. However, in this case, the total area of capacitors included in one switching signal generating circuit is larger than the total area of capacitors included in four switching signal generating circuits having the circuit configuration of FIG. 7.

Semiconductor memory device having shared sense amplifier and operating method thereof


An antenna failure detecting device that can avoid erroneous detection and use a reference voltage of relatively low precision is includes a switch that can short-circuit both the ends of a resistor inserted in a common line. Only when the voltage between both the ends of the resistor is detected, the switch is “disconnected” (off), and when the voltage between both the ends of the resistor is not detected, the switch is “connected” (on). Therefore, the effect of the resistor can be excluded, and the unnecessary loss of the common line at the non-detection time can be eliminated. Furthermore, the resistor is used only at the failure detection time, and thus the resistance value of the resistor can be freely increased. Therefore, a large voltage between both the ends can be taken out, and the permissible range of the reference voltage for failure judgment can be broadened, so that a reference voltage of low precision can be used.

1. Field of the Invention
The present invention relates to an antenna failure detecting device, and more particularly to a device for detecting failure of an antenna which is disposed in the neighborhood of a signal operating circuit such as an amplifier or the like, commonly uses a transmission line of a transmission signal or reception signal or a transmission/ reception signal and a power supply line to the signal operating circuit and contains the signal operating circuit, wire breaking or short-circuit of a common used line, and failure such as breakaway or contact failure of a connecting portion such as a connector or the like when the connecting portion exists in the line concerned.
2. Description of Related Art
In general, an antenna of radio equipment is frequently provided at a place separated from the main body of the radio equipment. The position of the main body of the radio equipment is determined in consideration of resistance to environment, maintenance, operability or connectivity to other electronic equipment, however, the position of the antenna is usually determined by attaching importance to communication performance.
With respect to some radio equipment, a signal operating circuit such as a head amplifier, a pre-amplifier or an end-amplifier may be used to enhance the gain of the antenna. Normally, the signal operating circuit as described above is disposed in the neighborhood of the antenna element. For example, when the signal operating circuit is an amplifier, a more excellent signal-to-noise ration (S/N ratio) is achieved as the signal operating circuit is provided to be nearer to the antenna element.
In an antenna having a signal operating circuit installed therein, it is indispensable to supply power to the signal operating circuit. However, a ling for power supply is commoditized with a transmission line for a transmission signal or reception signal or a transmission/reception signal (hereinafter referred to as common line). By multiplexing DC power supply voltage with high-frequency (AC) transmission signal or reception signal or transmission/reception signal, the number of lines can be reduced and thus the cost can be reduced.
The antenna having the complicated construction as described above is lower in failure resistance than the antenna having a simple construction (only an antenna element and a signal line). This is because it has the signal operating circuit such as the amplifier or the like and thus the number of parts is increased. Furthermore, there is some probability that a trouble such as breaking or short-circuiting of the common line occurs. When a connecting portion such as a connector or the like exists in the common line, there is also some probability that a trouble such as breakaway or contact failure of the connecting portion occurs.
It is needless to say that such a trouble disturbs the operation of the radio equipment, and it is required to detect it and take a required countermeasure (notify or the like) by some method.
FIG. 6 is a conceptual diagram showing a related art (for example, see JP-A-2002-319907). In this figure, a radio equipment body 1 and an antenna 2 are connected to each other through a common line 4 in which a first resistor 3 is inserted. The common line 4 transmits the reception signal of the antenna 2 and the DC power supply voltage V occurring in a power source 5 of the radio equipment body 1 while multiplexing them. The power supply voltage V is applied to both the terminals of a signal operating circuit provided to the antenna 2, for example, a low noise frequency converter (LNB) 6 and a second resistor 7 connected to LNB 6 in parallel. "Z0" affixed to LNB 6 represents impedance of LNB 6, "Z1" affixed to the first resistor 7 represents the value (resistance value) of the first resistor 7, and "Z2" affixed to the second resistor 3 represents the value (resistance value) of the second resistor 3.
In the construction as described above, the voltage Vs across the first resistor 3 is proportional to the load current I flowing in the common line 4, and thus the trouble in the common line 4 or the antenna 2 can be detected on the basis of the across voltage Vs. For example, when wire breaking occurs at some midpoint of the common line 4 (the position of a mark X (P), conveniently), the load current I is equal to zero (the voltage Vs is also equal to zero). Furthermore, when LBN 6 is broken in wire or opened, the impedance of the antenna 2 is equal to Z1, and it is higher than normal one (a parallel value of Z0 and Z1), so that the load current I is reduced (the across voltage Vs is also lowered). Furthermore, when LBN 6 or the common line 4 is short-circuited, the load current I is maximum (the across voltage Vs is also maximum).
Accordingly, when any one state of "across voltage Vs=0", "across voltage Vs<first reference voltage" and "across voltage Vs>second reference voltage" is set, occurrence of a trouble such as wire-breaking or short-circuiting of the common line 4, wire-breaking or opening of LBN 6 or the like can be detected.
However, the conventional antenna failure detecting device as described above has a problem that the line resistance of the common line 4 is large and thus the loss cannot be neglected. This is because the first resistor 3 is inserted in the common line 4 at all times, and the resistance value *Z2) of the first resistor 3 is added to the line resistance of the common line 4 itself. By reducing the value (Z2) of the first resistance 3, the loss can be reduced. However, if the resistance value (Z2) is reduced, the across voltage Vs of the first resistor 3 is also reduced, so that erroneous detection is liable to occur. Furthermore, a high-precision reference voltage (first and second reference voltages) adapted to the minute across voltage Vs must be used, and thus the cost-up is unavoidable.


A frequency synthesizer and a frequency synthesis method thereof are provided. The frequency synthesizer includes a phase-locked loop unit, a voltage-controlled oscillating unit, and a frequency mixing unit. The phase-locked loop unit receives a reference signal and a feedback injection signal and generates a first oscillating signal according to the reference signal and the feedback injection signal. The voltage-controlled oscillating unit receives the feedback injection signal and generates a second oscillating signal according to the feedback injection signal. The frequency mixing unit is coupled to the phase-locked loop unit and the voltage-controlled oscillating unit, receives the first oscillating signal and the second oscillating signal, and mixes the first oscillating signal and the second oscillating signal to generate the feedback injection signal and an output signal.

1. Field of the Invention
The present invention generally relates to a frequency synthesizer, and more particularly, to a wideband frequency synthesizer with a feedback injection locking mechanism.
2. Description of Related Art
Wireless communication products and techniques, such as mobile phones, wireless local area networks (WLAN), Bluetooth, ultra wide bands (UWB), industrial scientific and medical (ISM) radio bands, and worldwide interoperability for microwave access (WiMAX) have been widely used in our daily life along with the development of wireless technologies in recent years. Thus, frequency synthesizers have been developed and applied to meet the requirements of local oscillating signals and communication channel selection in wireless communication systems.
To be specific, a frequency synthesizer provides a local oscillating signal to a radio frequency transceiver for the purpose of the frequency up/down conversion and linear modulation. Accordingly, the quality of the local oscillating signal is a major factor in signal transmission performance. The spectrum purity of the local oscillating signal affects not only the accuracy of the transmitted data but also the quality of the system channel. Particularly, in a multi-carrier system (for example, an orthogonal frequency division modulation (OFDM) communication system), high-density orthogonal carriers require high spectrum purity of the local oscillating source. In a wireless and frequently-used application, a frequency synthesizer has to be able to generate a pure and stable local oscillating signal in order to be integrated with a wireless transceiver.
Additionally, with the fast spreading of applications of communication technologies, large quantities of data are desired to be transmitted quickly. As a result, a wide transmission frequency bandwidth is desired to increase the bit transmission rate. Because a conventional frequency synthesizer has only one voltage-controlled oscillator, the frequency synthesizer usually has a narrow operating bandwidth therefore cannot meet the requirement of an existing multi-standard communication system for operating bandwidth. Thus, many wideband frequency synthesizers have been developed and discussed in recent years. In such a conventional wideband frequency synthesizer, multiple phase-locked loop circuits or multiple frequency dividers are adopted along with a multiplexer to make the output frequency to fall on different operating frequency band. In addition, a combination of different frequency synthesizers also allows the output frequency to fall on different operating frequency band therefore can meet the requirement of a broadband application.
However, the conventional techniques usually require very complicated hardware circuit designs and a long time for locking the frequency. In other words, a conventional wideband frequency synthesizer usually comes with a large circuit structure, a high power consumption level, and accordingly a high manufacturing cost. The frequency synthesizer integrated circuit in an existing communication system should offer a high efficiency and a low cost. Thereby, how to design a frequency synthesizer which is ideal and satisfactory has become a major subject in the industry.

Frequency synthesizer and frequency synthesis method thereof


A method is disclosed for monitoring a complex system, such as a fleet of aircraft, having multiple sub-systems described by a plurality of operating parameters. Data pertaining to the operating parameters is continually generated during operation of the vehicles. The data is normalized to take into account variability factor and stored in a central database. New incoming data from the sub-systems is continually compared with the stored data to identify abnormalities. The invention is applicable to the monitoring of a fleet of aircraft.

1. Field of the Invention
This invention relates to generally to the field of data mining, and in particular to of monitoring a complex system having multiple sub-systems described by a plurality of operating parameters. The invention is particularly well suited to identifying abnormal behavior in a fleet of vehicles, but it can be applied to other complex systems. The invention is primarily applicable to aircraft, but could be applied to other types of vehicle. Such behavior might, for example, relate to engine operation or other critical flight systems. The behavior is measured in parameters that might include exhaust gas temperature, core vibration, fuel flow etc.
2. Description of Related Art
Efficient operation and maintenance of modern aircraft, particularly xe2x80x9cfly-by-wirexe2x80x9d aircraft involves processing large amounts of sensor data. Sensors continually monitor all aspects of flight systems. Proper use of the data requires an understanding of its contents, the ability to analyze it properly, and the ability to identify when and in which part of a large fleet of aircraft a particular condition or performance parameter is not within the allowable range. Proper alerts must be generated for maintenance staff along with an explanation of the probable cause for an abnormal situation.
This requires access to a variety of data, the most important part of which is sensor measurement/data included in individual aircraft reports (e.g. engine cruise report, engine, take off report). These reports are generated on a regular basis pursuant to a request or when a deviation of one or more parameters occur. The operation and proper maintenance of aircraft becomes more difficult as the airline fleet becomes larger and more and more parameters need to be closely monitored. Engineers and fleet specialists must constantly be aware of the status of all aircraft systems and must be able to investigate any abnormal behaviors as soon as they occur. The investigation requires an explanation as what may be the cause of any abnormal situation.
One possible approach to the above problem is to analyze aircraft parametric data, using a data analysis tool, and search for patterns or useful information in the data that may explain the problem. Almost all commercial data analysis tools assume that the data collected from a particular process (such as the operation of an aircraft) can be easily analyzed, trends and patterns accurately recognized and any discoveries presented to the user in an understandable way. Aerospace is one of the domains in which these assumptions are not valid. Even when a data analysis tool is selected, all users must have sufficient training and time to acquire the data, properly use the data analysis tool and go through the ordinary process of data analysis in order to discover a useful knowledge that they need. However, in the aerospace industry, like many other industries, it is difficult to expect engineers and technicians to follow the normal data mining path. Several reasons exist for this. All the required data may not be integrated into one database management system. The engineers and operators do not have sufficient time to analyze huge amounts of data, unless there is an urgent requirement. Complexity of the data analysis process is beyond the ordinary tools that they have access to, in most cases. There is no well defined automated mechanism to extract, pre-process and analyze the data, and summarize the results so that the engineers and technicians can use it. Even when there are tools available for data analysis, these tools are specific for certain tasks defined by the vendors.
There are two possible approaches to this problem. One approach is the batch mode in which an aerospace engineer has to select a given amount of historical data and having a problem in mind uses a commercial data mining software tool to analyze the data and search for useful patterns in the data. This is usually an iterative and time consuming process that may help in identifying an abnormal situation in the operation of the aircraft for which the data was collected.
In the batch mode, the data collection and selection process is time consuming and has to be accurate. The user has to have a good understanding of the data mining process and the problem for which the data mining tool is used. In many cases, there is a need for data cleaning, as there may be various problems in the data, such as out-of-range data, missing data, etc. The user needs to have some leads as to where there is a problem so that relevant data is selected and analyzed. In many cases, even when there are some results, it may be too late for aerospace engineers to properly use them. Finally, the user needs an explanation as to what may be the cause of any problem.
The other approach is the on-line mode, in which a vendor (such as an engine manufacturer) provides a software application that can be used to generate alerts about the performance of certain system parameters for which the software has been designed. The problem with this mode is that the airline staff need to acquire dedicated software for every system for which they have the data and want to monitor performance. This is not possible for all systems on board today""s aircraft as there is no monitoring software for every system for which the data is available. Even when such software systems are used, airline staff can only monitor parameters that these software systems are capable of monitoring. An example is SAGE software provided by General Electric to monitor certain parameters of aircraft engines. Systems such as SAGE generate alerts that are not necessarily relevant for a given airline, due to different modes of operation. Finally, there is no explanation to support any identified abnormal situation as to what maybe the cause of that situation.
A data mining system has been described in the above SAGE system that continually gathers data from a number of sources and generates alerts when certain normalized thresholds are exceeded. While this is an excellent potential technique for solving the above problems, it does not take into account the realities of the real world, where one needs to take into account the performance of the fleet as a whole. For example, as the fleet as a whole ages, the nominal thresholds will shift.
There is a need to a monitoring system that will alleviate these shortcomings of the prior art.
According to the present invention there is provided a method of monitoring a complex system having multiple sub-systems described by a plurality of operating parameters, comprising continually generating data pertaining to said operating parameters during operation of said system; storing said data in a central database; defining a window of samples over which data is to be analyzed; normalizing said data to take into account variability factors and introduce a weighting factor to define thresholds dependent on the performance of individual monitored components and the performance of said components across the fleet; storing said defined thresholds for said defined window; and continually comparing new incoming data from said sub-systems with said stored defined thresholds to identify abnormalities in the system.
The weighting factor in the calculation of the threshold is important to allow the effects of the sub-systems, typically aircraft, and the complex system, typically the fleet, to be balanced. The weighting factor prevents the generation of unnecessary alerts. Introduction of the weighting factor resulted from extensive experiments in which a weighting factor was not used and the effects of both aircraft and fleet mean and standard deviation were equally taken into account.
The invention permits all aircraft systems (e.g. auxiliary power units, main engines) for which data is available to be continuously monitored using an integrated software system. The monitoring is performed so that the fleet specialists and engineers are informed of conditions when there is a deviation in the range of one or more parameters (such. as exhaust gas temperature), compared to an expected level which is dynamically adjusted as a function of certain operation and data conditions, or when there is an abnormal behavior in the operation of a system (such as an upward or a downward trend in certain performance parameters) that may cause performance deterioration of one or more systems.
First, the data generated by the aircraft is pre-processed and stored in a database. The pre-processing is performed so that a more accurate representation of the data is used throughout the fleet monitoring process. It is also important so that as many relevant parameters as possible are used for the monitoring process and a useful level of precision is applied for the parameter values. The pre-processed data, that contains new features, is then provided to the fleet monitoring module which searches for trends and other useful information related to abnormal behaviors of aircraft systems. An alert is generated for every abnormal situation that is identified. Alerts generated through this process are presented to the users (engineers and fleet specialists) for their attention. Depending on the type of alert and its relevant parameters, different actions nay be taken upon each alert. The user could also request for additional information about the cause of an alert.
The invention allows early identification of the problems related to abnormal situations of aircraft. There is no need to use multiple software systems to monitor different aircraft systems (e.g. auxiliary power units, engines, avionics, etc.). Only problematic aircraft and their systems are flagged without waiting for the airline staff to search for problems. The detection of trends in data and identification of abnormal situations is based on the airline method of operation rather than on test cell data.
Alerts can be received and filtered, as per user""s level of interest and responsibility. Machine learning techniques can provide further explanation about the cause of alerts.
The invention is generic and independent of the system for which it is used. It can be applied to other domains where complex systems need to be closely monitored and properly maintained. An example is clean room equipment in semiconductor wafer fabrication.

Method of identifying abnormal behavior in a fleet of vehicles


A slew rate booster, switchably enabled selector, or other arrangement may be included in a cascode amplifier to keep the current buffer/common gate transistor and the input/common source transistor saturated as the voltage at the source of the current buffer transistor drops during a transient input voltage spike at the gate of the input transistor. In some instances a higher potential may be supplied to a gate of the current buffer transistor during an initial phase of the settling period than during a second phase of the settling period when a lower potential may be applied. Other techniques may be used in different embodiments. Devices and methods are provided.

Cascode amplifiers typically include a transconductance amplifier coupled to a current buffer. Existing cascode amplifiers may include a pair of field-effect transistors coupled together, with one converting an input signal voltage to a signal current and having a common source and the other acting as current buffer and having a common gate. When the cascode amplifier is used in a switched-capacitor configuration, the switched-capacitor circuit may sample in a first period of the clock cycle and the amplifier may amplify the sampled signal in a second settling period of the clock cycle. The length of this settling period depends on the clock of the switches. A transient surge may occur at the amplifier input at the beginning of the settling period. As the settling period progresses, feedback at the amplifier input may cause the amplifier input signal to settle towards a final value, which may be reached at the end of the settling period. The amplifier output also reaches its final value at the end of the settling period.
In an NMOS transistor cascode amplifier, a transient surge of the amplifier input voltage causes the current flowing through the common-source input transistor and common-gate buffer transistor to increase. The voltage at the source of the common-gate transistor also decreases, since a fixed bias voltage is applied to its gate. If this voltage drop is large enough, the common-source input transistor leaves the saturated region and enters the triode region, which in turn limits the amplifier slew-rate.
As the settling time is fixed, the limited slew rate decreases the settling accuracy of the amplifier. While increasing the amplifier bandwidth in these instances had been shown to offset the decreased settling accuracy, the increased amplifier bandwidth also increased the resulting noise. Thus, a tradeoff existed between settling accuracy and noise in cascode amplifiers. The inventors perceive a need to increase the slew rate of cascode amplifiers in order to improve the settling accuracy, reduce the small signal bandwidth of the amplifier, and/or reduce the accompanying noise.


Headphones include a pair of cups, each housing a speaker to be positioned over an ear of a user, a processor, a cooling mechanism disposed within each of the cups to regulate environmental conditions inside of the cups to match environmental thresholds provided by a virtual reality device displaying a virtual reality environment to the user, a temperature sensor and at least one additional environmental sensor disposed within each of the cups to monitor the environmental conditions inside the cups, the processor to subsequently analyze data associated with the sensors and compare the data to the environmental thresholds and the processor to selectively activate the cooling mechanism based on the comparison.

Many devices can be used to display audiovisual media including a smart phone, a tablet, an MP3 player, or a computer. A virtual reality (VR) system, however, seeks to more completely immerse the user in audiovisual media. To immerse the user in audiovisual media, a VR system includes a display and connects to other devices such as headphones. The display presents the visual component of the audiovisual media. The headphones present the audio. Headphones are designed to be worn on or around the head of the user and may fit over the user's ears. With headphones over the user's ears, ambient sound may be less perceptible to enhance the feeling of immersion in the VR media
Throughout the drawings, identical reference numbers designate similar, but not necessarily identical, elements.

Regulating environmental conditions inside cups of headphones

Hewlett-Packard Development Company, L.P.


A process for improving combustion of liquid hydrocarbons and reducing NO.sub.x emissions. The process comprises burning the liquid hydrocarbon in the presence of an additive composition to improve measurably the combustion efficiency. The additive composition comprises a dicyclopentadienyliron compound in combination with a suitable organic solvent. By virtue of using the additive compound, the excess air requirements can be adjusted downwardly to reduce NO.sub.x emissions in combustion products.

Liquid hydrocarbons are widely used in open flame and internal combustion devices such as oil fired burners and internal combustion engines. One of the common problems associated with such combustion devices is the emission of NO.sub.x. Many attempts have been made in the past to reduce NO.sub.x emissions but these normally have resulted in reduction of combustion efficiency.
Oil fired furnaces and boiler arrangements are used world-wide in producing heat and electricity. Normally, petroleum distillates such as fuel oils are used in such oil fired burners. It is highly unusual to burn directly mined crude oil because of the considerable increase in pollutants in the combustion of the products, particularly soot emissions.
It has been appreciated for some time that additives may be included in organic materials which are used in oil fired furnaces and the like. A particularly suitable additive is ferrocene which is one of many of dicyclopentadienyl iron compounds. Examples of these additive constituents are disclosed in U.S. Pat. No. 3,535,356. This patent mentions that ferrocene and its derivatives are valuable additives in various organic compositions particularly hydrocarbons comprising gasolines and other petroleum products including lubricating oils, turbine oils, transformer oils, kerosines, diesel fuels, jet fuels, fuel oils, greases, asphalts, waxes, insecticides and the like. It is not mentioned, however, in this reference what, if any, effect ferrocene may have on the combustion of these products. However, in U.S. Pat. No. 3,122,577 mention is made that ferrocene is suitable as an antiknock agent in gasoline compositions.
U.S. Pat. No. 3,341,311 discloses the use of ferrocene in liquid hydrocarbon fuel oils. The purpose of the ferrocene is to improve the ignition and combustion characteristics of the fuel. The use of such ferrocene in fuel oils as per the examples, reduces the presence of carbon in the combustion gases, and decreases the amount of deposits in the combustion apparatus.
None of these references, however, contemplate the use of ferrocene and its derivatives in liquid hydrocarbons to achieve improvement in the combustion efficiency and reduction in NO.sub.x emissions.


An assembly comprising a first article, a second article adjacent the first article, and an electrically conductive adhesive in electrical communication with the first article and the second article. The electrically conductive adhesive comprises nickel nanostrands dispersed in a matrix comprising a reaction product of bisphenol-F epoxy resin, resorcinol diglycidyl ether epoxy monomer, and at least one amine-containing curing agent. The electrically conductive adhesive exhibits a tensile adhesion strength greater than about 5,000 psi and a volume resistivity less than about 0.01 Ω·cm. Electrically conductive adhesives including nickel nanostrands, precursor packages of the electrically conductive adhesive, related methods of forming the electrically conductive adhesive and an assembly including the electrically conductive adhesive are also disclosed.

Space vehicles, such as space shuttles, rockets, satellites, missiles, etc., may be exposed to hostile conditions characterized by high temperatures and turbulence during flight (e.g., launch, ascent, re-entry, etc.). Such space vehicles are formed of multiple components secured together or in adjacent relationship, and may require both thermal protection systems and electrical protection systems to protect the space vehicle from damage that may be caused during flight.
For example, a space vehicle may be exposed to extreme temperatures such as exhaust plumes, heat generated by atmospheric friction during launch and re-entry, etc. Excessive heat may damage one or more portions of the space vehicle, including, for example, wings, nozzles, a nose cone, fuel tanks, engine exhaust ducts, re-entry shield surfaces, etc. Accordingly, space vehicles are often equipped with a thermal protection system (TPS), which may be incorporated in one or more parts of the space vehicle that are exposed to high temperatures or large temperature gradients. A TPS conventionally employs assemblies in the form of a multi-component structure comprising a plurality of insulative panels or tiles attached to the surface of a structure or member that is intended to be protected by the TPS, such as on outer surfaces of a re-usable space shuttle used by NASA. Conventional composite materials may include reinforced carbon-carbon (RCC), fibrous refractory composite insulation tiles (FRCI), ceramic matrix composites (CMCs), etc. Such thermally insulative materials are designed and configured to protect the space vehicle frame from temperatures encountered during flight, such as re-entry into Earth's atmosphere (which temperatures may exceed about 1,260° C.).
In addition to thermal protection systems, space vehicles conventionally include one or more systems to protect the space vehicle from direct and indirect lightning strikes (lightning strike protection (LSP) systems), electrostatic discharge (ESD), or electromagnetic interference (EMI). For example, a lightning strike protection system may provide a relatively low electrical resistance pathway from a location of a lightning strike to a location where electric charge from the lightning strike can dissipate, to reduce or prevent damage to the spacecraft. In addition, charges may build up on surfaces of the space vehicle over time (such as by triboelectrification), eventually resulting in ESD. The ability to effectively manage lightning strikes and ESD on composite materials that form structural components of space vehicles is a significant safety consideration for the space vehicles.
Conventional thermal protection systems, which include materials that are disposed on exterior surfaces of the space vehicle, often include electrically insulative composite materials. Thus, in some instances, the space vehicle may include an electrically conductive film on exterior surfaces of the space vehicle, or multi-layered composites that include conductive meshes or foil layers to dissipate charge from lightning strikes or ESD. However, some foils may be expensive and prone to mechanical failure. Further, high currents from lightning strikes or ESD may damage sites of electrical discontinuity where the current may arc, such as at locations between composite panels, mechanical fasteners, joints, fiber interfaces, etc. Electrically conductive adhesives disposed between adjacent panels may include a large volume of silver filler materials to provide electrical conductivity to the conductive adhesive. However, the large volume of silver required for sufficient electrical conductivity reduces an adhesion strength of the adhesive and, thus, materials adjoined by the adhesive may debond in the event of a lightning strike or ESD. Further, the large volume of silver may also be cost prohibitive in many applications.

Electrically conductive adhesives, assemblies including the electrically conductive adhesives, and related methods


The catalytic efficiency of supported catalysts containing metal nanoparticles is strongly related to the chemical softness at the surfaces of such nanoparticles. The chemical softness of a nanoparticle is obtained using results from Density Functional Theory modeling, an extended version of Embedded Atom Method modeling, and continuum modeling based on size and shape of the nanoparticle. A metal nanoparticle of a certain size and shape is first modeled using the extended EAM and EAM parameters that have been validated with results from DFT modeling, to obtain atomic energy densities at each atom location. The chemical softness value at each atom location is then calculated from the atomic energy densities and various parameters that are derived based on results from DFT modeling. The surface chemical softness value is derived from the local chemical softness values based on the geometry and atomistic structure of the metal nanoparticle.

1. Field of the Invention
The present invention relates to supported catalysts, more specifically to supported catalysts containing nanometer sized platinum particles dispersed throughout the catalyst support material.
2. Description of the Related Art
Many industrial products such as fuels, lubricants, polymers, fibers, drugs, and other chemicals would not be manufacturable without the use of catalysts. Catalysts are also essential for the reduction of pollutants, particularly air pollutants created during the production of energy and by automobiles. The majority of industrial catalysts are composed of a high surface area support material upon which chemically active metal nanoparticles (i.e., nanometer sized metal particles) are dispersed. The support materials are generally inert, ceramic type materials having surface areas on the order of hundreds of square meters/gram. This high specific surface area usually requires a complex internal pore system. The metal nanoparticles are deposited on the support and dispersed throughout this internal pore system, and are generally between 1 and 100 nanometers in size.
The effect of nanoparticle size on catalytic activity is recognized in the current art. An article by Alexis T. Bell entitled, "The Impact of Nanoscience on Heterogeneous Catalysis," Vol. 299, Science, Mar. 14, 2003, teaches that the reactivity and selectivity of catalyst nanoparticles are strongly dependent on their size. FIG. 1 is a diagram from this article which shows that the catalytic activity (in particular, CO oxidation) of Au particles is sensitive to their size and that only particles in the range of 2 to 3 nm are active.

Method of estimating chemical reactivity of nanoparticles


A processing device receives a transactional object at runtime of a compiled application, the transactional object comprising first transactional logic. The processing device determines a locking strategy to use for the transactional object. The processing device generates a transactional proxy for the transactional object, the transactional proxy comprising a transactional marker, a pointer to the transactional object, and second transactional logic that supersedes the first transactional logic. The processing device passes the transactional proxy to the application, wherein the application is to make calls on the transactional proxy instead of on the transactional object.

Distributed transactions are often performed on distributed computing systems. A distributed transaction is a set of operations that update shared resources. Distributed transactions must satisfy the properties of Atomicity, Consistency, Isolation and Durability, known commonly as the ACID properties. According to the Atomicity property, either the transaction successfully executes to completion, and the effects of all operations are recorded, or the transaction fails. The Consistency property requires that the transaction does not violate integrity constraints of the shared resources. The Isolation property requires that intermediate effects of the transaction are not detectable to concurrent transactions. Finally, the Durability property requires that changes to shared resources due to the transaction are permanent.
After an application has been compiled and deployed, an administrator may determine that the application should be transactional. The administrator then modifies the source code of the application to make classes (and objects that inherit from them) within the application transactional. A transactional object is defined herein as an object that can participate in transactions. A transactional object may include semantics for participating in transactions, such as methods for rolling back and committing state changes associated with a transaction. Conventionally, an object cannot be transformed into a transactional object if the administrator does not have access to the source code for the application. Even if he does have the source code, changing the source code takes time, and can be error prone.
Some transaction systems include tools to aid in turning ordinary objects into transactional objects. However, such tools still require that the code of the objects be modified. Moreover, such tools are used at compile time (when an application is being compiled). Conventional transaction systems do not include mechanisms to change an ordinary object into a transactional object at runtime (during the execution of an application).


An optical amplifier system for amplifying an input wavelength division multiplexed (WDM) optical signal with a first optical coupler to extract a portion of the power of the input signal, an erbium-doped fiber amplifier to generate an output signal and a second optical coupler to extract a portion of the power of the output signal. A spectral monitoring unit having a volume phase grating separates the extracted input and output signals into spectral components. A photo-detector array of the spectral monitoring unit determines the power level of the spectral components. The system further includes a controller operative to control the operation of the amplifier in response to the power levels of the spectral components.

1. Field of the Invention
The present invention generally relates to an optical amplifier with spectral gain monitoring functions and in particular to a compact erbium-doped fiber amplifier (EDFA) with gain spectrum and optical performance dynamically controlled.
2. Status of the Prior Art
The past decade has witnessed a rapid growth in the volume of high-speed data traffic carried over national and international communication networks. This growth has been driven principally by the dramatic increase in the wide use of the Internet and commercial data networks. This tremendous amount of worldwide data traffic volume requires fiber-optic communications networks having multi-gigabit transmission capacities with highly efficient cross-connect links. To this end, in the field of fiber-optic technology, products have been developed for multi-carrier transmission over a single fiber thereby multiplying the amount of information capacity transmitted over a single carrier system. By assembling several individual data signals of different wavelengths into a composite multi-channel signal transmitted on a single fiber(i.e., wavelength division multiplexing (WDM)), it is possible for multiple users to share a common fiber-optic link and thereby realize high throughput.
To assemble the multi-channel signals, a multiplexing device (MUX) is employed at the transmitting end that combines the multiple light-wave signals from several sources or channels of different wavelengths into a single composite signal. The center wavelengths of the signals must be properly spaced and have pass bands well defined in order to avoid cross-talk between channels. For example, the well-accepted industrial standard is a channel spacing of 100 GHz (0.8 nm in 1.55 xcexcm window) centered at the ITU grid wherein each signal channel has a pass bandwidth of 0.3 nm at 0.5 dB down power level. The multiplexed signal is then transmitted on a single fiber-optic communications link. At the receiving end, a demultiplexing device (DEMUX) separates the composite signal received from the fiber link into the original channel signals, each of which is a single signal channel centered at the ITU grid. Such dense wavelength division multiplexing (DWDM) technology dramatically increases the information-carrying capacity that is transmitted on a single carrier fiber. For example, a 40-channel 100 GHz DWDM system with a 10 Gb/s transmission rate can transmit 400 Gb/s data in the C-band (1528-1563 nm). The number of channels deployed in long-haul DWDM systems is rapidly increasing to beyond 100 channels over the C-band and L-band (1575-1610 nm).
In optical networks having a large number of channels, the stability of the channels (both in terms of the amplitude and wavelength) is critical. The stability of channels in optical networks is largely dependent on the operational characteristics of the optical amplifiers, optical transmitters, and network architecture.
As the multi-wavelength signals propagate along the optical fibers, the powers of the signals are gradually decayed due to the presence of insertion, distribution, and transmission losses. To boost the signal powers, optical amplifiers are employed periodically to compensate for the power loss. Optical amplifiers receive one or more optical signals and simultaneously amplify all wavelengths. This is a significant advantage of multi-wavelength fiber systems over regenerators. However, not all channels are amplified by the same factor because the gain spectrum of the optical amplifier is not uniform. For example, the gain spectrum of an EDFA has well-known asymmetrical twin peaks due to a luminescent spectrum caused by the fine structure of the energy levels. Because the gain spectrum is not flat, a power deviation exists between the amplified signals that corresponds to the different wavelengths. Though a gain flattening technique can resolve this, it is important to monitor power fluctuations of individual channels, rather than aggregate power.
It is also well known that the wavelength and amplitude of the light emitted by the lasers tends to vary as the lasers age and as the operational temperature of the lasers changes. As the number of channels deployed in a WDM optical network increases, wavelength drifts are more likely to result in interference between channels because the channel spacing is narrower. As a result, wavelength drifts and amplitude variations are more likely to cause data error or transmission failures. These variations of optical performance will inevitably lead to fluctuations of the amplification characteristics of optical amplifiers.
The presence or absence of individual channels across the whole gain band has an important influence on the characterization of optical performance of optical amplifiers. In some cases, for example, a channel may be absent such that extra amplification of the other existing channels will result. It is obvious that as more channels are absent, channel amplification becomes a more serious problem.
It is therefore important to monitor the performance of an optical amplifier in an optical network, and in particular the individual channels. To do so, external channel performance monitors have been used in conjunction with optical amplifiers. A compact channel performance monitor is described in U.S. patent application Ser. No. 09/715,765 filed Nov. 17, 2000 titled COMPACT OPTICAL PERFORMANCE MONITOR, the contents of which are incorporated herein by reference. The channel performance monitor can be tailored and integrated into an optical amplifier.
The present invention provides a method and system of integrating optical amplifiers with a spectral monitor. The spectral gain monitor is a compact module having a low-cost volume phase grating (VPG) optical element, a compact photo-detector array and a micro-processor controller. It is initially designed for EDFAs, but not limited to.
A primary object of the present invention is to provide a compact design of a low-cost optical amplifier system with spectral gain monitoring capabilities based on erbium-doped fiber amplifiers and VPG technology. The present invention provides a method for designing optical amplifiers with spectral gain monitoring capabilities for Raman amplifiers and other semiconductor optical amplifiers. Accordingly, a method is provided for designing a multichannel device with spectral gain monitoring capabilities.
In the preferred embodiments of the present invention, an optical amplifier with spectral gain monitoring capabilities is provided wherein individual channel powers (including the presence or absence of some channels) are monitored. Feedback control to stabilize variation of optical performance is also provided.
In accordance with the present invention, there is provided a system for amplifying an input wavelength division multiplexed (WDM) optical signal with a first optical coupler operative to receive the input WDM optical signal and extract a portion of the signal therefrom. The system further includes a first spectral monitoring unit having a volume phase grating optically connected to the first coupler. The first spectral monitoring unit separates the input WDM optical signal into input spectral components (i.e., prescribed channels) and detects the power levels thereof. An optical amplifier is optically connected to the first coupler and amplifies the input WDM optical signal to generate an amplified output WDM optical signal. The optical amplifier may be a laser pump source optically connected to an erbium-doped fiber. A second optical coupler is optically connected to the optical amplifier and extracts a portion of the output WDM optical signal. The system has a second spectral monitoring unit with a volume phase grating optically connected to the second optical coupler. The second spectral monitoring unit separates the output WDM optical signal into output spectral components (i.e., prescribed channels) and detects the power levels thereof. A controller is electrically connected to the first spectral monitoring unit, the second spectral monitoring unit and the optical amplifier. The controller dynamically operates the amplifier in response to the power levels of the input and output spectral components. In this regard, it is possible for the amplifier to dynamically adjust the amplification of the input optical signal in response to the power in the channels.
The first and second spectral monitoring units separate and detect the power level in the spectral components of the extracted input and output signals. Accordingly, the spectral monitoring units each have an input fiber for receiving the optical signal and a collimating lens optically connected to the input fiber. The collimating lens emits the optical signal onto the volume phase grating which separates the optical signal into spectral components. Each of the first and second spectral monitoring units further include a focusing lens for focusing the spectral components onto a photo-detector array which detects the power level of each of the spectral components. The photo-detector array has a plurality of photo-detectors wherein each of the photo-detectors correspond to one of the spectral components. In this regard, each of the photo-detectors detects the power level of a respective one of the spectral components.
It will be recognized by those of ordinary skill in the art that the amplifier system may operate with only a single spectral monitoring unit. In this regard, the spectral monitoring unit will determine the power levels of each of the spectral components by processing the extracted input and output optical signals either in a serial manner or parallel manner. For instance, if the signals are processed in a serial manner, an optical switch will be used to switch between the extracted input and output signals. If the signals are processed in a parallel manner, the volume phase grating, as well as the photo-detector array, will be configured to receive both the extracted input and output optical signals simultaneously.
In accordance with the present invention, there is provided a method of amplifying an input optical signal with an optical amplifier system having a first and second optical coupler, a spectral monitoring unit, an optical amplifier, and a controller. The method starts by extracting a portion of the input WDM optical signal with the first optical coupler. Next, the input WDM optical signal is amplified with the optical amplifier in order to generate an output WDM optical signal. A portion of the amplified output WDM optical signal is extracted with the second optical coupler. The spectral monitoring unit separates the spectral components of the extracted input and output WDM signals and detects the power levels of the spectral components. The controller dynamically operates the optical amplifier in response to power levels of the spectral components. In this regard, the controller can control the amplification of the input WDM optical signal in order to provide uniform amplification.

Optical amplifier with a spectral gain monitor using a volume phase grating


In an electrical contact for plug-in connections, in particular for the direct contacting of contact surfaces of a circuit board, the contact having a contact housing which includes an inwardly deflectable primary lance, which outwardly projects beyond the contact housing, counter to the insertion direction, for retaining the contact inserted into a contact chamber of a mating plug, the primary lance has a free end which is offset inwardly relative to its outwardly projecting lance section and extends counter to the insertion direction, which free lance end is outwardly overlapped by a housing stop of the contact housing.

Electrical plug-in connections are employed to establish a releasable electrical connection between, for instance, an electrical line and another electrical line, or an electrical line and an electrical aggregate, by way of the socket part or the male connector of the plug-in connection. In a plug-in connection between the electrical contact of a line (cable tree side) and a control unit (component side), a primary lance is used to reliably retain the electrical contact of the line in a contact chamber of a component-side cable tree plug over the service life.
FIGS. 1a and 1b show a known electrical contact 101 for the direct contacting of contact surfaces 102 of a circuit board 103. Electrical contact 101 has a contact housing 104, which is integrally molded from a sheet metal part and inserted, in insertion direction 105, into a contact chamber of a mating plug (not shown) provided on circuit board 103. Contact housing 104 includes a primary lance 106, which projects outwardly, counter to insertion direction 105, and is deflectable toward the inside, in order to retain contact 101 inserted into the contact chamber of the mounting plug on a back taper of the contact chamber. On the side lying opposite from primary lance 106, contact housing 104 has an outwardly projecting contact lamella 117 for the electrical contacting of contact surface 102.
However, in such known plug-in connections the problem may arise that the holding force of the electrical contact in the contact chamber of the cable tree plug of the primary lance is too low and that the primary lance is dislodged in an outward direction in the event of excessive loading.

Electrical contact for plug-in connections


The present invention relates to a molecularly imprinted polymer for binding glycans, wherein the molecularly imprinted polymer is obtainable by providing a saccharide template such as a glycan; providing at least two functional monomers capable of cooperatively; interacting with the template; providing a crosslinking monomer; polymerizing the monomers optionally dissolved in a solvent, in presence of the saccharide template; and removing the template from the formed polymer. The invention is also related to a method for their production and use of the molecularly imprinted polymer.

Cell surface glycans refer to a vast variety of glycan motifs attached to plasma membrane bound proteins or lipids. These constitute the outermost surface of the cell and are involved in cellular communication and processes like host-pathogen recognition, infection, cellular differentiation, proliferation and migration. Around 700 proteins are required to generate the full diversity of mammalian glycans, which are assembled from ten monosaccharides only: fucose (Fuc), galactose (Gal), glucose (Glc), N-acetylgalactosamine (GalNAc), N-acetylglucosamine (GlcNAc), glucuronic acid (GlcA), iduronic acid (IdoA), mannose (Man), sialic acid (SA) and xylose (Xyl). The most-widely occurring cancer-associated changes in glycosylation are sialylation, fucosylation, O-glycan truncation, and N- and O-linked glycan branching (Chart 1).
SA are the outermost monosaccharide units on the glycan chains of glycolipids and glycoproteins and often the recognition sites where the pathogens attach. The occurrence of SA has proven to correlate with several disease states such as cardiovascular, and neurological diseases as well as cancer (B. Adamczyk, T. Tharmalingam and P. M. Rudd, Biochimica et Biophysica Acta (BBA)—General Subjects, 2012, 1820, 1347-1353). Clinically, increased sialylation is often associated with invasiveness and poor prognosis of cancer patients. An incomplete synthesis process leads to the biosynthesis of truncated structures, as seen with STn (Chart 1) expression in gastrointestinal and breast cancers. STn (Neu5Acα2-6GalNAcα—O—R) and Tn (GalNAcα—O—R) have attracted wide spread attention as a diagnostic as well as therapeutic target since it is expressed in 80% of human cancers and absent or only weakly expressed in normal tissue. However, it has been difficult to produce IgG antibodies against Tn and ST and IgG antibodies against STn have low affinity and perform poorly in capture strategies. The few lectins available to SA (SNA and MAA) have broad specificities and low affinities, and perform poorly in capture assays.
Conversely, neo-synthesis, commonly observed in advanced stages of cancer, refers to the cancer-associated induction of certain genes involved in the expression of carbohydrate determinants, as seen in the de novo expression of certain antigens, such as sialyl Lewis a (SLea) and sialyl Lewis X, SLex, in many cancers. Polysialic acid is increased sialylation associated with several types of cancers, and frequently expressed in high-grade tumours.
There are two main mammalian SAs, Neu5Ac (N-acetylneuraminic acid) and Neu5Gc (N-glycolylneuraminic acid) (see Chart 1), which differ only by one oxygen atom and is added by the enzyme cytidine monophosphate N-acetylneuraminic acid hydroxylase (CMAH) in the cytosol. Humans lack this enzymatic activity due to an inactivating mutation of the CMAHgene. As this alternative form of SA is not normally present, immunological tolerance fails to develop. As a result, when Neu5Gc incorporation into glycoconjugates occurs after intake from dietary sources, "autoantibodies" to this sugar develop, and these have been proposed to enhance inflammatory pathways associated with cancer initiation. Novel affinity reagents for discriminating these forms as well as linkage specific animal and human glycosylations 2-3 versus 2-6 linked sialic acids are highly demanded.
Analyzing and determining these glycosylation motifs is therefore an important diagnostic goal but the task has proven challenging due to the limited availability of lectins and glycan specific antibodies (N. Fujitani, J.-i. Furukawa, K. Araki, T. Fujioka, Y. Takegawa, J. Piao, T. Nishioka, T. Tamura, T. Nikaido, M. Ito, Y. Nakamura and Y. Shinohara, Proceedings of the National Academy of Sciences, 2013, 110, 2105-2110).
A number of sensitive methods have nevertheless been published that either measure total sialic acid content or different sialic acid types. These methods are costly, laborious and time consuming, and commonly require sophisticated instrumentation as skilled operators for their implementation. They are therefore not well suited for routine applications. Lectin-based assays exist for a few types of sialic acids but assay development is often hampered by their low sensitivity and poor specificity. The detection of sialic acid in sialoglycoprotein or as a free moiety include the use of high performance liquid chromatography (HPLC), gas-chromatography combined with mass spectrometry (GC-MS), nuclear magnetic resonance spectrometry (NMR) and capillary electrophoresis (CE). These methods are complicated by significant requirements for sample preparation, specialised equipment, purification of the target protein and lengthy and complex data analysis for monitoring the sialylation pattern.
This warrants the development of alternative glycan specific receptors which could be used for e.g. cell or tissue imaging, cell sorting, targeted glycomics and cellular glycosylation biomarker analysis or for applications in medicine for instance for targeted drug delivery or the selective inhibition of cell surface interactions. A plethora of low molecular hosts has been systematically designed and conjugated e.g. to fluorescent reporter groups or quantum dots for imaging applications. The most powerful hosts for sialic acid feature two or more orthogonal binding groups, a boronic acid directed towards the diol functionality and a charged or neutral anion receptor directed towards the carboxylate function. Other strong binders are multi-functional incorporating two or more boronic acid groups. The latter engage in a pH dependent reversible esterification with the diols resulting in five or six membered cyclic structures.
It has long been known that monosaccharide selective receptors can be prepared by the technique of molecular imprinting. Wulff et al. reported highly discriminative boronate-based receptors for mannose, fructose and galactose prepared using the monosaccharide templates conjugated to two molecules of vinylbenzeneboronic acid (1). Other researchers later adopted this procedure for the synthesis of sialic acid imprinted bulk polymers or sensor coatings. These boronic acid containing MIPs featured strong template affinity when probed in basic buffer/acetonitrile mixtures (pH 8). A simpler one-pot protocol was subsequently used for the synthesis of glycoprotein selective MIPs (X. Bi and Z. Liu, Analytical Chemistry, 2013, 86, 959-966). Here the boronate monomer is conjugated in situ under base catalysis to the SA containing glycoprotein and subsequently copolymerized with a crosslinking monomer to form the imprinted polymer. The SA imprinted receptors reported so far display only weak binding for the saccharide targets (K<103 M−1) when probed in water and especially under physiological conditions. This contrasts with the most powerful designed hosts (vide supra) where binding is sufficiently strong (>105 M−1) to allow cell based imaging or even cell sorting applications. The latter receptors however are complicated to design for targeting more complex glycans such as disaccharide and higher saccharides. This commonly requires extensive synthetic efforts and testing of a large number of analogs in order to identify strong binders.
Apart from cell or tissue imaging applications such receptors could be used to replace lectins or antibodies in targeted glycomics, in glycan sensors, for enrichments of specific glycan motifs, for cell sorting or in medicine for instance for targeted drug delivery or the selective inhibition of cell surface interactions.
One application concerns the identification and molecular characterization of circulating tumor cells (CTCs) in cancer patients. Characterising these cells is important for understanding the metastatic process and potential therapeutic strategies thereby guiding prognosis and treatment. Progress in this field has been slow which partly is due to the low, "needle in a haystack", abundance of CTCs. Although CTCs can be reliably detected in patients with metastatic disease, challenges remain to detect early stage, treatable cancers with inferior CTC numbers. The currently dominating techniques to detect CTCs are cytometric assays where cells remain intact preceeded by an initial enrichment step to optimize the probability of rare cell detection. The dominating enrichment technique is based on immunomagnetic separation typically dependent on the epithelial protein marker (EpCam). However, cell surface glycans or circulating O-glycoproteins shed from cancer cells also represent important serum biomarkers for diagnostic and prognostic purposes. Selective detection of cancer-associated aberrant glycoforms of circulating O-glycoprotein biomarkers can increase specificity of cancer biomarker assays.
Targeted delivery of drugs to tumors represents a significant advance in cancer diagnosis and therapy. Therefore, development of novel tumor-specific ligands or pharmaceutical nanocarriers is highly desirable. These nanocarriers would be loaded with drugs and targeted to specific parts of the body where there is solely diseased tissue, thereby avoiding interaction with healthy tissue. Targeted delivery to specific cell organelles through endocytosis of the delivery vehicle (nanocarrier) offers a more specific targeting especially suited for macromolecular drugs. Selective targeting of such nanocarriers to cells expressing cancer associated glycans is an important goal.

Bundesrepublik Deutschland, vertreten durch den Bundesminister für Wirtschaft und Energie


A power transmission device is provided, which includes a vibration reducing damper provided on a power transmission path, and a clutch mechanism having a plurality of friction plates, a hydraulic pressure chamber, and a centrifugal balance chamber provided opposed to the hydraulic pressure chamber. The clutch mechanism is provided adjacent to an axial side part of the damper, and an oil drain port for hydraulic fluid supplied to the centrifugal balance chamber of the clutch mechanism is provided at a location radially inward of the damper and axially overlapping with the damper.

Conventionally, as disclosed in JP2017-067169A, it is known that a power transmission device with a centrifugal pendulum damper in which part of lubricant supplied toward a clutch is supplied to a centrifugal balance chamber, and the lubricant used for lubricating the clutch is supplied to the centrifugal pendulum damper by using rotation of a clutch drum.
Here, a lubrication circuit (lubrication path) as disclosed in JP2017-067169A has various components (the clutch, the clutch drum, etc.) in the path for supplying the lubricant to the damper. However, since those components apply drag to a flow of the lubricant, the work of the oil pump which supplies the lubricant increases, and the size of the oil pump must be increased accordingly. Alternatively, if dedicated paths are provided for the respective components which need to be lubricated, an amount of lubricant to be supplied increases and the work of the oil pump also increases. Therefore, it becomes more difficult to secure the path layout. Regarding these problems, an efficiently lubrication of the damper is demanded.
Meanwhile, the present inventors acquired data from model analysis of a vehicle power transmission path in which, in a power transmission device provided with a motor as a drive source, the addition of the motor results in a resonance point of the power transmission system (e.g., a resonance frequency of the entire power transmission system from an engine to wheels through the power transmission device, a transmission, a drive shaft, etc.) occurring in a normally-used range of the engine speed. Such a resonance frequency occurring in the normally-used range is a factors in causing vibration and noise of the vehicle.
Regarding such a problem, in order to lower the resonance point of the power transmission system down to a low speed range which is outside of the normally-used range of the engine, while reducing the vibration at the resonance point, providing a damper with hysteresis property may be considered. Moreover, in order to give such a hysteresis property, it is effective to provide a sliding part to the damper; however, it is necessary to supply a certain amount of lubricant to the sliding part.
In order to achieve this, if the lubrication circuit disclosed in JP2017-067169A is used, the lubrication efficiency gets worse because the plurality of components are provided to the lubrication circuit.


A method for forming a 3D NAND structure includes providing a semiconductor substrate; forming a control gate structure having a plurality of staircase-stacked layers, each layer has a first end and a second end; forming a dielectric layer covering the semiconductor substrate, and the control gate structure; forming a hard mask layer on the dielectric layer; patterning the hard mask layer to form a plurality of openings above corresponding second ends of the layers of the control gate structure; forming a photoresist layer on the hard mask layer; repeating a photoresist trimming process and a first etching process to sequentially expose the openings, and to form a plurality of holes with predetermined depths in the dielectric layer; performing a second etching process to etch the plurality of holes until surfaces of the second ends are exposed to form through holes; and forming metal vias in the through holes.

Flash memory devices have recently been through a rapid development. The flash memory devices are able to retain the stored data for a very long period of time without applying a voltage. Further, the reading rate of the flash memory devices is relatively high; and it is easy to erase stored data and rewrite data into the flash memory devices. Thus, the flash memory devices have been widely used in micro-computers, and automatic control systems, etc. To increase the bit density and reduce the bit cost of the flash memory devices, three-dimensional (3D) NAND (Not AND) flash memory devices have been developed.
FIG. 1 illustrates an electric circuitry diagram of a 3D NAND device. As shown in FIG. 1, the circuitry of the 3D NAND device includes bit lines (BLs), upper selecting gates (Upper SGs), control gates (CGs), lower selecting gates (lower SGs), and source lines (SLs), etc. The SLs maintain the unidirectional current output from the memory array. A certain memory may be selected from three-dimensional respectively using the selecting signal of the BLs, the common selecting signal of the upper SGs and the lower SGs, and the selecting signal of the CGs. The selecting signal of the CGs may control the selecting of a certain lateral layer of memory.
FIG. 2 illustrates the structure of a 3D NAND device. As shown in FIG. 2, the 3D NAND device includes a plurality of layers of memory structures (or memory array) 36; and a lower selecting gate LS disposed under the memory structures 36. Further, the 3D NAND device also includes an upper selecting gate US disposed right on the top of the memory structures 36; and bit lines BLs disposed over the upper selecting gate US. Further, the 3D NAND device also include a control gate CG (101) protruding from each layer of the plurality of layers of memory structures 36. Each layer of memory structures 36 are electrically connected with the control-voltage-signal-input-lines 29 through the contact vias 207 extending from the control gate CG (101).
The source region and the drain region of the memory transistor in the memory array are formed by layer-doped regions in polysilicon pillars. The memory gates are the oxide-nitride-oxide (ONO) layers surrounding the polysilicon (poly-Si) pillars. Specifically, a memory transistor includes a poly-Si body, charge trap layers and a poly-Si gate.
The control gate CG (101) of each layer of memory structure 36 may protrude from the memory structure 36; and may be electrically connected to the control-voltage-signal-input-lines 29 through metal vias 107. The control-voltage-signal-input-lines 29 may be configured as bit lines. The control gate CG (101) layers are stacked with a staircase shape from the bottom to the top. The metal vias 107 are a staggered aligned along the staircase to connect with the different bit lines (the control-voltage-signal-input-lines 29).
However, during the fabrication of the 3D NAND device, it may have etching damages to certain structures of the 3D NAND device. The etching damages may adversely affect the performance of the 3D NAND device. For example, the contact between the metal via and the control gate may not match the designed requirement, etc. Thus, the performance of the 3D NAND device may need further improvements. The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems.

Semiconductor Manufacturing International (Shanghai) Corporation


A needle driver instrument suitable for use with a trocar sheath in operative endoscopic surgical procedures such as laparoscopic and pelviscopic procedures is disclosed for driving a curved suture needle. The needle driver instrument comprises an elongated cylindrical tube member having a channel formed about the distal end thereof for receiving either a curved or a straight suture needle. The channel is transversely formed through the elongated member and has a plurality of surfaces to orient and fix the suture needle in a predetermined orientation. A wedge operable across the channel and through the passageway of the elongated member wedges the needle between at least two of the contact surfaces of the channel to fixedly position the suture needle in the desired orientation. At the proximal end of the device is a handle with a generally U-shaped spring extending therefrom for manual operation of the wedge. A rod extending from the wedge through the elongated member of the instrument is connected to the spring for actuation and operation of the wedge. The device is comprised of component parts which are easily disassembled for cleaning and sterilization.

A number of manually operated medical and surgical instruments are available for holding or grasping a suture needle. Generally, two varieties of surgical needles are commercially available: straight needles and curved needles. For many situations, straight needles are preferred since they can be more easily handled. In restricted space, the use of a curved needle is preferred. However, curved needles are very difficult to properly manipulate manually and are invariably utilized in conjunction with needle holders specifically designed for use therewith. The most common needle holders include a configuration somewhat like needle-nose pliers with clamping means for locking the gripping jaws thereof in a fixed position.
With even more confined or limited access endoscopic procedures such as operative laparoscopy or pelviscopy where the surgical instruments are typically inserted through a trocar sheath, the size of the suture needle is limited as well as the size of the needle holder which must be inserted through the trocar sheath to the surgical site. Endoscopic needle holders have typically included a pair of opposing jaws positioned at the distal end of an elongated member which is inserted through the trocar sheath. One jaw is commonly held stationary while the opposing jaw is operated between an open and closed position. To better grasp the suture needle, the opposing jaws typically include a plurality of teeth for further grasping the needle.
One problem with these opposing jaw needle holders is the difficulty in maintaining a fixed position when the suture needle is grasped. This problem is further complicated with the use of a curved suture needle which is very common with endoscopic procedures. The curved needle has a tendency to change its position when grasped due to the curvature of the needle. As a result, the surgeon spends considerable time in making just a few sutures with the curved needle.
Another problem is that unless the curved needle is constantly maintained in perfect alignment along its own curvature during suturing, the perforated tissue offers resistance which increases the force necessary to complete the suture. As a result, there is increased tissue trauma with the formation of excessively large openings and possibly even tears in the tissue which may retard proper healing.
A number of curved needle suture devices have been developed for use in invasive type surgery. Such holders commonly have a curved needle affixed to an elongated member for implementing a series of sutures. However, these holders are invariably too bulky to position in restricted surgical site areas and are near impossible to insert through a trocar sheath for endoscopic procedures due to physical size limitations.

Medical instrument for driving a suture needle


The invention relates to derivatives of apramycin-based aminoglycoside antibacterial drugs modified in positions C5 and/or C6 and O5 and/or O6. The modifications impart favourable properties regarding increased selectivity and retention of activity in the presence of resistance determinants of the AAC(3) class. The invention further relates to said compounds for use in the therapy of bacterial infection by systemic administration, especially in instances where the infection is caused by a pathogen comprising a resistance determinant of the AAC(3) class, in particular AAC(3)-IV.

The clinically important class of aminoglycoside antibiotics (AGAs) derive their activity from binding to bacterial ribosomal RNA. Aminoglycosides are an important class of broad spectrum antibiotics owing to the combination of their high potency, lack of allergic response, and minimal effect on the host's microbiome. AGAs currently in clinical practice, however, are compromised by toxicity issues (mainly irreversible ototoxicity) and the rise of resistant pathogens. No new aminoglycosides have been introduced into clinical practice since the early 1990s. There is therefore an unmet need for new aminoglycoside drugs that retain their favorable characteristics yet overcome the now widespread resistance determinants and do so without significant toxicity.
Apramycin is an unusual monosubstituted 2-deoxystreptamine (DOS) type aminoglycoside antibiotic that is currently being evaluated as a possible clinical candidate for the treatment of carbapenem resistant enterobacteriaceae (CREs). Apramycin has the advantage over other AGAs currently in clinical use of displaying little ototoxicity. Furthermore, its unusual structure safeguards it from susceptibility to many of the aminoglycoside modifying enzymes (AMEs) that act on the various AGAs in clinical use and from susceptibility to the ribosomal methyl transferase ArmA that modifies the target ribosome and destroys the activity of all members of the 4,6-class of disubstituted DOS AGAs. Apramycin is however susceptible to aminoglycoside acetyltransferases (AAC) of the AAC(3) class, including the enzyme AAC(3)-IV.
Based on the above-mentioned state of the art, the objective of the present invention is to provide improved apramycin derivatives that overcome the problems found in the prior art. This objective is attained by the claims of the present specification.


To improve spectral usage efficiency in the case where an interrupt by a second signal occurs in a part of frequency resources allocated to a first signal, in one aspect of the present invention, in the case where frequency resources for the first signal are allocated using a second allocation unit comprised by including a plurality of first allocation units that are minimum allocation units, and in the case where the second signal is allocated to a part of the frequency resources, in a subcarrier at least a part of which overlaps with the second signal, or in the first allocation unit at least a part of which overlaps with the second signal, the first signal is subjected to rate-matching and/or puncturing.

In UMTS (Universal Mobile Telecommunications System) networks, for the purpose of higher data rates, low delay and the like, Long Term Evolution (LTE) has been specified (Non-patent Document 1). Further, for the purpose of wider bands and higher speed than LTE (also referred to as LTE Rel. 8 or 9), LTE-A (LTE-Advanced, also referred to as LTE Rel.10˜13 and the like) has been specified, and successor systems (e.g., also referred to as FRA (Future Radio Access), 5G (5th generation mobile communication system), NR (New RAT: Radio Access Technology), LTE Rel.14˜ and the like) to LTE have been studied.
In the existing LTE system (e.g., prior to Rel.13), as an allocation unit of frequency resources, it is possible to use a resource block group (RBG) comprised of one or more resource blocks (RB). Allocation of frequency resources in the RBG unit is also called resource allocation type 0 and the like. Herein, the RB is a minimum allocation unit of frequency resources, and includes 12 subcarriers with a subcarrier spacing of 15 kHz to be comprised thereof. Further, the RB is also called a physical resource block (PRB) and the like.

User terminal and radio communication method