A vector operation instruction issue control method includes a meter for measuring an elapse of a time period corresponding to a sum of the number of vector elements of a vector operation instruction and a difference between the number of pipeline stages of two arithmetic functions. When a vector operation instruction using an arithmetic function having a larger number of pipeline stages is issued to a vector arithmetic unit, the meter is activated to measure a time period corresponding to a sum of the number of vector elements of the vector operation instruction and the stage number difference. When a vector operation instruction using an arithmetic function having a smaller number of pipeline stages is issued subsequently to the vector operation instruction using the arithmetic function having the larger number of pipeline steps, the vector operation instruction using the arithmetic function having the smaller number of pipeline stages is issued in accordance with an end timing of the measurement of the meter.

The present invention relates to a vector operation instruction issue control method for a vector processing apparatus and, more particularly, to a vector operation instruction issue control method for activating a vector operation instruction in a vector arithmetic unit including two arithmetic functions having different numbers of pipeline stages.
In a vector processing apparatus for successively supplying vector data held in a vector register to a vector arithmetic unit and executing a vector operation at high speed by so-called pipelining, a single arithmetic unit is conventionally allowed to have two arithmetic functions with different number of pipeline stages (to be referred to as simply stages hereinafter) and execute two types of operations.
FIGS. 4A to 4C are views for explaining an operation of such a vector arithmetic unit. In FIG. 4A, a vector arithmetic unit 40 has an arithmetic function with a large number of stages (e.g., five stages for the sake of simplicity of the following description) and that with a small number of stages (e.g., two stages for the sake of simplicity of the following description). Upon activation, the arithmetic unit 40 performs an arithmetic function of the externally designated type. Assume that a vector element number (VL) is "5" and that the vector arithmetic unit 40 is caused to execute a vector operation instruction using the arithmetic function of five stages (to be referred to as a long-stage vector operation instruction A hereinafter) and to execute a vector operation instruction using the arithmetic function of two stages (to be referred to as a short-stage vector operation instruction B hereinafter).
FIG. 4B is a schematic timing chart for explaining an operation executed when the long-stage vector operation instruction A is issued to the vector arithmetic unit 40. When the long-stage vector operation instruction A is issued, a first element el to a fifth element e5 of vector data held in vector registers 41 are successively supplied to the vector arithmetic unit 40. Each element passes through five stages S1 to S5 in the vector arithmetic unit 40 to perform a predetermined operation, and the result is stored in the vector registers 41 again. A time period from reading of the first to fifth elements e1 to e5 from the vector registers 41 to completion of inputting thereof in the vector arithmetic unit 40 corresponds to vector register reading (R), and that from reading of the first element el from the vector registers 41 to writing of an operation result of the fifth element e5 therein corresponds to vector register writing (W).
FIG. 4C is a schematic timing chart for explaining an operation executed when the short-stage vector operation instruction B is issued to the vector arithmetic unit 40. Assume that the short-stage vector operation instruction B is to be executed by using the first and fifth stages S1 and S5 of the above five stages S1 to S5. In this case, when the short-stage vector operation instruction B is issued, the vector data elements e1 to e5 successively supplied from the vector registers 41 to the vector arithmetic unit 40 pass through the first and fifth stages S1 and S5 to perform predetermined operations, and the results are stored in the vector registers 41 again. The period of the vector register reading (R) of the short-stage vector operation instruction B is the same as that of the long-stage vector operation instruction A, but the period of its vector register writing (W) is shorter than that of the long-stage vector operation instruction A because the number of stages is small.
As described above, in the vector arithmetic unit having the two arithmetic functions with different number of stages, the vector writing (W) period, i.e., a period during which data stays in the vector arithmetic unit 40 differs between execution of the long-stage vector operation instruction A and that of the short-stage vector operation instruction B. Therefore, in order to successively issue vector operation instructions, issue timings must be determined in consideration of the numbers of stages to be used by each two successive vector operation instructions. Such vector operation instruction issue timing control is conventionally performed as follows.
When vector operation instructions having the same number of stages are to be successively issued or when a preceding instruction is the short-stage vector operation instruction B and a subsequent instruction is the long-stage vector operation instruction A, immediately after the vector register reading (R) period of the preceding vector operation instruction has elapsed, the subsequent vector operation instruction is issued. For this purpose, a flag representing the vector register reading (R) is used to control issue of the subsequent vector operation instruction. FIGS. 5A, 5B and 5C are timing charts for explaining this control.
Assuming that the preceding instruction is the long-stage vector operation instruction A and the subsequent instruction is the short-stage vector operation instruction B, if issue is controlled by the above vector register reading flag, data to be processed by the preceding instruction overlaps that to be processed by the subsequent instruction in the vector arithmetic unit 40 as shown in FIG. 5D. Therefore, in a conventional method, a flag representing the vector register writing (W) is used to control issue of the subsequent short-stage vector operation instruction B.
As described above, in the conventional vector operation instruction issue control method, if a preceding instruction is the long-stage vector operation A and a subsequent instruction is the short-stage vector operation instruction B, issue of the subsequent short-stage vector operation instruction B is controlled by the vector register writing flag. Therefore, the subsequent short-stage vector operation instruction B is issued after an operation of the vector arithmetic unit 40 according to the long-stage vector operation instruction A is completely finished. For this reason, an unnecessary empty time is produced between the long- and short-stage vector operation instructions A and B.

Vector operation instruction activation controller for vector arithmetic units having arithmetic functions with different numbers of pipeline stages


According to an embodiment, a light-projecting apparatus including a light-projector emitting an infrared light beam, a light-projector drive portion pulse-driving the light-projector; and a receiver; and a light-receiving apparatus including a light-receiver receiving the infrared light beam emitted by the light-projector, a light interruption judgment portion judging that the infrared light beam is interrupted when at least a predetermined number of pulses are successively not output by the light-receiver, a light-receiving state detection portion detecting a light-receiving state of the infrared light beam, and a transmitter transmitting the light-receiving state information to the receiver are provided. The period of the pulse driving signal in the light-projector drive portion is changed based on the information received by the receiver.

1. Field of the Invention
The present invention relates to an active infrared detection apparatus for use in security systems or the like, and more specifically to an active infrared detection apparatus that can maintain its reliability of operation when installed outdoors, even when the surrounding environment deteriorates.
2. Related Art
Conventionally, active infrared detection apparatuses for detecting the intrusion of an intruder into an alert territory, which are used in security systems, are known.
This type of active infrared detection apparatus generally includes a light-projecting apparatus including a light-projector, and a light-receiving apparatus including a light-receiver. The light-projecting apparatus and the light-receiving apparatus are installed at both ends of a straight-line alert territory, and an infrared light beam is emitted from the light-projector of the light-projecting apparatus toward the light-receiver of the light-receiving apparatus. Then, when the infrared light beam is interrupted by an intruder or the like and the amount of light received by the light-receiver changes, the apparatus activates for example a security camera or triggers an alarm call to a security company.
Incidentally, due to the influence of modulated light of fluorescent lamps or high frequency waves by AC radios or the like, it may happen that the active infrared detection apparatus does not operate properly. One example of this is the case that the light-receiving apparatus receives modulated light (noise signal) from a fluorescent lamp with about twice the frequency of the pulsed light of the infrared light beam from the light-projecting apparatus. In such an event, as long as the light of the fluorescent lamp is not blocked, the light-receiving apparatus continues to receive modulated light from the fluorescent lamp, even if someone intrudes into the alert territory and blocks the infrared light beam.
In this situation, it becomes impossible to distinguish between a state in which the pulsed light of the infrared light beam which is originally supposed to be detected is received and a state in which the noise signal is received. As a result, it becomes impossible for the active infrared detection apparatus to recognize that someone has intruded into the alert territory and it lapses into a state of "missed alarm". Such a state of "missed alarm" is not limited to the case that the noise signal has the double frequency of the pulsed light of the infrared light beam, but can occur when the frequency of the noise signal is about an integer multiple or when it is a frequency higher than the pulsed light of the infrared light beam.
In view of this, an active infrared sensor, that, when installed in an environment with a noise signal, is capable of recognizing a deterioration of the environment and the risk of an missed alarm, has been proposed (e.g., JP 2001-235367A).
Meanwhile, when such an active infrared detection apparatus is installed outdoors, it happens that due to the seasonal or climatic conditions, frost or fog adheres to the infrared light beam transmission window portion of the cover. When that happens, through the attenuation of the infrared light beam, the amount of light received by the light-receiving elements decreases notably and there is a risk of a "false alarm", in which it is determined that there is an intruder, even when no intruder is present.
In view of these problems, an infrared light beam sensor has been proposed that can prevent the adhering of frost or fog by providing a hood on top of the infrared light transmission window portion of the cover, and furthermore providing the infrared light window transmission portion with a planar heater (see, for example, JP H8-171679A).
However, the conventional art, such as the above-mentioned JP H8-171679A, is not effective when there are factors, such as fog or rain that attenuate the infrared light beam at a location away from the active infrared detection apparatus.
Furthermore, in view of such factors that attenuate the infrared light beam, in order to let an infrared light beam of sufficient intensity reach the light-sensitive elements even under such circumstances, it is conceivable to set the infrared light beam to strong intensity in advance. However, when no factor that attenuates the infrared light beam occurs, there is the possibility that due to the strong intensity of the infrared light beam a missed alarm occurs due to the reflection light from objects that are not to be detected in the vicinity of the active infrared sensor.

Outdoor active infrared detection apparatus with adjustable drive frequency


An oxygen-absorbing film having an oxygen-absorbing adhesive agent layer comprising an oxygen-absorbing adhesive agent resin composition, wherein the oxygen-absorbing adhesive agent layer has at least two glass transition temperatures, and wherein the lowest glass transition temperature among the glass transition temperatures is lower than 0° C. The oxygen-absorbing adhesive agent resin composition preferably comprises: (A) an oxygen-absorbing polyester resin having a glass transition temperature of −20 to 10° C. made from a tetrahydrophthalic acid, a derivative thereof, a tetrahydrophthalic anhydride, or a derivative thereof, and (B) a saturated polyester resin having a glass transition temperature of −10° C. or lower that is a polyester resin containing substantially no carbon-carbon double bond group, and can be obtained by, for example, polycondensation of a dicarboxylic acid component, a diol component, and a hydroxycarboxylic acid component.

Various oxygen-absorbing resin materials have been proposed for use as packaging materials for beverages, foods, and pharmaceuticals (for example, International Patent Application Publication No. WO2005/105887). Further, there has been proposed an oxygen-absorbing adhesive resin composition using such an oxygen-absorbing resin material (see Japanese Patent Application Publication No. 2011-144281 and so forth). However, in an adhesive using such an oxygen-absorbing resin, an internal stress is generated by the influence of the volume shrinkage due to an oxidative curing reaction following the oxygen absorption. This brings about a problem that the laminate strength is lowered after the oxygen absorption.

Oxygen-absorbing film and oxygen-absorbing adhesive agent resin composition


Theft deterrence and secure mobile platform subscription techniques for wireless mobile devices are described. An apparatus may comprise a removable secure execution module arranged to connect with a computing platform for a wireless mobile device. The removable secure execution module may comprise a first processing system to execute a security control module. The security control module may be operative to communicate with a security server over a wireless channel on a periodic basis to obtain a security status for the wireless mobile device. The security control module may output control directives to control operations for one or more components of the computing platform based on the security status. Other embodiments are described and claimed.

Wireless mobile devices are becoming increasingly distributed using a subscription model. Examples for a wireless mobile device may include a class of notebook or laptop computers referred to as a netbook. Netbooks are a rapidly evolving category of small, light and inexpensive laptop computers suited for general computing and accessing web-based services. A subscriber may enter into a subscription agreement with a wireless service provider to pay periodic charges for network services and in return receives a wireless mobile device. In some cases, however, a malicious subscriber may not return a wireless mobile device when terms of a subscription agreement expire or are violated, effectively stealing the wireless mobile device. Although a wireless service provider may cancel network service, a malicious subscriber may still use the stolen wireless mobile device as a computing device. Consequently, there is a substantial need for enhanced theft deterrent techniques to solve these and other problems.

Theft deterrent techniques and secure mobile platform subscription for wirelessly enabled mobile devices


Compounds of the general formula: ##STR1## are useful as surfactants in the preparation of fluorocarbon emulsions, which can be used as oxygen-carrying blood substitutes, and for many other therapeutic and diagnostic applications. They are further useful in liposomal formulations which are themselves therapeutic agents or provide a vehicle for such agents.

This invention relates to surfactants which as amphiphitic molecules have a variety of applications, in particular in the preparation of liposomes, dispersions, and emulsions such as fluorocarbon emulsions.
The achievement of an intravenously injectable oxygen-delivering system has become a major objective in biomedical research. Such a system is destined to serve as a temporary substitute for blood, but also, more generally, whenever in vivo administration of oxygen is required, as for example in cases of myocardial infarction or stroke, during cardiovascular surgery, for the preservation of isolated tissues and organs, as an adjuvant to cancer radio- and chemo- therapy and in perioperative hemodilution. Fluorocarbons presently appear to be the most promising oxygen vectors for this purpose. Fluorocarbons also have significant utility as contrast enhancement agents, such as for diagnosis by X-ray, magnetic resonance or ultrasound radiography.
The intravenous injection of neat fluorocarbons is, however, precluded by their insolubility in an aqueous medium. It is therefore necessary to prepare them in the form of emulsions, which implies the use of one or more surfactants. Although albumin has been used as a surfactant, the primary synthetic surfactants used in fluorocarbon emulsions today are polyoxyethylene polyoxypropylene block co-polymers of PLURONIC F-68 type, and natural surfactants such as egg-yolk lecithins.
Lecithins, however, have their drawbacks and limitations; they are sensitive, oxidizable materials; reliable sources of consistent quality are few; they are not particularly fluorophilic; and they leave little room for manipulating the emulsions' characteristics in order to adjust them to specific therapeutic applications.
Further mastery of the art of fluorocarbon emulsion technology is desirable, especially to allow the optimal adaptation of the emulsions characteristics to each individual therapeutic application and to extend their spectrum of application. A further, ideal, objective would be the ability to modulate the biological response they trigger in the organism.
Likewise it is desirable to gain further mastery in the art of liposome technology, especially to allow the modulation of the characteristics and properties of lipid membranes and liposomes and to extend their spectrum of applications, especially for drug and contrast agent delivery.
The present invention provides various fluorine-substituted lecithin analogues and derivatives, which are useful as surfactants in fluorocarbon emulsions and in lipid membranes and in liposome manufacturing.
Certain fluorine-containing surfactants are known. For example, DE-A-2160783 discloses certain fluorocarbon phosphoric acid derivatives having a chlorine atom substituted on the carbon atom .beta.- to the phosphate group.
Fujita et al. (JP-A-60181093, Chem. Pharm. Bull., 35:647 (1987) disclose certain fluorocarbon phosphoric acid derivatives based on glycerol in which a single fluorine-containing (R.sub.F) moiety is present and the secondary alcohol function is either free (OH) or acetylated (OCOCH.sub.3). DD-A222595 discloses some fluorinated glycerophosphocholine derivatives bun these contain only a 2,2,2-trifluorethyl group.
The article by Gu et al [Chemical Abstract 110:154749c (1989); HUAXUE XUEBAO or Acta Chimica Sinica, 49:913 (1988)], discloses phosphatidylcholine derivatives having two F-alkyl chains, but these contain a chlorine atom at their extremity.
Kunitake et al (Memoirs of the Faculty of Engineering, Kyushu University 46 221 (1986)) disclose fluorocarbon phosphoric acid derivatives which contain an amide linkage, as a result of being a glutamic acid diester.
DE-A-2656429 discloses certain fluorocarbon phosphorous (not phosphoric) acid derivatives including the presence of a CH.dbd.CF double bond.
Various publications also disclose one or two fluorocarbon moieties substituted onto a phosphoric acid moiety; in the case of the mono-substituted compounds both remaining groups of the phosphoric acid are independently hydroxy, alkoxy, alkylthio or alkylamino.
DE-A-3609491, DE-A-3609492 and JP-A-84204197 disclose certain dibasic fluorocarbon-substituted phosphoric acid derivatives.
JP-A-8623590 and JP-A-86123591 (Fuji) disclose certain fluorocarbon-substituted phosphoric acid derivatives having no methylene groups.
Mahmood et al (Inorg. Chem. 25 4081 (1986)) discloses molecules having central bifunctional fluorinated chains with two phosphate groups, one on each end of the chain.
Various sulphonamides containing fluorocarbon moieties and a phosphoric acid residue are known.
U.S. Pat. No. 3976698 and U.S. Pat. No. 3948887 (Pennwalt) disclose certain sulphur-containing fluorocarbon-substituted phosphoric acid derivatives.
None of the above documents discloses the use of the surfactants disclosed in fluorocarbon emulsions. Further, none of the prior documents discloses compounds within the scope of the present invention.

Fluorine and phosphorous-containing amphiphilic molecules with surfactant properties


Systems, methods and apparatuses to concentrate lithium containing solutions using forward osmosis units are provided, which, for example, can include providing at least one forward osmosis unit having at least one lithium containing solution chamber having at least one first inlet and at least one first outlet, at least one brine chamber having at least one second inlet and at least one second outlet, and at least one selectively permeable membrane positioned between the at least one lithium containing solution chamber and the at least one brine chamber, and conveying a lithium containing solution through the at least one lithium containing solution chamber and a concentrated brine solution through the at least one brine chamber, said conveying causing water from the lithium containing solution to be drawn through the at least one selectively permeable membrane and into the concentrated brine solution, such that a concentrated lithium containing solution exits through the first outlet and a less concentrated brine solution exits through the second outlet.

Brine sources exist naturally, for instance, brine sources include brine deposits like the Salar de Atacama in Chile, Silver Peak Nev., Salar de Uyuni in Bolivia, or the Salar de Hombre Muerte in Argentina. The term "brines" is used in the broad sense and includes, in addition to geothermal brines, brines obtained as waste or by-product steams characteristic of industrial processes. Other common brine sources are geothermal, oilfield, smackover, and relict hydrothermal brines. Lithium-enriched brines can also be found in some deep oil reservoirs. These brines, however, have not previously been commercially exploited.
Geothermal brines are of particular interest for a variety of reasons. First, geothermal brines provide a source of power due to the fact that hot geothermal pools are stored underground at high pressure, which when released to atmospheric pressure, can provide a flash-steam. The flash-steam can be used, for example, to run a power plant. Additionally, geothermal brines typically contain various useful metals, such as lithium, lead, manganese, silver, and zinc, each of which can be recovered from the brine for further use. These various metal ions, particularly alkali and alkaline earth metals, as well as silica, iron, lead, silver, zinc, and manganese, are present in varying concentrations, depending upon the source of the brine. Recovery of these metals is potentially important to the chemical, pharmaceutical, and electronics industries. Typically, the economic recovery of desired metals from natural brines, which may vary widely in composition, depends not only on the specific concentration of the desired metal, but also upon the concentrations of interfering ions, particularly silica, calcium and magnesium, because the presence of the interfering ions will increase recovery costs as additional steps must be taken to remove the interfering ions, before the desired metals are recovered.
Lithium may also be recovered from ores, as the ore may be roasted with sulfuric acid, and the product leached with water. The resulting lithium sulfate solution is treated with lime and soda ash to remove calcium and magnesium, and lithium is then precipitated as a carbonate. Other known methods for recovering lithium from ores include alkaline methods and ion-exchange methods, each of which can yield solutions of lithium as hydroxide, chloride or sulfate. These methods may also include the removal of calcium and magnesium by treatment with lime and soda ash. Generally, lithium extraction from brine sources has proven more economical than production from hard-rock ore.
Typically, the economic recovery of lithium from natural, predominantly chloride, brines (which may vary widely in composition), depends not only on the overall lithium content, but also upon the concentrations of interfering ions, particularly calcium and magnesium, which can greatly affect the performance and economics of the lithium recovery. Product solutions from lithium extraction processes tend to have very low concentrations of lithium. Conventional techniques to concentrate the lithium-containing solutions have generally involved evaporation with steam or solar energy. Concentrating the solutions by evaporation requires relatively large capital investment and high operating costs due to steam requirements. Concentrating the solutions by forward osmosis requires high pressure and high energy requirement, and may also cause serious issues with membrane fouling. The size and operating costs of conventional evaporation, and the physical and chemical limits of forward osmosis, prompted a search for alternatives.

Processes for producing lithium compounds using forward osmosis


An analog-to-digital converter includes an analog-to-digital converting circuit having at least an analog signal input terminal, an adder having a first input connected to the analog signal input terminal and a second input, and a comparator having an input coupled to receive an output of the adder and operating to generate a digital signal at a given sampling frequency. This digital signal is applied to the second input of the adder. There is further provided a noise generator including a one-bit white noise generator connected to receive the digital signal outputted from the comparator for generating a one-bit white noise signal, and a circuit coupled to the white noise generator for outputting a signal indicative of a difference between values of two white noise signals at two continuous sampling points. This difference signal is added to the input of the comparator.

1. Field of the Invention
The present invention relates to an analog-to-digital converter, and more specifically to an analog-to-digital converter for converting an input analog signal into a digital signal of a small bit number at a sampling rate which is considerably faster than the band of the input analog signal.
2. Description of Related Art
Conventionally, it has been an ordinary practice to convert an analog signal into a digital signal by sampling the input analog signal at a sampling frequency which is a double or triple of a maximum frequency of the input analog signal so that the digital signal obtained will have a high resolution. In this analog-to-digital conversion, since signal components of a frequency not smaller than one half of the sampling frequency are included as noise in the digital signal obtained, the input analog signal is previously filtered by a high precision filter so that the signal components of a frequency not smaller than one half of the sampling frequency are sufficiently attenuated before the analog-to-digital conversion. However, it is very difficult to form the high precision filter in an integrated circuit.
Under this circumstance, it has lately been proposed to convert an input analog signal into a digital signal by use of a relatively simple analog-to-digital converter at a frequency sufficiently higher than that of the analog signal and then to pick up only signals within a frequency band of the analog signal by means of a digital filter. The digital filter can have a high precision and reproductivity if the clock frequency is stable.
As the analog-to-digital converters of the type mentioned above, there have been known a variety of types such as a delta-sigma modulator type, a delta modulator type, a first-order predicate primary noise shaping type, etc.
A typical delta-sigma modulator type analog-to-digital converter includes an adder having an input connected to an analog signal input terminal and one integrator having an input connected to an output of the adder. An output of the integrator is connected to a comparator or threshold detector which operates to convert a received analog signal into a digital signal at a given sampling frequency. The digital signal is applied to a flipflop so that the digital signal is held for one period. An output of the flipflop is inverted by an inverter and then supplied to a second input of the above mentioned adder so that a voltage corresponding to a difference between the analog signal of the input terminal and the one-period delayed output of the comparator is integrated by the integrator.
In the above mentioned analog-to-digital converter, if the sampling frequency is very high, and assuming that the period of sampling is T and that the angular frequency of the input signal is .omega., a spectral power density of the noise is in proportion to sin.sup.2 (.omega.T/2) and distributed in a biased frequency range higher than the band of the signal. Therefore, the degree of resolution is lower than that of the conventional analog-to-digital converter, but if it is evaluated in a band of the signal finally obtained, the in-band noise is low and a signal-to-noise ratio is high.
The first-order predicate primary noise shaping type analog-to-digital converter was proposed by Yukawa, A. et al in the International Conference on Acoustics, Speech, and Signal Processing in 1985. This first-order predicate primary noise shaping type analog-to-digital converter and the delta-modulator type analog-to-digital converter are advantageous, similarly to delta-sigma modulator type analog-to-digital converter, in that the sampling frequency is very high and a spectral power density of the noise is distributed in a biased frequency range higher than the band of the signal. Therefore, even if the degree of resolution is lower than that of the conventional analog-to-digital converter, if it is evaluated in a band of the signal finally obtained, the in-band noise is low and a signal-to-noise ratio is high.
However, the above mentioned three types of analog-to-digital converters have one common problem: When the input signal is small, a quantization noise is much distributed within the signal band because of the low resolution of the analog-to-digital conversion. As a result, the signal-to-noise ratio and the input/output amplitude characteristics are inevitably deteriorated.
In order to overcome this problem, it has been known to add a constant DC bias to the input, or to add a sine wave or rectangular wave signal having a frequency which is 1/2.sup.p (p=integer) of the sampling rate and exceeds the band of the signal. This method is effective to some extent in preventing the deterioration of the above mentioned characteristics. In the latter method, however, the signal-to-noise ratio is remarkably decreased in a certain amplitude of the input signal which is determined by the amplitude and the frequency of the additional signal. As a consequence, the analog-to-digital converter as mentioned above cannot fulfil the required performance.
As mentioned above, the conventional analog-to-digital converters are disadvantageous in that an excellent signal-to-noise ratio and input/output amplitude characteristics cannot be realized for a small signal.

Analog-to-digital converter having an excellent signal-to-noise ratio for small signals


A method for optimizing memory usage for a hyperloglog (HLL) estimator is disclosed. When a multiset is applied to an HLL estimator, a sparse representation of a sketch may be created. The sparse representation may be sorted whenever a total number of buckets in the sparse representation is evenly divisible by a sorting threshold and is also less than a transition threshold. The sparse representation may be converted to a dense representation when the number of buckets in the sparse representation reaches the transition threshold.

A multiset is a set of data that allows for repeated elements. For example, many of the records within a database may be duplicates of one another. Thus, while a database may include a large number of elements, it may be the case that only a subset of those elements are unique.
The cardinality of a multiset is the number of distinct elements within the multiset. HyperLogLog (HLL) is an algorithm that estimates the cardinality of a multiset. Calculating the exact cardinality of a multiset may take a significant amount of time and may require a large amount of memory, particularly for large multisets. Probabilistic cardinality estimators, such as an HLL estimator, are significantly faster and require much less memory, at the cost of obtaining only an approximation of the cardinality. The approximation, however, is generally fairly accurate.
HLL estimators work well with multisets that contain very large numbers of values. For example, an HLL estimator may be used to estimate the number of searches that end users perform on an Internet search engine within a day. Trying to pull all of the searches into memory to work with them would be virtually impossible because of the amount of memory required and the amount of time it would take. An HLL estimator converts the data into a hash of random numbers representing the cardinality of the data supplied.
The basis of an HLL estimator is the observation that the cardinality of a multiset of uniformly distributed random numbers can be estimated by calculating the maximum number of leading zeros in the binary representation of each number in the set. If the maximum number of leading zeros observed is n, an estimate for the number of distinct elements in the set is 2n.
To improve overall accuracy, the multiset can be split into numerous subsets. An estimate of the cardinality for each subset may be determined, and the cardinality of the whole multiset may be estimated by determining the harmonic mean of all of the estimates.

Optimizing memory usage for a HyperLogLog estimator


First and second reference-potential generator units output first and second reference potentials V1 and V7, respectively, which correspond to first and second specific temperatures to be detected. An intermediate-potentials generator unit divides the potential difference between the reference potential V1 and the reference potential V7 to output intermediate potentials through nodes N2 to N6. A temperature-dependant-potential generator unit outputs the forward voltage drop of a diode which varies depending on the ambient temperature. A comparator compares one of the potentials of nodes N1 to N7 selected by a selector against the potential output by the temperature-dependant-potential generator unit and outputs the result of the comparison indicating the range of the ambient temperature.

1. Field of the Invention
The present invention relates to a temperature detection circuit and, more particularly, to a temperature detection circuit for detecting whether or not a detected temperature has exceeded a predetermined specific temperature by using the temperature coefficient of the forward voltage drop of a diode. The present invention also relates to a semiconductor device having such a temperature detection circuit.
2. Description of the Related Art
A semiconductor device provided with a temperature detection circuit is known in the art. FIG. 7 shows the configuration of a conventional temperature detection circuit used in a semiconductor device. The temperature detection circuit, generally designated at numeral 200, includes a comparator 201, resistors R21 to R23 and a diode D21. The resistors R21 and R22 are connected in series between a high-potential power source line, to which a constant voltage is supplied from a constant voltage source, and a low-potential power source line configuring a ground line. The resistor R23 and the diode D21 are connected in series between the high-potential power source line and the low-potential power source line, with the diode D21 being forward biased. One of the input terminals, non-inverting terminal, of the comparator 201 is connected to a node N21 connecting the resistors R21 and R22 in series, and the other of the input terminals, inverting terminal, thereof is connected to a node N22 connecting together the resistor R23 and the anode of the diode D21.
The forward voltage drop of the diode D21 has a negative temperature coefficient, and the potential of the node N22 connected to the inverting input terminal of the comparator 201 is lowered with a rise of the ambient temperature. On the other hand, the voltage of the node N21 connected to the non-inverting input terminal of the comparator 201 is generated by a resistive voltage divider dividing the potential difference between the high-potential voltage and the low-potential voltage by the resistors R21 and R22, and is a constant voltage independent of the ambient temperature. For example, if the temperature to be detected is 90 degrees C., resistance ratio between the resistors R21 and R22 is adjusted so that the potential of the node N21 is as high as the potential of the node N22 at a temperature of 90 degrees C. In this case, by detecting whether the potential of the node N22, which varies depending on the ambient temperature, is higher or lower than the potential of the node N21, which is independent of the ambient temperature, it is detected whether the ambient temperature is higher or lower than 90 degrees C.
A conventional technique for detecting two and more temperatures by using a temperature detection circuit is described in Patent Publication JP-A-2003-108241A. FIG. 8 shows the configuration of the temperature detection circuit described in the patent publication. The temperature detection circuit, generally designated at numeral 300, includes a first comparator CA and a second comparator CB. A resistor R33 and a diode D31 are connected in series between a power source line having reference voltage VR0 output from a bandgap circuit 310 and the ground line. The node connecting together the resistor R33 and the anode of the diode D31 is connected to the inverting input terminal of the first comparator CA via a resistor R34. Further, the node connecting together the resistor R33 and the anode of the diode D31 is connected to the inverting input terminal of the second comparator CB via a resistor R37.
A reference voltage VR1 generated by a resistive voltage divider dividing the reference voltage VR0 by the resistors R31 and R32 is input to the non-inverting input terminal of the first comparator CA. Further, a reference voltage VR2 generated by a resistive voltage divider dividing the reference voltage VR0 by resistors R35 and R36 is input to the non-inverting input terminal of the second comparator CB. These reference voltages VR1 and VR2 have respective constant voltages independent of the ambient temperature. On the contrary, potential V31 of the node connecting together the diode D31 and the resistor R33, input to the inverting input terminal of the first comparator CA, varies depending on the ambient temperature, and potential V32 of the node connecting together the diode D31 and the resistor R33, input to the inverting input terminal of the second comparator CB, varies depending on the ambient temperature.
The reference voltage VR1 generated by the resistors R31 and R32 corresponds to the potential V31 of the node connecting the diode D31 and the resistor R33 at a first specific operating temperature, and if the operating temperature of the semiconductor device exceeds the first specific temperature, the output of the first comparator CA is inverted. Further, the reference voltage VR2 generated by the resistors R35 and R36 corresponds to the potential V32 of the node connecting the diode D31 and the resistor R33 at a second specific operating temperature, and if the operating temperature exceeds the second specific temperature, the output of the second comparator CB is inverted.
In the above-described patent publication, it is described that the second specific temperature is set at 130 degrees C. which is the guaranteed temperature for a suitable operation of the semiconductor-integrated circuit, and that the first specific temperature is set at 100 degrees C. which is slightly lower than the second specific temperature. Further, it is also described that when a microcomputer that controls the semiconductor-integrated circuit detects that the operating temperature exceeds the first specific temperature based on the output of the first comparator CA, the control unit judges that the operating temperature of the semiconductor-integrated circuit comes close to the upper limit of the guaranteed temperature range for a suitable operation, and thus, carries out a variety of processings such as transition of the operational mode of the semiconductor-integrated circuit into a power save mode.
In the temperature detection circuit 200 shown in FIG. 7, it is difficult to accurately predict, by calculations, the potential of the node N22 at which the output of the comparator 201 is inverted at a desired specific temperature, because the forward voltage drop of the product diode D21 varies due to the process conditions of the semiconductor-integrated circuit. Further, there is also a significant range of variation in the offset voltage of the comparator 201. Thus, if the resistance ratio between the resistors R21 and R22 defining the potential of the node N21 is set based on the potential of the node N22 obtained by calculations, there is a problem in that the accuracy of temperature detection is lowered due to a significant error caused by the range of variation.
In order to avoid the problem as described above and to thereby improve the accuracy of temperature detection, the resistance ratio between the resistors R21 and R22 of the resistive voltage divider is usually adjusted with the ambient temperature being maintained at the desired specific temperature. More specifically, for example, the resistor R21 is configured by a programmable resistor, the temperature detection circuit 200 is operated with the ambient temperature being maintained at the desired specific temperature, and the resistance of the resistor R21 is adjusted by using a fuse-cut technique so that the output of the comparator 201 is inverted exactly at the desired specific ambient temperature. In this manner, influences of the range of variation in the forward voltage drop of the diode D21 and the offset voltage of the comparator 201 can be avoided, to thereby improve the accuracy of the temperature detection.
If only one specific temperature is to be detected by the temperature detection circuit, the process of adjustment of resistance ratio is needed only once. However, if there are a plurality of desired specific temperatures, as in the case of the temperature detection circuit 300 shown in FIG. 8, resistance ratio must be adjusted at each of the desired specific temperatures. More concretely, in the temperature detection circuit 300, resistance ratio between the resistors R31 and R32 for detecting the first specific temperature is needed to be adjusted with the ambient temperature being maintained at the first specific temperature, and the resistance ratio between the resistors R35 and R36 for detecting the second specific temperature is needed to be adjusted with the ambient temperature being maintained at the second specific temperature.
Usually, in typical semiconductor devices, an environmental test is carried out as the wafer test at the upper limit of the guaranteed temperature range for a suitable operation, to thereby determine pass or fail of the products. If it is desired to detect the upper limit of the guaranteed temperature range for a suitable operation by using the temperature detection circuit, the upper limit can be detected by varying the resistance ratio between the resistors for detecting the upper limit of the guaranteed temperature range in the wafer test. However, if it is desired to detect the specific temperature, which is 100 degrees C. in the case of the above-described patent publication and slightly lower the upper limit temperature 130 degrees C., in addition to the upper limit temperature, the adjustment of the resistance ratio at 100 degrees C. is needed in addition to the adjustment thereof at 130 degrees C. In this case, there is a problem in that the productivity rate of the semiconductor devices is lowered because the adjustment of the resistance ratio at the temperature of 100 degrees C., which is not originally intended for the wafer test, is additionally needed.
In recent years, development of the semiconductor devices has been directed to multiple and diversified functions of the semiconductor devices, and the number of specific temperatures desired to be detected by the temperature detection circuit is increasing. Thus, in the temperature detection circuit, the resistance ratio between the resistors should be adjusted in a plurality of steps corresponding to the increased number of the specific temperatures to be detected. Accordingly, there arises a problem in that the productivity rate of semiconductor devices is lowered by using the conventional temperature detection circuit, because the number of adjustments for the resistance ratio therein is increased along with the increasing number of the desired specific temperatures.


A binder for non-woven fibers or fabrics is prepared comprising a starch-polymer graft, starch and a starch crosslinking agent. An acrylamide copolymer may optionally be included. The binder is useful for non-woven fibers such as a polyester fiber mat, and particularly single ply, bitumin roofing materials.

The present invention relates to binders, more specifically, starch based binders for non-woven fibers such as polyester, polypropylene, fiberglass or cellulosic fibers.
Fibers, such as polyester fibers are often dry-laid to form a mat which is then fed through a pad bath to apply a binder which is then dried and cured. For roofing the binder-treated polyester mat is fed through a hot asphalt bath to apply a coating of asphalt. Due to the high temperature of the asphalt bath, polyester mats often stretch, resulting in a great decrease in the width of the mat.
Binders are known which reduce shrinkage of the mat width. Conventional binders comprise an acrylic or a vinyl-acrylic latex emulsion. For example, U.S. Pat. No. 4,617,229 describes a latex-type binder which is a mixture of methyl methacrylate and ethylacrylate and which is used to bind non-woven fabric for the carcass of a water-proofing membrane used in roofing.
Non-woven fabrics cover a wide array of products including consumer goods like mattress dust shields, disposable diaper cover fabrics, cleaning towels, carpets, draperies and industrial and commercial goods like wipe cloths, tire cords, conveyor belts, hospital fabrics, etc. The technology for non-woven production includes filament or staple filters processed through a dry or wet-lay sheet formation step and bonded by thermal, mechanical or chemical means. Laminations of non-wovens to other non-wovens, film sheets or traditional woven or knitted textiles are often still classified as non-wovens.
One of the non-woven bonding methods is to treat a staple or filament fiber sheet with an emulsion polymer containing a formaldehyde based crosslinking resin in order to impart water and solvent resistance When the emulsion is dried and cured the polymer forms intimate bonding of the fibers This polymer deposition modifies the strength, stiffness, environmental resistance, elongation and many other characteristics of the fiber fabric sheet. The fiber can be from a great variety of compositions, e.g. rayon, wood pulp (cellulose), cotton, nylon, polyester, glass and graphite In the case of carded staple fiber the polymer usually contributes most of the strength and toughness character in the resulting non-woven. In wet-laid wood pulp fiber products the polymer is able to provide the non-woven strength and resistance to aqueous and solvent environments which the untreated non-woven would not have. In glass mat non-wovens traditionally bonded with a urea-formaldehyde resin, addition of emulsion polymers alters the toughness of the resulting non-woven. Even in filament or staple fiber non-wovens which are bonded by mechanical (i.e. needle punching) or thermal (e.g. spun bonded) techniques and are formed into useful non-woven fabrics without a chemical treatment, an additional application of an emulsion polymer can enhance or produce other valuable characteristics such as stretch resistance or non-slip character.
Melamine-formaldehyde resins do not build viscosity in the binder until cured, but they have the disadvantage of having an unpleasant odor and of releasing free formaldehyde. Curing with such resins involves the crosslinking of binder molecule with the methylol or methylated methylol group of the melamine resin. Free formaldehyde can be released either directly from the binder or mixture or when the coating is cured on the drying machine. The presence of even less than one percent of free formaldehyde, based on the total weight of the product, is undesirable, not only because of its objectionable odor, but because it is an allergen and an irritant, causing severe reactions in the operators who manufacture the binders and who treat and handle the non-woven fibers or fabrics.

Starch based binder composition for non-woven fibers or fabrics


The invention is a machine for processing tubes. Preferably the machine is adapted to create glass flares by flaring an end of each tube and then cutting a length off the flared end. The machine includes several holding devices, each of which is adapted to hold a tube, preferably in a generally horizontal position. Each holding device is pivotally connected to two adjacent holding devices to thereby form an endless loop. The endless loop of holding devices is adapted to travel in a first endless path, preferably obround. The machine includes devices for continuously moving the endless loop of holding devices in the first endless path. The machine also includes a plurality of tube processing devices, such as flaring heads, which are also adapted to travel in a smaller endless path, preferably circular. The endless path of the processing devices is configured and driven so that each processing device line up with and travel the same velocity as a tube as it travels through a portion of the path of the holding devices. As a result, the machine is capable of continuous and efficient operation. Preferably, the machine also includes a plurality of tube cut-off tools which likewise rotate on a turret whereby the cut off tools line up with tubes as they travel past.

The present invention relates to machines for handling and processing tubes preferably glass tubes. One aspect of the invention relates to flaring machines which flare one end of a length of glass tubing and then cut a relatively short length off of the flared end. The pieces so produced are typically referred to as flares and are used in the manufacture of fluorescent and incandescent lamps and other glass products such as cathode ray tube (CRT) necks.
Various designs for flare producing machines have been or are in use. For example, U.S. Pat. No. 3,077,095, shows a machine for producing flares wherein glass tubes are held in a circular array and brought by intermittent rotation into specific points about a circle at which points different operations. i.e. heating, advancing, flaring, and cutting are performed.
Another design for a flare producing machine is shown in a technical publication from BADALEX a Sale Tilney Company of Weybridge England. This machine includes a first horizontal turret adapted to hold 36 tubes and rotate continually. A second turret carrying 36 tube flaring tools rotates at the same velocity as the first turret. The tube cut-off device is stationary within the first turret and relies on the first turret to bring the flared tube into the cut-off position.
Still another design for a flare producing machine is shown in a technical brochure published by the FALMA Co. of Switzerland. In this design, short sections of pre-cut tube lengths are loaded into the flare forming machine. The machine includes a turret wherein the sections of tube are held vertically in chucks and indexed about a vertical axis into the positions at which the different operations are performed to produce the flares.


A projector is provided. The projector comprising a projector housing in which there are arranged an illuminant holder, for holding an illuminant, a reflector that reflects the light beams emitted by the illuminant to a light exit opening of the projector housing that is covered by a transparent disk, and a convective cooling device, partially enclosing the illuminant, that produces a convection flow for dissipating the heat output by the illuminant and has a number of cooling fins combined into cooling fin packs. The cooling fins are aligned parallel to the radiating direction of the projector, and the cooling fin packs are arranged above and below the illuminant in the direction of gravity.

The invention relates to a projector.
WO 2004/029 507 A1 discloses a projector that has an illuminant that is arranged in a projector housing, is capped at one or two ends and comprises a lamp or a burner, for example a discharge lamp in the form of a metal-halide lamp, and a reflector that reflects the light emitted by the illuminant in the direction of a front opening of the projector housing that can be sealed by a transparent cover element, for example a protective disk or lens disk.
In addition to radiating visible light beams, a burning illuminant also produces in its arc or filament invisible thermal radiation that lies in the infrared spectral region and is output by the following three processes to the surroundings of the illuminant:                a) the thermal radiation is partially absorbed by the components surrounding the illuminant, such as reflector, illuminant base and supply leads to the illuminant, and by the projector housing, which components thereby experience negative influence on their material properties and themselves act as secondary heat source,        b) thermal conduction takes place via the electric contacts and via the ceramic bodies of the illuminant base, and        c) the ambient air of the illuminant is heated up, rises upward and entrains cooler air upward from below in a convective cooling process.
In order to support the last-named process and to provide a projector of high power with a compact design, the projector housing disclosed in WO 2004/029 507 A1 comprises an upper, cylindrical projector housing part and a lower projector housing part that is of cuboidal design and on which ventilation shafts with mutually separate ventilation ducts are arranged. The ventilation ducts are separated from one another by fins that have inside the ventilation shaft a first fin section adjacent to the air exit openings, and a second fin section, which is adjacent to the air exit openings and is bent away from the first fin section.
U.S. Pat. No. 5,172,975 A discloses a projector with an illuminant, a reflector and a light exit opening in a cylindrical projector housing on which there are formed ventilation ducts that likewise circulate for convective cooling of the surroundings of the illuminant outputting heat, and are delimited by fins. The fins are bent away outside the cylindrical projector housing and are flanged at their ends so that, firstly, light is prevented from exiting from the interior of the projector housing and, secondly, the flow of air is directed away perpendicularly from the projector housing.
U.S. Pat. No. 1,758,290 A discloses a projector housing with ventilation shafts, which are arranged on the housing walls, have ventilation ducts separated from one another and are separated from one another by fins such that uniform ventilation ducts are produced via which the cooling air flows into the interior of the projector housing. The ends, projecting into the interior of the projector housing, of the fins above and below the optical axis of the projector are bent away again in respectively opposite directions such that the ends of the fins arranged above the optical axis are directed toward the underside of the projector housing, while the ends, arranged below the optical axis, of the fins are directed toward the top side of the projector housing, and the two sections are connected to one another in a central horizontal part such that improved circulation of cooling air through the projector housing is attained by the different alignment of the ends, located in the interior of the projector housing, of the fins.
EP 0 389 659 A1 discloses a projector in the form of an emitter of compact design that has a lamp capped at one or two ends, a reflector part that comprises an annular frame bracket into which a parabolic reflector is inserted and on whose light exit side holders for a glass disk are arranged, a block-shaped housing for holding heat-sensitive electrical and electronic components, and a cooler that is arranged laterally on the reflector part at the level of the lamp. The cooler has a flange attachment that is aligned in the extent of the lamp axis and which is adjoined outside the reflector part by a cooling surface element that is designed as a cooling fin block, perforated plate arrangement, laminar arrangement or as a spigot configuration. The lamp holder is inserted in effectively thermally conducting contact into the flange attachment of the cooler, which attachment is designed as a tube flange, the cooler projecting with its flange attachment through an opening of the reflector into the reflector interior, while the cooling surface element projects across its entire width over the near side wall of the block-shaped housing such that the air heated in the region of the cooling surface element can flow past the housing and, in the process, the heat output by the lamp by convection can be dissipated to the ambient air via the cooler and pass the block-shaped housing containing the temperature-sensitive electrical and/or electronic components.
U.S. Pat. No. 5,515,254 A discloses a color mixing projector having a housing that is arranged movably in a projector bow-type handle. An illuminant and a cooling device are arranged in a first section of the housing, while a second housing section contains movable color filters and a lens cover. The cooling device comprises a number of contoured, external cooling ribs that are incorporated into the first housing section, which consists of aluminum casting, and have an approximately ellipsoidal outer contour in which an elliptical reflector is arranged and surrounds the illuminant. With the aid of an ellipsoidal cutout, the housing surrounds an illuminant, which is inserted into a mount that is surrounded by an annular cutout of the cooling device. Aligned with the contoured, external cooling ribs are internal cooling ribs that are arranged around an inner annular periphery of an annular section and form a relatively large heat-absorbing surface, while the heat is dissipated via additional ventilation openings. The front termination of the first housing section is formed by a plate that keeps the heat output by the illuminant away from the second, front section of the housing.
EP 0 751 339 discloses an illumination device having a paraboloid-shaped reflector, an illuminant arrangement and a bipartite, tubular front housing in which a front lens is arranged. Provided on the optical axis of the paraboloid-shaped reflector is a central opening for holding the illuminant arrangement, which comprises the illuminant and an illuminant holder made from aluminum casting or ceramic with a number of parallel cooling ribs. The reflector and the front housing consist of an effectively thermally conducting material such as aluminum. The convex rear side of the reflector has a number of parallel cooling ribs that are integrally formed in one piece on the reflector and dissipate the heat output by the illuminant to the surroundings by convection cooling. The illuminant holder, the illuminant, the reflector and the cooling device form a part of the projector housing, the cooling ribs being integrally formed on the outside of the reflector.

Arnold & Richter Cine Technik GmbH & Co. Betriebs KG


A pet toy with one or more treat holding receptacles is provided. A receptacle generally conforms to the outer surface or shape of the pet toy, and extends into the interior of the pet toy for holding a primary treat. The receptacle has a plurality of interior engaging surfaces that frictionally hold the primary treat in a desired orientation. An opening is formed through the receptacle for loading secondary treats into an interior of the pet toy. The primary treat has an exposed portion shaped and sized to provide a desired degree of difficulty for an animal to remove the primary treat from the corresponding receptacle. The portion of the primary treat in contact with the engaging surfaces of the receptacle forms a cap or closure, and when all or part of the primary treat is removed, the secondary treats may be dispensed through the opening of the receptacle.

It is well known that providing an interactive toy for an animal provides many benefits. For dogs, providing a toy that can be chewed over a long period of time provides necessary mastication, and may also provide dental cleaning. For dogs that may experience separation anxiety, providing a toy that can keep the dogs occupied for a long period of time is therapeutic thereby reducing destructive behaviors. Extended periods of play with a toy also increase the activity level of the animal, resulting in beneficial exercise for the animal.
In recent years, the concept of providing a pet toy with integral treats resulted in the development of a number of pet toys with treats that are frictionally held within the toy, or that may be dispensed from the toy by movement of the toy.
One example of a reference disclosing a pet toy with treats includes U.S. Pat. No. 7,555,997. This reference describes an exterior feature for holding treats by a peripheral lip that surrounds and overlaps a corresponding peripheral edge of a first treat, and an interior open space that may be used to hold additional treats. The first treat blocks access to the interior open space.
Another reference disclosing a pet toy with treats is the U.S. Pat. No. 7,500,450. This reference teaches a toy with a hollow interior, a first edible treat that blocks access to the interior, and a second edible treat that interlocks with the first edible treat, the second edible treat extending into the interior of the toy. Additional treats may be placed within the hollow interior.
Yet another reference disclosing pet toys with treats is the U.S. Pat. No. 6,470,830. This reference describes a toy with a trapper cavity or slot to receive a treat. An adjacent bias cavity forms a bias member between the trapper cavity and aperture. Opposing walls of the trapper cavity clamp against surfaces of the treat inserted through the cavity.
Yet another reference in the field of pet toys with integral treats is the U.S. Pat. No. 5,832,877. This reference discloses a pet toy with a longitudinal panel, and first and second lips formed along opposite respective edges of the panel. The edges are folded over to form overlapping areas that serve as receptacles to receive treats.
Yet another reference that discloses a pet toy incorporating treats is the U.S. Pat. No. 6,129,053. This reference teaches a pet toy having an outer surface with one or more recesses for holding treats. The recesses may be of varying depths and shapes to receive different types of treats. Some of the recesses may extend completely through the sidewall of the toy.
One primary goal for these types of pet toys is to encourage an animal's extended interaction with the toy. However, in practice, many of these toys have limitations that do not result in extended interaction. One common drawback of many of these toys is that the toy is constructed in a manner that makes it overly difficult for the animal to access the treats; accordingly, the animal becomes frustrated and loses interest in the toy. Conversely, there are other toys that are constructed in which the treats are too easily accessed, and therefore the animal quickly loses interest in the toy because the treats are quickly consumed. Another drawback of many of the toys is that they may not be made of sufficient quality, and therefore the toy becomes destroyed in a short period of time by the biting and chewing action of the animal. For some of these toys, the animal may ingest pieces of the toy thereby creating a significant health risk for the animal.
One can appreciate from the foregoing that providing a pet toy with treats to sustain an extended interaction with an animal requires a special construction, not only for the toy itself, but also in the manner in which the treat(s) are retained in the toy and dispensed or removed from the toy.


A semiconductor device of the present invention comprises a gate insulating layer made of a oxynitride formed on a semiconductor substrate, a gate electrode formed on the gate insulating layer, source/drain regions formed in the semiconductor substrate on both sides of the gate electrode and including impurity, and a oxynitride insulating layer covering the source/drain regions on a surface of the semiconductor substrate and having nitrogen concentration distribution which is different from that of the gate insulating layer along a film thickness direction.

1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same and, more particularly, a semiconductor device having an MIS (metal insulator semiconductor) type field effect transistor and a method of manufacturing the same.
2. Description of the Prior Art
According to the recent miniaturization and high integration of the semiconductor device, thin film formation of a gate insulating layer has been accelerated. According to this tendency, reduction in a hot carrier resistance of the semiconductor device and a punch-through phenomenon of the impurity included in gate electrode constituting material to the substrate of the field effect transistor have become issues.
In general, a MIS field effect transistor, e.g., PMOS transistor is formed through manufacturing steps shown in FIGS. 1A to 1D.
At first, as shown in FIG. 1A, a field oxide layer (local oxidation of silicon:LOCOS) 102 is formed by selectively oxidizing a surface of a device isolating region of a silicon substrate 101. An n-type well 103 is then formed by introducing n-type impurity into a device forming region surrounded by LOCOS 102. An insulating layer 104 formed of SiO.sub.2 is formed by thermally oxidizing the device forming region on the surface of the silicon substrate 101.
Next, a polysilicon layer is formed on the insulating layer 104 and the field oxide layer 102. As shown in FIG. 1B, a gate electrode 105 is then formed by patterning the polysilicon layer by virtue of a photolithography technique.
Thereafter, a p-type impurity such as boron is introduced into the gate electrode 105 and the silicon substrate 1, so that conductivity of the gate electrode 105 can be made higher and impurity diffusion layers 106s, 106d of low impurity concentration are formed on both sides of the gate electrode 105.
Subsequently, as shown in FIG. 1C, dielectric side walls 107 are formed on side surfaces of the gate electrode 105. With the use of the gate electrode 105 and the side walls 107 as a mask, impurity diffusion layers 108s, 108d of high impurity concentration are then formed on both sides of the gate electrode 105. A source region 109s and a drain region 109d are formed to have a LDD (lightly doped drain) structure by the impurity diffusion layers 108s, 108d of high impurity concentration and the impurity diffusion layers 106s, 106d of low impurity concentration.
By the way, a thin silicon oxide layer is employed as material of the insulating layer 104 formed beneath the gate electrode 105. However, as shown in FIGS. 1B and 1D, if borons are ion-implanted as impurity into the silicon substrate 101, the impurity has punched through the gate electrode 105 and the insulating film 104 to thus lower n-type impurity concentration in the surface layer of the n-type well 103. As a result, a pn junction composed of the p-type impurity diffusion layers 106s, 106d of low concentration and the n-type well 103 occurs in an area substantially deeper than the surface of the substrate.
On the contrary, in the MOS transistor, further improvement of the hot carrier resistance of an insulating film formed on the surface of the substrate has been requested with the progress of miniaturization.
Under these circumstances, it has been reported that, with the use of a silicon oxynitride (SiON) layer as the insulating layer beneath the gate electrode, punch-through of boron ions to the semiconductor substrate beneath the gate electrode can be prevented by the silicon oxynitride layer. In addition, it has been reported that hot carrier resistance can be improved by forming a silicon oxynitride layer on source/drain regions of the semiconductor substrate.
In order to achieve two major objects of employing the silicon oxynitride layer simultaneously, the silicon oxynitride layer which is formed on a principal surface of the semiconductor substrate as the gate insulating layer has been used as it is as a covering film on the source/drain regions.
If the silicon oxynitride layer is formed on the drain region as the covering film, drain avalanche hot carrier resistance can be improved rather than the case where a thermally oxidizing silicon layer is formed as the covering film. Besides, if such effect would be enhanced, nitrogen concentration in the silicon oxynitride layer should be made higher.
If nitrogen is excessively included in the insulating layer beneath the gate electrode, the number of trapped hole or electron becomes large and also channel hot hole resistance or channel hot electron resistance is degraded.
If nitrogen is excessively included in the oxide film beneath the gate electrode, a threshold voltage in the transistor parameters is largely shifted to the negative direction rather than the case where no nitrogen is included.
Regarding such problem, it has been set forth in Patent Application Publication (KOKAI) 5-211330, for example, that, if nitrogen concentration of the silicon oxynitride layer in the source/drain regions of the field effect transistor is made higher than that of the silicon oxynitride layer beneath the gate electrode, hot carrier resistance can be improved and also a current driving factor can be enhanced by a low gate voltage.
However, unless nitrogen concentration in the insulating film formed immediately beneath the gate electrode is sufficiently high, punch-through of boron ions in the gate electrode and the insulating layer cannot be prevented. Therefore, it is not preferable that nitrogen concentration in the silicon oxynitride layer constituting the gate insulating layer is set lower than nitrogen concentration in the silicon oxynitride layer in the source/drain regions.
As stated above, in the MIS transistor technology in the prior art, there exists no structure which is able simultaneously to prevent the punch-through from the gate electrode to the silicon substrate, reduce a shift amount of the threshold voltage, improve the avalanche hot carrier resistance in the source/drain regions, and prevent degradation of the transistor parameters.

Semiconductor device and method of manufacturing the same where the nitrogen concentration in an oxynitride insulating layer is varied


A bocce ball game caddy for removably retaining bocce ball game components. The caddy includes a plurality of racks supported by posts in vertically spaced relation. Each of the racks supporting at least one retainer adapted to removably support the bocce ball game components.

The game of bocce ball is typically played as a backyard lawn game. It can be played in many different ways, but is usually played with teams, with one, two or four players per team. A typical bocce ball game set consists of eight large bocce balls (two pairs of four balls, with each pair having a different color or pattern) and a smaller "pallina" ball, (sometimes called a "jack"), which is typically colored white. The object of bocce ball is to try to roll the bocce balls closer to the pallina than the opposing team. Typically, one player on a team starts the game by throwing the pallina, and then that player rolls the first bocce ball trying to get it as close to the pallina as possible. Each player on the opposing team then rolls his/her bocce ball until all four balls are played. After the opposing team plays all of their balls, each player on the starting team then rolls the remaining bocce balls, trying to get closer to the pallina than the opponent's closest bocce ball. Alternatively, the players on opposing teams may take turns rolling their respective balls. When all the bocce balls have been played (which completes a frame), one point is awarded to the team for each of its bocce balls which are closer to the pallina than the closest ball of the opponent's closest bocce ball. The team that scores in a frame starts the next frame by throwing the pallina and playing the first bocce ball. Play continues until a team wins by reaching a score of sixteen points or some other predetermined point total.
There is a need for a caddy that may be used for carrying and storing a set of bocce ball game components in a convenient manner which will keep all of the game components together.


Authentication devices and methods for generating dynamic credentials are disclosed. The authentication devices include a communication interface for communicating with a security device such as a smart card. A dynamic credential such as a one-time password (OTP) or a message authentication code (MAC) may be generated by receiving from a server an encrypted initialization seed encrypted with an asymmetric encryption algorithm using a public key of a public/private key pair, submitting the encrypted initialization seed to a security device, decrypting at the security device the encrypted initialization seed with a private key of the public/private key pair, returning the decrypted initialization seed to the authentication device, deriving at the authentication device a secret credential generation key from the decrypted initialization seed, and generating the dynamic credential by combining a dynamic variable with the secret credential generation key using a symmetric cryptographic dynamic credential generation algorithm.

As remote access of computer systems and applications grows in popularity the number and variety of transactions which are accessed remotely over public networks such as the Internet has increased dramatically. This popularity has underlined a need for security in particular;    a. How to insure that people who are remotely accessing an application are who they claim they are and how to insure the transactions being conducted remotely are initiated by legitimate individuals. This subject is referred to as authentication.    b. How to insure that transaction data has not been altered before being received at an application server. This is referred to as data integrity.    c. How to guarantee that an individual, once having engaged in a transaction, is not in a position to repudiate it. This is referred to as non-repudiation.
In the past, application providers have relied on static passwords to provide the security for remote applications. In the last couple of years it has become evident that static passwords are not sufficient and that more advanced security technology is required.
PKI Smart Cards
One way of solving the security problems associated with remote access to computer systems and applications over public networks is provided by a Public Key Infrastructure. In a Public Key Infrastructure one associates a public-private key pair with each user. The key pair is associated with a certificate (issued by a trusted Certificate Authority) that binds that public-private key pair to a specific user. By means of asymmetric cryptography this public-private key pair can be used to:    a. authenticate the user,    b. sign transactions, documents, e-mails (so as to prevent repudiation), and    c. set up encrypted communication channels.
To guarantee an adequate level of security it is mandatory that each user's private key remains secret and can only be accessed (e.g. to create a signature) by the legitimate user associated with that key. It is common to rely on a smart card to store the public-private key pair and the certificate and to carry out the cryptographic calculations involving the private key. The use of the private key by the card is then often PIN-protected.
PKI-enabled smart cards are, and have been issued by:    a. Corporations to their employees or customers to secure the log-in to their computer networks or the remote access to their applications,    b. Banks to their customers to secure e.g. Internet banking applications, and    c. Governments to their citizens as electronic ID cards to create legally binding electronic signatures.
Apart from the advantages, there are also some disadvantages associated with PKI and the smart cards carrying the PKI keys and certificates:    a. Building a Public Key Infrastructure is generally quite complicated and therefore expensive when compared to competing security technologies.    b. PKI is inherently limited to environments and applications where there is a digital connection between clients and servers. In other words it is unsuitable for telephone banking or other delivery channels where it is not possible to provide a digital connection between the container of the PKI certificate and private key on the one hand and an application server on the other hand.    c. PKI smart cards do not have a power supply or a user interface. PKI smart cards therefore rely on the presence of an interfacing device that provides electrical power to the card, that is capable of digitally exchanging data with the card, and that is capable of interfacing with the user (e.g. capturing the card's PIN and presenting the data that should be signed). In most cases a PC with a connected transparent smart card reader is used. This reduces the mobility of the user (many PCs are not equipped with smart card readers). It also presents a security problem: all user interaction (such as approving a signature or capturing the card's PIN) is done on the inherently insecure PC.Strong Authentication Tokens
An alternative technology for authentication and transaction signature capabilities is offered by what are called 'strong authentication token devices'. A typical example of strong authentication token is any one of the Digipass tokens offered by Vasco Data Security Inc., see the website Vasco.com.
A strong authentication token is a small autonomous battery-powered device with its own display and keyboard. In some cases the keyboard is reduced to a single button or even completely omitted. The main purpose of a strong authentication token is to generate so-called 'One-Time Passwords' (OTPs). In some cases strong authentication tokens are also capable of generating electronic signatures or Message Authentication Codes (MACs) on data that has been entered on the token's keyboard. If the token has a keyboard, the usage of the token is often protected by a PIN.
To be able to generate OTPs or MACs, strong authentication tokens are capable of doing cryptographic calculations based on symmetric cryptographic algorithms parameterized with a secret value or key. Typical examples of such symmetric cryptographic algorithms parameterized with a secret value or key are symmetric encryption/decryption algorithms (such as 3DES or AES) and/or keyed one-way hash functions (such as MD5 or SHA-1 in OATH compliant tokens). In the remainder of the text the output of such algorithms will sometimes be referred to as 'symmetric cryptogram'. The terminology 'symmetric cryptogram' shall thus be understood as not only the output of a symmetric encryption algorithm but also of symmetric decryption algorithms or keyed hash functions. Strong authentication tokens are personalized with one or more secret keys that are supposed to be different for each individual token. To generate a one-time password or signature, the token typically performs the following steps (refer to FIG. 1):    a. Step 10: The token takes one or more input values (these could include a challenge generated by a server and typed-in on the keyboard by the user, and/or the value of the token's internal real-time clock, and/or the value of an internal counter managed by the token, and/or transaction data typed-in on the token's keyboard by the user).    b. Step 11: The token puts the one or more input values into a specified format.    c. Step 12: The token then cryptographically combines the one or more input values with a personalized secret key 15 stored securely in the token. In a typical strong authentication token the token submits the one or more input values to a symmetric encryption/decryption algorithm and/or one-way hash function parameterized by a personalized secret key 15 stored securely in the token. The result is a cryptogram or a hash value.    d. Step 13: The token transforms the cryptogram or hash value that is the outcome of this encryption/decryption or one-way hash (or more generally, some other cryptographic combination) into the actual OTP or MAC. i.e., the cryptogram or hash is typically truncated, converted in a human readable format (e.g. through decimalization) and visualized on the display. The user may submit this value to the application server.In the remainder of the text one-time passwords or electronic signatures generated by strong authentication tokens as described above may be referred to as dynamic authentication credentials or just dynamic credentials. In the remainder of the text the input values referred to in step 10 may be referred to as dynamic variables. Dynamic variables the value of which comes from a source that is external to the strong authentication token may be referred to as external dynamic variables. Examples of external dynamic variables may include a challenge or transaction data that e.g. may be provided to the token by a user entering them on the token's keyboard. Dynamic variables the value of which comes from a source that is internal to the strong authentication token may be referred to as internal dynamic variables. Examples of internal dynamic variables may include a time-value that is provided by a token's real-time clock or a counter that is stored in a token's memory and updated by the token's processor. The algorithms published by the "OATH—initiative for open authentication" are an example of standardized algorithms for generating dynamic credentials.
In most cases a strong authentication token is a physical device, however in some cases the functionality of these strong authentication tokens to generate OTPs or MAC signatures is emulated by software running on a PC, a workstation, a mobile phone, a personal organizer, a PDA, etc. The latter are referred to as "soft tokens".
Once the OTP or MAC has been produced it is conveyed to an entity where the value can be verified as authenticating the user or the message, see FIG. 2. Typically the entity is an application server. The application server stores data for each token, including which secret key(s) the token has been personalized with, and the identity of the user associated with the token. To validate a one-time password or signature, the server retrieves the secret key (115) which is a copy of the key personalized in the token, takes the same inputs that were used by the token and in essence performs the same algorithm 112 as the token. The server then compares 120 the result it obtained with the value it received. (In practice, the validation of an OTP or MAC is often somewhat more convoluted if the strong authentication algorithm is time-based or counter-based, due to synchronization issues.) Since a one-time password or signature generated by a strong authentication token is a function of the token's individual secret key and the always different values of the input(s) to the token algorithm, validating the correctness of the one-time password or signature gives the application server a very high degree of confidence that the person submitting the one-time password or signature possesses the correct token and knows its PIN (if the token is PIN protected), which in turn gives a high degree of confidence that that person is indeed the legitimate user associated with that token device.
Because the OTP verification server and the OTP token in essence perform the same algorithm with the same key, the OTP generation algorithm can be a one-way or non-reversible function. That means that the actual OTP can be shorter than the cryptogram or hash value from which it is derived. This allows for OTP or MAC lengths that are sufficiently short so that it is not too inconvenient for users to manually copy the OTP or MAC values from the token display onto a PC. As a consequence strong authentication tokens don't require a digital connection between the token and the verification server.
The major advantages of strong authentication tokens when compared to PKI cards are:    a. They are fully autonomous (tokens have their own power supply and their own user interface);    b. They are independent of the delivery channel or communication medium (tokens don't require any digital or electronic connection with any other device; all input and output of data is done by the user via the token's display and keyboard); and    c. They offer a very high level of security (all user interaction such as capturing the PIN or providing transaction data to be signed is done via the token's own secure user interface).
In some cases where smart cards have been issued, one wants to get around the disadvantages and limitations associated with smart cards and achieve the same advantages that strong authentication tokens offer i.e. full autonomy, independence of the delivery channel, and a secure user interface.
One alternative is to combine the smart card with an unconnected, battery-powered smart card reader that has its own display and keyboard. The idea is that the combination of the smart card and the unconnected smart card reader emulates a strong authentication token. The functionality normally provided by a strong authentication token is then split over the smart card and the unconnected reader. The unconnected reader takes care of all user interface, and all or a part of the other token functionality is delegated to the card.
Typically, all personalized secrets and security sensitive data are stored and managed by the card (e.g. the PIN is stored and verified by the card, the secret keys are stored on the card and all cryptographic operations involving those keys are done by the card, counters used as input for the token algorithm are stored and managed by the card). Part of the token functionality that is less sensitive (e.g. truncating and converting the generated hashes or cryptograms) often happens in the reader. An example of this combination is discussed below.
This principle is often used by banks that combine the bank cards they issue (for usage at Automatic Teller Machines or Point Of Sale terminals) with unconnected readers to secure their remote banking applications (such as internet banking or telephone banking). A good example of this is the Mastercard Chip Authentication Programme (CAP), which specifies how EMV smart cards can be used in combination with unconnected smart card readers to generate one-time passwords and electronic transaction data signatures.
This technology relies on the smart cards being capable of doing symmetric cryptographic operations and having been personalized with a secret key to be used for symmetric cryptographic operations. However, PKI-enabled smart cards are designed to store asymmetric keys and do asymmetric cryptographic operations. Many PKI-enabled smart cards don't support symmetric cryptographic operations or (if they do) have never been personalized with an individual symmetric secret key.
Traditional PKI Signatures
The usual way to create an electronic signature with a PKI smart card, is that the input data (usually, the input data consist of a hash of the actual transaction data one wants to sign) are encrypted by the card's private key.
The usual way to validate such a signature, is that the validating entity decrypts the received signature with the public key. If the decryption of the signature results in the same value as the input data that were supposed to have been encrypted by the private key, the signature is validated successfully. Note that thanks to this asymmetric characteristic the validating entity never needs to have access to the card's private key. This allows the private key to be kept secret from any party other than the signing party, even from any verifying party, thus providing for true non-repudiation.
This can only be done successfully if the signature itself is in its entirety available to the validating entity. The decryption of an incomplete signature would only result in meaningless data that can not be compared with the input data that were supposed to have been signed.
This condition can not be fulfilled in practice when small hand-held unconnected smart card readers are being used: given that a typical PKI signature size is in the order of 100 bytes, the display of these readers is far too small to display a full signature and it is in any case totally unrealistic to expect a user to manually transfer a 100-byte value from the reader's display to a PC without making a single mistake. The 100-byte typical PKI signature should be compared to a typical 6 to 8-digit or 3 to 4-byte OTP or MAC of a traditional strong authentication token. This is certainly a reason why asymmetric cryptography and private keys have not been used to generate OTPs and MACs by e.g. strong authentication tokens.
The inventors have determined that methods and apparatus are needed that:                a) allows the usage of a device storing PKI private keys (such as PKI-enabled smart cards or USB sticks) to authenticate users and to sign transactions,        b) without the need for any user application to have some kind of a direct or indirect digital connection with the device containing the private key, in particular a digital connection that would allow the user application to submit data to the card for signing by the card's private key and that would allow retrieval of the entire resulting signature from the card should not be necessary,        c) without the need for the PKI-enabled device containing the private key (e.g. a PKI smart card or USB stick) to:                    1) either support symmetric cryptographic operations, or            2) to have been personalized with some secret or confidential data element that can be read by a suitable reader.

Remote authentication and transaction signatures