The invention concerns a one-way fluid flow non-return valve, consisting of body (19) with shaft (2), onto which cover (15) with seal (16) is mounted. Into the blind hole (4) in shaft a helical spring (3) is inserted together with piston (1) in a sliding fit. Shaft (2), together with piston (1) is introduced into the central opening of bushing (9), having on its lower part a groove (10), into which wedge (5) engages. Bushing has two diametrically opposed cut-out grooves (13), while the valve body (19) carries a cover (15) with mutually rectangular molded grooves (18). A modified form of the invention includes telescoped external and internal envelopes to reduce the possibility of malfunction due to impurities in the liquid flowing through the valve.

1. Field of the Invention
The present invention relates to a one-way fluid flow, non-return valve and is classified, by International Patent Classification F 16 K 1/02.
2. Description of Related Art
The instant invention is specifically designed to provide a valve for use in sanitary water systems with the valve functioning to prevent the return of fluid back into the water system in case of pressure lost, even when the valve has been left in the open position.
Although various forms of valves of this type heretofore have been provided, one problem existing with previously known valves is that in the event the valve handles water having dirt or other impurities therein it is possible that dirt within the water passing through the valve may accumulate in internal areas of the valve and prevent proper non-return flow of water therethrough.
Previously known non-return flow valves are used not only in domestic water systems but also in other fluid systems and usually operate on the principle of a threaded shaft, whereby movement of a valve operation piston is effected by rotation of the threaded shaft or a shaft equipped with a helical groove. Each of these forms of valves usually does not protect the fluid system from return flow of fluid in the case of lost inlet pressure.
Fluid flow controlling valves may be used in many different fluid handling systems in which the valves, during operation of the systems, remain open. In many of these types of systems it is imperative to provide a one-way fluid flow non-return valve in order to prevent reverse flow of fluid in the event of pressure lost.
Further, in most fluid handling systems non-return flow valves are installed at the inlet for the system and are not readily adaptable for use at various discharge points of the fluid handling system.


The present disclosure discloses methods and systems for providing enhanced level of security for devices and/or applications on the devices. The method includes receiving a request from a user for setting a secure code as PIN with pattern option for accessing a device, for example. Then, a touch based keypad having a series of dots is displayed, each dot is associated with a pre-defined number. The secure code as input by the user is received, wherein the secure code is a combination of PIN and pattern. Then, the secure code is stored in the form of numbers along with pattern for the user. Thereafter, a request for accessing the device is received. The user is prompted to input a secure code. The secure code input by the user is matched with the stored secure code. Based on the matching, the user is allowed to access the device.

Business devices such as printers provide a secure print job feature to ensure print jobs are not accessible by unauthorized users. And, a traditional way of making a print job secure involves the user inputting a PIN (personal identification number) associated with the submitted print job. The PIN triggers/retrieves secure print jobs. The concern with PIN based security is that an unauthorized user tries and acquires the PIN, for example, by hit and trial or by heuristic methods to attain the secure print job illegitimately.
Other than PIN based security, pattern based security options are available in the market. The pattern locking is available in mobile devices. In pattern based security, the user traverses an onscreen 3×3 grid of contact points. However, there are a few limitations associated with this approach. The pattern based locking does not accept single stroke, i.e., any stroke follows a path. Further, a contact point can only be used once. Also, intermediate point between two points should also be a contact point. Moreover, there are a total nine points to choose from. As one contact point cannot be chosen twice, therefore, the maximum possible combination is 9*8*7*6*5=15,120.
Therefore, there is a need for efficient methods and systems for providing enhanced security.

Systems and methods for providing enhanced security by facilitating pin and pattern based secure codes


A computer system is protected against harmful activity of a privileged user. A risk agent is deployed which is communicatively coupled to a risk engine, the risk engine being operative in response to queries to perform model-based risk assessments of activities and to provide responses conveying risk assessment results. The risk agent monitors computer system activity of the privileged user to detect initiation of a sensitive operation, and formulates and sends a query to the risk engine requesting risk assessment. The risk agent takes an appropriate control action based on a risk assessment result in a response to a query. The control action may be one of allowing the sensitive operation to proceed; preventing the sensitive operation from proceeding; issuing a notification that the sensitive computer operation is proceeding; and obtaining further confirmation as a condition to allowing the sensitive operation to proceed. By this method, security of the computer system is enhanced, especially against inadvertent or intentional harmful activity of a privileged user.

The invention is related to the field of computer system security.
Existing computer systems typically employ a variety of security-related functions for protection against potentially harmful user activity. For example, user authentication is often employed which requires a user to provide a password or other credential which establishes the user's identity, protecting against the possibility of an intruder masquerading as an authorized user and engaging in harmful activity. Another type of function, referred to as access control, enforces limitations on the activities that authorized users can engage in. In one common example, access controls may be placed on certain storage devices or file system directories so that only certain users are permitted to access the data therein. Such access controls can serve to protect sensitive data from being accidentally deleted or used for an improper purpose by a user who has no legitimate need for access to the data. One dimension of access control may regard a type of user. Users can include typical or "non-privileged" users, who simply use a system, and administrative or privileged users who engage in more sensitive operations such as configuring a system or taking other system-wide action. Privileged users, who are normally selected in part based on perceived trustworthiness, are by definition granted greater access to system operational functions than is granted to non-privileged users.
A computer system may range in complexity from a single computerized device (e.g., a personal computer or standalone server computer) to a large network of numerous interconnected computerized devices. Security functions may be applied at the level of an individual computer or system-wide. In one pertinent example, a so-called storage area network or SAN is a specialized computer system having server-type host computers and large-capacity storage systems connected by a high-bandwidth data network. A SAN is typically managed using a SAN management application (executing on a management station, for example) and management agents executing on managed components within the SAN (e.g., hosts, storage systems, network switches, etc.). Management functions may include sensitive operations such as dismounting a disk drive, making it unavailable to applications executing on the host computer(s) of the SAN. Security functions may be used to ensure that a user is properly authenticated and has proper access privileges before the user is permitted to initiate such a sensitive operation.
A technique known as multi-factor authentication has been used for improved security in certain settings, notably for web-based services such an online banking. These techniques are directed to verifying the identity of a user, taking into account things like a network address of a computer being used by the user, a time of access, type and size of financial transaction, etc. Pertinent data is gathered and provided to a multi-factor authentication system that uses a rule-based approach to assessing whether a user is permitted access to a system based in part on the circumstances of the access.

Computer system with risk-based assessment and protection against harmful user activity


Disclosed approaches provide for interactions of secondary rays of light transport paths in a virtual environment to share lighting contributions when determining lighting conditions for a light transport path. Interactions may be shared based on similarities in characteristics (e.g., hit locations), which may define a region in which interactions may share lighting condition data. The region may correspond to a texel of a texture map and lighting contribution data for interactions may be accumulated to the texel spatially and/or temporally, then used to compute composite lighting contribution data that estimates radiance at an interaction. Approaches are also provided for reprojecting lighting contributions of interactions to pixels to share lighting contribution data from secondary bounces of light transport paths while avoiding potential over blurring.

Global illumination is used in image rendering applications to simulate lighting conditions in a virtual environment by taking into account not only light that comes directly from a light source (direct illumination), but also light that is reflected off of surfaces (indirect illumination). Path tracing is an approach to global illumination in which lighting contributions at different points along ray-traced light transport paths (usually having of an initial or primary ray and a number of reflected or secondary rays) may be combined to determine lighting conditions observed by a viewpoint camera.
Conventional approaches to path tracing require a large amount of secondary rays (e.g., rays other than initial or primary rays that may be cast from a primary ray) to sample lighting conditions for each pixel in order for the pixel to accurately reflect lighting conditions in the virtual environment. For example, in a light transport path, a ray may interact with a diffuse surface where the lighting contribution that is sampled only accounts for one direction (of many possible directions) in which light particles may scatter from the surface. Many secondary rays may be cast to sample other directions to more accurately estimate the lighting contribution of the interaction to the light transport path. Due to the potentially large number of samples, the computational resources required to render such a scene may impose too great of a delay for real-time rendering applications, such as gaming.

Global illumination using shared lighting contributions for interactions in path tracing


A method for designing a power distribution network of a circuit system includes the following steps: determining positions of a plurality of power source nodes; estimating a current distribution condition of the circuit system; and creating a first part of the power distribution network according to at least the positions of the power source nodes.

1. Field of the Invention
The present invention relates to circuit designs, and more particularly, to power distribution network designs of integrated circuit designs.
2. Description of the Prior Art
In an integrated circuit design, a power/ground (P/G) network which distributes power voltages and/or ground voltages from power source locations to each circuit block (e.g., macro or cell) of an integrated circuit system is essential. No matter the type of integrated circuit system (e.g., a chip, such as a wire-bond chip or a flip chip), each circuit block that provides at least a function has to be connected to a power source (e.g., VDD) and a ground source (e.g., VSS) to be functional.
For modern circuit designs, the architectures of the P/G networks face grave challenges. Due to the fast switching frequencies and increasing power consumption of the latest integrated circuit systems, large switching currents intermittently occur at the power and ground networks, thereby degrading the performance and reliability of the integrated circuit system. Moreover, the resistance of the power traces constituting the P/G network leads to a voltage drop (i.e., IR drop) over the power source nodes to the center of the P/G network. Sometimes the excessive voltage drop across the power network, or the ground bounce across the ground network, will reduce the switching speeds of the circuit system and shrink the noise margins of the integrated circuit system, which may lead to functional failures. In addition, the large current across the P/G network may cause the power traces in the metal wires to be worn out as a result of electronic migration (EM). The electronic migration diminishes the reliability of the integrated circuit systems; in a worst case, it may result in eventual losses of one or more connections of the P/G network, thereby leading to intermittent failure of the whole integrated circuit system.
It is therefore an objective in the field to design a robust power network and/or ground network that uses a smaller area of metal wires while still assuring reliability of the functionality of an integrated circuit system.

Method for designing power distribution network of circuit system and related circuit system


A hearing protector device (9) comprising a controller (11), a memory (14), and a receiver (12) is provided. The controller (11) is configured to be connected to the memory (14), the receiver (12) and an at least one user-notifying device (31) adapted to notify a hearing protector user. The hearing protector device (9) is configured to receive at least one data transmission signal from a data transmission device (20); storing at least one signal parameter; and comparing said data transmission signal to the at least one stored signal parameter. The at least one stored signal parameter is associated with at least one suitable notification; wherein the user-notifying device (31) is configured to, when the signal from the data transmission device (20) matches the signal parameter, present the at least one notification associated to the signal parameter to the hearing protector user. A data transmission device (20) comprising a processor (21) configured to be connected to an external signal receiver (22) and a data device transmitter (23) is also provided, wherein the data transmission device (20) is configured to receive at least one external signal from an external source (40) and transmit a data transmission signal configured to be received by at least one hearing protector device (9).

Hearing protectors are used largely in the industry to protect the worker from environmental noise. Typically, hearing protectors comprise two ear cups positioned over the wearer's ears. The hearing protectors may either be conventional hearing protectors or active noise cancelling hearing protectors. Active noise cancelling hearing protectors are sometimes provided with active elements, such that the passive sound-reducing function is combined with the function of actively reproducing sound inside the ear cup to allow the user to hear this reproduced sound. Such an active element typically includes an electronic unit comprising a speaker and/or one or a plurality of microphones. The active element may incorporate different functions. One type may, for instance, contain a radio receiver and the electronic circuitry required to reproduce sound received by the radio receiver through the speaker. Another type may be designed such that it is capable of reproducing ambient sound from the vicinity of the hearing protector in anti-phase. Still another type may be designed for communication, such as connection by Bluetooth and/or radio link and/or cable, either built into the device or connected to one or a plurality of external units.
The efficient available means for minimizing the exposure to sounds may however result in that the hearing protector user is unable to be aware of the surroundings both audibly and, when the user performs various task demanding full attention, visibly. Thus, various measurements have been taken in the art to provide means to notify a hearing protector user of important events.
US 2008/189820 A1 discloses a protection mask for welding comprising speakers configured to alert the user if a gas leak has been identified in the vicinity or inform the wearer regarding parameters concerning the welding equipment or operation.
EP 1674062 A1 discloses a hearing protector comprising an evaluation unit and a microphone. Specific sound patterns can be loaded into the hearing protector via a wired or wireless interface. When a sound corresponding to a registered sound pattern occurs the hearing protector user is alerted by a speaker in the hearing protector. The alert may comprise of synthetic speech, a predefined sound or a reproduction of the sound pattern in question.
US 2015/0190284 A1 discloses an ear plug with active noise cancellation means comprising a microphone and a unit storing two databases. The first database comprises sounds which should be let through to the ear plug user and the second database comprises sounds which should be eliminated by the active noise cancelling function. The ear plug user can record and allocate new sounds to the databases through buttons on the ear plug. The earplug further comprises a speaker for modifying, enhancing or generating a desired sound to the ear plug user.

Hearing protector and data transmission device


A hybrid interconnection structure is disclosed having application to the fine pitch interconnection of delicate semiconductor chips. The invention entails the use of a beam lead interconnect in which patterned conductor runs are provided on the upper surface of a silicon chip. The conductor runs extend beyond the chip to form a paired set of beam leads. One set of beam leads makes contact with terminals on the upper surface of one chip and the other set of beam leads makes contact with terminals on the upper surface of another chip. The interconnect chip is set on a substrate common to the interconnected chips with its top surface slightly (normally less than 1-2 mils) above the top surfaces of the interconnected chips. This limits any downward deformation of the beam leads in the bonding process to insure reliability of the bond for fine pitch application. The invention has specific application to arrays of infrared detectors in which interconnections are provided between a delicate light sensing chip of mercury cadmium telluride or indium antimonide and more rugged readout integrated circuits, usually of silicon.

1. Field of the Invention
The invention relates to hybrid electronic circuitry by which is meant electronic circuitry partitioned into plural integrated circuits formed on separate chips and requiring further chip-to-chip interconnections for completion of the circuitry. The invention has application to the case where large numbers of chip-to-chip interconnections are to be made with a fine pitch and with delicacy to avoid injury to chips constituted of fragile semiconductor materials. The invention has special application to the focal planes of solid state cameras in which interconnections are provided between a delicate Mercury Cadmium Telluride (MCT) chip bearing an array of photosensors and more rugged silicon integrated circuits providing readout.
2. Prior Art
Wire bonds are the conventional method of interconnecting integrated circuits. In MCT chips bearing an array of photosensors, sensitive to infrared, they suffer from several limitations. The first limitation is a bonding pitch limitation of 2.5 mils (currently) in single level bonding. This limitation restricts wire bonding to hybridization of square arrays, line arrays and small depth time delay integration (TDI) arrays. Wire bonds cannot achieve the fine pitches required in TDI arrays 6 to 8 pixels deep, for which there is substantial demand. This is true even in arrays using large pixels, i.e., 3 mils.times.5 mils. Assuming that half the runs, of a 6 deep TDI array, are brought out on each of two sides of the array, the bonding pitch interval is 5 mils/3-1.67 mils. This application thus requires a more complex alternative two level bonding technique. The pitch requirements of an 8 deep TDI array, which are also of practical interest, are well beyond the capabilities of current wire bonding.
A second limitation with wire bonding is the damaging stresses exerted on delicate chips. The damage produced on relatively delicate MCT IR sensing chips by wire bonding ranges from catastrophic mechanical damage to minor reductions in detector performance. The bonding may produce physical damage to the bond pads and metallization runs on the MCT chip surface. Cracking and chipping of the underlying MCT chip may also occur. Additionally, even when there is little or no physical damage apparent on the surface of the chip, the bonding forces may produce internal stresses and damage to the detector crystal that results in degraded infrared sensing performance. To avoid this damage the bond pads are usually placed as far from the active photosensors as practical.
The more rugged silicon material is not equally subject to this kind of damage, and wire bonding as practiced with chips of silicon material is accordingly not well suited to bonding the more delicate semiconductor materials such as MCT, GaAs, InSb, etc.
A known interconnection technique for a delicate material which avoids wire bonding is the beam lead technique. It provides both freedom from bonding damage and a finer interconnection pitch interval than wire bonds can provide.
In this known interconnection technique, the metal runs from each pixel on the top surface of an MCT chip are extended and increased in thickness to form metal beams. Next the MCT chip is thinned from the back side and the MCT material directly under the metal beams is removed to form cantilevered beam leads. The under surface of the MCT chip is then bonded to the silicon readout chip.
The thinning of the MCT chip in this known technique permits the fine beam leads to traverse the substantial distance from the upper surface of the MCT chip to the bonding pads on the silicon readout chip coplanar with the lower surface of the MCT chip. The thinning of the MCT chip reduces the total length required of the beam lead, and reduces the amount of deformation required of the beam lead to effect the bond at the lower plane, thereby increasing the reliability of the interconnection.
This known technique avoids damaging forces on the MCT chip, but requires thinning the MCT chip to a few mils and requires subsequent handling of a very fragile chip with a consequent reduction in yield. The present approach seeks to improve over this known beam lead approach.


A method and an apparatus that optimally compile a source code for a data transformation operation in response to a request from a run-time application are described. A current state of the run-time application is included in the request. The application executes a non-optimized library routine for the data transformation operation while a separate worker thread performs optimized code compilation on the source code for the data transformation operation based on the request at the same time. The request includes a current state of the run-time application. The non-optimized library routine has been pre-built during build time.

As the complexity of software applications increases, the significance of an optimized library serving commonly used operations called from an application has become more and more important. For example, users may demand a faster rendering speed to support high resolution or near life graphic effects when playing an interactive computer game. Usually, a static non-optimized code library is available for an application to link during link time. These static libraries are often built during build time. Most static libraries are not optimally compiled to consider run-time states from calling applications because such states are not available during build time. In some cases, there may be too many possible run-time states and hence it may be impractical to create optimally compiled library routines.
Although some library routines may be optimally compiled on request during run time, such optimizations are typically performed without regard to the number of times an optimized library routine will be called by an application. This is especially true for operations during application start up. However, optimized library routines for supporting application start up tasks may be called only once or twice in the entire application life cycle.
Therefore, computing resources spent for run-time code optimization may be wasted. Additionally, an application may take more time optimizing a run-time library code than directly executing a corresponding static version. As a result, users tend to experience glitches in overall system performance.

Method and apparatus for dynamic code optimization


A broadband phased frequency antenna array uses frequency steering with phase-shift stabilization. Phased frequency steering allows wider intermediate bandwidth than available from frequency steered arrays, with fewer phase shifters than required by phase steered arrays. For a given instantaneous bandwidth (such as for FM-chirp or frequency agility operations), the phased frequency steered array provides a straightforward trade-off between sidelobe level and the number of phase shifters. The antenna includes a linear array (10) of phase-shift/time-delay modules (FIG. 1b), each including (a) a phase-shift element (PSE) with a phase shifter (PS), and (b) a number of time-delay elements (TDE) coupled through respective time-delay feeds (TDF) to the phase shifter. In accordance with conventional antenna pattern weighting, the phase shifters are concentrated in the center of the array (10), with the number of time-delay elements in a phase-shift/time-delay module increasing for modules located toward the edge of the array, producing the desired phase shifter "thinning". The phase shifter of each phase-shift/time-delay module is cooperatively set relative to a scan frequency to provide an appropriate phase-shift offset that aligns the phase front segments (S.sub.0 -S.sub.13), achieving a continuous phase slope across the phase front (FIG. 1c).

Two common techniques for electronically steering a radio frequency antenna array are phase steering and frequency steering. Generally, phase steered arrays permit relatively large changes in instantaneous frequency without significantly affecting angular accuracy, but typically incorporate a phase shifter or active phase-shift module for each radiating element. In contrast, frequency steered antennas avoid the cost of the phase-shift components, but provide less instantaneous bandwidth at a given scan angle because changes in instantaneous frequency also affect angular accuracy.
For example, some radar applications require greater instantaneous bandwidth, such as to support frequency agile operation and/or FM-chirp pulse compression, than is available from an albeit less complex frequency steered antenna (given the typical sidelobe level requirements). For these applications, a phase steered antenna is the only practical solution to achieve the desired instantaneous bandwidth while maintaining angular accuracy.
The requirement of a phase shifter or active module for each radiating element is a significant cost factor for these antenna systems. By way of illustration, for a phase steered antenna that provides a two-dimensional scan in the X band (around 10 GHz with a wavelength of about 3 centimeters), the typical radiating-element spacing of one-half wavelength requires a radiating element about every 1.5 centimeters.
The conventional approach to reducing the cost of a phase steered antenna array is to thin the array, either by (a) removing phase shifters (sparsely sampling), or (b) by using frequency scan in one dimension. Sparsely sampling only allows removing 5 to 15 percent of the phase-shifters before sidelobe levels are raised significantly. In contrast, using frequency scan in one dimension reduces the number of phase-shifters to one per row or column, or two for monopulse systems (one for each half of the row or column) without significantly impacting sidelobe levels. However, angular accuracy in that dimension degrades due to incremental beam scanning caused by instantaneous changes in frequency, limiting the broadband capability of the antenna.
Accordingly, a need exists for an improved broadband electronically steered antenna array capable of instantaneous bandwidth performance comparable to phase steered antennas, but with significantly fewer phase-shifter components, and without (a) significantly raising sidelobe levels (such as would be caused by sparsely sampling), or (b) significantly degrading angular accuracy (such as would be caused by frequency scanning in one dimension).


An emergency method, system, and non-transitory computer readable medium include a detection device configured to detect an emergency situation and switch a first device to emergency mode, an emergency mode device configured to gather information regarding the emergency situation while the first device is in emergency mode, and an actuation and discovery device configured to discover a second device in a vicinity of the first device and actuate the second device to perform an action based on the emergency situation detected by the detection device.

The present invention relates generally to an emergency prediction, detection, reporting, and mitigation system, and more particularly, but not by way of limitation, to a system for instrumenting and coordinating multiple personal devices and appliances so that the devices are capable of predicting, detecting, reporting, monitoring, and mitigating emergency situations using device sensing, actuating, and location identification.
Personal devices can communicate with each other over networks such as local area networks, wide area networks, and the Internet. Mobile devices such as cell phones, including so-called smart phones, can communicate with each other wirelessly over a variety of wireless networks.
Conventional techniques of creating emergency connections focus only on smartphone devices. The conventional techniques do not make use of both smart and non-smart devices that do not have to be necessarily mobile devices. Also, the conventional techniques coordinate a single device. That is, the conventional techniques only consider safety of individuals carrying their mobile devices, while failing to provide detection of emergency situations and creation of an ad hoc network of smart and non-smart devices that would allow one to predict, detect, report and mitigate emergency situations.
Thus, there is a technical problem in the conventional techniques that the techniques are incapable of providing an emergency system that can create an ad hoc network between smart devices and non-smart devices so as to provide contextual and localized information that can be used to address the emergency situation.

System, method, and recording medium for emergency identification and management using smart devices and non-smart devices

INTERNATIONAL BUSINESS MACHINES CORPORATION


The present disclosure provides a high-speed random number generation method and device, comprising an entropy source module and an entropy sampling module. The entropy source module is an autonomous Boolean network formed by digital logic gates, the network is formed by an XNOR gate and (N−1) XOR gates, wherein the value of N is equal to 3n (n is a positive integer), and the entropy source can generate chaotic signals having wide and flat frequency spectrum. The entropy sampling module of the present disclosure is formed by D flip flops used for sampling and quantizing the chaotic signals to generate random number sequences. The random number sequences generated by the present disclosure can pass test standards (NIST and Diehard statistic tests) of random number industry and have excellent random statistic characteristics. The random number generation method and device of the present disclosure are completely formed by the digital logic gates, the circuit structure is simple and is easy to be integrated, and without the need of a post processing algorithm or circuit required by a conventional random number generation device, the power consumption can be greatly reduced. The present disclosure can be widely applied to the fields of information security such as secure communications, key distribution, data encryption and the like.

Random numbers have been significantly applied to the fields of scientific computation, digital communication, optical fiber sensing, radar ranging, identity authentication and the like. In the field of secure communications, with the rapid development of computer and network technologies, how to ensure information security becomes very important.
Currently, most of random number generation devices are to use a computer in combination with a certain deterministic mathematical algorithms (such as a linear congruence method and the like) to rapidly generate pseudo-random numbers, but the pseudo-random numbers have periodicity and can be predicted, so a pseudo-random number generator is hard to ensure the security of encrypted information.
Different from the pseudo-random numbers, physical random numbers do not have the periodicity, cannot be predicted and are really safe. Generally, the physical random numbers are generated by utilizing a natural physical random process (which calls a physical entropy source), such as circuit thermal noise, oscillator phase jitter, chaotic laser and the like.
A method for generating random numbers by utilizing the circuit thermal noise is to utilize excellent random statistic characteristics of the circuit thermal noise and to sample and quantize to generate random number sequences, but the amplitude of the thermal noise is relatively small and needs to be amplified by an amplifier, and the amplifier is not absolute linear amplification, so, randomness of an amplified noise signal will be worse. A method for generating random numbers by utilizing the oscillator phase jitter is to utilize instability of oscillator frequency and to sample and quantize a high-frequency oscillator by a low-frequency oscillator so as to generate the random number sequences, but the generated random number speed is very low; and a method for generating random numbers by utilizing the chaotic laser is to utilize noise-like and wide-frequency-spectrum characteristics of the chaotic laser, wherein the signal strength shows strong random fluctuation in the time domain and can be taken as the physical entropy source for high-speed generation of random numbers, but the device for generating the random numbers by utilizing the chaotic laser has a complex structure, comprises a plurality of optical elements and is not easy to be integrated. The above methods for generating the random numbers mostly need post processing to pass random number tests so as to cause limitations to generation and application of the random numbers.
Recently, a new physical random number generation method occurs by utilizing an autonomous Boolean network, which is a technology by utilizing non-ideal characteristics (such as deterioration effect, nonlinear time delay, short pulse suppression and the like) of logic gate devices in the autonomous Boolean network to generate a physical random process (such as phase nose or chaotic signals) and then to extract the random number sequences therefrom. Currently, a method and a device for generating the random numbers by utilizing the autonomous Boolean network mostly utilize 3-input XNOR gates and 3-input XOR gates to form the autonomous Boolean network, and in order to improve the quality of generated random numbers, a poste processing circuit is added to the structure of the method and the device. However, such solution increases circuit complexity of the random number generation device and also improves power consumption thereof.
Therefore, it is of great practical significance to provide a high-speed random number generation method and technology which have simple structure and low power consumption and are easy to be integrated, and its generated random numbers can pass through test standards of the random number industry.

High-speed random number generation method and device


In some embodiments, same layer microelectronic circuit patterning using hybrid laser projection patterning (LPP) and semi-additive patterning (SAP) is presented. In this regard, a method is introduced including patterning a first density region of a laminated substrate surface using LPP, patterning a second density region of the laminated substrate surface using SAP, and plating the first and second density regions of the laminated substrate surface, wherein features spanning the first and second density regions are directly coupled. Other embodiments are also disclosed and claimed.

Reductions in the size and pitch of integrated circuit devices require advancements in the manufacture of IC package substrates. The use of lasers is becoming more common for patterning substrates. Disadvantageously, the use of laser projection patterning to pattern a substrate layer tends to cost much more than semi-additive patterning.

Same layer microelectronic circuit patterning using hybrid laser projection patterning (LPP) and semi-additive patterning(SAP)


An apparatus for determining and/or monitoring at least one flow parameter of a medium, wherein the medium flows through at least one measuring tube essentially along an imaginary flow axis, wherein at least one exciter transducer element is provided, which, based on an exciter signal, excites the measuring tube to mechanical oscillations, and wherein at least one receiver transducer element is provided, which receives mechanical oscillations of the measuring tube as a received signal. The invention includes that at least one separating unit is provided, and that the separating unit is embodied and arranged in the measuring tube in such a manner, that at least two sub measuring tubes result in the measuring tube, wherein the medium flows through the at least two sub measuring tubes essentially along the imaginary flow axis.

The flow parameter is, for example, the volume flow or mass flow of the medium. The medium is, for example, a liquid, a gas, generally a fluid, or a bulk good. Furthermore, the medium is, for example, a mixture of liquid, gas or bulk good.
In the state of the art, it is known to determine flow parameters, e.g. the flow rate of a medium through a measuring tube, by taking advantage of the Coriolis effect. For this, the measuring tube is excited to mechanical oscillations. At a point different from the excitation location, the oscillations of the measuring tube are recorded. From the phase difference between the excitation signal and the received signal or the travel time associated therewith, the flow parameter can then be ascertained.
In the state of the art, different designs are known for the measuring tube, through which the medium flows. Thus, there are both curved tubes, as well as straight tubes. Furthermore, there can be a single measuring tube or, for example, two, or more measuring tubes.
Especially in the case of application of a plurality of tubes, there results the problem of pressure drop when the medium transitions from a pipe with a greater diameter into the region of two tubes of a smaller diameter. Two tubes, in contrast, have the advantage in comparison with single tubes that they are symmetrical, and, thus, can be more easily balanced, which increases the accuracy of measurement.

Vibration type flow monitoring apparatus including a separating unit arranged in the measuring pipe


An antiparallel (AP)-pinned magnetoresistive tunnel junction (MTJ) sensor is provided with a single antiferromagnetic (AFM) layer sandwiched between an AP-pinned layer and a bias layer for pinning the magnetization directions of the AP-pinned layer and the bias layer. The bias layer may be a simple ferromagnetic bias layer or, alternatively, may be an AP-pinned bias layer including first and second ferromagnetic bias layers with an antiferromagnetic coupling layer sandwiched between. The bias layer provides a demagnetization field HdmB at the free layer having the same direction as the demagnetization field HdmP from the AP-pinned layer. The sum of HdmP and HdmB counterbalance a ferromagnetic coupling field HFC from the AP-pinned layer to obtain zero or near zero asymmetry of the bias point on the transfer curve of the MTJ sensor.

1. Field of the Invention
This invention relates in general to magnetic tunnel junction transducers for reading information signals from a magnetic medium and, in particular, to a magnetic tunnel junction magnetoresistive sensor with an improved bias layer structure.
2. Description of the Related Art
Computers often include auxiliary memory storage devices having media on which data can be written and from which data can be read for later use. A direct access storage device (disk drive) incorporating rotating magnetic disks is commonly used for storing data in magnetic form on the disk surfaces. Data is recorded on concentric, radially spaced tracks on the disk surfaces. Magnetic heads including read sensors are then used to read data from the tracks on the disk surfaces.
In high capacity disk drives, magnetoresistive (MR) read sensors, commonly referred to as MR sensors, are the prevailing read sensors because of their capability to read data from a surface of a disk at greater track and linear densities than thin film inductive heads. An MR sensor detects a magnetic field through the change in the resistance of its MR sensing layer (also referred to as an xe2x80x9cMR elementxe2x80x9d) as a function of the strength and direction of the magnetic flux being sensed by the MR layer.
The conventional MR sensor operates on the basis of the anisotropic magnetoresistive (AMR) effect in which an MR element resistance varies as the square of the cosine of the angle between the magnetization in the MR element and the direction of sense current flowing through the MR element. Recorded data can be read from a magnetic medium because the external magnetic field from the recorded magnetic medium (the signal field) causes a change in the direction of magnetization in the MR element, which in turn causes a change in resistance in the MR element and a corresponding change in the sensed current or voltage.
Another type of MR sensor is the giant magnetoresistance (GMR) sensor manifesting the GMR effect. In GMR sensors, the resistance of the MR sensing layer varies as a function of the spin-dependent transmission of the conduction electrons between magnetic layers separated by a non-magnetic layer (spacer) and the accompanying spin-dependent scattering which takes place at the interface of the magnetic and non-magnetic layers and within the magnetic layers.
GMR sensors using only two layers of ferromagnetic material (e.g., Nixe2x80x94Fe) separated by a layer of non-magnetic material (e.g., copper) are generally referred to as spin valve (SV) sensors manifesting the SV effect. FIG. 1 shows a prior art SV sensor 100 comprising end regions 104 and 106 separated by a central region 102. A first ferromagnetic layer, referred to as a pinned layer 120, has its magnetization typically fixed (pinned) by exchange coupling with an antiferromagnetic (AFM) layer 125. The magnetization of a second ferromagnetic layer, referred to as a free layer 110, is not fixed and is free to rotate in response to the magnetic field from the recorded magnetic medium (the signal field). The free layer 110 is separated from the pinned layer 120 by a non-magnetic, electrically conducting spacer layer 115. Leads 140 and 145 formed in the end regions 104 and 106, respectively, provide electrical connections for sensing the resistance of SV sensor 100. IBM""s U.S. Pat. No. 5,206,590 granted to Dieny et al., incorporated herein by reference, discloses a SV sensor operating on the basis of the GMR effect.
Another type of SV sensor is an antiparallel (AP)-pinned SV sensor. In AP-pinned SV sensors, the pinned layer is a laminated structure of two ferromagnetic layers separated by a non-magnetic coupling layer such that the magnetizations of the two ferromagnetic layers are strongly coupled together antiferromagnetically in an antiparallel orientation. The AP-pinned SV sensor provides improved exchange coupling of the antiferromagnetic (AFM) layer to the laminated pinned layer structure than is achieved with the pinned layer structure of the SV sensor of FIG. 1. This improved exchange coupling increases the stability of the AP-pinned SV sensor at high temperatures which allows the use of corrosion resistant and electrically insulating antiferromagnetic materials such as NiO for the AFM layer.
Another type-of magnetic device currently under development is a magnetic tunnel junction (MTJ) device. The MTJ device has potential applications as a memory cell and as a magnetic field sensor. The MTJ device comprises two ferromagnetic layers separated by a thin, electrically insulating, tunnel barrier layer. The tunnel barrier layer is sufficiently thin that quantum-mechanical tunneling of charge carriers occurs between the ferromagnetic layers. The tunneling process is electron spin dependent, which means that the tunneling current across the junction depends on the spin-dependent electronic properties of the ferromagnetic materials and is a function of the relative orientation of the magnetic moments, or magnetization directions, of the two ferromagnetic layers. In the MTJ sensor, one ferromagnetic layer has its magnetization fixed, or pinned, and the other ferromagnetic layer has its magnetization free to rotate in response to an external magnetic field from the recording medium (the signal field). When an electric potential is applied between the two ferromagnetic layers, the sensor resistance is a function of the tunneling current across the insulating layer between the ferromagnetic layers. Since the tunneling current that flows perpendicularly through the tunnel barrier layer depends on the relative magnetization directions of the two ferromagnetic layers, recorded data can be read from a magnetic medium because the signal field causes a change of direction of magnetization of the free layer, which in turn causes a change in resistance of the MTJ sensor and a corresponding change in the sensed current or voltage. IBM""s U.S. Pat. No. 5,650,958 granted to Gallagher et al., incorporated in its entirety herein by reference, discloses an MTJ sensor operating on the basis of the magnetic tunnel junction effect.
FIG. 2 shows a prior art MTJ sensor 200 comprising a first electrode 204, a second electrode 202, and a tunnel barrier 215. The first electrode 204 comprises a pinned layer (pinned ferromagnetic layer) 220, an antiferromagnetic (AFM) layer 230, and a seed layer 240. The magnetization of the pinned layer 220 is fixed through exchange coupling with the AFM layer 230. The second electrode 202 comprises a free layer (free ferromagnetic layer) 210 and a cap layer 205. The free layer 210 is separated from the pinned layer 220 by a non-magnetic, electrically insulating tunnel barrier layer 215. In the absence of an external magnetic field, the free layer 210 has its magnetization oriented in the direction shown by arrow 212, that is, generally perpendicular to the magnetization direction of the pinned layer 220 shown by arrow 222 (tail of the arrow that is pointing into the plane of the paper). A first lead 260 and a second lead 265 formed in contact with first electrode 204 and second electrode 202, respectively, provide electrical connections for the flow of sensing current Is from a current source 270 to the MTJ sensor 200. A signal detector 280, typically including a recording channel such as a partial-response maximum-likelihood (PRML) channel, connected to the first and second leads 260 and 265 senses the change in resistance due to changes induced in the free layer 210 by the external magnetic field.
As mentioned earlier, an MR sensor exhibits a change in resistance when in the presence of a changing magnetic field. This resistance change is transformed into a voltage signal by passing a constant sense current through the MR element. The value of the DC voltage for a given MR sensor is the product of the constant sense current and the total resistance between the MR sensor leads. Since the change in the resistance is the principal upon which the MR sensor operates, the change in resistance can substantially effect the performance of the MR sensor and the disk drive incorporating the MR sensor.
The transfer curve (readback signal of the MTJ head versus applied signal from the magnetic disk) for an MTJ sensor is linear and is defined by sin xcex8 where xcex8 is the angle between the directions of the magnetizations of the free and pinned layers. FIG. 3a is an exemplary transfer curve for an MTJ sensor having a bias point (operating point) 300 at the midpoint of the transfer curve, at which point the positive and negative readback signals V1 and V2 (positive and negative changes in the GMR of the MTJ sensor above and below the bias point) are equal (symmetrical) when sensing positive and negative fields having the same magnitude from the magnetic disk. FIGS. 3b and 3c illustrate transfer curves having bias points 302 and 304 shifted in the positive and negative directions, respectively, so that the readback signals V1 and V2 are asymmetrical with respect to the bias point.
The desirable symmetric bias transfer curve of FIG. 3a is obtained when the MTJ sensor is in its quiescent state (no magnetic signal from the disk) and the direction of the magnetization of the free layer is perpendicular to the magnetization of the pinned layer which is fixed substantially perpendicular to the disk surface. The bias point may be shifted from the midpoint of the transfer curve by various influences on the free layer which in the quiescent state can act to rotate its magnetization relative to the magnetization of the pinned layer.
The bias point is influenced by two major forces on the free layer, namely a ferromagnetic coupling field HFC between the pinned layer and the free layer, and a demagnetization field Hdemag on the free layer from the pinned layer. In a conventional spin valve sensor these coupling fields may be partially offset by the self-field provided by the sense current passing parallel to the layers of the sensor. In an MTJ sensor the current passes perpendicular to the sensor and cannot be used to provide such a field. IBM""s U.S. Pat. No. 6,023,395 to Dill et al., incorporated herein by reference, discloses an MTJ sensor with in-stack biasing to stabilize the sensor and to provide bias point symmetry to linearize the output of the sensor.
As data storage density in disk drives increases, the need for thinner read sensors makes the use of AP-pinned MTJ sensors desirable since the AP-pinned structure promotes a stronger exchange interaction with the AFM layer allowing thinner AFM layers to be used. Therefore there is a need for an AP-pinned MTJ sensor with an improved transverse biasing structure to provide bias point symmetry with improved manufacturability.
Accordingly, it is an object of the present invention to disclose a antiparallel (AP)-pinned magnetic tunnel junction (MTJ) sensor having a free (sensing) layer, an AP-pinned layer, an electrically non-conductive tunnel barrier layer sandwiched between the free layer and the AP-pinned layer, a bias layer, and an antiferromagnetic (AFM) layer disposed between the AP-pinned layer and the bias layer.
It is another object of the present invention to disclose an AP-pinned MTJ sensor having a single AFM layer to pin the magnetizations of a pinned layer and of a bias layer for providing a transverse bias field at a free layer.
It is a further object of the present invention to disclose an AP-pinned MTJ sensor having an AP-pinned bias layer wherein a single AFM layer pins the magnetizations of the pinned layer and the bias layer.
It is yet a further object of the present invention to disclose an AP-pinned MTJ sensor having a bias layer to provide a transverse magnetic field at the free layer for obtaining zero or nearly zero signal asymmetry.
In accordance with the principles of the present invention, there is disclosed a preferred embodiment of the present invention wherein an AP-pinned MTJ sensor has a thin AFM layer and an AP-pinned layer with first and second ferromagnetic layers of different thickness coupled by an antiparallel coupling (APC) layer. The first ferromagnetic (FM1) layer is adjacent to the AFM layer and the thicker second ferromagnetic (FM2) layer is adjacent to an electrically insulating (non-conductive) tunnel barrier layer. A ferromagnetic free layer is adjacent to the spacer layer. An AP-pinned bias layer with first and second ferromagnetic bias layers of different thickness coupled by an APC layer is located on the side of the AFM layer opposite to the side adjacent to the AP-pinned layer. The second bias (B2) layer adjacent to the AFM layer is not as thick as the first bias (B1) layer.
Because the FM2 layer of the AP-pinned layer and the B1 layer of the AP-pinned bias layer are thicker than the FM1 and the B2 layers, respectively, the net magnetization of the AP-pinned layer is in the same direction as the net magnetization of the AP-pinned bias layer. A net demagnetization field HdmP from the AP-pinned layer acts on the free layer in the same direction as a net demagnetization field HdmB from the AP-pinned bias layer. The combined demagnetization fields HdmP+HdmB are directed opposite to and oppose a ferromagnetic coupling field HFC from the FM2 layer of the AP-pinned layer acting on the free layer. The relative thicknesses of the FM1 and FM2 layers and the B1 an B2 layers, respectively, are chosen so that the sum of the demagnetization fields HdmP+HdmB counterbalance the ferromagnetic coupling field HFC to obtain zero or near zero asymmetry of the bias point on the transfer curve of the MTJ sensor.
Having a single AFM layer pinning the magnetization directions of both the AP-pinned layer and the bias layer provides a further advantage in improving the manufacturability of the MTJ sensor by only requiring setting the magnetization of a single AFM material during the fabrication process.
The above as well as additional objects, features, and advantages of the present invention will become apparent in the following detailed description.

Bias structure for magnetic tunnel junction magnetoresistive sensor

Hitachi Global Storage Technologies Netherlands B.V.


A micro-electro-mechanical (MEMS) structure and a method for forming the same are disclosed. The MEMS structure includes a sacrificial layer, a lower dielectric film, an upper dielectric film, a plurality of through holes and a protective film. The sacrificial layer comprises an opening. The lower dielectric film is on the sacrificial layer. The upper dielectric film is on the lower dielectric film. The plurality of through holes passes through the lower dielectric film and the upper dielectric film. The protective film covers side walls of the upper dielectric film and the lower dielectric film and a film interface between the lower dielectric film and the upper dielectric film.

Technical Field
The disclosure relates to a micro-electro-mechanical system structure and a method for forming the same, and more particularly to a microphone and a method for forming the same.
Description of the Related Art
A micro-electro-mechanical system (MEMS) is a micro-electro-mechanical device fabricated in a microminiaturized package structure, and the fabricating technique thereof is quite similar to the technique of fabricating integrated circuits (ICs). However, interactions, for example, about mechanics, optics, or magnetic force between the MEMS device and surrounding environment are more than that of the conventional IC. The MEMS device may include micro-sized electromechanical components, such as motors, pumps, valves, switches, capacitors, accelerometers, sensors, capacitive sensors, pixels, microphones, or actuators, etc. The electromechanical components, which are designed based on capacitance principles, usually work out by the coaction between the mechanical structure and the semiconductor device (e.g. IC), thereby resulting in the displacement of the structure to achieve the anticipated effect.

Micro-electro-mechanical system structure and method for forming the same


Semiconductor packages are provided. The semiconductor package includes a first chip having a first inclined sidewall in an edge of the first chip; and a second chip having a second inclined sidewall in an edge of the second chip and the second chip being horizontally adjacent to the first chip such that the first and second inclined sidewalls are in substantial contact with each other.

1. Technical Field
Embodiments of the present disclosure relate to semiconductor packages, electronic systems employing the same and methods of manufacturing the same.
2. Related Art
Semiconductor devices, which are utilized as important devices in electronic systems, may include active elements and passive elements constituting semiconductor integrated circuits. These active and passive elements may be integrated in semiconductor substrates (e.g., semiconductor wafers), and each of the semiconductor substrates including the active and passive elements may be sliced into a plurality of semiconductor chips (or semiconductor dice). Each of the semiconductor chips may be referred to as the semiconductor device. The semiconductor devices including the integrated circuits may be mounted on a package substrate or a silicon interposer and encapsulated using an assembly process, thereby forming semiconductor packages. The semiconductor packages may be mounted on a printed circuit board (PCB) having circuit interconnections. The PCB may be widely used in electronic systems such as computers, mobile systems and/or data storage media.
With the development in smaller, lighter and higher performance electronic systems (or electronic products), demand for techniques on more densely packaging semiconductor devices has increased. That is, techniques for increasing the number of the semiconductor chips mounted in a limited area have been continuously developed to provide smaller and higher performing semiconductor packages. For example, volatile memory chips such as dynamic random access memory (DRAM) devices and/or nonvolatile memory chips such as NAND-type flash memory devices may be vertically stacked to provide a large capacity semiconductor memory package. Accordingly, efforts have been concentrated on multi-chip stacked packages or system-in-packages.

Semiconductor packages having the first and second chip inclined sidewalls contact with each other


Arterial system navigation methods and devices and systems to perform the same. In an exemplary embodiment of a method of the present disclosure, the method comprises the steps of inserting at least part of an impedance device into an artery of a patient, the artery selected from the group consisting of a femoral artery and a radial artery, obtaining at least one conductance measurement while navigating a distal end of the impedance device through an arterial vasculature of the patient until the distal end is at or near a left ventricle, and performing at least one medical procedure at a location within the arterial vasculature.

Coronary interventional procedures are being performed more common than ever, with over two million coronary diagnostic procedures performed each year. Due to narrowing of arteries from vascular disease, narrow wires are frequently inserted into a peripheral arterial vessel, such as the femoral artery, the radial artery, etc. with the tip of the wire ultimately delivered to the left ventricle of the heart. This is currently performed under x-ray, and because the procedure can take several minutes to ultimately deliver the tip of the wire, there is an x-ray exposure risk to the patient and a significant x-ray exposure risk to the interventionalist/physician, who may perform many of these procedures in a cath lab each day over a period of several years, if not decades.
After delivery of a wire, for example, so that the tip is located at the ostia of two major coronary arties, a catheter can be advanced over the wire so to deliver a contrast agent and to obtain images to identify the contrast.
In view of the same, methods of delivering devices (wires or catheters) through a patient's arterial system, so as to significantly reduce the risk of x-ray exposure and to eliminate the need for contrast injection, unless desired to obtain vascular images, for example, would be well appreciated in the marketplace.


An illumination system includes an LED module and an illuminated area. The LED module includes an LED, and a lens mounted in light path of the LED. The lens includes a light source recess, a first light emitting surface, a critical reflecting surface, and a second light emitting surface intersecting with the first light emitting surface and being on same side with the first light emitting surface. The first light emitting surface can receive more light quantity than the second light emitting surface. Although the light emitted from the first light emitting surface may have greater attenuation than the light emitted from the second light emitting surface, light emitted from the first light emitting surface can make up the intensity losses of attenuation as the first light emitting surface receives more light quantity than the second light emitting surface. As a result, the illumination system has a uniform illumination pattern.

1. Technical Field
The disclosure relates to electrical lighting devices, and more particularly to an illumination system providing an uniform illumination pattern, lens and LED module used in the illumination system.
2. Description of the Related Art
For years, people have used traditional incandescent or fluorescence lighting apparatus in order to address their interior lighting concerns. However, such lighting apparatus presents a number of drawbacks. For example, the popular halogen apparatus presents the following drawbacks, such as relatively high power consumption, inefficiency of light dispersion due to the placement of its metal shield in the line sight of the halogen bulb, and its limited effectiveness in preventing glare from the halogen bulb.
Recently, a number of LED lighting apparatuses have been designed to replace the halogen apparatus, as well as other traditional incandescent or fluorescence lighting apparatuses. But, due to mediocre light output, LED used in the past was primarily limited to applications where only small surface areas were illuminated. In these applications the light was concentrated into a narrow beam using an optic designed to take the wide angle light output of an LED and collimate it using a lens, discussed below with respect to FIG. 11. FIG. 11 shows a traditional light illumination system. The light illumination system includes an illuminated area 1, and a LED light module 2 positioned beside the illuminated area 1. The LED light module 2 has a light emitting surface 3 and light 4 emitted forward of the light emitting surface 3 illuminate the illuminated area 1. Understandably, regardless of where the LED light module 2 is disposed with relationship of the illuminated area 1, part of the light 4 illuminate the illuminated area 1 which is closer to the LED light module 2 and the other illuminate the illuminated area 1 which is farther to the LED light module 2. Since the performance of the above illumination is inevitable, part of the light 4, which illuminate the illuminate area 1 and is farther to the LED light module 2, has more attenuation than the other which illuminate the illuminate area 1 and is closer to the LED light module 2. However, the light 4 emitted from the light emitting surface 3 has same initial light intensity. As a result, the illumination value of the illuminated area 2 varies with the distance between the illumination area 1 and the LED light module 2. Examples of some applications of the light illumination system include exhibition hall, showcase, and so on. These new applications require different optical designs. In particular these applications require uniform illumination in the illumination area 2 for improving the sense of quality of the showed products to people.

Lens, LED module and illumination system having same

Ningbo Hi-Tech Park Self Electronics Co., Ltd.


A rotational device is provided that enables a user to tangibly experience movement of a three-dimensional object in a four dimensional space. The rotational device includes an inner cubic frame assembly rotatably supported within an outer frame. The outer frame is formed from a series of wires connected at hubs to enable the user to view the movement of the inner cubic frame. A rotation mechanism may be provided to allow a user to rotate the inner cubic frame within the outer frame. A fixed internal cubic frame is mounted within the outer frame to support the inner cubic frame assembly. The inner cubic frame assembly includes an inner cubic frame and a sphere supported within the inner cubic frame. Reference points or nodes are provided on the inner cubic frame to provided visually traceable reference points as the inner cubic frame rotates within the outer frame and fixed internal cubic frame.

It is important when teaching or demonstrating new material that the student or subject fully grasp and understand the details of the topic being demonstrated or taught. For example, while most people can understand the concept of three dimensions, the concept of four dimensions is often difficult to grasp. Three-dimensional objects are present everywhere in people's daily lives and the concepts pertaining to three dimensions are easily displayed and understood by the average person. However, when a fourth dimension is introduced, in the form of the relationship of two three-dimensional objects, and the varying shapes of the space(s) between them over time, people often have a difficult time understanding or visualizing the concept of this additional dimension as it relates to three-dimensional objects and how they interact in pairs.
The tesseract is known, and consists in a four-dimensional analogue of the cube that attempts to depict the movement and change of the spaces between two three-dimensional objects over time. The concept of a cubic tesseract sphere is also known and is illustrated in books and in videos. Computer animations of the movements associated with cubic tesseract sphere are also available and attempt to provide visual depictions of the movement of a three-dimensional object in a four dimensional space. These depictions show how one three-dimensional object is positioned over time relative to another three-dimensional object or reference frame.
However, these attempts to convey the concepts of one three-dimensional object moving relative to another three-dimensional object and, more particularly the movement of the shapes occupied in the spaces between them, are still only displayed in two dimensions on a page or on a screen.
Accordingly, there is an established need for a practical device to physically and tangibly demonstrate the motion of three-dimensional objects relative to each other over time including the variations in the shapes and orientations of spaces defined between each of the three-dimensional objects.


A detachable coupling on a rotary drive is provided with first and second coupling surfaces (14, 17) arranged opposite each other. The coupling parts can be assembled without observing a preferential position. The first coupling surface (14) has a plurality of needles (15), which are arranged in a matrix-like pattern and point away from the coupling surface (14). The second coupling surface (17) has a fabric layer (18) designed to receive the needles (15).

A coupling, which is located between the drive motor and the impeller of a radial compressor, has been known from DE-AS 1 055 744. The coupling is designed as a jaw clutch that is plugged in axially and engages the drive shaft of the drive motor. To remove the coupling, the jaw clutch is pulled out of the counterpiece. The prior-art coupling is suitable for devices that must be removed for maintenance or cleaning purposes only occasionally. The drawback of the prior-art coupling is that a preferential position is to be observed to a certain extent for the mounting in order to make it possible for the teeth of the jaw clutch to engage the drive shaft. In addition, an angular offset between the jaw clutch and the drive shaft can be compensated to a very limited extent only.


Method of completing an uncased section (10) of a borehole (1) in an underground formation (2) comprising the steps of:. (a) placing at a predetermined position in the borehole (1) a slotted liner (11) provided with overlapping longitudinal slots (12); PA1 (b) fixing the upper end of the slotted liner (11); and PA1 (c) moving upwardly through the slotted liner (11) an upwardly tapering expansion mandrel (15) having a largest diameter which is larger than the inner diameter of the slotted liner (11).

An example of a borehole for which the present invention would be useful is a borehole drilled to produce hydrocarbons from a hydrocarbon-containing formation. To prevent collapse of the wall of the borehole, the borehole is cased by means of a casing arranged in the borehole. The casing is fixed in the borehole by a cement layer between the outer wall of the casing and the inner wall of the borehole.
The borehole is not cased where it traverses the hydrocarbon-containing formation to allow substantially unrestricted influx of fluids from the hydrocarbon-containing formation into the borehole. When the hydrocarbon-containing formation is so weak that it will collapse, the uncased borehole section is completed with a liner. The liner is provided with slots to allow fluid influx into the borehole.
A known method of completing an uncased section of a borehole in an underground formation comprises the steps of placing a slotted liner in the borehole at the location of the hydrocarbon-containing formation and fixing the liner. Fixing the liner is usually accomplished by securing the upper end of the liner to the lower end of the casing arranged in the borehole.
Because the inner diameter of the cased section is less than the diameter of the borehole, and the slotted liner has to be lowered through the cased section of the borehole, the diameter of the slotted liner is smaller than the diameter of the borehole. Thus there is an annular space between the liner and the wall of the borehole. With time the formation will collapse and settle against the outer wall of the liner so that the annular space gets filled with particulates. When hydrocarbons are produced, the fluid will flow through the formation, through the filled annular space and through the slots in the liner into the cased borehole. The circumference through which fluids flow into the cased borehole is thus reduced from the circumference of the borehole to the circumference of the outer wall of the liner.
Reference is made to U.S. patent specification No. 1,135,809 disclosing completing an uncased section of a borehole with a slotted liner having overlapping slots. This publication, however, does not disclose expanding the slotted liner.
It is therefore an object of the present invention to provide a method of completing an uncased section of a borehole, wherein optimal use is made of the circumference of the borehole to reduce resistance to fluid flow as much as possible.

Method of completing an uncased section of a borehole


Embodiments of the present invention provide a method, system and computer program product for heuristically generated suggestions in static code analysis. In an embodiment of the invention, a method for heuristically suggesting an asset transition in a code analysis tool can include receiving from an end user a request to select an asset of a computer program subject to static code analysis by a code analysis tool and selecting in response and contemporaneously to the request, an asset from amongst many assets during static code analysis of a computer program in a code analysis tool. The method further can include determining a set of assets amongst the many assets historically selected by other users of the code analysis tool during static code analysis subsequent to a selection of the contemporaneously selected asset. Finally, the method can include displaying to the end user a suggestion of a next asset for selection that had been frequently selected by the other users of the code analysis tool during static code analysis of the assets of the computer program subsequent to a selection of the contemporaneously selected asset.

1. Field of the Invention
The present invention relates to code archeology and more particularly to searching artifacts in using static code analysis.
2. Description of the Related Art
Code archeology refers to the process of uncovering the behavior of existing source code of a computer program for either modification, re-write or retirement. Static code analysis, as opposed to dynamic code analysis, both tools of code archeology, refers to the analysis of a computer program performed without executing the computer program. In most cases static code analysis is performed on a version of the source code and in other cases, some form of the object code compiled from the source code. The skilled artisan will recognize a distinction between static code analysis and code review or program comprehension to the extent that the former is an automated process performed by a tool, while the latter is a manual process performed by a human being. The sophistication of static code analysis performed by a tool varies from those that only consider the behavior of individual statements and declarations of source code, to those that include the complete source code of a computer program in the analysis. Resultant use of the information obtained from the analysis vary from highlighting possible coding errors in a computer program to formal methods that mathematically prove properties about a given computer program.
For most, static code analysis is a methodology of detecting errors in program code based on the programmer review source code marked by an analyzer of the tool in those places of source code where potential errors may occur. In other words the static analysis tool detects in the program text the places containing or likely to contain errors, subject to errors or possessing bad formatting. Such code sections are to be considered by the programmer for the programmer to decide whether or not to modify the subject code section. Static analyzers can be both of general purpose and specialized for searching certain error classes. Though complicated in nature, static code analyzers allow developers to detect a substantial number of errors at the earliest possible stage of program code development. In this regard, the earlier an error can be determined, the lower is the cost of its correction.
Static code analysis applied to a computer program of only a handful of source code files and corresponding resources, collectively referred to as "assets", can be complicated for the uninitiated. Managing static code analysis for a computer program of hundreds of assets distributed across multiple different servers can be near impossible without significant experience. Thus, the use of static code analysis to achieve the enormous benefit resulting therefrom can be elusive for many developers lacking the requisite experience in static code analysis.

Search suggestions for static code analysis

International Business Machines Corporation


Systems and methods of securing wireless communications between a network and a subscriber station are disclosed. One embodiment creates authentication triplets due to expire after a certain amount of time such that they may not be used indefinitely by an attacker who intercepts them.

1. Field
The present disclosure relates generally to wireless telecommunications and, more specifically, to a method of securing wireless telecommunications systems.
2. Background
One cellular technology for wireless communications is defined by the Global System for Mobile (GSM) protocol. GSM has been further extended by new services, such as General Packet Radio Service (GPRS), which offers Internet content and packet-based data services for GSM networks. GSM is used for many types of wireless communications including voice, Internet browsing, e-mail and multimedia data. GSM incorporates various security mechanisms to protect the content communicated over such systems. Service providers and users alike rely on these security mechanisms for the privacy of their communications and protection of their data. The security mechanisms typically operate by authenticating users to the network, then user encrypting data before transmission over the air. Such security measures are subject to attack by third parties. There is a need therefore, for a method and apparatus for secure wireless communications.

Method and application for authentication of a wireless communication using an expiration marker


A III nitride epitaxial substrate which makes it possible to obtain a deep ultraviolet light emitting device with improved light output power is provided. A III nitride epitaxial substrate includes a substrate, an AlN buffer layer, a first superlattice laminate, a second superlattice laminate and a III nitride laminate in this order. The III nitride laminate includes an active layer including an AlαGa1-αN (0.03≦α) layer. The first superlattice laminate includes AlaGa1-aN layers and AlbGa1-bN (0.9<b≦1) layers which are alternately stacked, where α(alpha)<a and a<b. The second superlattice laminate includes repeated layer sets each having an AlxGa1-xN layer, an AlyGa1-yN layer, and an AlzGa1-zN (0.9<z≦1) layer, where α(alpha)<x and x<y<z.

In recent years, III nitride semiconductors generally made of compounds in which N is combined with Al, Ga, In, and the like are widely used for light emitting devices, elements for electronic devices, and the like. The characteristics of such devices greatly depend on the crystallinity of III nitride semiconductors; therefore, techniques for growing highly crystalline III nitride semiconductors are demanded.
A III nitride semiconductor is formed by performing epitaxial growth on a substrate made of sapphire, SiC, Si, GaAs, or the like. However, the lattice constant and the coefficient of thermal expansion are significantly different between the III nitride semiconductor and such a substrate. Accordingly, there has been a problem in that, if the III nitride semiconductor is grown on the substrate, the grown-up III nitride semiconductor causes cracks and pits (point-like defects). In view of this, it is known that a highly crystalline III nitride layer is grown by forming a buffer layer on a substrate, and then epitaxially growing a III nitride semiconductor layer on the buffer layer, thereby preventing the formation of cracks and pits due to the strain buffer effect of the buffer layer.
PTL 1 (JP 2007-067077A) discloses a technique of producing a highly crystalline III nitride semiconductor layer, in which crack formation is prevented, on a Si substrate by providing an AlN-based superlattice buffer layer, in which a plurality of first layers made of AlxGa1-xN (Al content x: 0.5≦x≦1) and a plurality of second layers made of AlyGa1-yN (Al content y: 0.01≦y≦0.2) are alternately stacked, between the Si substrate and the III nitride semiconductor layer.
PTL 2 (JP 2009-158804A) discloses a technique of obtaining a highly crystalline III nitride semiconductor layer. The III nitride semiconductor layer is formed on the superlattice composite layer by forming an AlN buffer layer on a Si substrate and sequentially stacking, on the AlN buffer, a composition graded layer having a composition graded such that the Al content decreases in the crystal growth direction, and a superlattice composite layer, in which high Al-content layers and low Al-content layers are alternately stacked.

III nitride epitaxial substrate and deep ultraviolet light emitting device using the same


The present invention relates in general to integrated circuits, and in particular to method and circuitry for implementing an improved phase-locked loop (PLL) in complementary metal-oxide-semiconductor (CMOS)technology using current-controlled CMOS (C3MOS) logic. In an exemplary embodiment, a phase-locked loop includes a phase-frequency detector, a Gm cell block, a low pass filter and a voltage controlled oscillator. These various elements of the phase-locked loop are connected to one another in a fully differential manner, i.e., each element has an input and/or an output each having at least a differential signal. In one embodiment, each of these various elements of the phase-locked loop is implemented using C3MOS logic.

The present invention relates in general to integrated circuits, and in particular to method and circuitry for implementing an improved phase-locked loop (PLL) in complementary metal-oxide-semiconductor (CMOS) technology.
The convergence of various high speed data communication technologies (e.g., Ethernet, fiber channel, IEEE firewire links) into the gigabit domain has focused the efforts of integrated circuit designers on developing high speed circuit techniques for processing broadband signals. Similarly, efforts directed at developing low cost and low power dissipation circuits have been driven by the explosive growth in wireless media for voice and data communications.
A circuit block that is commonly found in voice and data communication applications is a phase-locked loop (PLL). The primary function of the PLL is to maintain a fixed phase relationship between an input (e.g., clock) signal and a reference signal. A PLL designed for a digital application typically includes a phase and/or frequency detector, a charge pump, a loop filter, a voltage controlled oscillator (VCO), and an (optional) divider. The phase detector determines the phase differences between an input signal (i.e., an input data stream or an input clock) and a reference signal derived from the VCO, and generates a detector output signal indicative of the detected phase differences. The charge pump receives the detector output signal and generates a set of phase error signals (e.g., UP and DOWN currents fed into the filter). The loop filter filters the phase error signals to generate a control signal that is then used to adjust the frequency of the VCO such that the phases of the two signals provided to the phase detector are locked. When the phases of the two signals are locked, the respective frequencies of the two signals are exactly the same.
FIG. 1 is a simplified block diagram of a conventional phase locked loop 10. An input signal is provided to a phase detector 12 that also receives a reference signal from a divider 20. The input signal can be a clock signal, a data stream, or some other types of signal having phase and/or frequency information to which the phase locked loop can be locked. The reference signal is typically a clock signal used to trigger the phase detector 12. Phase detector 12 generates an output signal indicative of the timing differences (i.e., the phase differences) between the input signal and the reference signal. The output signal from the phase detector 12 is provided to a charge pump 14 that generates an output signal indicative of the detected phase error between the input and reference signals. In some designs, the charge pump output signal is logic high if the phase of the input signal is early (or late) relative to that of the reference signal, logic low if the phase of the input signal is late (or early) relative to that of the reference signal, and tri-stated for a period of time between clock edges.
The charge pump output signal is provided to a loop filter 16 that filters the signal with a particular transfer characteristic to generate a control signal. The control signal is then provided to, and used to control the frequency of, a voltage-controlled oscillator (VCO) 18. VCO 18 generates an output clock having a frequency can be adjusted by the control signal at the input of VCO. The output clock is provided to divider 20 that divides the frequency of the output clock by a factor of N to generate the reference signal. Divider 20 is optional and not used when the frequency of the output clock is the same as that of the input signal (i.e., N=1). The control signal adjusts the frequency of VCO 18 such that the frequencies of the two signals provided to phase detector 12 are locked when the phase locked loop 10 is locked.
In typical PLLs, signals are transmitted between components in a non-differential manner. Signals transmitted in this manner, however, are subject to a number of shortcomings. For example, noise from power supply fluctuations and substrate can relatively easily affect the quality of such signals causing jitters and other problems. Hence, it would be desirable to implement the PLL in a fully differential architecture that would significantly reduce jitter and improve overall noise performance.
Furthermore, modern day devices and applications continually demand improved performance criteria including high speed, low power dissipation, and low cost, from their constituent components. To realize and meet such performance criteria, it would be desirable to implement the PLL in low-cost CMOS technology that allows for increased levels of integration.

This patent is subject to a terminal disclaimer.

Fully differential CMOS phase-locked loop


A combination of inductor current thresholds and circuitry for controlling the inductor based on the thresholds may be implemented in a power converter. One or more of the inductor current thresholds may be variable. An inductor current threshold may be varied as part of a search algorithm for identifying a value resulting in full scale operation of the inductor without exceeding a safe limit. After each cycle of the power converter, circuitry may determine which current thresholds have been exceeded and which have not been exceeded and then generate indication signals for each of the thresholds. Control logic may receive the indication signals and adjust one of the inductor current thresholds used to determine timing for disconnecting and reconnecting current through the inductor of the power converter.

Switching power converters provide regulated output voltages for numerous electronic products including lamps, such as light emitting diode and gas discharge type lamps, cellular telephones, computing devices, and personal digital assistants. Power converters, such as switching power converters, include an inductor that may be magnetized and used to drive current to generate a regulated output voltage for an end component, such as a speaker of a mobile device. However, the inductors have current limits and exceeding the current limit can be hazardous. Conventionally, current limits are enforced by detecting that the current exceeds a particular threshold and then disconnecting the inductor from a source. However, there is often a delay in disconnecting the inductor that causes the inductor current to still exceed the threshold.
FIG. 1 is one example of a conventional technique for limiting peak current according to the prior art. A line 102 indicates an inductor current. The current is ramping up and at time 112 crosses a threshold current value Ipk,th shown as line 120. At time 114, the controller may detect that the threshold current value Ipk,th is crossed after a delay t1 from the actual crossing at time 112. Circuitry may then generate control signals that cause a switch to disconnect the inductor from the source to terminate the current ramping in the inductor. After a delay t2, the inductor is disconnected at time 116. As a result of the delays t1 and t2, shown as a total td, the actual inductor current exceeded the peak current threshold Ipk,th by an amount ΔI. The ΔI amount may cause the inductor current to exceed safe operating ranges, and thus generate hazardous conditions.
Another conventional solution is to compensate for the delay td by predicting when time 112 will occur. FIG. 2 is another example of a conventional technique for limiting peak current according to the prior art. The inductor can be disconnected at time 212, approximately delay time td before the peak current threshold of line 120 is reached. However, this prediction technique can be inaccurate as there are other unknowns and parameters that can be difficult to predict. Further, to ensure the threshold current does not exceed the safe limits, the inductor must be operated conservatively by predicting peak current times much earlier than expected. However, this results in extremely conservative operation of the inductor and does not allow the inductor to operate at full scale. In fact, prediction errors may be as much as or more than 30%. A prediction with 30% error and resulting safety buffer results in significant under operation of the inductor.
Shortcomings mentioned here are only representative and are included simply to highlight that a need exists for improved electrical components, particularly for power converters employed in consumer-level devices, such as mobile phones. Embodiments described herein address certain shortcomings but not necessarily each and every one described here or known in the art.

Peak current limiting in inductor-based power converter


A display terminal that performs image display processing for displaying in a display section image data recorded in a recording section, which includes a controlling section that performs image sharing processing for providing image data recorded in the recording section to another display terminal over a network, acquiring image data recorded by another display terminal over the network, and displaying the acquired image data in the display section, and sharing control processing for performing control to select image data recorded by another display terminal set up at a location whose distance from the setup location of the display terminal satisfies a predetermined condition, as target image data for the image sharing processing.

1. Field of the Invention
The present invention relates to a display terminal provided with a function for sharing image data between a plurality of other display terminals, which involves an image sharing system and an image sharing method for sharing image data between a plurality of other display terminals.
2. Description of the Related Art
Conventionally, an image sharing system has been proposed that enables a plurality of users to share images (photographs) over a network, for example, Japanese Patent Application (Kohyo) Publication No. 2006-524446 (published Japanese translation of PCT/EP2004/002278 international publication) and Japanese Patent Application Laid-Open (Kokai) Publication No. 2009-099142.
In the conventional technology, in the uploading of an image from a user, the image is transmitted after preference identifying information (such as night view or people) is added thereto. Also, in the downloading of an image to a user, an image to be transmitted is selected by the server-side based on its preference identifying information.
Here, a person interested in photography may wish to receive comments on their photographs and make comments on other people's photographs. Also, this person may, at times, attempt to connect with others in real life in addition to over the network, in other words, perform activities in person (start off-line meetings or a photography club). To establish a community with real-life connection such as this, it is required that the residences of community participants are in relative proximity to one another.
However, in the above-described conventional technology, the system is a closed system on a network. Accordingly, there is a problem in that, even if a community is formed based on such services, only a virtual community on a network is established, and a community with real-life connection cannot be established.

Display terminal provided with an image data sharing function, image sharing system and method for sharing image data