To accomplish both of higher performance of a crystal and lower cost in a semiconductor member, and to produce a solar cell having a high efficiency and a flexible shape at low cost, the semiconductor member is produced by the following steps, (a) forming a porous layer in the surface region of a substrate, (b) immersing the porous layer into a melting solution in which elements for forming a semiconductor layer to be grown is dissolved, under a reducing atmosphere at a high temperature, to grow a crystal semiconductor layer on the surface of the porous layer, (c) bonding another substrate onto the surface of the substrate on which the porous layer and the semiconductor layer are formed and (d) separating the substrate from the another substrate at the porous layer.

1. Field of the Invention
The present invention relates to a method of producing a semiconductor member and a method of producing a solar cell. More particularly, the present invention relates to a method of producing a semiconductor member comprising a thin film crystal formed on an inexpensive substrate and a method of producing a solar cell with high performance by using the semiconductor member.
2. Related Background Art
There have been extensively researched a solar cell as a power supply which is systematically coupled with a driving energy source of various equipments or a commercial power. The solar cell is so desired that a device can be formed on an inexpensive substrate to comply with a cost demand. On the other hand, there has been normally employed silicon as semiconductor constituting the solar cell. In particular, from the viewpoint of the efficiency of converting a light energy into an electric power, that is, from the viewpoint of the photoelectric conversion efficiency, single-crystal silicon is very excellent. On the other hand, from the viewpoint of increase in area and reduction in costs, an amorphous silicon is advantageous. Also, in recent years, for the purpose of obtaining the low costs as low as amorphous silicon and high energy conversion efficiency as high as single-crystal, polycrystal silicon has become used.
However, in single-crystal or polycrystal silicon, since a lump-shaped crystal is sliced into a plate-shaped substrate, it is difficult to make its thickness 0.3 mm or less. Thus, the material used for the substrate has not been effectively utilized because the substrate generally has a thickness much over a thickness necessary for absorbing an incident light (20 xcexcm to 50 xcexcm). Also, in recent years, there has been proposed a method of forming a silicon sheet by using a spin method in which a liquid droplet of melted silicon is allowed to flow into a die. Even in this method, the thickness of the substrate is about 0.1 to 0.2 mm at the minimum, which is not sufficiently thinned. In other words, there is a room for more reducing the costs by further thinning silicon.
To achieve the above, there has been proposed an attempt of achieving high energy conversion efficiency and low costs of a solar cell in which a thin epitaxial layer grown on a single-crystal silicon substrate is separated (peeled) from the substrate (Milnes, A. G. and Feucht, D. L., xe2x80x9cPeeled Film Technology Solar Cellsxe2x80x9d, IEEE Photovoltaic Specialist Conference, p. 338, 1975). In this method, an intermediate layer of SiGe is interposed between single-crystal silicon for forming the substrate and the grown epitaxial layer, and a silicon layer is allowed to (hetero) epitaxially grow thereon. Therefore, the intermediate layer is selectively melted so that the growth layer is peeled off. However, in general, the hetero-epitaxially grown layer is liable to have defects induced on a growth interface because the layer is different in lattice constant from the substrate. Also, this method is not advantageous in the process costs because of use of a material such as germanium which is remarkably expensive more than silicon.
Also, U.S. Pat. No. 4,816,420 discloses that a thin crystal solar cell is obtained by making selective epitaxial growth on a crystal substrate through a mask material, forming sheet-like crystal by using a method of allowing crystal to laterally grow, and thereafter separating the crystal from the substrate. However, in this method, since the sheet-like crystal is mechanically peeled off using cleavage, the sheet-like crystal is liable to be damaged during a peel-off process when the crystal has a certain size or more. In particular, in the case of increasing the area of the crystal as in the solar cell, it becomes difficult to practically employ the above method.
Also, Japanese Patent Application Laid-Open No. 6-45622 discloses that after a porous silicon layer is formed in the surface region of a silicon wafer surface by anodization, the porous layer is peeled off from the wafer, and after the peeled porous layer is fixed onto a metal substrate, an epitaxial layer is formed on the porous layer, to thereby fabricate a thin-film crystal solar cell by using this. However, in this method, since the metal substrate is exposed to a high-temperature process, impurities are liable to be mixed into the epitaxial layer, which leads to a problem that the characteristic is restricted. Also, as realized in the amorphous silicon solar battery, if a thin semiconductor layer is formed on a flexible substrate, for example, a film of polymer such as polyimide, it can be located on a substance having a curved surface, thus expecting the enlargement of an applied field. However, because a high temperature is required in a process of the above-mentioned single-crystal or polycrystal silicon solar cell, it is difficult to use a substrate having poor heat resistance at a high temperature.
By the way, Japanese Patent Application Laid-Open No. 8-213645 discloses that an active layer of the solar cell is allowed to epitaxially grow on amorphous silicon formed in the surface region of a silicon wafer by anodization, and thereafter the active layer can be peeled off from a portion of the porous silicon layer. Therefore, not only the expensive single-crystal substrate can be repeatedly utilized, but also a high-efficiency solar cell can be formed on a flexible low-heat-resistant substrate. However, according to the disclosure of Japanese Patent Application Laid-Open No. 8-213645, the epitaxial growth of the active layer is conducted by the CVD method. In the CVD method, a source gas such as dichlorosilane (SiH2Cl2) or trichlorosilane (SiHCl3) and a large amount of hydrogen gas are used. When a silicon film is deposited to 20 to 50 xcexcm in thickness by using a large amount of the expensive gas, it is correspondingly expensive and considerably disadvantageous from the viewpoint of the costs in comparison with amorphous silicon which is required to be deposited to at most 0.5 to 1.0 xcexcm in thickness.
The present invention has been made in view of the above circumstances, and therefore an object of the present invention is to provide a method of producing a semiconductor member excellent in characteristics and a method of producing a solar cell by using the semiconductor member.
Another object of the present invention is to provide a method of producing a semiconductor member in which crystal semiconductor excellent in various characteristics can be formed even on a substrate having no high-temperature resistant property and a method of producing a solar cell by using the semiconductor member.
Still another object of the present invention is to provide a method of producing a semiconductor member in which crystal semiconductor excellent in various characteristics can be formed even on a flexible substrate and a method of producing a solar cell by using the semiconductor member.
A further object of the present invention is to provide a method of producing a semiconductor member which can be variously applied, used and arranged and a method of producing a solar cell by using the semiconductor member.
A still further object of the present invention is to provide a method of producing a semiconductor member having excellent semiconductor characteristics at low costs and a method of producing a solar cell having various characteristics such as excellent photoelectric conversion characteristics or use characteristics at low costs by using the semiconductor member.
A still further object of the present invention is to provide a method of producing a solar cell which can exhibit high conversion efficiency.
A still further object of the present invention is to provide a semiconductor member which can be obtained by peeling off an epitaxial layer formed on a crystal substrate from the crystal substrate while reusing the crystal substrate, to provide a semiconductor member having high performance at low costs by use of an inexpensive raw material, and to provide a solar cell which is formed by using the semiconductor member while reusing the crystal substrate, and which has high performance, at low costs by use of an inexpensive raw material.
In order to achieve the above objects, according to the present invention, there is provided a method of producing a semiconductor member or a solar cell, the method comprising the steps of:
forming a porous layer in a surface region of a first substrate;
forming a semiconductor layer on the porous layer by liquid phase epitaxy;
bonding a second substrate to a surface of the semiconductor layer opposite to a semiconductor layer surface bonded to the first substrate; and
separating the first substrate from the semiconductor layer by utilizing the porous layer to transfer the semiconductor layer to the second substrate.
Also, according to the present invention, there is provided a method of producing a semiconductor member, the method comprising the steps of:
(a) forming a porous layer in a surface region of a first substrate;
(b) immersing the porous layer into a melting solution in which elements for forming a semiconductor layer to be grown is dissolved up to a supersaturated state or a substantially supersaturated state under a reducing atmosphere to grow a semiconductor layer on a surface of the porous layer;
(c) bonding a second substrate to a surface side of the first substrate on which at least the porous layer and the semiconductor layer are formed; and
(d) separating the first substrate from the second substrate at the porous layer to transfer the semiconductor layer separated from the first substrate to the second substrate.
Further, according to the present invention, there is provided a method of producing a semiconductor member, the method comprising the steps of:
(a) forming a porous layer in a surface region of a first substrate;
(b) immersing, into a melting solution in which elements for forming a semiconductor layer to be grown is dissolved up to a desired concentration, the porous layer whose surface temperature is made lower than a temperature at which the melting solution having the desired concentration is saturated, to grow a semiconductor layer on a surface of the porous layer;
(c) bonding a second substrate onto a surface side of the first substrate on which at least the porous layer and the semiconductor layer are formed; and
(d) separating the first substrate from the second substrate at the porous layer to transfer the semiconductor layer separated from the first substrate to the second substrate.
In addition, according to the present invention, there is provided a method of producing a semiconductor member, the method comprising the steps of:
(a) forming a porous layer in a surface region of a first crystalline substrate;
(b) growing a first thin-film semiconductor layer on a surface of the porous layer in vapor phase by decomposing a source gas;
(c) immersing the first thin-film semiconductor layer into a melting solution in which elements for forming a second thin-film semiconductor are dissolved up to a saturated state or a supersaturated state under a reducing atmosphere to grow a second thin-film semiconductor layer of a conductive type different from that of the first thin-film semiconductor layer on a surface of the first thin-film semiconductor layer in liquid phase;
(d) bonding a second substrate onto a surface of the second thin-film semiconductor layer or onto a surface of a layer further formed on the second thin-film semiconductor layer;
(e) separating the first thin-film semiconductor layer from the first substrate by exerting a force on the porous layer to transfer the first thin-film semiconductor layer to the second substrate.
Yet still further, according to the present invention, there is provided an apparatus of producing a semiconductor member or a solar cell in which a substrate comprising a porous layer is stored and a semiconductor layer is formed on the porous layer, the apparatus comprising:
a liquid phase growth vessel for immersing a first thin-film semiconductor layer into a melting solution in which elements for forming a second thin-film semiconductor layer are dissolved up to a saturated state or a supersaturated state under a reducing atmosphere to grow a second thin-film semiconductor layer on a surface of the first thin-film semiconductor layer in liquid phase; and
means for conveying the substrate between a vapor phase growth vessel and the liquid phase growth vessel while keeping the reducing atmosphere.
In the above method, it is preferable that the semiconductor layer is formed on the porous layer so that the semiconductor layer comprises a region formed by vapor phase epitaxy and a region formed by liquid phase epitaxy in this order.
Also, the above method may further comprise a step of removing the porous layer remaining on the surface of the first substrate after being separated from the semiconductor layer.
Further, it is desirable that the liquid phase epitaxy is conducted by using a melting solution in which elements for forming the semiconductor layer to be grown are dissolved up to a supersaturated state or a substantially supersaturated state.
In addition, it is preferable that the liquid phase epitaxy is conducted under a reducing atmosphere.
Furthermore, it is preferable that the liquid phase epitaxy includes that a melting solution in which the elements for forming the semiconductor layer to be grown are dissolved is brought in contact with the porous layer.
Yet still further, it is preferable that the liquid phase epitaxy includes that a melting solution in which the elements for forming the semiconductor layer to be grown are dissolved is brought in contact with an epitaxial layer formed on the porous layer.
Yet still further, it is desirable that the epitaxial layer is formed by vapor phase epitaxy.
Yet still further, it is preferable that the liquid phase epitaxy includes that a melting solution in which elements for forming the semiconductor layer to be grown is used and the melting solution is brought in contact with the surface of the porous layer while a surface temperature of the porous layer is made lower than a temperature at which the elements in the melting solution having the desired concentration are saturated.
Yet still further, it is desirable that the vapor phase epitaxy is conducted by decomposing a source gas while supplying a gas for forming a reducing atmosphere.
Yet still further, the step of bonding the second substrate may be conducted using an adhesive. In this situation, the adhesive includes a water-soluble adhesive.
Yet still further, there may be provided a third substrate on a separate surface for separating and transferring the semiconductor layer to the second substrate. In this situation, the second substrate may be separated so that the semiconductor layer is transferred to the third substrate.
Yet still further, the second substrate may have a water permeability. Also, the separation of the second substrate may be conducted by lowering of adhesion of the adhesive used for bonding of the second substrate. In this situation, it is desirable that the lowering of the adhesion is conducted by a liquid that has passed through the second substrate.
In addition, the impurities in the porous film may be diffused into the semiconductor layer.
It is preferable that the liquid phase epitaxy is conducted with indium as a solvent.
Yet still further, in the above producing method, it is preferable that prior to the formation of the semiconductor layer into which the impurities are introduced, a semiconductor layer into which no impurities are introduced or impurities are introduced with a low concentration is formed on the tread surface of the first substrate after being subjected to a surface treatment by liquid phase growth.
Yet still further, in the above producing method, semiconductor having a purity of 99.99% or less may be used as the first substrate.
Yet still further, in the above producing method, the first substrate may be a crystalline one, and in particular may be a silicon single-crystal.
Yet still further, in the above apparatus, there may be provided a vapor phase growth vessel for decomposing a source gas in the reducing atmosphere to grow the first thin-film semiconductor layer on the surface of the porous layer of the substrate in the vapor phase.
According to the present invention, epitaxial growth is employed for providing a semiconductor member with higher performance and quality, and also for providing a solar cell with higher conversion efficiency.
In order to perform the epitaxial growth of silicon at low costs, it is advantageous to use the liquid phase growth method rather than a method of using a gas such as the CVD method. In the liquid phase growth method, silicon grains are dissolved in a melted metal such as Sn, In, Cu or Al, a crystalline substrate is immersed therein, and silicon is allowed to grow on the substrate in a state where the solution is made supersaturated state. The liquid phase growth method is expensive in the raw material to be used, and the raw material to be wasted is reduced. Also, since the growth is conducted at a very low temperature in comparison with the melting point of Si such as 100xc2x0 C. or lower, the liquid phase growth method is advantageous more than the spin method from the viewpoint of an energy. However, when silicon growth is conducted by using the liquid phase growth method in fact, there are not less cases, under the existing circumstances, in which the grown silicon cannot withstand use as the solar cell because of the problem that abnormal crystal grains are grown, or the grown thin-film semiconductor layer cannot be well separated. Therefore, it is normally difficult to accomplish both of high performance as single-crystal or polycrystal and low costs as much as amorphous silicon.
Also, as the substrate (first substrate) for epitaxial growth, there can be used for not only a single-crystal silicon wafer but also a high-quality polycrystal silicon wafer. However, in order to prevent an influence of impurity diffusion from the substrate, there is required high purity of the substrate such that a device is made in the substrate itself. Therefore, from the viewpoint of the costs, it is desirable that the use of the substrate can be repeated at least several tens times. However, as the number of times of repeated use is increased, the anodization condition is varied depending on a variation of the surface state of crystal, etc., thereby making producing management difficult.
Taking the above circumstances into consideration, embodiments of the present invention will be described referring to a solar cell as an example. The present invention utilizes a process of transferring a semiconductor layer to a second substrate. Since on the semiconductor layer of the present invention can be formed a semiconductor device such as a transistor, a diode or an LED as occasion demands, the present invention is not particularly limited to the production of the solar cell.
An example of the structure of a solar cell produced according to the method of the present invention is shown in a schematic cross-sectional views of FIG. 1, and a preferred example of producing steps according to the present invention is shown in schematic cross-sectional views of FIGS. 2A to 2I, respectively. In FIGS. 1 and 2A to 2I, reference numeral 105 and 205 denote substrates; 109 and 209, back-surface electrodes; 104 and 204, p+ (or n+) type layers; 103 and 203, active pxe2x88x92 (or nxe2x88x92) type layers; 106 and 206, n+ (or p+) type layers; 107 and 207, transparent conductive layers; and 108 and 208, collecting electrodes. In this example, the n+ (or p+) type layers 106, 206 and the active pxe2x88x92 (or nxe2x88x92) type layers 103, 203 form a semiconductor junction to produce a photoelectromotive force. The active pxe2x88x92 (or nxe2x88x92) type layers 103 and 203 are main bodies which absorb a solar light to generate carriers and are thickened to about 10 to 50 xcexcm in case of silicon. On the other hand, the n+ (or p+) type layers 106 and 206 is sufficiently thickened to 1 xcexcm or less. Also, the p+(or n+) type layers 104 and 204 form a back-surface field between the electrodes 109, 209 and the layers 104, 204 and provide a function of preventing re-bonding of the carriers in the vicinity of the electrodes 109 and 209 although it is not essential. Also, they sufficiently functions with the thickness of 1 xcexcm or less. In this example, the expressions of the n+ (or p+) type layers 106 and 206, the active pxe2x88x92 (or nxe2x88x92) type layers 103 and 203, and the p+ (or n+) type layers 104 and 204 mean that if the layers 106 and 206 are of n+-type, the layers 103 and 203 are of pxe2x88x92-type, and the layers 104 and 204 are of p+-type, whereas if the layers 106 and 206 are of p+-type, the layers 103 and 203 are of nxe2x88x92-type, and the layers 104 and 204 are of n+-type. Thus, these layers function with the combination of the respective conductive types, in one combination containing the layers 106 and 206 of n+-type, the collecting electrode side generates a negative electromotive force, whereas in the combination containing the layers 106 and 206 of p+-type, the collecting electrode side generates a positive electromotive force.
Subsequently, an outline of producing steps according to the present invention will be described with reference to FIGS. 2A to 2I. For example, a single-crystal semiconductor wafer is used as a first subtrate 201 of crystalline. Impurities are thermally diffused, ions are implanted into the surface of the first substrate 201, or impurities are introduced when producing the wafer to make at least the wafer surface p+ (or nxe2x88x92) type (FIG. 2A). Then, the wafer surface on the side where the impurities are introduced is anodized in a HF solution to form a porous layer 202 (FIG. 2B). In the porous structure formation by anodization, as disclosed in Japanese Patent Application Laid-Open No. 7-302889, an anodization current level is, for example, changed from a low level to a high level on the way in such a manner that a porosity change is given of the structure of the porous layer in advance, thereby being capable of controlling such that the substrate and the semiconductor layer are liable to be separated from each other at the porous layer after epitaxial growth. Subsequently, a single-crystal semiconductor layer 203 that functions as the active pxe2x88x92 (or nxe2x88x92) type layer is allowed to epitaxially grow on the porous layer by the liquid phase growth method. Then, as occasion demands, a single-crystal semiconductor layer 204 of the p+ (or n+) type layer is allowed to epitaxially grow. Moreover, a second substrate 205 on which a back-surface electrode 209 is formed is bonded onto the single-crystal semiconductor layer 204, or after the single-crystal semiconductor layer 204 is formed, the back-side electrode 209 is formed on the single-crystal semiconductor layer 204, and then the second substrate 205 is bonded thereonto (FIGS. 2D to 2E). A force is exerted between the bonded second substrate 205 and the first crsytalline substrate 201 to mechanically separate the porous layer, thereby transferring the single-crystal semiconductor layers 203 and 204 from the first crystalline substrate 201 to the second substrate 205 (FIG. 2F). After transfer, the porous layer 202a remaining on the surface of the single-crystal semiconductor member 203 is removed by etching, an n+ (or p+)-type semiconductor layer 206, a transparent conductive layer 207 and a collecting electrode 208 are formed to complete a solar cell (FIGS. 2G to 2H). A porous layer 202b remaining on the surface of the first crystalline substrate 201 after the completion of separation is removed and treated by etching, etc., and the first crystalline substrate is then again subjected to the first step (FIG. 2A).
Then, the producing method according to the present invention will be described in more detail.
First, an example of using silicon as the material of the first substrate 201 of crystalline as to the porous layer 202 (that is, an example in which the porous layer is made of silicon) will be described. The mechanical strength of the silicon porous layer 202 is considered to be sufficiently weaker than bulk silicon although it depends on the porosity. For example, if the porosity is 50%, the mechanical strength is regarded to be half of the bulk or less. When the second substrate 205 is allowed to bond onto the surface of the porous silicon layer 202, if a sufficient adhesion is exerted between the second substrate 205 and the porous layer 202, the porous silicon layer 202 is destroyed by applying a compression, a tensile force or a sharing force between silicon wafer 201 and the second substrate 205 where the porous layer is formed. If the porosity is more increased, the porous layer 202 can be destroyed with a weaker force.
The silicon substrate can be made porous by the anodization method using an HF solution 10% or more in concentration. A amount of current that flows at the time of the anodization is appropriately in a range of about several to several tens mA/cm2 although being appropriately determined depending on the HF concentration, a desired thickness of the porous layer, the surface state of the porous layer or the like. Also, by addition of alcohol such as ethyl alcohol to the HF solution, bubbles of the reactive gas which is generated at the time of the anodization can be removed from a surface to be reacted withiout being stirred, thereby being capable of forming the porous silicon uniformly and efficiently. The amount of alcohol to be added is appropriately determined depending on the HF concentration, a desired thickness of the porous layer, the surface state of the porous layer or the like. In particular, attension has been paid to prevent the HF concentration from being too lowered. The density of the single-crystal silicon is 2.33 g/cm3, whereas the density of the porous silicon layer is varied by varying the concentration of the HF solution in a range of 50 to 20% to be in a range of 1.1 to 0.6 g/cm3. Also, the porosity can be varied by a variation of the anodization current. When the current increases, the porosity also increases more.
Positive holes are required for anodic reaction in formation of the porous silicon by the anodization. For that reason, silicon is made porous using p-type silicon in which positive holes mainly exist (T. Unagami, J. Electrochem. Soc., vol. 127,476 (1980)). However, on the other hand, there has been reported that even a low-resistant n-type silicon is made porous (R. P Holmstrom and J. Y. Chi, Appl. Phys. Lett., vol. 42,386 (1983)). Thus, the low-resistant silicon can be made porous regardless of the kind of p-type or n-type. Also, silicon can be selectively made porous depending on the conductive type so that only the p-type layer can be made porous by conducting the anodization in a dark place as in the FIPOS (Full Isolation by Porous Oxidized Silicon) method.
The porous silicon obtained by subjecting the single-crystal silicon to anodization has pores having a dimeter of about several nm formed according to the observation using a transmission electromicroscope, and its density becomes half of the single-crystal or less. Even in that fact, monocrystallinity is maintained, thereby being capable of allowing an epitaxial layer to grow on the porous silicon. Also, because the porous layer has a large number of pore spaces formed inside thereof, the surface area is remarkably increased in comparison with the volumn. As a result, a chemical etching rate of the porous layer is remarkably accelerated in comparison with the etching rate of the normal single-crystal layer. Further, there has been known that an excellent epitaxial layer is obtained by annealing at 950 to 1,100xc2x0 C. in a hydrogen atmosphere prior to epitaxial growth. It is presumed that this is because the outermost surface of the porous layer is reconstructed and flattened at a high temperature in a reducing atmosphere (Nikei Micro Device, July of 1994, p. 76).
Similarly, the porous layer is obtained by anodization when single-crystal silicon is replaced by polycrystal silicon, and a crystal silicon layer can grow on the porous layer of polycrystal silicon (in this case, partical epitaxial growth corresponding to a size of crystal grains of the polycrystal silicon is enabled). The more details will be described with reference to various Examples as described below.
Then, the liquid phase growth method for forming the thin-film semiconductor layer will be described. FIG. 3 is a schematic diagram for explanation of the liquid phase growth method in the producing method of the present invention in a thermal equilibrium state of solvent M and solute S (for example, silicon). In the figure, a horizontal axis 501 represents a mean concentration of the solute S in the solution (or apparent concentration depending on circumstances), where a left end thereof represents the state of a pure solvent, and the concentration of the solute S increases toward the right side. Also, a vertical axis 502 represents a temperature of the solution, and the state of the solution is roughly classified into two regions with a curve 503 as its boundary. Also, at a position P in a region 504, the solute S is uniformly dissolved in the solvent M, and its concentration is coincides with the concentration as indicated by the horizontal axis. In a region 505, a part of the solute S is solidified and deposited, and for example, a solid S and the solution having a concentration Dq exist together at a position Q. A substrate made of a material which is not dissolved at a temperature of a state R0 on the curve 503 is immersed in the solution in the state R0, and as the temperature of the solution gradually decreases, the concentration of the solute S in the solution is reduced along the curve 503, for example, up to R1. The solute S corresponding to a difference in concentration between R0 and R1 is deposited on the surface of the substrate as solid. In particular, in the case where the substrate is crystalline, there is a case where the solid S also becomes crystalline according to the crystallinity of the substrate, which is called xe2x80x9cepitaxial growthxe2x80x9d. Normally, when the material of the substrate and the solid S are the same, the epitaxial growth is most facilitated. However, even if they are different in material, the epitaxial growth is enabled (hetero-epitaxial growth). In this way, the thin film semiconductor can be allowed to grow on the surface of the first substrate of crystalline. In general, after the substrate is immersed into the solution which is made just a saturated state or which is made a slightly unsaturated state for a very short time and then is adjusted to the saturate state, the growth of crystal starts. It is presumed that in the above manner, the impurities and the defects are removed from the surface of the substrate by the thermal equilibrium effect, and crystal with high quality is liable to grow. However, it has been proved that there arise some problems when crystal is actually allowed to grow on the porous layer by the liquid phase growth method. Hereinafter, a description will be given on the basis of the experiments which have been conducted by the present inventors.
The epitaxial growth is enabled by methods other than the liquid phase growth method, such as a method of conducting the epitaxial growth by decomposing a gas such as silane (SiH4), dichlorosilane (SiH2Cl2) or trichlorosilane (SiHCl3) by heat or the action of plasma (CVD method). However, since the liquid phase growth method conducts crystal growth in a state nearest to the thermal equilibrium state, a high-quality thin film semiconductor layer is readily obtained, and also a material necessary for deposition is low in costs.
First, FIG. 4 shows a schematically structural cross-sectional view of a suitable apparatus for growing a semiconductor layer for a solar cell according to the present invention. This apparatus is used in Experimentals 1 to 3 and Example 1.
As shown in FIG. 4, the entire apparatus is roughly classified into three sections. Reference numeral 401 denotes a load lock chamber whose interior can be air-tightly kept by closing an open/close door 402. Reference numeral 403 denotes a nitrogen introduction line which can replace atmosphere in the chamber 401 by nitrogen. Reference numeral 404 denotes a hydrogen annealing vessel or a vapor phase growth vessel, and a sample can be conveyed between the vessel 404 and the load lock chamber 401 through a gate valve 405. Hydrogen or source gases for forming a film can be introduced to the hydrogen annealing vessel 404 from the hydrogen introduction line 406 while controlling the flow rate of hydrogen or source gases. Reference numeral 408 denotes a heater for heating substrates 416 which is located inside of the vessel 404. The substrates 416 each comprising a pair of two silicon wafers bonded to each other are arranged such that each of a plurality of the substrates 416 is in parallel to one another while a certain interval is kept between the substrates by a holder. The substrates can be vertically conveyed through a gate value by a conveying mechanism not shown in the drawing. Reference numeral 409 denotes a liquid phase growth vessel, and a sample can be conveyed between the hydrogen anneal vessel 404 and the liquid phase growth vessel 409 through the gate valve 410. Hydrogen is supplied to the liquid phase growth vessel 409 frm the hydrogen introduction line 411 so that atmosphere can be kept to a reduction state during liquid phase growth. Reference numeral 414 denotes a carbon boat which is heated by the heater 413 in such a manner that elements for forming a semiconductor layer such as silicon and dopant elements as occasion demands are dissolved in a low-melting-point metal such as In which exists inside of the carbon boat 414. Reference numerals 407 and 412 denote gas exhaust tubes, and 615 is a melting material.
After a p-type silicon wafer, as a substrate, on a surface of which a porous layer was formed by a standard anodization, was held in a hydrogen air flow at a substrate surface temperature (Tsurf) of 1,050xc2x0 C. for 30 minutes (after annealing), a temperature went down to 900xc2x0 C. On the other hand, silicon was dissolved into a metal indium solvent at a solvent temperature (Tm) of 900xc2x0 C. up to a concentration with which the solvent was just saturated. Thereafter, a p-type silicon wafer on a surface of which a porous layer was formed by the standard anodization was immersed in the solvent at the surface temperature Tsurf of 900xc2x0 C., and then was gradually cooled at a cooling rate of xe2x88x921xc2x0 C./min. As a result, a silicon layer was deposited on the surface of the silicon wafer. However, an uneven structure was found on the surface, and also a discontinuous ring-shaped RHEED (reflection high energy electron diffraction) image was obtained. Therefore, it was found that the grown silicon was irregular polycrystal. In addition, when attempt was made to separate that film, there was a part of the film which remained without being separated and the film could not be used for the solar cell. However, when crystal growth is conducted on the porous layer having the same condition by the thermal CVD method using dichlorosilane, there is obtained a single-crystal film with excellent smoothness. Also, the entire film can be completely separated. On the other hand, a high-quality single-crystal is obtained similarly in the case where liquid phase growth is made on the same p-type silicon wafer under the same condition without any formation of the porous layer. In other words, it has been found that an inherent problem is generated when crystal is allowed to grow on the porous layer in the liquid phase.
Silicon was dissolved in the metal indium at 900xc2x0 C. until it became just a saturated state. In other words, the temperature Tsat at which the solution was saturated was 900xc2x0 C.
Then, after the temperature of the solvent was set to the values of Tm column in Table 1, a p-type silicon wafer on a surface of which a porous layer was formed by the standard anodization was annealed in the hydrogen air flow as in Experiment 1, and thereafter was immersed in the solvent while the substrate surface temperature was set to be equal to the temperature of the solvent (Tsurf=Tm), and then is gradually cooled at a cooling rate of xe2x88x921xc2x0 C./min to deposit the thin-film silicon having a thickness of 20 xcexcm. As a result, as indicated in Table 1, differences are found in RHEED image and separation state depending on Tm.
In this experiment, when Tm is lower than Tsat, the amount of silicon corresponding to an amount over the saturated concentration should be immediately deposited as in the point Q of FIG. 3. However, in fact, supersaturated silicon can exist in the solution within some range. The supersaturated state is unstable, and it is presumed that if a solid such as a wafer exists in the solution, silicon starts to be deposited on the wafer from the solution close to its surface.
In this way, it has been proved that the state of the thin film semiconductor is remarkably improved by immersing the silicon wafer after the solution is made in the saturated state to some degree. As a result of experiment while Tsat and Tm were varied, the present inventors have concluded that when a relationship of Tsatxe2x88x92Tmxe2x89xa75xc2x0 is substantially satisfied, crystallinity is particularly high, and a well separatable film can be grown. However, if the degree of supersaturated state is remarkable, the solute is immediately deposited from the solution, thereby not performing stable deposition.
The reason why the above result is obtained is presumed by the present inventors, as follows. That is, it is presumed that the solute atoms to be deposited and the solute atoms to be dissolved coexist on the surface of the wafer even in the state where the solute is deposited from the micro viewpoint, and deposition is made when there are a large net amount of solute atoms to be deposited (in this point, it is considered that this method is different from the CVD method in which deposition occurs substantially in one way with chemical reaction of molecules from the vapor phase). Therefore, it is presumed that when net deposition is not made at an initial growth stage, or net deposition rate is low, because a large amount of atoms which are dissolved from the substrate exist, the initial substrate structure is changed with elapse of time. In particular, since the porous layer has a large effective surface area and a high reactivity, delivery of atoms between the substrate and the solute in the solution is frequently made so that the porous layer is liable to be remarkably modified. For that reason, it is presumed that crystallinity is lost or pores are embedded, thereby making it difficult to conduct separation in the following step.
Also, in the liquid phase growth method, it is said that in the initial substrate immersion stage, if the solution is not unsaturated, high-quality crystal cannot be grown. However, if the porous layer is located in a high-temperature reducing atomosphere, the surface defects are removed, and impurities such as oxygen are also removed. Therefore, it is considered from the above circumstances that high-qualitity crystal is more readily obtained in the case where the solution is supersaturated from the initial.
Silicon was dissolved in a metal indium solvent at 900xc2x0 C. until the solution had a concentration with which silicon was just saturated. A p-type silicon wafer on a surface of which a porous layer was formed by the standard anodization was annealed in the hydrogen air flow, and thereafter was immersed in the solvent while the substrate surface temperature was set to values of Tsurf column shown in Table 2, and then was gradually cooled at a cooling rate of xe2x88x921xc2x0 C./min to deposit the thin-film silicon of 20 xcexcm in thickness. It is presumed that the surface temperature of the substrate coincides with the temperature Tm of the solvent immediately after the silicon wafer is immersed in the solution.
It is presumed that although the metal indium solvent is not supersaturated in an initial growth stage, if Tsurf less than Tsat, preferably Tsatxe2x88x92Tsurfxe2x89xa75xc2x0 is satisified, adverse influence on the porous layer can be substantially prevented. Tsat=Tm=900xc2x0 C. is satisfied until cooling starts.
Then, the formation of a junction will be described. In FIG. 1, the p+ (or n+) type layer 104 (for back-surface field formation) on the substrate 105 side and the n+ (or p+) type layers 106 on the ligt incident side can grow by the liquid phase growth method separately from the active pxe2x88x92 (or nxe2x88x92) type layer 103, respectively. For example, in the case where Ga is solvent, Ga is dissolved in the silicon film so that it can be doped to become p+ type. In the case where Sb is solvent, Sb is dissolved in the silicon film so that it can be doped to become n+ type. In the case where In is solvent, since it is difficult to disolve In in silicon, Ga is added to In so that is can be doped to become p-type. Similarly, As is added to In so that it can be doped to become n-type.
Alternatively, the junction may be formed by thermal diffusion after a dopant diffusion source is coated or deposited on the surface of the active layer 103, or by implanting dopant atoms to the silicon layer by ion implantation.
Also, as already described, n+ (or p+) type layer 106 on the light incident side can be formed separately after the semiconductor thin film is separated. In the case of using a substrate having low heat resistance such as a resin film, there is the necessity of applying a depositing method such as the plasma CVD by which deposition is enabled at a low temperature. The more details will be described with reference to Examples.
Subsequently, the first substrate of crystaline and its reuse will be described with reference to FIGS. 2A to 2I. As already described, in order to allow the thin film silicon crystal to grow, it is the best to use a silicon wafer as the first substrate. The entire silicon wafer may be doped to become p-type, or only the surface of the silicon wafer may be doped to p-type in order to conduct anodization of e silicon wafer. As a method of achieving this, there are used measurements such as thermal diffusion or ion implantation. A p-type layer is made porous by anodization to produce a porous layer 202.
Also, the porous layer 202a remaining on the active layer 203 which is separated from the silicon crystal substrate is selectively removed. Also, the porous layer 202b remaining on the surface of the silicon crystal substrate from which the active layer 203 is separated is selectively removed for reuse. Only porous silicon can be chemically etched in an electroless wet manner using at least one kind of a normal silicon etching solution, hydrofluoric acid which is a selective etching solution for porous silicon, a mixture solution in which at least any one of alcohol and hydrogen peroxide water is added to hydrofluoric acid, buffered hydrofluoric acid, and a mixture solution in which at least any one of alcohol and hydrogen peroxide water is added to buffered hydrofluoric acid.
The first substrate is gradually reduced in thickness as the separating step is repeatedly conducted. There is a tendency that roughness and defects on the surface of the silicon layer are gradually increased. The number of times where the silicon wafer can be repeatedly used is restricted by those factors. The number of times where the single-crystal wafer of expensive silicon can be used largely effects the costs. From the above viewpoint, several improvements can be made. That is, the thickness can be restored by conducting epitaxial growth. In this case, it is particularly a convenience to use the liquid phase growth method that enables growth at lower costs.
The above method has several advantages from the viewpoint of reducing the costs. That is, when the epitaxial layer is doped to become p-type during growing, a step of doping for p-type is not required. Also, even when a silicon wafer having low quality such that the concentration of impurities is unstable is used, the reproducibility of the anodization step is improved to stabilize the quality of the porous layer. Moreover, when the epitaxial layer non-doped or doped with a low concentration is deposited prior to a doping step of the surface for p-type, the reproducibility of the anodization can be further improved. Although the generation of roughness, etc., on the surface as it is repeatedly used largely influences a post step, mechanical grinding can be conducted if required.
The above description was given provided that the thin film semiconductor is single-crystal. However, this is not essential. In the application of the present invention to the solar cell, even when the thin film semiconductor is polycrystal, it is put in practical use as a solar cell having sufficiently high performance if the size of crystal grains is about 1 mm as a reference. Even if the first substrate of crystalline is polycrystal, epitaxial growth is locally made within a range of the respective crystal grains, to thereby obtain polycrystalline thin film semiconductor layer. The more details will be described with reference to Examples.
In the solar cell according to the present invention, a polymer film is appropriately used as a low-heat-resistant substrate material to which the thin film crystal semiconductor layer is transferred, and the representative material is polyimide film. Also, glass, a plastic plate made of resin or the like can be used. In the solar cell according to the present invention, as a method of bonding the substrate to the thin film crystal semiconductor layer, there is appropriately used a method in which a conductive metal paste such as copper paste or copper paste is inserted between the substrate and the thin film crystal semiconductor layer to bring them in close contact with each other, and then they are burned and adgered onto each other. In this case, metal such as copper or silver after being burned also functions as a back-surface electrode and a back-surface reflection layer. Also, in case of a substrate such as the polymer film, the substrate and the thin film crystal semiconductor layer may be bonded onto each other in such a manner that a temperature is elevated upto a softening point of the film substrate in a state where the substrate and the thin film crystal semiconductor layer are brought in close contact with each other (in this case, the back-surface electrode is formed on the surface of the thin film crystal semiconductor layer in advance). In the solar cell according to the present invention, for the purpose of reducing the reflection loss of an incident light, the surface of the semiconductor layer can be subjected to a texture treatment. In case of silicon, this treatment is conducted using hydrazine, NaOH, KOH or the like. The height of the piramid to be formed in the texture treatment is appropriately in a range of several to several tens xcexcm.
Subsequently, an outline of steps of another producing method according to the present invention will be described referring to FIGS. 5A to 5H.
First, as the first substrate 201 of crysalline, there is used, for example, a single-crystal semiconductor wafer. Impurities are introduced by thermal diffusion and ions implantation into the surface of the single-crystal semiconductor wafer or into the wafer during the production of the wafer so that a p+ (or n+) type layer is formed at least on the wafer surface (FIG. 5A).
Then, the wafer surface side where impurities are introduced is subjected to anodization in an HF solution to form the porous layer 202 (FIG. 5B).
Subsequently, the n+ (or p+)-type first single-crystal semiconductor layer 206 is allowed to epitaxially grow on the porous layer by the vapor phase growth method. Keeping the reducing atmosphere, the second single-crystal semiconductor layer 203 that functions as the active pxe2x88x92 (or nxe2x88x92) type layer is allowed to epitaxially grow on the single-crystal semiconductor layer 206 by the liquid phase growth method. Thereafter, if required, the third single-crystal semiconductor layer 204 of the p+ (or n+) type layer is allowed to epitaxially grow (FIG. 5C).
Moreover, the second substrate 205 on which the back-surface electrode 209 has been formed in advance is bonded onto the p+ (or n+) type layer 204, or after the p+ (or n+) type layer 204 is formed, the back-surface electrode 209 is formed on the p+ (or n+) type layer 204, and thereafter the second substrate 205 is bonded onto the p+ (or n+) type layer 204 (FIGS. 5D to 5E).
A force is exerted between the second substrate 205 and the first crystalline substrate 201 as bonded onto each other to then mechanically separate the porbus layer 202, whereby the single-crystal semoiconductor layers 204, 203 and 206 are transferred from the first crystalline substrate 201 to the second substrate 205 (FIG. 5F).
After transfer, the porous layer 202a remaining on the surface of the single-crystal semiconductor layer 206 is removed by etching, and then the transparent conductive layer 207 and the collecting electrode 208 are formed to provide a solar cell (FIG. 5G).
After the first crystalline substrate 201 as subjected to the separation step has the porous layer 202b remaining on its surface is removed and treated by etching, etc., it is again subjected to the initial step (FIG. 5A) as mentioned above (FIG. 5H).
As is apparent from the above description, the example shown in FIGS. 5A to 5H is different from the example of FIGS. 2A to 2I in that the thin film semiconductor layer is allowed to epitaxially grow on the porous layer by the vapor phase growth method, and thereafter the epitaxial growth is conducted by the liquid phase growth method as described with reference to FIGS. 2A to 2I.
Subsequently, the vapor phase growth method for forming the thin film semiconductor layer will be described. As the vapor phase growth method, there are the thermal CVD method, the LPCVD method, the sputtering method, the plasma CVD method, the photo CVD method and so on. A source gas used for crystal growth is represented by silane or silane halide such as Si2H2Cl2, SiCl4, SiHCl3, SiH4, Si2H6, SiH2F2 or Si2F6.
Also, as a carrier gas, or for the purpose of obtaining a reducing atmosphere that promotes crytal growth, hydrogen (H2) is added together with the above-mentioned source gas. The mixture ratio of the source gas to hydrogen is properly set to be preferably 1:10 to 1:100 (introduction flow ratio) although it is appropriately determined according to the forming method, the kind of the source gas and also the forming conditions. The ratio is more preferably set to be 1:20 to 1:800.
In the case of forming the compound semiconductor layer, the MOCVD method and the MBE method are used. As the source gas used for those crystal growth, for example, in the case of forming GaAs, Ga(CH3)3, AsH3, Al(CH3)3 or the like is used in the MOCVD method.
As a temperature at which growth is conducted, in the case of growing silicon by the thermal CVD method, it is appropriately set to about 800 to 1250xc2x0 C., and it is desirable that the temperature is more preferably controlled to be 850 to 1200xc2x0 C. Also, in the case of growing GaAs by the MOCVD method, it is desirable that the temperature is controlled to 650 to 900xc2x0 C. In the plasma CVD method, it is appropriately about 200 to 600xc2x0 C., and more preferably 200 to 500xc2x0 C.
Similarly, a pressure is appropriately about 10xe2x88x922 to 760 Torr in methods other than the MBE method, and more preferably 10xe2x88x921 to 760 Torr. In case of using the MBE method, the pressure as a back pressure is appropriately 10xe2x88x925 Torr or less, and more preferably 10xe2x88x926 Torr or less.
Then, the liquid phase growth method for forming a thicker crystal semiconductor layer on the crystal semiconductor layer that has grown by the vapor phase growth method will be described.
The liquid phase growth can be basically conducted by the above-mentioned method.
However, when by the liquid phase method crystal is allowed to grow on the crystal semiconductor layer that has grown by the vapor phase growth method, it is found that there is a case where some problems arise.
A p-type silicon wafer having a porous layer formed in a surface region by a standard anodization was held in a hydrogen air flow at a surface temperature of Tsurf=1050xc2x0 C. for 30 minutes, and then the temperature went down to 900xc2x0 C.
Then, n+-type crystal Si of 0.5 xcexcm in thickness was deposited on the porous layer by the thermal CVD method by using hydrogen as a carrier gas, dichlorosilane (SiH2Cl2) as a source gas, and phosphine (PH3) as dopant for n-type.
The silicon wafer extracted from the CVD apparatus was set in a liquid phase growing apparatus whose inside was made in a reduciing atmosphere by a hydrogen air flow, and silicon was dissolved in a metal indium solvent of Tm=900xc2x0 C. until the concentration became just a saturated state. Further, the wafer having the surface temperature Tsurf=900xc2x0 C. was immersed in a solution which was adjusted by addition of a slight amount of garium (Ga) as a p-type dopant, and then gradually cooled at a cooling rate of xe2x88x921xc2x0 C./min. As a result, a pxe2x88x92-type silicon layer of 25 xcexcm in thickness was deposited on the surface of the silicon wafer. This was regarded as Sample 1.
For comparison, subsequent to formation of the n+-type silicon layer, a pxe2x88x92-type silicon layer having the same thickness was deposited using the same CVD apparatus with diborane (B2H6) as a p-type doping gas. This was regarded as Sample 2.
Furthermore, for comparison, a pxe2x88x92-type silicon layer was deposited on the n+-type single-crystal wafer in the same manner as that of Sample 1. This was regarded as Sample 3.
As a result of observing the RHEED image of those samples, it could be recognized that epitaxial growth was made because a spot image was found in all the samples. In Samples 2 and 3, spots were clearer and streak lines and Kikuchi lines were obserbed. Thus, it was found that Samples had high quality crytal. Further, the respective samples were immersed in an etching solution in which potassium dichromate was dissolved in an aqueous solution of hydrofluoric acid, and held for 5 minutes as it was for actuarizing defects (which is called xe2x80x9cseco. etchingxe2x80x9d). As a result, defects of about 108/cm2 were found in Sample 1 by observation through an optical microscope whereas only defects of about 105/cm2 were observed in Samples 2 and 3. That is, it has been found that when the film formed by the vapor phase growth method and the film formed by the liquid phase growth method are stacked, an inherent problem occurs.
The CVD apparatus and the liquid phase growing apparatus as used in Experiment 4 were modified in such a manner that they were connected to each other through a gate valve so that the sample could be transported without being exposed to atomoshere. First, an n+-type silicon layer was deposited on the p-type silicon wafer on which the same porous layer as formed in Experiment 4 was formed. Sequentially, while hydrogen was allowed to flow to the CVD apparatus side and the liquid phase growing apparatus side, the gate valve was opened, and the wafer was conveyed from the CVD apparatus side to the liquid phase growing apparatus side. Thereafter, a pxe2x88x92-type silicon layer was deposited by the liquid phase growth method as in Experiment 4. This was regarded as Sample 4.
Then, in order to recognize the effect of the modified apparatus, after crystal growth by the CVD method was completed and then the temperature of the sample was went down to the room temperature, the CVD apparatus side was opened to atmosphere. Thereafter, atmosphere was replaced by hydrogen, the sample was conveyed to the liquid phase growing apparatus side, and a pxe2x88x92-type silicon layer was deposited in the same manner as in Sample 1. This was regarded as Sample 5. The results of the RHEED image and the seco. etching clearly exhibited that Sample 4 was higher in crytallinity than Sample 5.
The present inventors interpret the results of Samples 4 and 5 as follows: That is, the surface of crystal whose growth is completed by the vapor phase growth has contamination such as chlorine. When this contamination is exposed to atmosphere to break the reducing atmosphere, hydrolysis reaction occurs, and the oxidation of the surrface is progressed, which adversely affects crystal growth. As a result, keeping the reducing atmosphere between the vapor phase growth side and the liquid phase growth side can suppress the adverse influence of contamination.
A series of samples were produced by using the same method as that of Sample 4 in Experiments 5, provided that the surface temperature Tsurf of the substrate was varied immediately before the substrate was immersed in the solution. All the samples exhibited excellent crystallinity. Then, an electrode of stacked magnesium and aluminum was deposited on the surface of those samples. Magnesium was used for obtaining ohmic contact with the pxe2x88x92-type silicon. Since those samples had a junction of n+-type and pxe2x88x92-type, they exhibited the rectifying property as a diode. A ratio of a current value when +1 V is applied to pxe2x88x92-type to a current value when xe2x88x921 V is applied thereto is defined as a rectifying ratio, and the rectifying ratio of the respective Samples 6 to 10 are represented in Table 3.
As shown in Table 3, higher rectifying ratio is obtained when Tsurf is lower than the solution temperature (Tm=900xc2x0 C.). When Tsurf is higher, etch-back occurs immediately after the substrate is immersed in the solution, and n-type dopant starts to be immersed in the solution. When depostion is again conducted before the n-type dopant is not sufficiently diffused, n-type dopant is considered to be mixed into the active layer which should be naturally of pxe2x88x92-type, thereby adversely affecting the junction characteristic.

Method of producing semiconductor member and method of producing solar cell


A device for displaying the temperature of a refrigerator, having at least one temperature sensor (7) situated in the cooled interior (2) of the refrigerator (1), and having a temperature display for displaying the temperature measured by the temperature sensor (7), characterized in that the temperature display is formed by at least one refrigerator light (10) which has various colors, and which displays a different color depending on the measured temperature.

Nowadays, the temperature prevailing in a refrigerator is usually displayed via a digital display which is visible when the refrigerator door is open. If the actual temperature measured in the refrigerator deviates from a set target temperature, it notifies the user by sound. Since the cooling temperature decreases from the bottom cooling compartments toward the top cooling compartments of the refrigerator, a temperature display for each of the cooling compartments would be desirable, but this is not possible with the known digital display.

Device for displaying the temperature of a refrigerator


A process includes receiving a table data set that represents mappings between a plurality of operand patterns indicating types of operands possibly included in a first instruction used in a first assembly language and a plurality of second instructions used in a second assembly language or a machine language corresponding to the second assembly language. The table data set maps two or more of the second instructions to each of the operand patterns. The process also includes generating, based on the table data set, a translation program used to translate first code written in the first assembly language into second code written in the second assembly language or the machine language. The translation program defines a process of determining an operand pattern of an instruction included in the first code and outputting two or more instructions of the second code according to the determined operand pattern.

It is sometimes the case that the user of an information processing system wishes to run an already existing program designed for a processor having an instruction set on a different processor having a different instruction set. For example, the user may wish to execute an existing program developed for small computers on a large-scale computer. On this occasion, if source code written in a high-level programming language is available as the existing program, the user compiles the source code using a compiler for the other processor to thereby generate an executable file for the other processor.
However, as for the existing program, sometimes its source code may be unavailable although an executable file designed for the original processor is ready for use. In that case, one conceivable approach is to translate assembly code for the original instruction set into assembly code or machine language code for the other instruction set. Assembly code is written in an assembly language, which is a low-level programming language. Instructions in assembly code correspond one-to-one with instructions in machine language code executable by a processor. A translation program for translating assembly code instructions is implemented for each pair of a translation source instruction set and a translation destination instruction set.
There is a proposed program translation apparatus for generating source code for a processor B from object code for a processor A. The proposed program translation apparatus replaces predefined instructions in the object code with intrinsic functions for the processor B.
Japanese Laid-open Patent Publication No. 2008-276735
A translation source instruction set sometimes includes combined instructions capable of representing complex operations, as typically seen in complex instruction set computer (CISC) architectures. The instruction lengths of such combined instructions may be variable. Even instructions of the same type, having the same mnemonic, may have different types of operands (parameters). The term "having different types of operands" here may cover the following cases, for example: varying in terms of the number of operands; varying in terms of the type of memory area specified by each operand; and varying in terms of the data length of the memory area specified by each operand.
On the other hand, a translation destination instruction set is sometimes formed of simple instructions capable of representing only simple operations, as typically seen in reduced instruction set computer (RISC) architectures. In translating a complex instruction set into a simple instruction set, it is sometimes difficult to represent computation equivalent to one instruction of the translation source instruction set using a single instruction of the translation destination instruction set. In that case, therefore, one instruction in original assembly code before translation may correspond to a combination of two or more instructions in the translated assembly or machine language code.
There remains a problem that implementation of a translation program for translating a complex instruction set into a simple one causes a developer intending to undertake the implementation to assume a heavy burden. The translation program, for example, analyzes not only mnemonics of instructions before translation but also operands of the instructions and outputs different combinations of translated instructions according to types of operands. Manually producing such a translation program imposes a great burden on the developer. In addition, with each expansion of the translation source instruction set, there is a need for manual modification of the translation program.

Instruction translation support method and information processing apparatus


A semiconductor package with thermally enhanced properties is described. The semiconductor package includes a substrate upon which a die is affixed. The die and the substrate each have contacts which are respectively connected with each other. A heat sink is affixed to a surface of the die by way of a thermally compliant material. The compliant material reduces the stresses caused by temperature fluctuations which cause the heat sink and the die to expand and contract at different rates. A first molding material is deposited around the periphery of the die, compliant material and heat sink, thereby leaving exposed substantially an entire surface of the heat sink.

Semiconductor device packaging techniques are well known. In conventional packaged devices, a die is attached to a substrate, and contacts of each are electrically connected. A heat sink may also be affixed to the die. The die and heat sink are then completely encapsulated, using an overmold (a heated container with a cavity), with a mold material. An example of such a conventional packaged device may be found in U.S. Pat. No. 5,901,041 (Davies et al).
Other conventional methodologies include packaging the die and then adding the heat sink, leaving it exposed. Yet other conventional approaches include taping a heat sink to internal leads of the die and encapsulating the die and heat sink.
Referring now to FIGS. 1 and 2, there is shown a conventional packaged semiconductor die assembly 10 including a substrate 22, a die 12, a heat sink 40, and a package molding 50. The substrate 22 has a first surface 24 and a second surface 26. An opening 28 extends between the surfaces 24, 26.
The die 12 has a first surface 14, a second surface 16, and one or more sides 18. The second surface 16 abuts the first surface 24 of the substrate 22. Electrical contacts 20 are located on the second surface 16 and are connected to electrical contacts 30 on the second surface 26 of the substrate 22. The contacts 20, 30 are connected by wiring 32 which may be printed or bonded.
The heat sink 40 has a first surface 42, a second surface 44, and one or more sides 46. The second surface 44 abuts the first surface 14 of the die 12. The package molding 50 completely encapsulates the die 12 and the heat sink 40. Specifically, the sides 18, 46 and the first surface 42 are covered by the package molding 50.
One problem with such conventional methodologies is that current overmold techniques generally completely encapsulate the head sink with no surface of the heat sink directly exposed as shown in FIG. 2. This reduces efficiency of the heat transfer process.
There thus exists a need for a packaged semiconductor device having a heat sink which allows greater heat transfer properties, particularly as the density of components within a die increases and heat build up becomes more of a problem.

Thermally enhanced semiconductor package


A manufacturing method of a flexible display apparatus includes forming a sacrificial layer on a carrier, forming a flexible substrate on the sacrificial layer, forming a display element on the flexible substrate, forming a first protection layer on the display element, forming, on the first protection layer, a second protection layer, which has an opposite sign of a thermal expansion coefficient to the first protection layer, separating the flexible substrate from the carrier by removing at least a portion of the sacrificial layer, and separating the first protection layer from the first protection layer.

Field
One or more embodiments relate to a manufacturing method of a flexible display apparatus to prevent cracks in an insulation layer during a manufacturing process.
Description of the Related Technology
According to increased concerns on a flexible display apparatus, research into the flexible display apparatus is actively underway. The flexible display apparatus includes a flexible substrate including an organic compound. The flexible display apparatus has characteristics, such as lightweight and shockproof, and also has advantages, such as being folded and rolled to be stored, and excellent portability.
The flexible display apparatus includes a display element formed on the flexible substrate. The display element includes, for example, an organic light-emitting device, a liquid crystal display device, or an electrophoretic display device. The flexible display apparatus realized by the organic light-emitting device is receiving more attention.
In order to manufacture the flexible display apparatus, the display element and various thin films having various functions should be easily formed on the flexible substrate, and the element and the thin films should be protected from external shocks.
However, a manufacturing method of a conventional flexible display apparatus has problems that cracks occur in previously formed insulation layers due to heat and pressure generated during a manufacturing process.

Method of manufacturing flexible display apparatus


A system for controlling an auxiliary vehicle light is described, whereby a wearable controller that may be worn on a user's head or coupled to an article of clothing located on a user's head is useful for transmitting a position and orientation of a user's head to an auxiliary vehicle light located on a surface of a vehicle. The auxiliary vehicle light may include a pivotable body capable of panning, tilting, or rolling. The wearable controller includes sensors to determine an orientation and angular displacement of a user's head. Both the auxiliary vehicle light and the wearable controller includes transceivers for wirelessly communicating with each other.

An auxiliary vehicle light is a supplemental light module that may be attachable, either fixedly or removeably, to any surface on an interior or exterior of a vehicle. In one or more embodiments, an auxiliary vehicle light may include one or more light emitting diodes (hereinafter "LED" or "LEDs"). Typically, auxiliary vehicle lights are controlled using one or more controllers that may be mounted or located inside a vehicle. Such controllers may include a user-friendly display interface, having push buttons, knobs, toggles, a touch screen, or other selectors for controlling an output function of the auxiliary vehicle lights. Usually, the controller is fixed to an interior surface of a vehicle. For example, a controller may be fixed on or near a center console or floor console of a vehicle.
Many different types of vehicles, including emergency vehicles, such as police, fire, EMS, and other emergency vehicles, as well as off-road vehicles, and others, utilize auxiliary vehicle lights during nighttime driving and in conditions where visibility may be poor, including during inclement weather and/or in locations with limited natural and artificial lighting. The added illumination provided by the auxiliary vehicle lights may greatly assist to provide increased visibility of a user's surrounding environment.

Head tracking control system for controlling an auxiliary vehicle light


This invention relates to use of the combined action of a nicotinic acetylcholine receptor agonist and a monoaminergic substance for the treatment of affective disorders, as well as to pharmaceutical compositions comprising these substances and chemical substances for use according to the invention.

Selective monoamine reuptake inhibitors, and in particular serotonin reuptake inhibitors (SSRI's), are the gold standard for treating depression. However, their most severe drawback is that while the side effects set in almost immediately, no substantial antidepressant effect will be seen within the first 2 to 4 weeks, leaving a window of vulnerability during which the patent might be non-compliant with therapy. While co-administration of fast-acting antidepressants may overcome this, it is more preferable to counteract the self-inhibitory mechanism that delays onset of SSRI effects.
There are good indications that this may be achieved by blocking certain receptors that down-regulate the discharge of serotonin as the concentration of neurotransmitter in the synaptic cleft rises. Thus WO 96/33710 (Astra) describes a combination of a 5-HT uptake inhibitor with a selective 5-HT1A antagonist, and WO 00/15217 (AstraZeneca), WO 00/15218 (AstraZeneca) and WO 00/15219 (AstraZeneca) disclose specific examples of such combinations.
Another combination involving nicotinic ligands, however for a quite different use, is disclosed in WO 00/45846 (Synthelabo). This patent publication describes the use of nicotine or a nicotinic ligand in combination with a monoamine oxidase (MAO) inhibitor for the treatment of tobacco withdrawal symptoms, which combination shows reduced cardiovascular side effects.
Finally WO 00/25783 (Carlsson & Carlsson) describes the use of a nicotinic receptor agonist in the treatment of obsessive compulsive disorder (OCD). A combination therapy and the treatment of other affective disorders are not described.

Treatment of affective disorders by the combined action of a nicotinic receptor agonist and a monoaminergic substance


An air filter element (10) has a substantially planar configuration and comprises at least two pleated filter media (12, 12′), said pleated filter media (12, 12′) being arranged side by side and attached to each other in a permanent way by a connecting member (16) connecting facing longitudinal edges (14, 14′) of said filter media (12, 12′).

Filter elements of this kind generally serve for filtration of gaseous media and are widely used as particulate air filters for removal of solid particulates such as dust, pollen etc. They may e.g. be placed in the outside air intake of a vehicles passenger compartment or may be used as combustion air filters to prevent abrasive particulate matter from entering an engine's cylinders, where the particulate matter would cause mechanical wear and possibly damage.
In practical applications, a filter element is usually placed in a filter casing, which, especially in mobile vehicles, offers very limited space. The efficiency of filter elements, on the other hand, strongly depends on the size of the surface area provided by the filter element for the passage of the medium to be filtered.
To improve filtration performance of such filter elements, the size of the surface of the filter element may be increased. With regard to the limited space provided by the respective casings, this can be achieved by an increased pleat height of the pleated filter medium.
However, when increasing the pleat height, pleat stability may be a problem when a certain pleat height is exceeded, the stability of the pleats depending also on the width of the filter element, i.e. on the length of the folding edges of the pleats. In other words, it is difficult to provide a filter element with has both a considerable pleat height and element width, as in such filter elements, the pleats tend to collapse due to their own weight and/or due to the flux of the gaseous medium that needs to be filtered. Thus, the passage for the medium to be filtered may become at least partially obstructed, increasing overall flow resistance and thereby decreasing efficiency of the filter element. As the stability of the pleats depends on the stiffness of the material of the filter medium used, this problem is particularly relevant when using filter media having a comparatively low stiffness, such as non-woven filter media.


An image sensor includes at least one photoelectric conversion device formed in a silicon substrate, at least one lens formed on one side of the photoelectric conversion device and configured to collect light, a dielectric layer formed on the other side of the photoelectric conversion device and a reflective pattern formed on the dielectric layer. The reflective pattern serves as an electrical circuit interconnection and is configured to reflect the light passing through the dielectric layer such that the light is absorbed to the silicon substrate again.

1. Technical Field
The present disclosure relates to image sensors and to methods of fabricating the same. More particularly, the present disclosure relates to rear light-receiving type image sensors, having improved optical sensitivity and to methods of fabricating the same.
2. Description of Related Art
In general, image sensors are semiconductor devices that convert incident light into an electrical signal. These image sensors may be roughly classified into charge coupled devices (CCDs) and complementary metal oxide semiconductor (CMOS) image sensors. Among them, the CMOS image sensors convert an electric charge into a voltage in each unit pixel, and output a signal from a signal line by a switching operation.
In general, the CMOS image sensors are each composed of a photo sensing part for sensing light and a CMOS logic circuit part for processing the sensed light into an electrical signal and converting the electrical signal into data. To enhance the photo sensitivity, an effort is being made to increase a percentage which an area of the photo sensing part accounts for of the total area of the image sensor. However, as the logic circuit part is not fundamentally removed, this effort has been subject to definite limitations.
Thus, additional efforts are being made to enhance the photo sensitivity of the above-mentioned CMOS image sensors. One of the efforts is a light collecting technique, which converts a path of the light incident on other regions than the photo sensing part and collects the light on the photo sensing part. Among them, one is designed to form a micro-lens on a color filter. However, this method of enhancing the photo sensitivity using the light collecting technique may nevertheless have a certain degree of limitations in enhancing the photo sensitivity as the image sensors are still more highly integrated.

Image sensor having reflective metal lines under photoelectric conversion devices


A rolling shutter for wall or roof openings, especially in connection with a turnable roof window comprises a rolling shutter web composed of a plurality of rolling shutter elements pullable from one another for forming light gaps, a rolling shutter shaft for winding and unwinding of the rolling shutter web, supports for rotatably supporting the rolling shutter web, two parallel side walls connected with the supports for guiding lateral ends of the rolling shutter webs, an actuating device having a mechanism for an opening movement of the rolling shutter web and a pulling device engaging a free front end of the rolling shutter web and supporting or performing its closing movement, the rolling shutter elements including a front rolling shutter element and a rear rolling shutter element, a pulling rope connecting the front rolling shutter element and the rear shutter element, the pulling rope being fixedly connected with the rear rolling shutter element and being connected with the front rolling shutter element by menas of a spring provided for closing of the light gaps, the spring having a force selected so that during starting an opening movement of the rolling shutter web at least the light gaps located between the front and rear rolling shutter elements are opened under the action of the pulling device and then the rolling shutter web is wound in an opening direction.

The present invention relates to a rolling shutter for wall or roof openings, especially in connection with a turnable roof window. More particularly, it relates to such a rolling shutter which has a rolling shutter web composed of a plurality of rolling shutter bars movable from one another to form light gaps, a rolling shaft for winding an unwinding the rolling shutter webs, supports for rotatably supporting the rolling shutter shaft, two parallel side parts connected with the supports and used for guiding the lateral ends of the rolling shutter web, and an actuating device. The latter includes a mechanism for performing the opening movement of the rolling shutter web, and a pulling device engaging the free front end of the rolling shutter web and performing or contributing to its closing movement.
Rolling shutters for roof windows or the like are known in many various embodiments. They serve mainly for closing of roof windows mounted in inclined roof surfaces and including blind frames fixedly mounted in the roof and a window blade turnable or tiltable mainly about a horizontal axis. Such roof windows are usually identified as roof residence window, roof surface window or the like.
In a known rolling shutter of the above mentioned general type, disclosed for example in the German documents DE-OS 2,906,871 and 2,906,913, the pulling device serves the purpose of activating or supporting the closing movement of the rolling shutter for the case when the side parts are arranged not vertically or at least not with such inclination that the rolling shutter web during release of the opening mechanism runs itself to the closing position due to its force of gravity. The pulling device is formed as a special rolling spring. In another known rolling shutter of the above mentioned type disclosed for example in German document DE-GM 8,505,823, the pulling device is formed as a pulling cable which is provided additionally to a pulling cable which forms the opening mechanism, so that by pulling of one of the two pulling cables an opening movement or a closing movement can be performed. Similar devices are also disclosed in other variants for example in the German documents DE-OS 2,802,078; 2,742,787 and 3,507,015.
For all these constructions of the rolling shutters it is common that they cannot provide sufficient safety in that during closing of the rolling shutter the light gaps located between the individual rolling shutters bars, lamellas or the like, are closed. This is true especially when the pulling device engages at the frontmost rolling shutter bar and the rolling shutter must be closed with partially open, approximately horizontal or upwardly inclined window blade. Regardless of this, the known rolling shutters have the tendency to press the closed rolling shutters bars o lamellas from one another in the event of moist frost or snow, thereby ice and snow can accumulate in the light gaps and cause damages to the rolling shutter web. Moreover, the conventionally utilized rolling shutter webs in the case of glaciation or dirtying of the guides provided in the side parts have the tendency of canting laterally, which can also cause damages to the rolling shutter webs.

Rolling shutter for wall or roof openings, especially in connection with turnable roof window


Disclosed is an optical communication system which uses the self-pulsating frequency of a self-pulsating laser diode as a microwave subcarrier to transmit digital information. The system has a transmitter comprising a self-pulsating laser diode and a modulating mechanism for encoding the laser's self-pulsating microwave sub-carrier. In one embodiment, the modulating mechanism employs frequency-shift keying for digitally encoding the sub-carrier. Furthermore, the optical communication system has a receiver including a photodetector and a signal decoder.

Local area networks consisting of a number of personal computers, utilize electronic means, including wire connections to transmit information from one station to another. While transmission of data through optical fibers is preferable to electronic transmissions, optical communication systems (OCS) are presently too costly to Justify their use in local area networks. The cost is prohibitive because the lasers and the modulation hardware used in these systems is expensive.
The transmission of data through fiber-optic cables is preferable because they can transmit signals with a bandwidth of several gigahertz over distances of several of tens or hundreds of kilometers (depending on the power of the signal) with losses of fractional decibels per kilometer. Compared with coaxial cables, which are dispersive (different frequencies travel at different speeds, and with different amounts of loss, thereby corrupting waveforms), fiber-optic cables can be designed so that dispersion is negligible. Also, unlike ordinary cables, they do not act as antennas for radio interference or impulsive noise. They are lighter, safer, and more rugged than conventional cables, and they are potentially less expensive.
Prior transmitters used in OCSs, have not included the self-pulsating laser diodes (SPLD) because it does not generate a signal of sufficient power for use in long-distance OCSs. Moreover, the SPLD generates both an optical frequency and a self-pulsating sub-carrier frequency, the latter of which has been considered detrimental to SPLD's performance. Many researchers have concentrated their efforts on removing, or working around the self-pulsating frequency. The lasers used in prior art OCSs do not generate the self-pulsation.

Method and apparatus for modulation of self-pulsating diode laser's self-pulsating frequency


A method for processing a rubber mixture or compound for tire manufacturing includes the steps of determining variation tolerances with respect to reference values for process parameters, detecting values of the process parameters, comparing detected values of the process parameters with the reference values and the variation tolerances, attributing an evaluation to a semi-finished product depending on compliance or noncompliance of the detected values with the reference values and the variation tolerances, classifying the semi-finished product on a basis of the attributed evaluation, and establishing successive steps for processing the semi-finished product depending on the classification of the semi-finished product. The processing includes at least a mixing cycle and an extrusion cycle for obtaining the semi-finished product. The cycles are controlled by the process parameters detected during execution of the cycles.

1. Field of the Invention
The present invention relates to a method for processing mixtures and compounds made from rubber and various ingredients, used to obtain tires and components thereof such as tread bands and the like: the invention is especially advantageous when used in connection with the production of rubber compounds reinforced with silica.
More particularly, the compounds which may be prepared with the method according to said invention are those of the type comprising a polymeric base having an unsaturated chain that can be crosslinked with sulphur in hot conditions, added to at least one silica filler and a silica bonding agent containing at least one sulphur atom.
The polymeric base may be any polymer or mixture of polymers, non-crosslinked, of natural or synthetic type, able to assume all the chemical/physical and mechanical features of elastomers after suitable crosslinking.
2. Description of the Related Art
European patent application No. 99.830189.9, in the name of the Applicant of the present invention, discloses a method for producing the abovementioned compounds including at least a first operating step intended for mixing the various basic ingredients so as to obtain a mixture.
This step is performed in a closed discontinuous mixer, i.e. a known device which basically comprises a container internally housing a pair of rotors turning in opposite directions, so as to mix up the ingredients introduced into the container from the top thereof.
For this purpose, said device is provided with a pneumatic cylinder located in the upper part of the container and a piston movable upwards to open the container, thereby allowing the introduction of the ingredients via special loading hoppers, and downwards so as to exert a pressure on the material processed by the rotors and located above them.
A pneumatic system located on the bottom of the container allows discharging of the mixture at the end of the mixing cycle by opening a suitable outlet.
As mentioned above, the devices likes the one described above are well known in the art: they are indeed referred to as xe2x80x9cBanbury(copyright)xe2x80x9d or xe2x80x9cIntermix(copyright)xe2x80x9d, depending on whether the rotors operate tangentially relative to each other or are inter-penetrating.
Hereinbelow the material processed during the various operating steps will be indicated by the term xe2x80x9cmixturexe2x80x9d in order to distinguish it from the xe2x80x9ccompoundxe2x80x9d, which is instead the product obtained by adding the vulcanizing system to the mixture.
The method claimed in the abovementioned patent application is aimed at providing substantially constant characteristics for those compounds having identical composition, but being produced discontinuously in separate batches, namely with the new charging of basic ingredients into the mixer after it has been emptied of the previous contents.
Indeed, not infrequently it happens that in the known processing methods, the final compounds produced from successive batches have physical and mechanical properties which are also significantly different from each other, despite being produced from the same basic ingredients and using the same recipes.
For this purpose, in the prior method there are defined at least two indirect process parameters, for example the power applied to the pair of opposing rotors and the temperature of the mixture processed by them, together with at least two direct parameters such as the speed of the rotors and the pressure exerted by the piston of the discontinuous mixer.
Thereafter, in order to obtain the desired result, the method according to the aforementioned application suggests to periodically detect one or both of the indirect parameters and, if necessary, to correct their progression over time, by varying one or both of the direct parameters.
This operating method allows to achieve the object of producing in a repeatable manner, compounds with constant characteristics or in any case that fall within a predefined range of variation.
However, this method relates only to the operating steps which occur within the discontinuous mixer and does not analyse the manufacturing process of the mixtures as a whole; in other words, the method described in European patent application No. 99.830189.9 does not analyse the consequences brought by the non-compliance with the predefined limit values for the (direct and indirect) mixing process parameters, on the other steps of the mixture and compounds processing cycle (for example on additional steps involving mixing with other mixtures in order to obtain the so-called xe2x80x9cblendsxe2x80x9d, on vulcanization, etc.).
For instance, reference should be made to the case where malfunctioning of a machine or human error could result in the temperature of the mixture or the power used by the rotors at a given instant, deviating from the predefined values: what are the consequences and what steps may be taken in order to remedy this situation?
It should be noted that the answer to said questions is of considerable importance because, as will be seen, it avoids the production of large quantities of material which must then be discarded at the end of the manufacturing process, together with all the negative consequences arising therefrom.
The object of the present invention is therefore to solve this problem by providing a method for processing mixtures and rubber compounds, whereby it is possible to operate immediately on line in order to correct or limit the negative consequences arising from fluctuations of the process parameters, beyond the predefined tolerance limits.
The invention comes from Applicant""s perception that the operating steps which make up the cycle for processing of the mixtures and compounds are of varying importance for obtaining the desired features in the end product.
Consequently, in accordance with the present invention, a processing method has been developed whereby at first reference values with associated deviation tolerances for the process parameters, during one or more operating steps, are defined.
These parameters may be the energy used by the rotors, the temperature of the mixture and the duration of mixing within the mixer or, downstream of the latter, the duration of the cycle for extraction of the semi-finished product in sheet form (hereafter also referred to in short as xe2x80x9cextrusionxe2x80x9d), as well as any other parameter according to the circumstances.
Thereafter, coefficients indicating the weight (or importance) of compliance with the tolerances, in order to achieve the desired final characteristics in a given compound, are assigned.
Throughout the manufacturing process, the aforementioned process parameters are measured for each batch and respective evaluation coefficients are attributed, depending on the values measured; finally, the coefficients attributed are added together and, on the basis of the result obtained, a classification of the semi-finished products obtained with the various batches of material is determined.
This classification provides a qualitative evaluation of the semi-finished product and, on the basis thereof, it becomes possible to operate directly along the production line in order to prevent any defective mixtures or compounds from causing damage to subsequent production.
For instance it could be considered the case where a mixture to be discarded is mixed together with other defect-free mixtures, thereby adversely affecting the xe2x80x9cblendxe2x80x9d obtained: this might require to discard large quantities of the material produced.
In particular, the method according to the invention is specifically used for the production of silica-reinforced compounds which comprise the following ingredients in variable quantities, per hundred parts by weight of polymeric base (phr), between the following limits:
In accordance with this aspect of the invention, the tolerance ranges of the process parameters are predefined for each type of compound to be produced.

Processing method of a mixture for tire rubber compound