A technique improving performance and lifetime of indirectly heated cathode ion sources is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for improving performance and lifetime of an indirectly heated cathode (IHC) ion source in an ion implanter. The method may comprise maintaining an arc chamber of the IHC ion source under vacuum during a maintenance of the ion implanter, wherein no gas is supplied to the arc chamber. The method may also comprise heating a cathode of the IHC ion source by supplying a filament with a current. The method may further comprise biasing the cathode with respect to the filament at a current level of 0.5-5 A without biasing the arc chamber with respect to the cathode. The method additionally comprise keeping a source magnet from producing a magnetic field inside the arc chamber.

Ion implantation is a process of depositing chemical species into a substrate by direct bombardment of the substrate with energized ions. In semiconductor manufacturing, ion implanters are used primarily for doping processes that alter the type and level of conductivity of target materials. A precise doping profile in an integrated circuit (IC) substrate and its thin-film structure is often crucial for proper IC performance. To achieve a desired doping profile, one or more ion species may be implanted in different doses and at different energy levels.
FIG. 1 depicts a prior art ion implanter system 100. As is typical for most ion implanter systems, the system 100 is housed in a high-vacuum environment. The ion implanter system 100 may comprise an ion source 102 and a complex series of components through which an ion beam 10 passes. The series of components may include, for example, an extraction manipulator 104, a filter magnet 106, an acceleration or deceleration column 108, an analyzer magnet 110, a rotating mass slit 112, a scanner 114, and a corrector magnet 116. Much like a series of optical lenses that manipulate a light beam, the ion implanter components can filter and focus the ion beam 10 before steering it towards a target wafer 120 (located in a wafer plane 12). A number of measurement devices, such as a dose control Faraday cup 118, a traveling Faraday cup 124, and a setup Faraday cup 122, may be used to monitor and control the ion beam conditions.
Indirectly heated cathode (IHC) ion sources are typically used in high current ion implantation equipment. FIG. 2 shows a typical IHC ion source 200 in an ion implanter. The ion source 200 comprises an arc chamber 202 with conductive chamber walls 214. At one end of the arc chamber 202 there is a cathode 206 having a tungsten filament 204 located therein. The tungsten filament 204 is coupled to a first power supply 208 capable of supplying a high current. The high current may heat the tungsten filament 204 to cause thermionic emission of electrons. A second power supply 210 may bias the cathode 206 at a much higher potential than the tungsten filament 204 to cause the emitted electrons to accelerate to the cathode and so heat up the cathode 206. The heated cathode 206 may then emit electrons into the arc chamber 202. A third power supply 212 may bias the chamber walls 214 with respect to the cathode 206 so that the electrons are accelerated at a high energy into the arc chamber. A source magnet (not shown) may create a magnetic field B inside the arc chamber 202 to confine the energetic electrons, and a repeller 216 at the other end of the arc chamber 202 may be biased at a same or similar potential as the cathode 206 to repel the energetic electrons. A gas source 218 may supply a reactive species (e.g., GeF4) into the arc chamber 202. The energetic electrons may interact with the reactive species to produce a plasma 20. An extraction electrode (not shown) may then extract ions 22 from the plasma 20 for use in the ion implanter.
A common cause of failure for IHC ion sources is that some materials accumulate on cathode surfaces during extended ion implantation processes. The deposited materials tend to reduce a thermionic emission rate of source ions from the cathode surfaces. Consequently, desired arc currents cannot be obtained and IHC ion sources may have to be replaced in order to maintain normal source operation. The performance degradation and short lifetime of IHC ion sources greatly reduce the productivity of ion implanters.
The above-described problems are especially significant for, but are not limited to, germanium ion implantation. Germanium ion implants have been widely used in the semiconductor industry to pre-amorphize silicon wafers in order to prevent channeling effects. The demand for these pre-amorphizing implants is expected to increase greatly in future semiconductor device manufacturing. One of the most popular source gases for germanium ion beams is germanium fluoride (GeF4) due to its stable chemical properties and cost-effectiveness. However, very short lifetimes of IHC ion sources have been observed while operating with GeF4 gas.
The short lifetime of an IHC ion source used in GeF4 ion implantation may be attributed to excessive, free fluorine atoms in the arc chamber as a result of chemical dissociation of GeF4 molecules. Specifically, arc chamber material may be etched away in chemical reactions with the fluorine atoms, and then some of the arc chamber material may eventually deposit on the cathode resulting in the degradation of electron emissions from the cathode surface.
Other source gases, such as boron fluoride (BF3) and phosphorous fluoride (PH3), may be employed in ion implantation and may cause similar lifetime shortening of IHC ion sources by the stripping (sputtering) of cathode material.
In view of the foregoing, it would be desirable to provide a solution for improving the performance and extending the lifetime of IHC ion sources which overcomes the above-described inadequacies and shortcomings.

Technique for improving performance and extending lifetime of indirectly heated cathode ion source

Varian Semiconductor Equipment Associates, Inc.


A vertical bipolar transistor having low breakdown voltage, low ESD clamping voltage and high beta is fabricated in a semiconductor 301 of a first conductivity type, which has a buried layer 360 of the opposite conductivity type with sharp junctions, suitable as collector. This layer extends laterally to deep wells 371 of the opposite conductivity type, thus isolating the subsurface band 301a of the semiconductor of the first conductivity type. This band is suitable as the base and has a width 301c controlled by the proximity of the buried layer junction 360a. The emitter 310 is supplied by a surface region of the opposite conductivity type.

The present invention is related in general to the field of electronic systems and semiconductor devices, and more specifically to structure and fabrication method of a buried n-type layer, resulting in a vertical bipolar transistor with low breakdown voltage and high beta capable of improving ESD protection.
Integrated circuits (ICs) may be severely damaged by electrostatic discharge (ESD) events. A major source of ESD exposure to ICs is from the charged human body (xe2x80x9cHuman Body Modelxe2x80x9d, HBM); the discharge of the human body generates peak currents of several amperes to the IC for about 100 ns. A second source of ESD is from metallic objects (xe2x80x9cmachine modelxe2x80x9d, MM); it can generate transients with significantly higher rise times than the HBM ESD source. A third source is described by the xe2x80x9ccharged device modelxe2x80x9d (CDM), in which the IC itself becomes charged and discharges to ground in the opposite direction than the HBM and MM ESD sources. More detail on ESD phenomena and approaches for protection in ICs can be found in A. Amerasekera and C. Duvvury, xe2x80x9cESD in Silicon Integrated Circuitsxe2x80x9d (John Wiley and Sons LTD. London 1995), and C. Duvvury, xe2x80x9cESD: Design for IC Chip Quality and Reliabilityxe2x80x9d (Int. Symp. Quality in El. Designs, 2000, pp. 251-259; references of recent literature).
ESD phenomena in ICs are growing in importance as the demand for higher operating speed, smaller operating voltages, higher packing density and reduced cost drives a reduction of all device dimensions. This generally implies thinner dielectric layers, higher doping levels with more abrupt doping transitions, and higher electric fieldsxe2x80x94all factors that contribute to an increased sensitivity to damaging ESD events.
The most common protection schemes used in metal-oxide-semiconductor (MOS) ICs rely on the parasitic bipolar transistor associated with an NMOS device whose drain is connected to the pin to be protected and whose source is tied to ground. The protection level or failure threshold can be set by varying the NMOS device width from the drain to the source under the gate oxide of the NMOS device. Under stress conditions, the dominant current conduction path between the protected pin and ground involves the parasitic bipolar transistor of that NMOS device. This parasitic bipolar transistor operates in the snapback region under pin positive with respect to ground stress events.
The dominant failure mechanism, found in the NMOS protection device operating as a parasitic bipolar transistor in snapback conditions, is the onset of second breakdown. Second breakdown is a phenomenon that induces thermal runaway in the device wherever the reduction of the impact ionization current is offset by the thermal generation of carriers. Second breakdown is initiated in a device under stress as a result of self-heating. The peak NMOS device temperature, at which second breakdown is initiated, is known to increase with the stress current level.
Many circuits have been proposed and implemented for protecting ICs from ESD. One method that is used to improve ESD protection for ICs is biasing the substrate of ESD protection circuits on an IC. Such substrate biasing can be effective at improving the response of a multi-finger MOS transistor that is used to conduct an ESD discharge to ground. However, substrate biasing can cause the threshold voltages for devices to change from their nominal values, which may affect device operation. In addition, substrate biasing under steady-state conditions causes heat generation and increases power losses.
Solutions offered in known technology require additional IC elements, silicon real estate, and/or process steps (especially photomask alignment steps). Their fabrication is, therefore, expensive. Examples of device structures and methods are described in U.S. Pat. No. 5,539,233, issued Jul. 23, 1996 (Amerasekera et al., xe2x80x9cControlled Low Collector Breakdown Voltage Vertical Transistor for ESD Protection Circuitsxe2x80x9d); U.S. Pat. No. 5,793,083, issued Aug. 11, 1998 (Amerasekera et al., xe2x80x9cMethod for Designing Shallow Junction, Salicided NMOS Transistors with Decreased Electrostatic Discharge Sensitivityxe2x80x9d); U.S. Pat. No. 5,940,258, issued Aug. 17, 1999 (Duvvury, xe2x80x9cSemiconductor ESD Protection Circuitxe2x80x9d); U.S. Pat. No. 6,137,144, issued Oct. 24, 2000, and U.S. Pat. No. 6,143,594, issued Nov. 7, 2000 (Tsao et al, xe2x80x9cOn-Chip ESD Protection in Dual Voltage CMOS); and U.S. patent application Ser. No. 09/456,036, filed Dec. 3, 1999 (Amerasekera et al., xe2x80x9cElectrostatic Discharge Device and Methodxe2x80x9d).
The influence of substrate well profiles on the device ESD performance is investigated, for instance, in xe2x80x9cInfluence of Well Profile and Gate Length on the ESD Performance of a Fully Silicided 0.25 xcexcm CMOS Technologyxe2x80x9d (K. Bock, C. Russ, G. Badenes, G. Groeseneken and L. Deferm, Proc. EOS/ESD Symp., 1997, pp. 308-315). However, known technology recommends only a lower epitaxial doping or a lower implant dose as methods to increase the p-well resistance.
The challenge of cost reduction implies a drive for minimizing the number of process steps, especially a minimum number of photomask steps, and the application of standardized process conditions wherever possible. Furthermore, the silicon area consumed by ESD protection devices should be kept to a minimum. An urgent need has, therefore, arisen for a coherent, low-cost method of enhancing ESD insensitivity without the need for additional, real-estate consuming protection devices. The device structure should further provide excellent electrical performance, mechanical stability and high reliability. The fabrication method should be simple, yet flexible enough for different semiconductor product families and a wide spectrum of design and process variations. Preferably, these innovations should be accomplished without extending production cycle time, and using the installed equipment, so that no investment in new manufacturing machines is needed.
A vertical bipolar transistor is described having low breakdown voltage, low ESD clamping voltage and high beta. The transistor is fabricated in a semiconductor of a first conductivity type, which has a buried layer of the opposite conductivity type with sharp junctions, suitable as collector. This layer extends laterally to deep wells of the opposite conductivity type, thus isolating the subsurface band of the semiconductor of the first conductivity type. This band is suitable as the base and has a width controlled by the proximity of the buried layer junction. The emitter is supplied by a surface region of the opposite conductivity type.
The buried layer extends vertically from the surface beginning at a level more shallow than the depth of the dielectric isolation zone, which surrounds the transistor at least in part. The layer extends to a depth greater than the depth of this dielectric zone, thereby electrically isolating the base and emitter of the vertical transistor.
It is an essential aspect of the invention to use the photomask step, which is needed for implanting the low energy ions in order to create the extended emitter, for the additional process step of implanting at high energy and high dose the ions needed (opposite conductivity type) to create the buried layer. This economical feature renders the additional high-energy ion implant step and thus the formation of an electrically isolated high-voltage I/O transistor exceedingly inexpensive.
Another aspect of the invention is that an additional implant step of ions of the fist conductivity type, also of high energy, but low dose, may be added for the same photomask window in order to carefully control location, peak and depth of the buried layer. This feature provides precise control of the transistor base width and thus beta.
Another aspect of the invention is that the high energy/high dose ion implant step transforms the electrically isolated band of the first conductivity type into a region of higher resistivity compared to the remainder of the semiconductor material of the first conductivity type.
The present invention is equally applicable to nMOS and pMOS transistors; the conductivity types of the semiconductor and the ion implant types are simply reversed.
The technical advances represented by the invention, as well as the aspects thereof, will become apparent from the following description of the preferred embodiments of the invention, when considered in conjunction with the accompanying drawings and the novel features set forth in the appended claims.

ESD improvement by a vertical bipolar transistor with low breakdown voltage and high beta

Abstract: The photomask, which is needed for implanting the low energy ions to create the extended emitter, is also used for the process step of implanting, at high energy and high dose, the ions needed (opposite conductivity type) to create the buried layer. This economical feature renders the additional high-energy ion implant step and thus the formation of an electrically isolated high-voltage I/O transistor exceedingly inexpensive.


Systems, devices, media, and methods are presented for producing an augmented reality (AR) experience for display on a smart eyewear device. The AR production system includes a marker registration utility for setting and storing markers, a localization utility for locating the eyewear device relative to a marker location and to the mapped environment, and a virtual object rendering utility to presenting one or more virtual objects having a desired size, shape, and orientation. A high-definition camera captures an input image of the environment. If the input image includes a marker, the system retrieves from memory a set of data including a first marker location expressed in terms relative to a marker coordinate system. The localization utility determines a local position of the eyewear device relative to the marker location. The virtual object rendering utility prepares one or more virtual objects for display based on the eyewear location, the head pose of the wearer, and the location of one or more physical object landmarks in the environment.

Many types of computers and electronic devices available today, such as mobile devices (e.g., smartphones, tablets, and laptops), handheld devices (e.g., smart rings, special-purpose accessories), and wearable devices (e.g., smartglasses, digital eyewear, headwear, headgear, and head-mounted displays), include a variety of cameras, sensors, wireless transceivers, input systems (e.g., touch-sensitive surfaces, pointers), peripheral devices, displays, and graphical user interfaces (GUIs) through which a user can interact with displayed content.
Augmented reality (AR) combines real objects in a physical environment with virtual objects. The combined display gives the impression that the virtual objects are authentically present in the environment, especially when the virtual objects appear and behave like the real objects.


An acoustic wave device that has a better TCF and can improve a resonator Q or impedance ratio is provided. The acoustic wave device includes a substrate 11 containing 70 mass % or greater of silicon dioxide (SiO2), a piezoelectric thin film 12 including LiTaO3 crystal or LiNbO3 crystal and disposed on the substrate 11, and an interdigital transducer electrode 13 disposed in contact with the piezoelectric thin film 12.

In recent years, mobile phones and smartphones have become popular and as many bands as almost fifty have congested at 2.4 GHz or lower such that adjacent bands are very narrowly distanced. Accordingly, there is an intense need for filters and duplexers having steep frequency characteristics and better temperature characteristics in order for the adjacent band not to interfere with each other. Further, there is a need for resonators having greater impedance ratios and higher Qs to realize such filters and duplexers having steep frequency characteristics. Here, Q, which is a parameter indicating the steepness of a filter, is not only effective on the steepness but also on the insertion loss of the filter. The higher the Q becomes, the less the insertion loss may become and the battery consumption for mobile phones and smartphones may be reduced. Therefore, such filters are required to have better insertion loss, better temperature characteristics and greater steepness, and the resonators thereof are required to have higher Qs and greater impedance ratios. It is to be appreciated that the values of Qs are proportional to the impedance ratios and are inversely proportional to the bandwidths such that, in a case where the bandwidths are substantially the same, the Q and the impedance ratio are in an proportional relationship.
The bandwidth of a surface acoustic wave (SAW) filter depends on the electromechanical coupling coefficient (coupling factor) of a piezoelectric substrate used in the SAW filter. Accordingly, greater number of piezoelectric substrates, each of which is formed of an LT (LiTaO3 crystal) or an LN (LiNbO3 crystal) having a coupling factor required for the bandwidth of the filter, have been conventionally used. However, these substrates may have thermal coefficient of frequencies (TCFs) ranging from −40 ppm/° C. to −120 ppm/° C., which may not be regarded as favorable. It is to be appreciated that a theoretical formula for a thermal coefficient of frequency (TCF) can be defined as follows:
                              TCF          =                                                    (                                                      V                                                              (                                              35                                                °                                                                                C                          .                                                                    )                                                                                V                                                              (                                              15                                                °                                                                                C                          .                                                                    )                                                                      )                                            20                ×                                  (                                      V                                                              (                                              25                                                °                                                                                C                          .                                                                    )                                                        )                                                      -            α                                                                                where                                                                          α                    =                      linear                                                                          expansion                                                                          coefficient                                              [                  Math          .                                                    1                ]            and V(T) is an excitation phase velocity. Further, an actual measurement may indicate TCF=(f(45° C.)−f(25° C.))/(20×f(25° C.)), where f(T) is a measured frequency, and a resonant frequency and/or anti-resonant frequency can be measured for a resonator whereas a center frequency can be measured for a filter. It is to be appreciated that, if a frequency is actually measured but does not linearly changed, then a maximum frequency variation within the measured temperature range can be divided by the measured temperature range to obtain a frequency variation per degree.
Thus, in order to obtain a required coupling factor and a better TCF, the present inventors and the like have developed a surface acoustic filter that is manufactured by firstly combining an LT/LN substrate having a negatives TCF with an SiO2 thin film having a positive TCF to form a SiO2 thin film/high-density electrode/LT or LN substrate structure and then removing protrusions on the SiO2 thin film originated from the electrode to planarize the surface (for example, see Non-Patent Literature 1). This structure may result in a TCF of −10 ppm/° C., which is relatively better, and further a characteristic such as an impedance ratio and a Q that is the same as that of a single LT/LN substrate. The impedance ratio and the Q of this resonator may be around 60 dB and 800 respectively.
It is to be appreciated that a quartz substrate has a better thermal coefficient of frequency; however, its coupling factor, which indicates piezoelectric nature, can be smaller and would not satisfy the bandwidth requirement of the filter necessary to a smartphone or mobile phone. Further, according to a filter using a bulk wave of an AlN (aluminum nitride) film, the Q of the resonator can be 2000, which may be steeper in the filter characteristic as compared with a SAW filter, whereas the thermal coefficient of frequency can be −30 ppm/° C., which may not be so favorable.


A system is disclosed for removing disposable needles from syringes, which requires only one hand to operate and which exposes the user to minimal risk of contact with the contaminated needle. The user inserts the syringe and presses downwardly, whereupon disconnecting gears engaging the collar of the needle unscrew the needle and allow it to drop into a container. Return springs then automatically return the device to its original configuration.

Each day, staggering quantities of disposable needles are used in hospitals, clinics, and physicians' offices. Many such needles are attached to syringes which are not discarded with the needles. For example, a syringe of the type sold under the trademark VACUUTAINER is used by securing a double needle to a needle retainer by screwing a threaded collar on the needle into a threaded opening in the end of the needle retainer. After the needle point outside the needle retainer is inserted into the patient's vein, a partially evacuated sample tube is forced onto the other needle point inside the retainer, and blood is sucked into the sample tube. The sample tube is removed and sent for analysis of its contents, and the needle retainer may be reused. Therefore, medical personnel typically remove the needle by unscrewing it, and place the needle in an approved disposal container.
Other types of syringes also use disposable needles with non-disposal suction devices. The needles may be connected by threaded screw connectors, luer locks, or the like. Disposable needles are typically fitted with plastic collars which have flange-like projections suitable for grasping with the fingers when twisting the needle into or out of the needle retaining portion of a syringe.
Personnel at hospitals and other medical facilities face a growing problem of safe disposal of needles because of the rise of diseases carried by the blood and other bodily fluids, such as AIDS. Manipulation of needle connectors after use can present a grave risk of being pricked by the exposed, contaminated needle. Attempts to insert the needle back into the protective sleeve provided for shipment create a similar risk. Past efforts to assist personnel in removing needles have reduced the danger somewhat, but have resulted in devices that are inconvenient to use. One such device is simply a container having a tapering slot in the top. The user holds the needle retainer, inserts the needle into the slot until the flanges of the collar are even with the slot, moves the needle into the smaller end of the slot until the flanges engage the slot, and twists the needle retainer to unscrew or unlock the needle, which falls into the container. This procedure has significant disadvantages. The user must position the needle carefully and supply the force necessary to rotate the needle retainer. Usually, the user must use two hands for the operation, one to steady the container, and one to manipulate the syringe and needle. This often results in the user laying down the used syringe for a time until both hands are available for removing the needle, rather than immediately placing the needle into a safe container. These disadvantages increase the opportunity and risk that a person will come into contact with the contaminated needle.
Thus, a need exists in the art for a needle removal system which can remove the disposable needle from the syringe with minimal non-precise manipulation of the needle and syringe using only one hand.

Apparatus and method for safely removing needles from syringes


In order to provide a drier module for a drier for a coating plant, in particular for a coating plant for vehicle bodies, wherein the drier comprises a drier working space for receiving the objects to be dried, which space is bounded by a drier floor, a drier ceiling and lateral boundary walls, which reduces the transport costs for transporting the drier components from the production site to the erection site, it is proposed that the drier module comprise at least one section of a lateral boundary wall of the drier working space and one section of the drier floor and/or one section of the drier ceiling, wherein the drier floor section and/or the drier ceiling section are/is connected to the boundary wall section so as to be pivotable relative to the boundary wall section.

A drier of this kind is known from DE 201 04 205 U1, for example.
Known driers of this kind are assembled at the erection site of the drier from drier segments which are of the full cross section of the drier and are assembled at a production site remote from the erection site of the drier. The transport of these drier segments from the production site to the erection site of the drier entails considerable transport costs.


An electricity-storage system 110a is configured to be able to charge and discharge by connecting a plug to an electrical outlet 140a. Power discharged from the electricity-storage system 110a is monitored by a reverse-power monitoring device 100 and discharge from the electricity-storage system 110a is executed according to instruction from the reverse-power monitoring device 100, in order to avoid reverse power flow to an electrical grid 150.

In recent years, power is being generated from a variety of energy sources such as thermal, hydro, wind, and solar energy sources. However, power shortages do occur for reasons such as resource insufficiency and difficulty in ensuring a stable supply. Thus, apartments, factories, etc., may be provided with batteries to be prepared for emergencies such as power shortage or stoppage.
Patent Literature 1 discloses a power supply system able to supply more power to a load when a power stoppage occurs. Further, Patent Literature 2 discloses a technique of supplying power by connecting a power generator such as a solar cell to an electrical outlet. Further, Patent Literature 3 discloses a reverse-tidal-current-preventing systematically interconnecting system that, in a power supply system, prevents adverse effects to a load from reverse power flow and ensures rapidity of resumed operation of a power system after power stoppage.

Electricity-storage system, monitoring device, and power control system

PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.


In a semiconductor apparatus of the present invention, a plurality of circuit components are provided. A first bus interconnects the circuit components. A second bus interconnects the circuit components. A switching unit outputs a select signal that causes each circuit component to select one of the first bus and the second bus when transmitting a signal from one of the circuit components to another. The second bus has a size larger than a size of the first bus.

1. Field of the Invention
The present invention generally relates to a semiconductor apparatus, and more particularly to a semiconductor apparatus having a large-size bus connection (super connection) which attention is currently focused on.
2. Description of the Related Art
A large-size bus connection (supper connection) is a wiring technology that employs a large-size bus wiring layer having a comparatively large width in a range of 5 xcexcm to 10 xcexcm. The large-size bus connection is expected to make it possible to provide a high-speed operation of semiconductor apparatus with low power consumption.
The large-size bus connection has the following advantages over a normal-size bus connection that is formed in a conventional semiconductor apparatus through micromachining:
1) it provides a small electrical resistance because the width of the wiring layer is large,
2) it provides a small parasitic capacity because the inter-layer distance between the bulk and the insulating layer and the wiring intervals of the large-size bus connection are large, and
3) it is suited for a high-speed operation of semiconductor devices because the time constant of the large-size bus is very small.
The packaging areas of semiconductor devices have been reduced on a yearly basis, and high-density implementation methods, such as ball-grid array (BGA), have been developed. When the BGA method is used, the bumps are arrayed on the surface of a semiconductor chip. The re-wiring method is provided to connect the bumps with the integrated circuit of the semiconductor chip. The re-wiring method employs a wiring layer including a pattern of wiring on the resin layer, such as polyimide resin, which is provided on the chip surface. The wiring layer, used in the re-wiring method, has a relatively large width, and it may be considered the large-size bus connection.
Further, a multi-chip semiconductor apparatus in which a logic device and a memory device coexist is known. For example, in the multi-chip semiconductor apparatus, the memory chip is overlaid onto the logic chip, and the connection of the memory device and the logic device is established by using the large-size bus wiring layer in the rewiring method, such as the bumps or the like. The large-size bus connection is provided to connect together the I/O (input/output) devices of the two chips.
Each of the logic chip and the memory chip includes a plurality of blocks, and each block contains the internal circuits. The internal circuits of the blocks and the I/O device are interconnected by an internal bus of each of the logic chip and the memory chip. For the purpose of connection of various circuits, the internal bus of each chip in the multi-chip semiconductor apparatus has a relatively large length of the wiring. In a conventional multi-chip semiconductor apparatus, the internal buses of the chips are a normal-size bus that is formed by using a micromachining process, although the length of the wiring is increasing as the degree of integration grows. The parasitic capacity of the internal buses in the conventional multi-chip semiconductor apparatus is increased due to the use of the normal-size bus connection, which will lower the operating speed of the apparatus and increase the power consumption of the apparatus. Hence, it is difficult for the conventional multi-chip semiconductor apparatus to provide a high-speed operation with low power consumption if the degree of integration of the circuits in the chip grows.
An object of the present invention is to provide a semiconductor apparatus that operates at a high speed with low power consumption by using the large-size bus connection as the signal transmission line between the circuit components of the chip.
Another object of the present invention is to provide a semiconductor apparatus that has a large-size bus wiring structure configured to suit to both the wafer test conducted before formation of the large-size bus connection and the chip test or operating test conducted after the formation of the large-size bus connection.
Another object of the present invention is to provide a multi-chip semiconductor apparatus that operates at a high speed with low power consumption by using the large-size bus connection as the signal transmission line between the circuit components of the chip.
Another object of the present invention is to provide a semiconductor apparatus that provides flexibility of the layout of the circuit components by using the large-size bus connection.
The above-mentioned objects of the present invention are achieved by a semiconductor apparatus having circuit components, the semiconductor apparatus comprising: a first bus which interconnects the circuit components; a second bus which interconnects the circuit components; and a switching unit which outputs a select signal that causes each circuit component to select one of the first bus and the second bus when transmitting a signal from one of the circuit components to another, the second bus having a size larger than a size of the first bus.
The above-mentioned objects of the present invention are achieved by a semiconductor apparatus having circuit components, the semiconductor apparatus comprising: a first bus which interconnects the circuit components; a second bus which interconnects the circuit components; and a switching unit which outputs a select signal that causes each circuit component to select one of the first bus and the second bus when transmitting a signal from one of the circuit components to another, the switching unit being configured such that the first bus is selected only when a wafer test is conducted before formation of the second bus, and the second bus is selected at any time the semiconductor apparatus operates after the wafer test is conducted.
The above-mentioned objects of the present invention are achieved by a multi-chip semiconductor apparatus in which a first chip and a second chip coexist and each of the first and second chips includes circuit components, one of the first and second chips comprising: a first wiring layer which is provided on a semiconductor substrate; a second wiring layer which is provided on an insulating layer covering the first wiring layer, the second wiring layer including conductive lines each interconnecting the circuit components of said one of the first and second chips; a plurality of first electrodes which are provided in the first wiring layer; and a second electrode which is provided on each of the conductive lines, each conductive line being configured to interconnect the plurality of first electrodes and the second electrode.
The above-mentioned objects of the present invention are achieved by a semiconductor apparatus comprising: an external terminal; a first internal circuit connected to the external terminal via a first contact; a second internal circuit connected to the external terminal via a second contact; and a large-size bus connecting the external terminal to each of the first internal circuit and the second internal circuit, wherein the large-size bus is provided in a second wiring layer on an insulating layer covering a first wiring layer provided on a semiconductor chip, the second wiring layer contacting both the first and second contacts, and the external terminal being brought into contact with the second wiring layer, wherein the connection of the large-size bus enables the first internal circuit and the second internal circuit to be spaced apart each other.
In the semiconductor apparatus of one preferred embodiment of the invention, the large-size bus that has a size larger than a size of the normal-size bus is provided to interconnect the circuit components of the chip. The large-size bus connection to constitute the large-size bus has a small parasitic capacity and enables the operation at a low driving voltage, and it is possible to provide a high-speed operation of the semiconductor apparatus with low power consumption.
The multi-chip semiconductor apparatus of one preferred embodiment of the invention does not require the I/O devices that are needed to connect together the multiple chips as in the conventional multi-chip semiconductor apparatus. According to the multi-chip semiconductor apparatus of the present invention, the delay time is shortened and the power consumption is reduced.
Further, in the semiconductor apparatus of one preferred embodiment the invention, the large-size bus interconnects the circuit components via the external electrodes. The semiconductor apparatus of the present invention is effective in providing flexibility of the layout of the circuit components while providing high-speed operation with low power consumption.

Semiconductor apparatus having a large-size bus connection


The present disclosure relates to a novel ruthenium compound, a method for preparing the ruthenium compound, a precursor composition for depositing a ruthenium-containing film including the ruthenium compound, and a method for depositing a ruthenium-containing film by using the precursor composition.

Ruthenium metal is excellent in thermal and chemical stability and also has a low resistivity (ρbulk=7.6 μΩ·cm) and a high work function (Fbulk=4.71 eV) and thus can be used as a gate electrode of a transistor or a capacitor electrode material of a DRAM or FeRAM. Particularly, in case of using oxides containing titanium, such as TiO2, STO (SrTiO3), BST [(Ba, Sr)TiO3], and the like, as a source for a high dielectric material of a next-generation DRAM capacitor, it is necessary to use a ruthenium electrode in order to minimize a leakage current.
The ruthenium metal has an excellent adhesion to copper metal and has difficulty in forming a solid solution with Cu, and, thus, application of the ruthenium metal as a seed layer for a Cu wiring process using electroplating in a semiconductor manufacturing process is being actively studied.
Meanwhile, a ruthenium oxide (RuO2) is also a conductive material having a low resistivity (ρbulk=46 μΩ·cm) and an excellent thermal stability even at 800° C. and thus highly likely to be applied as a lower electrode of a metal-insulator-metal (MIM) capacitor in the future.
In order to use the ruthenium metal and the ruthenium oxide as a capacitor electrode of extremely miniaturized next-generation electronic devices, particularly a DRAM (Dynamic Random Access Memory) having a high aspect ratio, it is necessary to apply an organic metal chemical vapor deposition method or an atomic layer deposition method that enables an excellent step coverage on a seriously uneven surface, and, thus, a ruthenium precursor compound suitable therefor is needed.
When a ruthenium metal film or oxide film is formed using the atomic layer deposition method, a bis(ethylcyclopentadienyl)ruthenium [(EtCp)2Ru] precursor compound and an oxygen-containing gas are usually used. However, (EtCp)2Ru is a liquid at room temperature and has a high vapor pressure, but the atomic layer deposition method using the (EtCp)2Ru precursor compound has a problem that particularly initial film growth is very slow. On a silicon oxide film or a silicon nitride film, 100 or more gas supply cycles (incubation cycles) are needed until film growth per gas supply cycle of the atomic layer deposition method can be obtained to a certain degree. The atomic layer deposition method using the (EtCp)2Ru precursor compound also has a defect of slow film growth per source supply cycle (lower than 0.05 nm/cycle) ["Nucleation kinetics of Ru on silicon oxide and silicon nitride surfaces deposited by atomic layer deposition", Journal of Applied Physics, volume 103, 113509 (2008)].
It has also been known that 2,4-(dimethylpentadienyl)(ethylcyclopentadienyl)Ru (DER) which is a liquid at room temperature and has a relatively high vapor pressure and an oxygen-containing gas are used in the atomic layer deposition method, but it has been reported that in the atomic layer deposition method using the DER, an incubation cycle is needed 100 or 200 times on a titanium oxide (TiO2) or titanium nitride (TiN) substrate, and it has been known that film growth per source supply cycle is only 0.034 nm/cycle ["Investigation on the Growth Initiation of Ru Thin Films by Atomic Layer Deposition", Chemistry of Materials, volume 22, 2850-2856 (2010)].
Accordingly, a ruthenium precursor compound that enables fast initial film growth during atomic layer deposition or chemical vapor deposition and particularly fast film growth per gas supplying cycle in the atomic layer deposition method.

Ruthenium compound, preparation method therefor, precursor composition for film deposition containing same, and method for depositing film by using same


The invention relates to a system and methods for verifying a person's identity, and pertains in particular to such a system and methods which utilize comparison of a fingerprint pattern for identification verification. The image of a fingerprint of a person to be identified is provided on an inkless means which when touched by a finger of the person causes immediate development of an image of the fingerprint of the finger in a black and white appearance. This image of a fingerprint is video scanned to produce image data which is digitized to produce a non-minutiae digitized numerical identifier indicative of the fingerprint. A preferred method and system provides a non-minutiae digitized numerical identifier having 24 bytes of fingerprint identification data which is recordable within the magnetic stripe of a credit card personal to a person, or may be recorded within the confines of a portable personnel identification means, or within a smart card, personal to a person. The non-minutiae digitized numerical identifier is provided by selectively analyzing different parts of a fingerprint and deriving from each part a byte numeric which is directly related to the ridge count computed for that part. Prior to performing the "digitizing" method, a fingerprint identity window is defined as the area of analysis. The present invention also discloses inventive methods relating to "image sizing" and "image framing" which are performed upon the fingerprint image and whitespace digital data stored in memory, prior to defining a fingerprint identity window. Various applications of the invention methods and system are disclosed herein.

The invention system and related methods are directed to the automatic identification of fingerprints by video scanning and digitizing analysis of the scanned fingerprint, and to the general field of verification of the identity of a person to be identified, such verification being accomplished by comparing a non-minutiae digitized numeric identifier indicative of a fingerprint of a person to be identified with a numeric identifier recorded within the confines of a portable personnel identification means, personal to the person to be identified, which identification means can be of numerous kinds such as a retail credit card, a smart card, or others as set forth hereinafter. The numeric identifier of such portable personnel identification means is previously derived in accordance with the teachings of the present invention and then recorded within the identification means to enable identity verification, accomplished by comparison.
It is most desirable to have automatic means and methods for identifying human beings. Millions of individuals are checked on a daily basis by cumbersome and unreliable methods in banks, retail stores, classified areas, security environments, and by law enforcement officials. The problem of verifying the identity of an individual to a personnel identification card means held and offered as proof of identification by such individual, is one of the most common faced in the everyday duties of commerce, industry and government. Present day fingerprint verification methods are too time consuming and cumbersome to be expediently implemented into the civilian and military affairs of today's society. What is clearly needed is a means of, and methods for, providing automatic, rapid and positive verification of a person's identification.
The system invention, and the inventive methods utilized therein and related thereto, satisfy this long felt need for methods and means for providing automatic verifiable identification of an individual submitting him or herself for identification for the purpose of: retail credit card purchases, authorized entry, check cashing, obtaining a driver's license, showing proof of age via a driver's license, verification of the identity of a holder of a passport, etc.
A further great need is the development of such a system and methods for providing a verifiable fingerprint identifier which is most applicable to and recordable within a magnetic-stripe of a portable personnel identification card means, such as a magnetic stripe of a credit card. The least number of bytes within a verifiable fingerprint identifier, known to the inventors of the present invention, is a 400 byte numeric identifier developed by FINGERMATRIX. This known development is not at all applicable to a portable personnel identification card of the magnetic-stripe type for reasons well known to those skilled in this art.
The presently disclosed system invention and the inventive methods thereof fully satisfy this further need by providing a verifiable non-minutiae fingerprint identifier having but 24 bytes of fingerprint identification data which affords recordability to magnetic-stripe identification cards.
The invention includes the actual taking of an individual's fingerprint via an inkless means each time an identification is to be made. The print can be taken of any digit of a person, i.e. index finger or thumb or toe, and the image of a digitprint is video scanned to produce image data which is digitized in accordance with the teachings of the invention to produce a non-minutiae digitized numerical identifier indicative of the digit print image, and this digitized numerical identifier is compared with a numerical identifier read from an identification card means identifying the person to be identified, to verify the identity of that person.
Various other objects and advantages of the invention methods and system will be apparent from that set forth hereinafter, and some of the specific objectives of the invention are recited hereinbelow.

Non-minutiae automatic fingerprint identification system and methods


A system, method and device for wireless communication is provided. The method includes receiving, by a receiver, data from a wireless transmitter, receiving, by the receiver, retransmission of the data from the wireless transmitter, storing, by the receiver, the data, processing, by the receiver, the data without knowledge of the data length, and determining, by the receiver, a data length of the data.

Users of electronic devices require increasing functionality in the applications and services provided by the electronic devices and communication networks used to connect those devices. Increasing the bandwidth and reliability of the wireless communications used to connect the electronic devices to other electronic devices and communications networks is of increasing importance for user satisfaction. One of the challenges faced by wireless communication receivers in electronic devices is extracting the transmitted data from received wireless signals with reduced errors. A technique used by receivers to reduce transmission errors is hybrid automatic repeat requests (HARQ). HARQ is a combination of high data rate forward error-correcting coding and automatic repeat request error-control.

Method and apparatus for hybrid automatic repeat requests (HARQ) processing for retransmissions with unknown data length


An optical component comprises at least one optically effective optical element which heats up when irradiated with light, and at least one holding element for the at least one optical element for holding the at least one optical element in a carrier structure, wherein the at least one optical element is connected to the at least one holding element in heat conducting fashion, and wherein the at least one holding element is at least partially provided with an active cooling system for carrying off heat from the at least one optical element. Additionally or alternatively, a temperature control device is provided which controls the temperature of at least a part of the mount of the optical element.

The invention generally relates to improvements of the thermal behavior of an optical component. More specifically, the invention relates to improvements of the thermal behavior of a collector for use in EUV-lithography.
Although the present invention will be particularly described with respect to a collector for use in EUV-lithography, the present invention is not limited thereto.
It is to be understood that, in general, the invention is also useful for other optical components.
Simulation results for the collector of an illuminating system in the extreme ultraviolet (EUV) range show that the collector strongly heats up in operation. As a consequence of the temperature rise, the collector deforms.
With reference to FIG. 1 of the accompanying drawings, the heating of a general optical component will be briefly explained. FIG. 1 shows an incident optical beam 1 impinging on an optical component. The optical component is, for example, a mirror, comprising a substrate body 4 and an optical layer 3 as the optical element, at which the beam is deviated or reflected as shown by reference numeral 2. Other optical components like lenses, prisms, gratings, beam splitters, etc., are conceivable.
A portion of the impinging energy 1 is absorbed by the optical layer 3 or by the substrate 4. Heat 5 is generated thereby which spreads in the substrate 4. In most cases, this heat is poorly carried off, because the fixing element 6 to the holder 7 and also the substrate material 4 have a poor heat conduction ability. The substrate 4 expands, while this expansion is hindered by the fixing elements 6 and the holder 7, which leads to local deformations of the optical element (substrate and/or optical layer) and, thus, to a deterioration of the optical performance of the device, in which the optical component is used.
Depending on the power of the illumination of the optical system, certain temperatures of the system arise. If no heat carrying off is provided by heat conduction into a cooling medium, the temperatures can become pretty high and rapidly exceed an operating temperature which is in some cases required.
EP 1 387 054 A2 discloses a cooling apparatus and a cooling method for cooling an optical element provided in a vacuum atmosphere. The cooling apparatus includes a radiational cooling part, arranged apart from the optical component for cooling the optical component by radiation heat transfer, and a controller for controlling the temperature of the radiation cooling part.
This cooling apparatus is expensive, because it requires a considerable number of additional parts, thus also increasing the space requirements of the optical component.
US 2004/0051984 A1 discloses devices and methods for cooling devices, optical elements and optical systems, including optical systems used in vacuum environments. The cooling device comprises a heat-receiving plate arranged proximally to a respective optical component along a surface of the optical component at which light directed to the optical component is not incident or outgoing. The heat-receiving plate is configured to receive heat from the optical component. Again, this known device requires a number of parts in addition to the parts of the optical component for cooling same.
The technical problems occurring as a result of the heating of the optical element can be summarized as follows. On the one hand, the optical component becomes too hot, as a result of which the substrate material and the optical layers can be destroyed. On the other hand, the optical component can be deformed so severely that the optical performance of the system does not conform to the required specification. Finally, the deformation of the optical component can change during operation, that is represent a transient effect. A one-off or static correction of the resultant error in the optical system, for example with the aid of other optical components, would therefore be inadequate.

Optical component having an improved transient thermal behavior and method for improving the transient thermal behavior of an optical component


Systems for additive manufacturing comprise a delivery guide configured to dispense a curable material to additively manufacture a part in sequential layers of the curable material, and a source of curing energy configured to direct the curing energy to a discrete region of the curable material forward of or at a location where a subsequent layer of the curable material is dispensed from the delivery guide against a preceding layer of the curable material to cure together the subsequent layer and the preceding layer. Methods of additively manufacturing comprise dispensing a subsequent layer of a curable material against a preceding layer of the curable material, and concurrently with the dispensing, directing curing energy to a discrete region of the curable material to cure together the subsequent layer and the preceding layer.

Current additive manufacturing techniques that use thermoplastic resin feedstocks typically melt the resin as it is being dispensed and layer the resin against a previously dispensed and hardened layer. Current additive manufacturing techniques that use thermoset resin feedstocks typically fully cure the resin as it is being dispensed and placed the fully cured material against a previously dispensed and fully cured layer. In both applications, poor adhesion between adjacent layers may result, thereby creating parts that are prone to separation and peeling.

Systems and methods for additive manufacturing


A surface for a plate handling machine is movable in a plate handling direction relative to the plate handling machine. The surface has at least two groups of stops. The stops permit various arrangements of plates to be registered on the surface. Two smaller-sized plates or one larger-sized plate can be registered on the surface. An example surface has a first stop positioned on the surface in a range of 80-90 centimeters in a first lateral direction from a plane parallel to the plate handling direction which bisects surface, a second stop positioned on the surface in a range of 60-70 centimeters in the first lateral direction from the plane, a third stop positioned on the surface in a range of 30-40 centimeters in the first lateral direction from the plane, a fourth stop positioned on the surface in a range of 30-40 centimeters in a second lateral direction opposite the first lateral direction from the plane, a fifth stop positioned on the surface in a range of 60-70 centimeters in the second direction from the plane and a sixth stop positioned on the surface in a range of 80-90 centimeters in the second direction from the plane. The third and fourth stops are positioned approximately on a reference line located on the surface perpendicular to the plate handling direction. The second and fifth stops are offset by a first distance from the reference line in the plate handling direction, and the first and sixth stops are offset by a second distance from the reference line in the plate handling direction, wherein the first distance is greater than the second distance.

This invention relates to printing, and in particular to registering printing plates on a plate handling machine such as a platesetter or other printing-related device.
In the printing industry it is common to wish to impart an image to a printing plate. Generally, one edge of the printing plate is used as a registration edge. The registration edge is used as a reference to properly align the printing plate on a plate handling machine such as a printing press or a platesetting machine. Typically, a plate is aligned on a drum of a plate handling machine by bringing its registration edge into contact with two registration pins or xe2x80x9cstopsxe2x80x9d. The drums of plate handling machines may have a number of stops projecting from them so that printing plates of various sizes can be registered on the drums.
Examples of plate handling machines equipped with such stops include the CREO(trademark) Computer-to-Plate (CTP) imaging systems which include a drum 8 with four stops 10A through 10D, as shown in FIG. 1. Drum 8 preferably comprises a right circular cylinder configured to rotate such that stops 10A through 10D are carried in a plate handling direction indicated by arrow 9. Stop 10A is positioned on a reference line 11 which is parallel to the axis of rotation of drum 8. Stops 10B-D are each offset from reference line 11 so that stops 10B through 10D lead stop 11A as drum 8 rotates. Throughout the description and claims, when a first object on a drum is said to xe2x80x9cleadxe2x80x9d a second object, it is to be understood that the first object passes a stationary line parallel to the axis of rotation of drum 8 before the second object as drum 8 rotates as indicated by arrow 9, provided that the first object is circumferentially separated from the second object by less than one half of a circumference of the drum. Stop 10D is positioned approximately on reference line 11 such that it leads reference line 11 by approximately 30 microns or less. Stop 10C is positioned to lead reference line 11 by approximately 250 microns. Stop 10B is positioned to lead reference line 11 by approximately 350 microns.
The arrangement of pins shown in FIG. 1 permits multiple different sizes of plates to be registered using the same arrangement of stops, as shown in FIG. 2. Small-sized plates 12A can be properly registered on stops 10A and 10B. Medium-sized plates 12B can be properly registered on stops 10A and 10C. Large-sized plates 12C can be properly registered on stops 10A and 10D. All plates are loaded so that they span between stop 10A and one of stops 10B, 10C and 10D depending upon the width of the plate. An edge detect strip (not shown) may be positioned parallel to reference line 11 on drum 8 to determine the lateral position of a plate.
Stops 10A through 10D are spread apart across the width of drum 8 in such a manner that there are no xe2x80x9cdead bandsxe2x80x9d between the maximum plate width for one pair of stops and the minimum plate width for the xe2x80x9cnextxe2x80x9d pair of stops. Thus, stops 10A through 10D allow for registration of plates with a continuous range of widths.
Despite the success of the systems shown in FIGS. 1 and 2, there is a need for systems capable of imaging a broader range of plate sizes.
The invention provides a surface for supporting a printing plate in a plate handling machine. The surface and the plate handling machine are movable in a plate handling direction relative to each other. The surface comprises a plurality of stops, the plurality of stops comprising a pair of central stops and at least two distal stops, wherein the pair of central stops are positioned along a reference line perpendicular to the plate handling direction and wherein each distal stop is offset from the reference line.
The plurality of stops may comprise a first group of stops and a second group of stops, each of the first and second groups of stops comprising one of the pair of central stops and at least one distal stop. The first and second groups of stops are preferably symmetrical with respect to a plane of symmetry which is perpendicular to the reference line.
The surface may be located on a drum connected to a drive mechanism configured to rotate the drum in a circumferential plate handling direction. The central stops preferably lead the distal stops as the drive mechanism rotates the drum in the circumferential plate handling direction.
The stops may project approximately 3 millimeters from the surface. The stops may alternatively be retractable from a position projecting approximately 3 millimeters from the surface to a position not extending from the surface.
The invention also provides a drum for a plate handling machine, the drum having a surface and configured to rotate about an axis of rotation. The drum comprises a plurality of stops on the surface of the drum, the plurality of stops comprising a pair of central stops and at least two distal stops. The pair of central stops are positioned along a reference line parallel to the axis of rotation of the drum and each distal stop is offset from the reference line. The distal stops are preferably offset from the reference line in the same direction. The distal stops are preferably offset from the reference line by a distance in a range of 5 to 1000 microns.
The drum may comprise a first stop positioned on the surface of the drum in a range of 80-90 centimeters in a first direction from a plane which bisects the drum perpendicular to the axis, a second stop positioned on the surface of the drum in a range of 60-70 centimeters in the first direction from the plane, a third stop positioned on the surface of the drum in a range of 30-40 centimeters in the first direction from the plane, a fourth stop positioned on the surface of the drum in a range of 30-40 centimeters in a second direction from the plane, wherein the second direction is opposite the first direction, a fifth stop positioned on the surface of the drum in a range of 60-70 centimeters in the second direction from the plane and a sixth stop positioned on the surface of the drum in a range of 80-90 centimeters in the second direction from the plane. The third and fourth stops are preferably positioned approximately on a reference line located on the surface of the drum parallel to the axis. The second and fifth stops are preferably offset by a first distance from the reference line in the circumferential direction, and the first and sixth stops are preferably offset by a second distance from the reference line in the circumferential direction, wherein the first distance is greater than the second distance.
The surface may comprise a first stop positioned on the surface in a range of 80-90 centimeters in a first lateral direction from a plane parallel to the plate handling direction which perpendicularly bisects the surface, a second stop positioned on the surface in a range of 60-70 centimeters in the first lateral direction from the plane, a third stop positioned on the surface in a range of 30-40 centimeters in the first lateral direction from the plane, a fourth stop positioned on the surface in a range of 30-40 centimeters in a second lateral direction from the plane, wherein the second lateral direction is opposite the first direction, a fifth stop positioned on the surface in a range of 60-70 centimeters in the second lateral direction from the plane and a sixth stop positioned on the surface in a range of 80-90 centimeters in the second lateral direction from the plane. The third and fourth stops are preferably positioned approximately on a reference line located on the surface and perpendicular to the plane. The second and fifth stops are preferably offset by a first distance from the reference line in the plate handling direction, and the first and sixth stops are preferably offset by a second distance from the reference line in the plate handling direction, wherein the first distance is greater than the second distance.
The invention also provides a method of mounting printing plates on the surface or drum disclosed herein. The method may comprise mounting a pair of smaller-sized plates on the stops, wherein each of the pair of smaller-sized plates spans one of the pair of central stops and one of the distal stops, removing the pair of smaller-sized plates from the surface and mounting a single larger-sized plate on the stops, wherein the single larger-sized plate spans the pair of central stops. The method may also comprise mounting a single larger-sized plate on the stops, wherein the single larger-sized plate spans the pair of central stops, removing single larger-sized plate from the surface and mounting a pair of smaller-sized plates on the stops, wherein each of the pair of smaller-sized plates spans one of the pair of central stops and one of the distal stops.


An approach is provided for shared mobile web services. A community including multiple mobile web servers providing a shared web service is designated. In the event one mobile web server is unavailable to service a request directed to the shared web service, another mobile web server is selected to provide the shared web service.

Wireless (e.g., cellular) service providers and device manufacturers are continually challenged to deliver value and convenience to consumers by, for example, providing compelling network services, applications, and content. In light of an increasingly web-centric culture, one emerging service is the use of wireless devices to provide mobile web services. These services, for example, include hosting web applications and content on a mobile handset for sharing with other users. However, limited resources (e.g., bandwidth, processing power, availability of the mobile web server) within the wireless environment pose significant problems to implementing web services on mobile devices.

Method and apparatus for providing shared services


An image forming apparatus includes a signal generating unit that stores information on a plurality of dither matrices preset in correspondence with the density level of toner to be attached to the photosensitive member and converts input image data based on the dither matrices to generate a driving signal. The signal generating unit stores information on a first dither matrix corresponding to a first density level and a second dither matrix corresponding to a second density level higher than the first density level. The first dither matrix includes a minute exposure area in which the exposure device is caused to emit light to attain a potential at which no toner adheres to the photosensitive member, and the second dither matrix includes a normal exposure area in which the exposure device is caused to emit light to attain a potential at which toner adheres to the photosensitive member.

1. Field of the Invention
The present invention relates to an image forming apparatus using an electrophotographic process, such as a laser beam printer, a copying machine, or a facsimile.
2. Description of the Related Art
A method for forming a color image with an electrophotographic image forming apparatus is known by which a color image is formed by overlapping images of a plurality of colors by repeating a process of transferring a toner image formed on a photosensitive drum through charging, exposure, and development onto a recording medium a plurality of times. It is known that a phenomenon occurs in such a color-image forming apparatus in which white gaps, which should not be present, are generated between adjacent images of different colors occurs. This phenomenon is hereinafter referred to as white gap. This phenomenon occurs when a visualized image thinner than an electrostatic latent image formed on the photosensitive drum is formed when an electrostatic latent image, such as a latent image of an image edge, which is formed on a photosensitive drum due to an abrupt change in potential, is developed by a developing unit. For example, in the case of an image in which a cyan belt and a black belt are next to each other, a thin cyan visualized image and a thin black visualized image are formed, although the color belts should be next to each other. This causes a gap between the color belts in a final image on a recording medium, resulting in degradation in image quality. FIG. 19 is a diagram illustrating a state in which white gaps are generated, showing the state of an electric field between a photosensitive drum and a developing roller. The thinning of a visualized image at a visualizing portion, which causes white gaps, occurs because an electrostatic latent image formed on an electrostatic portion of a photosensitive drum wraps the electric field at the edge.
Japanese Patent Laid-Open No. 2003-312050 discloses an image forming apparatus in which a minute laser beam is emitted to a non-toner-image formation section on a print area to the extent that toner does not adheres excessively, thereby attaining an appropriate potential of the photosensitive drum. Such weak exposure of a non-toner-image formation section (a white portion) is referred to as background exposure.
The background exposure is performed also not for preventing the above white gaps. Japanese Patent Laid-Open No. 2012-189886 discloses an in-line color-image forming apparatus that performs background exposure to attain an appropriate potential of a non-toner-image formation section of a photosensitive member when using a common charging bias power supply or a common developing bias power supply.
An example of a method for performing background exposure (weak exposure) is a method of changing the duty ratio of pulse waves, called pulse width modulation (PWM). This is a method of causing an exposure device to emit light to one pixel in synchronization with an imaging clock only a period of background exposure (a pulse width) corresponding to a minute exposure amount to the extent that no toner adheres, which is shorter than a normal exposure period (a pulse width) for adhesion of toner.
However, the background exposure based on PWM can generate image defect depending on the allocation of an emission period for normal exposure for toner adhesion and an emission period for background exposure for preventing toner adhesion.
In other words, simply placing the emission period for background exposure in an emission period not for normal exposure, which corresponds to a white portion of the image, can cause exposure light during the emission period for background exposure to interfere with exposure light during light emission for normal exposure. The interference here is a state in which an area of the photosensitive member corresponding to the emission period for normal exposure and an area corresponding to the emission period for background exposure are excessively close to each other.
Such interference decreases the potential of an area of the photosensitive member between the area corresponding to the emission period for normal exposure and the area corresponding to the emission period for background exposure. Thus, the potential of the sandwiched area decreases to an exposure level at which toner adheres, so that an area in which toner adheres finally unintentionally increases in size. This can cause image defect.

Apparatus to form latent image using dither matrices having minute and normal exposure areas controlling toner adhesion


An approach is provided in which an information handling system performs multiple tests using a cognitive service and multiple trained machine learning models on user data corresponding to a user application. For each of the multiple tests, a different one of the trained machine learning models is utilized. The information handling system generates results from the tests and then selects at least one of the trained machine learning models based on the test results. In turn, the information handling system assigns the cognitive service and the selected trained machine learning models to the user application.

Cognitive computing enables computers to employ human-like intelligence by simulating human thought processes in computerized models. Cognitive computing involves self-learning systems that use data mining, pattern recognition and natural language processing to mimic the way the human brain functions.
Cognitive Services, such as visual recognition, conversation, speech to text, language translation, packages cognitive computing machine learning algorithms into discrete components that are easy for users to interface with their applications. Today's cognitive services are bundled with default machine learning models that have been trained on a set of representative training data (referred to as ground truth), which typically covers a wide range of topics.
For a user's application to gain full benefit of a cognitive service, the user should train the cognitive service's machine learning models on a representative set of data. For example, if user's application pertains to a specific topic (e.g., financial, travel, healthcare, etc.), the user should train the machine learning models with question/answer pairs relevant to the specific industry to improve the accuracy of the corresponding cognitive service. However, creating representative training data to train machine learning models is usually a complex, expensive, and tedious task that requires subject matter expertise. As a result, users typically utilize the default models that are bundled with the cognitive service, which are not optimized for the user's application and cause the cognitive service to produce sub-optimum results.

Cloud sharing and selection of machine learning models for service use

International Business Machines Corporation


An energy storage device sits within a trench with electrically insulated sides within a substrate. Within the trench there is an anode, an electrolyte disposed on the anode, and a cathode structure disposed on the electrolyte. Variations of an electrically conductive contact are disposed on and in electrical contact with the cathode structure. At least part of the conductive contact is disposed within the trench and the conductive contact partially seals the anode, electrolyte, and cathode structure within the trench. Conductive and/or non-conductive adhesives are used to complete the seal thereby enabling full working electrochemical devices where singulation of the devices from the substrate enables high control of device dimensionality and footprint.

The present invention relates to encapsulating in-situ and ex-situ energy storage devices. More specifically, the invention relates to encapsulating in-situ and ex-situ lithium batteries with various cathode contacts.
In-situ energy storage devices are energy storage devices in which high functioning active layers are enabled by inducing electrochemical charge mobility in the device. Ex-situ energy storage devices are energy storage devices which are fully electrochemically enabled upon fabrication of the full cell.
The integration of energy storage devices, e.g. batteries, in microprocessor and memory chips is a significant requirement for the IoT (Internet of Things) devices and other applications. These other applications include mobile devices; sensory equipment; and autonomous environmental, biological, and social functioning machines. Common examples of such functional devices are smart dust and/or biomedical sensory/medicine-delivery devices.
Most or all solid-state energy storage devices will need to integrate lithium metal electrode material into the overall device cell structure due to lithium metal's extremely high theoretical specific capacity (3860 mAh/g.)
Over the next generation, as human controlled and autonomous devices increasingly become miniaturized, total energy consumption requirements for some of these electronic devices will decrease. Miniaturized energy storage devices are expected to provide less than 1 Watt for these devices. However, because the energy storage cells are miniaturized to embed in CMOS circuitry, the cell energy and power density will be high.
There is a need for encapsulation of miniaturized energy storage devices to prevent device internals from leaking to external circuitry and the environment and to prevent external contaminants from entering the device. In addition, the device encapsulation must allow for electrical connection to outside circuitry.
Three-dimensional encapsulation and sealing materials need to fit together with other 3-dimensional (3D) device components in a complimentary fashion to enable higher full energy storage device performance of integrated, 3D energy storage devices providing high energy and power density. For example, 3D cathode active material needs to connect to a sealing current collector attached to or integrated into a 3D anode material with its own integrated current collector within a hermetically sealed architecture. Failure to achieve proper integration and connection is observed to reduce the device's energy capacity, energy density, and/or rate or power capabilities, when compared with 2D analogs of the respective device. It is desirable that standard manufacturing techniques enable the device encapsulation.

This patent is subject to a terminal disclaimer.

Encapsulating in-situ energy storage device with electrode contact


A multi-layer circuit board includes several metallic layers. Each metallic layer includes a metallic ring surrounding a component pin hole formed through each layer of the board. The ring is isolated from its respective metallic layer by a concentric gap formed of non-metallic material. A plurality of metallic traces interconnect each ring with its respective metallic layer. The traces extend radially outwardly from the ring and segment the gap. Each trace has a width of about 0.010 mils and a length of about 0.050 mils.

The disclosures herein relate generally to circuit boards and more particularly to a soldering enhancement for bonding the pins of the circuit board components in the pin holes formed through the multiple board layers.
A common method of soldering components on a circuit board, such as a motherboard used in a computer, is a wave solder process. A multi-layer board includes through holes. Component pins are inserted into a bore or barrel formed by the through holes. The board is pre-heated and then moved by a conveyor at a preset speed across a molten solder pot. The component pins which extend beyond the underside of the board are soldered to the board when contacted by the wave of solder. Thus, there is a critical time of exposure controlled by the speed of the board and a critical temperature of the solder material.
As the solder contacts the protruding component pins, the solder wicks up by capillary action through the barrel and along the pins. Ultimately, the solder material reaches the top side of the board where the pins connect to their host component which is being soldered to the board. As the pins pass through the various board layers, the pins are bonded to certain layers. This is accomplished by a copper pad surrounding the hole. The pad is tied, i.e. electrically connected, to a copper plane in the board layers and to each other component tied to the plane. The ties between the pad and the copper plane are copper traces.
This is illustrated in U.S. Pat. No. 4,654,102 wherein a component pin is inserted through a bore formed in a multi-layer board. Solder material is wicked upward through the bore by a wave solder or flow solder process to secure the component pin in the bore.
The copper traces also conduct heat away from the solder material while it wicks up through the barrel. Because the circuit boards are multi-layered, the more copper layers contacting the pin, the more heat is conducted away from the solder. Thus, it sometimes occurs that the solder cools sufficiently so as to solidify before the wicking up process is completed. In such a case, a weak physical bond may occur between the pin and the hole but no molecular bond is achieved by the solder material. In fact, the weak bond may even fail due to handling during installation.
Certain components compound the solder cooling problem. For example, aluminum electrolyte caps, which have a substantial mass of metal and fluid, act as a heat shield during pre-heating and wave soldering. The caps are part of the voltage regulating circuity that assist in running the processor. If the caps are not properly soldered and fail, the processor will fail causing a shut down of the system being controlled by the board.
Therefore, what is needed is a device and a method for providing proper wicking up of solder material in the solder barrel formed in a multi-layer circuit board which avoids premature cooling of the solder material.


Process for the catalytic dehydrogenation of a C2 or C3 alkyl aromatic in which a feedstock containing the alkyl aromatic and steam is supplied into the inlet of a tubular reactor containing a dehydrogenation catalyst. Within the reactor, the feedstock flows through at least a portion of the reactor along a spiral flow path extending longitudinally of the reactor. The resulting vinyl aromatic product is then recovered from a downstream or outlet section of the reactor. The spiral flow path through which the feedstock is passed is located at least adjacent the inlet side of the reactor and at least a portion of the spiral flow path contains a particulate dehydrogenation catalyst. The spiral flow path may extend throughout a major portion of the elongated tubular reactor and may contain a particulate dehydrogenation catalyst in a substantial portion there. The feedstock containing the alkyl aromatic and steam is supplied into a plurality of tubular reactors located within the interior of a dehydrogenation reactor vessel and is arranged in a parallel relationship in which the tubular reactors are spaced laterally from one another and from the interior wall of the reaction vessel.

Various vinyl aromatic compounds can be prepared by the catalytic dehydrogenation of corresponding C2 or C3 alkyl aromatic compounds. Such reactions include the catalytic dehydration of monoalkyl or polyalkyl aromatics, such as ethylene and diethylbenzene or the dehydrogenation of alkyl substituted polynuclear aromatic compounds, such as ethylnaphthalene. Perhaps the mostly widely used dehydrogenation process involves the dehydrogenation of ethylbenzene with the production of styrene. The catalytic dehydrogenation of ethylbenzene is typically carried out at temperatures within the range of about 540-660° C. under near atmospheric or even subatmospheric pressure conditions. Typically, an ethylbenzene steam feed having a steam to ethylbenzene mole ratio of perhaps 7 or 8 or even higher is passed over a dehydrogenation catalyst such as iron oxide in an adiabatic dehydrogenation reactor. The dehydrogenation reactor may be of various configurations including a radial flow reactor such as disclosed in U.S. Pat. No. 5,358,698 to Butler et al or a linear or tubular reactor such as disclosed in U.S. Pat. Nos. 4,287,375 and 4,549,032, both to Moeller et al. As disclosed, for example in the aforementioned '032 patent to Moeller et al, an iron-oxide-based dehydrogenation catalyst is employed in a tubular reactor containing a plurality of reaction tubes which are heated by a hot molten salt bath.
Yet-another reactor system for the catalytic dehydrogenation of ethylbenzene to produce. styrene is disclosed in U.S. Pat. No. 6,096,937 to Butler et al. In the Butler et al system, a reactor system comprises a furnace structure which incorporates a plurality of internal reactor tubes which contain a dehydrogenation catalyst and which operate in an ascending heat mode. Here, the reactor system incorporates gas-fired heaters which heat the interior of the furnace to a temperature suitable for dehydrogenation to bring the temperature within the reactor tubes to the desired level by the application of heat which varies along the length of the tubes.
Analogous dehydrogenation reactions can be carried out employing C3 alkyl aromatic compounds. Thus, n-propyl benzene can be dehydrogenated to produce beta methyl styrene, and cumene can be dehydrogenated to produce alpha methyl styrene. Other reactions include the dehydrogenation of ethyl toluene to produce vinyl toluene and the dehydrogenation of diethylbenzene to produce divinyl benzene.


The invention relates to a method for the reflectometric testing of an optical transmission line from an optical transmission and reception device, in which a test signal is fed into the transmission line from the direction of the optical transmission and reception device and the signal reflected back to the optical transmission and reception device is analysed, in which the transmission device provided for transmitting the useful signal is also used as the transmitter of the test signal by switching it from transmission mode to test mode, and the transmission device itself is used as the receiver of the reflected signal, as well as to an optical device and to an optical transmission and reception device therefore.

The invention is based on a priority application EP 04292136.1 which is hereby incorporated by reference.
The invention relates to a method for the reflectometric testing of an optical transmission line, in which a test signal is fed into the transmission line from the direction of an optical transmission device and the reflected signal is analysed. The invention further relates to an optical device for the reflectometric testing of an optical transmission line, having transmission means for feeding a test signal into the transmission line from the direction of the optical device, and having reception means for analysing the signal reflected back to the optical transmission and reception device. The invention further relates to an optical transmission and reception device.
Glass fibres are nowadays being used more and more in so-called metro networks and in access networks. In this context, there is an increasing need for continuous or at least regular monitoring of these optical data connections. The monitoring facilitates preventive measures when a data connection is gradually deteriorating, if this is detected early. High availability of the network is thereby ensured. This is important, for example, for the provision of critical services to business customers. In the event of failures as well, a monitoring device makes it possible to locate the error rapidly and determine the cause of error, in order to allow repair or rectification.
The network operator needs to be able to rapidly find the cause of a connection problem, for example in order to be able to distinguish between trouble with the glass fibre network and trouble at a network node, and, in the event of a glass fibre problem, to be able identify the error location and the type of error or a deterioration occurring along the entire connection.
It is known to use so-called OTDR measuring equipment (OTDR=Optical Time Domain Reflectometry) in order to monitor the quality of optical connections, for instance to identify cable breaks, to find errors, to recognise falling signal levels or the deterioration of properties. Measurements can thereby be carried out as required, for instance in order to document a glass fibre network, or with a special measuring wavelength in multiplex operation in parallel with the working network.
The costs of such measuring equipment are high, because they need to be very reliable and also flexible in order to satisfy all the requirements during operation in a very wide variety of network configurations.
The invention offers assistance for this by a method for the reflectometric testing of an optical transmission line, in which a test signal is fed into the transmission line from the direction of an optical transmission device and the reflected signal is analysed, wherein the transmission device provided for transmitting the useful signal is also used as the transmitter of the test signal by switching it from transmission mode to test mode, and in that the transmission device itself is used as the receiver of the reflected signal.
The invention further relates to an optical device for the reflectometric testing of an optical transmission line, having transmission means for feeding a test signal into the transmission line from the direction of the optical device, and having reception means for analysing the signal reflected back to the optical transmission and reception device, wherein the transmission means is the transmission device provided for transmitting the useful signal, and in that the reception means is the transmission device itself.
The invention further relates to an optical transmission and reception device, that contains an optical device for the reflectometric testing of an optical transmission line, that has transmission means for feeding a test signal into the transmission line from the direction of the optical device, and that has reception means for analysing the signal reflected back to the optical transmission and reception device, wherein the transmission means is the transmission device provided for transmitting the useful signal, and wherein the reception means is the transmission device itself.
The fact that the devices already provided for normal operation are substantially also used for the monitoring device provides very cost-effective monitoring.
Further refinements of the invention can be found in the dependent claims and the following description.

Method for the reflectometric testing of an optical transmission line, optical device and optical transmission and reception device


A system and method which may allow users to interact with Internet servers with graphical mouse movements. The invention is especially useful to enhance online transaction security. A user may use a mouse to draw a pattern and store the pattern as his password to an online account, and draw the pattern with a mouse to log in the online account. The password may include a drawing, one or more letters, one or more numbers, or one or more characters.

1. Field of the Invention
The present invention relates generally to computer input methods, and more specifically to a computer input method for avoiding keyloggers.
2. Description of Related Art
The explosive growth of the Internet makes life much easier. Users may do online shopping and manage bank accounts from home. A user may use a username and password to protect his online accounts, and type them in with a keyboard to login to his accounts. The user may also use a keyboard to input his credit card number and other confidential information. However, the typical keyboard entered information is subject to interception easily, and online identity theft by keyloggers compromises security of online transactions.
Some users resort to additional hardware, e.g., a tablet or an RSA SecurID™ token, for enhanced security. However, on top of the extra cost, users have to carry the additional hardware with them all the time.
Therefore, it may be desirable to provide a system and method which may help users to prevent online identity theft without dedicated hardware devices.

Interacting with internet servers without keyboard

Abstract: In an embodiment, a computer program product may include a computer-readable medium having instructions which, when performed by a computer, perform a user authentication method. The user authentication method may include receiving at an Internet server a username; receiving at the Internet server a password which is drawn with graphical movements of a graphical drawing input device; determining whether the password drawn matches a password previously stored with the username; and authenticating a user accordingly.


The present invention relates to a deployable, continuously extendible and collapsible, closed or open ended, free standing or supported spatial structure comprising an array of spaced apart adjacent layers or tiers of pivotally connected criss-crossed bars with the bars in each layer being connected to each other in rows and columns and with rods coupling the layers together.

There are many devices and structures in the prior art of the type having a plurality of scissors-like elements tandemly connected at pivot points to provide a deployable spatial structure. One such structure is shown in U.S. Pat. No. 736,671 which provides a mono-planar extendible and retractible lazy tongs fruit picker. In U.S. Pat. No. 226,101 there is shown an extension tower having four sets of lazy tongs pivotally connected at right angles to each other to form a tower essentially rectangular in transverse cross section when the tongs are extended by virtue of a worm driven screw.
U.S. Pat. No. 3,868,961 shows two parallel lazy tongs connected at end pivot points by transverse rods which support a canvas awning. U.S. Pat. No. 446,560 discloses an aerial ladder comprising two parallel sets of lazy tongs cross connected by bars at all of their pivot points. U.S. Pat. No. 3,877,544 shows a stress balanced extendible boom comprising parallel rows of lazy tongs cross connected by rods in various ways and having torsion bars to prevent the boom from twisting or becoming unstable.


A stimulation electrode is produced having a porous film layer and being partially coated with an insulating parylene (polyparaxylylene) film, whose insulating film has a dielectric breakdown voltage of greater than 100 V. Parylene is deposited on the entire surface of a porous film coating and then partially removed again by plasma. After the partial removal of the parylene, this porous film still has a capacitance of greater than 15 mF/cm2 in a physiological NaCl solution at a frequency of 0.1 Hz. For the stimulation electrode, the transition from the insulating film to the porous film is formed so that the film thickness of the parylene film decreases continuously. In this way, a stimulation electrode having a porous film layer and being partially coated with an insulating parylene film is provided, whose electrode on the non-insulating parylene film-coated surface has a capacitance of greater than 15 mF/cm2 in a physiological NaCl solution at a frequency of 0.1 Hz and whose insulating film advantageously has a dielectric breakdown voltage of greater than 100 V.

The present invention relates to stimulation electrodes whose porous layer is partially coated with an insulating film.
According to U.S. Pat. No. 6,501,994, parylene (polyparaxylylene) is a preferred coating material. For creating a partial coating, U.S. Pat. No. 6,501,994 teaches the application of masks and their later removal. Here, a problem in the removal of the resist is that the parylene film always bleeds during the removal of the mask, and therefore does not lead to reproducible partial coatings, or the porous film is damaged by the mask or its removal. Standing against an inverse procedure, namely a fall-surface coating with parylene and subsequent partial removal, is that when the parylene film is removed, the porous layer located underneath is usually damaged and the high capacity achieved with difficulty by way of the porous layer would be undone.

Selective parylene coating for cardiac pacemaker electrodes