A method of providing one-way video transmission and corresponding interactive two-audio communication to remote recipients via a world wide computer network comprising the steps of creating a source digital video signal, broadcast transmitting the source digital video signal via an internet connection, transmitting a corresponding source digital audio signal a VoIP protocol, and transmitting a recipient audio signal to the source location via an Internet connection. A system for broadcast transmitting a one-way digital video signal and for transmitting and receiving a corresponding interactive two-way audio signal over an Internet connection comprises a broadcast digital video server for broadcast transmitting a source digital video signal, a VoIP audio server for transmitting a source digital audio signal over an Internet connection, and an Internet web page configured to display the transmitted source digital video and audio signal, the Internet web page further configured to receive and transmit a recipient digital audio signal from the recipient to the VoIP audio server.

During the 1970's and 1980's, the defense industry encouraged and developed an interconnecting network of computers as a back up for transmitting data and messages in the event that established traditional methods of communication fails. University mainframe computers were networked in the original configurations, with many other sources being added as computers became cheaper and more prevalent. With a loose interconnection of computers hardwired or telephonically connected across the country, the defense experts reasoned that many alternative paths for message transmission would exist at any given time. In the event that one message path was lost, an alternative message path could be established and utilized in its place. Hence, it was the organized and non-centralized qualities of this communications system that made it appealing to the military as a backup communication medium. If any one computer or set of computers was attacked or disconnected, many other alternative paths could eventually be found and established.
This interconnection of computers has since been developed by universities and businesses into a worldwide network that is presently known as the Internet. The Internet, as configured today, is a publicly accessible digital data transmission network that is primarily composed of terrestrial communications facilities. Access to this worldwide network is relatively low cost and hence, it has become increasingly popular for such tasks as electronic mailing and Web page browsing. Both such functions are badge or file transfer oriented. Electronic mail, for instance, allows a user to compose a letter and transmit it over the Internet to an electronic destination. For one-way Internet transfers such as e-mail, it is relatively unimportant how long each file transfer takes as long as it is reasonable. Messages are routed, through no fixed path but rather, through various interconnected computers until they reached their destination. During heavy message low periods, messages will be held at various internal network computers until the pathways are cleared for new transactions. Accordingly Internet transmissions are effective for one-way transfers, but cannot be relied upon for time high priority applications.
Web pages are collections of data including text, audio, video, and interlaced computer programs. Each web page has a specific electronic site destination that can be accessed through a device known as a web server, and can be accessed by anyone through via Internet. Web page browsing allows a person to inspect the contents of a web page on a remote server to glean various information contained therein, including for instance product data, company backgrounds, and other such information which can be digitized. The remote server data is access by a local browser, and the information is displayed as text, graphics, audio, and video.
The web browsing process, therefore, is a two-way data communication between the browsing user, who has a specific electronic address or destination, and the web page, which also has a specific electronic destination. In this mode of operation, as opposed to electronic mail functions, responsiveness of the network is paramount since the user expects a quick response to each digital request. As such, each browsing user establishes a two-way data communication, which ties up an entire segment of bandwidth on the Internet system.
Recent developments on the Internet include telephone, videophone, conferencing and broadcasting applications. Each of these technologies places a similar real-time demand on the Internet. Real-time Internet communication involves a constant two-way throughput of data between the users, and the data must be received by each user nearly immediately after its transmission by the other user. However, the original design of the Internet did not anticipate such real-time data transmission requirements. As such, these new applications have serious technical hurdles to overcome in order to become viable.
Products, which place real-time demands on the Internet, will be aided by the introduction of an updated hardware interconnection configuration, or "backbone," which provides wider bandwidth transmission capabilities. For instance, the MCI backbone was recently upgraded to 622 megabytes per second. Regardless of such increased bandwidth, the interconnection configuration is comprised of various routers, which may still not be fast enough, and can therefore significantly degrade the overall end-to-end performance of both one-way, and particularly two-way, traffic on the Internet. Moreover, even with a bandwidth capability of 622 megabytes per second, the Internet backbone can maximally carry only the following amounts of data: 414—1.5 Mbs data streams; 4,859—128 Kbs data streams; 21597—28.8 Kbs data streams; or combinations thereof. While this is anticipated as being sufficient by various Internet providers, it is likely to quickly prove inadequate for near-future applications.
Internal networks, or Intranet sites, might also be used for data transfer and utilize the same technology as the Internet. Intranets, however, are privately owned and operated and are not accessible by the general public. Message and data traffic in such private networks is generally much lower than more crowded public networks. Intranets are typically much more expensive for connect time, and therefore any related increase in throughput comes at a significantly higher price to the user.
To maximize accessibility of certain data, broadcasts of radio shows, sporting events, and the like are currently provided via Internet connections whereby the broadcast is accessible through a specific web page connection. However, as detailed above, each web page connection requires a high throughput two-way connection through the standard Internet architecture. A given Internet backbone will be quickly overburdened with users if the entire set of potential broadcasters across world began to provide broadcast services via such web page connections. Such broadcast methods through the Internet have thereby proven to be ineffective given the two-way data throughput needed to access web pages and real-time data.
There is an enormous demand for the delivery of large amounts of content to a large number of listeners. The broadcast channels of today, such as radio and TV, can only deliver a small number of channels to a large number of listeners. Their delivery mechanism is well known to customers. The broadcaster transmits programs and the listener must "tune in" at the proper time and channel to receive the desired show.
For example, "on demand" systems have been attempted by the cable industry. Such systems attempt to transport the program or show from a central repository (server) to the user (client) in response to his/her request. To initiate the request, the user selects from a list of candidate programs and requests that the system deliver the selected program.
The foregoing "on demand" model of content delivery places two significant requirements on the delivery system. First, there should be a direct connection between each content storage device (server) and each listener (client). The phone system is an example of such a point-to-point interconnection system. Another example of such an interconnection system is the Internet, which is also largely based on the terrestrial telecommunications networks. Second, the server must be capable of delivering all the programs to the requesting clients at the time that which the client demands the programming.
With the advent of digital video products and services, such as Digital Satellite Service (DSS) and storage and retrieval of video streams on the Internet and, in particular, the World Wide Web, digital video signals are becoming ever present and drawing more attention in the marketplace. Because of limitations in digital signal storage capacity and in network and broadcast bandwidth limitations, compression of digital video signals has become paramount for digital video storage and transmission. As a result, many standards for compression and encoding of digital video signals have been promulgated. For example, the International Telecommunication Union (ITU) has promulgated the H.261 and H.263 standards for digital video encoding. Additionally, the International Standards Organization (ISO) has promulgated the Motion Picture Experts Group (MPEG), MPEG-1, and MPEG-2 standards for digital video encoding.
These standards specify with particularity the form of encoded digital video signals and how such signals are to be decoded for presentation to a viewer. However, significant discretion is left as to how the digital video signals are to be transformed from a native, uncompressed format to the specified encoded format. As a result, many different digital video signal encoders currently exist and many approaches are used to encode digital video signals with varying degrees of compression achieved.
In general, greater degrees of compression are achieved at the expense of video image signal loss and higher quality motion video signals are achieved at the expense of lesser degrees of compression and thus at the expense of greater bandwidth requirements. It is particularly difficult to balance image quality with available bandwidth when delivery bandwidth is limited. Such is the case in real-time motion video signal delivery such as video telephone applications and motion video on demand delivery systems. It is generally desirable to maximize the quality of the motion video signal as encoded without exceeding the available bandwidth of the transmission medium carrying the encoded motion video signal. If the available bandwidth is exceeded, some or all of the sequence of video images are lost and, therefore, so is the integrity of the motion video signal. If an encoded motion video signal errs on the side of conserving transmission medium bandwidth, the quality of the motion video image can be compromised significantly.
The format of H.263 encoded digital video signals is known and is described more completely in "ITU-T H.263: Line Transmission of Non-Telephone Signals, Video Coding for Low Bitrate Communication" (hereinafter "ITU-T Recommendation H.263"), incorporated by reference herein in its entirety. Briefly, in H.263 and other encoded video signal standards, a digital motion video image signal, which is sometimes called a video stream, is organized hierarchically into groups of pictures, which include one or more frames, each of which represents a single image of a sequence of images of the video stream. Each frame includes a number of macroblocks that define respective portions of the video image of the frame. An I-frame is encoded independently of all other frames and therefore represents an image of the sequence of images of the video stream without reference to other frames. P-frames are motion-compensated frames and are therefore encoded in a manner that is dependent upon other frames. Specifically, a P-frame is a predictively motion-compensated frame and depends only upon one I-frame or, alternatively, another P-frame which precedes the P-frame in the sequence of frames of the video image. The H.263 standard also describes BP-frames, however, for the purposes of description herein, a BP-frame is treated as a P-frame.
All frames are compressed by reducing redundancy of image data within a single frame. Motion-compensated frames are further compressed by reducing redundancy of image data within a sequence of frames. Since a motion video signal includes a sequence of images, which differ from one another only incrementally, significant compression can be realized by encoding a number of frames as motion-compensated frames, i.e., as P-frames. However, errors from noise introduced into the motion video signal or artifacts from encoding of the motion video signal can be perpetuated from one P-frame to the next and therefore persist as a rather annoying artifact of the rendered motion video image. It is therefore desirable to periodically send an I-frame to eliminate any such errors or artifacts. Conversely, I-frames require many times more bandwidth, e.g., on the order of ten times more bandwidth, than P-frames, so encoding I-frames too frequently consumes more bandwidth than necessary. Accordingly, determining when to include an I-frame, rather than a P-frame, in an encoded video stream is an important consideration when maximizing video image quality without exceeding available bandwidth.
Another important consideration when maximizing video image quality within limited signal bandwidth is the compromise between image quality of and bandwidth consumed by the encoded video signal as represented by an encoding parameter λ. In encoding a video signal, a particular value of encoding parameter λ is selected as a representation of a specific compromise between image detail and the degree of compression achieved. In general, a greater degree of compression is achieved by sacrificing image detail, and image detail is enhanced by sacrificing the degree of achievable compression of the video signal. In the encoding standard H.263, a quantization parameter Q effects such a compromise between image quality and consumed bandwidth by controlling a quantization step size during quantization in an encoding process.
However, a particular value of encoding parameter λ that is appropriate for one motion video signal can be entirely inappropriate for a different motion video signal. For example, motion video signals representing a video image which changes only slightly over time, such as a news broadcast (generally referred to as "talking heads"), can be represented by relatively small P-Patent frames since successive frames differ relatively little. As a result, each frame can include greater detail at the expense of less compression of each frame. Conversely, motion video signals representing a video image that changes significantly over time, such as fast motion sporting events, require larger P-frames since successive frames differ considerably. Accordingly, each frame requires greater compression at the expense of image detail.
Determining an optimum value of encoding parameter λ for a particular motion video signal can be particularly difficult. Such is especially true for some motion video signals, which include both periods of little motion and periods of significant motion. For example, in a motion video signal representing a football game includes periods where both teams are stationary awaiting the snap of the football from the center to the quarterback and periods of sudden extreme motion. Selecting a value of encoding parameter λ which is too high results in sufficient compression that frames are not lost during high motion periods but also in unnecessarily poor image quality during periods were players are stationary or moving slowly between plays.
Conversely, selecting a value of encoding parameter λ that is too low results in better image quality during periods of low motion but likely results in loss of frames due to exceeded available bandwidth during high motion periods.
A third factor in selecting a balance between motion video image quality and conserving available bandwidth is the frame rate of the motion video signal. A higher frame rate, i.e., more frames per second, provides an appearance of smoother motion and a higher quality video image. At the same time, sending more frames in a given period of time consumes more of the available bandwidth. Conversely, a lower frame rate, i.e., fewer frames per second, consumes less of the available bandwidth but provides a motion video signal which is more difficult for the viewer to perceive as motion between frames and, below some threshold, the motion video image is perceived as a "slide show," i.e., a sequence of discrete, stilted, photographic images. However, intermittent loss of frames resulting from exceeding the available threshold as a result of using an excessively high frame rate provides a "jerky" motion video image which is more annoying to viewers than a regular, albeit low, frame rate.
I-frame placement and encoding parameter λ value selection combine to represent a compromise between motion video image quality and conservation of available bandwidth. However, to date, conventional motion video encoders have failed to provide satisfactory motion video image quality within the available bandwidth.
These shortcomings discussed above have significantly reduced the quality and effectiveness of audio/visual Internet transmissions and prevented the widespread application of these technologies. Accordingly, it would be desirable to have systems and methods that allow for high quality two-way transmission of audio and video signals while minimizing bandwidth usage.
Presently, many shortcomings are apparent with current video-conferencing technologies such as Microsoft's Net Meeting®. This program requires the consumer to go to a site, download the software that has an estimated time of one hour at average connect speed via analog modem. Then one must follow a series of steps while having to double click and provide technical in formation about their system, about their method of connection, and where they wish to connect. Upon connecting, they will have to establish a room, share that room's address and password/user names with the conference, and then engage in the conferencing. This is all assuming that the two can coordinate their effort using the same platform.
If successful, at best the conference has a mediocre to low quality video and almost irritating, unfiltered audio, with echoing tendencies that is limited to 1 viewer and 1 producer. Moreover, the software is limited solely to video-conferencing use. In addition, if the consumer has no microphone/camera, they cannot utilize the software. Finally, the session occurs with no regulation or control/direction.
Another area that has suffered as a result of the shortcomings inherent in present audio and visual transmission technologies is the field of online education. Presently, only a few universities are using online education in a limited capacity. Duke University, for example has Masters in Business Administration (MBA) Program that is exclusively online. The University of Phoenix also is using online education. However, at the moment, previously taped "non-interactive" video lectures are all that can be viewed by the students. Homework assignments can be downloaded of the school website, prepared by the student and then emailed to the professor. Students can also enter chartrooms and ask questions from their professors.
Unfortunately, this is the only method by which online education exists today. Although there are many benefits to on line education and the institutions implementing this current system have had a great response, they are obsolete because of the lack of student/teacher interactions.
Such a technological improvement would also prove advantageous in the field of airline security. The FAA, following the terrorist attacks of Sep. 11, 2001 has requested for security methods or systems that would enable viewing the cockpit and the interior of the fuselage of an aircraft in "real time" by multiple government agencies simultaneously.
From the above, it can be seen that there is a great need for a high quality and high speed means of providing interactive audio and video transmission between remote locations. As explained below, the present invention solves this need as well as other shortcomings of prior systems.

This patent is subject to a terminal disclaimer.

Interactive Internet browser based media broadcast


A power net system of a fuel cell vehicle is provided. The power net system includes a fuel cell and a first switching unit that is configured to form and block an electrical connection between an output terminal of the fuel cell and a main bus. A load device diverges and is connected between the output terminal and the first switching unit. A reverse current blocking unit is disposed between the output terminal of the fuel cell and a node from which the load device diverges and is configured to block a current flow to the output terminal of the fuel cell. A second switching unit is configured to form and block an electrical connection between the output terminal of the fuel cell and the load device. A controller operates the first and second switching units to form the electrical connection between the main bus and the load device.

Field of the Disclosure
The present disclosure relates to a power net system of a fuel cell vehicle and a method for controlling the same, and more particularly, to a power net system of a fuel cell vehicle, capable of removing a voltage remaining in a main bus of the power net as well as a voltage of a fuel cell stack during a dangerous situation such as collision, and preventing a risk of exposure to a high voltage, and a method for controlling the same.
Description of the Related Art
A fuel cell system which is applied to a hydrogen fuel cell vehicle as one of environment-friendly vehicles includes a fuel cell stack configured to generate electrical energy from an electrochemical reaction of reaction gas; a hydrogen supply device configured to supply hydrogen as fuel to the fuel cell stack; an air supply device configured to supply air containing oxygen to the fuel cell stack, the oxygen serving as an oxidizer required for an electrochemical reaction; and a heat and water management system configured to adjust the operation temperature of the fuel cell stack to an optimal temperature by discharging heat as a by-product of the electrochemical reaction of the fuel cell stack to the exterior, and perform a water management function.
A fuel cell load device for decreasing and removing the voltage of the fuel cell stack is connected to the fuel cell stack to remove oxygen inside the fuel cell stack while and after the start of the fuel cell vehicle is stopped. The oxygen introduced to the fuel cell stack is removed with remaining hydrogen of the anode, while the current is consumed by the fuel cell load device. When the anode is out of hydrogen (e.g., no hydrogen remains), oxygen cannot be consumed. Thus, to prevent such a situation, the wakeup technology is used to periodically supply hydrogen to the anode. In other words, the fuel cell vehicle requires a separate post process for decreasing the voltage of the fuel cell stack by removing remaining air inside the fuel cell stack after start off, unlike the internal-combustion engine.
To prevent the deterioration of the fuel cell stack and a risk of exposure to a high voltage. When a voltage is formed when oxygen exists in the anode, carbon corrosion occurs at the cathode. Thus, the fuel cell vehicle requires a process of removing oxygen inside the fuel cell stack, preventing an additional oxygen flow, and removing oxygen which is introduced. When a dangerous situation such as collision occurs, the conventional fuel cell vehicle is forced to use the fuel cell load device to decrease the voltage of the fuel cell stack, thereby preventing a risk of exposure to a high voltage.
However, the conventional fuel cell vehicle simply decreases the voltage of the fuel cell stack, and a high voltage remains at a main bus of a power net connected to the fuel cell stack and another high-voltage load. Thus, a risk for exposure to a high voltage still exists. In particular, when the conventional fuel cell vehicle is applied to a fuel cell hybrid vehicle having a main bus connected to a high-voltage battery, a risk of exposure to a high voltage remaining in the main bus may increase.
The foregoing is intended merely to aid in the understanding of the background of the present disclosure, and is not intended to mean that the present disclosure falls within the purview of the related art that is already known to those skilled in the art.

Power net system of fuel cell vehicle and method for controlling the same


A system and method of negotiating Media Gateways (MGs) between a plurality of call control nodes (CCNs). The system includes a first CCN which builds an original list of identifiers associated with at least one MG capable of being used in a call by the first CCN. The system also includes a second CCN for receiving the original list of identifiers from the first CCN. The second CCN removes from the original list any identifiers associated with any MG in the original list of identifiers which is not capable of being used in the call by the second CCN. The second CCN then forms a modified list of identifiers associated with at least one MG capable of being used in a call by the first CCN and the second CCN. The second CCN also selects a specified MG from the modified list and sends a first backward message from the second CCN to the first CCN identifying the specified MG. The first CCN may then validate that the specified MG is on the original list of identifiers and selects the specified MG for the call.

The present invention relates to communications networks. More particularly, and not by way of limitation, the present invention is directed to a system and method for media gateway negotiation in a telecommunications network.
A layered network architecture is commonly used in telecommunication networks. At call setup, a Call Control Node (CCN) acts as a Media Gateway Controller (MGC). The CCN, such as a Mobile service Switching Center (MSC), Gateway MSC (GMSC), a Transit Switching Center (TSC) or a Media Gateway Control Function (MGCF), selects a Media Gateway (MG) to switch the user plane and to provide in-band equipment if necessary.
In many call cases, multiple CCNs are involved in call setup. Call setup information is signaled between CCNs using call control protocols, such as Integrated Services Digital Network User Part (ISUP), Bearer Independent Call Control (BICC) or Session Initiated Protocol (SIP). When a CCN selects a MG, call control protocols may provide a capability to send the identifier of the selected MG to the succeeding CCN. The succeeding CCN has the choice to select the same MG for user plane switching. In many cases selecting the same MG in subsequent CCN's allows better resource utilization in the nodes and in the network.
One typical call setup scenario for telephone calls (mobile or fixed), utilizes a procedure of forward bearer setup. In this scenario, the bearer is established from the calling side towards the called side. FIG. 1 is a simplified block diagram of forward bearer setup utilizing the BICC call control protocol. A preceding CCN 10 and a succeeding CCN 12 each controls a MG (MG 14 and MG 16 respectively) for user plane switching. In order to achieve forward bearer setup, the succeeding CCN 12 selects a MG first and sends a MG identifier and bearer address information backwards to the preceding CCN 10. The preceding CCN 10 then selects the MG and initiates bearer setup procedure. A mobile station (MS) 20 may operate in, for example, a GSM/EDGE Radio Access Network (GERAN) 22. The CCN 10 communicates with the mobile station 20. An MS 24 operates in a GERAN 26 and communicates with the CCN 12. The CCN 10, CCN 12, MS 20, and MS 24 communicate on a signaling plane. The MS 20, MS 24, MG 14, and MS 16 communicate on a user plane.
An Initial Address Message (IAM) message is sent in 30 from CCN 10 to CCN 12 providing call setup information. Next, in 32, the CCN 12 selects the MG 16 and seizes MG resources for the connection end point. An identifier for MG 16 is sent back from CCN 12 to CCN 10 at 34 (e.g., APM (Bearer Control Unit Identifier (BCU-ID)). At 36, the CCN 10 then selects a MG and seizes MG resources for the connection end point. Triggered from CCN 10, MG 14 starts bearer establishment procedures at 38. When Internet Protocol (IP) is used as the user plane transport protocol and BICC is used as the call control protocol, then bearer setup messages are tunneled (not shown) via call control nodes, CCN 10 and CCN 12.
In practice, oftentimes the succeeding node CCN 12 can select from a set of MGs without knowing which MGs can be selected in the preceding node CCN 10. Consequently, there is no guarantee that the MG selected in CCN 12 can also be selected in CCN 10. If CCN 10 and CCN 12 do not select a common MG, longer user plane routes may result.
FIG. 2 is a simplified block diagram of an exemplary existing forward bearer setup utilizing three sites. A network 100 includes a preceding CCN 110 and a succeeding CCN 112. The network includes a MG 114, MG 116, and MG 118. The network includes a MS 122 in a GERAN 124. In addition, FIG. 2 illustrates a Public Switched Telephone Network (PSTN) 126. The CCN 110 and MG 114 are located in site 1. The CCN 12 is located in site 2. The MG 116 is located in site 3 and the MG 118 is located in site 4. The MS 122 and CCN 110, CCN 110 and CCN 112, CCN 110 AND MG 114, CCN 112 and MG 116, CCN 112 and MG 118, and CCN 112 and the PSTN 126 communicate on a signaling plane. The MS 122 communicates with the MG 114, the MG 116 and MG 118, the MG 118 and the PSTN 126, and the MG 114 and the MG 116 communicate on a user plane.
In this example, it is assumed that the CCN 112 has to play an announcement, for example due to Intelligent network (IN) interworking, before the call can be routed to the destination network (e.g., PSTN 126). At the end of the call setup, the MGs on three sides are involved in the call. In 130, a set message is sent from the MS 122 to the CCN 110. Next, in 132, the CCN 110 sends a BICC IAM message to the CCN 112. In 134, the CCN 112 determines that an announcement must be played (e.g., due to IN interworking). Next, in 136, the CCN 112 selects a MG to establish the bearer (user plane) and to play an announcement. As illustrated, CCN 112 selects the MG 116. In 138, the CCN 112 sends an identifier of the MG 116 backwards to the CCN 110. In this example, it is assumed that the CCN 110 is unable to select MG 116. Therefore, in 140, the CCN 110 selects another MG, in this case, MG 114. In 142, a bearer is established between the MG 114 and the MG 116 and CCN 110 establishes as well the connection between MS 122 and MG 114 (not shown). In 144, the CCN 112 continues call setup after the announcement is played. The CCN 112 identifies the call to be routed to the PSTN. Next, in 146, the CCN 112 selects a MG that can connect the user plane to the PSTN, in this case, the MG 118. Another bearer is then established between MG 116 and MG 118 at 148 and between MG 118 and PSTN 126.
Existing forward bearer setups suffer from the disadvantage of oftentimes utilizing unnecessarily long user plane routes. In addition, extra network resources are utilized for the bearer setup. It would be advantageous to have a bearer setup which conserves network resources while providing a forward bearer setup.

System and method for media gateway negotiation


A software mechanism for enabling a programmer to embed selected machine instructions into program source code in a convenient fashion, and optionally restricting the re-ordering of such instructions by the compiler without making any significant modifications to the compiler processing. Using a table-driven approach, the mechanism parses the embedded machine instruction constructs and verifies syntax and semantic correctness. The mechanism then translates the constructs into low-level compiler internal representations that may be integrated into other compiler code with minimal compiler changes. When also supported by a robust underlying inter-module optimization framework, library routines containing embedded machine instructions according to the present invention can be inlined into applications. When those applications invoke such library routines, the present invention enables the routines to be optimized more effectively, thereby improving run-time application performance. A mechanism is also disclosed using a xe2x80x9c_fpregxe2x80x9d data type to enable floating-point arithmetic to be programmed from a source level where the programmer gains access to the full width of the floating-point register representation of the underlying processor.

This invention relates generally to the compilation of computer code performing floating-point arithmetic operations on floating-point registers, and more particularly to enabling, via a new data type, access in source code to the full width of the floating point register representation in the underlying processor.
Source-level languages like C and C++ typically do not support constructs that enable access to low-level machine-instructions. Yet many instruction set architectures provide functionally useful machine instructions that cannot readily be accessed from standard source-level constructs.
Typically, programmers, and notably operating system developers, access the functionality afforded by these special (possibly privileged) machine-instructions from source programs by invoking subroutines coded in assembly language, where the machine instructions can be directly specified. This approach suffers from a significant performance drawback in that the overhead of a procedure call/return sequence must be incurred in order to execute the special machine instruction(s). Moreover, the assembly-coded machine instruction sequence cannot be optimized along with the invoking routine.
To overcome the performance limitation with the assembly routine invocation strategy, compilers known in the art, such as the Gnu C compiler (xe2x80x9cgccxe2x80x9d), provide some rudimentary high-level language extensions to allow programmers to embed a restricted set of machine instructions directly into their source code. In fact, the 1990 American National Standard for Information Systemsxe2x80x94Programming Language C (hereinafter referred to as the xe2x80x9cANSI Standardxe2x80x9d) recommends the xe2x80x9casmxe2x80x9d keyword as a common extension (though not part of the standard) for embedding machine instructions into source code. The ANSI Standard specifies no details, however, with regard to how this keyword is to be used.
Current schemes that employ this strategy have drawbacks. For instance, gcc employs an arcane specification syntax. Moreover, the gcc optimizer does not have an innate knowledge of the semantics of embedded machine instructions and so the user is required to spell out the optimization restrictions. No semantics checks are performed by the compiler on the embedded instructions and for the most part they are simply xe2x80x9cpassed throughxe2x80x9d the compiler and written out to the target assembly file.
Other drawbacks of the inline assembly support in current compilers include:
(a) lack of functionality to allow the user to specify scheduling restrictions associated with embedded machine instructions. This functionality would be particularly advantageous with respect to privileged instructions.
(b) imposition of arbitrary restrictions on the kind of operands that may be specified for the embedded machine instructions, for example:
the compiler may require operands to be simple program variables (where permitting an arbitrary arithmetic expression as an operand would be more advantageous); and
the operands may be unable to refer to machine-specific resources in a syntactically natural manner.
(c) lack of functionality to allow the programmer to access the full range and precision of internal floating-point register representations when embedding floating-point instructions. This functionality would simplify high-precision or high-performance floating-point algorithms.
(d) imposition of restrictions on the ability to inline library procedures that include embedded machine instructions into contexts where such procedures are invoked, thereby curtailing program optimization effectiveness.
In addition, when only a selected subset of the machine opcodes are permitted to be embedded into user programs, it may be cumbersome in current compilers to extend the embedded assembly support for other machine opcodes. In particular, this may require careful modifications to many portions of the compiler source code. An extensible mechanism capable of extending embedded assembly support to other machine opcodes would reduce the number and complexity of source code modifications required.
It would therefore be highly advantageous to develop a compiler with a sophisticated capability for processing machine instructions embedded in high level source code. A xe2x80x9cnaturalxe2x80x9d specification syntax would be user friendly, while independent front-end validation would reduce the potential for many programmer errors. Further, it would be advantageous to implement an extensible compiler mechanism that processes source code containing embedded machine instructions where the mechanism is smoothly receptive to programmer-defined parameters indicating the nature and extent of compiler optimization permitted in a given case. A particularly useful application of such an improved compiler would be in coding machine-dependent xe2x80x9clibraryxe2x80x9d functions which would otherwise need to be largely written in assembly language and would therefore not be subject to effective compiler optimization, such as inlining.
In summary, there is a need for a compiler mechanism that allows machine instructions to be included in high-level program source code, where the translation and compiler optimization of such instructions offers the following advantageous features to overcome the above-described shortcomings of the current art:
a) a xe2x80x9cnaturalxe2x80x9d specification syntax for embedding low-level hardware machine instructions into high-level computer program source code.
b) a mechanism for the compiler front-end to perform syntax and semantic checks on the constructs used to embed machine instructions into program source code in an extensible and uniform manner, that is independent of the specific embedded machine instructions.
c) an extensible mechanism that minimizes the changes required in the compiler to support additional machine instructions.
d) a mechanism for the programmer to indicate the degree of instruction scheduling freedom that may be assumed by the compiler when optimizing high-level programs containing certain types of embedded machine instructions.
e) a mechanism to xe2x80x9cinlinexe2x80x9d library functions containing embedded machine instructions into programs that invoke such library functions, in order to improve the run-time performance of such library function invocations, thereby optimizing overall program execution performance.
Such features would gain yet further advantage and utility in an environment where inline assembly support could gain access to the full width of the floating point registers in the target processor via specification of a corresponding data type in source code.
These and other objects and features are achieved by one embodiment of the present invention which comprises the following:
1. A general syntax for embedding or xe2x80x9cinliningxe2x80x9d machine (assembly) instructions into source code. For each machine instruction that is a candidate for source-level inlining, an xe2x80x9cintrinsicxe2x80x9d (built-in subroutine) is defined. A function prototype is specified for each such intrinsic with enumerated data types used for instruction completers. The function prototype is of the following general form:
opcode_result=_Asm_opcode (opcode_argument_list[, serialization_constraint_specifier])
where _Asm_opcode is the name of the intrinsic function (with the xe2x80x9copcodexe2x80x9d portion of the name replaced with the opcode mnemonic). Opcode completers, immediate source operands, and register source operands are specified as arguments to the intrinsic and the register target operand (if applicable) corresponds to the xe2x80x9creturn valuexe2x80x9d of the intrinsic.
The data types for register operands are defined to match the requirements of the machine instruction, with the compiler performing the necessary data type conversions on the source arguments and the return value of the xe2x80x9cinline-assemblyxe2x80x9d intrinsics, in much the same way as for any user-defined prototyped function.
Thus, the specification syntax for embedding machine instructions in source code is quite xe2x80x9cnaturalxe2x80x9d in that it is very similar to the syntax used for an ordinary function call in most high-level languages (e.g. C, C++) and is subject to data type conversion rules applicable to ordinary function calls.
Further, the list of arguments for the machine opcode is followed by an optional instruction serialization_constraint_specifier. This feature provides the programmer a mechanism to restrict, through a parameter specified in source code, compiler optimization phases from re-ordering instructions across an embedded machine instruction.
This feature is highly advantageous in situations where embedded machine instructions may have implicit side-effects, needing to be honored as scheduling constraints by the compiler only in certain contexts known to the user. This ability to control optimizations is particularly useful for operating system programmers who have a need to embed privileged low-level xe2x80x9csystemxe2x80x9d instructions into their source code.
Serialization_constraint_specifiers are predefined into several disparate categories. In application, the serialization_constraint_specifier associated with an embedded machine instruction is encoded as a bit-mask that specifies whether distinct categories of instructions may be re-ordered relative to the embedded machine instruction to dynamically execute either before or after that embedded machine instruction. The serialization constraint specifier is specified as an optional final argument to selected inline assembly intrinsics for which user-specified optimization control is desired. When this argument is omitted, a suitably conservative default value is assumed by the compiler.
2. A mechanism to translate the source-level inline assembly intrinsics from the source-code into a representation understood by the compiler back-end in a manner that is independent of the specific characteristics of the machine instruction being inlined.
The inline assembly intrinsics are xe2x80x9cloweredxe2x80x9d by the compiler front end into a built-in function-call understood by the code generation phase of the compiler. The code generator in turn expands the intrinsic into the corresponding machine instruction which is then subjected to low-level optimization.
An automated table-driven approach is used to facilitate both syntax and semantic checking of the inline assembly intrinsics as well as the translation of the intrinsics into actual machine instructions. The table contains one entry for each intrinsic, with the entry describing characteristics of that intrinsic, such as its name and the name and data types of the required opcode arguments and return value (if any), as well as other information relevant to translating the intrinsic into a low-level machine instruction.
The table is used to generate (1) a file that documents the intrinsics for user programmers (including their function prototypes) (2) a set of routines invoked by the compiler front-end to parse the supported inline assembly intrinsics and (3) a portion of the compiler back-end that translates the built-in function-call corresponding to each intrinsic into the appropriate machine instruction.
This table-driven approach requires very few, if any, changes to the compiler when extending source-level inline assembly capabilities to support the embedding of additional machine instructions. It is usually sufficient just to add a description of the new machine instructions to the table, re-generate the derived files, and re-build the compiler, so long as the low-level components of the compiler support the emission of the new machine instructions.
3. Where supported by a cross-module compiler optimization framework, a mechanism to capture the intermediate representation into a persistent format enables cross-module optimization of source-code containing embedded machine instructions. In particular, library routines with embedded machine instructions can themselves be xe2x80x9cinlinedxe2x80x9d into the calling user functions, enabling more effective, context-sensitive optimization of such library routines, resulting in improved run-time performance of applications that invoke the library routines. This feature is highly advantageous, for instance, in the case of math library routines that typically need to manipulate aspects of the floating-point run-time environment through special machine instructions.
The inventive machine instruction inlining mechanism is also advantageously used in conjunction with a new data type which enables programmatic access to the widest mode floating-point arithmetic supported by the processor. As noted in the previous section, inline support in current compilers is generally unable to access the full range and precision of internal floating-point register representations when embedding floating-point instructions. Compiler implementations typically map source-level floating-point data types to fixed-width memory representations. The memory width determines the range and degree of precision to which real numbers can be represented. So, for example, an 8-byte floating-point value can represent a larger range of real numbers with greater precision than a corresponding 4-byte floating-point value. On some processors, however, floating-point registers may have a larger width than the natural width of source-level floating-point data types, allowing for intermediate floating-point results to be computed to a greater precision and numeric range; but this extended precision and range is not usually available to the user of a high-level language (such as C or C++).
In order to provide access to the full width of the floating point registers for either ordinary floating-point arithmetic or for inline assembly constructs involving floating-point operands, therefore, a new built-in data type is also disclosed herein, named xe2x80x9c_fpregxe2x80x9d for the C programming language, corresponding to a floating point representation that is as wide as the floating-point registers of the underlying processor. Users may take advantage of the new data type in conjunction with the disclosed methods for the embedding of a machine instruction by using this data type for the parameters and/or return value of an intrinsic that maps to a floating-point machine instruction.
It is therefore a technical advantage of the present invention to enable a flexible, easy to understand language-compatible syntax for embedding or inlining machine instructions into source code.
It is a further technical advantage of the present invention to enable the compiler to perform semantic checks on the embedded machine instructions that are specified by invoking prototyped intrinsic routines, in much the same way that semantic checks are performed on calls to prototyped user routines.
It is a still further technical advantage of the present invention to enable inline assembly support to be extended to new machine instructions in a streamlined manner that greatly minimizes the need to modify compiler source code.
It is a yet further technical advantage of the present invention to enable user-controlled optimization of embedded low-level xe2x80x9csystemxe2x80x9d machine instructions.
It is another technical advantage of the present invention to enable, where supported, cross-module optimizations, notably inlining, of library routines that contain embedded machine instructions.
Another technical advantage of the present invention is, when used in conjunction with the new _fpreg data type also disclosed herein, to support and facilitate reference to floating-point machine instructions in order to provide access to the full width of floating-point registers provided by a processor.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and the specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes as the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.

Programmatic access to the widest mode floating-point arithmetic supported by a processor

Hewlett-Packard Development Company, L.P.


The present invention relates to a method of generating a gene library from an environmental pool of organisms, which gene library is enriched in DNA encoding a polypeptide with an activity of interest. Also, the invention provides a method of selecting a DNA sequence of interest from an environmental pool of organisms. Further, the invention relates to a gene library prepared from an enriched environmental pool of organisms enriched in DNA encoding a polypeptide with an activity of interest.

The present invention relates to a method of generating a gene library from an environmental pool of organisms, which gene library is enriched in DNA encoding a polypeptide with an activity of interest.
The advent of recombinant DNA techniques has made it possible to select single protein components with interesting properties and produce them on a large scale. This represents an improvement over the previously employed production process using microorganisms isolated from nature and producing a mixture of proteins which would either be used as such or separated after the production step. Methods have been developed for rapid identification of genes encoding a polypeptide of interest.
One example is the so called expression cloning technique described in WO 93/11249 (Novo Nordisk A/S). The technique disclosed in WO 93/11249 comprises a method of screening for a DNA sequence in a DNA library prepared from an organism suspected of producing genes encoding polypeptides with activities of interest. Such a library has traditionally been made on DNA isolated from a single known microorganism.
A compartmentalization method of screening microorganisms having a selectable characteristic has previously been devised in WO 97/37036, and a process for forming a normalized genomic DNA library from an environmental sample is described in WO 97/37036.
However, a method of generating a gene library from an environmental pool of organisms, which gene library is enriched in DNA encoding a polypeptide with an activity of interest has never been described. Therefore, it would be desirable to have a method based on biological enrichment for selecting potentially interesting genes from environmental pool of organisms.
It has now been found possible to use biological enrichment for selecting potentially interesting genes from an environmental pool of organisms. Accordingly, the invention provides a method for generating a gene library from an environmental pool of organisms, which gene library is enriched in DNA encoding a polypeptide with an activity of interest, which method comprises:
a) subjecting the environmental pool of organisms to cultivation in a medium and/or under conditions suitable for enriching said pool of organisms in organisms harbouring said DNA; and
b) preparing a gene library from the resulting enriched pool of organisms.
The invention also provides a method of selecting a DNA sequence of interest from an environmental pool of organisms, which method comprises:
a) subjecting the environmental pool of organisms to cultivation in a medium and/or conditions suitable for enriching said pool of organisms in organisms harbouring said DNA sequence;
b) producing gene libraries from the resulting enriched pool of organisms;
c) screening the libraries for DNA containing the desired gene; and
d) selecting the DNA sequence of interest resulting from the screening of step c).
Further, the invention relates to a gene library prepared from an enriched environmental pool of organisms enriched in DNA encoding a polypeptide with an activity of interest.
It is an object of the present invention to provide a method for generating a gene library from an environmental pool of organisms, which gene library is enriched in DNA encoding a polypeptide with an activity of interest, which method comprises:
a) subjecting the environmental pool of organisms to cultivation in a medium and/or under conditions suitable for enriching said pool of organisms in organisms harbouring said DNA; and
b) preparing a gene library from the resulting enriched pool of organisms.
In the context of the present invention, the term xe2x80x9can environmental pool of organismsxe2x80x9d means a environmental sample comprising microorganisms and cells from higher animals harboring DNA encoding a polypeptide with an activity of interest. The environmental sample may for instance be an environmental sample of soil or plant material, animal or insect dung, insect gut, animal stomach, a marine sample of sea or lake water, sewage, waste water, a sample of sludge or sediment, etc., comprising one or, as in most case, a vast number of different microorganisms or living cells.
In step a), the sample as such is cultivated without any need for further purification. By selecting the medium and the cultivation conditions at which the sample is cultivated, it is possible for enriching or (amplifying) organisms having optimal growth at the specific cultivation conditions, and expressing polypeptides with properties adapted to the cultivation conditions. The gene library prepared in step b) may be prepared by any suitable technique known in the art, non-limiting examples of which are described in Example 3 and 4.
The advantage presented by the present screening method is primarily that the rate at which novel genes may be isolated and, consequently, novel products be developed may be greatly increased. Furthermore, the method permits screening for multiple polypeptides activities and may even result in the isolation of several different genes coding for the same type of polypeptides.
By use of the invention it is possible to exploit enriched cultures for detecting novel enzymes, and other polypeptides with an activity of interest.
In a preferred embodiment, the method of the invention comprises subjection the environmental pool of organisms to cultivation in a medium, which contains a substrate for the polypeptide with the desired activity. A wide range of substrates for the enrichment of the environmental of organisms containing different types of gene products may be used. For instance, a DNA encoding a polypeptide with an activity of interest such as a pectinase enzyme may be selected as a gene product on a substrate as pectin.
In a preferred embodiment, the substrate constitutes the carbon source and/or nitrogen source of the medium.
In a more preferred embodiment, the substrate comprises pectin, amylose, cellulose, galactan, xylan, arabinan, mannan, lipid or hemicellulose or a combination thereof.
In a preferred embodiment of the method of the invention, the enrichment is achieved by one or more growth conditions. In a another preferred embodiment, the growth conditions comprise pH and temperature. In yet another preferred embodiment, the growth conditions of step a) used for achieving the enrichment comprises any pH range ie. 0-12, preferably of about 6-9, in particular 9-12, at any temperature range i.e. 0-120xc2x0 C., preferably about 25-30xc2x0, preferably 30-500xc2x0, most preferred 50-70xc2x0 C.
An important step in the procedure for selection of a potentially interesting environmental pool of organisms is to select the optimal pool to start from. To select genes encoding polypeptides that can break down natural compounds of plant (or animal) origin, it is preferable to look into those biotopes in nature where such materials are efficiently decomposed. Examples of animals especially efficient in breaking down plant material are the ruminates, termites and insects (sensu lato).
In a preferred embodiment, the environmental pool of microorganisms is isolated from an animal stomach or an insect gut.
In a more preferred embodiment, the pool of microorganisms is isolated from a cow""s rumen.
Likewise, it is important when selecting genes encoding polypeptides with an activity of interest that are capable of working under e.g. strongly alkaline conditions, to isolate the pool of organisms from an equally strongly alkaline biotope. It is known in the art that in order for Bacillus thuringensis (Bt) toxins to be active, strongly alkaline conditions are a prerequisite [Bacillus thuringensis, an environmental biopesticide: Theory and Practice, 1993, eds. P. F. Entwistl et al., Wiley and Son, UK]. The guts of the larvae belonging to the orders of insects known to be sensitive to the Bt toxins comprise environmental pools of a high alkaline nature (approx pH 10). Such insect orders are especially Isoptera, Lepidoptera, Coleoptera and Diptera.
Consequently in a preferred embodiment, the pool of microorganisms is isolated from the gut of an insect of the Isoptera, Lepidoptera, Coleoptera, or Diptera families.
In a more preferred embodiment, the pool of microorganisms is isolated from the gut of insects selected from the group consisting of Agrotis, Neotermes castaneus, Tineola bisselliella, and Melolontha vulgaris.
Prior to isolating environmental pools of organisms from animal stomachs or insect guts, it is interesting to do an enrichment by rearing or supplying the animal or insect with food comprising a substrate for the activity of the polypeptide of interest, maybe even as the primary carbon and/or nitrogen source. This makes a cow""s rumen and larval guts from Lepidopteran, Coleopteran and Dipteran species highly interesting for further enrichment through feeding with specific substrates.
In a preferred embodiment the pool of microorganisms is enriched by supplying feed to the animal or insect, which comprises a substrate for the polypeptide with an activity of interest.
Specific examples of xe2x80x9cDNA encoding a polypeptide with an activity of interestxe2x80x9d include among others enzymatic activity and anti-microbial activity.
In a preferred embodiment, the gene libraries are enriched in DNA encoding an enzyme activity of interest.
In a more preferred embodiment of the invention the activity of interest is an enzymatic activity, such as an activity selected from the group comprising of phosphatases oxidoreductases (E.C. 1), transferases (E.C. 2); hydrolases (E.C. 3), such as esterases (E.C. 3.1), in particular lipases and phytase; such as glucosidases (E.C. 3.2), in particular xylanase, cellulases, hemicellulases, and amylase, such as peptidases (E.C. 3.4), in particular proteases; lyases (E.C. 4); isomerases (E.C. 5); ligases (E.C. 6).
In another preferred embodiment, the enzyme of interest comprises a protease, lipase, beta-galactosidase, lactase, polygalacturonase, beta-glucoamylase, esterase, hemicellulase, peroxidasee, oxidase, laccase or glucose oxidase.
In more preferred embodiment, the enzymes obtained in the method is an amylase, in particular an xcex1-amylase or a xcex2-amylase, an arabinanase, an arabinofuranosidase, a galactanase, an xcex1-galactosidase, a xcex2-galactosidase, a polygalacturonase, a pectin methyl esterase, a rhamnogalacturonase, a rhamnogalacturon acetyl esterase, a pectin lyase, a xylanase, a cellulase, a xcex2-glucosidase, a cellobiohydrolase, a xylosidase, a mannanase, and/or a glucuronisidase.
The environmental pool of organisms containing DNA encoding a polypeptide with an activity of interest are typically microorganisms such as Eubacteria, Archaebacteria, fungi, algae and/or protozoa.
The polypeptide may be an enzyme of interest obtained from any known organism. Preferably the enzyme may be obtained from microorganism, in particular from a bacteria, from a filamentous fungus or a yeast.
In the method of the invention, the organisms are enriched cultures meaning that the cultures are selected on a specific substrate from which other organisms are not able to grow or having a reduced growth.
It is another object of the invention to provide a method of selecting a DNA sequence of interest from an environmental pool of organisms, which method comprises:
a) subjecting the environmental pool of organisms to cultivation in a medium and/or conditions suitable for enriching said pool of organisms in organisms harbouring said DNA sequence;
b) producing gene libraries from the resulting enriched pool of organisms;
c) screening the libraries for DNA containing the desired gene; and
d) selecting the DNA sequence of interest resulting from the screening of step c).
Step a) and b) are as described above. In step c), clones found to comprise a DNA sequence originated from the prepared gene library in step b) may be screened for any activity of interest. Examples of such activities include enzymatic activity, anti-microbial activity or biological activities. In step c), gene libraries are screened for genomic DNA containing the desired gene, and in step d), the DNA sequence of interest are selected from the screening of step c). Step c) and d) may be performed by standard methods known in the art.
The polypeptide with the activity of interest may then be tested for a desired performance under specific conditions and/or in combination with e.g. chemical compounds or agents. The gene libraries may be screened according to the method of the invention for a polypeptide with an activity of interest e.g. a specific activity, and/or a specific property of interest such as thermostability, high pH tolerance, wash performance, textile dyeing, hair dyeing or bleaching properties, a effect in feed or food ect. The appropriate assay for testing for a desired activity and/or property well be known to the skilled person.
In a preferred embodiment of the method, the gene library comprises an enzyme-encoding gene of interest, and the gene library is screened for enzymes under conditions which the enzyme is active. This means that the library may be screened for enzymes at e.g. high ,temperatures such as 60-110xc2x0 C. and high pH such as 10-12 e.g. in cases where it is desired to isolate a DNA sequence encoding an alkaline enzyme with a relatively high thermostability. However, pH can be in any range e.g. of from about 0 to about 12, and the temperature in any range e.g. of from about 5 to about 110xc2x0 C., preferably of from about 60 to about 90xc2x0 C.
It is still another object of the invention to provide a gene library prepared from an environmental pool of organisms enriched in DNA encoding an polypeptide with an activity of interest. In a preferred embodiment, the gene library comprises a polypeptide with an activity of an enzyme, a hormone or a toxin. In a more preferred embodiment, the gene library comprises an enzyme activity of interest as described above.


In a process for producing leaves (20, 20′) for a leaf seal, in particular as a seal for a gas turbine, which leaves (20, 20′) are laterally delimited by a peripheral edge contour and have regions of different thicknesses (d1, d2), a simplification, without sacrificing precision, is achieved by virtue of the edge contour of the leaves (20, 20′) being cut out of a metal sheet (28) by an etching process and the regions of different thicknesses (d1, d2) also being produced simultaneously as part of the etching process.

1. Field of the Invention
The present invention deals with the field of seals for rotary machines and to a process for producing leaves for a leaf seal.
2. Brief Description of the Related Art
A gas turbine includes a rotor, on which there are arranged various stages having compressor blades and turbine blades, as well as a stator housing. The rotor is mounted in bearings at each end of the rotor shaft.
Control of the gas flow within the gas turbine is of great importance both with regard to the functionality and with regard to the efficiency. At various points along the rotor shaft, seal technologies are used to reduce the axial flow of gas along the shaft. This is particularly important next to the bearings, in order to prevent the oil used in the bearings from being overheated by the hot gases of the gas stream.
Traditionally, two types of seal technologies—generally as alternatives but sometimes also in combination with one another—are used in this situation. These are labyrinth seals and brush seals.
In labyrinth seals, there is no metal-to-metal contact between the rotor and the stator; therefore, their sealing effect is relatively slight. However, they offer the advantage of low rotary friction, and consequently a virtually unlimited service life.
Brush seals, on the other hand, have higher friction losses on account of the friction between the ends of the bristles and the rotor shaft. This leads to wear, which limits the service life of the seal. However, brush seals offer improved inhibition of the axial gas flow, particularly in the case of relatively high axial pressure differences.
There are numerous restrictions on the use of these technologies for sealing purposes in gas turbines. First, the axial pressure difference which they are able to withstand is still rather low. In the case of brush seals, this is because of the bristles, which have the same rigidity in the axial and circumferential directions: high pressures can cause the bristles to blow back onto themselves in the axial direction. The seals also have little ability to permit and withstand significant radial movement.
The design of a brush seal is often a compromise between the use of a support plate, which is intended to provide sufficient axial support, and the aim not to restrict the radial movement.
To avoid the drawbacks of the known brush seals, U.S. Pat. No. B1 6,343,792 has proposed a leaf seal which performs the same function as either a labyrinth seal or a brush seal but has the advantages of both. Instead of the bristles, which are made from wires of circular cross section, thin metal leaves or lamellae are assembled in a set arrangement (cf. for example FIG. 3 of U.S. Pat. No. B1 6,343,792 or FIG. 1 of the present application). The leaves, whose surfaces are oriented substantially parallel to the axial direction, are much more rigid in the axial direction than in the circumferential direction. This means that the seal is able to withstand higher pressure differences without its ability to permit radial movements being restricted. Also, the wide area on the rotor which is covered by the tips of the leaves offers the option of generating a hydrodynamic force which can separate the leaf tips from the shaft during operation. This makes it possible to produce and maintain a spacing of a few micrometers, so that the wear, frictional heat and friction losses are reduced to almost zero.
The basic design incorporates a number of thin metal leaves which between them have a controlled air gap and are secured at a predetermined angle with respect to the radius. The air gap is a critical design parameter. It allows an air flow to occur in order thereby to generate the hydrodynamic effect; however, it must not be large enough to permit an excessive axial leakage flow.
Two variants of the leaf seal design are possible: in one variant, the leaves are blown downward, while in the other variant they are blown upward. The variant with the leaves which are blown downward includes the possibility of there being a spacing between the leaf tips and the shaft during assembly and start-up and of this gap being decreased in size to very small values by the use of an air stream between the leaves. On the other hand, the variant in which the leaves are blown upward includes the possibility of the leaf tips and shaft influencing one another slightly during start-up, and of producing a spacing when the shaft accelerates. In both cases, the flow of the medium through the air gaps between the leaves is critical, as is the control of the internal diameter of the seal which is produced by the leaf tips.
The air flow through the leaves can be altered by using a front plate and a rear plate, which leave clear a narrow gap between the surfaces of the set of leaves and the plates (cf. the above-referenced FIG. 1 and 3). Careful design of these geometries makes it possible to control the upward or downward blowing effects. It may also be desirable for the downward blowing effect to be assisted by active supply of pressure along the length of the leaves or inward from the front side or from the rear-side directions.
One of the other main advantages of the leaf seal concept is a greater tolerance for the radial movement than in the case of the labyrinth or brush seals. There, this requires a considerable distance between the internal diameter of the front and rear-side plates and the shaft.
Depending on the selected geometry for the seal and on the diameter of the shaft to be sealed, the number of leaves may be a few thousand or tens of thousands. The accuracy with which they can be produced, assembled, and connected, while ensuring a reproducible air gap between each pair of leaves, is critical for successful implementation of any possible seal design.
The joining method for fixing the leaves in position could be a mechanical technique, such as clamping, welding, or brazing, or any possible combination thereof. In this context, it is very obviously important that there should be minimum disruption to the leaves or their relative positions during the joining process.
In particular the spacer elements which are placed between the leaves and set the width of the air gap are of importance in this context. The spacer elements can be designed as separate elements. This has the advantage that the leaves are relatively simple to produce, as elements of constant thickness. However, this also has the drawback that the spacer elements have to be produced separately and that the alternating assembly of the leaves and spacer elements to form a set of leaves is complex and can easily give rise to positioning errors. However, it is also possible for the spacer elements to be designed as integral elements of the leaves, which considerably simplifies assembly. In this case, however, the leaves have to be subjected to special machining in order to form the regions of different thicknesses.
To this end, it has already been proposed in the above-referenced U.S. Pat. No. B1 6,343,792 (cf. FIG. 27B of that document and the associated description in column 21, lines 25-34) that the stepped thickness regions of the leaves be produced with an integral spacer element by means of etching. The etching technique allows accurate setting of the thicknesses. However, a drawback in this case is that the etching, after the leaves have been cut to size, introduces an additional process step which complicates and lengthens production.

Process for producing leaves for leaf seal


A column latch and a high voltage switch connected to each bit line are eliminated, and an address counter and the data latch are newly provided. The data latch is arranged between an I/O buffer and a Y gate. In a programming cycle, the address counter is activated and transfer gates in the Y gate are successively selected. Consequently, a high voltage Vpp or 0 V is applied periodically to bit lines in the memory cell array in accordance with the write data stored in the data latch.

1. Field of the Invention
The present invention relates to a semiconductor memory device and, more specifically, to an electrically programmable and erasable non-volatile semiconductor memory device in which a plurality of bytes can be programmed/erased at one time, and to a method of operating the same.
2. Description of the Background Art
FIG. 19 is a cross sectional view of a general electrically programmable/erasable non-volatile semiconductor memory device (hereinafter referred to as an EEPROM).
Referring to FIG. 19, the memory cell structure of the EEPROM will be briefly described. N.sup.+ impurity regions 2, 3 and 10 are formed spaced apart by a prescribed distance on a main surface of a P.sup.- semiconductor substrate 1. A gate electrode 4 is formed on a region between impurity regions 2 and 3 with an insulating film formed of oxide interposed. A floating gate 7 electrically insulated by a very thin oxide film (tunnelling oxide film) 6 of about 100.ANG. is formed on impurity region 3, and a control gate 8 with interposed insulating film is formed thereon. Thus, a memory transistor (two-layered gate transistor) 9 having a two-layered gate structure is provided.
In the EEPROM, 1 bit of memory cell is formed by a selecting transistor and a memory transistor 9. Impurity region 2 is connected to a bit terminal BL, a gate electrode 4 is connected to a word terminal WL, and impurity region 10 is connected to a source terminal SL. Control gate 8 is connected to a control gate terminal CG.
In an actual memory cell array, gate electrode 4 is connected to a word line for selection in the row direction of the memory cell array, and impurity region 2 is connected to a bit line for selection in the column direction. Impurity region 10 is connected to a source line.
The operation of the memory cell shown in FIG. 19 will be described.
A high voltage Vpp (generally, about 12 V) is applied to the bit terminal BL and word terminal WL of the memory cell, 0 V is applied to the control gate terminal CG and the source terminal SL is set to a high impedance state. Then, a very strong electric field is applied from floating gate 7 to the oxide film 6 in the direction of impurity region 3, and electrons are drawn from floating gate 7 to impurity region 3 because of tunneling phenomenon. Consequently, the potential of floating gate 7 attains positive, and two-layered gate transistor 9 turns on even if 0 V is applied to control gate 8. More specifically, two-layered gate transistor 9 is set to a depression state. This state is called a programmed state which corresponds to data "0".
A high voltage Vpp (generally, 12 V) is applied to control gate terminal CG of the memory cell, 0 V is applied to the bit terminal BL and a high level signal is applied to the word terminal WL. The source terminal SL is applied with 0 V or it is set to a high impedance state. Then a very strong electric field is applied to oxide film 6 from impurity region 3 in the direction of floating gate 7, and electrons are introduced from impurity region 3 to floating gate 7 because of tunneling phenomenon. Consequently, the potential of floating gate 7 attains negative, and two-layered gate transistor 9 does not turn on when 0 V is applied to control gate 8. Namely, two-layered gate transistors 9 is set to an enhancement state. This state is called an erased state, which corresponds to data "1".
The above described erasing and programming operations of the memory cell are collectively defined as writing.
In order to read information (data) written in the memory cell, the potential of the word terminal WL is set to a high level, and 0 V is generally applied to the control gate terminal CG, and whether or not a current flows between the bit terminal BL and source terminal SL is detected.
FIG. 20 shows relation between a current ICE11 flowing between the bit terminal BL and the source terminal SL and the voltage VCG applied to the control gate terminal CG at the programmed state and the erased state. If VCG=0 V and the current flows, it means that the memory cell is at the programmed state, and if the current does not flow, it can be determined that the memory cell is at the erased state.
FIG. 21 is a block diagram showing a chip structure of a general EEPROM, and FIG. 22 is a schematic diagram showing specific circuit structure of the memory cell array and the periphery.
Referring to FIG. 21, a memory cell array 11 includes a plurality of memory cells arranged in a matrix. A plurality of word lines are arranged corresponding to a plurality of rows of the memory cell. A plurality of bit lines are arranged corresponding to a plurality of columns of the memory cells. Address signals for selecting addresses in memory cell array 11 are input through address terminals A0 to Ak to a X address buffer 12 and a Y address buffer 13. A X decoder 14 receives an output signal from X address buffer 12 and selects one word line from the plurality of word lines. A Y decoder 15 receives an output signal from Y address buffer 13 and selects a bit line corresponding to 1 data from the plurality of bit lines.
A Y gate 18 receives an output signal from Y decoder 15, and connects the selected bit line to a write driver 16 and to a sense amplifier 17. An I/O buffer 19 inputs an input data applied from data input/output terminals D0 to D7 to write driver 16, or outputs output data applied from sense amplifier 17 to data input/output terminals D0 to D7. Write driver 16 transmits the input data to the bit line in memory cell array 11 through Y gate 18, and further writes the data to a column latch group 20 through a transfer gate group 21. Sense amplifier 17 detects whether or not the selected memory cell is at the programmed state or at the erased state.
A Vpp switch group 22 applies a high voltage to the bit line in memory cell array 11 in accordance with the data latched in column latch group 20. A charge pump 23 generates a high voltage from an external power supply which is necessary at writing. An erasure/program timing control circuit 24 controls timing of the erasing and programming operations.
An output enable terminal 0E receives an output enable signal designating whether it is an output enabled state or not; a chip enable terminal CE receives a chip enable signal designating whether or not it is a chip active state or not; and a write enable terminal WE receives a write enable signal designating whether it is a write enable state or not. A write/read control circuit controls chip mode in response to the output enable signal, the chip enable signal and the write enable signal.
The circuit structure of the memory cell array 11 and the periphery thereof will be described in detail with reference to FIG. 22.
In memory cell array 11, a plurality of word lines WL1 to WLn are arranged corresponding to a plurality of rows of memory cells, and a plurality of bit lines are arranged corresponding to a plurality of columns of memory cells. A plurality of control gates CG1 to CGn are arranged corresponding to the plurality of rows of the memory cells. The plurality of bit lines are classified into bytes 1 to m each including 8 bit lines BL0 to BL7. All the memory cells (memory cells of the bytes 1 to m) connected to one word line are called a page.
Column latch group 20 includes a plurality of column latches 200, transfer gate group 21 includes a plurality of transfer gate 210, and Vpp switch group 22 includes a plurality Vpp switches 220.
In order to enable collective erasure/programming page by page, one column latch 200 and one Vpp switch 220 are connected to each bit line. A Vpp switch 230 for applying a high voltage to control gates CG1 to CGn is connected to a control gate activating line CGA. The control gate activating line CGA is arranged parallel to bit lines BL0 to BL7. Y decoder 15 is connected to m Y gate lines Y1 to Ym corresponding to the bytes 1 to m. Y gate 18 includes m sets of transfer gates G1 to Gm corresponding to bytes 1 to m. Y gate lines Y1 to Ym are respectively connected to transfer gates G1 to Gm.
A series of erasing/programming operation of the EEPROM shown in FIGS. 21 and 22 will be described with reference to the timing chart of FIG. 23.
In FIG. 23, the reference character T1 shows a write cycle for writing externally input write data to a prescribed column latch 200, T2 shows an erasing cycle for setting all memory cells of the page selected by the word line to the erased state, and T3 shows a program cycle for collectively programming the memory cells of the page selected by the word line in accordance with the write data latched in column latch 200.
(1) Write cycle
First, Y gate lines Y1 to Ym are successively selected by Y decoder 15. Y gates Y1 to Ym correspond to bytes 1 to m, respectively. Write data are written by write driver 16 to the column latch 200 of the selected byte. Consequently, write data of all memory cells connected to one word line (memory cells of one page) are latched in column latch 200.
(2) Erasing cycle
Before entering the program cycle, the memory cells of selected page are erased. Now, assume that memory cells connected to word line WL1 (memory cells of the page 1) are to be rewritten.
At first, all memory cells of page 1 are erased. When an erasing signal Erase shown in FIG. 22 attains "H", Vpp switch 230 is activated. Potential of word line WL1 rises to high voltage Vpp. Consequently, high voltage Vpp is applied to the control gates CG1 of all the memory cells of page 1 through a transistor S10, and thus all memory cells of page 1 are erased.
(3) Program cycle
At the end of the erasing cycle, Vpp switches 220 connected to bit lines BL0 to B17 are activated in accordance with the write data latched in column latch 200. At this time, the potential of word line WL1 has already risen to high voltage Vpp. Accordingly, high voltage Vpp or 0 V is applied to tunneling region of memory transistors M0 to M7 through selecting transistors S0 to S7, and memory cells in page 1 are programmed at one time.
At this time, if write data is "0", the bit line corresponding to the column latch 200 attains the high voltage Vpp, and if write data is "1", the bit line corresponding to the column latch remains at 0 V. The above described method of writing is generally called page mode writing.
The conventional EEPROM is structured as described above, and a Vpp switch and a column switch are provided for each bit line for allowing collective writing page by page. In the generation where the area of the memory itself is large, the Vpp switches can be laid out relatively easily. However, as the degree of integration of the memory becomes higher, it becomes difficult to lay out Vpp switches in accordance with the pitches of the memory cells. In addition, the column switches must also be laid out accordant with the memory cells. Therefore, layout of the column switches as well as the Vpp switches is difficult.

Non-volatile semiconductor memory device incorporating data latch and address counter for page mode programming


A wide-beam planar backfire and bidirectional circularly-polarized antenna. An entire planar sectorial magnetic dipole is of a semi-closed structure, the planar sectorial magnetic dipole comprises two identical sectorial patches and a vertical short-circuit wall, and the vertical short-circuit wall is connected with straight sides of the two sectorial patches along a radial direction of the planar sectorial magnetic dipole; two sets of concentric annular electric dipoles are respectively used as a top concentric annular radiating element and a bottom concentric annular radiating element, as well as a top concentric annular reflector and a bottom anti-concentric annular reflector; and the top concentric annular radiating element is connected with an upper surface of the planar sectorial magnetic dipole through a top connecting branch, and the bottom concentric annular radiating element is connected with a lower surface of the planar sectorial magnetic dipole through a bottom connecting branch.

A circularly-polarized antenna can receive incoming waves from arbitrary direction, and the radiated waves can also be received by the antenna with arbitrary polarization. Therefore, the circularly-polarized antenna is widely used in electronic reconnaissance and interference, communication and radar polarization diversity operation, and electronic countermeasures. The manufacturing of the circularly-polarized antenna can be roughly implemented by three methods. The first method is to realize circular polarization by complementary dipoles; the second method is to use a rotational structure, such as a microstrip planar rotational antenna and a helical antenna with a three-dimensional structure; and the third method is to generate cross dipoles on a radiation patch or a dielectric resonant cavity, and the mode polarization of the two cross dipoles are orthogonal with a phase position. A backfire circularly-polarized antenna is a novel antenna developed on the basis of a directional antenna, which has the advantages of simple structure, convenient feeding, short longitudinal length, high gain (up to hundreds) and low sidelobe level as well as low backlobe level (up to −20 dB and −30 dB below respectively).
However, in the fields of satellite navigation, communication and radio frequency identification, the antenna is also required to have a sufficient 3 dB axial-ratio beam width (i.e., polarized beam width), and the antenna is required to have an axial-ratio beam width close to 180° (hemispherical) or even more than 180°. Although a circularly-polarized antenna with a plane rotationally symmetric structure can also realize the wide beam, the width is usually no more than 150°, and the beam is usually perpendicular to the plane of the antenna. If the circularly-polarized beam parallel to the plane of the antenna is needed, it is inevitable to introduce a non-planar structure. Therefore, how to design a (endfire, backfire or bidirectional) planar antenna with a flexible circularly-polarized beam pointing characteristic is a challenging problem. The prior art has solved the design of the planar endfire circularly-polarized antenna, but cannot realize the design of the planar backfire and bidirectional circularly-polarized antenna.

Wide-beam planar backfire and bidirectional circularly-polarized antenna

Nanjing University of Posts and Telecommunications


Provided is an electronic device that can appropriately perform process in response to the position of a press (contact) by a user.

In recent years, as a member that detects a contact by a user, an electronic device with a touch panel has been widely used to the information equipment such as mobile terminals like mobile phones, tablet-type PCs, calculators and ticket vending machines, home appliances such as microwaves, TV sets and lighting equipment, and industrial equipment (FA equipment).
As such a touch panel, various types such as a resistive film type, a capacitive type and an optical type are known. However, any types of touch panel are used to detect operation by a finger or a stylus pen, and even if a touch panel is touched, the touch panel itself is not physically displaced like a push button switch. Thus, even if a user operates the touch panel, he/she cannot obtain a feedback to the operation.
Thus, a feedback method by which, when operation on the touch panel is detected, a vibration is generated has been suggested (see Patent Literature 1). The input apparatus described in Patent Literature 1 includes a pressure detector (load detector), and is configured such that the pressure detector detects a pressure by the operation on the touch panel. In such a configuration, when a detected pressure satisfies a predetermined standard (for providing a tactile sensation), a vibrator is driven to vibrate the touch panel, thereby providing a tactile sensation to a user's finger or the like. In addition, in that case, when the position where a contact is detected corresponds to a position of a predetermined object such as a key displayed on a display, a predetermined process such as execution of predetermined application software associated with the object may be performed.
Thus, when a user presses the touch panel intentionally, not lightly touches it, a tactile sensation is provided and a predetermined process is performed. Therefore, in this manner, an unintentional light touch on the touch panel by a user may not cause execution of unintentional process by a user or provision of a strange tactile sensation to a user.

Abstract: The electronic device 1 includes a touch panel 10 configured to detect a contact, a controller 80 configured to obtain a position of the contact detected by the touch panel 10, and pressure detectors 20-1 to 20-8 configured to detect a pressure on the touch panel 10, in which a plurality of pressure detectors 20-1 to 20-8 are mounted on the touch panel 10, and the controller 80 chooses a pressure detector that detects a pressure on the touch panel 10 in response to the position of a contact obtained.


Methods and apparatus to search datasets are disclosed. An example disclosed method includes receiving a search request having at least two criteria and assigning the criteria to a first group according to a logical relationship between the criteria. The example method further includes determining which of the criteria in the first group is satisfied by a least amount of records in a database based on a plurality of counts, the counts respectively indicative of a number of corresponding records in the database satisfying a respective one of criteria exhibited by the database, and identifying a reduced set of records in the database to be searched, the reduced set of records corresponding to the first or second criteria that is satisfied by the least amount of records in the database, and reducing a search time associated with the search request by searching the reduced set of records from the database.

Many entities such as retail establishments and product manufacturers are interested in the shopping activities, behaviors, and/or habits of consumers. Consumer activity related to shopping can be used to correlate product sales with particular shopping behaviors and/or to improve timing or placement of product offerings, product promotions, and/or advertisements. To make use of such information, market analysis entities typically utilize a plurality of statistical tools to study, evaluate, and/or predict market conditions and/or consumer behavior. To implement some such statistical tools, data related to products on the market is stored in searchable databases and/or data structures.


An image sensor includes a pixel array including a plurality of pixels arranged in a matrix, the plurality of pixels configured to generate separate, respective pixel signals, a row driver configured to selectively read pixel signals generated by pixels of a plurality of rows of the pixel array, a binning circuitry configured to selectively sum or pass through the read pixel signals to generate binned pixel signals, a column array including a plurality of analog-to-digital converters (ADCs) configured to perform an analog-to-digital conversion on the binned pixel signals, and a mode selecting circuitry configured to control the row driver and the binning circuitry to change an operation mode of the image sensor based on a mode signal received at the image sensor to change an operation mode of the image sensor.

The inventive concepts relate to image sensors. More particularly, the inventive concepts relate to readout methods of image sensors and configurations for implementing the methods.
An image capturing device that includes an image sensor may be included in various types of electronic devices such as a smart phone, a personal computer (PC), a surveillance camera, and a vehicle, or may be used as one independent electronic device.
An image capturing device may include, as an image sensor, a charge-coupled device (CCD) image sensor or a complementary metal oxide semiconductor (CMOS) image sensor. The CMOS image sensor is simpler to drive than the CCD image sensor, and may include a signal processing circuit integrated in a single chip. Thus, the CMOS image sensor is miniaturized, and due to small power consumption, the CMOS image sensor is widely used in portable electronic devices such as smart phones.
An image sensor is a sensor in which a plurality of pixels configured to convert an optical signal into an electrical signal are integrated. The image sensor may include a plurality of transistors for each pixel and the image sensor may control turning the transistors on/off. The electrical signals converted by the pixels may be read out, and as a readout method, a global shutter method or the like may be used. The global shutter method may read out the electric signals converted by the pixels in a certain row unit order or may read out the electric signals in an order of a column unit that is arbitrarily changed according to a control signal.
For example, after pixels from an uppermost end to a lowermost end of the CMOS image sensor are read out in an order of a certain column unit, or according to a control signal, pixels from the middle to the lowermost end of the CMOS image sensor are read out in units of columns, pixels from the uppermost end to the middle of the CMOS image sensor may be read out in units of columns.

Image sensors, image processing systems, and operating methods thereof involving changing image sensor operation modes


A control pilot circuit of a power cable having a male-type plug generates a pilot signal such that the power cable can be identified as a power cable for charging on the vehicle side. On the other hand, a control pilot circuit of a power cable having a not-shown female-type plug generates the pilot signal such that the power cable can be identified as a power cable for power feeding on the vehicle side. An ECU of a vehicle controls an AC/DC converter in any one of the charging mode and the power feeding mode in response to the pilot signal.

Japanese Patent Laying-Open No. 2001-8380 (Patent Document 1) discloses a power management system where electric power can be transmitted between a battery of an electric vehicle and a house. In this power management system, a main controller on the house side determines the charging mode or the discharging mode, and a charging/discharging control signal is sent from a charging and discharging controller on the house side through a communication antenna to a battery controller on the vehicle side. The charging control or the discharging control is performed in the vehicle, based on the charging/discharging control signal received through the communication antenna (see Patent Document 1).
It is noted that the standard for the above-described electric vehicle that allows charging of the battery from the house is defined in "SAE Electric Vehicle Conductive Charge Coupler" (Non-Patent Document 1) in the United States of America, and in "Electric Vehicle Conductive Charging System, General Requirements" (Non-Patent Document 2) in Japan.
In these "SAE Electric Vehicle Conductive Charge Coupler" and "Electric Vehicle Conductive Charging System, General Requirements," the standard for a control pilot is defined as an example. The control pilot is defined as a control line that connects, via a control circuit on the vehicle side, a ground of the vehicle and a control circuit of EVSE (Electric Vehicle Supply Equipment) for supplying electric power from an on-premises wiring to the vehicle. Based on a pilot signal communicated through this control line, a connection state of a charging cable, whether or not electric power is supplied from a power supply to the vehicle, a rated current of the EVSE and the like are determined.

Charging and discharging system and electric-powered vehicle