Methods in a first user equipment are provided for handling reference signals in a communications network. The user equipment is configured to receive a signal from a base station. The signal comprises a first slot and a second slot. The first slot comprises a first reference signal and the second slot comprises a second reference signal. The user equipment receives, from the base station, information that the first reference signal should be assigned to the second slot and that the second reference signal should be assigned to the first slot. The user equipment assigns the first reference signal to the second slot and the second reference signal to the first slot. The first user equipment processes the first reference signal assigned to the second slot and the second reference signal assigned to the first slot.

In a typical cellular network, also referred to as a communication system or wireless communication system, User Equipments (UEs), communicate via a Radio Access Network (RAN) to one or more core networks (CNs).
A user equipment is a mobile terminal by which a subscriber may access services offered by an operator's core network and services outside operator's network to which the operator's RAN and CN provide access. The user equipments may be for example communication devices such as mobile telephones, cellular telephones, or laptops with wireless capability. The user equipments may be portable, pocket-storable, hand-held, computer-comprised, or vehicle-mounted mobile devices, enabled to communicate voice and/or data, via the radio access network, with another entity, such as another mobile station or a server.
User equipments are enabled to communicate wired or wirelessly in the communications network. The communication may be performed e.g. between two user equipments, between a user equipment and a regular telephone and/or between the user equipment and a server via the radio access network and possibly one or more core networks, comprised within the cellular network.
The communications network covers a geographical area which is divided into cell areas. Each cell area is served by a Base Station (BS), e.g. a Radio Base Station (RBS), which sometimes may be referred to as e.g. "eNB", "eNodeB", "NodeB", "B node", or Base Transceiver Station (BTS), depending on the technology and terminology used. A "cell" is characterized in e.g. Long Term Evolution (LTE) by a "cell-ID", which affects several cell-specific algorithms and procedures.
The base stations may be of different classes such as e.g. macro eNodeB, home eNodeB or pico base station, based on transmission power and thereby also on cell size.
The base station communicates, over radio carriers or channels, with one or more user equipment(s) using a radio access technology, such as e.g. LTE, LTE Advanced, Wideband Code Division Multiple Access (WCDMA), Global System for Mobile Communications (GSM), or any other Third Generation Partnership Project (3GPP) radio access technology. LTE is used as an example in the following description.
When the base station receives, at its antenna(s), signals from a plurality of user equipments, it may use different reception techniques for demodulation. Two different reception techniques for demodulating the symbols from multiple user equipments in each cell are Successive Interference Cancellation (SIC) and Interference Rejection Combining (IRC). Both of these reception techniques require a baseband receiver, at the base station, to estimate the channel between each user equipment and each base station antenna. Baseband refers to signals and systems whose range of frequencies is measured from close to 0 hertz to a cut-off frequency, a maximum bandwidth or highest signal frequency. Baseband may also be used as a noun for a band of frequencies starting close to zero. The quality of the channel estimates greatly influences the performance of both SIC and IRC.
The base station may comprise multiple antennas, and the base station may receive signals from a user terminal at the multiple antennas. To receive a signal from a specific user equipment, the base station determines the set of base station antennas that will be used to receive the signal transmitted from the user equipment. The signals received by this set of antennas are sent to an "uplink receiver" that demodulates the signal transmitted by the user equipment. Note that the same set of antennas could be used for the reception of multiple user equipments. The uplink receiver typically estimates the uplink channels between each user equipment and base station antenna using reference signals that are transmitted from each user equipment on the uplink. When the base station estimates the uplink channel from a particular user equipment, the reference signals from other user equipments in the network act as interference and degrade the accuracy of the channel estimation. Therefore, it is generally desirable that the reference signals from all the user equipments are mutually orthogonal. In an LTE system, given one reference signal spanning consecutive subcarriers, a second orthogonal reference signal spanning the same subcarriers may be generated by adding a linear phase rotation to the same base reference signal. By using different phase rotations for different user equipments, a large number of mutually orthogonal reference signals spanning the same subcarriers may be generated.
The communication between a base station and a user equipment may be structured in different ways, depending on the technology which is used. For example, in LTE, the communication is structured in frames and subframes. One type of LTE frame, i.e. Time Division Duplex (TDD) mode, has an overall length of 10 ms. The frame is divided into 20 individual slots. A subframe comprises two slots, i.e. there are ten subfames within a frame. Another type of an LTE frame, i.e. Frequency Division Duplex (FDD) mode, comprises two half frames, each having an overall length of 5 ms. And each half frame is split into five subframes, each 1 ms long.
An LTE communications network is designed to support user equipments from different releases, i.e., Rel-8/9/10/11, in a backward compatible way. One of the LTE network design objective is to enable co-scheduling of such user equipments in time, frequency and space, i.e. Multi-User Multiple Input Multiple Output (MU-MIMO), dimensions with as few scheduling constraints as possible.
Furthermore, the LTE standard should be able to support various and flexible deployments. Some examples of expected deployments for modern LTE networks, i.e. Rel-11 and beyond, comprise, e.g.,                Macro-deployments, where large cells are typically divided into independent sectors.        Hetrogenous Networks (HetNet)-deployments, where pico-cells are deployed within the coverage of macro-cell in order, e.g., to improve coverage for high data rate user equipments.        Hotspot scenarios where an access point serves a small area with high throughput need.
In addition, LTE networks are designed with the aim of enabling optional Coordinated Multipoint Processing (CoMP) techniques, where different sectors and/or cells operate in a coordinated way in terms of, e.g., scheduling and/or processing. An example is uplink CoMP where the signal originating from a single user equipment is typically received at multiple reception points and jointly processed in order to improve the link quality. Uplink joint processing, also referred to as uplink CoMP, allows transformation of what is regarded as inter-cell interference in a traditional deployment into a useful signal. Therefore, LTE networks taking advantage of uplink CoMP may be deployed with smaller cell size compared to traditional deployments in order to fully take advantage of the CoMP gains.
The uplink of LTE is designed assuming coherent processing, i.e., the receiver is must be able to estimate the radio channel from a transmitting user equipment and to take advantage of such information in a detection phase, i.e. in demodulation of a received signal. Therefore, each transmitting user sends a Reference Signal (RS) associated to each uplink data channel, i.e. Physical Uplink Shared Channel (PUSCH). The reference signal may also be called pilot signal and are inserted in the transmitted signal. The reference signals are sent fairly often as the channel conditions change due to fast fading and other changes.
Each reference signal is characterized by a group-index and a sequence-index. The reference signal is derived from a base sequence. Cyclic shift may be used for deriving the reference signal from the base sequence. In other words, multiple reference signal sequences are defined from each base sequence.
Base sequences are cell-specific in Rel-8/9/10 and they are a function of the cell-ID. Different base sequences are semi-orthogonal. The reference signal for a given user equipment is only transmitted on the same bandwidth of PUSCH, and the base sequence is correspondingly generated so that the reference signal is a function of the PUSCH bandwidth. For each subframe, two reference signals are transmitted, one per slot.
There are two types of uplink reference signals: a demodulation reference signal and a Sounding Reference Signal (SRS). The demodulation reference signal is used for channel estimation for data demodulation, and the sounding reference signal is used for user scheduling.
Reference signals from different user equipments within the same cell potentially interfere with each other and, assuming synchronized networks, even with reference signals originated by user equipments in neighboring cells. In order to limit the level of interference between reference signals different techniques have been introduced in different LTE releases in order to allow orthogonal or semi-orthogonal reference signals. The design principle of LTE assumes orthogonal reference signals within each cell and semi-orthogonal reference signals among different cells, even though orthogonal reference signals may be achieved for aggregates of cells by so called "sequence planning".
Orthogonal reference signals may be achieved by use of Cyclic Shift (CS) in Rel-8/9 or by CS in conjunction with Orthogonal Cover Codes (OCC) in Rel-10. It is may be assume that CS and OCC may also be supported by Rel-11 user equipments.
Cyclic shift is a method to achieve orthogonality based on cyclic time shifts, under certain propagation conditions, among reference signals generated from the same base sequence. Only eight different cyclic shift values may be indexed in Rel-8/9/10, even though in practice less than eight orthogonal reference signals may be achieved depending on channel propagation properties. Even though cyclic shift is effective in multiplexing reference signals assigned to fully overlapping bandwidths, orthogonality is lost when the bandwidths differ and/or when the interfering user equipments employ another base sequence.
OCC is a multiplexing technique based on orthogonal time domain codes, operating on the two reference signals provided for each uplink subframe. The OCC code [1-1] is able to suppress an interfering reference signal as long as its contribution after the base station matched filter is identical on both reference signals of the same subframe. Similarly, the OCC code [1 1] is able to suppress an interfering reference signal as long as its contribution after the base station matched filter has an opposite sign respectively on the two reference signals of the same subframe. The matched filter will be described in more detail below.
While base sequences are assigned in a semi-static fashion, CS and OCC are user equipment specific and dynamically assigned as part of the scheduling grant for each uplink PUSCH transmission.
Even though joint processing techniques may be applied for PUSCH, channel estimates based on reference signals are typically performed in an independent fashion at each reception point, even in case of uplink CoMP. Therefore, it is crucial to keep the interference level at an acceptably low level, especially for the reference signals.
In order to minimize the impact of burst interference peaks on reference signals, interference randomization techniques have been introduced in LTE. In particular:                Cyclic shift randomization is always enabled and generates random cell-specific cyclic shift offsets per slot. The pseudo-random CS pattern is a function of the base sequence index and the cell-ID and is thus cell-specific.        Sequence hopping and Group Hopping (SGH) are base sequence index randomization techniques which operate on a slot level with a cell-specific pattern, which is a function of the cell-ID and sequence index.                    For Rel-8/9 user equipments, SGH may be enabled/disabled on a cell-basis.            For Rel-10 user equipments, SGH may be enabled in a user equipment specific fashion.
In the uplink for LTE Rel-10 multi-antenna techniques which may significantly increase the data rates and reliability of a communication system is introduced. The performance is in particular improved if both the transmitter and the receiver are equipped with multiple antennas. This results in a MIMO communication channel, and such systems and/or related techniques are referred to as MIMO.
LTE Rel.10 supports a spatial multiplexing mode, i.e. Single User-MIMO (SU-MIMO), in the communication from a single user equipment to the base station. SU-MIMO is aimed for high data rates in favorable channel conditions. SU-MIMO comprises the simultaneous transmission of multiple data streams on the same bandwidth, where each data stream is usually termed as a layer. Multi-antenna techniques such as linear precoding are employed at the transmitter in order to differentiate the layers in the spatial domain and allow the recovering of the transmitted data at the receiver side.
Another MIMO technique supported by LTE Rel.10 is MU-MIMO, where multiple UEs belonging to the same cell are completely or partly coscheduled on the same bandwidth and time slots. Each UE in the MU-MIMO configuration may possibly transmit multiple layers, thus operating in SU-MIMO mode.
In case of SU-MIMO it is necessary to allow the receiver to estimate the equivalent channel associated to each transmitted layer of each user equipment in order to allow detection of all the data streams. In case of CoMP, such requirement applies also to user equipments belonging to other cells but comprised in the joint processing cluster. Therefore, each user equipment needs to transmit a unique reference signal at least for each transmitted layer. The base station receiver is aware of which reference signal is associated to each layer and performs estimation of the associated channel by performing a channel estimation algorithm. The estimated channel is then employed by the receiver in the detection process.
In case of MU-MIMO, user equipments may be scheduled on fully or partially overlapping bandwidths. Some typical application cases are exemplified in the following:                MU-MIMO within a cell, fully overlapping bandwidth: in this case the reference signals of the different user equipments may be multiplexed by means of CS and/or OCC. Furthermore, SGH may be enabled without affecting orthogonality.        MU-MIMO within a cell, partly overlapping bandwidth: in this case the reference signals of the different user equipments may be multiplexed by means of OCC only and SGH cannot be enabled for any of the user equipments.        MU-MIMO of user equipments belonging to different cells, e.g., in a CoMP application: in this case the user equipments are typically assigned different base sequences and orthogonality may not be achieved, due to the different CS hopping patterns.
The deployments described above and the extensive use of uplink CoMP require scheduling flexibility and improved channel estimation quality, even for geographically far away user equipments belonging to another cell. Assuming, e.g., a HetNet deployment, the small cell radius of the picocell and the geographic location within the macrocell coverage implies the presence of potentially strong interference between user equipments belonging to such cells. Densifications of the cells, increasing number of receive antennas and optional CoMP processing, on the other hand, emphasizes the need for flexible MU-MIMO scheduling. In the scenarios described above, disabling SGH will enhance the risk of inter-cell interference peaks.
The presence of a user equipment from Rel-8/9/10 and beyond in the same network emphasizes the need to seamlessly co-schedule such user equipments, independently of their specific release. However, MU-MIMO is not efficient in Rel-8/9/10 in conjunction with SGH if the paired user equipments are assigned different base sequences, because neither OCC nor CS are effective in such scenario and only semi-orthogonality may be achieved.
A solution may be to disable SGH in a user equipment specific way for some of the Rel-10 user equipments. However, SGH may only be disabled in a cell-specific way for Rel-8/9 user equipment, implying cell-specific SGH disabling even for Rel-10 user equipments, with severe degradation of inter-cell interference.
Another solution may be to assign the same base sequence, and consequently SGH pattern, to interfering cells such as, e.g., the macrocell and the picocells within the macrocell coverage. However, problems are associated with such a solution such as, e.g., reduced SGH randomization, unpredictably large interference peaks generated when user equipments with the same base sequence are scheduled on partly overlapping bandwidths and DeModulation Reference Sequence (DMRS) capacity limitations, only CS and OCC may be employed for orthogonalizing DMRS over the aggregated cells. Assuming that SGH is enabled, subframes S1 and S2 have different base-sequences on both slots, where s1, s2, s3 and s4 are semi-orthogonal base-sequences pseudo-randomly chosen from a set of predefined base sequences.
Consider, e.g., the case where two user equipments, e.g. UE1 and UE2, are coscheduled on the same bandwidth. Consider the case where UE1 and UE2 belong to different cells and are not assigned the same base sequence. An example is that UE1 belongs to a macro-cell and UE2 to a pico-cell in a hetnet LTE scenario. Assume that the following CS and OCC values are assigned:                UE1: CS1,1 on slot-1, CS—1,22 on slot-2, OCC1=[1 1]        UE2: CS2,1 on slot-1, CS—2,2 on slot-2, OCC2=[1-1]αCSa,b is the phase shift corresponding to the CS for user a and slot b, and αCS1,1−αCS2,1=αCS1,2−αCS2,2 as typically configured in an LTE network in order to keep the same CS separation in the two slots but randomized CS value per slot.
The signal for the DMRS on slot-1 for UE1 is x1,1(n)=s1(n)δ(n−T1,1),
The signal for the DMRS on slot-2 for UE1 is x1,2(n)=s2(n) δ(n−T2),
The signal for the DMRS on slot-1 for UE2 is x2,1(n)=s3(n)δ(n−T2,1),
The signal for the DMRS on slot-2 for UE2 is x2,2 (n)=s4(n)δ(n−T2,2),
where  indicates circular convolution over the support of sx(n) and δ(n) is a Dirac's delta centered on sample 0. Ta,b represents the delay, in samples, due to the cyclic shift in frequency domain CSa,b.
Due to the properties of Constant Amplitude Zero AutoCorrelation (CAZAC) sequences employed for base-sequences, it holds s1s1*=δ(n). CAZAC is a periodic complex-valued signal with modulus one and out-of-phase periodic, i.e. cyclic, autocorrelation equal to zero. CAZAC sequences find application in wireless communication systems, for example in LTE for synchronization of user equipments with base stations.
Let h1 be the channel impulse response from UE1 and let h2 be the channel impulse response from UE2 to the access point. Let the channels be constant over the two slots. Disregarding for simplicity the noise terms, the received signal y1 on slot-1 reads asy1(n)=h1(n)x1,1(n)+h2(n)x2,1(n),while the signal at slot-2 reads asy2(n)=h1(n)x1,2(n)+h2(n)x2,2(n).Consider, e.g., the channel estimator for UE1 based on a matched filter. The matched filter may be obtained by correlating a known signal with an unknown signal to detect the presence of the template in the unknown signal. This is equivalent to convolving the unknown signal with a conjugated time-reversed version of the template. The matched filter is the optimal linear filter for maximizing the Signal to Noise Ratio (SNR) in the presence of additive stochastic noise. The output of the matched filter is:
                                                        g              1                                                  (              n              )                                =                                                                                x                                          1                      ,                      1                                                                                (                    n                    )                                                  *                                  ⊗                                                            y                      1                                                                                (                      n                      )                                                                                +                                                                    x                                          1                      ,                      2                                                                                (                    n                    )                                                  *                                  ⊗                                                            y                      2                                                                                (                      n                      )                                                                                2                                                        =                                                                        h                1                                                          (                n                )                                      +                                                                                h                    2                                                                          (                    n                    )                                                  ⊗                                  (                                                                                x                                                      1                            ,                            1                                                                                (                          n                          )                                                                    *                                              ⊗                                                                              x                                                          2                              ,                              1                                                                                (                            n                            )                                                                                -                                                                                x                                                                                1                              ,                              1                                                                                (                          n                          )                                                                    *                                              ⊗                                                                              x                                                          2                              ,                              2                                                                                (                            n                            )                                                                                )                                            2                                                              h        1                          (        n        )              +                                                      h              2                                                  (              n              )                                ⊗                                    x                              1                ,                1                                                                (              n              )                                      *                  ⊗                      (                                                            x                                      2                    ,                    1                                                                                (                  n                  )                                            -                                                x                                      2                    ,                    2                                                                                (                  n                  )                                                      )                              2      where
                              h          2                                  (          n          )                    ⊗                        x                      1            ,            1                                            (          n          )                      *          ⊗              (                                            x                              2                ,                1                                                                (              n              )                                -                                    x                              2                ,                2                                                                (              n              )                                      )              2represents inter-UE interference. i.e. interference between the UE1 and the UE2, and is in general non-zero. Clearly, the above described solution is not able to cancel DMRS interference in the analyzed scenario.

Methods and devices for handling reference signals in a communications network


A system for making specified resource management services available to a user through a mobile application and/or online portal based on the user's determined level of resource management competency. Further, an intuitive platform for resource management is provided that can provide instinctual guidance throughout the entire lifecycle of a user's engagement with the resource management entity, including but, not limited to, onboarding, providing services to the users, allowing the user to conduct resource interactions and the like.

Conventional resource management platforms require a certain level of resource management competency in order to perform all the functions required by services presented in the platform.
Therefore, a need exists to develop systems, methods, computer program products and the like that provide for users with minimal resource management competency to perform requisite resource management functions. In addition, a need exists to insure that resource management services presented to a user commensurate with the level of resource management competency shown by the user.


Ceramic films and coatings, single or multi-layered, including superlattice, infiltrated with boride, carbide, nitride, oxynitride, and silicide were formed by methods which comprises of an electrochemical coating of a ceramic precursor by a constant or an amplitude-modulated electric current with a DC component in a medium containing at least one of the ionic species for the composition of the ceramic precursor, following single or multiple infiltration in a medium containing at least one of the compounds selected from a B-containing compounds, a C-containing compounds, a N-containing compounds, a Si-containing compounds, and a mixture thereof, by heating means selected from radio-frequency, microwave, thermal, flame, plasma, laser, and a mixture thereof.

1. Field of Invention
This invention relates to a method for the formation of infiltrated electrochemical ceramic films and coatings, and specifically to boride, carbide, nitride, oxynitride, and silicide infiltrated ceramic films and coatings by an electrochemical ceramic precursor coating and then following an infiltration.
2. Cross-Reference to Related Applications
Boride, carbide, nitride, oxynitride, and silicide infiltrated ceramic films and coatings by an electrochemical ceramic precursor coating and then following infiltration are unknown.

Boride, carbide, nitride, oxynitride, and silicide infiltrated electrochemical ceramic films and coatings and the method of forming such


A compensation signal, which derives the mechanical stress, which acts on an integrated semiconductor circuit, from two partial compensation signals, which are generated by semiconductor elements with different stress characteristics, can be determined in more detail when the temperature dependence of a ratio of the partial compensation signals is also considered, wherein particularly a deviation of the ratio of the partial compensation signal to an ideal ratio is considered. Thereby, the rise in accuracy of the stress determination results from determining a deviation of the partial compensation signals, on which the stress determination is based, from a nominal behavior in a stress-free state, so that the deviation of the nominal behavior, which can be based, for example, on a variation of the process parameters in a production process of a semiconductor circuit, can also be considered, in addition to the known temperature behavior.

Integrated circuits on a semiconductor circuit substrate are often constructed in housings consisting at least of a semiconductor chip, a so called leadframe and a compound. In common production methods, first, the semiconductor chip is mechanically mounted on a chip island within the leadframe, wherein the semiconductor chip is additionally electrically bonded to a carrier board, such as a PCB, via a leadframe. For that purpose, a leadframe has several pins isolated from each other, wherein electric bonding between the pins of the leadframe and the corresponding terminal contacts is normally provided on a semiconductor chip via bonding. In order to protect the semiconductor chip and the bonding wires from adverse environmental influences, normally, the semiconductor chips and part of the leadframe are encapsulated with a compound, so that merely parts of the pins which are used for bonding with a board protrude from the compound material.
Thus, also from a mechanical point of view, a completely housed semiconductor chip is a complex construct consisting of different materials. Due to the different thermal extension coefficients of these materials, the individual components strain heavily against each other, wherein these strains can already occur during production. Thus, the surface of the semiconductor chip within the housing is under significant compressive/tensile stress in the order of 100 MPA. Additionally, these mechanical strains change with environmental conditions, such as temperature, air humidity or also through further processing of the member, such as cutting the member from the leadframe strip (typically at the semiconductor producer) or soldering the membrane to a carrier board in a module (mostly at the module producer). As an alternative to soldering the member, other bonding methods, such as overmolding, hot forming, or bending the pins are possible, which also apply mechanical stress on the member. Due to the above-described effects, the mechanical strain at the semiconductor is badly defined and not very constant.
Particularly, the mechanical strain of the semiconductor influences important parameters of members integrated in semiconductor circuit substrates, which is known in the art, for example, as piezo-resistive, piezo-MOS, piezo-Hall and piezo-junction effect. Particularly ultra precise analog semiconductor circuits—and here particularly sensors—are suffering from the fact that their offset or their sensitivity (e.g. the gain factor of an amplifier, the magnetic sensitivity of a magnetic field sensor, the output voltage of a voltage constant or the temperature code of a digital temperature sensor).
The piezo-effects on electric parameters of semiconductor circuits, which are significant for understanding the inventive thought, will be briefly described below.
Generally, a mechanical strain in a semiconductor material has the effect that the properties of the charge carriers change with regard to the charge carrier transport, such as the charge carrier mobility, the mean collision time, the scattering factor, etc.
Thereby, the piezo-resistive effect indicates generally how the specific ohmic resistance of the respective semiconductor materials behaves under the influence of a mechanical strain. Changes of the characteristic curves of diodes and bipolar transistors result, among others, from the piezo-junction effect. The piezo-Hall effect describes the dependence of the Hall constant of the semiconductor material on the mechanical strain state in the semiconductor material. The piezo-tunnel effect occurs at reverse-operated highly doped shallow lateral p-n junctions. This current is dominated by band-to-band tunnel effects and also stress-dependent.
The piezo-resistive effect and the piezo-MOS effect that can sometimes be found in literature can be classified comparably, since the mobility of the charge carriers in the MOS channel of a MOS field-effect transistor changes under the influence of mechanical stress in the semiconductor material of the integrated circuit chip with the Piezo-MOS effect in the same way as with the piezo-resistive effect.
Thus, it becomes clear that the electric or electronic characteristics of the integrated circuitry can be altered due to mechanical strains in the semiconductor material of an integrated circuitry, wherein then a decrease in performance of the integrated circuitry can be observed, for example in the form of an impairment of the dynamic range, the resolution, the bandwidth, the power consumption or the accuracy, etc.
In particular, the above-mentioned piezo-resistive effect indicates how the specific ohmic resistance ρ of the respective semiconductor material behaves under the influence of a mechanical stress tensor σ and the piezo-resistive coefficient π:ρ=ρ0(1+Σπi,jσi,j)Thereby, the factor ρ0 is the basic value of the specific resistance, which remains uninfluenced by the mechanical strain.
In integrated circuits (ICs), a required current I, e.g. a control current, a reference current, etc., may be normally generated by circuit elements of the integrated circuit on the semiconductor chip. Thereby, substantially, a defined voltage U is applied to an integrated resistor with the resistance R and the current I flowing then is coupled out. Thus, generally, a current I can be generated at any resistive element, e.g. also at an MOS field-effect transistor, which is in the linear operating range.
The voltage U can be generated, for example, relatively constant by known bandgap principles with regard to mechanical strains in the semiconductor material (despite comparatively small piezo-junction effects on the generated bandgap voltage). However, the resistance R is subject to the piezo-resistive effect according to the above equation:R=R0(1+Σπi,jσi,j)Thereby, the factor R0 is the basic value of the resistance, which remains uninfluenced by the mechanical strains, and the value πij is a piezo-resistive coefficient. Thus, the current I generated at the resistive element can be expressed as follows:I=U/R=U/(R0(1+Σπijσij))
The piezo-Hall effect describes the dependence of the Hall constant Rh on the mechanical stress state in the semiconductor material, with:Rh=Rh0(1+ΣPi,jσi,j)Thereby, σij is the mechanical stress tensor, Pij are the piezo-Hall coefficients, summing is performed via i,j=1 . . . 3.
Both the piezo-resistive effect and the piezo-Hall effect are spurious during the operation of an integrated circuit, particularly a sensor circuit, such as an integrated Hall probe including control and evaluation electronic.
The piezo-Hall effect, which also occurs due to mechanical strains in the semiconductor material of the semiconductor chip of the integrated circuit, changes, for example, the current-related sensitivity Si of the Hall probe as follows:
      S    i    =                    U        h                              I          H                        B              =                            R          h                t                  g      Thereby, Uh is the Hall voltage at the output side of the Hall probe, IH is the current (control current) through the Hall probe, B is the magnetic flow density to be detected, t is the effective thickness of the active layer of the Hall probe and g is a geometry factor describing the influence of the contact electrodes on the Hall voltage.
As additional complication, the Hall current IH through the Hall probe changes due to the piezo-resistive effect, when mechanical strains are applied in the semiconductor material of the Hall probe array, when the Hall current IH (control current) is defined, for example, across an integrated resistor R, where a voltage U is dropped, for example via a locked loop. Thus, a change of the Hall current IH due to a resistor change caused by the piezo-resistive effect leads to a change of the sensitivity S of the Hall probe, the sensitivity S of the Hall probe is the product of current-related sensitivity Si and Hall current IH:S=SiIH=Uh/B∝Si/RThe magnetic sensitivity S of the Hall probe defines (as indicated above) the relation of the output voltage UH of the Hall probe to the influencing magnetic field component B.
A mechanical strain σij in the semiconductor material of the Hall probe arrangement influences the current-related magnetic sensitivity Si of a Hall probe according to:Si=Si0(1+ΣPijσij)Here, the factor Si0 is the basic value of the current-related magnetic sensitivity, which remains uninfluenced by the mechanical strain, and the factor Pij is a piezo-Hall coefficient.
Generally, an attempt is made to maintain the magnetic sensitivity S of a Hall probe as constant as possible, wherein particularly influences based on mechanical strain due to the above described piezo-resistive effects and the piezo-Hall effects are spurious.
With regard to the above-described piezo-effects, it should be noted that the coefficients σij, Pij and πij describing the mechanical strains occurring in the semiconductor material are elements of tensors, i.e. that the current-related magnetic sensitivity Si of a Hall element and the resistance R of a resistive element do not change only by the strength of the mechanical strain in the semiconductor material but additionally in dependence on the strain direction in the semiconductor material. The distinct directional dependence of the influence of a mechanical strain in the semiconductor material on electric and electronic parameters of an integrated circuit are known in the art.
Since the piezo-effects are directional, as described above, which means they depend on the relative orientation of a semiconductor element with regard to the crystal structure of a semiconductor substrate, the crystallographic orientations relevant in the production of integrated semiconductor circuits will be described below.
For producing integrated circuits, the semiconductor wafers, e.g. silicon wafers or silicon slices, respectively, are sawn from a single crystal rod, such that the wafer surface is associated to a crystallographic plane. In order to determine the respective plane in a cubic crystal, the so called "Miller indices" are used, which are indicated below in round brackets. FIG. 3a shows, for example, a top view of a semiconductor wafer which is cut in the (100) plane.
Further, the major crystallographic directions in the wafer plane are indicated in FIGS. 3a-b, wherein the producers of these silicon wafers provide a so-called "primary flat" at the silicon slice. Normally, the edges of the square geometries of the circuit structures run on the semiconductor chip in parallel or perpendicular, respectively, to the primary flats. In FIG. 3a, particularly, the crystallographic directions or axes, respectively, are illustrated in the plane of the semiconductor wafer, wherein the same are illustrated below in square brackets. The coordinate system is usually used such that the [100] direction runs perpendicular to the primary flat, while the [ 111] direction runs parallel to the primary flat. The directions [010] and [100] run in an angle of +/−45° to the [110] direction.
Further, an angle φ is defined with respect to the [110] direction, wherein in the top view on the wafer surface, the angle φ is counted counter-clockwise starting from the [110] direction. Normally, the individual chips at the wafer are positioned such that the directions φ=0° and φ=90° correspond to the IC vertical or horizontal direction, respectively, wherein these directions can be exchanged, depending on whether the IC is on edge or horizontal. Further, the direction φ=90° will be designated below as x-axis ([ 110] direction) and the direction φ=0° as negative y-axis ([110] direction).
Since {100} silicon material is used in the plurality of applications for integrated semiconductor circuits, the following explanations mainly relate to the numbers for {100} silicon material, which are relevant for this material, in order to simplify the explanations and due to the specific practical importance. However, it should be clear that other semiconductor materials or other silicon materials can also be used.
Since an integrated circuit chip is generally structured in a layered way in the housed state, the description can be limited to a planar stress state, namely two normal stress components σxx, σyy and one shear stress component σxy, as illustrated exemplarily with regard to FIG. 3b. Here, according to definition, the x and y axes are arranged in parallel to the edges of the semiconductor circuit chip. The other stress components are substantially negligibly small and have only little influence on the electric circuit components. In a sufficiently high distance to the edge of the semiconductor circuit chip and particularly in the middle of a semiconductor circuit chip, the shear stress component σxy is also mostly negligibly small. Thus, substantially, only the two normal stress components σxx and σyy remain.
According to the above definition, in the mostly used {100} silicon semiconductor material, the x-axis is parallel to the [ 110] direction, and the y-axis is parallel to the [ 110] direction.
The electronic function parameters of different integrated devices or semiconductor devices, respectively, show the dependences on the above illustrated normal stress components σxx and σyy in {100} silicon, which will be discussed in detail below.
In the following, first, resistive elements, such as resistor elements, MOS-FETs, etc. and particularly the influence of the piezo-resistive effect on the resistance of a resistive element will be discussed.
If the mechanical stress σ on the semiconductor chip changes, the resistance changes also due to the piezo-resistive effect according to the following equation:
      δ                          R    =                    Δ                                                  R            R        =                            R                                (            σ            )                          -                  R                                (                          σ              =              0                        )                                      R                          (                      σ            =            0                    )                    The alignment of a resistor element on the semiconductor chip is indicated as angle φ in relation to the [110] direction in the crystal. Here, the [110] direction is perpendicular to the primary flat of the semiconductor wafer and thus clearly defined (see FIG. 3a).
If two resistors, normally of the same size but rotated by 90° in the layout, are connected in series, the stress dependence can be reduced. The same applies for connecting two resistors rotated by 90° in parallel.
It can be shown that the series connection of two resistors with orthogonal layout is independent of a rotation of the whole arrangement by +/−45° with regard to mechanical strains. Such an arrangement will be referred to as "L-layout" below. The resulting resistor of the arrangement is even independent of the angle φ.
In summary, it can be said with regard to diffusion or implantation resistors, respectively, on the semiconductor circuit chip, that the stress-dependence of the resistance depends on the orientation of the resistor in the xy plane of the semiconductor circuit chip depends, so that particularly a resistor is not only sensitive to the sum of the normal stress components.
Alternatively, a so called L-resistor arrangement of two resistors can be provided, i.e. two resistors of the same size, which are arranged perpendicular and immediately adjacent to each other, are connected electrically in series or in parallel. Here, the L-resistor circuit can be rotated in any way in the (100) plane without any changes of its piezo-properties or dependences, respectively. This L-resistor circuit is preferred compared to a single resistor in a (100) direction, since the L-resistor circuit is substantially the only one being insensitive to the shear stress component in the semiconductor material of the semiconductor circuit chip.
For a stress dependence of an L resistor circuit, the following relation results:
      R    L    =                    R                  L                                                              0                                  (        T        )                        (              1        +                                                                              π                  11                                                                  (                  T                  )                                            +                                                π                  12                                                                  (                  T                  )                                                      2                                          (                                          σ                xx                            +                              σ                yy                                      )                              )      Here, the factor RL0(T) indicates the resistance of the L resistor circuit at miniscule mechanical stress in the semiconductor material of the semiconductor circuit chip. In this context, it should be noted that the basic resistance RL0(T) is already temperature-dependent. In an L resistor arrangement in the (100) plane, factors π11(T) and π12(T) are the only relevant terms of the piezo-resistive tensor. These two relevant terms of the piezo-resistive tensor also show a certain temperature-dependence.
With regard to the piezo-resistive effect, a special form of resistor elements, namely polysilicon resistors, will be discussed. Polysilicon resistors are not simply diffused or implanted, respectively, into the single crystal material of the semiconductor circuit chip, but are grown on the semiconductor surface of the integrated semiconductor chip. Thereby, generally, a dielectric lies between the single-crystal semiconductor material and the polysilicon trace of the polysilicon resistor. Now, the stress dependence of polysilicon resistors depends no longer on the direction of the polysilicon resistor trace on the semiconductor surface, due to the statistic directional distribution of the many single grains in the poly-semiconductor material (polysilicon material). Thus, a polysilicon resistor shows a substantially similar piezo-resistive dependence as an L-resistor circuit of diffusion or implantation resistors, respectively.
In the following, the influence of mechanical strains in a semiconductor material on the Hall-constant in the semiconductor material will be discussed, wherein this dependence will be described through the piezo-Hall effect. Particularly the current-related magnetic sensitivity Si of a Hall probe is influenced by the piezo-Hall effect, due to mechanical strain σ in the semiconductor material of the semiconductor circuit chip, according to the following equation:Si=Si0(1+P×σ).
By considering a planar stress state in the semiconductor chip of a Hall probe and by neglecting the shear stress component, while the Hall probes are sufficiently distant from the edge of the semiconductor circuit chip, so that according to the invention only the two normal stress components σxx, σyy may be required for describing the mechanical stress tensor, the following current-related magnetic sensitivity Si of a Hall probe results:Si=Si0(T)(1+P12(T)(σxx+σyy))In the above equation, the factor Si0(T) represents the current-related magnetic sensitivity in a miniscule mechanical stress, wherein it should be noted here as well that the basic value of the Si0(T) is already temperature-dependent. Here, the factor P12(T) indicates the only relevant coefficient term of the piezo-Hall tensor, which again has a certain temperature dependence. Thus, even with a Hall probe in a semiconductor circuit chip, it results that only the sum of the two normal stress components σxx and σyy enters the above equation for the current-related magnetic sensitivity Si of a Hall probe.
Apart from Hall probe arrangements, there are other magnetic field sensors, such as MAG FETs or magneto diodes, wherein all these elements have the same property in that, through the Hall effect, the charge carriers flowing through the magnetic field sensor element in the semiconductor material are influenced by a magnetic field. All stated elements have piezo-influences, which are described by the piezo-Hall coefficient or similar coefficients, i.e. the influence of mechanical strains in a semiconductor material on the above-mentioned magnetic field sensitive elements is not described by the piezo-resistive effect alone.
In order to correct the above-described piezo-effects, which influence the read-out accuracy of semiconductor sensors, such as Hall sensors, a range of approaches and concepts exist in the prior art.
International patent application WO 2003040852-A2 describes a system, which detects mechanical stress acting on the semiconductor circuit substrate, wherein this stress influences a useful signal (particularly a magnetic field sensor). The mechanical stress directly measured at the chip is evaluated by a processing means, which influences the useful signal based on the detected mechanical stress and thus realizes a piezo-compensation. Thus, the method is based on directly measuring the mechanical stress acting on the semiconductor chip and to derive the influence which the measured stress has on the semiconductor sensor via a known function from the measured stress, so that the signal measured from the semiconductor sensor can be corrected by the predicted stress component.
European patent application 1 496 344 A2 describes how signals are generated with resistor Ls of two different conductivity types (n- and p-doping), which can be combined to an overall signal by appropriate weighting and summing/subtraction, which has a predeterminable dependence on mechanical stress (and particularly can also be stress-independent). The principle is to combine two resistors, which have been produced in different technology, namely an n- and a p-doped resistor, and which consequently have different piezo-resistive properties, such that a signal generated via both resistor types either forms a temperature-independent stress signal or represents a stress-independent temperature signal. Here, additionally, the two resistor types are formed by two subresistors of the same technology connected in series or in parallel, so that the overall resistor formed of the two subresistors is merely piezo-sensitive to the normal component of the mechanical stress.
Under the assumption that the two resistors of different conductivity types behave with regard to their electric properties as shown by literature values, a temperature-dependent stress signal or a stress-independent temperature signal can be generated by a different combination of the two subsignals. Further, EP 1 496 344 A2 describes that a resistor configuration whose piezo-properties only depend on the sum of normal stresses, can also be generated by forming so called "Van Der Pauw" structures on the semiconductor. The basic mode of operation of the Van Der Pauw structures is that a resistor element is operated in a clocked way, wherein the current flow is controlled such that in a first clock, the current flow is primarily generated in a first direction by the Van Der Pauw structure, wherein the first direction is perpendicular to a second direction, which indicates the primary current direction in the second clock. If the resistor, as it is measured in two subsequent clock periods, is averaged, the same will only depend on the sum of the normal stress components in the chip plane.
The usage of Van Der Pauw structures is also proposed in DE 102 23 179 A1, wherein the invention described therein aims to provide a semiconductor structure whose stress sensitivity has the same directional dependence like a semiconductor sensor to be stress-compensated, particularly like a Hall sensor, so that the semiconductor structure described therein is also sensitive to the normal stress components of the stress.
The German patent application DE 101 54 497 A1 describes also how integrated semiconductor resistors can be arranged advantageously with regard to their preferred current flow direction in relation to the crystal grid, so that the piezo-resistivity of the integrated resistors shows a dependence on a preferred direction, which can be freely determined. The resistor elements (L resistor arrangement) proposed there, which consist of two subresistors arranged in 90° angle to each other, are sensitive to the sum of the normal stress components in the chip surface, wherein, additionally, some circuit-technological equivalents to the L-resistor arrangements are shown in DE 101 54 497 A1, which have the desired piezo-sensitivity.
With regard to the stress dependence of the operating parameters of semiconductor sensors, it has to be noted that not only the semiconductor sensors themselves depend on mechanical stress acting on the semiconductor substrate, but that also their supply voltage or supply current, respectively, which is generated on the semiconductor substrate, has a stress dependence. Thus, it is desirable, for example for Hall sensors, that the Hall sensor is fed with current that is as constant as possible. Voltages can be generated mostly stress-independent via known bandgap circuit principles, the temperature dependence of the generated voltages can even be freely determined within broad limits. Currents which, among other things, serve to supply Hall sensors, are generated by a voltage drop across a resistor implanted on the semiconductor substrate, and thus the currents across the piezo-resistivity of the resistors are also stress-dependent.
The so-far unpublished patent application with the file number DE 10 2004003853.8 describes a semiconductor circuit, two subcurrents in a ratio 1:1.694 are obtained from a p- and n-doped diffusion/implantation resistor, which are laid out in the shape of an L, wherein these subcurrents are subsequently subtracted and the difference of the subcurrents is used as supply current of an n-doped Hall probe in {100} silicon. This semiconductor circuit achieves that the piezo-resistive effect in the two resistors, and thus the supply current mostly cancels out with the piezo-Hall effect of the Hall probe, so that the magnetic overall sensitivity of the semiconductor circuit is mostly independent of mechanical stress.
The methods or circuits, respectively, according to the prior art thus aim to measure the mechanical stress on a semiconductor substrate defect and to correct the influence of the mechanical stress on the sensor result with regard to the measured stress and an empirically determined stress dependence of the sensor to be compensated. On the other hand, the methods aim to develop circuits, which can provide the operating currents and supply voltages of semiconductor sensors independent of mechanical stress, so that the measurement result is not corrupted merely by varying the operating parameters of the sensor.
Here, the high temperature-dependence of the resistances of integrated resistors generally represents a great problem, which has to be considered to determine the mechanical stress with resistors, as it is partly the case in the above cited references, or to characterize a current generated via resistor circuits with regard to its temperature behavior.
Based on a calculation example for the measurement accuracy of an n-doped Hall probe, the problem will be illustrated briefly below. Since integrated resistors generally have distinct temperature dependences, care has to be taken that the small changes of the resistors due to mechanical stress can be distinguished from the comparatively higher changes of the resistors due to temperature. A small n-doped Hall probe in {100} silicon, for example, changes its current-related sensitivity by 1%, when the sum of the normal stress components, which means the mechanical stress, in the silicon surface changes at the position of the probe by 22 MPA. Thereby, with this mechanical stress, the resistor of a p-doped L-resistor arrangement changes by 0.06%, the one of an n-doped L-resistor arrangement by −0.54%. Thus, the difference between a first current through the p-doped resistor and a second current through the n-doped resistor changes by 0.6%. Thus, there is a problem, for example in that the Hall probe which is to be compensated with regard to stress drift, is almost twice as sensitive to mechanical stress than the stress sensor itself, which consists of n-and p-resistors. Additionally, there are the high temperature dependences of the n- and p-resistors. The temperature coefficients which indicate the relative resistor change in dependence on the temperature, lie between 0.25/° C. and 0.5%/° C. with the p- and n-resistors. Thus, a temperature change of 1 to 2° C. is sufficient to change the resistors by 0.6%, a change which corresponds to the selected stress change of 22 MPA, which cannot be distinguished from a "real" stress change without appropriate measures.
Since, according to the prior art, a mechanical stress on a semiconductor substrate is determined via implanted resistors of different types (n- and p-type), it becomes evident by the above calculating example that the temperature dependence of the implanted resistors has to be considered in stress determination, to obtain a relative measurement accuracy of a sensor circuit, which may satisfy the requirements of the desired application. At present, a relative measurement accuracy of 1% may be required with Hall sensors. The temperature dependence of the resistor of an implanted n- or p-type resistor is so high that even small deviations from an idealized assumed temperature behavior of the resistors could already cause that the measurement result of an integrated semiconductor circuit comprising a sensor may no longer fulfill the accuracy requirements made on the measurement result.
The method or circuit, respectively, proposed in unpublished patent application DE 102004003853.8, which partly compensates a stress-induced change of the sensitivity of a Hall probe by an appropriate change of the supply current of the Hall probe, has the disadvantage that the system is, on the one hand, difficult to characterize and thus to align (particularly when the piezo-compensation is to be performed across a wide temperature range), and that, on the other hand, it effects an insufficient compensation with scatterings of the temperature coefficients of the layer resistors of both resistor types (an n- and p-type).
The integrated semiconductor arrangement and the method for generating a pressure-dependent signal proposed in EP 1 496 344 A2 generates an output signal, which is stress independent, but still dependent on the temperature. There, it is not realized that the remaining temperature dependence represents a large problem that has to be controlled for piezo-compensation. Particularly, there is no realization that this temperature-dependence comprises process-induced scattering, which leads to an error term in stress determination.

Concept for compensating piezo-influences on an integrated semiconductor circuit


A drill pipe elevator includes first and second separable pieces. Each piece comprises a drill pipe-receiving groove, and a pair of diametrically opposed projections with each projection forming only part of a pair of diametrically opposed lifting posts. The first and second separable pieces when positioned together define the pair of diametrically opposed lifting posts from the pair of diametrically opposed projections and define a drill pipe-receiving passageway through the drill pipe elevator that is oriented transversely between the lifting posts.

When drilling wells into the earth, a string of drill pipe is rotated and driven into the earth to form the hole or well through which the fluid will be extracted to the surface. The end of the string of drill pipe includes a cutting head which dislodges the earthen material as the drill pipe string is driven deeper into the earth. Water is typically flowed into the well being drilled, with the water and removed earthen material flowing upwardly around or within the rotating drill pipe and outwardly of the well being drilled.
The drill pipe string is made up of a plurality of pipe segments which are connected end-to-end. The drill string is rotated and advanced into the earth until another segment of drill pipe is needed to extend the assembled length of drill pipe segments further. Then, the rotation of the drill string is stopped and the device imparting the rotary motion to the drill string is moved out of the way to enable another segment of drill pipe to be secured to the drill string. Further at the conclusion of drilling, the process is reversed whereby the drill string must be raised with each segment of drill pipe being sequentially removed as it exits the well.
The mechanism which is used to grasp a segment of drill pipe, whether separate from or attached to the drill string, is commonly known as a drill pipe elevator. Such are typically hinged, clam-shell devices which can be opened to be received about a segment of drill pipe and subsequently closed to be clasped about an upper end of the drill pipe segment. The drill pipe segments typically have projecting flanges at their ends or diametrically enlarged neck portions at an outer end thereof which prevents the drill pipe from sliding through the drill pipe elevator. The drill pipe elevator typically includes diametrically opposed rings which can be grasped by cables, hooks, links, or bails of an elevator mechanism for raising and lowering the drill pipe elevator and correspondingly a drill pipe segment, including an entire drill string, received thereby.

Drill pipe elevators and methods of moving drill pipe


A saddle riding type vehicle includes a right wheel and a left wheel, a right lower arm and a left lower arm swingably provided on a vehicle arranged to support the right wheel and the left wheel to be movable up and down, and a right stopper member and a left stopper member arranged to contact the right lower arm and the left lower arm to stop the vehicle body from leaning in excess of a predetermined amount, which do not stop leaning of the vehicle body when the lean amount of the vehicle body is less than the predetermined amount. The vehicle body is arranged to lean freely when the lean amount of the vehicle body is in a range not exceeding the predetermined amount. Therefore, the rider can preferably travel comfortably.

1. Field of the Invention
The present invention relates to a saddle riding type vehicle such as a three-wheeled automotive vehicle or four-wheeled automotive vehicle, for example, including a right wheel and a left wheel arranged across a vehicle body, and more specifically, to a saddle riding type vehicle which can make turns by leaning the vehicle body.
2. Description of the Related Art
A saddle riding type vehicle has heretofore been proposed that has a pair of wheels located at opposite sides of the vehicle body at the front portion and/or rear portion of the vehicle body, and can make turns by leaning the vehicle body. Further, a saddle riding type vehicle has also been proposed that has a mechanism for restricting leaning of the vehicle body (e.g., Unexamined Japanese Patent Publication No. 2003-341577).
Unexamined Japanese Patent Publication No. 2003-341577 discloses a conventional three-wheeled automotive vehicle having a vehicle body, a single front wheel and a pair of rear wheels. The vehicle body includes a front vehicle body which supports the front wheel, a rear vehicle body which supports the pair of rear wheels, and a Neidhardt mechanism disposed between the front vehicle body and the rear vehicle body. The Neidhardt mechanism connects the front vehicle body and the rear vehicle body to be rotatable relative to each other, while applying an elastic force to the front vehicle body and the rear vehicle body for returning the front and rear vehicle bodies to an upright posture.
The conventional three-wheeled automotive vehicle further includes a swing lock mechanism for restricting the relative rotation of the front vehicle body and the rear vehicle body. The swing lock mechanism is operable through a force generated by a hydraulic disk brake mechanism generated at a time of braking operation. When the rider carries out a braking operation, the front vehicle body and the rear vehicle body become incapable of relative rotation, and the vehicle body will stand unassisted.
However, the conventional example with such construction has the following drawbacks.
In the vehicle described in Unexamined Japanese Patent Publication No. 2003-341577, the vehicle body leans when the front vehicle body and the rear vehicle body rotate relative to each other. Therefore, whenever the vehicle body leans, the force acts on the vehicle body to return it to upright posture. That is, an increase in the lean amount of the vehicle body is inhibited by the Neidhardt mechanism. Thus, the vehicle body cannot freely lean, and so the rider cannot travel comfortably.
When the relative rotation of the front vehicle body and the rear vehicle body becomes impossible, a decrease and an increase in the lean amount of the vehicle body are both prohibited. That is, the vehicle body is caused to be incapable of leaning by the swing lock mechanism every time a braking operation is carried out. When the vehicle body becomes incapable of leaning in this way, the rider cannot travel comfortably.


Channel State Information (CSI) is reported by a subscriber station to a base station. The CSI is reported periodically for at least two physical uplink control channels (PUCCH). In case of a collision between a report for a first PUCCH and a report for the second PUCCH, each of the report types is partitioned into one of a number of classes, which include: a first class for rank indicator related report types and wideband (WB) W1 report types; a second class for WB report types or WB channel quality indicator report types; and a third class for subband related report types or W1 report types. A priority rule assigns a priority to each of the classes. The CSI feedback reports are transmitted according to the priority rule such that the report type included in a higher class is transmitted and the report type included in the lower class are dropped.

In 3rd Generation Partnership Project Long Term Evolution (3GPP LTE), Orthogonal Frequency Division Multiplexing (OFDM) is adopted as a downlink (DL) transmission scheme.
The 3GPP LTE (Long Term Evolution) standard is the last stage in the realization of true 4th generation (4G) mobile telephone networks. Most major mobile carriers in the United States and several worldwide carriers have announced plans to convert their networks to LTE beginning in 2009. LTE is a set of enhancements to the Universal Mobile Telecommunications System (UMTS). Much of 3GPP Release 8 focuses on adopting 4G mobile communications technology, including an all-IP flat networking architecture.
The 3GPP LTE standard uses orthogonal frequency division multiplexing (OFDM) for the downlink (i.e., from the base station to the mobile station). Orthogonal frequency division multiplexing (OFDM) is a multi-carrier transmission technique that transmits on many orthogonal frequencies (or subcarriers). The orthogonal subcarriers are individually modulated and separated in frequency such that they do not interfere with one another. This provides high spectral efficiency and resistance to multipath effects.
The following documents and standards descriptions are hereby incorporated into the present disclosure as if fully set forth herein: 1) Document No. R1-101683, "Way Forward For PUCCH", November 2010; and 2) Document No. R1-106557, "CR0270 Introduction of Rel-10 features", December 2010.
In Release 10 LTE systems, a mobile station (or user equipment) performs feedback of precoder matrix index (PMI), rank indicator (RI), and channel quality indicator (CQI) to the base station (or eNodeB). The feedback content and signaling details for periodic channel state information reporting (PUCCH, CQI/PMI/RI reporting) within one component carrier are finalized in Document No. R1-101683. That is, three PUCCH feedback modes to be used are: submode 1 of PUCCH 1-1, submode 2 of PUCCH 1-1, and PUCCH 2-1. According to Document No. R1-106557, the following report types are supported in Rel-10:
Type 1 report supports CQI feedback for the UE selected sub-bands
Type 1a report supports subband CQI and second PMI feedback
Type 2, Type 2b, and Type 2c report supports wideband CQI and PMI feedback.
Type 2a report supports wideband PMI feedback
Type 3 report supports RI feedback
Type 4 report supports wideband CQI
Type 5 report supports RI and wideband PMI feedback
Type 6 report supports RI and PTI feedback

Apparatus and method for periodic channel state reporting in a wireless network


A system and method is provided to perform quick patch level tests in a timely manner. The normal function of the patch is first computed using the convex hull property of the patch. The control points, which indicate the direction of the normals of the normal function, are used to construct a floating cone. This cone contains all the normals to the given patch. The floating cone is then moved in space and is truncated by two parallel planes orthogonal to the cone axis to contain the original given patch. From this information, frontfacing and backfacing volumes are constructed. These volumes are then used to derive information about the patch that can speed up its processing. For example, culling may be performed on the patch level before tessellation into triangles. The time consuming operations of computing normals and the floating cone are performed at the creation time of the patch and are view independent. Therefore, for subsequent views of the same patch, the same cone of normals may be used to determine whether the patch is frontfacing or backfacing, providing substantial time savings in processing.

1. Field of the Invention
The present invention relates to the fast rendering of curved surfaces on a computer graphics display device. More particularly, the present invention relates to the quick patch level tests that speed up display of such surfaces. An example of these tests permits process of face culling on a patch level to eliminate backfacing patches before time consuming processing of the patches is performed.
2. Art Background
In the past, computer graphic systems required extensive display and computer resources. The amount of computation time required to render images was substantial. Images of any complexity required powerful computers to process hours in order to generate an image. Today the technology has greatly improved. The rendering of three-dimensional objects is no longer a process reserved for high-powered mainframe computers. The rendering of complex graphic objects is now realized on smaller, less powerful computers. Furthermore, graphics processes have become more sophisticated. In particular, the utilization of sophisticated graphics primitives is now prevalent. However, the usefulness of the sophisticated graphics primitives is measured in part by the speed at which the computer system can render the primitive on a display device. Although graphics hardware has greatly improved, techniques to circumvent time consuming processing is always desirable.
An example of a three dimensional object is a patch, such as a polynomial or rational patch. A patch is a three dimensional surface which may be a primitive by itself or part of a more sophisticated primitive such as a non-uniform rational B-spline surface (NURBS).
To display a surface primitive such as a patch, the surface primitive is reduced to or tessellated to triangles which are then individually processed, converted to pixel data for subsequent activation on the graphics display device. The process of tessellation of each patch is a fairly expensive operation. After the surface has been tessellated, each resulting triangle is passed to the pipeline. This is illustrated in FIG. 1. A triangle is first analyzed to determine whether it is located outside the modeling clipping region in Modeling Coordinates (MC), the view clipping region, or faces away from the viewer in World Coordinates (WC). If one of these tests is true, the triangle is rejected before performing lighting computations, clipping and rendering in Display Coordinates (DC). Similar pre-processing tests can be done on a surface patch as a whole using the convex hull property of the patch. For example, model clip and view clip tests can be accomplished by checking every control point of the patch. If the patch is not rejected, it is then tessellated and each triangle is processed by the triangle pipeline.
However, it is not apparent how to perform face culling on a patch level. The importance of back face rejections, at the primitive or the patch level has been recognized as key to increased, processing speed. The present invention provides this capability. In addition to face culling, the technique provides other information about the patch that can speed up processing even further. In particular, the technique allows to determine whether the patch is frontfacing, backfacing, has silhouette lines, as well as whether a given light source has any influence on the patch.

Method and apparatus for the rendering of curved surfaces using a cone of normals


An improved cable conveyor system in which buttons provided for pushing the conveyed material are fitted with bearings to relieve the cable of torsional stresses. As a cable is tensioned, torsional stresses are incurred, tending to unwind the braided wire. By providing an opportunity for the cable to unwind, stretching may be carried out without the usual unrelieved torsional stresses.

1. Field of the Invention
The present invention relates generally to a conveyer system. More specifically, the present invention relates to a method and apparatus for mitigating the effects of the stretching and consequent twisting of a cable that is part of a cable conveyance system.
2. Background Art
Cables, due to their flexibility, have been used in conveyance systems for some time. The usual cable conveyance system 200 is shown in FIG. 2 and comprises an endless cable having disc members or buttons 210 attached thereto at even intervals and having a diameter slightly smaller than a conduit through which the cable and button assembly 200 is pulled.
In U.S. Pat. No. 4,195,725, which is hereby incorporated by reference, a drive unit for a cable conveyer is disclosed, having an improved design allowing the driving wheel to be disposed within the material being conveyed.
In U.S. Pat. No. 4,071,136, which is hereby incorporated by reference, a channel housing is disclosed to replace cable tensioning devices used in previous cable conveyor systems.
In U.S. Pat. No. 4,391,361, which is hereby incorporated by reference, an improved hold-down apparatus for cable conveyors is disclosed.
In each of these examples, and those cable conveyer systems 200 shown in FIG. 2, the wire rope, or cable 220, may stretch under tension. A consequence of stretching is a torque due to the twisted braid of the cable 220. No relief to this torque is provided in present cable conveyor systems 200 as the cable 220 is coupled to itself in a rigid arrangement with the couplers 110 shown. Hence, rotational stresses are unrelieved to the detriment of the cable 220 and other conveyor parts.
Therefore, there is a need for a reliable cable conveyor system providing an opportunity for a tensioned cable to twist. Additionally, a mechanism to permit the cable to retwist when relieved of tension is needed.


A substrate processing system includes: a substrate processing apparatus configured to process a substrate with a processing fluid; and a processing fluid supply apparatus configured to supply the processing fluid to the substrate processing apparatus. The processing fluid supply apparatus includes: a circulation line, a gas supply line, a cooler, a pump, a branch line, a heating unit, and a pressure regulator.

In the related art, a substrate processing apparatus is known in which a liquid film for preventing drying is formed on a surface of a semiconductor wafer (hereinafter, referred to as a "wafer"), which is a substrate, and a drying processing is performed by bringing the wafer on which such a liquid film is formed into contact with a processing fluid of a supercritical state (see, e.g., Japanese Patent Laid-Open Publication No. 2013-251547).

Substrate processing system and method for supplying processing fluid


The light-emitting element comprises a first electrode, a second electrode, and a light-emitting layer between the first electrode and the second electrode, in which a first layer, a second layer, and a third layer are stacked from the first electrode side, the first layer contains a first light-emitting substance and a first organic compound, the second layer contains a second light-emitting substance and a second organic compound, the third layer contains the first light-emitting substance and a third organic compound, the amount of the first light-emitting substance is larger than the amount of the first organic compound, the amount of the second organic compound is larger than the amount of the second light-emitting substance, and the amount of the third organic compound is larger than the amount of the first light-emitting substance. A light-emitting element with such a structure can have high emission efficiency.

1. Field of the Invention
One embodiment of the present invention relates to a light-emitting element at least part of which includes an organic compound. The present invention also relates to a lighting device, a light-emitting device, and an electronic apparatus which are provided with the light-emitting element.
2. Description of the Related Art
Development of a light-emitting device using a light-emitting element in which a layer containing an organic compound is provided between a pair of electrodes and light emission is obtained by current flowing between the electrodes has been advanced. Such a light-emitting device can be reduced in thickness and weight in comparison with a display device which is currently called a "thin display device". Moreover, such a light-emitting device is of a self-emission type, and therefore, has a high level of visibility and high response speed. Accordingly, such a light-emitting device has been actively developed as a next-generation display device, and has been partly put into practical use at present.
Such a light-emitting element can emit light of various colors depending on a material contained in a layer containing an organic compound, which serves as an emission center. Moreover, by stacking layers containing emission center materials which exhibit different emission colors, emitted light is combined, and more variations of emission colors can be obtained. In particular, the emphasis is put on white light which can be obtained by combining red light, green light, and blue light or combining emission colors which are in a relationship of complementary colors because white light is suitable for the use of a backlight or lighting, in addition to a display.
In recent years, demand for household electric appliances which consume less power has increased in consideration of problems of oil depletion or global warming. There are a wide variety of approaches to reduce power consumption. In the case of using a self-luminous light-emitting element, emission efficiency of the light-emitting element itself is increased, and thus, power consumption can be reduced. Therefore, a large number of studies regarding improvement of emission efficiency of light-emitting elements have been made (for example, see Patent Document 1).

Semiconductor Energy Laboratory Co., Ltd.


A method and system for mobile information security protection may include extracting, by a first processor, identification information corresponding to a plurality of applications installed on a mobile device, sending the extracted identification information to a server, matching, by a second processor, the identification information to information stored in a database storage, receiving matched information from the database storage as a result of matching the identification information, sending the matched information to the mobile device, and presenting the matched information to a user of the mobile device.

1. Field of Invention
The present invention relates to the field of mobile security, more particularly, to method and system for information security protection from mobile applications.
2. Discussion of Related Art
With the increasing popularity of mobile devices (e.g., smart telephones and other such wireless devices), more users are utilizing their mobile devices to access more and more different types of services over the Internet. For example, there is a trend towards allowing users to interact with banking services and/or networking sites using mobile devices. However, numerous security concerns arise when a user accesses the Internet using a mobile device. In particular, some websites may include malware and/or spyware which may be configured to capture confidential and/or sensitive information/data stored on and/or entered through a mobile device.
Privacy protection becomes more and more important, as computing power of mobile devices is now as powerful as laptops. There are two primary challenges that affect the security strategy of mobile devices. The first challenge is that the speed of software development for mobile devices is far beyond the speed of PC software. Every week, thousands of mobile applications are developed by individual or small developer group, and upload to on-line application store, such as, App Store or Android Market. Applications range from on-line banking, on-line shopping to Social Networking Services, and most of them requires private information more or less, it would be difficult to identify which one is safe or malicious. Existing mobile security software try to solve this matter by continuously monitoring and analyzing behavior of other installed applications. However, such monitoring and analyzing is very time consuming, or simply based on user's subjective decision, such as, which application is trustful or not. It would be often too late when certain privacy risky behavior is detected by the mobile device, and the user's subjective decision is often not accurate enough.
The second challenge is that security apps for mobile devices are expensive to develop and often ineffective. Unlike the PC world, which is dominated by Microsoft, there are several different mobile operating systems—Apple iOS, Android, Windows Mobile, Blackberry, Symbian, etc. Each platform has its own software development environment and a security vendor developing mobile security applications will have to replicate the effort across various platforms. Further, some platforms such as Apple iOS do not allow traditional anti-virus applications on their platform. Loading third party applications, not approved by the platform vendor may lead to violation of contract and often requires "jailbreaking" the device—definitely not an enterprise option. Even if security applications are allowed, they are a headache to deploy, require constant updates, and are easy to circumvent—the user can simply uninstall them if they dislike it. Worst of all, they impact device performance and degrade user experience by stretching the already limited processor and memory resources on the mobile device.

Method and system for mobile information security protection


A fixing device includes: a tubular member having an outer peripheral surface, an inner peripheral surface defining an internal space, and an axis defining an axial direction, the tubular member being configured to move around the axis; a heater disposed in an internal space to radiate heat; a nip member that contacts the inner peripheral surface to transmit the heat to the tubular member; a backup member that is in contact with the outer peripheral surface to form a nip region between the backup member and the tubular member, the backup member applying a load to the nip member; and a stay disposed in the internal space to support the nip member against the load. The nip member includes: a first member that contacts the inner peripheral surface; and a second member disposed between the first member and the stay to transmit the load to the stay.

A conventional fixing device includes an endless fusing film, a heater disposed in an internal space of the fusing film, a nip member defining a nip portion relative to a pressure roller through the fusing film, and a reflection plate for reflecting radiant heat radiated from the heater to the nip member. The above fixing device thermally fixes a developing agent image transferred on a sheet fed between the fusing film and the pressure roller.


A light emitting device (10) comprises a body (11) comprising a substrate (12) of a p-type semiconductor material. The substrate has an upper surface (14) and having formed therein on one side of the upper surface and according to a bulk semi-conductor fabrication process utilizing lateral active area isolation techniques: a first n+-type island (16) to form a first junction (24) between the first island and the substrate; and a second n+-type island (18) spaced laterally from the first island (16). The substrate provides a laterally extending link (20) between the islands having an upper surface. The upper surface of the link, an upper surface of the island (16) and an upper surface of the island (18) collectively form a planar interface (21) between the body (11) and an isolation layer (19) of the device. The device comprises a terminal arrangement to apply a reverse bias to the first junction, to cause the device to emit light. The device is configured to facilitate the transmission of the emitted light.

This invention relates to optoelectronic devices and more particularly to light emitting devices fabricated from a semiconductor material, such as silicon, and a method of fabricating such a device.
Light emitting devices fabricated from silicon are known in the art. One such a device is a two junction device having a sandwiched configuration of immediately adjacent doped p+np+ or n+pn+ regions. The device comprises a first pn junction which is reverse biased into a breakdown mode, to emit light and a neighbouring second pn junction which is forward biased to inject carriers into the first junction, thereby to improve the internal quantum efficiency of the device. It is also known to drive the device into a punch-through mode wherein a depletion region associated with the reverse biased junction punches through to a depletion region associated with the forward biased junction, thereby to lower an energy barrier of the forward biased junction and facilitate the injection of carriers from the forward biased junction into the reverse biased junction and to improve electroluminescence effects in the device.
Another known light emitting device has a sandwiched configuration of immediately adjacent doped n+pp+ or p+nn+ regions. The device comprises a first pn junction, which is reverse biased into a breakdown mode to emit light and a neighbouring pp+ or nn+ junction. In use, the device may be driven into a reach-through mode, in that the depletion region of the reverse biased junction reaches through the p region to the p+ region or through the n region to the n+ region, as the case may be, before the reverse biased junction reaches breakdown, thereby to improve electroluminescence effects in the device.
In modern standard bulk CMOS, including BiCMOS, fabrication processes, more particularly sub-micron processes, lateral device isolation techniques, such as local oxidation of silicon (LOCOS) and/or shallow trench isolation (STI), are used to form physical isolation structures or barriers comprising bodies of an isolating material for laterally isolating from one another doped implanted n+ or p+ active regions for forming junctions with a p- or n-type bulk substrate material. These techniques, by necessity, cause the barriers to be formed between mutually facing faces of the implanted active regions. These barriers between the doped active regions would inhibit the aforementioned punch-through and reach-through modes.
In other known devices, a gate structure is formed between implanted regions, which structure inhibits transmission of emitted light transversely and outwardly from the device.

Silicon light emitting device and method of fabricating same


A connector assembly for permitting sealed passage of tubular lines through portions between separate chambers comprises a first fitting body having a through passage for connection to one of the chambers. The through passage has an outwardly open end with a circumferentially continuous conical mouth. A first rigid disk member with a conical outer surface is received in the conical mouth. Aligned with the first disk member is a second disk member and there are aligned openings formed through both disk members to permit the tubular lines to pass therethrough. Conical chambers are formed about the openings in the first disk member with ferrules positioned therein to closely encircle the tubular lines. A coupling acts to drive the second disk toward the first disk to drive said ferrules into the conical chambers to thereby produce sealing of the ferrules with the lines and to apply force to the first disk to produce sealing between the first disk and the conical mouth.

The subject invention is directed toward the art of pipe joints and couplings and, more particularly, to a connector device for allowing a plurality of tubular members to pass through a wall or partition in sealed relationship.
In many fluid flow systems, as well as in various sensing and control environments, it is often necessary to pass a multiple number of tubular members such as flow lines, probes and sensors through walls and other partitions between sealed chambers. The tubular members are frequently of relatively small diameter and must often be in closely spaced multiples.
The problems encountered in ensuring liquid and gas tight seals about such tubular members at the locations where they pass through partitions and walls between separate sealed chambers are significant. The problems increase drastically in high temperature and high pressure environments.
One of the more common types of connectors used for the purpose discussed, relies on compression glands formed of a variety of different materials depending upon the pressures and temperatures to be encountered. For example, lava rock glands are sometimes used for high temperature and high pressure ambient environments. Other less exotic materials are used for the glands when the operating conditions are less severe. In any event, these prior connectors are expensive and suffer from a variety of disadvantages. Some of the disadvantages include their relatively high cost, high make-up torque, slow and often complicated make-up, and an inability to be re-made after disassembly. Accordingly, a distinct need exists for a simplified and improved connector for the purposes discussed.


A method for detecting a received signal includes: dividing the entire band of the received signal into N frequency components where N is a natural number larger than one, and deciding a reference frequency component containing a reference frequency as a first priority sensing band among the N frequency components; deciding the sensing priorities of the other (N−1) frequency components in such a manner that the sensing priorities spread in both directions from the first priority sensing band; calculating the magnitude of each of the N frequency components in accordance with the decided sensing priorities; comparing the calculated magnitude of the frequency component with a predetermined threshold value; and when the calculated magnitude of the frequency component is larger than the threshold value, determining that the received signal exists.

1. Field of the Invention
Exemplary embodiments of the present invention relate to a method and apparatus for detecting a received signal; and, more particularly, to a method and apparatus for detecting a received signal in a wireless communication system.
2. Description of Related Art
In the spectrum sensing of a wireless communication system, a signal received by a sensing receiver is detected as follows. First, the spectrum components of the entire bands of the received signal are calculated. Then, the calculated spectrum components are used to determine whether the received signal exists or not. In this case, a fast Fourier transform (FFT) algorithm for calculating the entire frequency bands at one time is mainly used to calculate the spectrum components.
In the method for detecting a received signal using the FFT algorithm, the entire frequency bands of the received signal are calculated at one time, as described above. Therefore, the complexity of calculation is high. Furthermore, when the received signal is an Advanced Television Systems Committee (ATSC) signal or a National Television Systems Committee (NTSC) signal, unnecessary frequency components should be calculated together, even though a signal having a relatively strong intensity exists in a specific frequency band. Therefore, the amount of calculation inevitably increases.
Meanwhile, a general wired communication system detects a received signal through a tone detection technique using the Goertzel algorithm. The Goertzel algorithm is an algorithm considering a wired channel environment in which a frequency offset does not exist, that is, the frequency is not distorted while a wireless signal is transmitted through a channel. Therefore, when the Goertzel algorithm is applied to a wireless communication system, that is, a wireless channel environment, it is impossible to detect a wireless signal in which a frequency offset exists.

Method and apparatus for detecting received signal in wireless communication system

Electronics and Telecommunications Research Institute


A lighting device (100, 200, 300, 400) is disclosed. The device comprises a plurality of light sources (111, 119, 120, 211, 219, 220) providing light in different wavelengths, a collimating means (104, 204) having a receiving end (103, 203, 407) and an output end (114, 214, 409), wherein said light sources are arranged at said receiving end. The collimating means comprises a set of wavelength selective filters (109, 110, 115, 116, 117, 118, 215, 217) arranged as sub-collimators (106, 107, 108, 206, 207, 208) to each of said plurality of light sources such that, for each light source, said sub-collimator collimates the light from its light source, and said wavelength selective filter of said each light source is translucent for light from adjacent light sources of different wavelength, wherein said wavelength selective filters are high pass or low pass filters.

WO 2006/129220 A1 discloses a light emitting device comprising collimating means comprising filters reflecting light of certain properties towards an output area of the collimating means. There may be effects of discoloration with light emitting devices as the one disclosed in WO 2006/129220 A1, especially at large angles of light spread. It is therefore a desire to provide an improved lighting device.