A composition for forming a waterproof, high strength, hard material having good insulation properties, comprising a mixture of crushed pumice, type S mortar and glass fibers, which forms the hard material upon the addition of water and after allowing the mixture to cure. The material has superior insulation properties to conventional compositions formed using portland cement instead of type S mortar.

The invention relates generally to the field of curable compositions for forming an insulating material, as well as the insulating material itself, as used for example in fireplace or refrigeration constructions In particular, the invention relates to the field of such compositions where the resulting material is a block or panel comprised of crushed pumice, type S mortar, and glass fibers.
For ultra-high temperature or ultra-low temperature applications, special construction materials must be used. Many of the normal construction materials such as wood, metal, concrete block or brick are not suitable for such applications. It is necessary to provide a material whose composition enables it to withstand the extreme temperatures. Many such materials are known in the industry. For example, it is well known to use refractory blocks or bricks in fireplace constructions. These materials have both high temperature resistance and high strength.
A composition which has prove to be successful in these applications includes the use of crushed pumice as an aggregate filler. Pumice is a volcanic stone which is strong yet lightweight A cubic foot can weigh as little as 24 to 30 pounds, due to the presence of numerous sealed air chambers and pockets within the individual stones. Crushed pumice can range in size from pieces three-quarter inches in diameter to that of a grain of sand. Pumice will actually float in water. Prior to this invention, the pumice has always been mixed with portland cement and formed into blocks, panels or bricks. Portland cement is an hydraulic cement produced by pulverizing clinker consisting essentially of hydraulic calcium silicates, usually containing one or more forms of calcium sulfate as an interground addition. The pumice allows for a block roughly one-third lighter in weight than a block of conventional concrete. The pumice block has high insulation properties due to the entrapped air chambers, and is therefor ideally suited for extreme temperature applications.
To be used in fireplace constructions, pumice block must meet minimum standards regarding both compressive strengths and heat penetration. Additionally, the blocks must be able to withstand long-term and repeated high temperature situations without suffering degradation or deterioration. As it is desirable in construction to minimize the amount, size and weight of construction materials, while still meeting the structural requirements and standards, experimentation is ongoing to develop improved construction compositions utilizing pumice.
It has been discovered that pumice panels or blocks having improved structural and temperature insulation properties can be formed of a new composition not known in the field. The pumice blocks of the new composition allow for the use of thinner blocks than those required under the old composition, while providing increased temperature insulation, higher compressive strengths and lesser degradation under long-term conditions.


A blow molding machine for shaping plastics material pre-forms into plastics material containers, has a plurality of blow molding stations with blow mold carriers for holding blow molds, including a clean room for arranging or conveying the blow molding stations under aseptic conditions and having an installation access to the clean room for installing the blow mold carriers with blow molding station components. The installation access includes at least one sterile room which is positioned in front of the clean room with the plurality of blow molding stations on the environment side.

The invention relates to a blow moulding machine for shaping plastics material pre-forms into plastics material containers, comprising a plurality of blow moulding stations with blow mould carriers for holding blow moulds, comprising a clean room for arranging or conveying the blow moulding stations under aseptic conditions and comprising an installation access to the clean room for installing the blow mould carriers with the blow moulding station components.
The invention also relates to a method of exchanging components of a blow moulding station in a clean room of a blow moulding machine, in which the clean room is opened and in which the blow moulding station components are exchanged.
In addition, the invention relates to both a beverage filling plant and a beverage container production plant.
Generic blow moulding machines, in particular stretch blow moulding machines, beverage filling plants and/or beverage container production plants are well known from the prior art.
By way of example, the Offenlegungsschrift (Laid-Open specification) DE 10 2008 038 141 A1 discloses a plant for the production of plastics material containers with a clean room in which the plastics material containers are both produced and filled with beverages. In this respect the production plant comprises an apparatus for shaping plastics material pre-forms into the plastics material containers and a filling device for the latter. The shaping apparatus has a plurality of blow moulding stations with blow mould carriers for holding blow moulds, in which the plastics material pre-forms are expanded to form the plastics material containers. The subject matter of DE 10 2008 038 141 A1 is hereby made the content of the disclosure of the present application by reference in its entirety. It is to be understood that in order to produce plastics material containers of different design, for example with respect to a volume and/or a contour, it is also necessary for different blow moulds to be used on the shaping apparatus. A corresponding exchange is carried out manually on the shaping apparatus in this case in that a first blow mould set with blow moulds of a first type is exchanged for a further blow mould set with blow moulds of a second type. After the exchange, it is necessary to sterilize not only the new blow moulds inside the clean room in order to prevent contamination of the plastics material pre-forms or the plastics material containers respectively with germs, but also the previously opened clean room itself.
In order to facilitate an exchange of the blow moulds, it is known to keep a set of blow moulds to be exchanged in a mobile magazine apparatus in which the blow moulds are received individually on receiving means of a carrier device. In this case a transfer of the individual blow moulds between a blow moulding station of a shaping apparatus and the magazine apparatus can be carried out manually or at least in a semi-automated manner. Some mobile magazine apparatus can have in this case a cleaning device, by means of which the blow moulds can be rinsed, brushed, polished, disinfected and/or sterilized for example at the same time.
As a result, although blow moulds which are already sterilized and therefore ready for use immediately can be produced, there is always nevertheless a risk that the clean room will be contaminated during the opening and so a sterilization of the clean room and the devices, tools etc. present in it will necessarily have to be carried out after the exchange of the new blow moulds. This, however, leads to a considerable delay in the production.

Blow moulding machine, method of exchanging blow moulding station components and beverage filling plant and/or beverage container production plant


A process is disclosed for discriminating between received ranging signals, such as GPS, GNSS, and radar signals, which arrive via a single path and those which arrive via multiple paths. The number of paths is also estimated. This is accomplished by comparing the residual for an ith order ML estimator of signal time of arrival, where order refers to the number of signal paths for which the estimator is optimal, to a discriminant determined either analytically or empirically and deciding that i distinct signal path components are present in the observation of the signal if for all kth order estimators where k<i, the residual is greater than the discriminant for that order estimator and the residual of the ith order estimator is not greater than the discriminant for that order estimator. The invention is particularly useful in obtaining an appropriate signal model for model-based estimation methods.

1. Field of the Invention
This invention relates to signal transmission ranging systems, such as GPS, radar, sonar, lidar and the like, in which the generally deleterious multiple propagation path (multipath) induced ranging errors are operating. More specifically, this invention provides improvement in ranging error when secondary path signals are not far separated from the direct path signal.
2. Description of Related Art
The direct and each secondary path signal propagated to a signal receiver can be described by three parameters: amplitude, carrier phase, and signal modulation delay. Secondary path signals most generally result from reflections of direct path signals. Reflections are subject to additional propagation loss, delay, and electromagnetic effects (phase shift) characteristic of the reflecting materials. In toto, relative to the direct path signal, reflected signals are observed later in time with generally lower amplitude and with randomized phase. The difference in delay of secondary path signals and the direct path signal is here referred to as "path separation"—always a non-negative quantity. It is cognitively useful to normalize delay difference by multiplying by the speed of signal propagation to refer to path separation in distance (range) units.
It is understood in the art that ranging information is carried by both signal modulation and carrier phase. Carrier phase derived range is ambiguous from wavelength to wavelength. In short wavelength systems, modulation derived range is generally used to assist in resolving this ambiguity. Partly motivated by optimal methods for estimating range from noisy signal observations in systems with a priori information on signal modulation, range is obtained by correlating the received signal envelope with stored and delayed replicas of the signal modulation aligned with the received signal.
There are two methods in use for mitigating degradations in ranging accuracy caused by multiple signal propagation paths. The first, referred to here as the waveform method, uses specially designed waveforms as reference functions for cross-correlating with the received signal envelope. In GPS, as an example of a ranging system, range-to-satellite, referred to as pseudorange, can be measured by correlating the received signal envelope with two chipping sequences each the same as that broadcast by the GPS satellites but separated in time by some fraction of the duration of a chip. The difference in values between the correlation of the chipping sequences and the received signal is a discriminator function which, in a feedback loop referred to as a Delay Lock Loop (DLL), is delayed or advanced in time so that the chipping sequences straddle the received signal, producing a null at the delay or advance constituting the time of signal reception. The presence of multipath in the received signal causes the null to shift. This shift is a ranging error which may be very appreciable depending on the intensity of the multipath signal(s). In fact, multipath induced null shift when secondary path signals of appreciable intensity are observed is typically a dominant ranging error source.
The difference in correlation values between the received signal modulation and two chipping sequences separated by a given time increment can be obtained more directly by correlating the received signal envelope with the difference between these chipping sequences. The correlation of such bipolar functions with the received signal envelope varies from one polarity through a null to the other polarity which provides the DLL with the information needed to accomplish alignment with the received signal. For elaboration on this technique refer to Chapter 4-4 of the book entitled "Telecommunication Systems Engineering" by Lindsey, W. C. and Simon, M. K. published by Prentice-Hall, Inc. 1973 or the paper "Theory and Performance of Narrow Correlator Spacing in a GPS Receiver," Van Dierendonck, et al in Proceedings of the National Technical Meeting, Institute of Navigation, 1992 pp. 115-124.
The bipolar pulses described above are in a sense the simplest of a class of correlator reference waveforms than have been devised to reduce the DLL null shift effect occurring when multipath is present. The reader is referred to U.S. Pat. No. 6,023,489 "Method and Apparatus for Code Synchronization in a Global Positioning System Receiver," R. R. Hatch; and U.S. Pat. No. 6,272,189 "Signal Correlation Techniques for a Receiver of a Spread Spectrum Signal Including a Pseudorandom Noise Code that Reduces Errors when a Multipath Signal is Present," L. Garin et al, for examples of these special waveforms. The somewhat more complex correlator reference waveforms described in these patents operate to provide improved multipath error performance at high path separation. Inherent in the behavior of a delay discriminator these special waveforms can have little to no effect on mitigating the null shift when the shift is small, perhaps less than several meters.
More optimal methods using classical Maximum Likelihood (ML) estimation techniques for mitigating the effects of multipath, in the sense that pseudorange errors are capable of being reduced to near unimprovable low levels when secondary path signals are observed, have been described in the patent records of the U.S. Patent office. This is emphasized by comparing the RMS delay estimate error with an ML estimator to an exemplary waveform delay estimator as displayed in FIG. 1. The reader is referred to U.S. Pat. No. 5,615,232 "Method of Estimating a Line of Sight Signal Propagation Time Using a Reduced Multipath Correlation Function," R. D. J. Van Nee, and U.S. Pat. No. 6,370,207 "Method for Mitigating Multipath Effects in Radio Systems," L. R. Weill, et al for elaboration on ML-based ranging methods. Prior to these inventions ML estimation in the case of multipath signals was infeasible for real-time processing applications. Van Nee forms the correlation of a reference chipping sequence with the received signal modulation. This function is reduced iteratively by estimating signal parameters using a search process for the next most intense secondary path signal remaining on each iteration and subtracting the correlation function estimated with those signal parameters. Weill, et al formulate the likelihood in terms of linearized functions related to the nuisance parameters of the direct and secondary path(s) signal(s) to reduce the ML estimation problem to a search in only the delay parameters of the direct and secondary path(s) signal components. As compared to a search over all the signal parameters, reduced search dimensionality is more rapidly executed by orders of magnitude, and is done in the interest of making feasible real-time ML quality range estimates.

Method for improving multipath mitigator low path separation error behavior


A shaft adapter for removably mounting to the output or drive shaft of a grinding machine is disclosed. The shaft adapter is a three-component device which includes a collar portion, a compressible drive sleeve and an extension member. The extension member has a free-end adapted to matingly engage with a particular grinding cup. When the shaft adapted is mounted on the drive shaft, the compressible drive sleeve is compressed and elastically deformed between the corresponding, engaging ends of the collar portion and extension member so as to create a secure driving force between the rotating drive shaft of the grinding machine and the shaft adapter so that they rotate together as a unit when the grinding machine is in use.

In a typical grinding machine, the rotor or output shaft of the machine and a suitable grinding cup are engaged and rotate together providing a means for sharpening and/or re-shaping drill bits. Over time, however, the connection between the output shaft and the grinding cup wears causing the grinding cup to become loose in its "seat" in the end of the shaft, making the grinding cup more likely to fall out. As well, the loose fitting connection between the grinding cup and the output shaft decreases the overall efficiency of the grinding machine. Replacing the entire rotor shaft, however, can be both costly and time consuming.
Various adapters or chucks are known for mounting a grinding cup to the shaft of a grinding machine. For instance, U.S. Pat. No. 6,835,114 to Sjolander discloses a holder device (see FIG. 14) for anchoring a grinding cup to an output shaft of a grinding machine. The body portion of the holder device has a centrally disposed cavity that is sized and shaped to permit the holder device to be detachably connected to the output drive shaft of the grinding machine. Retaining means are provided on either the output drive shaft or in the adapter (or a combination of both) to detachably retain the holder device so that it will not fly off the output shaft during use. The centrally disposed cavity has a drive section formed at the end thereof for drivably engaging the end of the output shaft. The drive section preferably has a hexagonal cross-section which is specifically adapted to engage with a specific output shaft of a grinding machine having a hexagonally-shaped end. Accordingly, the holder device is not easily adaptable to drivingly engage various forms of output shafts.


Methods and systems for carrying different signals required for MIMO communication using a single coaxial cable between two endpoints of a distributed antenna system (DAS) network. Original MIMO signals having the same frequency are frequency-separated at a first endpoint of the network. The frequency-separated signals are propagated together over the single coaxial cable and then reconstructed to their original frequency at a second endpoint of the network.

The invention relates generally to wireless communication systems and services and more particularly to Multiple Input Multiple Output (MIMO) technology applied to Distributed Antenna Systems (DAS).
An internal wireless communication system is often deployed to overcome coverage problems inside buildings. The most commonly used internal coverage system is a Distributed Antenna System in which multiple antennas are distributed in the building to provide the required coverage. The antennas are connected, directly or indirectly, to a radio source through coaxial ("coax") cables. The DAS can provide a multiplicity of wireless services in a variety of frequency bands. Since each wireless service is operated in a distinct frequency band, the services do not interfere with each other when they are propagated through the coaxial cables. Using such an architecture, it is possible to provide a multiplicity of services to each antenna of a DAS via a single coaxial cable, while the feeding point is located remotely in a service closet or in a communication room.
An exemplary known DAS is shown in FIG. 1. Three services (Service A, Service B and Service C) are connected to a service combiner 102. The signals of the services are combined in a way that each coaxial cable 104 carries the three services. Since the services are in different frequency bands, they can be distributed on the same cable without disturbing each other. The cables connect the service combiner to antennas located in locations 1 to 4 chosen to provide optimal coverage to the covered area.
The emergence of the MIMO technology has changed the situation. MIMO technology is based on reception and transmission of signals that share the same spectrum, through two or more co-located antennas. That is, MIMO is a technology in which each antenna location includes multiple antennas that process different data streams at the same frequency.
One problem with trying to implement DAS architectures with MIMO technology is the requirement to route each of the MIMO signals in a separate coaxial cable to avoid mutual interference between the signals. This may result in significant increase in the amount of coaxial cables required and may significantly increase the cost and complexity of the installation.
Therefore, there is a need for and it would be advantageous to have systems and methods that supporting implementation of MIMO technology with a "conventional" DAS architecture, i.e. the use of a single coaxial cable.


Transfer pads for horizontal and/or vertical translocation are provided. The transfer pads include the fewest possible number of components required to provide a plenum chamber, the operative features of which are controlled at least by the provision of one or more interior sheets having specific characteristics with respect to position, perforation and attachment.

In the medical industry, there is often a need to safely and efficiently lift and transfer a patient between surfaces that may be co-planar, higher or lower with respect to one another. In the past, such transfer operations have involved the use of either complicated and expensive mechanical lift systems, or other devices that instead require physical exertion on the part of the medical personnel who must bend and lift to effect the transfer. However, injuries to both the patient and the medical personnel can be associated with moving substantially immobilized patients for treatment. Typically, the injurious nature of such transfer operations is inflicted upon the medical personnel due to the repetitive bending and lifting strains performed on a daily basis. This can lead not only to pain and discomfort for the afflicted medial personnel, but can also lead to lost time and disability, which is costly to both the employer and the employee.
Similarly, in the hospitality industry, housekeeping staff perform tasks daily that involve the physical exertion of bending and lifting, such as changing bed linens, wherein the housekeeping staff must bend their backs and lift heavy mattress repeatedly in order to change the linens and tuck them neatly into place. Reports of related injuries, lost time and disability associated with performing the above tasks are widely known.
There is a clear need for a simple, inexpensive and highly effective device to assist medical personnel and housekeeping staff in the performance of their duties while minimizing the risk of injury associated with the required tasks. This need is also clearly extended to numerous other industries that involve lifting and moving heavy and/or bulky objects, which impose similar strains on the performance personnel.
The use of pressurized fluid-filled vertical lifting or horizontal transfer devices has been known. Such devices are disclosed, for example, in U.S. Pat. No. 7,028,350 to Davis, U.S. Pat. No. 6,199,827 to Rimington et al., U.S. Pat. No. 4,417,639 to Wegener and U.S. Pat. No. 4,099,276 to Hunt et al. Another device is U.S. Pat. No. 7,725,963 to Johnson, which provides horizontal movement of a patient or object using a pressurized fluid-filled transfer pad that generates a controlled fluid film that lifts and enables horizontal movement of the pad.
However, the specific features of the transfer devices according to the present invention, and the unique combinations thereof described in more detail below, are not provided in conjunction with any single prior art lifting and transfer device. The present invention thus represents a significant improvement over the heretofore known lifting and transfer devices by providing low pressure fluidized devices that perform horizontal and/or vertical transfer operations, improve effective lifetime and overall operational efficiency of the device, reduce costs and reduce the potential for injuries and damage.

Low pressure fluidized horizontal and vertical movement device


Techniques for creating compelling extended reality (XR) environments, including virtual reality (VR) and mixed reality (MR), and other computer-generated experiences, are provided. In some embodiments, a VR and MR system, including a computer hardware- and software-based control system, controls a specialized headset, hand controls, and a distributed array of sensors and actuators to produce a VR or MR environment with compelling VR and MR display and social interaction features. In some embodiments, the VR and MR system creates and provides escalating levels of data access, permissions and experiences for users, based on different, multi-phased ratings. In some embodiments, a first rating sets a level of access to gameplay leading to a second rating. In some such embodiments, one user's VR or MR experience related to another user is modified aesthetically, haptically or otherwise, depending on the levels granted by another user, and other attributes.

Extended reality ("XR") refers to techniques for creating any forms of computer-created or -enhanced environments, including virtual reality ("VR"), augmented reality ("AR") and mixed reality ("MR"). VR refers to technical systems creating a 3-dimensional ("3D") simulated environment, with which a user can interact (a "VR environment"). AR refers to systems overlaying aspects of such a VR environment onto part of an existing or natural environment to enhance it, allowing a user of such a system to continue seeing aspects of the existing or natural environment with simulated enhancements (an "AR environment"). MR refers generally to mixed virtual and real environments in a single experience. Thus, AR is a form of MR.
A variety of VR and MR interfaces and display technologies have been developed, beginning at least in the 1960's, with Morton Heilig's SENSORAMA system. The SENSORAMA created a 3D scene, as well as other sensory perceptions, such as sound and scents, using a floor-mounted display/user interface unit.
In the ensuing decades, VR and, more recently, MR, displays have become more sophisticated, as well as lighter-weight and portable. The improvement and miniaturization of computer systems has enabled the development of VR and MR headsets, glasses and body sensors, allowing users to "walk around" and change their viewing angle, interacting with a VR or MR environment. Other specialized VR and MR hardware such as hand controls have been developed, further enhancing users' ability to interact with a VR or MR environment.
Generally, VR and MR systems have been available for quite some time. However, as with 3D display systems in general, AR and MR have been notoriously slow to catch on, perhaps for a variety of reasons that are not well understood. There is still a need for more compelling AR and MR systems.
It should be noted that some of the disclosures set forth as background, such as, but not limited to, the above language under the heading "Background," do not relate exclusively to prior art and the state of the art in the field(s) of the invention, and should not be construed as an admission with respect thereto.

Systems and methods for creating and sharing virtual and augmented experiences


A hand-held power tool includes a drive unit that has at least one gear-shift transmission which can shift at least between two different gear steps; a striking mechanism that can be activated for performing a striking mode is associated with the drive unit; a shifting unit is provided for shifting the gear-shift transmission between the at least two different gear steps and/or for activating/deactivating the striking mechanism, and a communication interface is provided for communicating with a user-actuated user guiding unit and is configured to receive shifting instructions from the user guiding unit in order for the transmission to shift in an application-specific manner between the two different gear steps and/or for the striking mechanism to be activated/deactivated.

The disclosure relates to a portable power tool having a drive unit which has at least one shiftable gearbox which is shiftable at least between two different gear ratios, the drive unit is assigned a percussion mechanism which is able to be activated in order to carry out a percussive operation.
Portable power tools which have a drive unit with a drive motor, wherein the drive unit is assigned a percussion mechanism and/or a shiftable gearbox, are known from the prior art. In order to activate/deactivate the percussion mechanism and/or shift the drive unit between two or more different gear ratios, the drive unit is in this case assigned in each case a manually actuable shifting element.
Furthermore, EP 2 848 371 A1 discloses a portable power tool having a gearshift unit which is provided with an actuable shifting ring and an actuating unit with a servomotor. In this case, the servomotor is configured, upon activation, to actuate the actuable shifting ring in order to shift between different gear ratios. This portable power tool does not have a percussion mechanism, however.

Hand-held power tool comprising a communication interface


A control system to control a position quantity of a movable object in dependency of signals provided by a sensor representing an actual position quantity of the moveable object, the control system being configured to provide a drive signal to an actuator which is able to apply forces to the moveable object, the control system including a set-point generator to provide a reference signal; a subtractor to provide an error signal, the error signal being the difference between the reference signal and the signals provided by the sensor; a control unit to provide a drive signal to the actuator in dependency of the error signal, wherein the control unit comprises a nonlinear controller to improve a low-frequency disturbance suppression, and wherein the control unit further includes a compensator to at least partially compensate the deterioration of the high-frequency behavior caused by the nonlinear controller.

A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In such a case, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. including part of, one, or several dies) on a substrate (e.g. a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Conventional lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at once, and so-called scanners, in which each target portion is irradiated by scanning the pattern through a radiation beam in a given direction (the "scanning"-direction) while synchronously scanning the substrate parallel or anti-parallel to this direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.
A lithographic apparatus generally includes moveable objects, such as for instance a support constructed to support the patterning device or a substrate table to hold the substrate. In these cases, positioning systems are provided to position the moveable objects with respect to another object, such as a frame, for instance a metrology frame or a base frame. Positioning systems generally include an actuator to apply a force to the moveable object in dependency of a drive signal provided by a control system.
The control system is configured to control a position quantity of the moveable object, such as a position, velocity, acceleration, jerk, etc., and can be an absolute or relative position quantity. In high-accuracy applications such as a lithographic apparatus, it is desirable that the positioning system provides closed-loop control and therefore includes a sensor to measure the actual position quantity of the moveable object, which is "fed back" into the control system as an input. Open-loop control without the use of a sensor may suffice if the required accuracy is relatively low.
Generally, a control system includes a set-point generator to provide a reference signal that represents a desired position quantity of the moveable object. The control system further includes a subtractor to compare the actual position quantity with the desired position quantity. The difference between the signals representing the actual and desired position quantity, i.e. the reference sensor and the signals provided by the sensor, is supplied to a control unit, which drives the actuator based on the difference (also known as error signal). The control unit usually includes a feedback controller and may include a feed-forward controller that provides an additional drive signal in dependency of a reference signal only.
The aim when designing a control system is to improve the low-frequency disturbance suppression while maintaining favorable high-frequency noise properties. However, bound by inherent design limitations a linear feedback control system generally fails in satisfying this aim to the fullest, especially when the behavior of the combination of actuator and moveable object is varying with the position. In that case, it may be difficult to optimize the control system over the entire positioning range. The varying behavior can be due to motor position dependent actuator properties (e.g. a motor position dependent motor constant), or when properties of parts of the moveable object are position dependent (e.g. a spring constant that is position dependent). To exceed beyond the possibilities given by a nominal (and linear) control system, nonlinear control can be used.
An example of nonlinear control is a variable gain control, wherein the gain of the control system is not constant for a given frequency, but depending on, for instance, the difference between the actual and desired position quantity of the moveable object. This increases the flexibility in dealing with position-dependent disturbances and thereby improves the low-frequency disturbance suppression. However, a drawback of this approach is that at the same time the high-frequency noise properties may deteriorate. This reduces the obtainable position accuracy of the positioning system and may result in imaging problems and/or overlay errors in the lithographic apparatus.

Lithographic apparatus and control system


According to a novel mechanism, each processing device (e.g., a central processing unit (CPU) in a multi-processor system) is assigned to process a single execution thread for a task and the execution thread is processed across various layers of the multi-processor system (such as a network layer and application layer) without being divided into separate threads. Advantageously, upon initialization of the multi-processor system, network context data structures are created equal to the number of processing devices in the system. As used herein, a network context is a logical entity to which zero or more connections are bound during their lifetime. Rather than sharing data structures among execution threads, a multi-processor system allocates memory resources per each network context during initialization of the system. As a result, an execution thread processing a task queued to a particular network context accesses memory resources allocated for that network context only.

It is known to parallelize processing of data packets so that more than one data packet can be executed at the same time in a multi-processor system. Multi-processor is useful when a single task takes long to complete and processing data packets serially (e.g., one at a time) would slow down the overall data packet throughput. A data packet is a unit of data transmitted as a discrete entity between devices over a network.
Some multi-processor systems follow the ISO/OSI (International Standards Organization/Open System Interconnection) model, which defines a networking framework for implementing protocols in seven layers. These layers are an application layer, a presentation layer, a session layer, a transport layer, a network layer, a data link layer, and a physical layer. These layers will be described in greater detail in reference to FIG. 2. In such a system, control is passed from one layer to the next during execution of a data packet.
Increasing overall system performance is a goal that most multi-processor systems aim to achieve. Existing multi-processor systems usually parallelize processing of data packets in a network layer of the multi-processor system and divide the data packet processing between a network layer and an application layer. The network and transport layers provide identifiers, known as internet protocol (IP) addresses and ports that uniquely identify an endpoint of a two way communication in what is termed as a connection. The network layer also determines the route from the source device (e.g., a device that sends a request) to the destination device (a device that receives the request). The transport layer performs data flow control and provides recovery mechanisms from packet loss during network transmission. The application layer is the layer at which applications utilize network services in the layers below it to do various user driven functions like file transfer, database transactions and the like. Typically, first, a network layer processes inbound data packets and after processing them signals an application thread (which runs in the application layer) to continue the processing. A thread is a separate stream of packet execution. An application thread at some point picks up the packet and performs processing in a separate application thread. Thus, dividing processing of data packets between the two layers presents scheduling delays and impacts overall system's performance.
Moreover, conventionally, an application layer would execute application threads to process data packets arriving from the network layer. Once the network layer processes a data packet on one processor, it then hands off a data packet to the application layer, which runs separate application threads on another processor. Even though the processors are capable of operating independently, still the processor executing the application thread may need to wait for the results of the execution of the network thread on another processor. As a result, at least two processors were required to process a data packet from a network layer up to the application layer.
Furthermore, when one or more application threads are executed in parallel in a multi-processor system, they often need to access common resources (such as data structures). If more than one thread tries to access the same resource to process a data packet, a lock is needed to prevent two threads from accessing the same resource(s). Implementing locks, however, can be burdensome and expensive and can slow down performance of the system.
Accordingly, what is needed is a mechanism that can increase overall system's performance by eliminating shortcomings of dividing data packet processing between network processing and application processing without locking requisite resources.

Combined network and application processing in a multiprocessing environment


A sampling digitizer comprises a sampling head 11, a clock generator 12, a digitizer 13 and a trigger circuit 14. A clock signal from the clock generator is also supplied to a delay element 15, and a change-over switch 16 switches from an output from the delay element 15 to a clock signal which does not pass through the delay element 15 to feed the sampling head 11 in response to a trigger signal from the trigger circuit.

The present invention relates to an apparatus for sampling a fast rate repeated waveform with a slower rate clock to convert it into a low rate waveform for purpose of observation, measurement and analysis (such apparatus will be hereafter referred to as xe2x80x9csampling digitizerxe2x80x9d), such a method and a semiconductor integrated circuit testing equipment provided with a sampling digitizer.
As is well known in the art, a sampling digitizer, comprises a sampling head 11, a clock generator 12, an apparatus (hereafter referred to as xe2x80x9cdigitizer sectionxe2x80x9d) 13 which observes, measures and/or analyzes a signal waveform, and a trigger circuit 14, as illustrated in FIG. 1. The sampling digitizer converts a high rate repeated signal (waveform) HRS input to the sampling head 11 (usually formed by a circuit including a diode bridge) into a low rate repeated signal (waveform) by an equivalent sampling technique to be described later, and performs an observation, measurement and analysis of the input waveform of the high rate repeated signal HRS by observing, measuring and analyzing the waveform of the low rate repeated signal.
The equivalent sampling technique is illustrated in FIG. 2A for a high rate repeated signal HRS having a period T and input to the sampling head 11, as an example. In this instance, the clocking generator 12 generates a clock signal CLK1 and supplies it to the sampling head 11 at a given sampling rate (period) T1 equal to (nT+xcex94t) such that sample timings t1, t2, t2, . . . for the repeated signal HRS be sequentially offset in their phases within the period T by a minimal time interval xcex94t which corresponds to a constant phase (in the example shown, the phase of the sample timings is sequentially lagging by xcex94t). The given minimal interval xcex94t by which the phase of the sample timing is sequentially offset in the period T is referred to in the art as xe2x80x9cequivalent sampling intervalxe2x80x9d. When the frequency of a clock signal CLK having a period equal to a time interval nT obtained by subtracting the equivalent sampling interval from the period T1 is denoted by F, n is equal to the quotient of dividing the frequency of the high rate repeated signal HRS by the frequency F of the clock signal CLK. Usually, the frequency F of the clock signal CLK is chosen relative to the frequency of the high rate repeated signal HRS so that the quotient n is an integer.
As a consequence of this, the sampling head 11 delivers a low rate data signal OUT1 at the sampling rate T1. As shown in FIG. 2C, the low rate data signal OUT1 appears as converted into a waveform data train a, b, c, . . . in which the amplitude level changes stepwise in alignment with sample timings t1, t2, t3, . . . Waveform data train a, b, c, . . . is downloaded into the digitizer section 13, and when it is superimposed every period nT, the waveform data a, b, c, . . . are plotted at a time interval of the equivalent sampling interval xcex94t. Accordingly, as shown in FIG. 2D, there is obtained a low rate repeated signal LRS1 having a period T3 which is equal to the sampling rate T1 multiplied by the number of samples per period T of the high rate repeated signal HRS. It follows that the waveform of the low rate repeated signal LRS1 is substantially identical with the waveform of the high rate repeated signal HRS.
It is to be noted that in order to facilitate the understanding of the equivalent sampling technique, the waveform of the high rate repeated signal HRS is shown enlarged and the equivalent sampling interval xcex94t is shown lengthened in FIG. 2. Thus, in FIG. 2, n=3 and the sampling rate T1=3T+xcex94t. However, the high rate repeated signal HRS generally has a frequency which is much greater than the frequency F of the clock signal CLK, and accordingly, n assumes a significantly higher value.
Describing this in terms of specific figures, the high rate repeated signal HRS may have a frequency of 1 GHz (or its period is 1 ns) while the internal clock signal CLK of the clock generator 12 may have a frequency F of 100 kHz. Assuming in this instance that the number of samples per period T (1 ns) of the high rate repeated signal HRS is equal to 100 (thus acquiring 100 data items per period T while sequentially delaying the phase of the sample timing by the equivalent sampling interval xcex94t), it follows that adjacent two sample points are spaced apart by 1 ns/100=10 ps, which is the equivalent sampling interval xcex94t. Consequently, the clock generator 12 generates and delivers to the sampling head 11 the clock signal CLK1 at the sampling rate T1=1 nsxc3x97(1 GHz/100 kHz)+10 ps=10 xcexcs+10 ps. The sampling head 11 delivers the waveform data train a, b, c, . . . in which the amplitude level changes stepwise at sample timings t1, t2, t3, . . . at the sampling rate T1=10 xcexcs+10 ps. Such waveform data is downloaded into the digitizer section 13. When downloaded waveform data is synthesized at a time interval between the sample timings or the equivalent sampling interval of 10 ps (or xcex94t), there is obtained the low rate repeated signal LRS1 having a period T3 corresponding to (10 xcexcs+10 ps)xc3x97100 as shown in FIG. 2D.
The trigger circuit 14 has the function of establishing a start point of observation, measurement and/or analysis of the waveform of the high rate repeated signal HRS. Specifically, information relating to a start point of observation, measurement and/or analysis of the waveform such as a level, a rising edge, a falling edge or the like (hereafter referred to as xe2x80x9ctrigger informationxe2x80x9d) is preset in the trigger circuit 14. When trigger information contained in the data signal OUT1 (waveform data train a, b, c, . . .) which is fed from the sampling head 11 to the trigger circuit 14 matches the trigger information which is preset in the trigger circuit 14, the latter produces a trigger signal TR, which is applied to the digitizer section 13. The digitizer section 13 initiates downloading the waveform data train from the time the trigger signal is applied thereto. Thus from the time (hereafter referred to as xe2x80x9ctrigger pointxe2x80x9d) the trigger circuit 14 produces the trigger signal TR, the observation, measurement, analysis and the like of the waveform of the high rate repeated signal HRS is initiated using the low rate repeated signal LRS1. Instead of directly feeding the sampled output of the sampling head 11 to the digitizer section 13 and the trigger circuit 14, the output may be converted into digital values by an A/D converter, not shown, before being fed to the digitizer section 13 and the trigger circuit 14. Thus, it should be understood that the output data signal from the sampling head 11 may comprise the original sampled signal or the converted digital signal as the case may be in the description to follow.
As described, with a conventional sampling digitizer, because the start point of the observation, measurement, analysis and the like is defined by the trigger point, the observation, measurement, analysis and the like of the waveform is limited to a portion thereof which occurs after the trigger point as a matter of course. If the trigger point is represented by a point a in the waveform shown in FIG. 2D, for example, no observation, measurement, analysis and the like of a waveform portion which precedes point a in time (or located to the left thereof as viewed in FIG. 2D) is allowed.
A waveform region of a high rate repeated signal HRS for which an observation, measurement, and/or analysis is desired is generally a fraction of one period T of the high rate repeated signal HRS, which is frequently a rising edge region of the waveform as an example. As described above, because the trigger point defines the start point of the observation, measurement, analysis and the like of the waveform, supposing that point a in the waveform of FIG. 2A defines the trigger point, the trigger circuit 14 does not generate the trigger signal TR until the waveform data a shown in FIG. 2C is delivered from the sampling head 11 and is input to the trigger circuit 14, thus preventing the observation, measurement, analysis and the like of the waveform portion which occurs at and subsequent to the trigger point, as desired.
An N-channel sampling digitizer as shown in FIG. 3 (where N is an integer equal to or greater than 2) is also used in the prior art. It comprises a plurality of sampling heads 11 and a plurality of digitizer sections 13, each operating according to the described equivalent sampling technique to convert a high rate repeated signal into a low rate repeated signal, thus enabling a simultaneous observation, measurement, and analysis and the like of the converted signal waveforms by the plurality of digitizer sections.
In the example shown in FIG. 3, a plurality of high rate repeated signals HRS1, HRS2, . . . HRSN of a substantially equal phase are input to associated sampling heads 11-1, 11-2, . . . 11-N, respectively, which are simultaneously fed with a clock signal CLK1 from a common clock generator 12 at a given sampling rate, which may be the sampling rate T1 shown in FIG. 2B, for example. In response thereto, the sampling heads 11-1 to 11-N deliver low rate data signals OUT1, OUT2, . . . OUTN, respectively, each comprising a waveform data train as converted in which the amplitude level changes stepwise at the sample timings.
By way of example, when high rate repeated signals HRS1, HRS2, . . . , HRSN which rise substantially simultaneously are input to a plurality of sampling heads 11-1, 11-2, . . . , 11-N, and a common clock generator 12 generates a clock signal CLK1 at a constant sampling rate T1 such that the phase of sample timings for the repeated signals HRS1 to HSN are sequentially offset by an equivalent sampling interval xcex94t (for example, the phase of the sample timing is sequentially delayed by xcex94t), the sampling heads 11-1 to 11-N deliver low rate data signals OUT1 to OUTN in which the amplitude level changes stepwise at the sample timings in the similar manner as shown in FIG. 2C for the low rate data signal OUT1 at the sampling rate T1.
Only one trigger circuit 14 is provided for the plurality of digitizer sections 13-1, 13-2, . . . , 13-N in common, and data signal OUT from any one of the plurality of sampling heads 11-1 to 11-N, which is data signal OUTN from the N-th sampling head 11-N in this example, is fed as an input signal to the trigger circuit 14. Obviously, data signal from any other sampling head may be fed as an input signal to the trigger circuit 14.
In response to a trigger signal TR applied from the common trigger circuit 14, the plurality of digitizer sections 13-1, 13-2, . . . , 13-N initiate downloading the data signals OUT1, OUT2, . . . , OUTN fed from the associated sampling heads 11-1, 11-2, . . . , 11-N. Assuming that the trigger point represents a rising point L of a waveform, the digitizer sections 13-1 to 13-N download a substantially similar waveform data which begins with the trigger point L since the plurality of sampling heads 11-1 to 11-N deliver substantially similar waveform data. Accordingly, an observation, measurement, analysis and the like of the waveform is only allowed after the trigger point of the high rate repeated signals HRS1 to HRSN even with the N channel sampling digitizers shown in FIG. 3.
The sampling digitizer mentioned above is also used in a semiconductor integrated circuit testing equipment (IC tester) which tests a semiconductor integrated circuit (subsequently referred to as IC). Specifically, a sampling digitizer is used in testing whether or not an IC under test can positively respond to a given high rate signal or determining to which high rate signal it can respond by applying a test pattern signal to the IC under test at a high rate, and observing and measuring the waveform of a low rate signal which is converted from a response signal delivered at a high rate from the IC under test.
As is well recognized, an IC having a logic circuit as its main is referred to as a logic IC while an IC having a memory as its main is referred to as a memory IC. An IC having a mixture of a logic section and a memory section in one chip is referred to as a system LSI, a system on chip (SOC) or the like. FIG. 4 shows a schematic arrangement of an IC testing equipment (hereafter referred to as IC tester) which is commonly used in the art. The IC tester shown comprises an IC tester body 100 and a test head 200. In the example shown, the IC tester body 100 comprises a controller 101, a timing generator 102, a pattern generator 103, a waveform formatter 104, a driver 105, a comparator 106, a logic comparator 107, a defect analysis memory 108 and a voltage generator 109.
The test head 200 is constructed separately from the IC tester body 100, and is usually provided with a given number of IC sockets (not shown) which are mounted on the top thereof. The test head 200 internally contains a printed substrate which is referred to as a pin card in the art, and usually a circuit of the IC tester body 100 including the driver 105 and the comparator 106 is mounted on the pin card. The pin card is provided for each I/O pin (input/output terminal) of an IC under test 300. The test head 200 is generally mounted on a test section of an IC conveying and processing unit which is referred to as a handler in the art, and is electrically connected to the IC tester body 100 through signal transmission means such as a cable, an optical fiber or the like.
The IC under test 300 is mounted on the IC socket of the test head 200. A test pattern signal form the IC tester body 100 is applied to the IC under test, which is commonly referred to as DUT, 300 while a response signal from the IC under test 300 is supplied to the IC tester body 100 through the IC socket, thus performing a test and a measurement of the IC under test 300.
The controller 101 comprises a computer system in which a test program prepared by a user or programmer is previously stored, and the entire IC tester is controlled in accordance with the test program. The controller 101 is connected to the timing generator 102, the pattern generator 103, the waveform formatter 104, the logic comparator 107, the defect analysis memory 108 and the voltage generator 109 through a tester bus 111, and the timing generator 102, the pattern generator 103, the waveform formatter 104, the logic comparator 107, the defect analysis memory 108 and the voltage generator 109 operate as terminals to carry out a testing of the IC under test 300 in accordance with control instructions delivered from the controller 101.
A test, for example, a functional test, of the IC under test 300 takes place as follows:
The pattern generator 103 is previously loaded with a pattern generation sequence which is described in the test program which is stored in the controller 101 before starting a test, and in response to a test start instruction from the controller 101, the pattern generator 103 delivers a test pattern data which is to be applied to the IC under test 300 in accordance with the stored pattern generation sequence. ALPG (algorithmic pattern generator) is generally used for the pattern generator 103. ALPG refers to a pattern generator which includes internal registers having arithmetic capabilities to generate a test pattern to be applied to a semiconductor device by arithmetic operations.
Timing data which is delivered every test period and which is described in the test program stored in the controller 101 is previously loaded in the timing generator 102 before starting a test, and the timing generator 102 delivers a clock pulse for each test period in accordance with the stored timing data. Such clock pulse is applied to the waveform formatter 104, the logic comparator 107 and the like.
The waveform formatter 104 defines the timing of a rising edge and a falling edge of a logic waveform on the basis of the test pattern data delivered from the pattern generator 103 and the clock pulse delivered by the timing generator 102 to form a test pattern signal having an actual waveform which varies between an H logic (or logic xe2x80x9c1xe2x80x9d) and an L logic (or logic xe2x80x9c0xe2x80x9d), which is in turn applied to the IC under test 300 through the driver 105.
The driver 105 controls the amplitude of the test pattern signal delivered from the waveform formatter 104 to a desired value (or to a voltage VIH corresponding to the H logic or logic xe2x80x9c1 xe2x80x9d and a voltage VIL corresponding to the L logic or logic xe2x80x9c0xe2x80x9d) before applying it to the IC socket of the test head 200, thus driving the IC under test 300.
The comparator 106 determines whether or not the logic value of a response signal delivered form the IC under test 300 has a normal logic value, thus, whether a voltage corresponding to the H logic has a value equal to or greater than a given voltage VOH and a voltage corresponding to the L logic has a value equal to or less than a voltage VOL.
When a result of decision is acceptable, an output signal from the comparator 106 representing such result of decision is input to the logic comparator 107 where it is compared against an expected value pattern data which is delivered from the pattern generator 103, thus determining whether or not the IC under test 300 has delivered a normal response signal. A result of comparison by the logic comparator 107 is downloaded into the defect analysis memory 108. In the event a defect has occurred, the test pattern address for which the defect is found, an output logic data on a defective pin or pins on the IC under test 300 and a corresponding expected value pattern data are stored in the defect analysis memory 108, and used in the evaluation of the LSI subsequent to the completion of the test.
The voltage generator 109 generates amplitude voltages VIH and VIL which are to be applied to the driver 105 and compared voltages VOH and VOL which are to be applied to the comparator 106 in accordance with preset values delivered from the controller 101. In this manner, the driver 105 generate drive signals having amplitude values which conform to the specification of the IC under test 300, and the comparator 106 is enabled to determine whether the response signal from the IC under test 300 have logic values for the voltages which conform to the specification of the IC under test 300.
The described sampling digitizer is mounted on the pin card which is contained within the test head 200 in order to observe, measure and/or analyze the waveform of a response signal which is rapidly read out from the IC under test 300, for example. Thus, the test pattern signal is applied at a high rate to the IC under test 300, and the waveform of response signals which are delivered at high rate from respective pins of the IC under test is observed, measured and/or analyzed using the sampling digitizer mentioned above. The observation, the measurement, the analysis and the like of the waveform allows a decision to be rendered whether the IC under test 300 is defective or not. As a result of such test, the operating speed of the IC under test can be classified into categories, for example, and it is also possible to test to which high rate signal the IC under test can positively respond.
As mentioned previously, with a conventional sampling digitizer, the observation, the measurement and/or analysis of the waveform of a high rate repeated signal which is input to a sampling head is possible only after the trigger point. However, it is often desired that a waveform which immediately precedes the trigger point or a waveform across the trigger point be emphatically observed, measured and/or analyzed.
If it is desired to download waveform data which precedes the trigger point into the digitizer section 13 or 13-1 to 13-N in the arrangement of the sampling digitizers shown in FIGS. 1 and 3, it is necessary that the digitizer section 13 or 13-1 to 13-N be operated continuously, and the downloading of waveform data must be interrupted at the trigger point to allow the downloaded data to be read out. Assuming that the waveform data begins to be downloaded immediately after the trigger point, this requires a time interval corresponding to one period (T3) until the next trigger point is reached and the provision of a memory which is capable of storing waveform data for about one period (T3). As a consequence, when it is desired to observe, measure and/or analyze emphatically a waveform region which precedes the trigger point, for example, a waveform region which immediately precedes the trigger point, a time interval corresponding to about one period at most must be provided in order to download the waveform data, and simultaneously there must be provided a memory having a capacity capable of storing the waveform data for about one period. In other words, it has been impossible to download a required waveform region in a reduced length of time.
Alternatively, in order to download a waveform data across the trigger point into the digitizer section 13 or 13-1 to 13-N, it is necessary that the digitizer section 13 or 13-1 to 13-N be operated continuously, and the downloading of the waveform data be interrupted at a point past the trigger point where a given number of samples of waveform data have been acquired. However, it is again necessary to take into consideration that the downloading of waveform data may be started immediately after the trigger point has been passed, and this again requires a time interval corresponding to about one period (T3) until the next trigger point is reached, and the provision of a memory capable of storing the waveform data for at least one period (T3). Thus, the difficulties that a time interval corresponding to one period or greater is necessary and that a memory having a capacity capable of storing the waveform data for at least one period must be provided remain unchanged also when it is desired that a waveform region across the trigger point be emphatically observed, measured and/or analyzed. Again, it has been impossible to download a required waveform region in a reduced length of time.
When a high rate repeated signal HRS is input to the sampling head 11, and when a waveform region which is desired to be observed, measured and/or analyzed or which is desired to be downloaded into the digitizer section 13 represents a rising edge region, it is to be noted that such rising edge region is a very small portion of one period T of the high rate repeated signal HRS, which may be on the order of one-tenth of the period, for example. FIGS. 5A and 5B show the waveform of the high rate repeated signal HRS shown in FIG. 2A and the waveform of the low rate repeated signal LRS1 shown in FIG. 2B to an enlarged scale. If the time interval for the rising edge region LE of the high rate repeated signal HRS having the period T is equal to about one-tenth the period T, it follows that as considered with respect to the low rate repeated signal LRS1 shown in FIG. 5B which is synthesized and reproduced with the equivalent sampling interval xcex94t (for example, 10 ps), there is a waiting time WT equal to nearly {fraction (9/10)} the period T3 at most until the beginning (the trigger point Tr) of the rising edge region LE, which is a waveform region to be observed, measured and/or analyzed is reached. It will be noted that this waiting time WT is very long (nearly nine times) in comparison to the time necessary to download the required waveform region LE into the digitizer section 13.
Illustrating this in terms of specific figures, it may be assumed that the rising edge region LE has a time fraction of {fraction (1/10)}, for example, with respect to the period T of the high rate repeated signal HRS, and that 16xc3x97103 items of data be downloaded into the digitizer section 13 during the time interval for the rising edge region LE. If a sampling rate of 1 xcexcs is used, a time length of 16xc3x97103xc3x9710xe2x88x926(xcexcs)=16 ns is required to download the data in the rising edge region LE. Accordingly, a maximum waiting time WT will be 16 nsxc3x979=144 ns, meaning that a waiting time which is nine times, at maximum, the time interval necessary to download the data for the rising edge region LE is required until the trigger point Tr is reached. Thus, this represents a disadvantage that the efficiency of using the arrangement is greatly degraded.
It is an object of the present invention to provide a sampling digitizer and an associated method which allow a required waveform region to be downloaded in a reduced length of time.
It is another object of the invention to provide a sampling digitizer and an associated method which allow an observation, measurement and/or analysis of a waveform region which precedes a trigger point to be made in a reduced length of time without the need to increase a memory capacity.
It is a further object of the invention to provide a sampling digitizer and an associated method which allow an emphatic observation, measurement and/or analysis of a waveform region across a trigger point to be made in a reduced length of time without the need to increase a memory capacity.
It is an additional object of the invention to provide a sampling digitizer and an associated method for reducing a waiting time until a trigger point is reached and for improving the efficiency of using an arrangement.
It is still another object of the present invention to provide a semiconductor integrated circuit testing equipment which allows a testing time for a semiconductor integrated circuit (IC) to be reduced while enabling a testing with a higher accuracy.
According to a first aspect of the present invention, there is provided a sampling digitizer comprising clock generator means for generating a clock signal, a sampler for sampling an input high rate repeated signal with a clock signal supplied from the clock generator means to convert it into a low rate data signal, a signal waveform observing, measuring or analyzing unit to which the data signal from the sampler is supplied, trigger means to which the data signal from the sampler is supplied for generating a trigger signal when the data signal contains trigger information, delay means for delaying the clock signal supplied from the clock generator means to the sampler, and switching means for switching between the clock signal which is caused to pass through the delay means and the clock signal which is directly supplied from the clock generator means, to be supplied to the sampler. The low rate data signal may comprise a sampled output itself or a digital counterpart of the sampled output. This applies also in the description to follow.
In a preferred embodiment, the switching means carries out a switching between the clock signals in response to the trigger signal from the trigger means. Before the trigger signal is applied, the clock signal which has been caused to pass through the delay means is supplied to the sampler while after the trigger signal from the trigger circuit is applied, the clock signal which is directly delivered from the clock generator means is supplied to the sampler.
The clock signal generated by the clock generator means has a sampling rate corresponding to a period which is defined as a sum of a quotient of the frequency of the high rate repeated signal divided by the frequency of the internal clock signal generated by the clock generator means, multiplied by a time interval corresponding to one period of the high rate repeated signal and an equivalent sampling interval which is equal to the time corresponding to one period of the high rate repeated signal divided by the number of samples per period of the high rate repeated signal.
According to a second aspect of the present invention, there is provided a sampling digitizer having a plurality of channels, each channel including a sampler for sampling an input high rate repeated signal at a given sampling rate to convert it into a low rate data signal and a signal waveform observing, measuring or analyzing unit to which the data signal from the sampler is supplied. In accordance with the present invention, the sampling digitizer further comprises a single clock generator which is common to the plurality of channels for generating a clock signal at a given sampling rate, single trigger means which is common to the plurality of channels to which data signal from the sampler of a specific one of the plurality of channels is supplied as an input signal for generating a trigger signal to be supplied to the signal waveform observing, measuring or analyzing unit of each channel when the data signal contains trigger information, and delay means for causing the clock signal which is supplied from the clock generator means to the sampler of that channel which supplies the data signal to the trigger means to be delayed.
According to a third aspect of the present invention, a sampling digitizer comprises clock generator means for generating a clock signal, a sampler for sampling an input high rate repeated signal with the clock signal supplied from the clock generator means to convert it into a low rate data signal, a signal waveform observing, measuring or analyzing unit to which the data signal from the sampler is supplied, trigger means to which the data signal from the sampler is supplied for generating a trigger signal when the data signal contains trigger information, and means for supplying the trigger signal generated by the trigger means to the clock generator means to increase the frequency of the clock signal which is generated by the clock generator means.
According to a fourth aspect of the present invention, there is provided a semiconductor integrated circuit testing equipment in which a test pattern signal is applied to a semiconductor integrated circuit under test, a response signal which is read out from the semiconductor integrated circuit under test is logically compared, and the semiconductor integrated circuit under test is determined to be acceptable or defective on the basis of a result of the comparison, and comprising a sampling digitizer according to one of the first and the second aspect of the present invention.
In a preferred embodiment, the sampling digitizer is mounted on a pin card which is contained in a test head of the semiconductor integrated circuit testing equipment. Other aspects of the present invention will be described with reference to the embodiments.

Sampling digitizer, method for sampling digitizing, and semiconductor integrated circuit test device with sampling digitizer


An extendable spool is disclosed. The length of the extendable spool is able to continuously varied. The extendable spool accounts for length variances in flow lines by extending the flow line rather than redirecting the flow. Because the flow direction does not make any turns, erosion is minimized on both the extendable spool and downstream parts. The extendable spool is readily scalable from small diameters to large diameters. Because of this, it requires fewer lines and therefore less setup time to account for length differences between large diameter lines.

Accounting for length variances on non-permanent, pressurized, fluid-flow lines can be accomplished by combining together multiple lines to achieve the desired length, but this is inconvenient, time-consuming, and creates additional opportunities for errors or failures. Alternatively, length variances can be addressed by redirecting the flow through one or more turns until the desired length is achieved. Examples of this length make-up method are seen with hoses (via their flexible nature) and swiveling elbows (e.g., Chiksans). However, flow redirection through elbows or hoses accelerates erosion, especially when there are particulates in the fluid and/or when the fluid is flowing at a high rate, as seen during hydraulic fracturing operations. Erosion is accelerated not only on the parts redirecting the flow, but also on parts downstream.
Another drawback of using flow redirection for length make-up is that the method is not easily scalable to larger diameters—the required wall thicknesses quickly make installation difficult at best, to impractical at worst; therefore, traditional flow redirection lines used to make up for length variances are, relatively speaking, smaller diameters. One drawback of only being able to redirect flow with small diameter lines is that multiple redirected-flow lines must be used to account for length differences between large diameter lines. Therefore, what is needed is an apparatus, system, or method that addresses one or more of the foregoing issues, among one or more other issues.

This patent is subject to a terminal disclaimer.


A task in an application node is managed. For instance, based on a type of a predetermined task that is to be executed on a data object in the application node, an address range of a group of objects on which the predetermined task is to be executed is determined in the data object. The predetermined task is executed on the group of objects in an order of addresses of the group of objects. A progress indicator is created for indicating an address of an object that is currently being processed in the group of objects. The predetermined task is managed based on the progress indicator. Thus, an address of an object that is currently being processed may be indicated based on the progress indicator, so that the predetermined task may be managed more easily and effectively based on the progress indicator in subsequent operations.

With developments of computer technology and network technology, a large number of application nodes have emerged. An application node may execute a task independently or in conjunction with another application node. With an increase of the amount of data in data objects in the application node, it takes more time to execute the task. Since the application node may fail and be faced with a restart, the task has to be interrupted. Therefore, it has become a focus of research on how to manage data objects during executing a task so as to guarantee the smooth execution of the task.

Method, device, and computer program product for managing a task in an application node


A spark plug including a housing as a ground contact to an internal combustion engine, a center electrode situated in the housing along a center axis of the spark plug, an insulator between the center electrode and the housing, and a two-legged ground electrode whose legs are located on the combustion chamber side of the center electrode and angled with respect to one another in a leg plane which is perpendicular to the center axis, the two ends of the ground electrode being connected to the housing respectively by one connection point, a first gap between one end of the housing on the combustion chamber side and the leg plane being smaller than or equal to a second gap between one of the connection points and the center axis, and/or the ground electrode being tapered toward the center axis.

The publication US 2010/0244651 A1 discusses a previously known spark plug, in which the ground electrode is welded on both sides to the front side of the housing in the form of a bridge. Because of the two opposite weld points, this ground electrode is subjected to high thermal stresses, which are in particular caused by the different thermal expansion coefficients of the electrode material and the housing material. In addition, with the bridge-shaped ground electrode, it is not possible to subsequently adjust the gap between the center electrode and the ground electrode by bending the ground electrode.
Publication DE 101 55 404 A1 discusses a spark plug according to the definition of the general species of spark plug. Here, the housing having the thread is very deeply recessed with respect to the combustion chamber end of the center electrode. Consequently, the ground electrode includes a very long component extending parallel to the center axis of the spark plug. This configuration has two decisive disadvantages: The relatively large and long ground electrode constitutes a relatively large surface for absorbing the heat in the combustion chamber. Relative to this very large heat-absorbing surface, the previously known ground electrode has only a very small cross section at the connection point between the ground electrode and the housing. Only this very small cross-sectional area may be used for dissipating heat from the ground electrode into the housing. This unfavorable relationship between the heat-absorbing surface and the heat-dissipating cross section causes substantial thermal stress of this previously known ground electrode, thus resulting in increased oxidation and a shorter lifetime. In addition, this configuration has substantial disadvantages when adjusting the gap between the center electrode and the ground electrode. To adjust this gap, the ground electrode must be bent toward the center electrode after connection to the housing. The previously known ground electrode has a very long component parallel to the center axis of the spark plug. When bending the portion of the ground electrode opposite the center electrode, an unfavorable bending moment acts on the portion of the ground electrode parallel to the center axis. Adjustment of the gap is thus not optimally possible in the previously known arrangement.


An embodiment discloses a vertical cavity surface emitting laser and a method for manufacturing the same, the vertical cavity surface emitting laser comprising: a substrate; a lower reflective layer disposed on the substrate; an active layer disposed on the lower reflective layer; an oxide layer disposed on the active layer and comprising a first hole disposed at the center thereof; a capping layer disposed on the oxide layer; and an upper reflective layer disposed on the capping layer and the first hole.

Significant advances in commercially available vertical cavity surface emitting lasers (VCSELs) have been made due to the introduction of oxide apertures.
An oxide aperture may be formed by an oxidation process in which an AlGaAs material is transformed into an AlOx:As form as a result of chemical reaction of H2O molecules with the AlGaAs material while an AlGaAs layer is exposed to a high-temperature N2 and H2O mixed gas atmosphere and the H2O molecules are diffused inside the AlGaAs layer.
Since such a chemical oxidation process is highly dependent on processing conditions such as an Al content of an AlGaAs layer, a content of water vapor, a temperature of a reaction chamber, and the like, it is difficult to precisely control shapes and sizes of oxide apertures in a lateral direction. Therefore, there is a problem in that it is difficult to uniformly form oxide apertures on the same wafer.
Currently, formation of oxide apertures is precisely controlled using an expensive commercial manufacturing process apparatus. However, fundamental problems are not solved yet, and only production costs are increased. In addition, there is a problem in that an error of 1 μm or more occurs even when such a precise apparatus is used. [See M. Grabherr, D. Wiedenmann, R. Jaeger, and R. King, "Fabrication and performance of tunable single-mode VCSELs emitting in the 750 to 1,000 nm range," Proc. SPIE 5737, 120-128 (2005)]. Generally, since a diameter of an oxide aperture of a VCSEL device ranges from about 3 to 10 μm, a process error of 1 μm may significantly degrade a yield of the device.
Further, work efficiency may be extremely lowered because an oxidation process should be performed on wafers one by one for precise control.

Vertical cavity surface emitting laser and method for manufacturing same


A pipe lay vessel with a reel for carrying a length of pipe and first drive part for controlling rotation of the reel. A substantially vertical guide structure includes at its upper end a deflection member for deflecting the pipe from a first trajectory extending between the reel and the guide structure to a second, substantially vertical trajectory. A clamping member carries the vertical pipe section and has second drive for feeding the pipe along the vertical trajectory. A movable tension compensator (7) is provided at the first pipe trajectory for lengthening or shortening the first pipe trajectory to maintain a substantially constant tension of the pipe along the first trajectory during unwinding of the reel. By displacing the tension compensator, the first pipe trajectory can be lengthened or shortened to compensate for variations in speed due to non-uniform winding of the pipe and varying diameter of the spooled pipe and to compensate for sagging of the pipe due to its own weight and length variations upon unspooling in view of occuring plasticity and partial straightening of the pipe.

The invention relates to a pipe lay vessel with a reel for carrying a length of pipe and first drive means for controlling rotation of said reel, a substantially vertical guide structure comprising at its upper end a deflection member for deflecting the pipe from a first trajectory extending between the reel and the guide structure to a second substantially vertical trajectory, and a clamping member for carrying the vertical pipe section having second drive means for feeding the pipe along the vertical trajectory.
Such a vessel is known from WO-96/35902 in which a pipe is spooled from a storage reel to a bending shoe mounted on a derrick structure that is situated above a moon pool. The vertical pipe section is passed via a 3-point straightening assembly into the water. The known J-lay vessel is particularly suitable for pipe laying in deep water. It is known to suspend the vertical pipe section from a clamping device or tensioner, which can be driven or braked to feed the vertical pipe section towards the seabed. The reel supplying the pipe is also driven or braked in a controlled manner.
Variations in pipe speed along the first trajectory between the reel and the deflection member will occur because the pipe coming from the reel will have a varying speed, even at constant reel rotation since the pipe is not always evenly spooled on the reel and the diameter of the unspooled pipe on the reel varies during the unspooling process. Also during start up and stopping and during emergency crash stop situations, speed variations of the pipe will occur along the first trajectory and along the vertical trajectory where the pipe is fed through the tensioners. Speed variations may also be caused by plasticity of the pipe and partial straightening upon unspooling. Because of the varying tension along the first trajectory between the reel and the deflection member, sagging of the pipe or overload of structural elements that guide the pipe may occur.
It is therefore an object of the present invention to provide a pipe lay system with which the tension of the pipe along the first trajectory can be maintained substantially constant. It is a further object of the present invention to provide a system in which differences in speed of the pipe section coming from the reel and the pipe section fed along the vertical trajectory can be compensated.
It is again a further object of the present invention to provide a pipe lay system having a relatively simple and reliable compensator system. Again, it is a further object of the present invention to provide a pipe lay system in which a pipe straightener is provided which is not affected by the tension compensation system and to provide a pipe straightener which can accommodate pipes of different diameter.
Thereto the pipe lay system of the present invention is characterised in that that a movable tension compensator is provided at the first pipe trajectory for lengthening or shortening the first pipe trajectory to maintain a substantially constant tension of the pipe along the first trajectory during unwinding of the reel
By displacing the tension compensator, the first pipe trajectory can be lengthened or shortened to compensate for variations in speed due to non uniform winding of the pipe and varying diameter of the spooled pipe and to compensate for sagging of the pipe due to its own weight and length variations upon unspooling in view of occurring plasticity and partial straightening of the pipe. By the movable tension compensator, the tension in the pipe along the first trajectory (the back tension) can be maintained substantially constant.
In one embodiment of the pipe lay system according to the present invention, a detector is placed near the tension compensator for measuring its position relative to an equilibrium position. A control unit receives position signals from the detector and supplies a control signal to the drive means of the reel and/or to drive means of the clamping member for changing the pipe laying speed such that the tension compensator is at least substantially returned to its equilibrium position. When the tension in the pipe section between the reel and the deflection member becomes too large, the tension compensator will move such that the first trajectory is shortened. The control unit may either increase the unwind speed of the reel, such that the tension compensator is moved back to its equilibrium position or may lower the speed at which the pipe is fed along the vertical section. Similarly, when sagging of the pipe occurs, the tension compensator is moved such that the length of the first trajectory is increased. Decreasing the unspooling speed of the reel or increasing the pipe speed along the vertical section will result in the tension compensator returning to its equilibrium position.
Detecting the position of the tension compensator may be carried out optically or by encoders measuring a hinge angle of the compensator. The latter can occur when the tension compensator comprises a curved arm extending transversely to the vertical guide structure and being hingingly attached in a hinge point, remote from the guide structure. The end of the curved arm opposite the hinge point may be attached to a fluid cylinder, which is extended or compressed when the tension compensator moves away from its equilibrium position. In this case, measuring the pressure in said cylinder or measuring its stroke will provide a signal indicative of the deflection of the tension compensator from its equilibrium position.
In one embodiment according to the present invention, a pipe straightener element is provided on the hinging arm of the tension compensator, the pipe straightener element having a curved surface and a radius of curvature substantially originating in the hinge point. In this way the point of departure of the vertical pipe section from the upper pipe straightener element to the lower two pipe straightener elements can remain constant such that the pipe straightening moments in the pipe straightener remain unaffected by movement of the tension compensator.
Analysis of the shape of the pipe before entering the pipe straightener has taught the applicant that the curvature of the pipe in the region of the straightener varies for relatively large diameter pipes (diameters of about 40 cm or more) whereas Correlatively small diameter pipes (diameters of 10 cm or less) the curvature upon entry into the straightener is more or less constant. Especially for larger diameter pipes it is advantageous that at least one of the pipe straightener elements comprises a closed track around two rollers, at least one adjustable roller being placed between the two rollers for altering the width of the track. By controlling the track width of the pipe straightener, for instance by hydraulic cylinders or by screw spindles, a proper straightening for each pipe diameter can be obtained in combination with the movable tension compensator according to the present invention.

Pipe lay system with tension compensator


A method for making a multilayer interconnect electronic component structure, and, in particular, an integrated circuit semiconductor device made using a copper damascene method is provided. The process of the invention uses a method for pre-cleaning exposed copper surfaces in the structure. The method employs a cleaning composition containing a nitrogen containing material and an oxygen containing material and also optionally a hydrogen containing material to remove the copper oxide film on copper surfaces in the structure. The preferred nitrogen material is nitrogen gas and the preferred oxygen material is oxygen gas. The gas mixture is preferably energized to form a plasma which is used to contact and remove the copper oxide and clean the structure. A two-step process may be used employing a nitrogen/oxygen mixture and then a hydrogen containing gas mixture such as Ar/H2. It has also been found that the advantages of the method include not only removal of residue and copper oxide from the structure without significant dielectric shift of the dielectric, but also provides enhanced metal adhesion to the treated dielectric as well as surface passivation of the dielectric.

1. Field of the Invention
This invention relates to the making of electronic components such as integrated circuit semiconductor devices having electrical interconnection structures within the component and, more particularly, to a reactive barrier/seed pre-cleaning method for a dual damascene copper process.
2. Description of Related Art
Multi-layer electronic components offer an attractive packaging solution for high performance systems such as in computer, telecommunications, military, and consumer applications. These electronic components offer high-density interconnections and the ability to provide increased circuitry for a given electronic component size. For convenience, the following description will be directed to a dual damascene fabrication process for making integrated circuit components.
In general, multilayer electronic components made using a damascene or dual damascene process comprise multiple layers of a dielectric material having vias, trenches and other openings in the dielectric layer extending from one layer to another layer. These openings are filled with a conductive material and electrically connect the metallization in one layer to the metallization in another layer and provide for the high density electronic components devices now used in industry.
An important aspect of dual damascene multilayer electronic components are vias or openings between layers in which a conductive material is filled to provide electrical contact between the metallization in the different layers. Broadly stated, the typical multilayer electronic component is built up from a number of layers of a dielectric material layer such as silicon dioxide, fluorinated silicon oxide, polymers including polyimide and fluorinated polyimide, ceramics, carbon and other such dielectric materials. In the processing sequence known in the art as the "Damascene Process", the dielectric layer is patterned using known techniques such as the use of a photoresist material which is exposed to define the wiring pattern. After developing, the photoresist acts as a mask through which a pattern of the dielectric material is removed by a subtractive etch process such as plasma etching or reactive ion etching. Using the Damascene Process, openings defining wiring patterns are provided in the dielectric layer, extending from one surface of the dielectric layer to the other surface of the dielectric layer. These wiring patterns are then filled with a metal using a filling technique such as electroplating, electroless plating, chemical vapor deposition, physical vapor deposition or a combination of methods. This process may include planarization of the metal by removing excess material with a method such as chemical mechanical polishing.
In the Single Damascene Process, vias or openings are provided in the dielectric layer and filled with metallization to provide electrical contact between layers of wiring levels. In the Dual Damascene Process, the via openings and the wiring pattern openings are both provided in the same dielectric layer before filling with metallization. This process simplifies the procedure and eliminates some internal interfaces. These procedures are continued for each layer in the electronic component until the multilayer electronic component is completed.
In FIG. 1, a dual Damascene line and interconnection of the prior art is shown. A substrate 11 has a dielectric layer 12 thereon with a copper layer 13 formed therein. Another dielectric layer 14 is formed on the dielectric layer 12 and a portion removed by etching to form a via opening 15 and a trench opening 16. The via opening 15 and trench opening 16 together form a dual damascene opening for exposing part of the copper layer 13 and for interconnecting with the copper layer.
The dielectric material used to form the layers provides electrical insulation and electrical isolation between the copper wiring elements. To avoid metal diffusion between the copper wiring elements and the dielectric, barrier layers, also referred to as liners, are included in the structure to contain the copper or other metal and to provide improved adhesion of the copper lines and vias to the dielectric or other metallization.
The barrier layer is typically a refractory metal such as Ta or TaN and presents a barrier to the diffusion of copper metal between the via and trench and the dielectric but also presents a barrier between the copper metal and the metallization of the underlying or overlying conductor wiring levels. Typically, the barrier layer is formed in the via and trench on both sidewalls and at the base of the via to form the barrier layer.
In a damascene process, it is always necessary to provide a pre-clean process prior to barrier layer and/or metal deposition of the via and/or via/trench interconnection. As shown in FIG. 1, copper oxides always form at the bottom of a damascene via and/or via/trench because of the opening to the underlying copper layer which exposed copper oxidizes in air. As shown in FIG. 1, a copper oxide film 18 is formed on the surface of the copper conductor layer 13 in dielectric layer 12. Copper oxide is detrimental to the integrated circuit (IC) device and must be removed before further processing.
Etching and stripping cleaning processes may leave residues and a conventional pre-clean process uses argon to sputter the bottom to remove residue and copper oxides. The use of argon however, has a tendency to resputter copper onto the damascene sidewall which causes copper out-diffusion into the dielectric layers. Furthermore, argon has been found to damage the insulation effect of the dielectric especially when low-k materials are used.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method for cleaning exposed copper surfaces when making electronic devices and, in particular, when using a single Damascene process or a dual Damascene process.
Another aspect of the invention is to provide electronic components made using the method of the invention.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.

Reactive barrier/seed preclean process for damascene process