A method, computer program and a network efficiency node in a wireless communications network for enabling increased data throughput to a UE, the method comprising: retrieving information of UE configuration data, receiving an indicator of a first channel capability from the UE, determining a first data transport unit size based on the received indicator of the first channel capability, selecting a second channel capability different than the received indicated first channel capability and limited based on the information of the UE configuration data, determining a second data transport unit size based on the selected second channel capability, and transmitting scheduling information to the UE to use the second data transport unit size, thereby enabling increased data throughput.

There is a desire to optimize and enable as much data throughput as possible in wireless networks. An increasing variety and usage of software applications, demands higher data bandwidth. New radio access technologies area evolving, providing increased bandwidth and increased data throughput. However, the demand on data throughput from the applications and services seems infinite. Examples of such applications and services are electronic messaging, Internet browsing, social networks, locations services, media and/or multimedia services, software maintenance services.
The costs for wireless networks are increasing, both in terms of technology but also in terms of deployment. Wireless networks technology costs both in terms of capital expenditure (CAPEX) as well as in operative expenditure (OPEX). Deploying the networks also brings indirect costs such as getting access to property of radio masts, access to real estate for mounting of antennas and base equipment. It is further a tendency among the general public to limit the amount of radio equipment in the public society.
It is therefore a desire to enable as much data throughput as possible of the wireless networks. Today the access side of the wireless network may be dependent on a UE (User Equipment), that the UE report CSI (Channel State Information), such that the network may adapt the data transmission link between the network and UE.
A problem in determining the maximal data throughput between the UE and the access side of a wireless network is that the procedure for the determination of the maximal data throughput is not completely accurate. An example is that standards specifying how to determine channel quality in a LTE-type (Long Term Evolution) of network does give a UE some room for interpretation of a perceived channel quality. In some cases it might be right, but in some cases the UE may determine the channel quality as better as or worse than it is in reality.
Another problem is that UE's from different vendors may have different basis or procedures for determination of a certain channel quality, i.e. different UE's may determine the channel quality different based on a similar measured CQI (Channel Quality Information). Another problem is that a UE, which report the CSI, may not have the complete information about the network environment. Thus the CSI, which may be seen as historical data, reported by the UE may not be the only or single best basis for determination of the channel quality.

Method and network efficiency node for increased data throughput in wireless networks


A nose cone assembly for a gas turbine engine and method of circulating air in a gas turbine engine are disclosed. The nose cone assembly includes a nose cone having an aperture communicating air to an interior space of the nose cone and a discharge member communicating the air out of the nose cone.

Gas turbine engines include bearing assemblies to support the rotating shafts of the engine. During operation, the bearing assemblies experience high thermal loads that may be controlled with a thermal management system. A thermal management system utilizes a heat exchanger to cool fluids such as oil flowing to and from bearing assemblies or other engine components. A thermal management system enhances durability and provides efficient operation of bearing assemblies and other engine components. However, thermal management systems often include a complex network of airflow circulation pathways and fluid lines to effectively cool the high temperature fluid. In some gas turbine engines, incorporation of a thermal management system is challenging.
Therefore, a need exists in the art for a thermal management system for a gas turbine engine having enhanced efficiency and applicability.

Nose cone assembly and method of circulating air in a gas turbine engine


An aircraft for transporting a plurality of cargo containers comprising a forward fairing, an empennage and a spine disposed between the forward fairing and the empennage. The spine is made of a lightweight structure such that the aircraft has insufficient rigidity to withstand bending and tortional loads in flight. A cargo assembly comprising a plurality of modular cargo units is structurally and detachably mounted onto the spine to provide the additional structure to the aircraft required for it to fully withstand the bending and tortional loads of the aircraft in flight. Mounts may be provided to detachably engage the cargo assembly to the spine of the aircraft.

The basic unit for transporting goods has been the truck. Being the basic unit, the truck has defined limitations on intermodal containers that can typically be transported by ships, trains and trucks. However, airplanes have generally been excluded from participation in intermodal and many other types of cargo. This is due to the limitations placed by the design and construction of cargo airplanes.
The design and construction of most civilian cargo aircraft are based on that of passenger airplanes. The basic structure is a monocoque-based fuselage which is substantially cylindrical in shape. Monocoque-based structures support the structural load of an aircraft by a unitary structural body, as opposed to heavier internal frames or trusses. The unibody construction of the monocoque-based aircraft generally lack sufficient structure to adequately or efficiently support and distribute concentrated cargo loads across the aircraft fuselage and to the wings.
Additionally, the cylindrically-shaped fuselage imposes additional restrictions on cargo size and dimensions. Thus, cargo having irregular or unusually large dimensions are generally unsuited for air transport via today's cargo aircraft. Moreover, as most cargo units are substantially rectangular in shape, loading such cargo units into a cylindrical fuselage results in a significant amount of wasted dead space.


A method of manufacturing a semiconductor device is disclosed and starts with a semiconductor substrate having a heavily doped N region at the bottom main surface and having a lightly doped N region at the top main surface. There are a plurality of trenches in the substrate, with each trench having a first extending portion extending from the top main surface towards the heavily doped region. Each trench has two sidewall surfaces in parallel alignment with each other. A blocking layer is formed on the sidewalls and the bottom of each trench. Then a P type dopant is obliquely implanted into the sidewall surfaces to form P type doped regions. The blocking layer is then removed. The bottom of the trenches is then etched to remove any implanted P type dopants. The implants are diffused and the trenches are filled.

The present invention relates generally to semiconductor devices, and more, particularly, to power MOSFET devices.
Power MOSFET devices are employed in applications such as automobile electrical systems, power supplies, and power management applications. Such devices should sustain high voltage in the off-state while having a low voltage drop and high current flow in the on-state.
FIG. 1 illustrates a typical structure for an N-channel power MOSFET. An Nepitaxial silicon layer 1 formed over an N+ silicon substrate 2 contains P-body regions 5a and 6a, and N+ source regions 7 and 8 for two MOSFET cells in the device. P-body regions 5 and 6 may also include deep P-body regions 5b and 6b. A source-body electrode 12 extends across certain surface portions of epitaxial layer 1 to contact the source and body regions. The N-type drain for both cells is formed by the portion of N-epitaxial layer 1 extending to the upper semiconductor surface in FIG. 1. A drain electrode is provided at the bottom of N+ substrate 2. An insulated gate electrode 18 typically of polysilicon lies primarily over the body and portions of the drain of the device, separated from the body and drain by a thin layer of dielectric, often silicon dioxide. A channel is formed between the source and drain at the surface of the body region when the appropriate positive voltage is applied to the gate with respect to the source and body electrode.
The on-resistance of the conventional MOSFET shown in FIG. 1 is determined largely by the drift zone resistance in epitaxial layer 1. The drift zone resistance is in turn determined by the doping and the layer thickness of epitaxial layer 1. However, to increase the breakdown voltage of the device, the doping concentration of epitaxial layer 1 must be reduced while the layer thickness is increased. Curve 20 in FIG. 2 shows the on-resistance per unit area as a function of the breakdown voltage for a conventional MOSFET. Unfortunately, as curve 20 shows, the on-resistance of the device increases rapidly as its breakdown voltage increases. This rapid increase in resistance presents a problem when the MOSFET is to be operated at higher voltages, particularly at voltages greater than a few hundred volts.
FIG. 3 shows a MOSFET that is designed to operate at higher voltages with a reduced on-resistance. This MOSFET is disclosed in paper No. 26.2 in the Proceedings of the IEDM, 1998, p. 683. This MOSFET is similar to the conventional MOSFET shown in FIG. 2 except that it includes P-type doped regions 40 and 42 which extend from beneath the body regions 5 and 6 into the drift region of the device. The P-type doped regions 40 and 42 define columns in the drift region that are separated by N-type doped columns, which are defined by the portions of the epitaxial layer 1 adjacent the P-doped regions 40 and 42. The alternating columns of opposite doping type cause the reverse voltage to be built up not only in the vertical direction, as in a conventional MOSFET, but in the horizontal direction as well. As a result, this device can achieve the same reverse voltage as in the conventional device with a reduced layer thickness of epitaxial layer 1 and with increased doping concentration in the drift zone. Curve 25 in FIG. 2 shows the on-resistance per unit area as a function of the breakdown voltage of the MOSFET shown in FIG. 3. Clearly, at higher operating voltages, the on-resistance of this device is substantially reduced relative to the device shown in FIG. 1, essentially increasing linearly with the breakdown voltage.
The improved operating characteristics of the device shown in FIG. 3 are based on charge compensation in the drift region of the transistor. That is, the doping in the drift region is substantially increased, e.g., by an order of magnitude or more, and the additional charge is counterbalanced by the addition of columns of opposite doping type. The blocking voltage of the transistor thus remains unaltered. The charge compensating columns do not contribute to the current conduction when the device is in its on-state. These desirable properties of the transistor depend critically on the degree of charge compensation that is achieved between adjacent columns of opposite doping type. Unfortunately, non-uniformities in the dopant gradient of the columns can be difficult to avoid as a result of limitations in the control of process parameters during their fabrication. For example, diffusion across the interface between the columns and the substrate and the interface between the columns and the P-body region will give rise to changes in the dopant concentration of the portions of the columns near those interfaces.
The structure shown in FIG. 3 can be fabricated with a process sequence that includes multiple epitaxial deposition steps, each followed by the introduction of the appropriate dopant. Unfortunately, epitaxial deposition steps are expensive to perform and thus this structure is expensive to manufacture. Another technique for fabricating these devices is shown in co-pending U.S. application Ser. No. 09/970,972, in which a trench is successively etched to different depths. A dopant material is implanted and diffused through the bottom of the trench after each etching step to form a series of doped regions (so-called "floating islands") that collectively function like the P-type doped regions 40 and 42 seen in FIG. 3. However, the on-resistance of a device that uses the floating island technique is not as low as an identical device that uses continuous columns.
Accordingly, it would be desirable to provide a method of fabricating the MOSFET structure shown in FIG. 3 that requires a minimum number of deposition steps so that it can be produced less expensively while also allowing sufficient control of process parameters so that lightly doped columns that extend almost through a layer of deposited can be formed.

This patent is subject to a terminal disclaimer.

Technique for forming the deep doped regions in superjunction devices

Third Dimension (3D) Semiconductor, Inc.


An information processing terminal includes first sealed data respectively having usability conditions of matching with predetermined terminal environment information during a secure boot and second sealed data respectively having usability conditions of matching with terminal environment information upon completion of the secure boot. Upon completion of the secure boot, the second sealed data is unsealed and the first sealed data is resealed using the unsealed data. It is possible to update and re-seal sealed data having a usability condition of matching with predetermined terminal environment information during a secure boot without rebooting a terminal when a program using the sealed data is updated.

1. Technical Field
The present invention relates to information processing devices for securely booting stored programs, and more particularly to technology for maintaining a secure state even when a program requires updating.
2. Background Art
In recent years, terminal devices such as cellular phones have started to perform a secure boot to ensure a secure platform. After the terminal device has started to boot up, a hash value is calculated for each program, such as the OS, applications, etc., upon booting of the program. Integrity of the device is verified based on whether the calculated values, or a cumulative value thereof, is the expected value (see Non-Patent Literature 1-5). In the context of such a secure boot, a specific program that is being booted may use specific data. One such case is when program B in a terminal device is encrypted, and after program A (the specific program) boots, a decryption key (the specific data) is used to decrypt program B. Program B then boots. In this case, it is necessary to restrict the decryption key so that it can only be used by program A, and only when the platform is secure immediately before program A boots.
Patent Literature 1 discloses one form of technology for a specific program to securely handle specific data during a secure boot, namely to protect secure data as "sealed data" by using the seal function of the Trusted Platform Module (TPM) detailed by the Trusted Computing Group (TCG) and securely use the data during a secure boot by unsealing the sealed data in accordance with a condition for unsealing. In Patent Literature 1, a terminal device performs the seal function by protecting (hereinafter, "sealing") target data via encryption with the public key of a key pair in a public key encryption system, the public key being managed in the TPM. In this case, the target data for protection is the decryption key for decrypting an encrypted program B, and the condition for unsealing is that the hash value of program A be the expected values that should be stored in extended Platform Configuration Registers (PCRs). Hereinafter, these expected values are referred to as PCR expected values. The terminal device unseals the sealed data by issuing a decryption request for the sealed data and then outputting, within the TPM, decrypted plaintext of the target data for protection only when the PCR value stored in the TPM at the time of decryption matches the PCR expected value set as the condition for unsealing. In this way, through use of the condition for unsealing, acquisition of plaintext data of protected data is limited to when a predetermined program has properly booted. Conversely, when the terminal device is in an improper state, such as when the program has been tampered with, plaintext data cannot be extracted from the target data for protection in the sealed data, and the secure boot fails.

Information processing device, information processing method, information processing program, and integrated circuit


Method comprising, for each pixel, obtaining a pixel expansion exponent value (E′(p)) by low pass filtering luminance values of colors of pixels in its spatial neighborhood, obtaining a pixel luminance-enhancement value (Yenhance(p)) by extraction of high frequencies of luminance values of colors of pixels in its spatial neighborhood, and then inverse tone mapping the luminance (Y(p)) according to the equation Yexp(p)=Y(p)E′(p)×[Yenhance(p)]c.

Recent advancements in display technology are beginning to allow for an extended range of color, luminance and contrast to be displayed.
Technologies allowing for extensions in luminance or brightness range of image content are known as high dynamic range imaging, often shortened to HDR. HDR technologies focus on capturing, processing and displaying content of a wider dynamic range.
Although a number of HDR display devices have appeared, and image cameras capable of capturing images with an increased dynamic range are being developed, there is still very limited HDR content available. While recent developments promise native capture of HDR content in the near future, they do not address existing content.
To prepare conventional (hereon referred to as LDR for low dynamic range) content for HDR display devices, reverse or inverse tone mapping operators (iTMO) can be employed. Such algorithms process the luminance information of colors in the image content with the aim of recovering or recreating the appearance of the original scene. Typically, iTMOs take a conventional (i.e. LDR) image as input, expand the luminance range of the colors of this image in a global manner, and subsequently process highlights or bright regions locally to enhance the HDR appearance of colors in the image.
Although several iTMO solutions exist, they focus at perceptually reproducing the appearance of the original scene and rely on strict assumptions about the content. Additionally, most expansion methods proposed in the literature are optimized towards extreme increases in dynamic range.
Typically, HDR imaging is defined by an extension in dynamic range between dark and bright values of luminance of colors combined with an increase in the number of quantization steps. To achieve more extreme increases in dynamic range, many methods combine a global expansion with local processing steps that enhance the appearance of highlights and other bright regions of images. Known global expansion steps proposed in the literature vary from inverse sigmoid, to linear or piecewise linear.
To enhance bright local features in an image, it is known to create an luminance expansion map, wherein each pixel of the image is associated with an expansion value to apply to the luminance of this pixel. In the simplest case, clipped regions in the image can be detected and then expanded using a steeper expansion curve, however such a solution does not offer sufficient control over the appearance of the image.
There is a need for a novel iTMO, which aims to enhance the visual appeal of images by selectively and dynamically remapping the luminance of their colors and their contrast range.

Method for inverse tone mapping of an image


A computerized indenture plan allocation determination, management and reporting system and method is disclosed. The system determines allocations relating to an indenture plan, manages indenture plan assets and reports allocation information to an administration system. The system includes a controller and a number of user workstations. The controller is coupled to administration system. The controller receives indenture plan information electronically transmitted from the administration system. The user workstations, also coupled to the controller, electronically transmits expense information to the controller. The controller, upon receipt of the expense information, determines allocation information for the indenture plan, determines management information as a function of the indenture plan information, and electronically transmits the allocation information and the management information to the administration system and/or some or all of the user workstations. In short, the controller monitors corporate benefits paid, compares corporate benefits paid to cumulative life insurance policy distributions and compares unreimbursed corporate benefit expenses with life insurance policy benefits payable to determine an amount available for distribution.

For many years corporations have sought an efficient and flexible method of funding for corporate employee benefits. For example, U.S. Pat. No. 5,136,502 to Van Remortel et al. teaches a system which permits a corporation to prefund corporate retiree health care liabilities using a VEBA trust and variable life insurance. The problem facing US businesses, however, is that the use of a trust (such as a VEBA trust) typically carries with it a significant problem--a trust, such as the one described in the Van Remortel patent (a 501(c)(9) trust under the tax code), is exposed to a 100 percent reversionary tax. This means that even if for some reason a funded liability disappears, monies contributed to the trust cannot be used for any other corporate purpose. The practical implication of this law is that a dollar contributed to a 501(c)(9) trust cannot be used by the corporation for anything other than health care, even in the event the corporation's obligation to pay for health care disappears.
As a result, the system and the funding method which the Van Remortel patent describes has seen limited application. Great uncertainty exists regarding the future of the retiree health care liability, and how it will be paid in the future. Therefore, few companies have actually implemented the funding method described in the Van Remortel patent. Thus, most companies have maintained significant unfunded retiree health care obligations, and accordingly, most workers face the risk that someday their benefits will not be paid to them should their employer have future financial difficulties.
There is a need for a system that provides corporations with a means for funding corporate liabilities so as to permit the corporation to establish a savings vehicle that does not require the corporation to "throw away the key" once the funds are placed in the vehicle. Thus, the savings may be used to pay for a corporate benefit obligation so long as the obligation remains in effect. However, corporations want to know that the savings vehicle will allow the corporation to have access to the funds in event, for whatever reason, the liability disappears in the future. Accordingly, there exists a need to determine, manage and determine allocations, in real time, for an indenture plan that has the foregoing attributes. In particular, there is a need for a system that implements a new employee benefit funding program that avoids exposure to reversion tax.
According to the present invention, such a program (herein called a BENCORE.SM. program) exists when a corporation purchases corporate owned life insurance (COLI) on its employees and/or retirees and the following features are added
1) The insurance policy includes a spendthrift settlement option that applies to all policy distributions. PA1 2) An "Indenture Agreement" is signed between the corporate policy owner and carrier who issues the policy. PA1 (1) monitors the relevant company benefits paid and compares that amount to the cumulative life insurance policy distributions; PA1 (2) in real time, compares unreimbursed company benefit expenses to life insurance policy benefits payable so as to determine what amount may be distributed; PA1 (3) prepares reports that aid the company in fulfilling its reporting requirements under Generally Accepted Accounting Principles; and PA1 (4) aids in the reconciliation of its data and calculations with those of other computer systems at the Carrier.
Very briefly, the terms of the Indenture Agreement require that all death benefits (and any other policy distributions) be retained by the carrier until such time as the corporation pays the employee benefit named in the Indenture. The test is a cumulative one, from the date of inception of the funding program. When cumulative death proceeds exceed cumulative benefit payments, then the excess is held at interest by the carrier to be remitted only when additional future benefit payments are made.
By limiting policy distributions to the benefits being funded, a BENCORE.SM. program is able to achieve "plan assets" status under Generally Accepted Accounting Principles (GAAP). As a result, the assets can be offset against the benefit accrued liability and the income from the policy is an offset against the annual net periodic expense accrual. The different types of employee benefits that could be addressed by a BENCORE.SM. funding program include those described in FASB Statement No. 106 (postretirement benefits other than pensions, e.g., retiree health care), FASB Statement No. 112 (postemployment benefits, e.s., disability payments) and even FASB Statement No. 87 (pensions).
The spendthrift settlement feature of the insurance contract helps to assure that the payment of death proceeds (and other policy distributions) can only be applied to reimburse the particular benefit being funded. As a result, once in place, policy distributions cannot be diverted from their intended purpose.
As a result, so long as the life insurance funding program remains in effect, the benefit obligation will be paid. If future generations of management fail to pay the benefits owed employees, then under the indenture agreement the corporation will not receive the life insurance policy death benefits. If, on the other hand, for some reason the benefit obligation disappears (e.g., in the case of retiree medical benefits, health care reform legislation eliminates the corporate obligation to pay for promised health care benefits), the indenture agreement would expire, allowing the corporation to have complete and unencumbered rights to the policy(ies).
In order for the BENCORE.SM. program to be successfully implemented and operated, however, there must be a real time means of comparing the cumulative benefit payment amount with the cumulative policy death proceeds (and any other distributions). Over the life of the benefit obligation (for example, the lifetime of the longest living employee in a group) the amount of the benefit obligation for the group from plan inception (e.g., the retiree health care cost) is compared with the policy proceeds (life insurance policy death benefits).
Possibly even more important is the real time tracking of the funds on deposit with the carrier when policy death proceeds (and other distributions) exceed benefit payments. These funds will earn interest which is added to the deposit balance. The interest income is taxable to the corporate policy owner--as a result, the amount due for income taxes can be distributed to the policy owner. Accordingly, the amount of taxes accrued must be treated in the same manner as benefit payments. To effectively administer the program, it is necessary to have available a current tax expense accrued amount at any point in time.
Therefore, in order for the carrier to perform its duties under the indenture agreement, it is necessary to have on-going real time monitoring of corporate benefit obligations and indentured assets on an integrated basis. Specifically, it is essential to have a computer system that:
To date, no known monitoring or accounting system exists that is capable of fulfilling the four tasks defined above. The operations that are required to be performed by a system having the above features are complex, particularly when the results are required on a real time basis.

Computerized indenture plan allocation determination management and reporting system


A command fetch control section 1 has an address selection function of selecting the start address of an initialization program stored in a local memory (RAM 6) or an external memory (ROM 9) connected through external buses 7 and 8, based on an address selection signal MS externally given. When a processor 10 in which one or both of the supplies of its internal clocks bck and cck have been stopped after the system wad powered on, is to be restarted, the processor 10 can read out the initialization program necessary for its restarting operation from the high-speed RAM 6. Thus the restarting operation can be performed rapidly.

1. Field of the Invention
The present invention relates to data processing systems, particularly to data processing systems provided with processors having a function of generating a start address of a program for initialization in response to a reset signal, and executing commands fetched in accordance with the start address, to set the internal state of the device proper.
2. Description of the Related Art
When a device provided with a microprocessor is powered on, the microprocessor performs a reset operation for initializing the internal state of the processor, in response to a reset signal externally given. In the reset operation, initialization in hardware is first performed in which the stored data of each memory element provided in the processor is initialized, and then initialization in software is performed in which a program for initialization is read out from an external memory, and the program is executed to set various application programs in their executable states.
The hardware initialization starts when the reset signal is asserted. When the reset signal is negated, the software initialization starts. The software initialization is performed with fetching commands of the initialization program from the address designated by a reset vector. In general, the initialization program is stored in a read-only memory (hereinafter referred to as ROM) externally connected to the processor through a bus.
In the software initialization, the processor gives the ROM a read request address via the bus. A sequence of commands of the initialization program is then read out in order and supplied to the processor via the bus. The processor having received the commands sets proper values to meet the system, in various setting registers provided in the processor, in accordance with the respective supplied commands. The processor thereby sets up an environment in which each application program is executable.
A multiprocessor system is known which includes processors connected to a common bus. The processors are made up from one master processor and the remaining slave processors, and each of the processors performs such a reset operation as described above. To reset the whole of this multiprocessor system, every processor must perform its reset operation.
For this purpose, a reset signal is asserted to all the processors, and thereby every processor performs its hardware initialization. After the reset signal is asserted for a time necessary and sufficient for initializing the stored data of the memory elements in every processor, the reset signal is negated to all the processors.
When the reset signal is negated, all the processors try to access a ROM at once, in accordance with the address designated by a reset vector, in order to perform their software initializations. The ROM connected to the common bus, however, can not simultaneously receive the accesses of the processors. Thus the processors access the ROM in order through arbitration on the common bus (bus arbitration), to read out a sequence of commands of a program necessary for software initialization.
In a system including a processor which performs such a reset operation, it is also proposed that the clock supply is stopped in the processor to reduce the power consumption of the system when the processor is out of operation even after the system is powered on. For example, in such a multiprocessor system as described above, there is the state that the master processor is in operation and the slave processors are out of operation. In this state, the clock supply in each slave processor is stopped to reduce the power consumption.
When a processor in which the clock supply is stopped is required to operate, the clock supply is restarted to start the processor. In this case, the processor being started performs its hardware initialization in response to an assertion of a reset signal, and then its software initialization in response to a negation of the reset signal. In the software initialization, the processor accesses a ROM via a bus, and reads out a sequence of commands of a necessary initialization program.
In such a conventional system as described above, however, the software initialization, which is performed subsequently to the hardware initialization, requires an access to the ROM, which is a low-speed memory device, via the bus to obtain the program necessary for the initialization. As a result, the reset operation takes a long time.
Particularly in a system in which the clock supply in a processor is temporarily stopped to reduce power consumption, if the processor is frequently stopped and started, an access to a low speed ROM must be made in every start operation. This brings about an increase in vain time for waiting for the start of the system.
Besides, in a multiprocessor system as described above wherein processors are connected to a common bus, a ROM which stores the initialization programs for the respective processors, is connected to the common bus. When accesses from the processors to the ROM concur, bus arbitration is made so that the processors may access the low speed ROM in order. Thus the time for initializing all the processors increases considerably.
Besides, in such a multiprocessor system, the respective processors are assigned different roles in general. The manners of their software initializations differ accordingly. The processors, therefore, use different programs for their software initializations. In this system, required is means for judging as to which of the different programs stored in the ROM each processor uses. As a result, the system construction becomes complicated.
It is an object of the present invention to provide data processing systems wherein the software initialization of a processor can be performed more rapidly.
It is another object of the present invention to provide data processing systems wherein the software initialization of a processor can be performed with a simpler construction.
According to an aspect of the present invention, a data processing system in which initialization in software is performed with a necessary initialization program read out from a memory after initialization in hardware has been performed in response to a reset signal, comprises an address selecting section for selecting the start address of the initialization program stored in a local memory or an external memory connected through a bus, on the basis of an address selection signal.
In this feature, when a processor in which the supply of its internal clock has been stopped after the system was powered on, is to be restarted, the processor can read out an initialization program necessary for its restarting operation, from the high-speed local memory. Thus the restarting operation can be performed rapidly. Thereby realized is a rapid restart from a state of stopping the clock for reducing the power consumption of the system.
According to another aspect of the present invention, a data processing system in which initialization in software is performed with a necessary initialization program read out from a memory after initialization in hardware has been performed in response to a reset signal, comprises an access inhibiting section for inhibiting any access request to the memory storing the initialization program, on the basis of a start inhibiting signal.
In this feature, the initialization program stored in an external memory connected through an external bus, can be transferred to a local memory while inhibiting any access request to the local memory. By this manner, in the start processing sequence when the system is powered on, the initialization program for the starting operation can be read out from the high-speed local memory, without necessity of accessing the external memory. Besides, there is no case that processors connected to the external bus start to access the external memory at once. Therefore, arbitration on the common bus becomes unnecessary, and accordingly a rapid starting operation can be performed.
Besides, in case of a multiprocessor system, means for judging as to which program each processor is to execute, becomes unnecessary. Therefore, the system construction can be simplified.

Data processing system for performing software initialization


In one aspect, a system for remotely managing electric power usage of a plurality of target computers is disclosed. In one embodiment, the system includes a plurality of target computers arranged in a group, each using electric power at a rate associated with a corresponding duty cycle and power rating. A remote management computer is communicatively connected to the group of target computers and operative to receive user input data including a total group power usage limit and a priority assignment, minimum duty cycle setting, and/or power zone setting for at least one of the target computers. A power controller is operative to remotely control the power usage of the target computers according to the corresponding user input data, to cause the total group power usage to be at or below the group power usage limit.

A typical data center facility houses server computers, switches, and power distribution units (PDUs). Multiple server computers may be collectively provided in a mounting chassis commonly referred to as a "rack," and PDUs can be configured with multiple appliance outlets designed to distribute and monitor electric power for computers and network equipment within a data center. Existing data centers are not able to selectively limit the power usage of server computers in an aggregated fashion, and hence all server computers draw required power from the PDUs irrespective of real-time current loads and conditions in the data center, resulting in wasted energy. Among other needs, there exists a need to manage data center power usage without adding new hardware or software agents to existing rack configurations while also meeting minimum duty cycle criteria associated with processors of the server computers. Further, there exists a need to provide for scheduling and implementation of user-customized power management policies.
Therefore, heretofore unaddressed needs still exist in the art to address the aforementioned deficiencies and inadequacies.

System and method for remotely managing electric power usage of target computers


A conductivity detector includes an A.C. voltage supply and control circuit for applying a pair of electrodes disposed within a cell filled with electrolyte with a predetermined A.C. voltage and a correction signal generating circuit for generating a A.C. reference signal. At an auto zero adjustment operation, an output A.C. current signal flowing through the electrolyte is detected and the A.C. current is added to the A.C. reference signal. In advance of measuring conductivity, the amplitude of the A.C. reference signal is corrected until the resultant signal of the A.C. output current and the A.C. reference signal reduces to zero.

As shown in the Japanese laying-open patent publication sho No. 62-167456(1987), the well known conductivity detector has two kinds of correction methods for compensating background noise of elute. One method performs correction of A.C. signal at input stage and the other correction of D.C. signal after rectification stage. In the correction operation, the D.C. signal correction is carried out at first, and if the background noise level is too high to be eliminated, the A.C. signal correction is performed until the noise level becomes low enough to be eliminated by D.C. signal correction.
Owing to the time delay of the rectifying circuit, the above prior art has a time difference between the correction signal for eliminating the background noise and a zero detection signal for judging completion of the correction operation. Accordingly, it requires a lot of time to repeat the correction process until the background noise becomes zero.


A sprinkler system employs an articulated riser for adjustable sprinkler head positioning. The system allows for positioning each sprinkler head to compensate for ground irregularities by adjusting the position of the riser. The riser may be supplied for field use in assembled condition for direct fixed connection to T joints on the water main without excess ground digging. This substantially reduces part count for field use and system installation time. The joints of the riser provide leakproof movable connections which allow for the position adjustments of the riser and connected head.

Irregularities in the ground surface and elevation present a problem when installing an underground irrigation system. It is normally desirable to have the sprinkler heads flush with the ground surface. However, with differences in the surface elevation and angle from the main, the risers must be customized to compensate. Solutions to this problem have not been satisfactory, typically causing a requirement for carrying extra parts in the field, increasing installation time, limiting reliability, and introducing leaks.
A common method of addressing the irregular ground problem is to use a semi-flexible riser with multiple threaded sections along its length. After ground preparation, each head that is not level with the ground (higher, lower, or bent) is dug out and the head removed, after which an extension or longer section is installed or the riser cut down as required. If the head is bent or out of alignment, a rock is jammed on the side of the riser to effect the desired orientation (risking damage to the riser). This procedure is time consuming, inaccurate, unreliable, and allows for contaminants (dirt) to be introduced into the system.
Another common method is illustrated in U.S. Pat. No. 1,337,744 to Ballerstedt. This patent discloses an adjustable riser which in one embodiment has a U shaped pipe having ends which are threaded into a T joint and an elbow respectfully or in a second embodiment has three elbows threaded on both ends and a pipe also threaded on both ends. In the second embodiment, one elbow is threaded onto a T of the main and to the pipe at the other end. The other two elbows are threaded together with one threaded to the other end of the pipe. This latter arrangement allows for the universal head adjustment as with the present invention. However, this system, due to its need for assembly after connection to a T of the main, increases part count and assembly time in the field. The joints involved are also not leakproof due to the need to leave them loose enough to allow for rotation into the desired position (or by virtue of such positioning).


There is provided a method for controlling the movement of bile and/or gall stones in the biliary duct. The method comprises gently constricting (i.e., without substantially hampering the blood circulation in the tissue wall) at least one portion of the tissue wall to influence the movement of bile and/or gallstones in the biliary duct, and stimulating the constricted wall portion to cause contraction of the wall portion to further influence the movement of bile and/or gallstones in the biliary duct. The method can be used for restricting or stopping the movement of bile and/or gallstones in the biliary duct, or for actively moving the fluid in the biliary duct, with a low risk of injuring the biliary duct.

Cholelithiasis (gallstones) is the presence or formation of gallstones in the biliary tract can cause intense pain and is potentially dangerous. It is a common medical problem, affecting 10 to 15 percent of the population. Bile is formed in the gallbladder and consists of water, cholesterol, fats, bile salts, proteins, and bilirubin. The main function is to secrete bile salts that emulsify dietary fats and to secrete bilirubin, which is a waste product. Bile is produced by hepatocytes of the liver and transported to the gall bladder were it is stored for release into the duodenum and is transported through a system of ducts. The ducts include the hepatic ducts, which carry bile out of the liver, the cystic duct, which takes bile to and from the gallbladder, and the common bile duct, which takes bile from the cystic and hepatic ducts to the small intestine. These three ducts together with the sphincters that control them, are referred to herein as the "biliary duct" or the "biliary ducts". Biliary ducts has smooth muscle tissue, that enables the ducts to contract.
Gallstones may form when cholesterol or bilirubin precipitates into hard aggregates. Gallstones can block the normal flow of bile if they move from the gallbladder and lodge in any of the ducts that carry bile from the liver to the small intestine. Symptoms of blocked bile ducts include intense pain and are often referred to as a gallbladder "attack" because they occur suddenly. If any of the biliary ducts remain blocked by gallstones for a significant period of time, severe damage or infection can occur in the gallbladder, liver, or pancreas. Left untreated, the condition can be fatal.
The most common treatment for gallstones is the complete removal of the gallbladder (cholecystectomy). Present data suggest that the gallbladder is a nonessential organ and that patient can live a normal life without the gallbladder, as bile can instead reach the intestines via direct flow from the liver through the hepatic ducts into the common bile duct and into the small intestine, instead of being stored in the gallbladder.
Removal of the call bladder is usually performed using laparascopical procedures. However, open surgery is necessary in about 5 percent of gallbladder operations. Recovery from open surgery usually requires 3 to 5 days in the hospital and several weeks at home.
A serious disadvantage with the current treatment is the risk for serious damage to the bile duct during surgery. This is a serious problem and requires additional surgery.
Another disadvantage is that a high percentage of patients suffer from diarrhea permanently or for a long time after removal of the gall bladder.
Another more serious disadvantage is that the element that constricts, clamps or restricts a bodily organ may injure the tissue wall of the organ. Thus, a consequence of the constricting action of the element on the organ is that the element might erode into the organ over time, and in a worst case, penetrate the constricted wall portion of the organ. In addition, blood circulation in the constricted tissue wall portion of the organ is eventually hampered by the pressure exerted by the element, so that poor blood circulation, or worse, no blood circulation results in deterioration of the constricted tissue.
One solution to prevent tissue deterioration due to poor blood circulation could be to apply two or more separately operating constricting elements along respective tissue wall portions of the organ and operate the elements sequentially, whereby each tissue wall portion would have time to recover, i.e., restore normal blood circulation while one of the other tissue wall portions is constricted. However, an apparatus devised in accordance with this solution would have several disadvantages. First, the apparatus would require a large amount of space, making it impractical to implant. Second, the operation of the apparatus in moving the constricting elements between constricting and non-constricting positions day and night would require a large power supply. Such a large power supply would necessitate the implantation of a very large, high capacity battery and/or a sophisticated system for continuous wireless transmission of energy from outside the patient's body for frequent charging of an implanted rechargeable battery. Thus, because of its large size and high power consumption, the apparatus would be impractical or even unrealistic. Third, a sophisticated control system would be necessary to control the moving elements. Finally, such a complicated apparatus of the type described above would significantly add to the costs of treating a malfunctioning sphincter. However, such embodiments may be of value in some combinations with the present invention.
Another solution to the problem of malfunctioning sphincters that has been previously used has been the electric stimulation of the sphincter, to restore its normal function, i.e., the contraction and closing of its associated lumen. This solution would work where the normal sphincteric function is somewhat reduced and has not completely ceased. European patent application 1004330 A1 discloses an example of such a solution, in which electric pulses are delivered to the lower esophageal sphincter of a patient suffering from reflux disease to minimize reflux. However, the esophageal sphincter has to be continuously stimulated with electric pulses to keep it closed, except when the patient eats, which may result in a decreased stimulation effect over time. An even more serious drawback to this solution is that the continuous stimulation over time might cause tissue deterioration due to poor blood circulation.
The use of electric stimula to restore the function of a malfunctioning sphincter is only possible if the sphincter responds sufficiently to the stimula, i.e., closes the lumen in question. In cases where the function of a sphincter has completely ceased, or the sphincter has been removed from the patient's body, electric stimulation cannot be employed.


Systems and methods for building speech-based applications using reusable dialog components based on VoiceXML (Voice eXtensible Markup Language). VoiceXML reusable dialog components can be used for building a voice interface for use with multi-modal, multi-channel and conversational applications that offer universal access to information anytime, from any location, using any pervasive computing device regardless of its I/O modality. In one embodiment, a framework for reusable dialog components built within the VoiceXML specifications is based on the <subdialog> tag and ECMAScript parameter objects to pass parameters, configuration and results. This solution is interpreted at the client side (VoiceXML browser). In another embodiment, a framework for reusable dialog components is based on JSP (Java Server Pages) and beans that generate VoiceXML subdialogs. This solution can be evaluated at the server side. These frameworks can be mixed and matched depending on the application.

The computing world is evolving towards an era where billions of interconnected pervasive clients will communicate with powerful information servers. Indeed, this millennium will be characterized by the availability of multiple information devices that make ubiquitous information access an accepted fact of life. This evolution towards billions of pervasive devices being interconnected via the Internet, wireless networks or spontaneous networks (such as Bluetooth and Jini) will revolutionize the principles underlying man-machine interaction. In the near future, personal information devices will offer ubiquitous access, bringing with them the ability to create, manipulate and exchange any information anywhere and anytime using interaction modalities most suited to the an individual's current needs and abilities. Such devices will include familiar access devices such as conventional telephones, cell phones, smart phones, pocket organizers, PDAs and PCs, which vary widely in the interface peripherals they use to communicate with the user.
The increasing availability of information, along with the rise in the computational power available to each user to manipulate this information, brings with it a concomitant need to increase the bandwidth of man-machine communication. The ability to access information via a multiplicity of appliances, each designed to suit the individual's specific needs and abilities at any given time, necessarily means that these interactions should exploit all available input and output (I/O) modalities to maximize the bandwidth of man-machine communication. Indeed, users will come to demand such multi-modal interaction in order to maximize their interaction with information devices in hands-free, eyes-free environments.
VoiceXML is a markup language designed to facilitate the creation of speech applications such as IVR (Interactive Voice Response) applications. Compared to conventional IVR programming frameworks that employ proprietary scripts and programming languages over proprietary/closed platforms, the VoiceXML standard provides a declarative programming framework based on XML (eXtensible Markup Language) and ECMAScript (see, e.g., the W3C XML specifications (www.w3.org/XML) and VoiceXML forum (www.voicexml.org)). VoiceXML is designed to run on web-like infrastructures of web servers and web application servers (i.e. the Voice browser). VoiceXML is a key component for providing a voice interface to Mobile e-business. Indeed, VoiceXML allows information to be accessed by voice through a regular phone or a mobile phone whenever it is difficult or not optimal to interact through a wireless GUI micro-browser.
More importantly, VoiceXML is a key component to building multi-modal systems such as multi-modal and conversational user interfaces or mobile multi-modal browsers. Multi-modal e-business solutions exploit the fact that different interaction modes are more efficient for different user interactions. For example, depending on the interaction, talking may be easier than typing, whereas reading may be faster than listening. Multi-modal interfaces combine the use of multiple interaction modes, such as voice, keypad and display to improve the user interface to e-business. Advantageously, multi-modal browsers can rely on VoiceXML browsers and authoring to describe and render the voice interface.
There are still key inhibitors to the deployment of compelling multi-modal e-business applications. Most arise out of the current infrastructure and device platforms. Indeed, the current networking infrastructure is not configured for providing seamless, multi-modal access to information. Indeed, although a plethora of information can be accessed from servers over a communications network using an access device (e.g., personal information and corporate information available on private networks and public information accessible via a global computer network such as the Internet), the availability of such information may be limited by the modality of the client/access device or the platform-specific software applications with which the user is interacting to obtain such information. For instance, current wireless network infrastructure and handsets do not provide simultaneous voice and data access. Middleware, interfaces and protocols are needed to synchronize and manage the different channels.
Currently, application authoring methodologies are being developed to provide means to develop rich multi-modal applications. It is anticipated that most multi-modal mobile deployment will rely on wireless PDAs that can overcome the above challenges by hosting a VoiceXML browser on the client (fat client configuration) or by relying on sequential or notification-based multi-modal scenarios, where the user switches connectivity when he or she wants to interact through another modality.
Because of the inherent challenges of conversational engines (e.g., speech recognizer) that require data files (e.g., grammars), however, it is important to provide mechanisms that provide tools that hide this level of complexity. It is also important that such mechanisms and tools overcome some of the limitations imposed by VoiceXML (e.g. the VoiceXML execution model). Thus, while it is anticipated that voice (alone for multi-channel applications) and multi-modal will be key catalyst to wide adoption of mobile e-business, it is believed that such wide spread adoption of such voice and multi-modal interfaces will remain challenging until tools for building applications using voice-based reusable dialog components are available to non-speech specialists.
The VoiceXML Forum has submitted VoiceXML 1.0 to the W3C Voice Browser activity (see, e.g., W3C voice browser activity, www.w3.org/voice/). As part of its activities, the W3C Voice Browser working group has identified reusable dialog components as an item worth studying and it published a set of associated requirements (see, e.g., the W3C reusable dialog requirements for voice markup language (www.w3.org/TR/reusable-dialog-reqs)).
Accordingly, VoiceXML frameworks for reusable dialog components (server-centric and client-centric), which satisfy the published W3C reusable dialog component requirements while remaining compliant with the VoiceXML specifications, for example, would be a significant component for building voice interfaces and multi-modal applications that seamlessly operate across a plurality of channels.

Reusable voiceXML dialog components, subdialogs and beans

International Business Machines Corporation


An illustrative LED driver circuit is based on a transition-mode power factor correction integrated circuit using flyback topology. The LED driver circuit features a universal input circuit having various fault and surge protections, output circuit open load and short circuit protection, and main transformer over temperature protection.

The present invention relates to driver circuits for LED lighting, and particularly, to protective aspects of driver circuits for LED lighting.
One type of driver circuit for LED lighting utilizes a power factor correction (PFC) controller, for example, a current-mode PFC controller operating in transition mode, and a flyback converter providing an isolated supply to LEDs.
It is desirable to provide various circuit protection features for an LED driver circuit utilizing a PFC controller without having to add expensive circuit components or complexity that increases the cost of implementing typical circuit protection schemes disclosed by the prior art.


Disclosed are methods and devices in which certain types of nanotubes (e.g., carbon nanotubes and boron nitride nanotubes conduct heat with high efficiency and are therefore useful in electronic-type devices.

1. Field of the Invention
The present invention relates to the field of nanomaterials such as carbon nanotubes and further to the field of phonon (heat) waveguides.
2. Related Art
Presented below is background information on certain aspects of the present invention as they may relate to technical features referred to in the detailed description, but not necessarily described in detail. The discussion below should not be construed as an admission as to the relevance of the information to the claimed invention or the prior art effect of the material described.
When a sample of material is heated on one end, energy will flow to the cold end. In solid material, heat can be carried either by mobile electrons or by atoms vibrating around their fixed, equilibrium positions. Insulating materials do not contain mobile electrons, and, as a result, only atomic vibrations can transport heat in insulators. These vibrations are not random: the atoms move collectively so that together they form waves, called phonons.
Cylindrical-structured materials such as carbon nanotubes (CNTs) or boron nitride nanotubes (BNNTs) have been known to exhibit many unique properties. These include high electronic mobility, high current-carrying capacity, high Young's modulus, high tensile strength, and high thermal conductivity1. While an enormous amount of work has been devoted to investigating their electrical and mechanical properties, few have explored the thermal behavior of an individual nanotube2-4. This is mainly due to the elaborate microfabrication processes required to construct the suspended thermal devices for an individual nanotube, as well as the difficulty in positioning a nanotube at the desired location. Recently, we have overcome these difficulties and successfully measured the isotope effect of the thermal conductivity of BNNTs. Described below is a phonon waveguide having special properties as shown by the in-situ transport measurement of an individual CNT against structural deformation. The resistance and thermopower show a reversible band-gap tuning against strain. In contrast, their thermal conductivity remains unperturbed under large deformation. More surprisingly, these features hold not only for global bending, but also for local buckling where the radius of curvature is comparable to the phonon mean free path. Furthermore, these unique thermal transport properties are also exhibited in BNNTs. Our findings suggest that nanotubes not only can be sensitive electromechanical devices but are also excellent and robust phonon waveguides with properties unknown to any other materials.
3. Specific Patents and Publications
Chang et al. "Nanotube Phonon Waveguide," Phys. Rev. Lett., 99:045901-1 04590-4 (published on line Jul. 25, 2007) was derived from the work described here.
U.S. Pat. No. 3,626,334 to Keyes, issued Dec. 7, 1971, entitled "Electrically Variable Acoustic Delay Line," discloses that a semiconductor can be perturbed by various methods of doping. Ion implantation, alloying, or neutron irradiation of the semiconductor can be relied upon in addition to diffusion to attain the phonon wave-guiding action, wherein the phonons are acoustic.
Pokatilov et al. "A phonon depletion effect in ultrathin heterostructures with acoustically mismatched layers," App. Phys. Lett., 85(5): 825-827 (2004) discloses theoretically that modification of acoustic phonon spectrum in heterostructures with large acoustic impedance mismatch at the interface may lead to the strong phonon depletion in the core layer.
Schwab et al., "Measurement of the quantum of thermal conductance," Nature, 404, 974-977 (2000) discloses that the thermal conductance of phonon waveguides in the ballistic, one-dimensional limit had been calculated using the Landauer formula. In this publication, the authors further report that they developed new fabrication techniques based on initial work on thermally isolated mesoscopic samples with integrated transducers. Their device includes a phonon 'cavity' (a quasi-isolated thermal reservoir) suspended by four phonon 'waveguides'. These are fabricated from a 60-nm-thick silicon nitride membrane by electron beam lithography and pattern transfer technique.
Hone et al., "Thermal conductivity of single-walled carbon nanotubes," Phys. Rev. B, 59, R2514-R2516 (1999) discloses that the temperature-dependent thermal conductivity κ(T) of crystalline ropes of single-walled carbon nanotubes from 350 K to 8 K. κ(T) decreases smoothly with decreasing temperature, and displays linear temperature dependence below 30 K. Comparison with electrical conductivity experiments indicates that the room-temperature thermal conductivity of a single nanotube may be comparable to that of diamond or in-plane graphite, i.e., is quite high.
Chang et al., "Solid-State Thermal Rectifier," Science, 17 Nov. 2006:Vol. 314. no. 5802, pp. 1121-1124 discloses that high-thermal-conductivity carbon and boron nitride nanotubes mass-loaded externally and inhomogeneously with heavy molecules were produced. The resulting nanoscale system yields asymmetric axial thermal conductance with greater heat flow in the direction of decreasing mass density.
U.S. Pat. No. 4,349,796, entitled "Devices incorporating phonon filters," discloses an acoustic superlattice of alternating layers of different acoustic impedance as a filter for high frequency phonons. Applications discussed include spectrometers, acoustic imaging apparatus, and cavity resonators.

The Regents of the University of California


A radio transmission apparatus and a radio transmission method for readily controlling retransmission timing presets a frame cycle for retransmission, and transmits only packets for which no acknowledgement of receipt has been received within the frame cycle as a reply from a receiving apparatus to a transmitting apparatus. Thus, timing for retransmission can be readily determined. Also, the retransmission timing is determined based on when a packet is actually transmitted. Therefore, the multiple acknowledgement of receipt can be returned as a combined reply.

The present invention relates to a radio transmission apparatus and a radio transmission method for transmitting various information by a radio signal, for example, between a plurality of communication terminals.
As a conventional method of retransmission control in radio transmission, a method has been used which starts a timer after transmitting information, and retransmits the information whose receipt acknowledging information has not been transmitted from an information receiver before time-out of the timer.
Also, consideration has recently been given to a method which packetizes information to be transmitted by an information transmitter into predetermined size and transmits resulting packets by radio, and reconstructs the original information by collecting the packets at an information receiver.
The method has been considered for use in conjunction with a selective retransmission type automatic retransmission control method (SR-ARQ system), which transmits information that the information receiver has successfully received a packet to the information transmitter as receipt acknowledging information, and selects and retransmits only an unreceived packet from the information transmitter.
In addition, as a conventional method of packet transmission, a retransmission method capable of dealing with a burst error in a transmission line has been realized which, in retransmission control, waits for a reply of receipt acknowledging information from the information receiver over a certain long period of time, and then retransmits a packet whose receipt acknowledging information has not been received.
Furthermore, as a conventional technique, a method has been proposed which prevents unlimited retransmissions of packets by setting a finite number of retransmissions.
By setting such a limit on the number of retransmissions, it is possible to use the same sequence number repeatedly, and thus make efficient transmission.
Furthermore, when using the conventional selective retransmission type automatic retransmission control method, by returning a certain amount of receipt acknowledging information in one transmission, it is possible to reduce packets, which represent the number of pieces of information flowing in a radio transmission line, and thus reduce information traffic.
Such conventional retransmission control methods need to start a timer every time information is transmitted. Therefore, when information is packetized for transmission, a timer needs to be started for each packet.
Also, with a method of retransmission after waiting for a certain long period of time, when a time for retransmission is to be controlled by software, it is difficult for the software to determine that an access right on a transmission line has been obtained. Therefore, there occurs a time difference between a time when a timer is started and a time when a packet is actually transmitted, and thus the time when a timer is started cannot be used for precise retransmission control.
In addition, the conventional retransmission method using a timer needs to handle a time of a retransmitted packet. Therefore, a timer needs to be started for each packet so as to handle its time.
Moreover, in addition to control of a time for retransmission, it is necessary to handle a time for discarding a packet whose receipt acknowledging information has not been received after repeated retransmissions.
Furthermore, when using the conventional selective retransmission type automatic retransmission control method and returning a certain amount of receipt acknowledging information in one transmission, it is necessary to define a time for integrating the receipt acknowledging information. This reduces a degree of freedom in designing transmission apparatus, and makes it impossible to secure compatibility between apparatus of different manufacturers.
Furthermore, even if the time for integrating the receipt acknowledging information is defined, the receipt acknowledging information cannot be returned unless an access control right is obtained. Therefore, a time required obtaining the access control right needs to be set as a redundant time, and thus the time for integrating the receipt acknowledging information needs to be reduced in effect.

Radio transmission apparatus and radio transmission method


A fan assembly includes a statonary support holding a rotary support operated by a motor for turning 360 degrees about a vertical axis and a plurality of fan units mounted on the rotary support. First conductors are provided to connect the motor and the fan units to rotary conducting plates which respectively contact stationary second conducting plates, and second conductors are connected to the second conducting plates, thereby preventing the conductors of the assembly from becoming tangled.

This invention relates to a fan assembly, and particularly to a fan assembly including a support which rotates 360 degrees about a vertical axis and a plurality of fan units mounted on the rotary support.
Various fan devices have been provided in the art. A typical fan device includes an upright stationary support on which is mounted a turnable motor housing with a fan blade unit. The motor housing turns about 180 degrees so as to permit the fan blade to circulate currents of air within a wide area. However, constant air circulation cannot be maintained within the entire 180 degree area because a portion of the area cannot be ventilated at the same time as the other portion due to the presence of a single fan blade unit. Moreover, the area that can be ventilated by the conventional fan is limited.

No. 106, Lane 6, Sec. 1 Chung-Shan Road, Ta-Tsuen Hsiang


Provided is a semiconductor device that includes a first transistor and a second transistor that are formed on the same substrate. The first transistor includes a first collector, a first base, and a first emitter. The first collector includes a first doped well disposed in the substrate. The first base includes a first doped layer disposed above the substrate and over the first doped well. The first emitter includes a doped element disposed over a portion of the first doped layer. The second transistor includes a second collector, a second base, and a second emitter. The second collector includes a doped portion of the substrate. The second base includes a second doped well disposed in the substrate and over the doped portion of the substrate. The second emitter includes a second doped layer disposed above the substrate and over the second doped well.

The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. These ICs include bipolar transistor devices. Bipolar transistor devices include NPN-type transistors and PNP-type transistors. As fabrication processes progress to technology nodes that are becoming increasingly small, it may be difficult to form an NPN-type transistor and a PNP-type transistor simultaneously. Often times, simultaneous formation of NPN-type and PNP-type transistors may require additional masks and/or separate process flows, both of which increase fabrication costs and slow down production.
Therefore, while existing methods of fabricating bipolar transistor devices have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.

Forming bipolar transistor through fast EPI-growth on polysilicon

Taiwan Semiconductor Manufacturing Company, Ltd.


A method is provided in one example and includes receiving an indication of a start of a point of interest associated with a portion of a video presentation, and determining a start time relative to a start time of the video presentation. The method further includes receiving an indication of an end time of the point of interest, and determining an end time of the point of interest relative to the start time of the video presentation. The method still further includes generating point of interest data that includes the start time and end time of the point of interest, and sending the point of interest data to a processing device. The processing device generates a composite point of interest video including the portion of the video presentation associated with the point of interest.

A point-of-interest (POI) video clip is a video clip, which includes a subset of the video of an original video recording. The POI video clip is marked by a start time and an end time relative to the beginning of the original video recording of an event. A composite POI video consists of one or more POI video clips. An event may include, for example, a meeting, a training session being recorded, a video on demand (VoD) presentation being watched by an end user, or any other video presentation. Traditionally, extracting point of interest (POI) video clips is handled after an event is completed, and the editing of the recorded video file is performed by a person using specially designed video editing software. Traditionally, in order to successfully create a composite POI video, a number of conditions should be met that are often difficult to realize, especially in a corporate environment. In addition, creating a composite POI has traditionally been a time-consuming process.

Method, system, and apparatus for marking point of interest video clips and generating composite point of interest video in a network environment


A convenient task reminder, compliance logging and monitoring system for routine activities is presented as well as an automated communications/notification system that can relay the activity and/or inactivity recorded by the Home Unit device to other systems and/or specifically designated people.

This invention relates to providing convenience reminders, improving compliance to performing routine tasks, and providing automated communications between a person and his or her caregiver(s).
Monitoring devices and systems exist that can provide in home monitoring of critical health parameters such as blood sugar, pressure, heart rate and weight. These systems report the critical parameters to a remote health care professional and greatly aid in healthcare management of people with chronic illnesses. Other devices also exist that provide convenience reminders to help elderly people remember to perform daily tasks such as taking their self-tests and/or medications. These systems, however, do not provide an automated messaging service to the informal caregivers of the elderly person. Furthermore, a low cost Home Unit and communications tool is needed to empower the elderly person to perform his tasks and automatically send messages related to his activity to the common communication tools of informal caregivers. Such a system can further assist the individual by enabling other valuable services that are made possible by the presence of a Home Unit and a communications management service system.

Assisting and monitoring method and system


A memory array system is provided comprising a plurality of rows of memory cells, each row having an address, wherein each memory cell stores volatile data requiring periodic refreshing. A refresh controller controls the periodic refreshing of data in each row of memory cells. A refresh address counter indicates the address of the row of cells for refreshing. A temporary data storer is used for storing data from the memory cell indicated for refreshing. A data inverter inverts data from the memory cell indicated for refreshing. A comparator associated with the temporary data storer and the data inverter compares data in those devices. An indicator bit is associated with the refresh address counter to indicate whether the data stored in the address indicated by the refresh address counter is inverted.

The present invention relates in general to memory array systems and more particularly to versatile memory array systems that can be used in a variety of applications.
Computer systems incorporate volatile memory devices such as dynamic random access memories (DRAMs) to store digital data used by the system. Memory arrays are groups of memory cells organized as rows and columns wherein each memory cell contains one bit of data. The technology used to design memory devices has advanced so that more and more data can be stored on a single memory device chip.
In a memory array, the rows are selected by row decoders that are typically located adjacent to the end of the row lines. Each of the row lines is electrically connected to the row decoders so that the appropriate signals can be received and transmitted. The columns of the memory array are connected to input/output devices such as a read/write multiplexer. In the case of DRAMs, the memory array columns are also connected to line pre-charging sense amplifier circuits at the end of each column line.
In order to store data in the DRAM or to access stored data, it is necessary to specify a storage location on the memory array. A row address and column address are provided from an external source to decoders so that a word line and a sense amplifier can be selectively activated in order to read from or write to a desired portion on the memory array.
There is a need to be able to detect certain errors that can occur within a memory cell which is no longer functioning properly. Early memory chips were organized so that each chip provided one-bit of data for each address. Currently memory chips frequently are organized into sets of 4-bits of data for each address. If one of these memory chips fails the result is potentially erroneous data bits. Therefore, the error correction code needs to be designed for 4-bit error detection.
Incorporating a 4-bit error detection and 1-bit correction code in a 64 or 128-bit memory system would require eight or nine check bits. Modern memory buses are often 64 or 128-bits wide. Currently memory arrays are frequently used in personal computers which are requiring 32 MB to 256 MB memory systems. Presently memory arrays typically contain 256 megabit devices and the trend is towards production in memory arrays that will contain 1-4 gigabits within 2 to 4 years.
With the anticipated increase in memory array sizes, the present approach of utilizing 1 or 4-bit wide memory chip organization is being reconsidered. For example, employing the present 1 or 4-bit memory chip organization with the 32-bit wide dataword will require a 32 memory array with 1-bit organization or 8 memory arrays with 4-bit organization. This will, in turn, result in a minimum granularity of 8 GB or 4 GB respectively. This large amount of memory in a computer system such as a desktop or laptop is excessive and unnecessary and will increase the overall cost of the system. In response to the minimum granularity problem, memory array manufacturers are moving to 8, 16 and even 32-bit wide memory organization schemes with a corresponding increase in the number of bits required for array detection and correction. Accordingly, what is also needed is an improved error detection technique that minimizes the cost, the system and the extra amount of bits required in detecting and correcting errors. Such a system is provided in U.S. patent application Ser. No. 09/716,915 hereby incorporated by reference.
The contents of the volatile storage devices such as DRAMs fade overtime. Refresh operations are used to periodically rewrite the date into each memory cell. During a refresh operation, the contents are stored temporarily in the sense latch, a buffer, or a register and then rewritten into the same address where it previously was stored so that it is fresh. The timing for the refresh operation is dependent on the system. A refresh address counter keeps track of which row is to be refreshed during a refresh cycle. A memory cell connected to the word line which is selected with the refresh address is refreshed during the operation.
Refreshing the DRAM requires power consumption which puts a stress on the power requirements of the overall system. Therefore, it is desirable to be able to minimize the frequency of refreshes while ensuring that the data is not lost by disappearing before the memory cell is refreshed. There are fluctuations in the amount of time that a given memory cell can hold its charge to maintain the data, which varies from cell to cell. Therefore, it would be desirable to optimize the power consumption of a DRAM by using the cells in the DRAM that can go for longer periods without being refreshed
In general, the goal is to minimize the size and cost of the DRAM systems. Another goal is to provide flexibility so that a DRAM can be initially designed and built for general use and can later be designated for a particular purpose, such as a hand held device and a Palm computer. A Palm computer system, for example, has certain temperature and battery power requirements which can effect refresh interval requirements. A Palm computer also has specific requirements regarding power consumption limitations.
The temperature of the system in which the DRAM will be placed and power consumption limitations have an effect on how often a refresh operation needs to be performed. A DRAM can be optimized for a specific system by using those word lines or memory cells with the greatest capacity to endure certain temperatures without losing data or without requiring refresh cycles as frequently.
Even after the system is installed in a system, use of DRAMs having extra wordlines and memory cells that can be selectively activated would provide greater flexibility. It is also desirable that the swapping out of a defective memory cell be done without system intervention, without increasing the chip size, performance penalties and the cost of the chip.
It is desirable that the on-chip error detection be performed without system intervention since the retention time is very strongly coupled to the temperature and the cell signal strength is strongly related to other external environmental conditions. Use of a DRAM chip in an external system alters the temperature of the memory cell so the true tolerance level can be found. It is preferable for the DRAM system to monitor failure and adjust the refresh interval time between refresh cycles accordingly. This would allow the system to increase the interval during periods of inactivity when the device is cooler and other environmental conditions are favorable. This would, in turn, reduce the power consumed by the device.
Finally, it is desirable for a device to use its own error signal to adjust its own self-refresh interval. A single part number could be used to satisfy low power and standard applications. It is desirable for the memory unit to self-regulate its refresh interval, thereby minimizing power consumption. The need to sort by power requirements would be eliminated allowing the use of a generic part number.
One or more of the foregoing problems is solved and/or one or more of the foregoing needs is met by the present invention.
It is therefore an object of the invention to provide an improved memory array system. It is another object of the preferred embodiment of the invention to provide a system and method for detecting failures in a memory array. It is a further object of the preferred embodiment of the invention to provide a memory array system that can be flexibly adapted for use in a variety of applications with varying power consumption and temperature requirements.
A memory array system is provided comprising a plurality of rows of memory cells, each row having an address, wherein each memory cell stores volatile data requiring periodic refreshing. A refresh controller controls the periodic refreshing of data in each row of memory cells. A refresh address counter indicates the address of the row of cells for refreshing. A temporary data storer is used for storing data from the memory cell indicated for refreshing. A data inverter inverts data from the memory cell indicated for refreshing. A comparator associated with the temporary data storer and the data inverter compares data in those devices. An indicator bit is associated with the refresh address counter to indicate whether the data stored in the address indicated by the refresh address counter is inverted.
In accordance with a further embodiment of the invention a deactivation controller is provided for deactivating a row of cells. A cell address controller redirects requests for a row of cells to a second row of cells when the requested row is deactivated. A test system is used for testing each row of cells for the ability to store data without being refreshed for a designated period of time. A row that is unable to store data without being refreshed for a designated time is deactivated and relocated to another row.
In another aspect of the present invention a method is provided for detecting an error in a memory device having a plurality of cells organized in a plurality of rows and columns. During a first refresh operation data is read from a row of cells designated by a refresh counter that compliments the data as generated. The compliment of the data is stored in a temporary storage area. A bit associated with the refresh address counter to indicate that the first refresh operation has been performed is set. During a second refresh operation, data is read from a row of cells designated by the refresh address counter. A compliment of the data is generated. The data is compared to the data that is temporarily stored. An error signal is generated if the two data values are not exact. The complimented data is written to the row. The bit is reset to indicate that the second refresh operation has been performed. During a read operation the bit is used to indicate whether the data is complimented.
A further method provides for optimizing the tolerance levels for a memory device. A time and temperature parameter is set for performing the refresh operation. When an error is detected the alternate word line is selected. Otherwise the first word line is used.

International Business Machines Corporation


The present invention provides a method for determining what group a given multilayer optical disc belongs to. The disc is one of a number of multilayer optical discs, which are designed so that information stored is retrievable from any of the discs by irradiating the disc with a light beam having the same wavelength and which have been classified into multiple groups. According to this method, performed first is Step (A) of measuring either a distance from a first one of multiple information layers of the given multilayer optical disc to a second one thereof, which is located adjacent to the first information layer, or a distance from the first information layer to the surface of the optical disc. Next, Step (B) of determining, by the distance measured, what group the given multilayer optical disc belongs to is performed.

In optical disc technologies, data can be read out from a rotating optical disc by irradiating the disc with a relatively weak light beam with a constant intensity, and detecting the light that has been modulated by, and reflected from, the optical disc.
On a read-only optical disc, information is already stored as pits that are arranged spirally during the manufacturing process of the optical disc. On the other hand, on a rewritable optical disc, a recording material film, from/on which data can be read and written optically, is deposited by evaporation process, for example, on the surface of a substrate on which tracks with spiral lands or grooves are arranged. In writing data on a rewritable optical disc, data is written there by irradiating the optical disc with a light beam, of which the optical power has been changed according to the data to be written, and locally changing the property of the recording material film.
It should be noted that the depth of the pits and tracks and the thickness of the recording material film are both smaller than the thickness of the optical disc substrate. For that reason, those portions of the optical disc, where data is stored, define a two-dimensional plane, which is sometimes called a "storage plane" or an "information plane". However, considering that such a plane actually has a physical dimension in the depth direction, too, the term "storage plane (or information plane)" will be replaced herein by another term "information layer" or simply "layer". Every optical disc has at least one such information layer. Optionally, a single information layer may actually include a plurality of layers such as a phase-change material layer and a reflective layer.
In this description, an optical disc with a stack of N information layers (where N is an integer that is equal to or greater than two) will be referred to herein as an "N-layer disc". Also, optical discs, each having multiple information layers, will be collectively referred to herein as "multilayer discs", while an optical disc with only one information layer will be referred to herein as a "single-layer disc".
In a multilayer disc, the distance as measured from its disc surface, through which the incoming light enters the disc, to any of its information layers is sometimes called the "depth" of that information layer. Also provided between the shallowest information layer of a multilayer optical disc and its disc surface is a transparent cover layer, which is often called a "light-transmissive layer". Even though actually there is a light-transmissive layer between each pair of information layers, the "light-transmissive layer" will always refer herein to such a cover layer unless stated otherwise.
To read data that is stored on an optical disc or to write data on a recordable optical disc, the light beam always needs to maintain a predetermined converging state on a target track on an information layer. For that purpose, a "focus control" and a "tracking control" need to be done. The "focus control" means controlling the position of an objective lens along a normal to the surface of the information plane (such a direction will sometimes be referred to herein as "substrate depth direction") so that the focal point (or at least the converging point) of the light beam is always located on the information layer. On the other hand, the "tracking control" means controlling the position of the objective lens along the radius of a given optical disc (which direction will be referred to herein as a "disc radial direction") so that the light beam spot is always located right on a target track.
In order to perform such a focus control or a tracking control, the focus error or the tracking error needs to be detected based on the light that has been reflected from the optical disc and the position of the light beam spot needs to be adjusted so as to reduce the error as much as possible. The magnitudes of the focus error and the tracking error are represented by a "focus error (FE) signal" and a "tracking error (TE) signal", both of which are generated based on the light that has been reflected from the optical disc.
In a conventional optical disc drive disclosed in Patent Document No. 1, if the disc loaded is a multilayer disc, two known spherical aberrations are set in advance, a focus search operation is performed with each of these two settings, and this series of operations are repeatedly performed until the numbers of FE signal detected with a predetermined threshold value agree with each other as shown in the flowchart illustrated in FIG. 10 of Patent Document No. 1. And the optical disc drive makes a decision that the largest numbers of FE signals that perfectly agree with each other should be the number of layers in the disc loaded. As a result, the deterioration in FE signal detection accuracy due to the influence of spherical aberration or astigmatism that has been caused by an uneven thickness of a Blu-ray Disc that requires as large an NA as 0.85 can be reduced and the accuracy can rather be increased by counting FE signals with respect to a given multilayer disc.
On the other hand, Patent Document No. 2 discloses an arrangement including, as an additional component, a focus detection system that can detect an FE signal with respect to the center of a light beam and another FE signal with respect to a peripheral portion of the light beam surrounding that center portion independently of each other, as shown in FIG. 3 of Patent Document No. 2. With such an arrangement, a spherical aberration signal can be generated as a differential signal representing the difference between the center and peripheral portions. Furthermore, a spherical aberration correction value, at which the spherical aberration signal has a zero voltage value (i.e., causes a polarity inversion) when the spherical aberration corrector is driven with respect to each of multiple layers of a multilayer disc, is stored in advance in a memory. That is to say, Patent Document No. 2 discloses a method for determining on which of a number of layers of a given multilayer disc the focus search operation has gotten done by actually loading the drive with the multilayer disc, setting a focus on one of its layers, driving the spherical aberration corrector so that the spherical aberration becomes zero at that layer on which the focus has been set, and then comparing the correction value to the value stored in the memory.

Method for identifying group of multilayer disc, and optical disc device


Techniques and architectures for measuring available bandwidth. A train of probe packets is received from a remote electronic device. A network transmission delay for at least two packets from the train of probe packets is measured. Network congestion is estimated utilizing the at least two packets from the train of probe packets. An estimated available bandwidth is computed based on the network transmission and estimated network congestion. One or more network transmission characteristics are modified based on the estimated available bandwidth.

Bandwidth measurement and estimation is an essential part of any network traffic engineering solution including, for example, software defined wide area network (SDWAN) solutions. It is useful to know how much capacity is available on each network path before deciding where to place/route and load balance the network traffic. It is also useful to know the available bandwidth to help a user or network administrator understand the current network condition.
In a closed system, it is possible to collect direct measurements on each network device of the traffic path. However, in many cases, it is not possible to use direct measurement. For example, when the network devices are in different administrative domains or when measurable characteristics are hidden by tunneling or encapsulation. This is the case for SDWANs that direct traffic over a best path utilizing the Internet, for example.

Techniques and architectures for available bandwidth estimation based on multi-dimensional analysis

Hewlett Packard Enterprise Development LP