A vertical pressure sensor having a fluid deforming pressure application unit, a sensor housing, a socket, a circuit board, a plurality of electrode terminals, and a plurality of electrical signal transmitting electrode rods. The pressure application unit includes a diaphragm to which strain gauges are attached. The socket surrounds a circumference of the diaphragm of the pressure application unit and includes a receiving passageway. The plurality of electrode terminals are provided at the upper end of the socket in a Wheatstone bridge circuit pattern. The plurality of electrode terminals protrude from the upper end of the socket to constitute an electrode tip. The circuit board connects to the plurality of electrode terminals to convert a pressure value into an electrical signal, and the plurality of electrode rods are connected to the circuit board to transmit the electrical signal outside.

In a known pressure measuring structure, a diaphragm is generally provided perpendicular to the direction in which pressure is applied such that the diaphragm can be finely elastically deformed due to the pressure applied to the diaphragm, and four strain gauges are attached to the top of the diaphragm so as to convert the elastic deformation of the diaphragm into an electrical signal (generally, a difference in voltage displacement). At this time, the strain gauges are attached to the diaphragm such that the strain gauges are provided in a pair symmetrical with respect to the center of the diaphragm. A Wheatstone bridge circuit formed on a printed circuit board (PCB) accurately calculates a pressure value applied to the diaphragm from the electric signal obtained by the strain gauges.
Generally, a pressure sensor may include an input unit, having a diaphragm, to receive external pressure, a first circuit board electrically connected to strain gauges of the diaphragm to receive an electric signal from the strain gauges and processing the received electric signal using a Wheatstone bridge circuit, and a second circuit board electrically connected to the first circuit board, the second circuit board having a circuit device to transmit a pressure value to a controller provided outside the sensor.
Meanwhile, the size of the pressure sensor may be restricted. For example, a pressure sensor may be mounted to an external signal processing (ESP) module used in an antilock brake system (ABS) for automobiles. As is well known, a solenoid valve, a pump line and the like are densely disposed in the ESP module. The ESP module is filled with a high pressure fluid, which is pulsated to perform braking when the ESP module is driven. The components of the ESP module are disposed as densely as possible so as to reduce the size of the device. In addition, it is necessary to configure a pressure sensor provided to sense pressure of the fluid in the ESP module such that the sectional area of the pressure sensor is limited.
Such a pressure sensor is schematically shown in FIG. 7, which is a sectional view illustrating a known pressure sensor.
A diaphragm 221 is disposed at the upper end of an input unit 220, which is coupled to the lower end of a cylindrical casing 210. Four strain gauges 222 are attached to the top of the diaphragm 221. A socket 223, made of metal, is coupled to the upper part of the input unit 220 such that the socket 223 surrounds the input unit 220. A first circuit board 230 having a Wheatstone bridge circuit mounted therein is securely coupled to the upper end of the socket 223.
The strain gauges 222 are electrically connected to the first circuit board 230 by wire bonding such that influence on elastic deformation of the diaphragm 221 is minimized. In this case, the distance between the top of the diaphragm 221, to which the strain gauges 222 are attached, and the first circuit board 230 is restricted such that the distance does not exceed a predetermined value, i.e., such that welding portions are not separated from opposite ends of wires 240, which are inclined, when the relative position between the strain gauges 222 and the first circuit board 230 is changed due to elastic deformation of the diaphragm 221.
Meanwhile, a second circuit board 270 is coupled to the upper end of the cylindrical casing 210. Electrode rods 250 disposed in the pressure sensor 200, where the electrode rods 250 protrude upward from the pressure sensor 200, transmit a pressure value to the outside are electrically connected to the top of the second circuit board 270. The second circuit board 270 includes elastic terminals 260 protruding downward to receive the pressure value generated by the first circuit board 230.
The first circuit board 230 is provided at the center thereof with a receiving passageway through which the strain gauges 222 are connected to the first circuit board 230 by wire bonding. It may be assumed that a plurality of electrode rods are mounted around the receiving passageway of the first circuit board 230 in order for the first circuit board 230 to be directly electrically connected to contact points (not shown) of an ESP module. In this case, the distance between the respective electrode rods is great due to the receiving passageway formed at the center of the first circuit board 230, with the result that the electrode rods may not be aligned with the respective contact points formed at the ESP module. For this reason, the second circuit board 270 is further provided between the first circuit board 230 and the contact points of the ESP module such that the first circuit board and the second circuit board are electrically connected to each other through a plurality of electrode rods disposed at great intervals, and electrical connection between the second circuit board and the ESP module using a plurality of electrode rods densely disposed at the center of the second circuit board. In the known pressure sensor, as described above, the receiving passageway is formed in the first circuit board, and therefore, the first circuit board and the second circuit board are necessary.
Also, each of the elastic terminals 260 includes an outer pipe body 261 having a spring (not shown) mounted therein, the outer pipe body 261 fixedly extending through the second circuit board 270, and an inner pipe body 262 disposed in the outer pipe body 261 such that the inner pipe body 262 can elastically slide upward. The outer pipe body 261 and the inner pipe body 262 are made of a conductive material. When the input unit 220 is inserted into the lower end of the cylindrical casing 210, the elastic terminals elastically move upward to contact an electrical pattern (not shown) formed on the first circuit board 230.
The elastic terminals 260 cannot be fixed to the first circuit board 230 because the distance between the top of the diaphragm and the first circuit board is restricted. That is, if the outer pipe body 261 is placed under the first circuit board 230 so as to securely couple the elastic terminals 260 to the first circuit board 230, the distance between the strain gauges 222 and the first circuit board 230 is excessively increased due to the length of the outer pipe body 261 protruding from the lower end of the first circuit board 230, with the result that welded portions of the wires may not be stably maintained during a designed life span.
In the known pressure sensor, therefore, the first circuit board having the Wheatstone bridge circuit and the second circuit board having a circuit device are separated from each other where the second circuit board is disposed above the first circuit board, and the upper and lower circuit boards are connected to each other using the elastic terminals, due to a restricted area of the pressure sensor.
Since the elastic terminals are used in the known pressure sensor, the distance between the first and second circuit boards is increased so as to provide a space necessary for the elastic terminals to expand and contract, with the result that the vertical length of the pressure sensor is increased.
Also, each of the elastic terminals includes a plurality of components, such as the outer pipe body, the inner pipe body, and the spring, such that the result that assembly efficiency is lowered, and manufacturing costs are increased.


An installation for increasing the scanning range along the axial direction of the light source. The installation includes a light source and a transparent glass panel. The light source provides a light beam necessary for scanning a document. The transparent glass panel has a coating thereon for lowering light transparency near the mid-portion of the light axis relative to either end.

1. Field of Invention
The present invention relates to an installation for increasing a scanning range of a scanner. More particularly, the present invention relates to an installation for increasing a scanning range of a scanner along an axial direction of a light source.
2. Description of Related Art
In general, a scanning system can be roughly classified as a reflective type or a light-penetrating type. In the reflective scanning system, a document is placed over a transparent glass panel. Light from a light source travels through the transparent glass panel and hits the document. The light is reflected back from the document to reach an optical sensor after passing through a set of optical elements. The optical sensor, for example, can be a charge couple device (CCD) where a scan image is formed. In the light-passing scanning system, the document is also placed on top of a transparent glass panel. However, light from a light source has to pass through the document, the transparent glass panel and a set of optical elements before arriving at the optical sensor.
Hence, both the reflective and the transparent type of scanning system operate on similar principles. In the reflective scanning system, brightness variation of the reflected light from a document is gauged to form an image. On the other hand, in the transparency scanning system, brightness variation of light after passing through the document is gauged to form an image.
However, the brightness level along a conventional longitudinal lamp tube, in other words, along the light axis of a light source, is brightest in the middle and dimmer on either side. Hence, the image produced by the light source will also be brighter in the middle than either side. Since a scanner works according to variation in brightness level, capacity for detecting brightness contrast near the two end sections of the light axis is lower. If the variation in brightness level along the axial direction of the light source is large, quality of a scan image near the edges of the light axis may deteriorate. Therefore, variation of brightness level along the light axis of a light source is an important parameter in document scanning.
In brief, the lesser the variation of brightness level along the light axis, the better will be the scanning range of the light source and the effective contrast of the document.

Installation for increasing a scanning range of a scanner along an axial direction of a light source


A system and method for determining location information of a portable device relative to an object is provided. In one embodiment, a booking control system is provided for booking a resource or service associated with the object. The system and method may determine location information with respect to the portable device, and identify the user as checked-in or checked-out (e.g., the resource is in-use or out of use) based on the location information.

Real-time location or position determinations for objects have become increasingly prevalent across a wide spectrum of applications. Real-time locating systems (RTLS) are used and relied on for tracking objects, such as portable devices, in many realms including, for example, automotive, storage, retail, security access for authentication, and security access for authorization.
One conventional RTLS in the automotive realm includes a transceiver or master controller located within a vehicle and capable of communicating via radio frequency (RF) with a portable device. One or more aspects of the communications between the master controller and the portable device, such as signal strength of the communications, angle of arrival, time of flight, and/or others, may be monitored and used as a basis for determining a location of the portable device relative to the vehicle. For instance, if the signal strength of communications is low, the portable device may be farther away from the vehicle relative to communications where the signal strength is high. In general, the strength of communications drops off as the distance increases between the portable device and the vehicle. For instance, the angle of signals may be measured by one or more antennas, from which the position of the portable device may be determined using angulation (such as triangulation) or other techniques (which side of the antenna, machine learning, etc.). For instance, the time of flight of signals may be measured by one or more antennas, from which the distance of a portable device may be determined. In general, the time of flight increases as the distance increases between the portable device and the vehicle. Based on this or other measurements of a signal characteristic of communications, a location of the portable device may be determined.

System and method of determining real-time location


Embodiments of the invention prevent a decrease in magnetization or demagnetization from occurring to recording magnetization regardless of a direction in which a stray field is applied. In one embodiment, an apparatus for data storage system comprises a head having a magnetic field shield in the vicinity of a main pole, and a cover of the device, using a constituent material with a magnetic field shielding effect, across the cover, or at part thereof. When a stray field in a direction perpendicular to a recording medium is applied, the effect of the magnetic field is alleviated by the magnetic field shield installed in the vicinity of the main pole. In such a case, it need only be sufficient to form the magnetic field shield in a shape optimum for removing the stray field in the perpendicular direction only. When a stray field in a direction horizontal in relation to the recording medium is applied, the magnetic field acting on the recording medium is removed by the cover of the device comprising a magnetic component.

The present invention relates to an apparatus for data storage system for recording signals as magnetization in the direction of thickness of a magnetic recording medium, and magnetically reading the signals.
The conventional recording technology is described hereinafter by taking an example of a perpendicular magnetic hard-disk drive. The perpendicular magnetic hard-disk drive refers to a magnetic hard-disk drive comprising a perpendicular recording medium, a read-write head, and so forth, for executing read-write by means of a perpendicular magnetic recording system. The perpendicular magnetic recording system is a system in which recording magnetization is formed in the direction of thickness of a medium in contrast to the conventional longitudinal recording system.
In FIG. 13, a perpendicular recording medium 13 has a recording layer 131 having magnetic anisotropy in the direction of thickness thereof. There are a single-layer recording medium having the recording layer 131 only, and a multilayer recording medium having a soft under layer 132 between the recording layer 131 and a board 133 (the recording medium hereinafter refers to the multilayer recording medium unless explicitly described otherwise). The recording layer 131 is made up of a perpendicularly magnetized film having high coercivity in order to retain information, and the soft under layer 132 has a property of undergoing magnetization when a magnetic field is applied thereto while reverting to a non-magnetized state when the magnetic field is removed. For a read-write head 140, use is generally made of a read-write-separation type head, comprising a recording element and a reading element. The recording element includes a ring type head in a ring-like shape, provided with a gap in a part thereof, for executing recording with a leakage magnetic field from the gap, for use in the longitudinal recording system as well, and a single pole type (SPT) magnetic head comprising a main pole, and an auxiliary pole (a write head hereinafter referred to as the SPT magnetic head unless explicitly described otherwise). Further, for the reading element, use is made of a magneto-resistive (MR) head capable of detecting changes in a magnetic field as changes in resistance.
Now, taking an example of a case where the SPT magnetic head 140 is combined with the multilayer recording medium 13, recording operation is broadly described hereinafter. A main pole 141 is magnetized by a magnetic field generated by a current flowing through coils 143 wound around the upper part of the recording element. Because an area of the tip of the main pole, facing the medium, is small, magnetic fluxes 50 converge thereon, so that a very large magnetic field is generated directly underneath the main pole, thereby effecting recording. The magnetic field penetrating through the recording layer 131 magnetizes the soft under layer 132. Meanwhile, an auxiliary pole 142 is magnetized by the magnetic field generated by the coils, in a direction opposite from the direction of the main pole 141, however, because an area of the tip of the auxiliary pole 142 is large, a magnetic field generated is small, and no recording is implemented. However, since the magnetic field in the direction opposite from the direction of the main pole is produced in the soft under layer, directly underneath the auxiliary pole, a magnetic field joining a portion of the soft under layer, directly underneath the main pole, with the portion thereof, directly underneath the auxiliary pole is formed in the soft under layer. At this point in time, a recording magnetic field 50 constitutes a path leading from the main pole to the auxiliary pole via the soft under layer. The MR head is provided with a MR element 146 sandwiched between upper and lower read shields 144, 145.
As shown in FIG. 14, in the case where a stray field 51 in a direction perpendicular to the surface of a medium is applied to such a recording system as described, the stray field 51 passes through the main pole, and the auxiliary pole. In such a case, because of the structure of the main pole 141, the stray field converges (511) on the tip of the main pole, so that there can occur a case where a magnetic field so strong as to cause decrease or demagnetization to occur to recording magnetization of the recording layer 131 is produced even when the stray field 51 applied from outside is weak. This is a phenomenon called decrease in recording magnetization or demagnetization of recording magnetization by the agency of a stray field. If this phenomenon occurs, not only recorded information is lost, but also even a servo-mark and identification signals for tracks and sectors are lost in the extreme case, thereby raising a possibility of causing interference with operation of a hard disk drive (HDD) itself.
There have been long recognized problems occurring when a stray field in a direction perpendicular to a recording medium is applied. With reference to the problems, a method of increasing resistance to a stray field by disposing a member having a magnetic shielding effect in a plane region of a HDD case opposite to a moving range of a magnetic head, and in side-face regions thereof connected to the plane region, has been disclosed in, for example, JP-A No. 77266/2003. Further, a technology whereby a member having a magnetic shielding effect is used not only in a moving range of a magnetic head but also on the whole surface of a HDD case has been disclosed in JP-A No. 95177/2004. In JP-A No. 197619/2002, there has been disclosed a technology for shielding a stray field by covering a main pole of a SPT magnetic head with a member having a magnetic shielding effect. In JP-A No. 47110/2004, there has been disclosed a method for shielding a stray field by covering a medium with a magnetic component in a shape resembling the letter U, disposed on a side of a spindle, opposite from a head. Further, other technologies have been disclosed in JP-A No. 210826/1993, JP-A No. 307002/1995, JP-A No. 84120/1994, and JP-A No. 45008/2003, respectively.

Perpendicular hard disk drive resistive against external magnetic field

Hitachi Global Storage Technologies Netherlands B.V.


An example grip safety interlock can include a lower receiver with a trigger assembly, a safety selector having a detent channel, a grip having an internal recess, an extended detent pin having a detent point and an interference abutment surface, a grip safety lever having an interference ledge, and a lever bias spring positioned within the grip, extending between the grip and the grip safety lever. The grip safety lever can be positioned to pivot within the internal recess of the grip, and the extended detent pin can extend within the grip such that the detent point contacts the detent channel of the safety selector. The lever bias spring can push the grip safety lever to a first pivot position such that the interference ledge of the grip safety lever abuts the interference abutment surface of the extended detent pin to prevent movement and rotation of the safety selector.

A firearm safety is a mechanism to help prevent accidental discharge of the firearm. A number of different types of safety mechanisms are used in different firearms, including internal, external, automatic, and manual types of safety mechanisms, among others. A relatively common type of external, manual safety relies upon a user toggling a lever or button between "safe" and "fire" positions or orientations. In the "safe" position, a mechanical interference of the safety prevents motion of the trigger mechanism and discharge of the firearm. Safety mechanisms provide an important feature in firearms, and users rely upon robust, consistent results from safety mechanisms.


The instant disclosure relates to a planar heat dissipation structure, which comprises a first electrically insulating and thermally conductive layer having a thermal conductivity coefficient greater than 0.5 W/mK and a metal layer chemically bonded to and in thermal contact with the first electrically insulating and thermally conductive layer. The planar heat dissipation structure forms a one-piece structure that is configurable from a substantially planar collapsed state to a folded three-dimensional state, and defines a base portion and at least one flap portion configured to be foldable with respect to the base portion thereon, such that the first electrically insulating and thermally conductive layer constitutes an inner surface of the planar heat dissipation structure to define a covering space. The instant disclosure also discloses an electronic device that utilizes said foldable planar heat dissipation structure.

1. Field of the Invention
The instant disclosure relates to a planar heat dissipation structure; in particular, to a foldable planar heat dissipation structure that is easy to store and transport when in a default two-dimensional collapsed state, and capable of being folded to create a three-dimensional heat dissipation structure that evenly, rapidly cools down circuit boards/electrical components in an electronic device. The instant disclosure also relates to an electronic device that utilizes said foldable planar heat dissipation structure.
2. Description of Related Art
Adapters and power supply devices are essential electronic devices for the operation of various electrical appliances and equipment. Such electronic devices may have many electrical components disposed on the circuit board therein. These electrical components not only include components of high power consumption such as transformers, metal-oxide-semiconductor field effect transistors (MOSFET), diodes and inductors, but also include components of low power consumption such as capacitors and resistors. When the electronic device is at work, if the heat generated by the electrical components therein cannot be dissipated effectively, the heat will be accumulated in the electronic device and causes the temperature of the electrical components to rise. Once the temperature of the electrical components gets too high, the electrical components may operate abnormally or even burnt out.
Take an adapter for example, it is used to convert an external voltage into the voltage required by an electronic appliance such as a portable computer. However, as the size of the adapter becomes smaller as electrical components therein become further integrated, heat dissipation has become a more serious problem.
For example, the casing of a conventional adapter is made of plastic. Because the material of plastic is unfavorable for heat dissipation, when the heat generated by the electrical components on the circuit board is transferred to the casing, the temperature on the regions of the casing corresponding to the components of high power consumption is usually higher than the temperatures on other regions of the casing. The high temperature at a specific region of the casing may cause a user to feel uncomfortable or even get burnt. Furthermore, the heat dissipation efficiency of the casing will be reduced because the heat is concentrated at the specific region of the casing.
Furthermore, as the size of electronic devices become shrinks, the space inside the electronic device reduces. Deducting the space required for electrical components inside the electronic device, the remaining space available for a heat dissipation structure is further limited. Therefore, it is more difficult to design the heat dissipation structure in such a limited space.
In summary, a better solution is needed to provide an improved heat dissipation structure that effectively evens the temperature distribution in an electronic device, occupies minimum interior space, has higher manufacturing efficiency, and is easy to store and transport.

Planar heat dissipation structure and electronic device utilizing the same


This invention includes methods of forming conductive lines, and methods of forming conductive contacts adjacent conductive lines. In one implementation, a method of forming a conductive line includes forming a conductive line within an elongated trench within first insulative material over a semiconductive substrate. The conductive line is laterally spaced from opposing first insulative material sidewall surfaces of the trench. The conductive line includes a second conductive material received over a different first conductive material. The second conductive material is recessed relative to an elevationally outer surface of the first insulative material proximate the trench. A second insulative material different from the first insulative material is formed within the trench over a top surface of the conductive line and within laterally opposing spaces received between the first insulative material and the conductive line. In one implementation, a conductive contact is formed adjacent to and insulated from the conductive line.

Integrated circuits are typically formed on a semiconductor substrate, such as a silicon wafer or other semiconductive material. In general, layers of various materials which are either semiconducting, conducting or insulating, are utilized to form the integrated circuits. By way of example, various materials are doped, ion implanted, deposited, etched, grown, etc. using various processes. A continuing goal in semiconductor processing is to reduce the size of individual electronic components, thereby enabling smaller and denser integrated circuitry.
One type of integrated circuitry comprises memory circuitry, for example dynamic random access memory (DRAM). Such comprises an array of memory cells where individual cells include a transistor and a capacitor. The capacitor electrically connects with one of the source/drain regions of the transistor and a bit or a digit line electrically connects with the other of the source/drain regions of the transistor. DRAM circuitry might be constructed such that the capacitors are elevationally higher within the substrate than the bit line (buried bit line construction), or alternately with the bit line fabricated elevationally higher or outwardly of the capacitor (bit line-over-capacitor construction). The invention was principally motivated in addressing issues associated with buried bit line memory circuitry, although the invention is in no way so limited, nor is it limited to memory integrated circuitry. Rather, the invention is limited only by the accompanying claims as literally worded without interpretative or limiting reference to the specification and drawings herein, and in accordance with the doctrine of equivalents.

Method of forming a conductive line and a method of forming a conductive contact adjacent to and insulated from a conductive line


An embodiment of an apparatus for estimating a parameter includes a light source configured to emit an optical signal, and an interferometer including a first reflector assembly having at least one reflective surface and a second reflector assembly having a plurality of individual reflective surfaces facing the at least one reflective surface. At least one of the first reflective assembly and the second reflector assembly is moveable in response to a stimulus, the plurality of individual reflective surfaces disposed at a fixed location relative to each other, each individual reflective surface defining a different optical cavity length relative to the first reflector assembly.

In exploration for hydrocarbons, knowledge of properties of earth formations is important for being able to locate and characterize reservoirs of oil and gas. Measuring properties of earth formations, such as the location and properties of various structures, allows for the identification of such reservoirs, their potential for hydrocarbon production, and optimization of production techniques.
Optical interferometers are used in a variety of applications in the energy industry. Interferometers can be incorporated in downhole tools to measure properties such as fluid pressure, gravity and vibration. For example, gravitational measurements are performed to measure formation properties such as rock type and evaluate potential hydrocarbon reservoirs.

Displacement measurements using a multi-cavity sensor


A method of packaging an integrated circuit die (12) includes the steps of loading an array of soft conductive balls into recesses formed in a platen and locating the platen in a first part of a mold cavity. A second part of the mold is pressed against the balls to flatten a surface of the balls. A first mold compound then is injected into the mold cavity such that the mold compound surrounds exposed portions of the balls. The balls are removed from the platen and a first side of an integrated circuit die is attached to the balls such that the die is surrounded by the balls. Die bonding pads on a second side of the die are electrically connected to respective ones of the balls surrounding the die, and then the die, the electrical connections, and a top portion of the conductive balls is encapsulated with a second mold compound. The result is an encapsulated IC having a bottom side with exposed balls.

The present invention relates to integrated circuit packaging, and more particularly to an improved process for fabricating a Ball Grid Array (BGA) packaged device.
An integrated circuit (IC) die is a small device formed on a semiconductor wafer, such as a silicon wafer. A leadframe is a metal frame that usually includes a paddle that supports the IC die that has been cut from the wafer. The leadframe also has lead fingers that provide external electrical connections. That is, the die is attached to the die paddle and then bonding pads of the die are connected to the lead fingers via wire bonding or flip chip bumping to provide the external electrical connections. Encapsulating the die and wire bonds or flip chip bumps with a protective material forms a package. Depending on the package type, the external electrical connections may be used as-is, such as in a Thin Small Outline Package (TSOP), or further processed, such as by attaching spherical solder balls for a BGA. These terminal points allow the die to be electrically connected with other circuits, such as on a printed circuit board. However, it can be expensive and time-consuming to form a leadframe and package a device if steps like chemical etching and etch back are required.
Thus, it would be desirable to eliminate such etching steps, and further, to eliminate the need for the leadframe. It is desirable to have a method of decreasing the size of packaged ICs too.

Packaged device and method of forming same


A measurement device includes a first obtaining unit configured to obtain a first power ratio that indicates a ratio of optical signal power of a first wavelength in a first spectrum at a reception device to optical signal power of a second wavelength different from the first wavelength in the first spectrum; a second obtaining unit configured to obtain a second power ratio that indicates a ratio of optical signal power of the first wavelength in a second spectrum at a transmission device to optical signal power of the second wavelength in the second spectrum; a calculation unit configured to calculate an OSNR of the optical signal at the reception device using the first power ratio obtained by the first obtaining unit and the second power ratio obtained by the second obtaining unit; and an output unit configured to output the OSNR calculated by the calculation unit.

In related arts, a technology is known by which an optical signal-to-noise ratio (OSNR) is analyzed based on an optical signal received by a transfer device in an optical network in order to detect malfunction and failure. For example, there is a technology in which filtering is performed, by a narrow band optical filter, on an optical signal on which superimposition of AM modulation is performed in the vicinity of the signal central wavelength and at a point that is shifted from the signal center wavelength by a certain wavelength portion, and an OSNR is measured from a ratio of a direct current (DC) component to an alternating current (AC) component after photoelectric conversion (for example, United State Patent Application Publication No. 2012/0106951). In addition, there is a technology in which an OSNR is measured from a ratio of peak power to trough power in light that is permeated through an optical filter having a certain permeation characteristic (for example, X. Liu, et al. "OSNR Monitoring Method for OOK and DPSK Based on Optical Delay Interferometer", IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 19, NO. 15, Aug. 1, 2007, Pp. 1172-1174).
However, in the above-described related arts, a configuration for measuring an OSNR is complicated.

Measurement device, measurement method, transfer device, and optical network


An apparatus includes an input port, an output port, a first bias input, a first shunt PIN diode, a first radio frequency (RF) choke inductor, and a first direct current (DC) blocking capacitor. The input port may be connected to the output port, a first terminal of the first shunt PIN diode, and a first terminal of the first RF choke inductor. A second terminal of the first RF choke inductor is connected to a first terminal of the first DC blocking capacitor and the first bias input. A second terminal of the first shunt PIN diode and a second terminal of the first DC blocking capacitor are connected to a circuit ground potential. A first bias voltage having a magnitude lower than a knee voltage of the first shunt PIN diode is applied at the first bias input.

Limiters are most commonly used in radar systems and front-end modules of radio frequency transceivers where both the transmitter and the receiver are tuned to approximately the same frequency. In both of these systems, the receiver part needs to be highly sensitive to reliably detect and amplify very weak incident signals, and, therefore, will likely be damaged by even a small portion of the transmitted power leaking through or being reflected back to the receiver.
In conventional systems, a passive PIN diode reflective limiter device is used on the front end to protect the receiver components. The response of such a passive limiter is not ideal and the leakage characteristics (flat and spike leakage) as well as the 1 dB compression (P1dB) threshold are intimately related to the physics of the PIN diode, the diode geometry and the frequency of the input signal. The flat and spike leakage characteristics as well as the threshold level of the limiter are key characteristics of a limiter as they determine the level of isolation that can be provided to protect a receiver.
Previous efforts to lower the leakage characteristics of reflective PIN diode limiter devices have included the development of PIN diodes on a thinner epitaxial I-layer. The thinner the I-layer, the lower the leakage characteristics. However, when thinning the epitaxial I-layer, the off-state diode capacitance increases significantly, resulting in limiter devices of higher insertion loss and limited bandwidth. Thinning the epitaxial I-layer also results in lower power handling capacity.
Alternative efforts to lower the leakage characteristics while maintaining the power handling capacity involve the development of multi-stage limiters. For a two-stage limiter, the first (input) stage uses a large diode to provide the coarse level of isolation with the desired power handling capability while the second (output) stage, commonly referred to as the clean-up stage, uses a smaller diode to provide the remaining level of isolation with the desired low leakage and threshold level. If the limiter is required to handle a very large input signal, a third stage with a larger diode may be added to the input. For proper operation, the limiting diodes of a multi-stage limiter need to be placed one quarter wavelength (λ/4) from each other resulting in a relatively large and expensive circuit.
Hybrid limiters usually benefit from both approaches with the coarse limiting diode(s) being developed on a thick epitaxial I-layer for better power handling capability, while the clean-up diode is developed on a thinner epitaxial I-layer for lower flat leakage and P1dB threshold level. Hybrid technology however has the disadvantage of very large device size and high cost.
Monolithic microwave integrated circuit (MMIC) limiters can be highly integrated and low cost, but all limiting diodes of the circuit need to be implemented on the same epitaxial I-layer thickness, resulting in overall lower performance than hybrid limiters. For those limiters, a trade-off has to be made between insertion loss, bandwidth, power handling capability, flat leakage, and P1dB threshold level.
With the current diode technology capability, the thinnest thickness of epitaxial I-layer that can be implemented with good reliability is 1 μm. For MMIC passive limiters, the best trade-off between small-signal characteristics and power characteristics results in an epitaxial I-layer thickness of 2 μm.
For a given diode, the improvement on the flat leakage characteristics from 3 μm I-layer thickness to 2 μm I-layer thickness is only on the order of 1 dB to 1.5 dB. However, the off-state diode capacitance increases by 50%, resulting in significant degradation of the reflective limiter small-signal performances (e.g., insertion loss, return losses, and/or bandwidth).
It would be desirable to implement a PIN diode bias scheme to improve leakage characteristics and PldB threshold level of a reflective limiter device without significant degradation of the small-signal performance.

PIN diode bias scheme to improve leakage characteristics and P1dB threshold level of reflective limiter device

MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.


A magnetic metallic glass alloy exhibits, in combination, high saturation induction and high Curie temperature. The alloy has a composition described by the formula Fe.sub.a Co.sub.b Ni.sub.c B.sub.d Si.sub.e C.sub.f, where "a"- "f" are in atom percent, "a" ranges from about 75 to about 81, "b" ranges from 0 to about 6, "c" ranges from about 2 to about 6, "d" ranges from about 11 to about 16, "e" ranges from 0 to about 4, and "f" ranges from 0 to about 4, with the provisos that (i) the sum of "b" and "c" may not be greater than about 8, (ii) "d" may not be greater than about 14 when "b" is zero, (iii) "e" may be zero only when "b" is greater than zero, and (iv) "f" is zero when "e" is zero. This alloy is suitable for use in large magnetic cores used in various applications requiring high magnetization rates, and in the cores of line frequency power distribution transformers, airborne transformers, current transsformers, ground fault interrupters, switch-mode power supplies, and the like.

1. Field of the Invention
This invention relates to iron-rich metallic glass alloys having the combination of high saturation induction and high Curie temperatures, which results in superior soft ferromagnetic properties.
2. Description of the Prior Art
Glassy metal alloys (metallic glasses) are metastable materials lacking any long range order. They are conveniently prepared by rapid quenching from the melt using processing techniques that are conventional in the art. Examples of such metallic glasses and methods for their manufacture are disclosed in U.S. Pat. Nos. 3,856,513, 4,067,732 and 4,142,571. The advantageous soft magnetic characteristics of metallic glasses, as disclosed in these patents, have been exploited in their wide use as materials in a variety of magnetic cores, such as in distribution transformers, switch-mode power supplies, tape recording heads and the like.
Applications for soft magnetic cores, in a particular class now receiving increased attention, are generically referred to as pulse power applications. In these applications, a low average power input, with a long acquisition time, is converted to an output that has high peak power delivered in a short transfer time. In the production of such high power pulses of electrical energy, very fast magnetization reversals, ranging up to 100 T/.mu.s, occur in the core materials. Examples of pulse power applications include saturable reactors for magnetic pulse compression and for protection of circuit elements during turn on, and pulse transformers in linear induction particle accelerators.
Metallic glasses are very well suited for pulse power applications because of their high resistivities and thin ribbon geometry, which allow low losses under fast magnetization reversals. (See, for example, (i) "Metallic Glasses in High-Energy Pulsed-Power Systems", by C. H. Smith, in Glass . . . Current Issues, A. F. Wright and J. Dupuy, eds., (NATO ASI Series E, No. 92, Martinus Nijhoff Pub., Dordrecht, The Netherlands, 1985) pp. 188-199.) Furthermore, metallic glasses, due to their non-crystalline nature, bear no magneto-crystalline anisotropy and, consequently, may be annealed to deliver very large flux swings, with values approaching the theoretical maximum value of twice the saturation induction of the material, under rapid magnetization rates. These advantageous aspects of metallic glass materials have led to their use as core materials in various pulse power applications: in high power pulse sources for linear induction particle accelerators, as induction modules for coupling energy from the pulse source to the beam of these accelerators, as magnetic switches in power generators for inertial confinement fusion research, and in magnetic modulators for driving excimer lasers.
Reference has been made to annealed samples in the discussion above. It is a well known fact in the art that metallic glasses have to be subjected to anneals (or, synonymously, heat treatments), usually in the presence of external magnetic fields imposed on the materials, before they display their excellent soft magnetic characteristics. The reason for these required anneals is that as-cast ribbons of metallic glasses tend to have high quenching stresses, resulting from the very rapid cooling rates employed to cast these materials. In the case of ferromagnetic metallic glasses, these stresses lead to a distribution of stress-induced magnetic anisotropy, which, in turn, tends to mask the true soft ferromagnetic properties realizable from these materials. To remedy this situation, metallic glasses must be annealed at suitably chosen temperatures, for appropriate time intervals, whereby the quenching stresses are relaxed while the glassy structure of these materials is preserved.
The purpose of the externally imposed fields during anneals is to induce a magnetic anisotropy, i.e., a preferred direction of magnetization. Accordingly, the anneal temperatures are chosen to be very close to the Curie temperatures of the materials, so that small, and practical, strengths (up to about 1600 A/m) may be used for the external fields. Since the beneficial effects due to annealing, such as stress relaxation, are a result of kinetic processes, a higher Curie temperature in the material allows for high anneal temperatures and therefore, shorter anneal times. Furthermore, a low anneal temperature with a longer anneal time may yet not fully relax the stresses, and a preferred anisotropy direction may not be fully established.
Another advantage of a higher Curie temperature in a ferromagnetic material is that the rate of reduction of the saturation induction with temperature is reduced, so that higher induction levels are available in the material at given device operating temperatures or, for a given induction level, the material may be driven to higher operating temperatures.
Most pulse power applications require a high saturation induction in the core material, which leads to large flux swings in the core. The core material should, preferably, also possess a low induced magnetic anisotropy energy. A low magnetic anisotropy energy leads to lower core losses, by facilitating the establishment of an optimal ferromagnetic domain structure, and therefore allows the cores to operate with greater efficiency.
High saturation induction levels are necessary in other applications for metallic glasses as well. Requirements for miniaturization of electronic components in, say, switch-mode power supplies, will be met by higher saturation induction levels, and line frequency distribution transformers may be designed to operate at higher induction levels.
METGLAS.RTM. 2605CO (nominal composition: Fe.sub.66 Co.sub.18 B.sub.15 Si.sub.l), available from Allied-Signal Inc., is a high induction metallic glass alloy currently used in many of the pulse power applications recited above. This metallic glass is disclosed in U.S. Pat. No. 4,321,090, wherein metallic glasses having a high saturation induction are disclosed. The saturation induction of this glassy alloy, in the annealed state, is about 1.8 T. However, the high cobalt content in this alloy imparts a high value for the magnetic anisotropy energy and, consequently, high core losses. The value of about 900 J/m.sup.3 for the magnetic anisotropy energy in this alloy is among the highest obtained in metallic glasses. In spite of its high induction, a maximum flux swing of only about 3.2 T is attainable from this alloy. Furthermore, the high Co content in this alloy leads to high raw material costs. Considering that cores used in pulse power applications may contain as much as 1000 kg of core material per core, and considering that Co had been classified as a strategic material, a more economical alloy containing substantially reduced levels of Co is highly desirable.
A metallic glass alloy that contains no cobalt is METGLAS.RTM. 2605SC (nominal composition: Fe.sub.81 B.sub.13.5 Si.sub.3.5 C.sub.2), available from Allied-Signal Inc. This alloy is disclosed in U.S. Pat. No. 4,219,355. The low magnetic anisotropy energy (about 100 J/m.sup.3) of this alloy has been exploited in a variety of applications, including certain pulse power applications. However, this alloy has a lower saturation induction (about 1.6 T in the annealed state) and a relatively low Curie temperature of about 620 K, when compared to other Fe-B-Si metallic glasses in the prior art.
A metallic glass alloy that offers a combination of high saturation induction, high Curie temperature and low anisotropy energy would be highly desirable for the purposes of many applications. An additional advantage would be derived if such an alloy were to offer economy in production costs.

Iron-rich metallic glasses having high saturation induction and superior soft ferromagnetic properties


A semiconductor-laser-pumped solid-state laser apparatus having a semiconductor laser device, a solid state laser medium, and laser resonators. The semiconductor laser device has a plurality of emission points which are arranged on a straight line and from which pump light is generated. The laser resonators are disposed in correspondence with the emission points. A plurality of solid state laser beams can be generated by using one solid state laser medium.

1. Field of the Invention
This invention relates to a semiconductor-laser-pumped solid-state laser and, more particularly, to a semiconductor-laser-pumped solid-state laser capable of generating a plurality of beams of laser light.
2. Description of the Related Art
FIG. 19 and 20 are a schematic plan view and a schematic side view of a semiconductor-laser-pumped solid-state laser apparatus in which a semiconductor laser element is disposed close to a laser medium having a small sectional area, and which is known, for example, as one described in "Laser Kenkyu" Vol. 18, No. 8 (1990) pp. 622-627. In the semiconductor-laser--pumped solid-state laser apparatus shown in FIGS. 19 and 20, a semiconductor laser device 1 generates pump light 2 which enters a solid state laser medium 3. For example, the solid state laser medium 3 is formed of a Nd:YAG (Y.sub.3-x Nd.sub.x Al.sub.5 O.sub.12) crystal having a length of 5 mm, a width of 2 mm and a thickness of 0.5 mm and having a rectangular cross-section. A coating which is nonreflective with respect to pump light 2 but is totally reflective with respect to laser light 4 is formed on a pump light incidence end surface 3a of the solid state laser medium 3, while a coating which is non-reflective with respect to laser light 4 is formed on an end surface 3b of the solid state laser medium 3. A partial reflection mirror 5 is disposed so as to face the end surface 3b of the solid state laser medium 3.
The operation of this semiconductor-laser-pumped solid-state laser apparatus will be described below. Pump light 2 enters the solid state laser medium 3 through the pump light incidence end surface 3a. Pump light 2 in the perpendicular direction is repeatedly reflected by upper and lower surfaces 3c of the solid state laser medium 3 and is absorbed by the solid state laser medium 3 while being confined in this medium. The solid state laser medium 3 is thereby pumped effectively. In the meantime, there is no need to confine the pump light 2 in the parallel direction because the beam divergence in this direction is comparatively small. Light spreading out perpendicularly to the semiconductor laser active layer is reflected by the upper and lower surfaces 3c, so that the light pump region in the solid laser medium 3 has a size of about 0.5 mm in each of the perpendicular and parallel directions with respect to the semiconductor laser active layer. A stable laser resonator is formed by the pump light incidence end surface 3a and the partial reflection mirror 5. For example, if the pump light incidence surface 3 a is flat, the radius of curvature of the partial reflection mirror 5 is 2500 mm, and the length of the resonator is 10 mm, then a beam of laser light 4 having a diameter of about 0.35 mm in a fundamental mode (Gaussian mode) is oscillated.
In the conventional semiconductor-laser-pumped solid-state laser apparatus, however, only one laser beam can be obtained from one laser device, and it is necessary to prepare a plurality of laser devices if a plurality of independent laser beams are required.

Semiconductor laser-pumped solid-state laser with plural beam output


The present invention discloses a method and apparatus for a projection system using a solid-state light source and a color wheel. A set of primary light sources (such as RGB light source) with a light source controller is utilized to replace the UHP lamp. The color wheel has multiple color filter segments that are sequentially disposed on the path of the light when the wheel rotates. Based on a sync signal received from the rotating color wheel, the light source controller sequentially turns the primary light sources on and off in accordance with the sequence of the color filter segments of the color wheel. During each of the spoke periods, to generate a varying mixture of the two color lights, at least two primary color light sources are turned on simultaneously.

1. Field of the Invention
This invention relates to lighting and display devices, and in particular, it relates to a light source device and projection system using the light source device.
2. Description of the Related Art
In a conventional projection system, three single-color images are projected onto a screen to form a single full-color image by integration effect of viewer's eye. Three separated modulators are often used to simultaneously modulate three primary-color images. For example, the light from a white light source is separated by a set of appropriate dichroic filters into three single-color lights, which are modulated respectively by three separated liquid crystal display (LCD) panels or three digital micromirror device (DMD) to generate three primary images. Alternatively, a single modulator with sequential color light could sequentially generate primary-color images. If the color light sequences through the three primary colors are fast enough, the viewer will not see the sequential color images but instead will see a full-color image. A sequential color light source is formed by combining a white light source and a filter means such as color filter.
A color wheel is typically a disk-shaped assembly of dichroic filters. The light comes from the white light is focused on the color wheel and filters, which are transmissive or reflective, to filter the input white light into single color lights. At least one color filter is included for each of primary color segment. FIG. 1 shows the transmission spectra of the three filters of a color wheel. The locations of the color wheel and the light source are relatively fixed so that the focus point of the white light on the color wheel is stationary. Spinning the color wheel so that each of the filters passes through the point at which the white light strikes the wheel generates a sequential primary-color light beam. The color wheel is typically spun fast enough to provide at least one primary color for each primary in each frame of a video image to avoid the detection of the sequential color nature on the screen by the viewer.
While a sequential color display system typically costs less than a simultaneous color system, images created by a sequential filtered color display system are not as bright as images created by simultaneous color display systems using the same light source. This is because at any given time only a portion the light generated by the light source is used to form the image. Additionally, when a sequential filter such as color wheel is used, the light during the filter transitions, typically called spoke light, will be a varying mixture of the two filters being changed in and out. This mixed-color light cannot be used by the same way of the pure color light since using the mixed color light would adversely affect the color purity of the created image.
A solution to the spoke light is to turn off the modulator during the spoke period, which refers to the time period of the filter transition. When the spoke period is turned off, light from the color wheel still passes to the light modulator, but just isn't used to contribute to the image brightness. Because the total spoke periods often take a proportion of 10%˜20% of each frame period, turning off the spoke period will result in a dramatic degradation of brightness.
Several methods and apparatuses are presented to solve this problem. Patent U.S. Pat. No. 6,324,006 disclosed a method to utilize the spoke period for each pixel by different spoke-bit to keep the image artifacts below a perceptible threshold. US 2005168454 disclosed another method in which some of the spoke period could be used to contribute to the image when the color wheel in this system includes at least one neutral density (ND) segment. US 2006192734 disclosed another method to turn on the spoke periods while at least one primary-color is controlled to be decreased to compensate the chromatic artifact duo to the spoke period light.
These prior art display systems and methods have been used to maximize the image brightness by spoke light recapture (SLR) mechanism. The white-light source they used, however, is usually a UHP lamp, which typically has a short lifetime of 3000 hours. Additionally, the UHP lamp contains mercury which is not environmental-friendly. Solid-state light sources are developed in recent years, which have a long lifetime of more than 50000 hours, and contain no harmful ingredients. Therefore, Solid-state light sources such as light emitting diode (LED) can potentially replace UHP lamps.
As mentioned above in a single-modulator system a sequential color light source is required to sequentially generate three primary-color images. Different from the architecture of combination of white-light source and color wheel, three single-color solid-state light sources, such as red, green and blue LED sources, are combined by a set of dichroic filters in wavelength domain to act as a full-band light source. FIG. 3 illustrates a schematic view of single-modulator projection display system which makes use of solid-state light sources as an illuminator.
In FIG. 3, reference symbols 501, 502 and 503 refer to red (R), green (G) and blue (B) LED sources respectively. Dichroic filter 504 is transmissive to green and red light and reflective to blue light, while another dichroic filter 505 is transmissive to green and blue light and reflective to red light. These two dichroic filters combine the three primary lights by transmitting and reflecting them to a same exit to generate a full-band light source, whose spectrum is shown in FIG. 7, in which reference symbols 1001, 1002 and 1003 refer to blue, green and red color components respectively.
In FIG. 3 the combined full-band light is collected and focused onto the modulator 506 by a set of lens to generate modulated light, which is projected by a projection lens 507 to a screen (not shown). To generate sequential color light, a controller 512 is also used to respectively control light sources 501˜503 to turn on and off in sequence, based on a sync signal from the modulator 506 through the connection 508.

Light source device and projection display method


An apparatus is improved to successively make plastic bags each of which includes an end surface provided with a spout, by employing the general feeding way of panel material, to be simple in structure, low in cost, high in speed and to make it possible to successively make the plastic bags two by two. A first folded portion is formed in a first web of panel material 1. An aperture is formed in a second web of panel material 2. A spout is inserted into the aperture, the spout and the second web of panel material 2 being heat sealed with each other. The second web of panel material 2 is guided by a guide device 18 to be folded after being heat sealed so that a second folded portion should be formed in the second web of panel material. The spout is turned over by the second folded portion. The second folded portion and the first folded portion are heat sealed with each other while the second folded portion and the second web of panel material 2 are heat sealed with each other about the spout.

There has been known and used a plastic bag including an end surface provided with a spout. Japanese Laid-Open Patent Publication No. 46082 of 2011 discloses an apparatus for successively making the plastic bags.
In the apparatus of the patent publication, first and second webs of panel material are superposed with each other and disposed along a vertical plane. The direction of length is horizontal in the first and second webs of panel material, but the direction of width is vertical. The first web of panel material is folded along a first longitudinal folded line extending adjacent to one side edge so that a first folded portion should be formed in the first web of panel material. The second web of panel material is folded along a corresponding longitudinal folded line at a position corresponding to the first longitudinal folded line. In addition, the second web of panel material is folded along a second longitudinal folded line extending between one side edge and the corresponding longitudinal folded line so that a second folded portion should be formed in the second web of panel material to be disposed along the vertical plane. Moreover, the first and second webs of panel material are fed longitudinally thereof and intermittently. A spout is inserted into an aperture formed in the second folded portion, the spout and the second folded portion being heat sealed with each other by a spout seal device, when the first and second webs of panel material are stopped temporarily. The second folded portion is then superposed with the first folded portion so that the spout should be positioned on the first longitudinal folded line and the corresponding longitudinal folded line. The second folded portion and the first folded portion are heat sealed with each other while the second folded portion and the second web of panel material are heat sealed with each other about the spout by a circumferential seal device when the first and second webs of panel material are stopped temporarily.
In the apparatus of the patent publication, a web of end surface material is formed between the other side edges of the first and second webs of panel material.
The apparatus can therefore successively make the plastic bags each of which includes the end surface formed by the second folded portion to be provided with the spout. In addition, the plastic bag includes opposite end surfaces one of which is provided with the spout. The other end surface is formed by the web of end surface material to make the plastic bag stand stably. The plastic bag is called a standing pouch.
However, the apparatus is problematic in that the first and second webs of panel material are disposed along the vertical plane and fed longitudinally thereof and intermittently. The direction of width is vertical in the first and second webs of panel material so that the first and second webs of panel material must be subject to gravity widthwise thereof. The first and second webs of panel material have therefore to be held conveniently and fed longitudinally thereof and intermittently not to misalign widthwise thereof by gravity, making the apparatus complicated in structure. In addition, the spout is inserted into the aperture with the second folded portion being disposed along the vertical plane. The spout and the second folded portion are then heat sealed with each other. The spout has therefore to be inserted sideways and then kept from dropping. The spout and the second folded portion have to be heat sealed sideways. As a result, the apparatus must to be complicated in structure to be high in cost. It is difficult to successively make the plastic bags at high speed because of structure of the apparatus.
In addition, the apparatus is arranged to successively make the plastic bags one by one. It is difficult to successively make the plastic bags two by two.
On the other hand, being not associated with the spout, Japanese Patent No. 3,655,627 discloses an apparatus for successively making plastic bags, in which first and second webs of panel material are disposed not along a vertical plane but along a horizontal plane and fed longitudinally thereof and intermittently. This feeding way of panel material is general, which has no problem of misaligning of the first and second webs of panel material by gravity. Japanese Patent Publication No. 4,402,872 also discloses an apparatus for successively making plastic bags, in which first and second webs of panel material are disposed along a horizontal plane and fed longitudinally thereof and intermittently. In the apparatus, a spout is positioned with and inserted into an aperture by difference in speed, but the plastic bag includes no end surface provided with the spout.
It is therefore an object of the invention to provide an apparatus for successively making plastic bags each of which includes an end surface provided with a spout, by employing the general feeding way of panel material, to be simple in structure, low in cost and high in speed and to make it possible to successively make the plastic bags two by two.


A unitary bearing assembly having two rows of rolling elements between a first body with internal raceways angularly diverging from each other, and a second body formed with external raceways inclined toward each other, the bearing assembly being adapted for having either body connected to a wheel or to the vehicle body as may be selected, and in which a full complement of tapered rollers can be incorporated between the internal and external raceways, and a single rib ring fixed in position on one or the other of the inner or outer bodies to fully unitize the assembly.

1. Field of the Invention
This invention is directed to unitizing and simplifying the components that go into assembly of the two-row tapered roller bearing for vehicle wheels and for other uses.
2. Description of the Prior Art
It is known in certain examples of the relevant prior art to provide vehicle wheel hubs with interfitted parts rotating relative to each other and double row ball bearings, with one of the parts designed to engage on a wheel shaft or spindle and the other part to connect up to a wheel and brake support. An early form of such an assembly is seen in U.S. Pat. No. 2,037,982 of Apr. 21, 1936. This was followed in 1968 by British Patents 1,254,552 and 1,254,553 which still adhered to a two row ball bearing hub having complicated multi-part components. The art in 1971 still continued to develop two row ball bearing hubs, as seen in U.S. Pat. Nos. 3,583,511 and 3,589,747, followed in 1973 by U.S. Pat. No. 3,774,933. All of these patents embodied multi-part assemblies which presented problems of manufacture of the parts and difficulty in obtaining adjustments because of the many parts and tolerance factors, all of which increased the cost.
The art also contains U.S. Pat. Nos. 3,420,589 of Jan. 7, 1969 and 3,578,831 of May 18, 1971 directed to a single row tapered roller bearing assembly which displayed a unitized bearing that could better withstand thrust in both directions on a shaft mounted in the bearing. The problem with this bearing is that the current thrust loads are far too great for a single row tapered roller set. Furthermore, there was at that time a problem of not being able, in going to a two row tapered roller assembly, to get a full complement of tapered rollers in each of two adjacent raceways. In addition, the prior art contains U.S. Pat. No. 3,704,498 of Dec. 5, 1972 which relates to pre-stressing a bearing rib and race prior to welding them into assembly.

Double row tapered roller bearing assembly


A lead frame for an integrated electronic device includes a die pad made of a first metallic material. A top coating layer formed by a second metallic material is arranged on a top surface of the die pad. The second metallic material has an oxidation rate lower than the first metallic material. The top coating layer leaves exposed a number of corner portions of the top surface of the die pad. A subsequent heating operation, for example occurring in connection with wirebonding, causes an oxidized layer to form on the corner portions of the top surface of the die pad at a position in contact with the top coating layer.

As is known, semiconductor devices, such as, for example, integrated circuits and MEMS devices, are encapsulated inside corresponding packages which perform functions of protection and interfacing with the outside world. For example, packages are known that enable so-called "surface mounting" on a printed-circuit board.
In greater detail, surface-mount packages include, for example, the so-called packages of a "quad-flat no-leads" (QFN) type, also known as "micro lead frame" (MLF) packages or "small-outline no-leads" (SON) packages.
In general, a QFN package comprises a region of resin, encapsulated or embedded inside which is a metallic lead frame (typically, made up of copper), which in turn forms at least one array of terminals that give out onto a bottom surface of the package.
As shown in FIGS. 1 and 2, a lead frame 1 includes a main body 2, which is planar and has, in top plan view, a polygonal shape (typically, a square or a rectangle); the main body 2 defines a top surface 6a and a bottom surface 6b. A plurality of pads 8 extend upwards from the main body 2, i.e. from the top surface 6a. In addition, the lead frame 1 comprises the so-called die pad 10, which extend upwards from the main body 2 and is surrounded, at distance, by the inner pads 8.
The main body 2, the pads 8 and the die pad 10 form one single piece of metal. In addition, the die pad 10 is planar and has, in top plan view, a polygonal shape (typically, a square or a rectangle). In FIG. 1, the die pad 10 has the shape of a parallelepiped and its lateral walls 16 intersect at four edges 11 (only three visible in FIG. 1).
In addition, the lead frame 1 is plated, usually by means of silver or a metallic alloy (such as NiPdAu). In particular, the lead frame 1 undergoes a plating process (e.g., an electroplating) which allows to form a top coating region 12 on the die pad 10, and a plurality of secondary coating regions 14, each of which is arranged on a corresponding pad 8. As mentioned before, the top coating region 12 and the secondary coating region 14 are formed by silver or a metallic alloy, for example, by a material which is less prone to oxidation (in particular, oxidation in air) than the material forming the lead frame 1 (i.e., by a material having a lower oxidation rate than the lead frame). In addition, the top coating region 12 and the secondary coating region 14 may have a thickness comprised in the range 3-9 μm; the pads 8 and the die pad 10 may have a thickness comprised in the range 3-4 μm.
Traditionally, lead frames are manufactured in strips, which are subsequently used in the manufacturing processes. Furthermore, the manufacturing processes typically comprise a step of back-etching to remove the main body 2 and separate the pads 8 from the die pad 10.
In addition, the manufacturing processes typically include the steps of setting the die (not shown) on the die pad 10, and then electrically connecting the conductive pads of the die to corresponding pads 8 of the lead frame 1, by means of wire bondings 24, as shown in FIG. 3. In order to set up the wire bondings 24, a thermal treatment is carried out, usually at a temperature of about 200° C., in air, and with a duration of about ten minutes; such a thermal treatment causes a controlled oxidation of the exposed parts of the lead frame 1, i.e. of the parts of the lead frame 1 not coated by the top coating region 12, nor by the secondary coating regions 14. Therefore, after the thermal treatment, an oxidized layer 27 extends on parts of the lead frame 1, as well as under the lead frame 1.
A packaging region 25 is then formed, typically by means of molding, on top of the lead frame 1 and the die. The packaging region 25, also known as "molding compound", may be made of a thermosetting epoxy resin and extends in direct contact with part of the top coating region 12, as well as with the secondary coating regions 14 and with the oxidized layer 27.
According to a different example, shown in FIG. 4, the lead frame 1 may include a die pad structure 28 including the die pad 10, a ground ring 29 which laterally surrounds the die pad 10, and a trench T0 extending between the die pad 10 and the ground ring 29, so as to expose a corresponding portion of the underlying main body 2. The ground ring 29 extends upwards from the main body 2, has the same thickness as the die pad 10 and has the shape of a squared frame; the ground ring 29 forms a single piece with the main body 2, the die pad 10 and the pads 8 The pads 8 surround the die pad structure 28. In addition, the ground ring 29 is coated, at top, by an additional coating region 12′, which is made of the same material as the top coating region 12 and has the same thickness as this latter.
FIG. 1 and FIG. 4 each show, in dashed line the projection of the outline OT, a possible die on the top coating region 12.
This having been said, the difference between the coefficients of thermal expansion (CTE) of the packaging region 25 and the lead frame 1 may cause mechanical stresses, due to temperature changes which occur during the functioning of the electronic device implemented in the die.
In particular, referring as an example to FIGS. 1 and 2, it is noted that mechanical stresses are concentrated at the corners of the die pad 10, where they may induce a local delamination (i.e., the detachment of portions of the top coating region 12 from the packaging region 25), which may then propagate, causing cracks and affecting the device reliability over time, in particular when causing the exposure of the die to the external atmosphere.
In order to solve the problem of the delamination, several solutions have been proposed.
In particular, a first solution envisages the use of additional adhesion promoter materials to be applied on the lead frame surface. Unfortunately, such a solution entails high costs.
A second solution envisages the formation of holding structures (such as grooves or dimples) in the lead frame. However, such a solution, besides entailing a reduction of the available packaging space, has proved to be not effective in case of large packaging formats, where higher stresses occur.
Finally, a third solution has been proposed, which envisages the use of a so-called rough lead frame, i.e., a lead frame which has undergone a chemical or mechanical process to render its surfaces rough. Unfortunately, this solution also entails high costs; furthermore, it negatively affects the die attach glue control, due to increase of substrate wettability, and the reliability of the wire bondings.
There is a need in the art to provide a lead frame for a semiconductor device that will solve at least in part the foregoing drawbacks.

Lead frame for a package for a semiconductor device, semiconductor device and process for manufacturing a semiconductor device


A zoom lens system includes a plurality of lens groups, wherein a deflector which deflects the optical axis of said zoom lens system is positioned between lens groups which are made moveable upon zooming.

1. Field of the Invention
The present invention relates to a zoom lens system to be used in a compact video camera or digital camera and the like.
2. Description of the Related Art
Generally, in a zoom lens system, it is necessary to maintain a space to allow the lens groups to move for zooming, as a result, the overall length of the zoom lens system tends to be long in comparison with a fixed focus lens system. Accordingly, there is a physical limit in reducing the dimensions of a camera body measured in a direction parallel with the optical axis of a lens system of the camera (hereinafter, the thickness of a camera).
In recent years, development has been made to produce digital cameras with higher resolution, and accordingly a frame size (an image size determined by a lens system) of an image pick-up device, such as a CCD (charge-coupled device), has been increased, and an optical system as well tends to be larger. For Miniaturizing a camera with a zoom lens system, a retractable type camera which is arranged to retract the lens barrel thereof when the main power is turned off is known. However, the mechanism of this retractable type camera is complicated, and is disadvantageous in regard to costs.


Dual-output power converter circuitry includes an input node, a first output node, a second output node, a number of capacitive elements, and a number of switching elements. The switching elements are coupled between the input node, the first output node, the second output node, and the capacitive elements. In operation, the switching elements charge and discharge the capacitive elements such that a power supply output voltage is provided asynchronously to the first output node and the second output node.

Many modern electronic devices include wireless communications circuitry. For example, an electronic device may include wireless local area network (WLAN) communications circuitry, cellular communications circuitry, or the like. While wireless communications circuitry allows electronic devices to communicate with one another, such functionality generally comes at the cost of additional energy consumption and thus reduced battery life. Often, wireless communications circuitry is the largest consumer of energy in an electronics device. As wireless communications protocols evolve to provide higher speeds, energy consumption of communications circuitry often increases to meet the higher demands of such protocols.
Consumer demand for longer battery life from electronic devices has resulted in the development of many power-saving techniques for wireless communications. One way to conserve power consumed via wireless communications is through the use of envelope tracking. Envelope tracking involves modulating a supply voltage provided to an amplifier based on the instantaneous magnitude (i.e., the envelope) of an RF input signal provided to the amplifier. FIG. 1 illustrates the basic concept of envelope tracking. Specifically, FIG. 1 shows an amplitude-modulated RF signal 10. Conventionally, a constant supply voltage at a level sufficient to ensure adequate headroom across the entire amplitude range of the RF signal 10 would be supplied to the amplifier, as shown by line 12. This results in a significant amount of wasted energy, and thus poor efficiency, when the amplitude of the RF signal 10 is below the maximum level, as illustrated by line 14. Accordingly, an envelope power supply signal tracks the amplitude of the RF signal 10, as illustrated by line 16, and therefore increases efficiency by preventing the unnecessary expenditure of power when the amplitude of the RF signal 10 is below the maximum level.
To employ envelope tracking as described above, electronic devices typically include envelope tracking power converter circuitry configured to generate the envelope tracking power supply signal illustrated by line 16. A functional block diagram illustrating a typical configuration for an RF transmitter section 18 including envelope tracking power converter circuitry 20 is shown in FIG. 2. The RF transmitter section 18 includes the envelope tracking power converter circuitry 20, a power amplifier 22, RF front end circuitry 24, and an antenna 26. The envelope tracking power converter circuitry 20 receives a supply voltage V_SUPP and an envelope control signal ECS and provides an envelope power supply signal EPS from the supply voltage V_SUPP and the envelope control signal ECS. The power amplifier 22 uses the envelope power supply signal EPS to amplify an RF input signal RF_; IN and provide an RF output signal RF_OUT. The RF front end circuitry 24 receives the RF output signal RF_OUT and performs any necessary filtering or routing of the signal, ultimately delivering the RF output signal RF_OUT to the antenna 26. As discussed above, using the envelope power supply signal EPS to amplify the RF input signal RF_IN and provide the RF output signal RF_OUT results in a significant increase in the efficiency of the RF transmitter section 18.
The envelope control signal ECS may be generated in any number of different ways, the details of which will be appreciated by those of ordinary skill in the art. For example, envelope tracking circuitry may receive a baseband input signal, the RF input signal RF_IN, the RF output signal RF_OUT, and/or may be in communication with a modulator in order to detect an envelope of the signal. The envelope tracking circuitry may then communicate with a look-up table that provides the envelope control signal ECS based on the detected envelope. In some cases, such a look-up table may provide the envelope control signal ECS according to an isogain contour of the power amplifier 22 in order to compensate for changes in linearity of the power amplifier 22 as the envelope power supply signal EPS changes.
FIG. 3 is a functional block diagram illustrating details of the envelope tracking power converter circuitry 20. The envelope tracking power converter circuitry 20 includes main power converter switching circuitry 28 configured to receive the supply voltage V_SUPP and provide a main converted power supply signal MCPS from a holding inductor L_HLD to a smoothing capacitor C_SMTH. In particular, the main converted power supply signal MCPS is provided based on a main power converter control signal MPCC provided from main power converter control circuitry 30. A number of main power converter flying capacitors C_FLYM and the holding inductor L_HLD are charged and discharged by the main power converter switching circuitry 28 to provide the main converter power supply signal MCPS. The holding inductor L_HLD stores and supplies power as required to provide the majority of the envelope power supply signal EPS. The smoothing capacitor C_SMTH reduces ripple that may be present in the envelope power supply signal EPS. The main power converter switching circuitry 28 generally forms a buck/boost converter with the main power converter flying capacitors C_FLYM and the holding inductor L_HLD, the details of which will be readily appreciated by those of ordinary skill in the art. The main power converter control signal MPCC may thus include a plurality of control signals each configured to control a different switching element in the main power converter switching circuitry 28 in order to deliver a desired voltage and/or current to the main power converter flying capacitors C_FLYM and the holding inductor L_HLD.
Parallel amplifier power converter switching circuitry 32 also receives the supply voltage V_SUPP and provides a parallel amplifier supply voltage PA_SUPP to a parallel amplifier 34. In particular, the parallel amplifier power converter switching circuitry 32 charges and discharges a parallel amplifier power converter capacitor C_PA and a parallel amplifier power converter inductor L_PA to provide the parallel amplifier power supply voltage PA_SUPP. The parallel amplifier supply voltage PA_SUPP is provided based on a parallel amplifier power converter control signal PAPCC, which is provided by parallel amplifier power converter control circuitry 36. The parallel amplifier power converter switching circuitry 32 may form a buck/boost converter with the parallel amplifier power converter capacitor C_PA and the parallel amplifier power converter inductor L_PA, similar to the main power converter switching circuitry 28 discussed above. However, the power demand of the parallel amplifier 34 is significantly less than that of a power amplifier for which the envelope power supply signal EPS is generated. Accordingly, the switching components within the parallel amplifier power converter switching circuitry 32 will be significantly smaller than those in the main power converter switching circuitry 28. Further, the parallel amplifier power converter capacitor C_PA and the parallel amplifier power converter inductor L_PA are generally significantly smaller than the main power converter flying capacitors C_FLYM and the holding inductor L_HLD, respectively.
Signal conditioning circuitry 38 receives the envelope control signal(s) ECS, which may be a differential signal. These envelope control signal(s) ECS, which indicate a target value of the envelope power supply signal EPS, are conditioned and forwarded to the parallel amplifier 34 as conditioned envelope control signal(s) ECS_C. Further, the envelope control signal(s) or one or more derivatives thereof are provided to the parallel amplifier power converter control circuitry 36, where they are used to provide to the parallel amplifier power converter control signal PAPCC. In particular, the parallel amplifier power converter control signal PAPCC is used to provide a minimum parallel amplifier supply voltage PA_SUPP necessary for the parallel amplifier 34 to operate and control the envelope power supply signal EPS as discussed below.
In addition to the parallel amplifier supply voltage PA_SUPP and the conditioned envelope control signal(s) ECS_C, the parallel amplifier 34 also receives a feedback signal FB via a voltage divider formed from a first feedback resistor R_FB1 and a second feedback resistor R_FB2. Using these signals, the parallel amplifier 34 provides an output voltage V_OUT and an output current I_OUT. Specifically, the parallel amplifier 34 acts similar to an operational amplifier, and attempts to equalize the voltage on an inverted terminal and a non-inverted terminal by changing the output voltage V_OUT and the output current I_OUT thereof. The output voltage V_OUT is delivered to an offset capacitor C_OFF, which is coupled between the holding inductor L_HLD and the smoothing capacitor C_SMTH. In general, the output voltage V_OUT contributes minimally to the envelope power supply signal EPS, acting only as a control for the main power converter switching circuitry 28. However, in some situations where the main power converter switching circuitry 28 along with the main power converter flying capacitors C_FLYM and the holding inductor L_HLD are incapable of providing or maintaining a particular envelope power supply signal EPS (e.g., due to very high bandwidth of the envelope power supply signal EPS and the fact that the rate of change of the current provided by the holding inductor L_HLD is limited), the output voltage V_OUT may contribute to the envelope power supply signal EPS for short periods of time. The offset capacitor C_OFF, in addition to storing charge that may be required to boost the envelope power supply signal EPS in times of rapid change or large signal amplitudes as discussed above, also reduces the necessary dynamic range of the output voltage V_OUT from the parallel amplifier 34 to maintain full control over the envelope power supply signal EPS. This in turn reduces the necessary parallel amplifier supply voltage PA_SUPP and thus improves efficiency. The output current I_OUT is provided to the main power converter control circuitry 30, and is used to generate the main power converter control signal MPCC. Accordingly, the parallel amplifier 34 acts primarily as a master device, with the main power converter switching circuitry 28 as a slave device via the output current I_OUT from the parallel amplifier 34. This design choice is due to the fact that the parallel amplifier 34 is a linear amplifier that is not very efficient at providing signals with the dynamic range of the envelope power supply signal EPS, while the main power converter switching circuitry 28 is very efficient at doing so. Operating the main power converter switching circuitry 28 and the parallel amplifier 34 in this manner thus allows for accurate envelope tracking with good efficiency.
Bandwidth aggregation techniques such as carrier aggregation and multiple-input-multiple-output (MIMO) have become commonplace in wireless communications devices. Downlink carrier aggregation occurs when multiple RF signals are simultaneously received by a mobile communications device. Uplink carrier aggregation occurs when multiple RF signals are simultaneously transmitted from a wireless communications device. An exemplary RF transmitter section 40 capable of uplink carrier aggregation is shown in FIG. 4. The RF transmitter section 40 includes first envelope tracking power converter circuitry 42, a first power amplifier 44, second envelope tracking power converter circuitry 46, a second power amplifier 48, RF front end circuitry 50, a first antenna 52A, and a second antenna 52B. The first envelope tracking power converter circuitry 42 receives the supply voltage V_SUPP and a first envelope control signal ECS1 and provides a first envelope power supply signal EPS1 to the first power amplifier 44. The second envelope tracking power converter circuitry 46 receives the supply voltage V_SUPP and a second envelope control signal ECS2 and provides a second envelope power supply signal EPS2 to the second power amplifier 48. The first power amplifier 44 uses the first envelope power supply signal EPS1 to amplify a first RF input signal RF_IN1 and provide a first RF output signal RF_OUT1. The second power amplifier 48 uses the second envelope power supply signal EPS2 to amplify a second RF input signal RF_IN2 and provide a second RF output signal RF_OUT2. The RF front end circuitry 50 performs filtering and routing on the first RF output signal RF_OUT1 and the second RF output signal RF_OUT2, providing each of these signals to a different one of the antennas 52. Accordingly, the RF transmitter section 40 may perform uplink carrier aggregation.
While the RF transmitter section 40 is capable of performing uplink carrier aggregation with envelope tracking for multiple power amplifiers, such functionality comes at the cost of significantly increased area of the RF transmitter section 40. Each one of the first envelope tracking power converter circuitry 42 and the second envelope tracking power converter circuitry 46 may be quite large due to the various inductive elements, capacitive elements, and switching elements contained therein (particularly in the main power converter switching circuitry 28 and the parallel amplifier power converter switching circuitry 32 discussed above). Providing envelope tracking power converter circuitry for each uplink carrier aggregation transmitter may therefore not be suitable for mobile communications devices in which space is highly limited. Accordingly, there is a need for improved envelope power converter circuitry that is small in size and capable of supporting uplink carrier aggregation.

Dual-output asynchronous power converter circuitry


In an f.theta. lens system in an optical scanner, a light beam from a light source is formed as a line image extending in a main scanning corresponding direction and is deflected at an equal angular velocity by a rotary polygon mirror having a reflecting face in the vicinity of an image forming position of the line image and is then formed by an image forming lens system in the shape of a spot on a scanned face to optically scan the scanned face. The f.theta. lens system focuses and forms the light beam deflected by the rotary polygon mirror as an image on the scanned face. The f.theta. lens system comprises a functional device having a function for connecting a reflecting position of the rotarty polygon mirror and the scanned face in an approximately conjugate relation in geometrical optics in a secondary scanning direction, and comprises an f.theta. function in a main scanning direction, and has two groups of first and second lenses sequentially arranged from the side of the rotary polygon mirror toward the scanned face side. The lenses have first to fourth lens faces provided from the side of the rotary polygon mirror and having shapes on a deflecting plane composed of a combination of an arc and a straight line from the first to fourth lens faces. The first and second lenses may have respective refracting powers on a plane parallel to the deflecting plane.

The present invention relates to an f.theta. lens system in an optical scanner using a rotary polygon mirror.
An optical scanner is known as a device for writing and reading information by scanning a light beam and is used in a laser printer, a facsimile, etc. In such an optical scanner, there is a device having an optically scanning system in which an approximately parallel light beam from a light source is focused and formed as a line image extending in a main scanning corresponding direction and this light beam is deflected at an equal angular velocity by a rotary polygon mirror having a reflecting face in the vincinity of an image forming position of the line image. In this system, the deflected light beam is further focused and formed on a scanned face in the shape of a spot by an image forming lens system to optically scan the scanned face.
In the optical scanner using the rotary polygon mirror, there is a problem about the inclination of the reflecting face. Further with respect to the deflected light beam, since the angular velocity of a deflector is constant, the scanned face is not scanned at a constant speed so that it is necessary to take measures for performing the scanning operation at the constant speed. An f.theta. lens system is a lens system for optically realizing the scanning operation of the scanned face at the constant speed. This lens system has an f.theta. function in which the height of an image formed by the incident light beam becomes f.theta. when an angle between the incident light beam and a lens optical axis is .theta. and the focal distance of the lens is f.
As a method for solving the problem of the reflecting face inclination, there is a known method in which a lens system disposed between the rotary polygon mirror and the scanned face is set to an anamorphic optical system, and a reflecting position of the rotary polygon mirror and the scanned face are connected to each other in a conjugate relation with respect to a secondary scanning direction.
Japanese Patent Application Laying Open (KOKAI) No. 59-147316 discloses an f.theta. lens system set as the anamorphic optical system to solve the problems about the scanning operation at a constant speed and the inclination of the reflecting face. This lens system has a large deflection angle, but it is not necessarily sufficient to correct a curve of an image face in the main and secondary scanning directions. Further, the diameter of an image forming spot on the scanned face is greatly varied depending on the scanning position so that it is difficult to realize the optically scanning operation of high density.
Further, when a normal f.tan .theta. lens is used, the scanned face is not scanned by the deflected light beam at a constant speed since the angular velocity of the rotary polygon mirror is constant. Japanese Patent Application Laying Open (KOKAI) No. 63-19617 discloses an f.theta. lens system set as the anamorphic optical system and using two lenses to solve the problems about the scanning operation at a constant speed and the inclination of the reflecting face. However, in this f.theta. lens system, it is not necessarily sufficient to correct a curvature of a field. Further, the diameter of an image forming spot on the scanned face is greatly varied depending on the scanning position so that it is difficult to realize the optically scanning operation of high density. Japanese Patent Application Laying Open (KOKAI) No. 61-120112 discloses an f.theta. lens system using a so-called saddle-type toric face and constructed by two lenses to preferably correct the field curvature. However, in this f.theta. lens system, a lot of aspherical faces are used and thereby the cost of the system is expensive. Further, the saddle-type toric face is used as a lens face of an elongated lens so that it is difficult to make the optical scanner compact.
Further, in this f.theta. lens system, the aspherical faces are used, it is difficult to process this lens system.