A system, method, and computer program product are provided for enabling communication between security systems. In use, a first communication protocol of a first security system and a second communication protocol of a second security system are identified, where the first communication protocol and the second communication protocol are different such that the first security system and the second security system are incapable of communicating therebetween. Further, the first security system is updated with a first security definition and/or the second security system is updated with a second security definition for enabling communication between the first security system and the second security system.

Security systems have traditionally been utilized for detecting, removing, etc. unwanted data (e.g. malware, spyware, unsolicited data, etc.). Oftentimes, it is advantageous for separate security systems to communicate, such as for sharing information regarding known, detected, etc. unwanted data. Unfortunately, traditional security systems have exhibited various limitations with respect to communication capabilities thereof.
Just by way of example, traditional security systems are generally periodically updated and upgraded, and the frequency of such updates and upgrades is increasing such that new types of systems are frequently becoming available. While new security systems may sometimes be capable of being programmed to communicate with old security systems via protocols existing in the old security systems, requiring such programming is restrictive since the protocols utilized must be defined at the time when the old security system was developed. In addition, when the old security systems need a way to communicate with newer security systems, communication therebetween is impossible since the old security systems are not already equipped with the communication protocols used by the newer security systems.
A similar problem exists for two security systems developed independently (e.g. as a result of different developers or, simply, due to a lack of internal communication between such developers). Both security systems may be released, but to pass messages from one another both products may be required to be re-released, which may be very costly. There is thus a need for addressing these and/or other issues associated with the prior art.

System, method, and computer program product for enabling communication between security systems


According to a disclosed embodiment of the invention, software download and installation in a ring network are synchronized in a two-stage operation in order to minimize service disruption time. In a first phase, the MPM's and UIM's in all the nodes are upgraded in parallel. Each node has two main processing modules, allowing one to be upgraded while the other continues to operate the node. In a second phase, the RIM's at the edges of a single ring segment are upgraded, one ring segment after the other, during which time each terminal node continues to operate with respect to the span connecting to its opposite side. While a span is non-operative, traffic is wrapped or diverted as necessary to maintain service of the ring. While one RIM of a node is being upgraded, the other RIM remains operational.

1. Field of the Invention
This invention relates to communications networks. More particularly, this invention relates to methods and systems for upgrading software in ring networks.
2. Description of the Related Art
The meanings of acronyms and certain terminology used herein are given in Table 1.
TABLE 1BLSRBi-directional line switched ringEMSElement management systemFRUField-replaceable unitMPMMain processing moduleNENetwork elementOSIOpen system interconnection modelRIMRing interface moduleRPRResilient packet ringSDHSynchronous digital hierarchySONETSynchronous optical networkSRBCSynchronized ring bandwidth changeSRDLSynchronized ring downloadSWDLSoftware downloadUIMUser interface module
In ring-based networks, scalability and reliability, and in particular the ability to execute non-service affecting (hitless) software upgrades, have become critical issues, particularly for operators of converged, packet-based backbones. A normal software upgrade of a node involves reset of the RIM's (which provide the interface functions between the node and the neighboring spans (segments) of the ring). As used herein, the terms "span" and "segment" are synonymous. Thus, when upgrading several nodes in the same ring in a non-synchronized manner several ring spans can become simultaneously non-operational, which causes a long service outage. Indeed, maintaining network recovery times of 50 ms or less while applying software upgrades to network elements has been a difficult goal to meet at reasonable cost.


A new and distinct cultivar of Scaevola plant named ‘Wesscaetowhi’, characterized by its compact and mounded plant habit; freely branching habit; freely flowering habit; and white-colored flowers.

The present invention relates to a new and distinct cultivar of Scaevola, botanically known as Scaevola aemula, and hereinafter referred to by the name 'Wesscaetowhi'.
The new Scaevola is a product of a planned breeding program conducted by the Inventor in Südlohn, Germany The objective of the breeding program is to create new compact and freely-flowering Scaevola cultivars with attractive flower coloration.
The new Scaevola originated from a cross-pollination made by the Inventor in Südlohn, Germany in 2003 of a proprietary selection of Scaevola aemula identified as code number 03P10, not patented, as the female, or seed, parent with a proprietary selection of Scaevola aemula identified as code number 03P00, not patented, as the male, or pollen, parent. The cultivar Wesscaetowhi was discovered and selected by the Inventor as a flowering plant within the progeny of the stated cross-pollination in a controlled environment in Südlohn, Germany in 2004.
Asexual reproduction of the new Scaevola by vegetative cuttings in a controlled environment in Südlohn, Germany since 2004, has shown that the unique features of this new Scaevola are stable and reproduced true to type in successive generations.

Gartenbau und Spezialkulturen Westhoff GbR


A surface treating appliance includes a main body and a head rotatably connected to the main body about an axis, the main body and the head being provided with first and second electrical connectors, respectively. The first and second electrical connectors can be connected to provide an electrical connection between the main body and the head. One of the first and second electrical connectors is slideable within a channel. By providing an electrical connector within a channel, complicated and potentially unreliable arrangements such as slip-rings can be avoided while still providing an electrical connection between the head and the main body.

Vacuum cleaners are typically of the upright or cylinder type. Upright vacuum cleaners generally comprise a cleaner head and a main body. The cleaner head is pivotably attached to the main body which is supported on a pair of wheels and has a handle to allow the vacuum cleaner to be manipulated by a user. The cleaner head has a housing and a suction opening is formed in the lower part of the housing facing the floor surface. A brush bar is commonly located within the suction opening in order to agitate a floor surface to improve cleaning performance. The brush bar may be driven by an air turbine which uses the airflow drawn into the vacuum cleaner via the suction opening to rotate the brush bar. Alternatively, the brush bar may be driven by an electrical motor, either by a belt attached to a main vacuum motor, or by a dedicated brush bar motor.
When a dedicated brush bar motor is used, electrical connections to the brush bar motor must be provided. However, difficulties can arise when a cleaner head is required to swivel or pivot with respect to the main body because a positive electrical connection must be maintained across the swivel or pivotable connection.
Further difficulties can arise when the electrical connection is required to be disconnectable; for example, in the case of a cleaner head which is removable from the main body of the vacuum cleaner for storage or transportation purposes. An example of a known electrical connection between a removable cleaner head and the remainder of a vacuum cleaner is shown in U.S. Pat. No. 4,204,297. The cleaner head has a dedicated brush bar motor and is attached to the remainder of the vacuum cleaner by a rotatable mechanical coupling. The power connector for the brush bar motor is in the form of a cable which can be disconnected separately from the mechanical coupling. Such an arrangement requires a number of steps in order to disconnect the cleaner head, which is inconvenient for a user.
An improved arrangement is shown in U.S. Pat. No. 4,146,283. This document discloses a powered cleaner head which is removably attachable to a main body of a vacuum cleaner. A connector is provided to attach the head to the main body. The connector has an electrical connector which connects to a corresponding electrical connector on the main body when the head is attached to the main body. A rotatable coupling is formed between the connector and the head. The rotatable coupling is spaced from the electrical connectors. Although the above arrangement is more convenient for a user to assemble than the arrangement disclosed in U.S. Pat. No. 4,204,297, additional space is required to provide electrical connections separate from a rotatable coupling.

Swivel electrical connector for a suction head of a surface treating appliance


A sensing circuit includes a sense amplifier circuit having a first and second nodes through which a magnetic memory element is sensed. A first current source is coupled to the first node a second current source is coupled to the second node. A reference magnetic memory element has a resistance associated therewith and is coupled to the first node, the reference magnetic memory element receives current from the first current source. At least one memory element, having a resistance associated therewith, is coupled to the second node and receives current from the second current source. Current from the first current source and current from the second current source are substantially the same. The logic state of the at least one memory element is sensed by a comparison of the resistance of the at least one memory element to the resistance of the reference magnetic memory element.

1. Field of the Invention
The present invention relates generally to magnetic memory element and particularly to sensing (or reading) of and writing to the magnetic memory element and an array made of the same.
2. Description of the Prior Art
Computers conventionally use rotating magnetic media, such as hard disk drives (HDDs), for data storage. Though widely used and commonly accepted, such media suffer from a variety of deficiencies, such as access latency, the data not being randomly accessible, higher power dissipation, large physical size and inability to withstand any physical shock. Thus, there is a need for a new type of storage device devoid of such drawbacks.
Other dominant storage devices are dynamic random access memory (DRAM) and static RAM (SRAM) which are volatile and very costly but have fast random read/write access time. Solid state storage, such as solid-state-nonvolatile-memory (SSNVM) devices having memory structures made of NOR/NAND-based Flash memory, providing fast access time, increased input/output (IOP) speed, decreased power dissipation and physical size and increased reliability but at a higher cost which tends to be generally multiple times higher than hard disk drives (HDDs).
Although NAND-based flash memory is more costly than HDD's, it has replaced magnetic hard drives in many applications such as digital cameras, MP3-players, cell phones, and hand held multimedia devices due, at least in part, to its characteristic of being able to retain data even when power is disconnected. However, as memory dimension requirements are dictating decreased sizes, scalability is becoming an issue because the designs of NAND-based Flash memory and DRAM memory are becoming difficult to scale with smaller dimensions. For example, NAND-based flash memory has issues related to capacitive coupling, few electrons/bit, poor error-rate performance and reduced reliability due to decreased read-write endurance. Read-write endurance refers to the number of reading, writing and erase cycles before the memory starts to degrade in performance due primarily to the high voltages required in the program, erase cycles. The flash-type non-volatile memories are typically capable of writing one type of data randomly (e.g. 0's), to write other types of data a larger section of the memory needs to be erased.
It is believed that NAND flash, especially multi-bit designs thereof, would be extremely difficult to scale below 45 nanometers. Likewise, DRAM has issues related to scaling of the trench capacitors leading to very complex designs which are becoming increasingly difficult to manufacture, leading to higher cost.
Currently, applications commonly employ combinations of EEPROM/NOR, NAND, HDD, and RAM as a part of the memory in a system design. Design of different memory technology in a product adds to design complexity, time to market and increased costs. For example, in hand-held multi-media applications incorporating various memory technologies, such as NAND Flash, DRAM and EEPROM/NOR flash memory, complexity of design is increased as are manufacturing costs and time to market. Another disadvantage is the increase in size of a device that incorporates all of these types of memories therein.
There has been an extensive effort in development of alternative technologies such as Ovanic Ram (or phase-change memory), Ferromagnetic Ram (FeRAM), current Magnetic Ram (MRAM), Nanochip, and others to replace memories used in current designs such as DRAM, SRAM, EEPROM/NOR flash, NAND flash and HDD in one form or another. Although these various memory/storage technologies have created many challenges, such as requiring too much current or having a large cell size or not readily scalable, there have been advances made in this field in recent years. Current MRAM designs seem to lead the way in terms of its progress in the past few years to replace all types of memories in the system as a universal memory solution.
An MRAM element generally consists of a magnetic tunnel junction (MTJ) and an access transistor. A magnetic tunnel junction (MTJ) generally consists of a tunneling layer, such as one made of magnesium oxide (MgO) formed between two magnetic layers.
Electron current tunneling through the tunneling layer depends on the orientation of the two magnetic layers. If the magnetic orientations of the two magnetic layers are parallel, electrons have a relatively easy time tunneling through the tunneling layer, otherwise, tunneling is difficult and some of the electrons are reflected at the interface. Therefore, the total resistance of the MTJ is less when the directions of the magnetic orientation of the magnetic layers are parallel relative to each other. If the resistance of the MTJ is Rl (or Rlow) when the magnetic directions are parallel, and Rh (or Rhigh) when they are anti-parallel, the relative change of resistance is defined as (Rh−Rl)/Rl, which is a measurement of tunneling magnetic resistance (TMR). That is, the following equation defines TMR as:TMR=(Rh−Rl)/Rl   Eq. (1)
The first time a product is manufactured, the magnetic orientations in all the MTJs are typically in the same direction, such as in a parallel state. Therefore, the resistances of all the memory elements are at Rl. After writing a "1" (or an active logic state, which may be considered "0" in certain cases), the resistance changes to Rh. Due to noise and other natural variances in the manufacturing process and write operations, the value of the resistances (Rl or Rh) form a Gaussian distribution around certain Rlow—avg and Rhigh—avg. In reading a memory cell, which includes a memory element, its resistance is determined and based on its detected resistance, its logical state is determined as being a "0" or "1". To do so, the memory cell resistance is compared to a resistor with the average value of Ravg=(Rlow—avg+Rhigh—avg)/2. When the Rhigh−Ravg is larger than a certain value V0 for a particular memory cell, the cell is read as "1", and when Ravg−Rlow is larger than V0 for a particular memory cell, the cell is read as "0". If the values are less than V0, the memory cell state is undetermined and can not be read. The V0 value is related to the sensitivity of the sense amplifier. For instance, the value of V0 is smaller for more sensitive sense amplifier.
However, one of the problems associated with the foregoing is that the value of the V0 can not be lowered indefinitely because of the presence of thermal noise as well as noise generated by the switching of signals from one state to another. This requires the value of V0 to be larger than Vnoise by several orders of magnitude.
What is needed is a circuit for reliably sensing and writing to MRAM memory cells.


Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for dynamically selecting symbol periods for communications signals and recovering symbols from the communications signals. In one aspect, a method includes receiving a plurality of communications signals over a plurality of different communications channels and determining symbol period end times for the communications signals. A determination is made that a present time is coincident with an end of a sample period for the communications signals and that an end of the symbol period for the communications signals received over at least one of the communications channels is coincident with the present time. In turn, data are provided that represent a symbol received over each communications channel for which an end of the symbol period is coincident with the present time.

This specification relates to data communications.
Service providers utilize distributed networks to provide services to customers over large geographic areas. For example, communications companies utilize a distributed communications network to provide communications services to customers. Similarly, power companies utilize a network of power lines and meters to provide power to customers throughout a geographic region and receive data back about the power usage.
These service providers are dependent on proper operation of their respective networks to deliver services to the customers and receive data back regarding the services provided. For example, the service provider may want access to daily usage reports to efficiently bill their customers for the resources that are consumed or otherwise utilized by the customers. Therefore, it is important for data specifying resource utilization and other information to be reliably transmitted and/or received at specified intervals.
In power line communication (PLC) networks, endpoints in the network (e.g., meters, load control switches, remote service switches, and other endpoints) can provide updated information (e.g., power consumption information and/or endpoint operating status information) by transmitting data over power lines. The amount of data required to be transmitted by each endpoint can differ based on the information that is required to be provided by the endpoint. For example, a first endpoint may be required to transmit updated information every 5 minutes, while another endpoint may be required to transmit updated information only once a day. Additionally, the channels over which the endpoints communicate can have various different channel characteristics (e.g., center frequency, bandwidth, and/or noise signal amplitude).
Due to the various amounts of data that may be transmitted by different endpoints, as well as the differences in channel characteristics, it can be difficult to select a single symbol period (i.e., a period over which a symbol is transmitted) that facilitates efficient transmission of data for each endpoint. Further, the channel characteristics can vary significantly over time such that symbol periods that are selected for the endpoints at one point in time may not provide adequate performance at another point in time.

Variable symbol period assignment and detection


The invention provides prodrugs of DNA-reactive analogs of duocarmycin and CC-1065 anticancer agents, wherein a cyclic prodrug form, such as carbamate, thionocarbamate, or carbamimidate, can be hydrolyzed by the patient in vivo to yield a respective bioactive agent comprising a DNA-alkylating moiety and a binding/targeting moiety. The DNA-reactive moiety is a γ-spirocyclohexenone fused to a heterocyclyl group which can be produced by endogenous hydrolysis of a cyclic carbamate prodrug of the invention. The cyclic carbamate prodrug produces no residual byproduct during activation in vivo. Methods of synthesis and biological methods and data are also provided.

Duocarmycin SA (1)1 and CC-1065 (2)2 are two parent members of a class of highly potent naturally occurring antitumor agents that also include duocarmycin A3 and yatakemycin4 (FIG. 1). This unique class of natural products derives its antitumor properties from their ability to alkylate DNA in a sequence selective manner.5,6 Comprehensive studies of the natural products, their synthetic unnatural enantiomers,7 and key analogues have defined many of the fundamental features that control the DNA alkylation selectivity, efficiency, and catalysis, resulting in a detailed understanding of the relationships between structure, reactivity, and biological activity.6,7,8
CBI (1,2,9,9a-tetrahydrocyclopropa[c]benz[e]indol-4-one):
is one of the most extensively studied synthetic analogues of the family since we first introduced it in 1989.9 The CBI alkylation subunit is not only more synthetically accessible and participates in the now characteristic DNA alkylation reaction effectively,10 but it has also been found to be 4 times more stable and 4 times more potent than the naturally occurring alkylation subunit of CC-1065 (2), approaching the stability and potency of the duocarmycin SA (1) alkylation subunit. Since analogues incorporating the CBI alkylation subunit have also been established to exhibit efficacious in vivo antitumor activity in animal models, it is an excellent synthetic replacement on which to examine the structure-function features of the natural products, including new prodrug design and evaluation.11

During the course of the total syntheses of CC-1065 (2), duocarmycin SA (1), duocarmycin A, yatakemycin, and related analogues including CBI-indole2 (5),11c it was established that the synthetic phenol precursors such as 4, which have yet to undergo the Winstein Ar-3′ spirocyclization, are equipotent to and indistinguishable from their cyclized cyclopropane containing counterparts within in vitro cytotoxic assays, DNA alkylation studies, and in vivo antitumor models.

Due to this indistinguishable behavior both in vitro and in vivo and because their extraordinary potency creates special precautions for their handling, protection of the phenol precursors not only permits safe handling during their preparation, but it also provides an effective site on which to create prodrugs that can be designed for controlled release in vivo.12 Such prodrugs incorporating phenol acylation have been developed to simultaneously improve solubility, pharmacokinetics, storage life, handling safety, and efficacy in vivo.12,13,14 Two such carbamate-based drugs, KW-218912c-d(t1/2=20 h, calf serum) and carzelesin (U-80,244, t1/2<1 h, human plasma),12a-b which are rapidly cleaved in vivo (1-20 h), entered clinical trials but have ultimately not progressed. In related studies, we described ester and carbamate prodrugs 3a-f of (+)-CBI-indole2, many of which were found to be essentially equipotent to (+)-CBI-indole2 (5) in vitro.12e However, upon hydrolysis, such prodrug compound necessarily release a byproduct (shown as RN—H below) as well as the active drug in vivo, which can be a cause of concern with respect to possible byproduct toxicity.
This work established that the free drug is rapidly released in a cellular assay and is able to spirocyclize, alkylate DNA, and express its biological activity efficiently in a manner essentially indistinguishable from the free drug itself.


An actuating mechanism for a tool includes a shell and a switch actuator. The shell includes a slot defined therein between two edges and at least one boss formed thereon. The switch actuator includes two hooks to be inserted through the slot for engagement with the two edges and at least one recess defined therein for receiving the at least one boss in a releasable manner. The switch actuator includes two tabs extending from a side thereof for insertion in the slot. The switch actuator includes a driving element extending from a side thereof through the slot for driving another element of the tool. The switch actuator includes a slot defined therein between two edges, at least one of which defines the at least one recess for receiving the at least one boss. The at least one boss is a semi-cylinder, and the at least one recess is semicircular. The shell includes two bosses, and each of the edges by the slot of the switch actuator defines a recess for receiving one of the bosses.

1. Field of Invention
The present invention relates to an actuating mechanism for a tool and, more particularly, to an actuating mechanism for a burner.
2. Related Prior Art
Taiwanese Patent Application No. 247615 discloses a conventional electronic burner. This conventional electronic burner includes a shell 1, a voltage generator 2 received in the shell 1, a lever 4 pivotally mounted on the shell 1 and a security element 6 movably mounted on the shell 1. The voltage generator 2 includes a button 20. The lever 4 is pivotally mounted on the shell 11 by means of a pin. The lever 4 includes a first end 41 in contact with the button 20. The security element 6 includes a sled 60 movably mounted on the shell 1. The sled 60 includes an end for contact with a second end of the lever 4. The security element 6 can be moved between a locking position and a releasing position. In the locking position, the end of the sled 60 contacts the second end of the lever 4 so that the lever 4 cannot be pivoted, i.e., the first end 41 of the lever 4 cannot push the button 20. Thus, a voltage cannot be produced via the voltage generator 2. In the releasing position, the end of the security element 6 is removed from the second end of the lever 4 so that the lever 4 can be pivoted. Thus, the fast end 41 of the lever 4 can push the button 20. Thus, a voltage can be produced via the voltage generator 2. However, operation of the security element 6 and operation of the lever 4 cannot be connected smoothly.
The present invention is therefore intended to obviate or at least alleviate the problems encountered in the prior art.
It is an objective of the present invention to provide a burner with a security device that is effective and easily operable.
According to the present invention, an actuating mechanism for a tool includes a shell and a switch actuator. The shell includes a slot defined therein between two edges and at least one boss formed thereon. The switch actuator includes two hooks inserted through the slot for engagement with the edges and at least one recess defined therein for receiving the at least one boss in a releasable manner The switch actuator includes two tabs extending from a side thereof for insertion in the slot. The switch actuator includes a driving element extending from a side thereof through the slot for driving another element of the tool. The switch actuator includes a slot defined therein between two edges, at least one of which defines a recess for receiving the at least one boss. The at least one boss is a semi-cylinder, and the at least one recess is semi-circular. The shell includes two bosses, and each of the edges by the slot of the switch actuator defines a recess for receiving one of the bosses.

Akara Building, 24 De Castro Street, Wickman Cay I, Road Town


A multifunction traffic control and information system of the present invention includes external condition sensors and various devices each having one or more display portions to display alphanumeric messages and a local communications module functionally linked to a local network. At least one device further includes a cellular communications module and a system controller. The controller receives a display data string including a message displayable by one or more of the devices, as transmitted from a remote source via a cellular network, determines at least one of the devices to display the message, and routes the message to at least one display portion associated with the one or more determined devices. The controller further generates a return data string based on external condition data sensed by the one or more sensors, and transmits the return data string across the cellular network to the remote source.

The present invention relates generally to a device capable of receiving and publicly displaying information transmitted from a remote location. More particularly, this invention relates to an isolated device having a cellular modem capable of receiving cellular transmissions containing information for public display on one or more display channels.
Traffic display devices are conventionally used to provide important updated information to passing drivers. These devices may be used to provide notice of temporary conditions such as for example a reduced speed limit for an area presently under construction, or adverse weather conditions which require some degree of caution. These devices may further be used to advise of traffic conditions far ahead and at staggered intervals, such as one or more lanes of traffic being blocked or providing available detour information.
The temporary nature of the information that is often provided on such devices means that it is necessary to update the information frequently, such as changing weather conditions like fog or snow, but also typically for example where a certain reduced speed limit is required because construction workers are present during daylight hours, but where a normal speed limit would be acceptable during night hours when no workers are present. The remote locations in which the devices may typically be provided themselves means that the devices may not easily be adjusted manually. Further, where a number of devices are intended for interconnected but staggered use (e.g., widely dispersed in location along a particular roadway), it would be highly inconvenient for an individual or even a group of individuals to make the necessary adjustments on a frequent basis.
Conventional systems are available which transmit information to remote display devices via resources such as the Internet, Direct Connect (file sharing), RF (radio frequency) bidirectional communication, IR (infrared) data transmission, etc.
However, the technology is not presently available to provide full coverage to the entire range of locations in which such devices are needed. As but one example, a remote display device may be required or otherwise desirable for providing traffic information on a roadway bridge, and such bridges may often be of substantial length wherein no Internet coverage is presently available.
It is also often generally impractical to provide hard-wired communication links to remote display devices, particularly to a string of such devices which are related but require separate display messages, given the temporary and generally portable nature of these devices in for example construction applications.
Therefore, what is needed is a remote display device which can consistently receive wireless communications from a data source in substantially all locations where such a device may be needed, and is effective to publicly display information in accordance with the received data.

Multifunction traffic control and information system


Various techniques manage a storage system. Such techniques involve, in response to receiving an Input/Output (I/O) request for a first slice of a logic storage unit in a storage system, obtaining a first bitmap with respect to the logic storage unit, the logic storage unit being divided into a plurality of slices including the first slice, and one bit in the first bitmap indicating whether a cache function is enabled for a respective one of the plurality of slices. The techniques further involve determining, based on the first bitmap, whether the cache function is enabled for the first slice. Moreover, the techniques further involve, in response to determining that the cache function is enabled for the first slice, processing the I/O request at least with a cache in the storage system. Such techniques can control the use of cache in the storage system in a finer granularity.

A storage resource pool composed of a large amount of storage disks usually exists in a storage system. Physical logic storage units can be created on the storage resource pool. The physical logic storage units refer to logic storage units that are directly mapped to a physical storage space and the number of the physical logic storage units is usually restricted by the size of the actual available physical storage space. Besides, virtual logic storage units can be created based on the physical logic storage units for use by an upper-layer application. The virtual logic storage units are not restricted by the size of the physical storage space. A system administrator can create a large amount of virtual logic storage units, but space allocation is actually performed only when data is to be written. Therefore, the virtual logic storage units can easily implement different tiers to store various data to meet different user requirements.
A cache component usually also exists in the storage system and improves performance of data access by transparently storing the frequently accessed data in a faster storage medium (e.g., flash) relative to underlying storage disks. However, the cache is usually enabled and disabled based on the entire storage resource pool. In other words, in a plurality of virtual logic storage units based on the same storage resource pool, the cache function cannot be enabled for some more important virtual logic storage units and disabled for other less important virtual logic storage units.

Method, device and computer program product for managing storage system


A mountable microstructure is provided for mounting with high positional accuracy a compound semiconductor element such as a surface emitting laser element engaged under gravity in concavities on an upper surface of a substrate. A surface emitting laser element 2 is formed on an upper surface of a Si block 1 formed at high accuracy in the same shape as concavities on the upper surface of a substrate by Si anisotropic etching. In the case of a surface emitting laser, since problems such as lattice mismatch occur when an epitaxial layer is grown on the Si substrate, the epitaxial layer 14 is grown on for example a GaAs substrate 11, and this is inverted to bond onto an Si substrate 17. Then after forming the surface emitting laser element 2, the Si block is shaped and divided up by anisotropic etching. Other elements may be formed on the Si block, however, in order to individually drive compound semiconductor elements, a high resistance layer 23 or a current blocking layer 24 is installed in an internal layer 22 between the two. If electrodes are provided on the upper surface of the Si substrate 17, prober inspection is facilitated.

1. Field of the Invention
The present invention relates to a mountable microstructure used when mounting an element on a base substance (substrate), and is suitable for example for an optical interconnection device between laminated IC chips as with for example a one-chip computer.
2. Description of the Related Art
In order to achieve even higher speed for a computer, a one-chip computer is considered where IC chips, such as a CPU and DRAM, is laminated, and the exchange of data between chips is performed with optical signals. Regarding an optical interconnection device for such a one-chip computer, if for example respective IC chips are laminated so that the light emitting element of a certain IC chip faces a light receiving element of another IC chip, the emission light of one light emitting element can be directly received by the other IC chip. Consequently, if data is carried in the light, then data transmission between IC chips can be performed at high speed. Furthermore, if the IC chip provided with the light receiving element is further laminated, the signal of one light emitting element can be received by a plurality of light receiving elements, that is the data of one IC chip can be transmitted simultaneously to a plurality of other IC chips. Therefore an extremely high speed optical bus can be formed. For the light emitting element of such an optical interconnection device between laminated IC chips, a vertical resonator type surface emitting laser element for which the aperture of the discharge port is small is ideal.
On the other hand, there is an element mounting technique disclosed for example in U.S. Pat. No. 5,904,545. This element mounting technique, as shown in FIG. 10 involves for example forming concavities A of a predetermined shape on an upper surface of a base substance C of for example a substrate or a film or the like, molding microstructures B of a shape for engaging in these concavities, mixing the microstructures B in a predetermined fluid to make a slurry, and then flowing this slurry along the upper surface of the base substance C so that elements comprising the microstructures B of the same shape as the concavities A are engaged under gravity in the concavities A, to thereby mount these. In this conventional technology also there is disclosure of forming for example a surface emitting laser element comprising GaAs, into a microstructure of a shape for engaging in the concavities, and mounting the surface emitting laser element by means of the aforementioned mounting technique. Here the base substance is formed from Si and the concavities on the upper surface of the base substance are formed by Si anisotropic etching.
Incidentally, as is well known, in Si anisotropic etching, the accuracy of the shape to be formed is extremely high. That is, the shape of the concavities formed on the upper surface of the base substance has an extremely good accuracy. However, with a compound semiconductor represented by the surface emitting laser element, even if anisotropic etching is effected, the accuracy of the shape is not very high. That is, for a microstructure of a compound semiconductor formed by anisotropic etching, the shape accuracy is inferior. Consequently, no matter how high the shape accuracy of the concavities on the surface of the base substance, the shape accuracy of the microstructures of the compound semiconductor is low, and hence the positioning accuracy for mounting as an element is low.
The present invention has been developed in order to solve the above problems, with the object of providing a mountable microstructure for which the element mounting location accuracy is extremely high.
In order to solve the above problems, a mountable microstructure according to a first aspect of the present invention is a mountable microstructure which is engaged and mounted in a concavity formed at a predetermined location on an upper surface of a base substance, by mixing in a fluid to form a slurry and flowing the slurry over the upper surface of the base substance, wherein there is provided an Si block of a shape for engaging in the concavity on the upper surface of the base substance, and a compound semiconductor element formed on an upper surface of the block.
Moreover, a mountable microstructure according to a second aspect of the present invention is one where in the first aspect, the Si block and the compound semiconductor element are bonded by a compound semiconductor-Si direct bonding.
Furthermore, a mountable microstructure according to a third aspect of the present invention is one where in the first aspect, the Si block and the compound semiconductor element are bonded by an InP-Si direct bonding.
Moreover, a mountable microstructure according to a fourth aspect of the present invention is one where in the first aspect, the Si block and the compound semiconductor element are bonded by a GaAsxe2x80x94Si direct bonding.
Furthermore, a mountable microstructure according to a fifth aspect of the present invention is one where in the first aspect, the Si block and the compound semiconductor element are bonded via a metal film.
Moreover, a mountable microstructure according to a sixth aspect of the present invention is one where in the first aspect, the Si block and the compound semiconductor element are bonded via solder.
Furthermore, a mountable microstructure according to a seventh aspect of the present invention is one where in the first aspect, the Si block and the compound semiconductor element are bonded via resin.
Moreover, a mountable microstructure according to an eighth aspect of the present invention is one where in the first aspect, the Si block and the compound semiconductor element are bonded via an SiO2 film.
Furthermore, a mountable microstructure according to a ninth aspect of the present invention is one where in the first aspect, the Si block and the compound semiconductor element are bonded via an SiO2 film and an AlGaAs layer.
Moreover, a mountable microstructure according to a tenth aspect of the present invention is one where in any one of the first through ninth aspects, a plurality of the compound semiconductor elements are formed on each Si block.
Furthermore, a mountable microstructure according to an eleventh aspect of the present invention is one where in any one of the first through tenth aspects, individual elements are formed on the Si block itself.
Moreover, a mountable microstructure according to a twelfth aspect of the present invention is one where in the eleventh aspect, the individual elements formed on the Si block itself and the compound semiconductor element are arranged so as to overlap or face each other.
Furthermore, a mountable microstructure according to a thirteenth aspect of the present invention is one where in the eleventh aspect, the individual elements formed on the Si block itself and the compound semiconductor element are arranged so as to be displaced from each other.
Moreover, a mountable microstructure according to a fourteenth aspect of the present invention is one where in any one of the first through thirteenth aspects, all of the electrodes for the compound semiconductor element are formed on the upper surface of the Si block.
Furthermore, a mountable microstructure according to a fifteenth aspect of the present invention is one where in any one of the first through thirteenth aspects, any one of the electrodes for the compound semiconductor element is made common with the electrodes for the Si block.
Moreover, a mountable microstructure according to a sixteenth aspect of the present invention is one where in the fifteenth aspect, a high resistance layer with a resistance greater than 1xc3x97104 xcexa9 is provided between the compound semiconductor element electrode formed on the upper surface of the Si block and the Si block.
Furthermore, a mountable microstructure according to a seventeenth aspect of the present invention is one where in the sixteenth aspect, the high resistance layer comprises a compound semiconductor.
Moreover, a mountable microstructure according to an eighteenth aspect of the present invention is one where in the sixteenth aspect, the high resistance layer comprises a compound semiconductor doped with Cr and O.
Furthermore, a mountable microstructure according to a nineteenth aspect of the present invention is one where in the sixteenth aspect, the high resistance layer comprises an oxide.
Moreover, a mountable microstructure according to a twentieth aspect of the present invention is one where in the sixteenth aspect, the high resistance layer comprises a nitride.
Furthermore, a mountable microstructure according to a twenty first aspect of the present invention is one where in the sixteenth aspect, the high resistance layer comprises a resin.
Moreover, a mountable microstructure according to a twenty second aspect of the present invention is one where in the fifteenth aspect, a current blocking layer using a PN connection is provided between the compound semiconductor element electrode formed on the upper surface of the Si block and the Si block.
Furthermore, a mountable microstructure according to a twenty third aspect of the present invention is one where in the twenty second aspect, the current blocking layer is formed by laminating layers of a P-type semiconductor and an N-type semiconductor in PNP or NPN order.
Moreover, a mountable microstructure according to a twenty fourth aspect of the present invention is one where in the twenty third aspect, a contact layer in the immediate vicinity of the Si block is used as the P-type semiconductor or the N-type semiconductor constituting the current blocking layer.
An optical transmission apparatus according to a twenty fifth aspect of the present invention is one where a base substance with a mountable microstructure according to any one of the first through twenty fourth aspects which includes a light emitting element mounted in a concavity, and a base substance with a mountable microstructure according to any one of the first through twenty fourth aspects which includes a light receiving element mounted in a concavity, are laminated so that the light emitting element and the light receiving element face each other.
An optical transmission apparatus of a twenty sixth aspect of the present invention is one having a light emitting section comprising a base substance with a mountable microstructure according to any one of the first through twenty fourth aspects which includes a light emitting element mounted in a concavity, and a light receiving section comprising a base substance with a mountable microstructure according to any one of the first through twenty fourth aspects which includes a light receiving element mounted in a concavity.
In the mountable microstructure according to the first aspect of the present invention, the construction is such that the compound semiconductor element is formed on the upper surface of the Si block of a shape for engaging with the concavity on the upper surface of the base substance. Therefore the shape accuracy of the Si block can be increased by anisotropic etching, and this Si block is engaged in a concavity with a high shape accuracy, so that the mounting position accuracy of the compound semiconductor element is increased.
Furthermore, in the mountable microstructure according to the second aspect of the present invention, the construction is such that the Si block and the compound semiconductor element are bonded by direct bonding. Therefore the mountable microstructure according to the first aspect can be easily implemented.
Moreover, in the mountable microstructure according to the third aspect of the present invention, the construction is such that the Si block and the compound semiconductor element are bonded by an InPxe2x80x94Si direct bonding. Therefore the mountable microstructure according to the first aspect can be easily implemented.
Furthermore, in the mountable microstructure according to the fourth aspect of the present invention, the construction is such that the Si block and the compound semiconductor element are bonded by a GaAsxe2x80x94Si direct bonding. Therefore the mountable microstructure according to the first aspect can be easily implemented.
Moreover, in the mountable microstructure according to the fifth aspect of the present invention, the construction is such that the Si block and the compound semiconductor element are bonded via a metal film. Therefore the mountable microstructure according to the first aspect can be easily implemented.
Furthermore, in the mountable microstructure according to the sixth aspect of the present invention, the construction is such that the Si block and the compound semiconductor element are bonded via solder. Therefore the mountable microstructure according to the first aspect can be easily implemented.
Moreover, in the mountable microstructure according to the seventh aspect of the present invention, the construction is such that the Si block and the compound semiconductor element are bonded via resin. Therefore the mountable microstructure according to the first aspect can be easily implemented, and the resin becomes an insulating layer between the compound semiconductor element and the Si block.
Furthermore, in the mountable microstructure according to the eighth aspect of the present invention, the construction is such that the Si block and the compound semiconductor element are bonded via an SiO2 film. Therefore the mountable microstructure according to the first aspect can be easily implemented.
Moreover, in the mountable microstructure according to the ninth aspect of the present invention, the construction is such that the Si block and the compound semiconductor element are bonded via an SiO2 film and an AlGaAs layer. Therefore the mountable microstructure according to the first aspect can be easily implemented.
Furthermore, in the mountable microstructure according to the tenth aspect of the present invention, the construction is such that a plurality of the compound semiconductor elements are formed on each Si block. Therefore even higher density mounting is possible.
Moreover, in the mountable microstructure according to the eleventh aspect of the present invention, the construction is such that individual elements are formed in the Si block itself. Therefore not only can the compound semiconductor element be simply mounted on a base substance, but a plurality of functions can be obtained with a single mountable microstructure, and even higher density mounting is possible.
Furthermore, in the mountable microstructure according to the twelfth aspect of the present invention, the construction is such that the individual elements formed on the Si block itself and the compound semiconductor element are arranged so as to overlap or face each other. Therefore for example in the case where the compound semiconductor element is a light emitting element, and the individual elements formed on the Si block itself are light receiving elements, the light emitting condition of the light emitting element can be monitored by the light receiving elements.
Moreover, in the mountable microstructure according to the thirteenth aspect of the present invention, the construction is such that the individual elements formed on the Si block itself and the compound semiconductor element are arranged so as to be displaced from each other. Therefore for example in the case where the compound semiconductor element is a light emitting element, and the individual elements formed on the Si block itself are light receiving elements, if the base substance is arranged so that two mountable microstructures face each other in opposite directions, the light emitting condition of mutual light emitting elements can be monitored by mutual light receiving elements.
Furthermore, in the mountable microstructure according to the fourteenth aspect of the present invention, the construction is such that all of the electrodes for the compound semiconductor element are formed on the upper surface of the Si block. Therefore inspection of the compound semiconductor element is facilitated. Furthermore, in the case where individual elements are formed on the Si block itself, the elements of the Si block itself and the compound semiconductor element can be easily driven individually.
Moreover, in the mountable microstructure according to the fifteenth aspect of the present invention, the construction is such that any one of the electrodes for the compound semiconductor element is made common with the electrodes for the Si block. Therefore the number of electrodes can be reduced, and simplification of construction and a lower cost can be achieved.
Furthermore, in the mountable microstructure according to the sixteenth aspect of the present invention, the construction is such that the high resistance layer with a resistance greater than 1xc3x97104 xcexa9 is provided between the compound semiconductor element electrode formed on the upper surface of the Si block and the Si block. Therefore in the case where individual elements are formed on the Si block itself, the elements of the Si block itself and the compound semiconductor element are insulated, and can be easily driven individually.
Moreover, in the mountable microstructure according to the seventh aspect of the present invention, the construction is such that the high resistance layer comprises a compound semiconductor. Therefore the mountable microstructure according to the sixteenth aspect can be easily implemented.
Furthermore, in the mountable microstructure according to the eighteenth aspect of the present invention, the construction is such that the high resistance layer comprises a compound semiconductor doped with Cr and O. Therefore the mountable microstructure according to the sixteenth aspect can be easily implemented.
Moreover, in the mountable microstructure according to the nineteenth aspect of the present invention, the construction is such that the high resistance layer comprises an oxide. Hence the high resistance layer can be easily formed by for example oxidizing the Si block. Therefore the mountable microstructure according to the sixteenth aspect can be easily implemented.
Furthermore, in the mountable microstructure according to the twentieth aspect of the present invention, the construction is such that the high resistance layer comprises a nitride. Hence the high resistance layer can be easily formed by for example nitriding the Si block. Therefore the mountable microstructure according to the sixteenth aspect can be easily implemented.
Moreover, in the mountable microstructure according to the twenty first aspect of the present invention, the construction is such that the high resistance layer comprises a resin. Therefore the mountable microstructure according to the sixteenth aspect can be easily implemented.
Furthermore, in the mountable microstructure according to the twenty second aspect of the present invention, the construction is such that the current blocking layer using a PN connection is provided between the compound semiconductor element electrode formed on the upper surface of the Si block and the Si block. Therefore, in the case where individual elements are formed on the Si block itself, the elements of the Si block itself and the compound semiconductor element are insulated, and can be easily driven individually. Moreover, the current blocking layer can be easily formed by semiconductor processing the Si block.
Moreover, in the mountable microstructure according to the twenty third aspect of the present invention, the construction is such that the current blocking layer is formed by laminating layers of a P-type semiconductor and an N-type semiconductor in PNP or NPN order. Therefore the current blocking layer can be easily formed by semiconductor processing of the Si block.
Furthermore, in the mountable microstructure according to the twenty fourth aspect of the present invention, the construction is such that the contact layer in the immediate vicinity of the Si block is used as the P-type semiconductor or the N-type semiconductor constituting the current blocking layer. Therefore the formation of the current blocking layer is further simplified, and a simplification of construction and a lower cost is possible.

Mountable microstructure and optical transmission apparatus


Chromate-free treatments and compositions for applying a conversion or passivation coating for metals, more particularly zinc coated metal surfaces. The methods of the invention comprise contacting the requisite metal surface with a phosphonomethylated polyamine. Other aspects of the invention involve methods and compositions in which the following optional components can be included: fluoacid, silane, inorganic phosphorus, acid, latex film forming component and pH adjustment agent.

It is well known to those skilled in the art to employ a chromate conversion or passivation coating on the surface of galvanized steel to impart improved corrosion resistance of bare and painted metal, improve adhesion of coatings, and for aesthetic purposes. For example see Corrosion, L. L. Sheir, R. A. Jarman, G. T. Burstein, Eds. (3rd Edition, Butterworth-Heinemann Ltd, Oxford, 1994), vol. 2, chapter 15.3.
Growing concerns exist regarding the toxicity profile of chromium and the pollution effect of chromates discharged into rivers and waterways by such processes. Because of the high solubility and the strongly oxidizing character of hexavalent chromium ions, conventional chromate conversion processes require extensive water treatment procedures to control their discharge. In addition, the disposal of the solid sludge from such waste treatment procedures is a significant problem.
Accordingly, there is a need in the art to provide an effective non-chromate treatment to provide dried in place conversion or passivating coating to inhibit metal surface corrosion and enhance adhesion of paint on or other coatings that may be applied to the surface.
Numerous compositions for providing non-chromate conversion coatings for galvanized steel are known to those skilled in the art.

This patent is subject to a terminal disclaimer.


A phase error detection apparatus and method is disclosed whereby a data signal is played back at a high S/N ratio from a magneto-optical disk making use of a ghost signal by magnetic domain wall displacement detection while the playback laser poser is kept at an optimum level. First, the laser power is controlled so that the time delay of a ghost signal from a data signal may be equal to a fixed multiple of a data detection clock. Thereupon, a laser power control section searches for a point at which the amount of jitters generated is small based on a RF signal. Then, the playback laser power is adjusted so that the time delay amount of the ghost signal from the data signal may be the fixed multiple n=5 of the clock nearest to the phase delay amount set in advance of a ghost which appears in the isothermal region with a laser power with which an optimum signal characteristic is obtained. In this instance, the laser power control section searches for a peak of the 5T amplitude of the displacement phase difference controlling pattern.

This invention relates to a phase error detection apparatus and method for detecting an error which occurs with a phase difference between a magnetic domain wall displacement which occurs at a leading end of an isothermal region formed on a recording medium and another magnetic domain wall displacement which occurs at a trailing end of the isothermal region, and a laser power control apparatus and method for controlling the laser power using the phase error detection apparatus and method, as well as a magneto-optical recording and/or playback apparatus for playing back an information signal from a magneto-optical recording medium using the laser power control apparatus and method.
Conventionally, various optical disks have been proposed as a recording medium for an information signal, and as an optical disk which allows rewriting of an information signal, a magneto-optical (MO) disk and a phase change (PC) disk have been proposed. Investigations have been and are being performed to allow higher density recording of such magneto-optical disk and phase change disk. However, it is considered to be difficult to read a mark smaller than a reading light spot.
However, for the magneto-optical disk, a super-resolution technique for masking marks which are not an object of playback to eliminate intersymbol interference while playing back only marks of an object of playback has been developed.
Further, a magnetic domain expansion and playback system (MAMMOS: Magnetic AMplifying Magneto-Optical System) and a magnetic domain wall displacement detection system (DWDD) have been proposed recently for playback of a magneto-optical disk recorded in a high density.
Both of the magnetic domain expansion and playback and the magnetic domain wall displacement detection expand the magnetic domain of a mark smaller than a light spot for playback through a distribution of heat generated by the light spot to read the mark. When the magnetic domain expansion and playback and the magnetic domain wall displacement detection are compared with each other, the latter can detect an edge of a mark clearly while the former can detect the position of a mark with certainty. Accordingly, the magnetic domain wall displacement detection is suitable to play back an optical disk which adopts xe2x80x9cmark edge recordingxe2x80x9d.
The principle of playback by the magnetic domain wall displacement detection is described using an isolated mark. In particular, according to the magnetic domain wall displacement detection, presence of a mark is detected making use of the fact that, when a magnetic domain wall of an expansion layer comes to a leading end of an isothermal region in which the temperature generated by a laser beam is higher than the Curie temperature, the magnetic domain wall moves quickly to a maximum temperature portion.
Where such magnetic domain wall displacement detection as described above is used to play back a magneto-optical disk, also when the magnetic domain wall comes to the trailing end of the isothermal region, the magnetic domain wall moves quickly to a maximum temperature portion. Therefore, a read signal (MO signal) by the magnetic domain wall displacement detection includes not only a data signal but also a ghost signal having an equal length to that of the data signal and having a level lower then that of the data signal after a delay of time of xe2x80x9cisothermal region length÷linear velocityxe2x80x9d from the data signal. If the ghost signal is played back together with the data signal, then it is difficult to play hack an information signal recorded in a high density and also it is difficult to play back a clock signal.
Thus, a technique for canceling a ghost has been proposed in Japanese Patent Laid-open No. Hei 11-296928 by the assignee of the present application. According to the technique, when the magnetic domain wall displacement detection is used to play back a magneto-optical disk, an external clock system is used to play hack a clock signal stably, and the clock signal is used to convert the level of a RF signal read from the magneto-optical disk into a digital signal so that ghost signal processing can be performed by digital signal processing to allow the data signal to be played back correctly.
However, in order to obtain a correct data signal using the technique disclosed in the document specified as above, a process for separating the data signal and the ghost signal from each other is required.
It is an object of the present invention to provide a phase error detection apparatus and method which can detect not only an error which occurs with a phase difference of a ghost signal from a data signal in a unit of a clock but also an error of the phase difference which appears in a shorter period than that of the clock.
It is another object of the present invention to provide a laser power control apparatus and method by which the playback laser power can be kept at an optimum level based not only on an error which occurs with a phase difference of a ghost signal from a data signal in a unit of a clock but also an error of the phase difference which appears in a shorter period than that of the clock.
It is a further object of the present invention to provide a magneto-optical recording and/or playback apparatus by which a data signal can be played back in a high S/N ratio from a magneto-optical disk making use of a ghost signal by the magnetic domain wall displacement detection while keeping the playback laser power at an optimum level.
In order to attain the objects described above, according to the present invention, the laser power is first controlled so that the time delay of a ghost may be a fixed multiple of a data detection clock. Then, the laser power is adjusted so that the time delay may be a fixed multiple of the clock nearest to the phase delay amount set in advance of a ghost which appears in the isothermal region with a laser power with which an optimum signal characteristic is obtained. In this instance, the level of the playback signal is detected as a sum of results of displacement of both of a magnetic wall at a leading end of the isothermal region and another magnetic wall at a trailing end of the isothermal region after the fixed multiple at the time.
In particular, according to the present invention, there is provided a phase error detection apparatus, including detection means for detecting, based on a reference pattern including a record mark which appears repetitively at predetermined bit intervals, an error appearing in a phase difference between a magnetic domain wall displacement which occurs with a leading end of an isothermal region formed on a recording medium by irradiation of a laser beam and another magnetic domain wall displacement which occurs with a trailing end of the isothermal region.
The phase error detection apparatus may detect an error of the phase difference which occurs in a unit of the clock signal or an error of the phase difference which appears in a unit of time shorter than a clock signal.
According to another aspect of the present invention, there is provided a phase error detection method for detecting an error appearing in a phase difference between a magnetic domain wall displacement which occurs with a leading end of an isothermal region formed on a recording medium by irradiation of a laser beam and another magnetic domain wall displacement which occurs with a trailing end of the isothermal region, including a step of detecting a reference pattern including a record mark which appears repetitively at predetermined bit intervals, and a step of detecting an error of the phase difference which appears in a unit of time shorter than a clock signal based on the detected reference pattern.
With the phase error detection apparatus and method, not only a phase difference in a unit of a clock of a ghost signal from a data signal but also another phase difference which appears in a time shorter than the clock can be detected.
According to a further aspect of the present invention, there is provided a laser power control apparatus, including phase error detection means for detecting, based on a reference pattern including a record mark which appears repetitively at predetermined bit number intervals, an error appearing in a phase difference between a magnetic domain wall displacement which occurs with a leading end of an isothermal region formed on a recording medium by irradiation of a playback laser beam and another magnetic domain wall displacement which occurs with a trailing end of the isothermal region, amplitude detection means for detecting an amplitude of the predetermined bit number period of the reference pattern based on a clock signal, and control means for controlling a playback laser power based on a result of the detection from the phase error detection means and a result of the detection from the amplitude detection means.
The phase error detection means detects an error of the phase difference which occurs in a unit of the clock signal. The control means may discriminate an error of the phase difference which occurs in a unit of the clock signal based on the amount of jitters of the clock signal. In this instance, the control means may set a playback laser power when the amount of jitters exhibits a bottom and a 5 T amplitude detected by the amplitude detection means exhibits a peak.
The phase error detection means detects an error of the phase difference which occurs in a unit of time shorter than the clock signal. In this instance, the control means may discriminate the error of the phase difference which occurs in a unit of the clock signal and discriminate also the error of the phase difference which occurs in a unit of time shorter than the clock signal. Further, the control means may set the playback laser power when the amount of jitters exhibits a bottom and a 5 T amplitude detected by the amplitude detection means exhibits a peak and besides the error of the phase difference exhibits a zero cross.
According to a still further aspect of the present invention, there is provided a laser power control method, including a step of detecting, based on a reference pattern including a record mark which appears repetitively at predetermined bit number intervals, an error appearing in a phase difference between a magnetic domain wall displacement which occurs with a leading end of an isothermal region formed on a recording medium by irradiation of a playback laser beam and another magnetic domain wall displacement which occurs with a trailing end of the isothermal region, a step of detecting an amplitude of the predetermined bit number period of the reference pattern based on a clock signal, and a step of setting a playback laser power based on a result of the detection by the step of detecting a phase error and a result of the detection by the step of detecting amplitude.
With the laser power control apparatus and method, the playback laser power can be kept at an optimum level using not only a phase difference in a unit of a clock of a ghost signal from a data signal but also another phase difference which appears in a time shorter than the clock can be detected.
According to a yet further aspect of the present invention, there is provided a magneto-optical recording and/or playback apparatus, including optical pickup means including a laser light source for emitting a laser beam, the optical pickup means being operable to irradiate the laser beam emitted from the laser light source upon a playback layer laminated on a record layer of a magneto-optical recording medium to read an information signal recorded on the record layer of the magneto-optical recording medium by magnetic domain expansions which appear in an isothermal region of the magneto-optical recording medium which appears in response to the laser beam and output a corresponding received light amount signal, playback signal generation means for generating a sum component of the magneto-optical signal and a difference component of the magneto-optical signal based on the received light amount signal outputted from the optical pickup means, and laser power control means for controlling a playback laser power to be supplied to the laser light source based on the sum component and the difference component of the magneto-optical signal supplied thereto from the playback signal generation means.
The laser power control means may include phase error detection means for detecting, based on a reference pattern including a record mark which appears repetitively at predetermined bit number intervals, an error appearing in a phase difference between a magnetic domain wall displacement which occurs with a leading end of the isothermal region formed on the recording medium by irradiation of the playback laser beam and another magnetic domain wall displacement which occurs with a trailing end of the isothermal region, amplitude detection means for detecting an amplitude of the predetermined number period of the reference pattern based on a clock signal, and control means for controlling a playback laser power based on a result of the detection from the phase error detection means and a result of the detection from the amplitude detection means.
With the magneto-optical recording and/or playback apparatus, a data signal can be played back at a high S/N ratio from a magneto-optical disk making use of a ghost signal by magnetic wall displacement detection while the playback laser power is kept at an optimum level.

Phase error detection method for magnetic wall displacement type of magneto-optical recording device


A gripping force measurement device includes a body portion and a plurality of pressure sensors. The plurality of pressure sensors includes at least one first sensor and two or more second sensors including pressure-sensitive surfaces oriented in the same direction. A pressure-sensitive surface of the first sensor and the pressure-sensitive surfaces of the two or more second sensors are disposed such that, when a subject pressurizes the pressure-sensitive surface of the first sensor and the pressure-sensitive surfaces of the two or more second sensors, the gripping force measurement device is grippable by the subject.

Conventionally, various devices that acquire information on the hand such as finger force have been proposed. A hand dynamometer is an example of such a device. Patent Document 1 proposes, in addition to the hand dynamometer, a device that measures multidirectional force applied by a hand to evaluate finger's dexterity and ability to manipulate an object.


A method for checking at least three sensors which detect a measured quantity in the area of an internal combustion engine. A measure of the sensor signal of the particular sensor to be checked is compared to a reference signal which is obtained from at least one part of the sensor signals of the sensors to be checked. A sensor is recognized as defective on the basis of a comparison of the measure for the sensor signal with the reference signal. The reference signal is formed, for example, from a mean value of a measure of the sensor signals of at least one part of the sensors to be checked, the individual sensor signals being weighted using correction factors in forming the mean value. The sensors are temperature sensors or pressure sensors, for example, which may be situated in an intake area of the internal combustion engine, on the internal combustion engine itself, in an exhaust area, and/or in an exhaust gas treatment system.

To observe the limiting values of the exhaust gas in internal combustion engines, exhaust gas treatment systems are used which contain a catalytic converter, a particle filter or other components suitable for exhaust gas treatment, for example. The components used often operate in an optimum manner only in a certain temperature range. If the components have storage properties regarding at least one exhaust gas component, the laden state by the exhaust gas component must be monitored.
To detect the temperature as a measured quantity, temperature sensors are used, which may be situated in the intake area, on the internal combustion engine itself, or in the exhaust area. To detect pressure as a measured quantity, pressure sensors are used, which may be used to determine the laden state of a particle filter, for example. The pressure sensors detect the pressure difference occurring at the particle filter, which is a measure of the laden state. Additional pressure sensors may be situated in the intake area of the internal combustion engine.
If a sensor delivers an erroneous signal, this may result in erroneous control of the internal combustion engine and of the exhaust gas treatment system. The consequences include increased fuel consumption of the internal combustion engine and increased exhaust gas emissions.
Proper operation of the overall system is ensured only if the sensors used deliver a reliable sensor signal. German patent document no. 101 12 139 discusses a method for monitoring sensors which detect a measured quantity of an internal combustion engine. These may include temperature sensors, pressure sensors or other sensors. The individual sensor signals are compared to a reference signal delivered by an additional sensor, which is not involved in the diagnosis itself.
The sensor which is not involved in the diagnosis is situated at a point where there is a relatively light load on the sensors such as the intake area in which a temperature sensor is exposed to less temperature fluctuations than it would be in the exhaust area. Defective sensors are detected by forming the difference between the individual sensor signals of the sensors to be monitored and the reference signal of the non-monitored sensor and comparing it to the predefined threshold values. If no error is recognized in the preceding procedure steps, a plausibility check is finally performed by forming the differences between the signals of the sensors being monitored and comparing them to threshold values.

Method for testing at least three sensors, which detect a measurable variable for an internal combustion engine


The present invention is directed to systems and methods for acquiring media of the same event from multiple devices. The systems and methods enable wireless communication, specifically over a Bluetooth Low Energy (BLE) wireless personal area network, between multiple media devices, such as personal or consumer devices (i.e., consumer smartphones, tablets, wearable devices, including action cameras, or other computing devices capable to capturing media content in the form of image, video, or audio data) at an event. The systems and methods further enable synchronization, via a specialized timing protocol, between the multiple media devices, over the BLE network, including synchronization of the media content captured by each of the media devices at the event. The present invention further includes an accessory device configured to provide for expansion of communication and synchronization of media devices, specifically bridging a short range BLE network with a long range RF network.

Modern audio and video processing systems typically use multiple cameras for simultaneous audio and video recording of their subjects. For the multiple recordings to be effectively employed in post-production, where all of the raw recording materials are edited into a final recording, the audio and video signals from all utilized cameras must be carefully synchronized.
In a media synchronization system, acquiring media from multiple devices can improve the quality of the final media product. Conventionally, professional media production has been limited to information captured by professional equipment connected to synchronization equipment. This information is often inaccessible or difficult to access by the general public. As consumer media devices become more commonplace, consumers are routinely recording and photographing events. In many cases, consumers are also publishing and sharing these recordings and photographs with the public via social media platforms. While consumer media devices continue to develop, these devices are inherently limited to a single view from a particular location. Furthermore, these consumer media devices likely capture media with a lower quality than a professional setup.
Many media applications capture information using multiple devices. However, these multi-camera or multi-device configurations inherently pose significant data processing problems. That is, the devices must be synchronized together so that each media clip is embedded with timecode data and metadata that determines camera acquisition settings. Additional metadata can also be added at acquisition. Timecode information is used to identify a location in digital systems and on time-based media (e.g., audio or video tape) and is relied on for synchronization and reference throughout the audio, video, and post-production process. The Society of Motion Picture and Television Engineers ("SMPTE") genlock (Tri-level and Bi-Level sync signals) is an industry standard signal waveform that is relied on for synchronization and reference throughout the audio, video, and post-production process. Similarly, the audio and video signals from one camera at a given point in time may not properly align with the audio and video signals from a second camera. Without synchronization, the audio signals from one audio recorder at a given point in time may not properly align with the audio and video signals from a second camera.
In other words, if the devices are not synced, then each recorded clip of media will require manual synchronizing during post-production processing. This processing is both time consuming and expensive. During live events, streaming media feeds pose an even greater problem because there is no or a limited opportunity for post-production processing. Devices used for broadcasting live productions need to be synchronized together when the media is being recorded (e.g., in real-time). Therefore, ensuring that the devices are genlocked so that the cameras are in phase or synchronized with each other is important.

Synchronizing data between media devices


A method for fabricating a body contact silicon-on-insulator transistor (10) includes forming a semiconductor substrate (12) over an insulator (14) and lightly doping the semiconductor substrate (12) to form a body region (18). The method also includes forming a gate (20) over the semiconductor substrate (12) and separated from the semiconductor substrate (12) by a gate insulator layer (21). The gate (20) defines a source region (22), a drain region (24) and a contact region (26). The method also includes masking a portion (36) of the gate (20) and the contact region (26) and heavily doping the source region (22), the drain region (24) and an unmasked portion (36) of the gate (20) with a material having a conductivity substantially opposite a conductivity of the body region (18).

The present invention relates generally to the field of semiconductor fabrication and, more particularly, to a body contact silicon-on-insulator transistor and method.
Because of fundamental limitations on bulk insulated gate field defect transistors (MOSFETS), operational improvement of present devices generally requires significantly changing the basic operation of the transistor. One important area of development over the last several years has been the use of silicon-on-insulator (SOI) transistors to improve performance of MOSFETS.
SOI transistors generally include a silicon semiconductor substrate deposited over an insulating layer. SOI transistors also generally include an electrically isolated body formed in the silicon semiconductor substrate and disposed beneath a gate region of the transistor. Thus, SOI transistors generally require a body contact for coupling the body of the SOI transistor to a fixed potential. For example, SOI transistors generally require connecting a p-type conductivity body, in the case of an n-channel MOSFET, or an n-type conductivity body, in the case of a p-channel MOSFET, to a fixed potential.
One method of connecting the body of the SOI transistor to a potential is to provide an edge contact to the body. Proving an edge contact to the body generally requires a T-shaped or H-shaped gate poly layout. However, T-shaped and H-shaped gate poly layouts generally add significant parasitic capacitance to the SOI transistor due to the portion of the poly layer not contributing to drive current of the transistor, especially if the gate electrode properties are generally uniform.
Accordingly, a need has arisen for an improved method for manufacturing a body contact silicon-on-insulator transistor. The present invention provides a method for manufacturing a body contact silicon-on-insulator transistor that addresses shortcomings of prior methods and transistors.
According to one embodiment of the present invention, a method for fabricating a body contact transistor includes providing a semiconductor substrate on an insulator and lightly doping the semiconductor substrate to form a body region. The method also includes forming a gate on an upwardly facing surface of the semiconductor substrate and separated from the upwardly facing surface of the semiconductor substrate by a gate insulator layer. The gate defines a source region, a drain region, and a contact region. The method further includes masking a portion of the gate and the contact region and heavily doping the source region, the drain region, and an unmasked portion of the gate with a material having a conductivity substantially opposite a conductivity of the body region.
The method further includes heavily doping the contact region with a material having a conductivity substantially opposite to the conductivity of the source region and the drain region.
According to another embodiment of the present invention, a body contact transistor includes a body region of a first conductivity type formed over an insulator. The transistor also includes a source region and a drain region, each having a second conductivity type substantially opposite the first conductivity type. The source and drain regions are formed adjacent to the body region. The transistor further includes a gate formed over the body region and separated from the body region by a gate insulator layer. The gate includes a doped portion of a third conductivity type disposed adjacent the source region and the drain region. The third conductivity type is substantially opposite to the first conductivity type. The gate also includes an undoped portion disposed at an end of the gate and adjacent a contact region. The contact region is coupled to the body region.
Technical advantages of the present invention include substantially reducing the parasitic capacitance of a silicon-on-insulator transistor. For example, according to one aspect of the present invention, the gate of the transistor includes a doped portion and an undoped portion. The doped portion of the gate includes a conductivity type substantially opposite of a conductivity type of a body region of the transistor. Source and drain regions of the transistor are formed on either side of the doped portion of the gate. The undoped portion of the gate is disposed at an end of the gate and adjacent a contact region of the body. The undoped portion of the gate is electrically coupled to the doped portion of the gate through a silicide layer formed on an upwardly facing surface of the of the gate. Because of the creation of a depletion region in a portion of the gate proximate the gate insulator layer, the effective gate insulator thickness is increased, thereby substantially reducing the parasitic capacitance between the gate and the body region in the undoped portion region of the gate.
Other technical advantages will be readily apparent to one skilled in the art from the following figures, descriptions, and claims.

Body contact silicon-on-insulator transistor and method


Methods are disclosed, including for increasing the density of isolated features in an integrated circuit. Also disclosed are associated structures. In some embodiments, contacts are formed on pitch with other structures, such as conductive interconnects that may be formed by pitch multiplication. To form the contacts, in some embodiments, a pattern corresponding to some of the contacts is formed in a selectively definable material such as photoresist. Features in the selectively definable material are trimmed, and spacer material is blanket deposited over the features and the deposited material is then etched to leave spacers on sides of the features. The selectively definable material is removed, leaving a mask defined by the spacer material. The pattern defined by the spacer material may be transferred to a substrate, to form on pitch contacts. In some embodiments, the on pitch contacts may be used to electrically contact conductive interconnects in the substrate.

1. Field of the Invention
Embodiments of the invention relate to semiconductor processing and, more particularly, to masking techniques.
2. Description of the Related Art
There is a constant demand to decrease the sizes of integrated circuits. This decrease can be facilitated by reducing the sizes and separation distances between the individual elements or electronic devices forming the integrated circuits. This process of reducing the sizes of features and the separation distances between features can increase the density of circuit elements across a substrate and is typically referred to as "scaling." As a result of the continuing demand for smaller integrated circuits, there is a constant need for methods and structures for scaling.

Spacer process for on pitch contacts and related structures


Systems, methods, and computer program products are disclosed for improving ease in transmitting information between peer devices. Communications devices establish a peer group. Each communications device in the group assigns different sections of its touchscreen to the other devices in the group. To transfer information to another device in the group, the user swipes on the touchscreen towards the assigned section for the target communications device. Upon detecting the swipe, and determining that the swipe was towards the assigned section, the communications device initiates a transfer of the information to the target communications device. This may involve confirmation at the device or a paired device before transfer, or no confirmation. Receipt of the information at the target communications device may trigger notifications to be displayed. It may also trigger a request for acceptance of the transfer at the target communications device after which receipt is confirmed.

Transferring information between devices typically involves entering an address for the targeted recipient, e.g., an address that some device associated with the target recipient is able to access, followed by requesting that the information be transferred. This may be true even if the target recipient, and a capable device, is within some small distance from the initiating device (e.g., a predetermined number of feet from each other). This lacks the convenience made available from peer-to-peer communication technologies.
Devices that implement peer-to-peer technologies also are subject to drawbacks. Even when a peer connection is established, the user of the initiating device must still typically identify by some form of address the target recipient. In other situations, the devices are only configured to enable the transfer of information when just two devices are connected together via a network connection. This precludes situations, however, where there are multiple devices within an area that desire to share information with the other devices. Thus, there is a need for techniques to improve the ability for multiple networked devices to transfer information amongst each other with greater ease.
Embodiments of the present disclosure and their advantages are best understood by referring to the detailed description that follows. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures, wherein showings therein are for purposes of illustrating embodiments of the present disclosure and not for purposes of limiting the same.

Enhanced peer-to-peer networking exchange


A common power control channel transmission device for a base station in a CDMA communication system is provided having a selector for receiving power control commands to be transmitted to multiple subscribers and multiplexing the received power control commands; and a spreading modulator for spreading an output of the selector by multiplying the output of the selector by a spreading sequence. The common power control channel transmission device can be used to control power of a reverse link common channel. For the power control of the reverse link common channel, the base station receives a signal from a mobile station via the reverse link common channel, and transmits to the mobile station a power control command for controlling a transmission power of the reverse link common channel according to a measured strength of the received signal.

1. Field of the Invention
The present invention relates to a CDMA communication system, and in particular, to a power control device and method for controlling a reverse link common channel in a CMDA communication system.
2. Description of the Related Art
Code division multiple access (CDMA) mobile communication systems are based on the IS-95 standard which mainly supports voice service. It is foreseen that mobile communications will be performed in accordance with the IMT-2000 (International Mobile Telecommunication-2000) standard in the near future. The IMT 2000 standard provides not only voice service but also high speed packet service. For example, the IMT-2000 standard supports high quality voice service, moving picture service, Internet search service, etc.
The CDMA mobile communication system includes a forward link for transmitting a signal from a base station (BS) to a mobile station (MS) and a reverse link for transmitting a signal from the mobile station to the base station. A conventional CDMA mobile communication system cannot control power of a common channel for the reverse link. This is because an existing CDMA base station does not have structure for controlling the power of the reverse link common channel. Furthermore, it is difficult to send corresponding power control commands to the respective mobile stations using a forward link common channel in which several users receive one Walsh orthogonal channel. Therefore, it takes a long time for the mobile station to access the system through the reverse link common channel, and the mobile station can transmit a short message only. In addition, the mobile station accesses the system without knowing an appropriate initial system access power, thereby exerting influence on the system.
FIG. 1 illustrates a channel transmission device for transmitting a power control command in a conventional CDMA communication system. The illustrated channel transmission device may be used for a traffic channel or a control channel. In describing the channel transmission device, the input data is assumed to be full rate data of a 20 ms frame.
A cyclic redundancy check (CRC) generator 111 generates 12 CRC bits and adds the generated CRC bits to 172-bit frame data input. A tail bit generator 113 generates 8 tail bits and adds the generated tail bits to an end of the CRC-added frame data to enable an encoder 115 to initialize the data by the frame unit. When the 172-bit data is input, the data output from the tail bit generator 113 becomes 192-bit data. The encoder 115 then generates 576 symbols per frame by encoding one-frame data output from the tail bit generator 113, and an interleaver 117 interleaves the encoded data output from the encoder 115.
A bit selector 121 decimates a long code output from a long code generator 119 to match the length of the long code to the length of the interleaved encoded data. An XOR gate 123 XORs the interleaved encoded data and the decimated long code to scramble them. After that, a signal convert 125 maps the output signal levels of the XOR gate 123 by converting a signal level "0" to "+1" and a signal level "1" to "−1", and demultiplexes the converted signals by outputting odd-numbered data to an In-phase channel (first channel) and even-numbered data to a Quadrature-phase channel second channel). The I- and Q-channel converted signals are gain controlled in channel gain controllers 127 and 129, respectively.
A control bit gain controller 131 controls a gain of an input power control (PC) bit and provides the gain controlled power control bit to puncturers 133 and 135. The puncturers 133 and 135 puncture symbols located at the bit positions designated by a bit selector 121 and insert therein the power control bits output from the control bit gain controller 131. The symbols output from the puncturers 133 and 135 are multiplied by an Walsh code in multipliers 139 and 141, respectively, thus being orthogonally modulated.
Since, the number of the available orthogonal codes is limited in the CDMA communication system and many traffic channels should be assigned to the users for the data communication service, it is expected that the orthogonal codes will run short. Therefore, when the data communication is temporarily discontinued in the state where the traffic channel is formed, it is preferable to temporarily release an orthogonal code for the channel presently in service and reassign the orthogonal code at the time when the data communication is restarted. This increases utility efficiency in the use of the orthogonal codes.
However, the channel transmission device of FIG. 1 assigns the orthogonal code to transmit the power control command, even when there is no actual data to transmit (in other words, even in the case where data transmission is temporarily discontinued), thus resulting in an inefficient use of the orthogonal codes.

Power control device and method for controlling a reverse link common channel in a CDMA communication system