A liquid crystal display device includes first and second substrates, first and second polarizers on outer surfaces of the first and second substrates, a gate line and a data line on the first substrate, the gate line and the data line crossing each other to define a pixel area, a thin film transistor electrically connected to the gate and data lines, a pixel electrode connected to the thin film transistor, a color filter layer on the second substrate, the color filter layer having a first concave portion, a common electrode on the color filter layer, and a liquid crystal layer between the first and second substrates, the liquid crystal layer having a negative dielectric anisotropy with chiral dopants.

1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly, to a LCD device with a wide viewing angle.
2. Discussion of the Related Art
In general, a liquid crystal display (LCD) device includes two substrates that are spaced apart and face each other with a liquid crystal layer interposed between the two substrates. Each of the substrates includes electrodes that face each other, wherein a voltage applied to each electrode induces an electric field between the electrodes and within the liquid crystal layer.
The LCD device includes various liquid crystal modes. The liquid crystal mode used also drives whether an optical film is needed as well as what type of optical film is needed.
The liquid crystal layer includes a dielectric anisotropic material. Accordingly, when an electric field is applied to the liquid crystal layer, the liquid crystal molecules form a dipole due to the spontaneous polarization. Thus, the liquid crystal molecules of the liquid crystal layer are arranged by the applied electric field. Optical modulation of the liquid crystal layer occurs according to the arrangement of the liquid crystal molecules. Therefore, images are produced and displayed by the LCD device by controlling light transmittance of the liquid crystal layer due to optical modulation.
FIG. 1 is an exploded perspective view of a liquid crystal display (LCD) device according to the related art. In FIG. 1, an LCD device 51 has upper and lower substrates 5 and 22, which are spaced apart from and facing each other, and a liquid crystal layer 11 interposed between the upper and lower substrates 5 and 22.
The upper substrate 5 includes a black matrix 6, a color filter layer 7, and a transparent common electrode 9 subsequently disposed on an interior surface thereof. The black matrix 6 has an opening such that the color filter layer 7 corresponds to the opening of the black matrix 6 and includes three sub-color filters of red (R), green (G), and blue (B).
Gate lines 12 and data lines 24 are formed on an interior surface of the lower substrate 22, whereby gate lines 12 and date lines 24 cross each other to define pixel areas P. A thin film transistor T is formed at the crossing of a gate line 12 and a data line 24. The thin film transistor T is composed of a gate electrode, a source electrode, and a drain electrode. The thin film transistors of respective gate line 12 and data line 24 crossings are arranged in a matrix. A pixel electrode 17, which is connected to the thin film transistor T, is formed within a pixel area P and corresponds to the sub-color filters. In addition, the pixel electrode 17 is made of a transparent conductive material, such as indium-tin-oxide (ITO). The lower substrate 22 may be commonly referred to as an array substrate.
In operation, a scanning pulse is supplied to the gate electrode of the thin film transistor T through the gate line 12, and a data signal is supplied to the source electrode of the thin film transistor T through the data line 24.
However, the above-mentioned LCD device has a disadvantage of a narrow viewing angle. To overcome the narrow viewing angle, various methods, such as a multi-domain method, a phase compensation method, an in-plane switching (IPS) mode, and a vertical alignment (VA) mode, have been researched and developed.
In the multi-domain method, a pixel is divided into several regions, in each of which liquid crystal molecules are differently arranged, and the pixel has average properties of the regions. In the phase compensation method, a phase difference film, which may be referred to as a retardation film, is used to reduce changes in phase difference depending on viewing angles. In the IPS mode, liquid crystal molecules move in a plane substantially parallel to the substrates according to an electric field parallel to the substrate of the LCD device. In the VA mode, liquid crystal molecules having negative dielectric anisotropy are arranged vertically with respect to the substrate by a vertical alignment layer when voltage is not applied.
Among these methods, the VA mode has an additional advantage of fast response time as compared with twisted nematic (TN) mode, which is widely used in conventional LCD devices, because of small changes of response time to gray scale. The VA mode has a response time of about 30 ms as compared with the 50 ms of the TN mode, when the transmittance of the LCD device changes from 100% to 50%.
Generally, in the VA mode, a vertical alignment material, a liquid crystal material with negative dielectric anisotropy and a negative retardation film are used. Thus, the VA mode has a wide viewing angle, and has a high contrast ratio.
FIG. 2 is a cross-section view of a VA mode LCD device according to the related art; and FIG. 3 shows a state of the VA mode LCD device to be displayed.
As shown in the figures, a pixel electrode 17 is formed on an interior surface of a first substrate 22, and a black matrix 6, a color filter layer 7 and a common electrode 9 are subsequently formed on an interior surface of a second substrate 5, which is spaced apart from and facing the first substrate 22. A liquid crystal layer 11 is interposed between the first and second substrates 22 and 5. The liquid crystal layer 11 has a negative dielectric anisotropy, and liquid crystal molecules of the liquid crystal layer 11 may be vertically arranged between the first and second substrates 22 and 5. The pixel electrode 17 is patterned according to correspond to the pixel areas.
When voltage is applied to the pixel electrode 17 and the common electrode 9, electric field E substantially perpendicular to the substrates 5 and 22 is induced between the pixel electrode 17 and the common electrode 9, and the liquid crystal molecules of the liquid crystal layer 11 are arranged substantially perpendicular to the electric field E. At this time, in edges of the pixel electrode 17, the electric field may be bent a bit.
By the way, as shown in FIG. 3, the liquid crystal molecules of the VA mode appear irregular in each pixel P1, P2, and P3 if alignment layers (not shown) are not treated by an alignment treatment such as rubbing, or slit or hole is not formed in the pixel, for example. Thus, a viewing angle is unstable, and the response time is reduced. To widen and stabilize the viewing angle, the multi-domain method may be included within the VA mode by inducing fringe field around a slit or a hole of the pixel electrode.
An embodiment of the multi-domain by the hole is disclosed in U.S. Pat. No. 6,100,953, which is hereby incorporated by reference for all purposes as if fully set forth herein and described with respect to FIGS. 4A and 4B and FIG. 5. FIG. 4A is a schematic cross-sectional view of another VA mode LCD device according to the related art; and FIG. 4B is a plan view of a color filter substrate corresponding to the VA mode LCD device of FIG. 4A. FIG. 5 shows a pixel including multiple domains according to the related art.
As shown in the figures, a pixel electrode 17 is formed on an interior surface of a first substrate 22. A second substrate 5 is spaced apart from the first substrate 22, and a black matrix 6, a color filter layer 7 and a common electrode 9 are subsequently formed on an interior surface of the second substrate 5. The color filter layer 7 has a hole 30 exposing the second substrate 5 therein.
When voltage is applied to the pixel electrode 17 and the common electrode 9, electric field E is induced between the pixel electrode 17 and the common electrode 9. Here, the induced electric field E has different distribution around the hole 30. That is, since the electric field E is distorted by the hole 30, fringe field is formed around the hole 30. Therefore, multi-domains are formed in a pixel, as shown in FIG. 5.
In FIG. 5, the liquid crystal molecules are arranged uniformly in each domain A, B and C, and the LCD device are stably displayed with symmetry. However, the VA mode LCD device has still a problem of low brightness. This problem will be explained hereinafter with reference to FIG. 6. FIG. 6 schematically shows a plan view of the VA mode LCD device according to the related art when voltage is applied to the liquid crystal material.
In FIG. 6, liquid crystal molecules 11 are disposed between first and second polarizers, wherein optical axes 50 and 52 of the polarizers cross at right angles. The second polarizer, from which light is emitted, is usually referred to as an analyzer. The liquid crystal molecules 11 have negative dielectric anisotropy. As illustrated in FIG. 6, when voltage is applied to electrodes (not shown), the liquid crystal molecules 11 are arranged such that long axes of the liquid crystal molecules 11 are horizontal, that is, parallel to the substrates. By the way, the liquid crystal molecules 11 in regions F and G are parallel to the optical axes 50 and 52 of the first and second polarizers, respectively. Thus, light is not emitted in the regions F and G, and black state regions are formed in a white image. Since the black regions are shown on the substrate of the LCD device, white brightness is lowered.
To solve the problem, a VAC (vertical alignment with chiral dopants) mode, wherein chiral dopants are mixed with liquid crystal molecules to be vertical aligned, has been proposed, as shown in FIG. 7. FIG. 7 schematically shows a plan view of a VAC mode LCD device according to the related art when voltage is applied to liquid crystal molecules.
As shown in FIG. 7, the liquid crystal molecules 11 have a twisted structure between first and second polarizers due to a helical characteristic of chiral dopants. Thus, in regions F and G, where the liquid crystal molecules 11 are parallel to optical axes 50 and 52 of the polarizers, respectively, light is emitted due to birefringence of the liquid crystal molecules 11, and brightness is improved.
FIG. 8 shows transmittance (that is, brightness) versus voltage characteristics of a related art VA mode and a related art VAC mode. As shown in FIG. 8, the VAC mode has higher transmittance than the conventional VA mode at the same voltage.

Liquid crystal display device with wide viewing angle


A sieve for a grain combine has a plurality of longitudinal sections. Each section is pivotally mounted in a sieve frame. A sensing means senses if the combine is leaning to one side. The sensing means controls a drive and linkage mechanism for pivoting each of the sections relative to the sieve frame to maintain each section generally horizontal. Elastomeric seals extend between each of the sections. A distributor at the forward end of the sieve has a pair of sprockets and a chain extending perpendicular to the longitudinal axis of the sieve. Fingers protrude longitudinally from the chain. The chain is driven when the combine leans.

1. Field of the invention
This invention relates in general to combines for harvesting grain, and in particular to an apparatus for maintaining the sieve of the combine in a level position while the combine is leaning sideways on a hillside.
2. Description of the Prior Art
Combines of the type concerned herein are large, self-propelled vehicles for cutting and threshing grain. A combine has a header which has a blade that will cut the crop. An auger mounted to the header delivers the crop up into a threshing chamber. The threshed grain falls onto a set of upper and lower sieves. The sieves are oscillated in longitudinal directions and have a large number of fingers. Air blows upward through the sieves. The sieves separate the grain from the chaff, with the grain falling through slots between the fingers into a collection area for transport upward to a bin. The chaff will be blown from the combine.
A combine works best while it is level. The grain will be evenly distributed across the sieves while the sieves are level. However, a large percentage of the tillable acreage in the United States has hillside grades and terraces. Often it is necessary to cut the hillsides and terraces in back and forth sweeps, with the combine leaning laterally. When the combine leans, grain will be distributed onto the sieves unequally. The grain will pile up on certain portions of the sieves. This reduces the effectiveness of the separation between the chaff and the threshed grain.
Hillside combines are available. These combines have complex levelling mechanisms that level the entire combine relative to the header. While workable, levelling the entire combine is expensive.
Another approach to preventing uneven distribution of grain on the sieves is to place longitudinal dividers in the grain distributing pan that distributes the grain onto the sieves. Still, grain can pile up on one side. Also, mechanisms to level the grain distributing pan or to level the sieves relative to the rest of the combine have been proposed in the patented art.


A process for etching oxides having differing densities which is not only highly selective, but which also produces uniform etches is provided and includes the steps of providing an oxide layer on a surface of a substrate, exposing the oxide layer to a liquid comprising a halide-containing species, and exposing the oxide layer to a gas phase comprising a halide-containing species. The process desirably is used to selectively etch a substrate surface in which the surface of the substrate includes on a first portion thereof a first silicon oxide and on a second portion thereof a second silicon oxide, with the first silicon oxide being relatively more dense than the second silicon oxide, such as, for example, a process which forms a capacitor storage cell on a semiconductor substrate.

The present invention relates to a process for selectively etching one or more oxide layers on a surface of a substrate, and more particularly, to such a process in semiconductor device fabrication to etch silicon oxides.
In the manufacture of semiconductor devices, oxides of silicon are used in many different forms and for different applications. Dense, thermally grown or chemically deposited oxides may find use as dielectric films and insulating layers. Typical of such oxides is the class of tetraethylorthosilicate (TEOS) derived oxides.
Other less dense forms of silicon oxides are also used in semiconductor device fabrication where planarized insulating layers are desired. Examples of these types of oxides include doped oxides such as phosphosilicate glass (PSG), borosilicate glass (BSG), borophosphosilicate glass (BPSG), and boron or phosphorous-doped TEOS. Spin-on glass (SOG) is another porous oxide which is used, especially where planarization is desired.
Many semiconductor manufacturing processes require selective etching to remove one form of silicon oxide (typically a more porous form such as BPSG) in preference to another silicon oxide (typically a dense form such as TEOS) or other material (such as silicon). Where there is a desire for selective etching of different forms of silicon oxides, typically hydrogen fluoride (HF) is used as the primary etchant. However, wet etching using aqueous solutions of HF is not very selective, etching both dense and more porous forms of silicon oxides at similar rates. The art has moved to the use of vapor phase HF etching processes to achieve greater selectivity.
For example, Bergman, U.S. Pat. Nos. 5,235,995, 5,238,500, and 5,332,445 teaches a vapor etch process using a homogeneous mix of HF and water vapor as the etchant gas. Grant et al, U.S. Pat. Nos. 5,234,540 and 5,439,553, teach a vapor phase etching process using HF and an alcohol or organic acid. Mehta, U.S. Pat. No. 5,635,102, teaches a selective etching process which exposes the silicon oxides to alternating pulses of HF gas and inert gas causing selective etching of a porous silicon oxide layer (BPSG) in preference to a dense silicon oxide layer (TEOS). However, while such processes may be selective, some have resulted in an undesirable non-uniform etching of the oxide layers.
One example of a semiconductor fabrication process which requires selective etching of different silicon oxides is the formation of stacked capacitor structures to be used in storage devices such as high-density dynamic random access memories (DRAMs). Such structures are formed using a large silicon wafer as a substrate. Fabrication of these devices requires not only a highly selective etching process, but also one which uniformly etches the oxide layers across the surface of the wafer.
Accordingly, there remains a need in this art for an etching process for oxides having differing densities which is not only highly selective, but also produces uniform etches.

High selectivity etching process for oxides


The invention provides an organic EL device including a pair of electrodes and at least one luminescent layer located between the pair of electrodes, the luminescent layer including a blue phosphorescent material having a luminescence peak in a range of from 420 nm to less than 500 nm, a green phosphorescent material having a luminescence peak in a range of from 500 nm to less than 570 nm, a red phosphorescent material having a luminescence peak in a range of from 570 nm to 650 nm, and a charge-transporting material, the charge-transporting material having a lowest excited triplet energy level (T1) of 2.7 eV or more, and the T1 of the charge-transporting material being higher than the T1 of the blue phosphorescent material by 0.08 eV or more.

Apparatuses employing an organic electrolumimescence device (organic EL device) have been developed in recent years. For example, these apparatuses are formed by providing, on a substrate of glass or the like, an anode, an organic layer (such as a hole-transporting layer, a luminescent layer and an electron-transporting layer), a cathode, or the like, and connecting the same to an external wiring via wirings (terminals) of the two electrodes. When a voltage is applied between the electrodes, excitons are generated in the luminescent layer positioned between the electrodes, as a result of re-combination of holes and electrons, and excessive energy is emitted as light when the excitons return from the excited state to the ground state.
The apparatuses employing the organic EL device as mentioned above can reduce the thickness thereof as compared with display apparatuses employing a liquid crystal or the like. Moreover, when the apparatuses emit white light, these can be applied to a backlight for a liquid crystal display or a illumination device, in addition to a display for a television or a cellular phone.
In order to emit white light using an organic EL device, a method of forming three luminescent layers each emit light of red (R), green (G) and blue (B), respectively, and a method of dispersing three kinds of luminescent materials for RGB in a single luminescent layer, have been known.
For example, Japanese Patent Application Laid-Open (JP-A) No. 2001-319780 proposes a luminescent device having a luminescent layer that includes at least two kinds of luminescent materials, and at least one of these luminescent materials is an ortho-metallized complex, in order to improve luminescence efficiency or brightness as a white light source.
JP-A No. 2002-100476 proposes a luminescent device having a luminescent layer that includes a luminescent material and a host material, the luminescent material having a maximum luminescence peak wavelength of 500 nm, and the host material having a lowest excited triplet energy level that is higher than that of the luminescent material, in order to improve luminescent efficiency and color purity in emitting white light.
JP-A No. 2007-27092 proposes an organic EL device that emits white light, the device having a blue luminescent layer and a mixed luminescent layer of green and red, the mixed luminescent layer including a hole-transporting material, an electron-transporting material, and a phosphorescent material.

Organic electroluminescence device and luminescence apparatus


An input buffer for CMOS integrated circuits using sub-micron CMOS technology is affected by the presence of high voltage between various ports of a device. An improvement for such a buffer provides an input voltage limiting circuit making the device mode tolerant to high voltages while using low voltage tolerant CMOS devices. This improvement also reduces the switching level uncertainty due to manufacturing process variations by adding compensation devices to a first inverter stage in the input buffering stage so as to increase noise margin. A hysteresis characteristic is produced by the circuit thus reducing the effect of manufacturing process variation. The circuit can be easily interfaced to other blocks and safely operates in conjunction with relatively high voltage CMOS technology circuitry while achieving the high-speed advantage of thin gate oxide. Low power consumption is achieved by avoiding the possibility of DC current flow in the circuitry.

1. Technical Field of the Invention
The present invention relates to an improved input buffer for CMOS integrated circuits.
2. Description of Related Art
Input buffers are a very important subsystem for various blocks on Application Specific Integrated Circuits (ASICs). The input buffers are used as peripheral devices in a block for receiving data from other on-chip devices or external systems. As the operating speed of different blocks in a system varies, the circuitry is also used for buffering the input to the block. Further, the circuitry is used for reducing the parasitic input capacitance of the system as the total input capacitance is reduced to the parasitic input capacitance of the input buffer. Simple input blocks comprise a chain of inverter stages or Schmitt trigger circuitry for input buffering and input capacitance reduction. In order to attain minimum specified noise tolerance, an input low voltage, VIL, and an input high voltage, VIH, switch levels are specified.
With increasing complexity of ASICs, simple buffering and capacitance reduction is not sufficient for modern input circuitry. These systems have to communicate with several other systems working at different voltages. Hence the modern ASIC input buffers must provide protection for the CMOS devices inside the systems during interaction with other local logic blocks or external systems.
At process level, the device dimensions are continuously shrinking to sub-micron technology. Such sub-micron technology devices cannot tolerate high input voltage because of reliability issues due to gate oxide breakdown and punchthrough effect. The gate-oxide breakdown voltage and/or the punchthrough voltage between source and drain are the parameters used to define the maximum input voltage allowed between various nodes of a CMOS device. These devices can operate without experiencing stress due to gate oxide breakdown and punchthrough effects while the input transistor voltages |VGS|, |VDS| and |VGD| do not exceed a prescribed voltage. This has led to the development of low cost and low power integrated circuits requiring lower supply voltages.
With continuous reduction in the CMOS technology sizes and supply voltages, circuit designing for standard protocols is getting more challenging. To meet the standard protocols' electrical specifications, interface circuits using submicron technology devices must work at high input and supply voltages (e.g., 5V, 3.3 V and the like) with high reliability. Interfacing the low-voltage input buffers with high voltage circuitry is a major problem as high input voltage may result in devices experiencing temporary failure or in worst case it may even result in permanent damage to the device. The gate-oxide stress due to high input voltage causes threshold voltage of the device to fluctuate because of tunneling effect and results in reduced device lifetime. To overcome this problem, increasing gate oxide width and using an extended drain scheme can fabricate high voltage tolerant transistors. However, these devices increase the fabrication cost as the process requires extra masks to make device level tuning in the same CMOS baseline process. The fabrication process also results in performance degradation.
Another problem with using low voltage input buffers arises due to increasingly smaller difference between the voltage switch levels (VIL and VIH). An important parameter in these buffers is the toggle voltage, Vtgl, which is defined as the input voltage of an inverter chain, which produces 0.5Vdd at the output for supply voltage Vdd. The toggle voltage Vtgl is used as switching level for the logic in the digital circuits and this value lies between VIH and VIL. The minimum of the difference between Vtgl and VIH and Vtgl and VIL is used to determine the noise margin for the input buffer. For instance, if VIL is at 0.4Vdd and VIH is at 0.6Vdd, Vtgl must lie within the switching window of 0.2Vdd and the maximum noise margin is 0.1Vdd. As a result of reduction in the supply voltage, the switching window is getting progressively smaller resulting in reduced noise margin. This is a cause of concern as the variation in the integrated circuit manufacturing process can introduce a shift in the input switching voltage level Vtgl and result in further reduction in the noise margin for the circuitry.
FIG. 1 is a schematic diagram of a simple 5V tolerant input buffer operating at 3.3V nominal supply voltage. All CMOS devices used in the input buffer are designed in 3.3V CMOS technology. IN is connected to the drain of MOSFET M1, which translates the input signal to a lower voltage at the input node of the buffer for safe operation. When IN receives an input as high as 5V, the input node of the buffer is clamped to (VDDS-VtM1). Because of the substrate bias effect, the threshold voltage Vt of transistor M1 is high (over 1 V) and the buffer input node voltage is comparatively low resulting in safe transistor operation. However if VtM1 is too high, the buffer input node voltage is not sufficiently high resulting in static power consumption as two transistors in the input buffer are in weak inversion or strong sub-threshold mode. Moreover this structure cannot be used for low voltage CMOS devices (i.e. 2.5V) with a high supply voltage (i.e. 3.3V).
FIG. 2 is a schematic diagram of a prior art process compensated input buffer (see, for example, U.S. Pat. No. 6,184,704 to Wang et al.). An improved CMOS input buffer is shown. This improvement reduces the switching level uncertainty range and thus increases the noise margin by compensating for the manufacturing process variations. The invention uses diode connected Px and Nx transistors as resistive compensation devices in the first stage of a multistage digital input buffer. Threshold loss is compensated for by Pt, Nt devices in parallel with Nx, Px respectively. However, as the source of Pt is connected with the gate and drain of device Nx, this circuit does not provide independent control for process variation. Additionally compensation device is not on throughout the transition. Also, this structure cannot be used with low input voltage (i.e., 2.5V) with the input buffer having higher supply voltage (i.e., 3.3V).
Hence, there is need for an input buffer, which is capable of receiving a high input and supply voltage without experiencing degradation of gate oxide lifetime. Further there is need for an input buffer that provides good noise margin with process, temperature and voltage variation. Additionally, there is need for an input buffer that does not need increased process complexity in low voltage CMOS devices for protection against higher input and supply voltages.

Input buffer for CMOS integrated circuits


The invention includes a bag system for collecting a biological fluid, in particular blood. The system includes a device for collecting the fluid which is in fluid communication with at least one fluid collection bag, and a device for sampling the fluid to be collected which includes at least one sampling receptacle. The sampling device includes a device for transferring the fluid from the bag system into the sampling receptacle or receptacles, in which the transfer device is provided with a device for associating the receptacle or receptacles. The transfer device may be arranged to allow the support of the receptacle or receptacles in a standby position, the guidance of the receptacle or receptacles to a transfer position and, after transfer, the dissociation of the receptacle or receptacles from the bag system.

Biological fluids such as whole blood must be collected from a donor in a collection bag. To accomplish this, one normally uses a the bag system including in closed circuit, a device for collecting the blood which is in fluid communication with at least one blood collection bag. In addition, the system includes a device for sampling the blood which is intended to receive some of the blood taken. The device normally includes at least one sampling receptacle.
The use of such a sampling device makes it possible to obtain, in each receptacle, a sample of blood intended to be analysed, in particular for carrying out serology, virology and a blood count.
In particular, the bag system may be used by collecting the first milliliters of blood in the sampling device, which has a certain number of advantages. Firstly, this reduces the risk of contamination resulting from the presence of bacteria or other foreign substances on the skin of the donor because the first milliliters of blood collected, which are more likely to be affected by this contamination, are sent into the sampling device rather than into the collection bag. Secondly, this makes it possible to take samples before the collection bag is completely filled and consequently does not waste time. Finally, during the collection, the loss of blood volume for the donor may be compensated for the addition of plasma, resulting in a lower haematocrit reading than if the sampling device were filled after the collection bag, and consequently the count would be incorrect.
One problem which is posed is that of the difficulty in handling known bag systems. This is because the user must position several receptacles in order to obtain the samples, which gives rise to a loss of time.
One aim of the invention is in particular to resolve this problem by proposing a bag system in which each sampling receptacle is stored at the device for transferring fluid from the bag system into it, the receptacle then being able to be guided by the operator into the transfer device for collecting a sample.

This patent is subject to a terminal disclaimer.

Bag system with device for associating sampling receptacles


A speech decoding device is provided is capable of reducing degradation of speech quality caused by concealment processing performed when a loss of a packet has occurred, e.g., in speech packet communications using a VoIP (Voice over Internet Protocol) or the like. A decoding circuit decodes speech from a packet received through an input terminal and stores an internal signal in an updating buffer circuit, the internal signal produced in the decoding process and to be used in a decoding process for a subsequent packet to be subsequently received. The decoding circuit produces, based on the internal signal stored in the updating buffer circuit, concealed speech corresponding to a packet having not been received, and outputs the produced concealed speech. The internal signal is updated using the concealed speech.

1. Field of the Invention
The present invention relates to a speech decoding device and a speech decoding method, and more particularly to the speech decoding device and the method for decoding speech being capable of reducing degradation of speech quality caused by concealment processing to be performed when a loss of a packet has occurred, in speech packet communications using a VoIP (Voice over Internet Protocol) or a like.
The present application claims priority of Japanese Patent Application No. 2002-117187 filed on Apr. 19, 2002, which is hereby incorporated by reference.
2. Description of the Related Art
In packet-type speech communications such as a VoIP (Voice over Internet Protocol) system or a like, a transmitter combines one piece of speech frame data or a plurality of pieces of speech frame data obtained by encoding speech in a block unit of 10 msec or a like into one packet and, after having added information such as a produced time or a like to the packet, transmits it through a transmission path including the Internet or a like.
In the transmission path, a transmitted packet reaches a receiver through a plurality of repeaters such as a router, gateway, or a like. Since a packet is stored in a queue while passing through the repeater, there are some cases in which, if the repeater is put in a busy state, the packet is re-transmitted after much time has elapsed since its receipt or the packet is discarded due to no processing by the repeater in time. The receiver judges whether or not an order or a time given to a time stamp added to received packets is in compliance with predetermined rules. If it is not in compliance with the predetermined rules, the packet is regarded as lost. By using a concealment process to be performed on a portion corresponding to a lost packet, speech corresponding to the lost packet is decoded.
In the above concealment process, though its process varies depending on a method of encoding speech to be applied, based on information contained in packets having received before or after the lost packet, speech corresponding to the lost packet is produced. When a packet having been transmitted after the lost packet is used for the concealment process, a delay in decoding occurs because of receiving process of the packet.
A concealment process according to a CELP (Code Excited Linear Prediction) method being employed in various types of portable cellular phones is described, for example, in "Performance of the Proposed ITU-T 8 kb/s Speech Coding Standard for a Rayleigh Fading Channel" (IEEE Proc. Speech Coding Workshop, pp. 11-12, 1995) (Reference No. 1). A concealment process according to an ADPCM (Adaptive Differential Pulse Code Modulation) method being employed in a PHS (Personal Handy-Phone System) is described, for example, in "Improved ADPCM Voice Signal Transmission Employing Click-Noise Detection Scheme for TDMA-TDD Personal Communication System" (IEEE Trans. On Vehicular Technology, Vol. 46, No. 1, 1997) (Reference No. 2). Moreover, a same concealment process as used in the above ADPCM method can be applied to a band-splitting-type ADPCM method in which speech in a wide band of up to 7 kHz is encoded.
Examples of configurations of a conventional speech decoding device in which a packet loss concealment process is performed are explained by referring to FIGS. 9, 10, 11, and 12. FIG. 9 is a schematic block diagram showing an entire configuration of the conventional speech decoding device. FIGS. 10, 11, and 12 are schematic block diagrams illustrating speech decoding circuits employed in the conventional speech decoding device. That is, FIG. 10 is a block diagram showing an all-band-type decoding circuit to decode speech in all bands by using the CELP method and FIG. 11 is a block diagram showing an all-band-type decoding circuit to decode speech in all bands by using the ADPCM method. FIG. 12 is a block diagram showing a band-splitting-type decoding circuit to produce all band signals by performing an addition on signals obtained by splitting a band to decode speech.
Operations of the conventional speech decoding device are described by referring to FIG. 9. An input terminal 15 receives a packet and passes it to a decoding circuit 30. The input terminal 15 receives loss information indicating whether or not there is a loss of a packet and passes the information to the decoding circuit 30. The decoding circuit 30 decodes speech from packets fed from the input terminal 15 according to the loss information fed from an input terminal 10. Moreover, when speech is decoded from each of packets, an internal signal contained in a previous packet fed from a buffer circuit 35 is used. Then, after the decoding, the internal signal contained in the previous packet to be used in decoding a subsequent packet is passed to the buffer circuit 35. The internal signal to be used varies depending on a speech encoding method. Concrete examples of the decoding circuit 30 will be explained later by referring to FIGS. 10 and 11. Finally, decoded speech is passed to an output terminal 45. The buffer circuit 35 stores the internal signal fed from the decoding circuit 30 and passes the internal signals that had been stored at a time of speech decoding from a subsequent packet to the decoding circuit 30. The output terminal 45 outputs the decoded speech fed from the decoding circuit 30.
FIG. 10 is a block diagram showing an example of a conventional decoding circuit employed in a decoding device using the CELP method, in which the decoding circuit 30 shown in FIG. 9 is provided as a decoding circuit 203 in FIG. 10. The CELP method is described in "Code—Excited Linear Prediction: High Quality Speech at Very Low Bit Rates (IEEE Proc. ICASSP-85, pp. 937-940, 1985) (Reference No. 3). In the encoding device operated according to the CELP method, input speech is split into a linear prediction (LP) coefficient portion showing a spectrum enveloping characteristic obtained by a linear prediction (LP) analysis and an exciting signal used to drive an LP synthetic filter made up of the above LP coefficient portion to perform encoding. The LP analysis and encoding of the LP coefficient portion are performed for every frame having a predetermined length. Encoding of the exciting signal is performed for every sub-frame having a predetermined length obtained by further dividing the frame. Here, the exciting signal is made up of a pitch component representing a pitch period, a residual component other than the pitch component and a gain of each of the these components. The pitch component representing a pitch period of an input signal is expressed by an adaptive code vector stored in a code book called an "adaptive code book" holding exciting signals received in the past. The above residual component is expressed by a signal designed in advance called a "speech source code vector". As this signal, a multi-pulse signal made up of a plurality of pulses, a random number signal, or a like are used. Information about a speech source code vector is stored in a speech source code book. In the CELP-type decoding device, by inputting an exciting signal calculated from the decoded pitch period component and the residual signal into a synthetic filter made up of the decoded LP coefficient portion to calculate decoded speech.
Next, operations of the decoding circuit 203 (CELP-type) are described by referring to FIG. 10. In this specification, to simplify descriptions, a case where one frame is contained in one packet is described, however, even if a plurality of frames is contained in one packet, decoding is made possible by repeating operations in a same manner as described below. An input terminal 50 receives a packet and passes it to a speech source analyzing circuit 65, a pitch predicting circuit 68, and a synthetic filter circuit 88. An input terminal 55 receives loss information and passes it to the synthetic filter circuit 88, the speech source analyzing circuit 65, and the pitch predicting circuit 68. The speech source analyzing circuit 65 decodes a speech source code vector and its gain by using information indicated by a packet fed from the input terminal 50 and passes a speech source signal obtained by adding up the speech source code vector and its gain to an adder 75. However, if the loss information fed from the input terminal 55 indicates occurrence of loss of a packet, the speech source analyzing circuit 65 produces a pseudo speech source signal such as a random number or a like and passes it to the adder 75. The pitch predicting circuit 68 decodes an adaptive code vector and its gain by using information indicated by the packet fed from the input terminal 50 and passes a pitch period signal obtained by adding up the adaptive code vector and its gain to the adder 75. The adaptive code vector is obtained by allocating the adaptive code vector being stored as an internal signal from the buffer circuit 35 being placed outside and being connected through an input/output terminal 80. If the loss information fed from the input terminal 55 indicates occurrence of loss of a packet, a signal made up of, for example, "zero" is passed to the adder 75 as a pitch period signal. The adder 75 feeds an exciting signal obtained by adding up a speech source signal fed from the speech source analyzing circuit 65 and a pitch period signal fed from the pitch predicting circuit 68 to the synthetic filter circuit 88 and, at a same time, passes it as an internal signal through the input/output terminal 80 to the buffer circuit 35 (FIG. 9) being placed outside. The synthetic filter circuit 88 decodes an LP coefficient portion using information about a packet fed from the input terminal 50. Then, the synthetic filter circuit 88 constructs a synthetic filter by using the decoded LP coefficient and decodes speech by driving this filter using an exciting signal fed from the adder 75 and passes it to an output terminal 90. Providing that the LP coefficient is a(i), i=1, . . . , p, decoded speech x(t) can be calculated from an exciting signal e(t) by a following equation:
                              x                                (            t            )                          =                              e                                      (              t              )                                +                                    ∑                              i                =                1                            p                                                                  a                                                  (                  i                  )                                            ×                              (                                  t                  -                  i                                )                                                                        Equation                                                            (          1          )
To solve the equation (1), decoded speech x (t−i), i=1, i=1, . . . , p received in the past is stored as an internal signal through the input/output terminal 80 in the buffer circuit 35 placed outside and is read into the decoding circuit 203 through the input/output terminal 80 when necessary. Here, "p" is an order of the LP coefficient. If the loss information fed from the input terminal 55 indicates occurrence of loss of a packet, the LP coefficient portion decoded from, for example, a previous packet is again used. The input/output terminal 80 outputs an exciting signal fed from the adder 75 as an internal signal to the buffer circuit 35 placed outside. Also, the input/output terminal 80 passes an adaptive code vector fed from the buffer circuit 35 placed outside in accordance with a pitch period fed from the pitch predicting circuit 68 as an internal signal to the pitch predicting circuit 68. Moreover, the input/output terminal 80 outputs decoded speech received in the past and fed from the synthetic filter circuit 88 as an internal signal to the buffer circuit and receives the decoded speech at a time when a subsequent packet is decoded and passes it to the synthetic filter circuit 88. The output terminal 90 outputs decoded speech fed from the synthetic filter circuit 88. In the CELP method, by performing filtering used to accentuate a spectral peak, which is called "post-filtering", on decoded speech output from the output terminal 90, acoustic quality of decoded speech can be improved.
FIG. 11 is a block diagram showing an example of a decoding circuit employed in a decoding device using the CELP method, in which the decoding circuit 30 shown in FIG. 9 is provided as a decoding circuit 204 in FIG. 11. The ADPCM method is described in "Overview of the ADPCM Coding Algorithm" (IEEE Proc. Of GLOBECOM' 84, pp. 774-777, 1984) (Reference No. 4). In the ADPCM-type encoding device, a predicting signal is subtracted from input speech for every sample and a resulting differential signal is encoded by a non-linear adaptive quantizer. Next, by using an output code obtained by the encoding, adaptation and adaptive reverse quantization processes are performed on a scale factor for quantizing. Reproduced speech is obtained by adding a predicting signal to the quantized differential signal obtained by the adaptive reverse quantization. An adaptive predicting device, by using these quantizied differential signal and reproduced speech, calculates a predicting signal. A decoding device performs a decoding process by calculating a predicting signal by same operations as performed in the encoding device. More particularly, the decoding device, by using a received quantized code, performs adaptation and adaptive reverse quantization of a scale factor for quantizing. Next, the adaptive predicting device, by using these quantized differential signal and reproduced speech, calculates a predicting signal of input speech. Finally, reproduced speech is obtained by adding a predicting signal to the quantized differential signal obtained by the adaptive reverse quantization.
Next, operations of the decoding circuit 204 (ADPCM-type) are described by referring to FIG. 11. When the ADPCM method in which an output code is obtained for every input speech sample is applied to packet communications, quantized codes are combined, for example, every 10 msec and transmitted as one packet. The input terminal 50 receives a packet and passes it to a reverse quantizing circuit 95 and a scale adaptive circuit 110. The input terminal 55 receives loss information and passes it to the reverse quantizing circuit 95, the scale adaptive circuit 110, a speed controlling circuit 115, and an adaptive predicting circuit 105. The reverse quantizing circuit 95 decodes a differential signal dp(k) by using a scale coefficient fed from the scale adaptive circuit 110 and by reverse-quantizing a code contained in a packet fed from the input terminal 50 and passes it to an adder 100 and the adaptive predicting circuit 105. If the loss information fed from the input terminal 55 indicates occurrence of loss of a packet, a signal made up of "zero" is output. The scale adaptive circuit 110 calculates a scale coefficient by using information I(k) contained in a packet fed from the input terminal 50 and a speed controlling coefficient al(k) fed from the speed controlling circuit 115 and passes a result from the calculation to the reverse quantizing circuit 95 and the speed controlling circuit 115. A scale controlling factor y(k) at a time "k" is obtained using a speed controlling coefficient al(k), a high-speed scale coefficient yu(k−1) received in the past, and a low-speed scale coefficient yl(k−1) by a following equation:y(k)=al(k)yu(k−1)+(1−al(k))yl(k−1)  Equation (2)Here, a high-speed scale coefficient yu(k) and a low-speed scale coefficient yl(k) at a time "k" are updated, based on the scale controlling coefficient y(k) at the time "k" when the above scale coefficients were calculated, by following equations:yu(k)=(1−2−5)y(k)+2−5W[I(k)]  Equation (3)yl(k)=(1−2−6)yl(k−1)+2−6yu(k)  Equation (4)where W[X] is a function using "X" as an argument, and reference is made to a predetermined table. Moreover, the scale adaptive circuit 110 outputs a high-speed scale coefficient yu(k) and a low-speed scale coefficient yl(k) both being obtained by solving the equations (3) and (4), as an internal signal from the input/output terminal 80, stores them in the buffer circuit 35 being placed outside, and then again receives them as a previous sample's coefficients yu(k−1) and yl(k−1) from the input/output terminal 80 for use when solving the equations (3) and (4) next. When the loss information fed from the input terminal 55 indicates occurrence of loss of a packet, while a concealment process is being performed on the packet, equations (3) and (4) are not updated. The speed controlling circuit 115, by using following equations, calculates a speed controlling coefficient al(k) from a scale coefficient y(k) fed from the scale adaptive circuit 110.
                              al                                (            k            )                          =                  {                                                                                1                      ,                                                                                ap                                                                          (                                                      k                            -                            1                                                    )                                                                    >                      1                                                                                ap                                                                          (                                                      k                            -                            1                                                    )                                                                    ,                                                                                ap                                                                          (                                                      k                            -                            1                                                    )                                                                    ≤                      1                                                                                where                                              Equation                                                            (          5          )                                                  ap                                (            k            )                          =                  {                                                                                [                                                      1                            -                                                          2                                                              -                                4                                                                                ]                                                                                ap                                                                                (                                                          k                              -                              1                                                        )                                                                                +                                              2                                                  -                          3                                                                                ,                                                                                                                                                        dms                                                                                (                            k                            )                                                                          -                                                  dml                                                                                (                            k                            )                                                                                                                        >                                                                  2                                                  -                          3                                                                                dml                                                                          (                          k                          )                                                                                or                                                                                y                                                                          (                          k                          )                                                                                <                    3                                                                                [                                                  1                          -                                                      2                                                          -                              4                                                                                ]                                                                                ap                                                                          (                                                      k                            -                            1                                                    )                                                                                ,                                                                                other                                                                                Equation                                                            (          6          )                    dms(k)=[1−2−5]dms(k−1)+2−5F[I(k)]  Equation (7)dml(k)=[1−2−7]dml(k−1)+2−7F[I(k)]  Equation (8)where F[X] is a function using "X" as an argument, and reference is made to a predetermined table. Moreover, the speed controlling circuit 115 outputs the coefficients ap(k), dms (k), and dml(k) all being obtained by solving the equations (6) to (8) as internal signals from the input/output terminal 80, stores them in the buffer circuit 35 being placed outside, and then again receives them as a previous sample's coefficients ap(k−1), dms(k−1) and dml(k−1) from the input/output terminal 80 for use when solving the equations (6) to (8) next. When the loss information fed from the input terminal 55 indicates occurrence of loss of a packet, while a concealment process is being performed on the packet, equations (6) to (8) are not updated. The adaptive predicting circuit 105, by using a differential signal dp(k) fed from the reverse quantizing circuit 95, a predicting signal se(k−1), i=1, . . . , 2 received in the past fed through the input/output terminal 80 from the buffer circuit 35 placed outside, and a differential signal dp(k−1), i=1, . . . , 6 received in the past, calculates a predicting signal se(k) at a time "k" by following equations and passes a result from the calculation to the adder 100.
                              se                                (            k            )                          =                                            ∑                              i                =                1                            2                                                                  a                                                  (                                      i                    ,                                          k                      -                      1                                                        )                                                                          sr                                                  (                                      k                    -                    i                                    )                                                              +                      sez                                      (              k              )                                                          Equation                                                            (          9          )                    where,sr(k−i)=se(k−i)+dq(k−i)  Equation (10)
                              sez                                (            k            )                          =                              ∑                          i              =              1                        6                                                        b                                            (                                  i                  ,                                      k                    -                    1                                                  )                                                                dq                                            (                                  k                  -                  i                                )                                                                        Equation                                                            (          11          )
Moreover, "a(i, k−1)" and "b(i, k−1)" are predicting coefficients and are updated based on dp(k) by following equations so as to be a(i, k) and b(i, k) respectively.b(i,k)=[1−2−8]b(i,k−1)+2−8sgn[dq(k)]sgn[dq(k−i)],i=1, . . . , 6  Equation (12)a(1,k)=[1−2−8]a(1,k−1)+3·2−8sgn[p(k)]sgn[p(k−1)]  Equation (13)a(2,k)=[1−2−7]a(2,k−1)+2−7sgn[p(k)]sgn[p(k−2)]−f[a(1,k−1)]sgn[p(k)]sgn[p(k−1)]  Equation (14)where,p(k)=dq(k)+sez(k)  Equation (15)
                              f                                (            x            )                          =                  {                                                                                4                                        x                                    ,                                                                                                    x                                                        ≤                                      2                                          -                      1                                                                                2                                                              sgn                                                                    (                        x                        )                                                                              ,                                                                                                    x                                                        >                                      2                                          -                      1                                                                                Equation                                                            (          16          )                    however;|a(2,k)|≦0.75  Equation (17)|a(1,k)|≦1−2−4−a(2,k)  Equation (18)where sgn [X] represents a code of "x". The adaptive predicting circuit 105 stores dq(k) fed from the reverse quantizing circuit 95, se(k) calculated by the equations (9) to (10) and a(i, k) and b(i, k) calculated by the equations (12) to (14) through the input/output terminal 80 in the buffer circuit 35 being placed outside and uses them as a previous sample's coefficients dp(k−1), se(k−1), a(i, k−1), and b(i, k−1) when solving the equations (9) to (14) next. When the loss information fed from the input terminal 55 indicates occurrence of loss of a packet, while a concealment process is being performed on the packet, equations (12) and (14) are not updated. The adder 100 passes decoded speech obtained by adding up a reverse quantized signal fed from the reverse quantizing circuit 95 and a predicting signal fed from the adaptive predicting circuit 105 to the adaptive predicting circuit 105 and the output terminal 90. The output terminal 90 outputs the decoded speech fed from the adder 100. Moreover, in the concealment processing performed according to the ADPCM method, instead of a code I(K) lost due to loss of a packet, a code which makes a reverse quantized signal become zero or a small value (for example, an absolute value is less than 7) may be used. This causes decoded speech to become a small value.
FIG. 12 is a schematic block diagram showing an example of configurations of the decoding circuit 30 in a band-splitting speech decoding device. When a signal in each band is encoded, various methods including the CELP, the ADPCM method, or a like can be applied. A typical method is an ITU-T G.722 method, which is described in, for example, "7 kHz Audio Coding within 64 kbit/s" (ITU-T Recommendation G. 722, 1988) (Reference No. 5).
Next, operations of the band-splitting type speech decoding circuit are described by referring to FIG. 12. An input terminal 121 receives a packet and passes it to a low-band decoding circuit 66 and a high-band decoding circuit 67. An input terminal 56 receives loss information and passes it to the low-band decoding circuit 66 and the high-band decoding circuit 67. The CELP method shown in FIG. 10 and the ADPCM method shown in FIG. 11 can be applied to the low-band decoding circuit 66 and/or the high-band decoding circuit 67. The low-band decoding circuit 66 decodes speech having signals in a low frequency band (for example, less than 4 kHz) according to the loss information fed from the input terminal 56 by using a packet fed from the input terminal 121 and passes the decoded speech to a band adder 43. The low-band decoding circuit 66 receives and transmits an internal signal through the input/output terminal 80 from and to the buffer circuit 35 being placed outside. The high-band decoding circuit 67 decodes speech having a band signal corresponding to a high frequency band (for example, 4 kHz or more) according to the loss information fed from the input terminal 56 by using a packet fed from the input terminal 121 and passes the decoded speech to the band adder 43. Moreover, the high-band decoding circuit 67 receives and transmits an internal signal through the input/output terminal 80 from and to the buffer circuit 35 placed outside. The band adder 43 performs up-sampling on the high-band speech as a component of a high frequency band fed from the high-band decoding circuit 67 and adds this up-sampled speech to a signal obtained by performing up-sampling on the low-band speech as a component of a low frequency band fed from the low-band decoding circuit 66 to decode wide-band speech and passes the decoded speech to an output terminal 51. The output terminal 51 outputs the wide-band decoded speech fed from the band adder 43.
Thus, in the conventional speech decoding device, when loss of a packet occurs, speech corresponding to a portion of speech that has been lost is decoded by using concealment processing. However, the conventional speech decoding device has a problem in that, in the prediction encoding method in which encoding and decoding are performed by using internal signals received in the past, an abnormal large amplitude occurs at a time of decoding packets following the concealment processing and therefore degradation of speech quality occurs. This is because internal signals having not been updated or having been initialized are used in decoding processes, which causes a great difference in internal signals that should be matched between in encoding and decoding processes.

Reduction of speech quality degradation caused by packet loss


According to an embodiment of the present invention, an artifact is received, and unstructured content of the artifact is parsed and analyzed to identify data for one or more of missing structured content of the artifact and inaccurate structured content of the artifact. The identified data is then added to the artifact. Embodiments of the present invention can be used, for example, to provide data for missing and inaccurate structured content in artifacts of Application Lifecycle Management (ALM) frameworks, and improve accuracy of structured information that used to run queries and create reports.

The present invention relates generally to application lifecycle management (ALM) systems, and more particularly to increasing accuracy of links and structured data in ALM systems.
ALM frameworks provide product lifecycle management capabilities (e.g., governance, development, and maintenance) for software development and other collaborative endeavors. ALM frameworks provide services (e.g., cross-application linking) that enable different ALM applications to share information during development processes and help ensure that all users and user activities are synchronized.

Increasing accuracy of traceability links and structured data

International Business Machines Corporation


A security system monitors the trustworthiness and firewall configurations of a set of clients, where a firewall configuration comprises a set of firewall rules that control access by an application to network communication functionalities of a client. Based on the firewall rules used by other clients and the reputation of those clients, the system determines a set of default firewall rules by selecting one or more rules that are used by the more trustworthy clients. The default firewall rules are made available to other clients, which may use these default rules. This leverages community knowledge about how much network access to allow for a particular application.

This invention relates generally to computer security software, and more particularly to configuring a firewall on a client for an application using reputation information and firewall configuration of other existing clients.
Private networks, such as those operated by businesses or other enterprises, are often connected a public network such as the Internet. The private networks typically include a firewall positioned at the intersection of the private and public networks. The firewall monitors traffic passing between the networks and blocks unauthorized and/or malicious traffic. The firewall thus prevents malicious entities on the public network from accessing the resources of the private network, and prevents entities on the private network from accessing unauthorized resources of the public network.
A more recent trend in network security is to run so-called "personal firewalls" on the computer systems used by the end-users to access the network. For example, the desktop computer utilized by an employee of an enterprise can run a personal firewall. The personal firewall monitors network activity to/from the computer and blocks malicious traffic.
An advantage of a personal firewall is that it can apply a different security policy to each process executing on the computer. When a personal firewall is first installed on a computer, the personal firewall typically detects each attempt by a process to access the network. With each attempt, the firewall presents a dialog box to the end user, saying something to the effect of: "Process X has attempted to access the Internet. Allow it to proceed?" The end-user responds to the dialog box by indicating whether the firewall should allow or block the network access. The personal firewall remembers the end-user's choices and applies the same security policy next time the process attempts to access the network.
A problem with relying on end users to establish security policies is that the end users are often not sophisticated enough to evaluate the security threat posed by a given process. A typical end user might not have any idea whether a process should be allowed to access the network. Some personal firewalls attempt to solve this problem by including additional information in the dialog box, such as the destination address and/or protocol of the access request. However, this additional information often serves to confuse the end user further. Another problem with this approach is that the personal firewall will remember and continue to apply the end user's decision, even if it was incorrect.
A security vendor may create firewall rules, which may apply to particular applications, using either or both automatic and manual processes. These firewall rules are then part of the stock configuration of the security vendor's firewall product. But whether the rules are generated automatically by the software or manually by a user, the rules may be too permissive or too restrictive. As a result, applications running on the user's client system may be wrongly allowed or wrongly denied to communicate over the network.

Determining firewall rules for an application on a client based on firewall rules and reputations of other clients


A multiple mode display apparatus and methods of use. An apparatus includes a display surface with a first and a second display area. A housing pivotally attached with the display proximate a first edge of the housing is displaceable from a coplanar position with the surface of the display device to a position wherein an angle of at least 90 degrees between the surface of the display and the housing is formed along said first edge. In the first position, the first display area is visible and activated to receive user input or to display output. The second display area is covered by the housing and placed in a mode of reduced power consumption. In the second position, the second display area is visible and activated to display output.

Today, a personal computing and/or communicating device such as a laptop or notebook computer, for example, or a tablet or palm-held computer, has a single typical mode of use. The display of a tablet computer, for example, may be touch-sensitive for interactive user input by a stylus or pen-like device. A notebook, on the other hand, may accept interactive user input through a keyboard or a pointing device such as a mouse or a touch pad. While personal computing and/or communicating devices are rapidly changing, with new technologies for displays, pointing devices, keyboards and such, the mode of interactive user input for a particular device is typically limited to a small number of fixed functional options with some support for the addition of peripheral devices and docking configurations.
Another common characteristic of current personal computing and/or communicating devices is the importance of battery life. System manufacturers go to great lengths to conserve power and charge premiums for the latest battery technologies. Processors have design features such as automatic frequency reduction directed at limiting power consumption and display devices dim backlighting when on battery power. Systems put themselves into a standby mode after a period of no user input or when power reserves reach a critical level.
At times, it may be inconvenient for a user to have such a limited range of options. A particular user may most often need to interact with a device while holding the device in one hand, but must store or carry along one or more peripherals in order to read data from a disk or to interact with the device through a keyboard or view a full color display. If an extra battery is not readily available, the user may be forced to terminate interactive use of the device until an alternative power source is available. This situation is especially prevalent since current display devices require a significant portion of a battery's power reserves. A user carrying a notebook computer may not require a full color display or even a keyboard to read email but the device may not be so flexible as to permit easy reconfiguration.


A hydraulic jar for use in a well and a method of operating same in which an outer housing assembly extends around an inner mandrel assembly in a coaxial relation thereto to define two fluid chambers separated by a piston. The housing assembly is movable relative to the mandrel assembly to force the fluid from one of the chambers to the other. The fluid flow rate is varied between a relative low flow rate and a relative high flow rate in response to the relative position of the housing assembly causing corresponding movement at the latter assembly. A high impact load is transferred to a member connected to the jar in response to a movement at the relatively high flow rate. The jar can be used to create a high impact load in both an upward direction and a downward direction.

1. Field of the Invention
This invention relates to a jar for providing high impact loading in a well and a method of operating same, and, more particularly, to such a jar and method in which the loading can be in both an upward and downward direction.
In various downhole operations in wells for producing hydrocarbon fluids, high impact loading is often necessary to retrieve or set tools for servicing the wells. Both mechanical and hydraulic jars have evolved which are lowered into the wellbore in a well tool string including an accelerator and a stem, which together function to produce a high impact load. In the case of an up jar, the load is directed upwardly to retrieve tools, remove obstructions and the like. In the case of a down jar the load is directed downwardly to set tools, plugs, flow control devices, and the like.
The need for efficient jars becomes more acute in wells that deviate from the traditional vertical orientation, since the angular disposition of at least a portion of the well increases the friction in the well and dissipates some of the vertical thrust needed to activate the jars. Further, the advent of coil, or reeled, tubing, which requires a jar that passes fluid used to service the well, places additional design limitations on the up and down jars, especially from a size standpoint.
In view of these structural and functional demands, a separate jar has to be designed and used for the up operation and a separate jar for the down operation, thus adding to the overall cost of the well service tools. The jars disclosed in U.S. Pat. Nos. 2,828,822 and 2,851,110, issued to C.B. Greer on Apr. 1, 1958, and Sep. 9, 1958, respect are exemplary of hydraulic jars that can only operate in an upward direction. Thus an entirely different jar would have to be designed for use in a downward direction.

Hydraulic up-down well jar and method of operating same


A self-adjusting braking device for weft feeders, comprising a frustum-shaped braking body that acts on a thread, is suspended elastically in front of the drum of the feeder and is pushed into elastic tangent contact with the drum along an exit circumference of the drum. The braking body has, at a larger-diameter region thereof designed to make contact with the drum, a discontinuous annular contact element, with a plurality of through slits which are arranged so as to be equidistant and delimit a row of contact laminas.

The present invention relates to a self-adjusting braking device for units for feeding weft to textile machines in general and particularly to weaving looms of the gripper or bullet type.
More specifically, the invention relates to self-adjusting braking devices of the type disclosed in EP-0 536 088 and in Italian patent 1,259,567, referenced hereinafter briefly as conventional devices.
Weft feeders are devices used in weaving processes and typically comprise a fixed cylindrical drum on which an arm that rotates in a fishing-reel fashion winds a plurality of turns of thread that constitute a weft reserve, means for producing the advantage of the turns from the base toward the end of the drum, and braking means for braking at the exit the thread that unwinds from the drum when requested by the loom or the like at each weft insertion and impart thereto the correct mechanical tension, which is indispensable for the correct unwinding of the thread.
The expression xe2x80x9cself-adjusting braking devicesxe2x80x9d is used to designate, in the present description, braking means capable of automatically varying the braking action applied to the thread that unwinds from the drum of the feeder when the advancement speed of the thread varies, in order to keep its mechanical tension substantially constant.
For this purpose, the conventional self-adjusting braking devices are constituted by a substantially frustum-shaped braking body, which is suspended elastically in front of the fixed drum of the feeder, to which it is tangent at an exit circumference that is slightly smaller than the maximum circumference of the drum; the drum, in order to facilitate the unwinding of the thread, has a rounded exit rim whose cylindrical surface is blended with the flat front one.
The thread advances between the drum and the frustum-shaped braking body, onto which it discharges the axial component of its mechanical tension. When the tension rises, as the advancement speed of the thread increases during weft insertion, the axial component tends to displace the braking body in contrast with the elastic action of its suspension means and causes, or tends to cause, its separation from the drum, with a consequent and corresponding decrease in the braking action, which in this manner adjusts itself according to the advancement speed of the thread, keeping its respective mechanical tension substantially unchanged, as mentioned.
For correct operation in the specified sense, the frustum-shaped braking body of the self-adjusting braking devices must have certain characteristics and mainly: considerable radial elasticity, substantial axial rigidity, and limited inertia. For this purpose, it is known to provide the frustum-shaped body by means of a fabric impregnated with resins or with a laminate, providing it internally with a metallic cladding that has a mainly wear-resistant function. The cladding usually covers and protects a limited band of the frustum-shaped body which straddles the exit circumference of the drum of the feeder, and is constituted by a steel lamina of modest thickness, for example between 0.5 and 5 tenths of a millimeter.
It is also known to improve the response of the braking body to variations in thread tension by providing it with a metallic ring that has a raised rim, is arranged at the smaller or end cross-section of the body and is adapted to divert the path of the thread so that the thread discharges onto the braking body the axial component of its tension not only at the region of tangential contact with the drum but also at the end region of the braking body; the arrangement being such as to improve significantly the overall elastic response of the braking device.
However, in some cases, for example in the presence of lower-count threads, such as wool yarns for combed fabrics, the radial elastic yielding of the conventional braking bodies can be insufficient and accordingly the self-adjusting action of the braking applied to the thread by such a braking body can be entirely unsatisfactory. In particular, in conventional braking bodies the presence of the metallic cladding lamina limits significantly, in the very region of contact with the drum, the elastic deformability of the body in a radial direction, since the lamina, which is usually applied and glued directly to the inner face of the body, increases its thickness at the expense of its flexibility. On the other hand, a generalized reduction in the thickness of the material of the frustum-shaped braking body cannot exceed certain limits, on penalty of a consequent unacceptable deterioration of the axial rigidity of the body.
In an attempt to obviate this drawback, it has already been proposed to replace the rigid frustum-shaped body with a metallic body formed by a plurality of independent tongues arranged along the generatrices of a frustum-shaped solid and connected to each other in the region of the maximum circumference of the solid, by means of a band having a continuous surface, which engages, with an elastic tangent contact, the exit portion of the drum of the weft feeder in order to brake the thread, and in which the tongues are free with respect to each other at the region of the solid that has a smaller circumference and where the tongues are partially coupled to a cup for supporting the braking body.
An arrangement of this type, disclosed in WO 94/10075 and WO 94/12420, significantly improves the radial elastic deformability of the braking body but sacrifices almost completely its axial rigidity, compromising unacceptably the self-adjusting operation of the braking system.
According to further conventional embodiments, the portion of the frustum-shaped braking body that is in contact with the drum of the feeder is rendered elastically flexible in a radial direction through the adoption of a spring-loading means interposed between said body and said drum. Embodiments of this type are disclosed in WO 99/20557, wherein such interposed means is constituted by a metallic annular element comprising a plurality of elastically flexible tongues which are connected one another in the region of the braking body that has a larger circumference but are mutually free in the region having a smaller circumference, and in WO 00/20316, wherein said interposed means is constituted by a crown-like disk with a channel-shaped cross-section and provided with a plurality of radial slits.
The main drawback of these further embodiments is the structural complexity of the braking body and essentially the increased dimensions and mass of the body, whose inertia reaches values that are also unacceptable for correct and efficient self-adjusting operation of the braking system.
The aim of the present invention, starting from the notion of such drawbacks of conventional self-adjusting braking devices, is essentially to eliminate them.
Within this aim, an object of the present invention is to provide a self-adjusting braking device with a braking body that is extremely efficient, has significantly improved characteristics of radial elasticity and axial rigidity and at the same time has a very low inertia, so as to be significantly more effective in terms of the self-adjusting behavior of the braking system. In particular, with the device according to the invention the self-adjusting behavior of the system is enhanced significantly, in that the device needs very low thread tensions in order to modulate the braking action effectively and is thus adapted to operate with any type of thread, especially with lower-count and/or combed threads and even with very high weft insertion speeds, which are typical of modern weaving looms.
Another object of the present invention is to provide a self-adjusting braking device with a frustum-shaped braking body that is structurally very simple, reliable in operation, and economically advantageous.
Another object of the present invention is to provide a self-adjusting braking device with a braking body that has minimal dimensions and requires no stiffening of the respective elastic suspension structure and indeed allows, thanks to its significantly reduced mass, to reduce the elastic rigidity of said structure, further enhancing the sensitivity of the braking system.
According to the present invention, this aim and these and other objects that will become better apparent from the following detailed description are achieved with a self-adjusting braking device having the specific characteristics defined in the appended claims.
Substantially, the invention is based on the inventive concept of providing a braking device with a frustum-shaped braking body that is suspended elastically in front of the drum of the feeder and is pushed into elastic tangent contact with said drum, wherein said braking body is characterized at least by the presence, at a larger-diameter region thereof meant to make contact with said drum, of a discontinuous annular contact element which comprises a plurality of through slits which are arranged so as to be mutually equidistant and delimit a row of contact laminas, each of which has both ends joined to the braking body and monolithic therewith; the annular contact element, arranged at a region of contact between the braking body and the drum, being arranged symmetrically on either side of an exit circumference of said drum.
According to another characteristic of the invention, the slits of the annular contact element are inclined, with respect to the generatrices of the frustum-shaped braking body, so as to be orientated with an angle alpha, preferably a right angle and in any case an angle between 65 and 115xc2x0, with respect to the path traced by the unwinding thread directly ahead of the exit circumference of the drum of the feeder. According to the invention, furthermore, the material of the frustum-shaped braking body is chosen from the following group of materials: elastic steel, thermoplastic polymeric material, thermosetting polymeric material, engineering polymer reinforced with carbon fibers, carbon fiber or glass fiber fabrics; and said body can have, in the part below the annular contact element, lightening holes and/or cutouts which are adapted to reduce significantly the mass and therefore the inertia of the braking body.

Self-adjusting braking device for weft feeders


According to a present invention embodiment, safety is enhanced for a non-eye-safe limited-range laser sensing system. The laser sensing system typically has an operating range limited to a well-defined spatial interval. A range measurement is utilized to control emissions of the non-eye-safe laser. In particular, when the range to a target is outside the designed spatial interval defining the operating range of the laser sensing system, transmission of the non-eye-safe laser beam is disabled or rendered non-hazardous. In other words, the transmission of the non-eye-safe laser beam is disabled in response to no detection of a hard target within the operating range of the laser sensing system, or when an object is detected between the laser sensing system and the spatial interval that defines the operating range. The target distance may be tracked to change the location (and possibly, width) of the adaptive spatial interval defining the operating range.

1. Technical Field
Present invention embodiments pertain to laser systems. In particular, present invention embodiments pertain to controlling transmissions of non-eye-safe laser signals from a laser sensing system to provide enhanced safety for nearby objects (e.g., persons, animals, etc.) situated outside the boundaries of the operating range of the laser sensing system.
2. Discussion of Related Art
Active laser sensors transmit a laser pulse to interrogate a substance, and detect a response from the substance to the transmitted laser pulse. For example, Raman sensors detect return or scattered light with constituent colors based on vibrational modes excited in the chemical compound being interrogated. Other sensors may employ other phenomenologies such as Laser Induced Breakdown (LIB) or Photo-thermal Induced physical phenomena. In each of these applications, the surface of the object must be illuminated with sufficient laser energy to stimulate the physical process. Accordingly, the power of the transmitting laser is increased in order to obtain a sufficient return signal from the substance. The laser power, temporal wave shape, and frequency of the laser determine the class of the laser, and the maximum permissible exposure for the laser source is determined by ANSI Z136.1-2000—American National Standard for Safe Use of Lasers. Typically, a safety exclusion zone (defined by the distance beyond which eye or skin damage is not possible) is many times greater than the operating range relevant to the laser sensor.
In certain applications, the laser characteristics can be controlled to enable the emitted light to always be eye-safe. These sensors typically have a very short effective range. Further, sensor operation may be performed in a region of the optical spectrum which is intrinsically safer. However, this is not always possible due to limitations of technology, or the attributes of the underlying phenomenology that the sensor employs (e.g., Raman scattering is most efficient in the ultraviolet region). An alternative technique to ensure safety is to require all personnel within the safety exclusion zone to wear appropriate personal protective equipment (PPE) (i.e., skin covering and eye safety glasses).
In many applications, especially those requiring detection at long ranges, the wavelength, pulse energy, or pulse shape of the illuminating laser may not be changed. Moreover, limiting personnel exposure, either by excluding all personnel or by requiring personnel to wear personal protective equipment (PPE), may not be possible. In some cases, the exclusion zone may be too large to even render this approach feasible.

Method and apparatus for controlling laser transmissions for enhanced safety


A method for filling a compressed-gas container, in particular a compressed gas container in an airbag system, with a gas or gas mixture, or for producing a gas mixture in a compressed gas container. The filling is accomplished by introducing a gas mixture, or at least one gaseous component of the gas mixture, into a cooled compressed-gas container in the form of a gas or liquid-cooled gas.

1. Field of the Invention
The invention relates to a method for filling compressed-gas containers, in particular in airbag systems, with a gas mixture.
2. Description of the Related Art
Vehicle airbags are increasingly using new types of gas generators, which in the event of an accident inflate the airbag within a few milliseconds. At present, three types of gas generators are in use:                chemical generators, in which the gas is generated by the reaction of a chemical solid with ambient air;        what are known as hybrid generators, which comprise a combination of solid fuel and compressed-gas packing, and        pure gas generators with a high-pressure gas storage system at pressures of up to 700 bar at 15° C.
The gas generators, which are filled with various gases, cause huge technical problems in production, both in terms of their production and in terms of filling at pressures of up to 1000 bar. These pressures are required in particular for rapid filling, on account of the heat of compression, in order to introduce the precisely predetermined gas masses. These are of crucial importance to the subsequent inflation characteristics of the airbag.
Examples of gases used include argon, oxygen, nitrogen, dinitrogen monoxide (laughing gas, nitrous oxide), both in the form of ultra-pure gases and in the form of gas mixtures of these components.
Gas-filled gas generators require:                1. Filling pressures of up to 1000 bar (P(T)) for higher storage density or more compact dimensions.        2. Accurate and exact filling quantity determination at high pressures.        3. Rapid filling, since it is the filling which determines the cycle times.        4. The operation must be highly reproducible.
Very expensive and complicated piston or diaphragm compressors are required in order to generate the very high pressures. This entails high investment costs, high operating and maintenance costs. In addition, a downstream gas supply which is correspondingly complex and expensive is required for these pressures.
With increasing pressures, on account of the heat of compression and the uneven temperature distribution in the pressure vessel, the inaccuracy of the precise filling quantity determination increases, yet this accuracy is imperative for the generator to subsequently function as defined.
With increasing pressures, it becomes technically more difficult and complex to achieve fast filling times. There is a direct relationship between filling time and warming during the filling operation, i.e. the more quickly the filling is carried out, the more the gas temperature rises, with the result that the filling pressure has to be increased still further in order to achieve the exact quantity of gas for 15° C. or another defined temperature.
For the abovementioned reasons, the reproducibility is becoming more difficult and entails complex QA measures, such as for example weighing of the filled vessels for accurate filling quantity determinations. At the same time, a considerable rise in the scrap rate is expected at higher pressures. This in turn leads to an adverse effect on the economics of the overall process and therefore to higher production costs.

Method of filling compressed-gas containers with gas

L'Air Liquide, Societe Anonyme pour l'etude et l'Exploitation des Procedes Georges Claude


A roof panel lining of a vehicle with preassembled head protection elements so-called xe2x80x9chead-bagxe2x80x9d, comprising a complex element (22) with a head bag unit (25) with a shaped support (26a, 26b) and arranged integrally in relation to a roof panel lining (11) by reciprocal constraining elements (28, 29; 27, 30), in which the complex element (22) is arranged in a recessed zone (17) of the roof panel lining (11), covered by one or more longitudinal side covering and closing elements (18), in turn fastened to a body (14) of the vehicle by a handle (38) and provided with a weakening notch (43) which, in the inflation phase, allows release of a bag of the xe2x80x9chead bagxe2x80x9d unit (25).

The present invention relates to a roof panel lining of a vehicle with preassembled head protection elements, so-called xe2x80x9chead bagxe2x80x9d.
In the field of the automobile industry each part or element equipping the vehicle involves optimization both of manufacturing costs and its assembly.
In fact, all attempts are made to eliminate times that can slow down the fitting out of the vehicle to reduce costs to a minimum.
Another object is to be have the maximum certainty that each element has been correctly assembled, to permit access to each component and thus increase its functionality, avoiding possible faulty operation.
When fitting of safety systems to protect passengers, such as those known as top side xe2x80x9chead bagsxe2x80x9d, it is not always easy to position them.
The object of the present invention is therefore to provide a solution to the general technical problem above, referring in particular to xe2x80x9chead bagsxe2x80x9d.
Another object is to optimise the position of the protection element called xe2x80x9chead bagxe2x80x9d, in particular along the top side of the vehicle.
Yet another object is to produce a roof panel lining with head protection elements preassembled on it to thus obtain a module, particularly simple and fast to use and with a moderate cost.
These objects according to the present invention are attained by producing a roof panel lining with head protection elements, the so-called xe2x80x9chead bagxe2x80x9d, preassembled on it, as set forth in the attached claim 1.
Further important characteristics and details of the present invention are the subject of the dependent claims.

Roof panel lining of a vehicle with preassembled head protection elements (head bags)