A steering force control apparatus for a power steering system includes a hydraulic path, a branch path, and a cylindrical filter. The hydraulic path extends from a pump to a power steering side. The branch path has one end open to a wall midway along the hydraulic path and extends to a hydraulic reaction mechanism. The cylindrical filter is adjacent to the wall of the hydraulic path and has a mesh portion for filtering a pressurized oil. The mesh portion is formed at a portion of the cylindrical filter at which the hydraulic path communicates with the branch path. The portion of the filter at which the hydraulic path communicates with the branch path has a tapered stepped portion mechanically formed at the downstream side of the branch path. The cylindrical filter has upper and lower ring frame members to be fitted in the hydraulic path. The lower ring frame member is formed to have an outer diameter smaller than that of the upper ring frame member. The lower ring frame member has a tapered portion which is formed at a bottom portion of the lower ring frame member so as to be inclined inwardly in accordance with the tapered stepped portion of the hydraulic path, and a small-diameter portion extending from the tapered portion to the downstream side thereof.

The present invention relates to an improvement in a power steering control apparatus, used for a power steering system, for controlling a hydraulic reaction mechanism in accordance with the traveling velocity, the steering angle, and the like of a vehicle so as to obtain a desired steering force.
In power steering systems for reducing the steering wheel operating force (steering force) of a vehicle, various steering force control apparatuses for performing steering force control in accordance with various traveling conditions such as the traveling velocity and the steering angle of the vehicle by using hydraulic reaction mechanisms have been proposed. That is, a steering force needs to be controlled such that a light steering operation is allowed during parking or low-speed travel, and a steering operation is performed with a sense of rigidity during high-speed travel so as to ensure stability in straight travel. In order to perform such steering force control, input and output shafts in a power steering system are relatively rotated or restricted by using a reaction piston for selectively restricting the rotation of the input and output shafts in accordance with the magnitude of a reaction oil pressure.
As the most popular conventional steering force control apparatus of this type used for a power steering system, an apparatus having an arrangement disclosed in, e.g., Japanese Utility Model Laid-Open No. 62-25265 is known. In this arrangement, a reaction oil pressure branched from a part of a main hydraulic path extending to a power cylinder through a flow switching valve is used, and this pressure is controlled by a reaction oil power control valve constituted by a spool valve or the like to be guided to a hydraulic reaction chamber for driving a reaction piston.
According to steering power control apparatus having such a conventional arrangement, a filter for filtering a pressurized oil is generally arranged with respect to a branch portion of a branch path extending from a main hydraulic path to a hydraulic reaction chamber so as to prevent dust and foreign substances from entering a hydraulic reaction system. In this case, problems have been posed in terms of the shape and installation structure of the filter. More specifically, as shown in FIG. 10, the above-described branch portion extending from the main hydraulic path to the hydraulic reaction chamber is constituted by a path hole 2 serving as the main hydraulic path mechanically perforated in a steering body 1 and a path hole 3 serving as the branch path which is formed on the hydraulic reaction side so as to communicate with the hole 2. A substantially cylindrical filter 4 is fitted in a portion on the bottom side of the main path side path hole 2. Referring to FIG. 10, reference symbols 4a and 4b denote upper and lower ring-like frame members coupled to each other through a plurality of coupling pieces 4c and constituting the filter 4; and 4d, a cylindrical mesh portion mounted on the coupling pieces 4c between the upper and lower frame members 4a and 4b. A pressurized oil on the main path 2 side is filtered by the mesh portion 4d and is guided to the branch path 3 side. Reference numeral 5 denotes an inlet port pipe, inserted from above the upper portion of the path hole 2, for connecting a hydraulic pipe from a pump P (not shown); and 6, a small-diameter outlet side path hole which is formed to be continuous with the bottom side of the path hole 2 constituting the main path and extends to a power cylinder PS through a flow switching valve (not shown). In addition, reference symbol 2a denotes a tapered stepped outlet portion constituting the bottom portion of the path hole 2 when the path hole 2 is formed by a mechanical process using a drill or the like.
According to such a conventional structure, since the filter 4 is arranged in a space having a limited axial length between the upper side of the tapered portion 2a on the path hole 2 bottom side and the inner end of the inlet port pipe 5, the axial length of the filter 4 itself is limited. Since a sufficient axial length cannot be ensured between the upper and lower ring-like frame members 4a and 4b, the filter area of the mesh portion 4d is decreased, and required filter performance cannot be ensured. For this reason, a maintenance operation such as replacement of a filter due to clogging or the like must be frequently performed. In addition, according to the filter 4 having such a small filter area, a space of a sufficient volume cannot be ensured between the mesh portion 4d and the hole wall of the path hole 2 to which the path hole 3 around the mesh portion 4d is open, and a pressure loss is increased at this portion. As a result, a pressure to be supplied to the hydraulic reaction system is reduced, and problems are posed when a desired hydraulic reaction control is to be performed. Especially, if such a pressure loss is increased, the internal pressure of the filter 4 is increased, thereby posing problems that the mesh portion 4d is deformed outwardly, and the volume of a portion defined by the outer surface of the mesh portion 4d is decreased.
As described above, in the conventional filter structure, the upper and lower ring-like frame members 4a and 4b must have diameters substantially equal to the inner diameter of the path hole 2, and an operation of sequentially urging them into the path hole 2 to be assembled is required. Since the assembly operation is performed by urging the lower ring-like frame member 4b in the path hole 2 from its upper end side, the filter 4 tends to be deformed in the axial direction.
Especially, in a control spool valve or the like used in the above-described hydraulic reaction system, since a path system or the like has a small diameter, clogging tends to occur. Therefore, entrance of dust, foreign substances, and the like whose sizes pose no problem in the main hydraulic path extending from a pump to a power cylinder must be reliably prevented. In addition, when a filter is to be arranged in the branch portion extending from the main path to the hydraulic reaction control system, limitations in axial length pose problems in terms of filter areas and assembly performance as described above. Therefore, demands have arisen for a countermeasure by which all the above-described problems can be solved.
For example, Japanese Patent Laid-Open No. 63-38467 discloses a reaction oil pressure control valve used for the above-described hydraulic reaction control system. In such a steering power control apparatus, a choke portion is arranged on a main hydraulic path on the downstream side of a branch portion extending to a hydraulic reaction system. Therefore, a constant preset pressure is applied to the hydraulic reaction system to provide some rigidity to a steering wheel during straight travel or the like. Such a choke portion is conventionally arranged on the above-described main path portion on the downstream side of the filter portion. In this case, however, since the axial length of the filter portion is undesirably limited, problems are posed in formation of a required choke portion. More specifically, if the required choke portion is arranged on the downstream side of the filter portion, the height of the choke portion is further limited with respect to the filter. If a sufficiently long filter length is ensured, a sufficient length of the choke portion cannot be ensured. Therefore, a large choking amount is required. As a result, the flow of an oil pressure on the main path is disturbed, and other problems may be posed. Demands have arisen for a countermeasure by which these problems can also be solved.

Steering force control apparatus for power steering system


An underground unmanned, trackless mine haulage vehicle and a system for guiding such a vehicle which includes a roof mounted guide rail, physical means to detect and calculate in real time variation in angle and distance of the center line of the vehicle from the ideal path of the guide rail and means on board the vehicle to provide and carry out steering commands to correct the position of the vehicle vis-a-vis the guide rail.

There is a need for greater efficiency in haulage of fractured ore (muck) in underground installations. Often it is required that large quantities of muck be transported from a pile of broken ore body to a crusher site under or above ground along a route or for such a limited time which precludes the use of conveyor belts. Ideally, a transporter vehicle for this purpose should be unmanned, capable of traversing relatively narrow drifts and curves of practical radii and be non-polluting to a mine environment. The present invention is directed to a haulage system which satisfies these requirements and, more particularly, to a practical system for guiding a steerable, self-propelled vehicle along a non-tracked route.


A plug-in connection arrangement for arranging a relay includes a terminal block comprising a relay holder configured to hold a relay. The relay has a bottom wall, a side wall, and a contact plug which projects out of the bottom wall. The side wall is arranged perpendicular to the bottom wall and includes an offset section which contacts the bottom wall and projects out into the relay in a direction of a surface normal of the side wall. The relay holder includes a socket configured to hold the contact plug of the relay when the relay is inserted into the relay holder. The relay holder also includes an insulating wall which, when the relay is inserted into the relay holder, is aligned parallel to the side wall and projects beyond the bottom wall to form an angled insulation section for the contact plug along a surface of the insulating wall.

A combination of several electrical terminal blocks typically has a plurality of adjacent plug-in connections for electrical components, in particular relays. The distance between connection contacts and electrical components arranged next to one another can accordingly be determined by a distance between the plug-in connections. Advantageously, the overall width of the electrical terminal blocks and thus the distance between the plug-in connections is reduced in order to reduce the space required by the combination of several electrical terminal blocks. In contrast, it may be necessary to maintain a minimum distance between the connection contacts in order to prevent an electrical connection, in particular due to spark formation and/or leakage currents between the connection contacts. Correspondingly, a further reduction in the overall width of the electrical terminal blocks can be limited in a disadvantageous manner due to the necessary minimum spacing between the connection contacts.

Plug-in connection arrangement for an electrical terminal block


A bandpass filter (40) comprises a first microstrip split-ring resonator (12), having at least a first edge and a second edge, the first edge having a gap (20) therein, and an input. The bandpass filter (40) also comprises a second microstrip split-ring resonator (14), having at least a first edge and a second edge, the first edge being coupled to the second edge of the first microstrip split-ring resonator, and the second edge of the second microstrip split-ring resonator comprising a gap (26) therein and a balanced output (30, 32).

Microstrip ring resonators are now used in bandpass filter applications to overcome the influence that parasitic components generated at short circuited points in resonators have on circuit losses and resonance frequencies. Referring to FIG. 1, a conventional split-ring resonator BPF 10 is shown. The BPF 10, having a single-ended input port and a double-ended output port, comprises a first split-ring resonator 12, and a second split-ring resonator 14. The first and second split-ring resonators 12 and 14 each have a gap 20 and 26, respectively, therein. A capacitor (C.sub.t) 18 is connected across gap 20, and a capacitor (C.sub.t) 24 is connected accross gap 26 to decrease the size of the resonators. A signal may be applied to the BPF through a capacitor (C.sub.c) 16. The signal is filtered by the BPF 10 and the resulting filtered signal is provided at the output of the BPF 10 through a capacitor (C.sub.c) 28. There are applications for such BPFs that require that the output or input of the BPF 10 be coupled to a component requiring a balanced input or output. For example, if the BPF 10 were to be coupled to a balanced mixer (i.e., a balanced input is required by the mixer) a transformer would generally be used to provide a balanced output. Thus, it would be advantageous to have a split-ring resonator filter having a balanced output port or a balanced input port, or to have a balanced input port and a balanced output port.

Split ring resonator bandpass filter with differential output


An overflow prevention system and method for storage tanks includes a flow disturber situated in the tank fill tube, a fluid level sensor for sensing fluid level in the tank, and an actuator that causes the flow disturber to move toward the fill tube inlet in response to rising fluid level sensed by the fluid level sensor. The flow disturber is arranged to travel between a first position in which it does not cause turbulent flow in the fill tube and a second position in which it causes turbulent flow. The actuator is responsive to the fluid level sensor to move the flow disturber to the second position when a predetermined fluid level is reached. The transition to turbulent flow triggers the automatic shut-off feature of the dispensing nozzle to prevent the tank from being filled beyond the predetermined level.

This invention relates generally to storage tanks and more particularly to systems for storage tanks designed to prevent overflow both during and subsequent to filling.
It is well known to use storage tanks for holding a variety of fluids such as oil, gasoline, and diesel fuel to name a few. Proper filling of storage tanks is a universal concern, as overfilling of storage tanks may result in spillage, damage to the tank or filling equipment, contamination of land or ground water, or other serious and potentially dangerous results. Concerns over spillage of the tank contents are particularly acute when the tank contents are flammable, toxic and/or environmentally hazardous.
Spillage from fuel tanks on pleasure boats and other marine vessels is particularly troublesome. Some contemporary estimates of such fuel spillage are in excess of six million gallons annually in the United States alone. Globally, fuel spillage is many times this amount. The resultant fuel losses are economically and ecologically detrimental in terms of wasted fuel resources and environmental contamination. The problem has lead the Environmental Protection Agency to mandate that any such spillage be subject to heavy fines.
An internal fuel tank on a marine vessel is typically provided with a vent to enable vapor and fumes to escape under pressure while fuel is being pumped into the fuel tank via the fuel fill tube. As the engine consumes fuel, air is drawn into the tank via the air vent to fill the space from the consumed fuel. Venting is also necessary to accommodate expansion of the fuel when it is heated. During filling of the fuel tank, some fuel may be discharged through the vent into the water as the attendant attempts to fill the tank to capacity. In fact, it is not unknown for filling attendants to purposely fill the tank until fuel is discharged from the vent, using this as an indication that the tank is completely full. It is also possible that fuel may be discharged through the vent subsequent to filling. For example, fuel can be discharged through the vent in a tank filled to capacity as a result of the boat listing from side to side due to waves, wind or other causes. Also, fuel will be discharged through the vent in a tank filled to capacity if a subsequent rise in ambient temperature causes the fuel to expand.
The use of fuel dispensing nozzles that automatically shut off the flow of fuel to the tank when the tank is full can avoid fuel spillage during filling. These nozzles typically operate by sensing a pressure change in the incoming fuel flow that results from filling the tank fill tube. Use of a fuel dispensing nozzle with automatic shut-off will prevent fuel discharge through the fill tube during filling if the fill tube is properly designed to trigger the shut-off at the appropriate time. However, with many designs the automatic shut-off may not be triggered at all because the pressure transition is not sufficient. The result is that fuel will overflow through fill tube if the nozzle is not shut off manually. Because of the location of the vent in many applications, it is also possible that fuel will be discharged through the vent during filling. Discharge through the vent may also occur after filling, even if the automatic shut-off is triggered. For example, if the tank is filled to near capacity, fuel can be discharged through the vent due to boat listing or fuel expansion.
Many prior approaches to spillage rely on the use of a reservoir designed to capture overflow. However, these approaches require additional parts and the use of a reservoir takes up more space on the vessel. None of these approaches address the above-mentioned drawbacks of relying on the automatic shut-off feature of existing fuel dispensing nozzles.
Accordingly, there is a need for a system and method that prevents spillage both during and after filling of a storage tank. It would be desirable to have such a system and method of overflow prevention that facilitates use of automatic shut-off nozzles and does not require provision of an overflow reservoir.
The above-mentioned need is met by the present invention, which provides an overflow prevention system and method for storage tanks that make use of the existing or slightly modified design of the shut-off nozzles that have become accepted in automotive refueling applications. The system includes a flow disturber arranged to travel in the fill tube of the storage tank, a fluid level sensor for sensing fluid level in the storage tank, and an actuator connected between the flow disturber and the fluid level sensor. The actuator causes the flow disturber to move toward the fill tube inlet in response to rising fluid level sensed by the fluid level sensor. The flow disturber is arranged to travel between a first position in which it does not cause the incoming fluid flow to be turbulent and a second position in which it does cause the incoming fluid flow to be turbulent. The flow disturber is provided with a size, shape and texture that will create a transition from laminar to turbulent flow without risking splashback for the operator.
In operation, the actuator is responsive to the fluid level sensor to move the flow disturber to the second position when a predetermined fluid level is reached. The transition from laminar to turbulent flow triggers the automatic shut-off feature of the dispensing nozzle to prevent the tank from being filled beyond the predetermined level.
In one possible embodiment, the fluid level sensor is a float suspended in the storage tank and the actuator is a mechanical linkage, such as a rod or a flexible cable assembly, connecting the float to the flow disturber.
In another possible embodiment, the fluid level sensor is a float suspended in the storage tank and the actuator comprises a pair of fluid cylinders arranged to transfer motion of the float to the flow disturber.
In yet another possible embodiment, the fluid level sensor is disposed inside the storage tank and produces an electrical signal representative of fluid level in the storage tank. The actuator includes an electromechanical device such as a solenoid that operates the flow disturber via a mechanical linkage in response to the electrical signal.
The present invention and its advantages over the prior art will be more readily understood upon reading the following detailed description and the appended claims with reference to the accompanying drawings.

Overflow prevention system and method using laminar-to-turbulent flow transition


A carrier frequency recovery apparatus for simultaneously reducing a frequency offset and a phase error includes: a phase detector for estimating phase error of an I-channel and Q-channel signals having a frequency offset; a select signal generator for receiving the phase error and generating a select signal; a first loop filter for attenuating the phase error by a predetermined range; a second loop filter for attenuating the phase error in a range narrower than the first loop filter; an addition unit for adding the output value of the first loop filter to an output value of the second loop filter; a multiplexer for selectively outputting an output value of the first loop filter or an output value of the addition unit in response to the select signal; and a voltage-controlled oscillator block for storing and outputting cosine and sine signals corresponding to an output value of the multiplexer.

The present invention relates to a communication device; and, more particularly, to a carrier frequency recovery apparatus capable of simultaneously reducing frequency offset and phase error.
In a typical coherent digital communication system including a transmitter and a receiver, the transmitter modulates a data by using a carrier frequency and transmits a modulated data to the receiver. At the receiver, the modulated data as a received signal is demodulated to extract the data by carrying out a carrier frequency recovery operation. At this time, whether it is possible to extract data or not depends on the carrier frequency recovery, so that the carrier frequency recovery is very important regardless of data error.
A conventional carrier frequency recovery circuit including a PLL (phase locked loop) structure carries out a carrier frequency recovery operation by gradually reducing a phase difference between a received signal and an output signal from a VCO (voltage controlled oscillator) , until the phase difference therebetween becomes below a predetermined value.
In such a carrier frequency recovery circuit, a first assumption is that a frequency difference between the received signal and the signal outputted from the VCO is not large, and additional circuits need to be added in order for this. A second assumption is that a phase rotation error may occur due to a phase noise even after recovering the carrier frequency, i.e., after obtaining a locked phase.
The conventional carrier frequency recovery circuit employs a scheme that covers only a carrier phase. In that case, however, an automatic frequency control (AFC) unit is used to reduce a frequency offset of a signal outputted from the carrier frequency recovery circuit. For example, in case where a signal from the carrier frequency recovery circuit has a frequency offset of 100 kHz or more, the AFC unit reduces the frequency offset of the signal to a predetermined value until the carrier phase can be recovered. At this time, the AFC unit is generally constituted with differentiators, multipliers, adders and the like, so that a chip size is increased.
It is, therefore, an object of the present invention to provide a carrier frequency recovery circuit for simultaneously reducing a frequency offset and a phase error without using an AFC unit.
In accordance with an aspect of the present invention, there is provided a carrier frequency recovery apparatus for simultaneously reducing a frequency offset and a phase error, comprising: a phase detection means for estimating a phase error of an I-channel and Q-channel signals having a frequency offset; a select signal generating means for receiving the phase error and generating a select signal; a first loop filter means for attenuating the phase error by a predetermined range; a second loop filter means for attenuating the phase error in a range narrower than the first loop filter means; an addition means for adding the output value of the first loop filter means to an output value of the second loop filter means; a multiplexing means for selectively outputting an output value of the first loop filter means or an output value of the addition means in response to the select signal; and a voltage-controlled oscillation means for storing and outputting cosine and sine signals corresponding to an output value of the multiplexing means, wherein the cosine and sine signals are used to correct the frequency offset of the I-channel and Q-channel signals.
In accordance with another aspect of the present invention, there is provided a method for simultaneously reducing a frequency offset and a phase error, comprising the steps of: a) estimating a phase error of an I-channel and Q-channel signals having a predetermined frequency offset; b) attenuating the phase error by a first range; c) outputting cosine and sine signals corresponding to an attenuating phase error; d) correcting the I-channel and Q-channel signals by using the cosine and sine signals; e) repeating the steps a) to d) until a select signal is enabled; f) if the select signal is enabled, attenuating a phase error of a corrected I-channel and Q-channel signals by a second range narrower than the first range; g) outputting cosine and sine signals corresponding to the attenuated phase error; h) correcting the I-channel and Q-channel signals; and i) repeating the steps f) to h) until the select signal is disabled.

Carrier frequency recovery apparatus capable of simultaneously reducing frequency offset and phase error and method of the same

Hyundai Electronics Industries Co., Ltd.


According to one embodiment, an inkjet ink includes a non-conductive metal pigment, a resin, and a solvent, and the surface of the non-conductive metal pigment is coated with an alkoxide including an alkoxysilane, and the coating film has a crosslinked structure.

As an inkjet head of an inkjet recording apparatus, those using various discharging systems are known. For example, a piezoelectric inkjet head discharges an ink by electrical oscillation of a piezoelectric element in an ink chamber.
In the piezoelectric system, an electrical charge necessary for discharging an ink is applied to a piezoelectric element, and therefore, an ink containing a highly electrically conductive pigment such as a metal powder typified by a metallic ink is affected by the electrical charge and cannot be discharged normally, or the piezoelectric element itself is broken down due to electrical conduction in the ink in some cases.
On the other hand, a pigment composed of a metal to be blended in a metallic ink or the like is required to have brightness. However, for example, a pigment or the like composed of a metal containing aluminum as a main component easily reacts with water or the like in the air, and therefore has disadvantages that the metallic luster is deteriorated, the color is changed, hydrogen gas is generated, and so on. As those which solve the disadvantages, there is known a surface-coated aluminum pigment which is obtained by coating the surface of aluminum with a coating film containing an alkoxysilane as a main component, and therefore has water resistance and the like while maintaining brightness.


Example embodiments of the present disclosure concern a system and method for selectively intercepting communications in a cloud computing environment by receiving communications from one or more thin-client terminal systems connected via a local area network, determining one or more recipients of each received communication, and based on a determination that the one or more recipients of a communication include only thin-client terminal systems connected via the local area network, intercepting the communication and preventing the communication from being transmitted to a central server connected to the local area network via a wide area network, storing the communication, and forwarding the communication to the one or more recipients connected to the local area network.

Centralized computer systems with multiple independent terminal systems for accessing the centralized computer systems were once the dominant computer system architecture. These centralized computer systems were initially very expensive mainframe or mini-computer systems that were shared by multiple computer users. Each of the computer system users accessed the centralized computer systems using a computer terminal system coupled to the centralized computer systems.
In the late 1970s and early 1980s, semiconductor microprocessors and memory devices allowed for the creation of inexpensive personal computer systems. Personal computer systems revolutionized the computing industry by allowing each individual computer user to have access to a full computer system without having to share the computer system with any other computer user. Each personal computer user could execute their own software applications, and any problems with the computer system would only affect that single personal computer system user.
Although personal computer systems have become the dominant form of computing in the modern world, there has been a resurgence of the centralized computer system model wherein multiple computer users access a single server system using modern terminal systems that include high-resolution graphics. An example of this centralized architecture is cloud computing. Cloud computing provides an abstraction between the computing resource and its underlying technical architecture (e.g., servers, storage, networks), enabling convenient, on-demand network access to a shared pool of configurable computing resources that can be rapidly provisioned and released with minimal management effort or service provider interaction. Traditional cloud computing systems provide resources to a plurality of personal computers (i.e., "fat" clients) that are connected via a wide area network (WAN) to a server in the cloud. Cloud computing allows multiple users to easily share the same set of software applications.
In a conventional cloud computing implementation, all processing is done in the cloud while the user gets access with a lightweight client that has the smallest amount of processing. Bandwidth challenges may arise when a considerable number of video streams are managed on some of the clients. Each client will have one or more streams concurrently going back and forth between the client itself and the server in the cloud. The challenge is exacerbated when the clients aren't simply rendering multimedia but are also creating an uplink stream for example for videoconferencing purposes.
For example, assume H.264 HDTV streams use a relatively high level of compression of 2-3 Mbit/stream. A situation where 20 users are participating in the same videoconference, using their desktop computers, would create a 2 Mbit uplink stream for each user and potentially 2×20 Mbit/sec for the downstream to each user for a total aggregate of 840 Mbit/s. Even with techniques of broadcasting, in the given example the total aggregate bandwidth utilization would be 2×2×20 Mbit/s or 40+40 Mbit (up/down), a small number for a local area network (LAN) and significantly higher bandwidth consumption for a WAN. If the number of users concurrently using the HD videoconferencing application grows to 100, the total bandwidth on the WAN connected to the cloud sever would be 200+200 Mbit/s.

Method and system for data communications in cloud computing architecture


Attitude display system for remotely operated machine is provided. The attitude display system includes a pitch display and a roll display. The pitch display includes a fixed pitch reference scale and a pitch indicator. The pitch indicator can be configured to move relative to the fixed pitch reference scale to indicate a pitch of the remotely operated machine. The roll display includes a roll reference element and a roll indicator configured to pivot about a reference point to indicate a roll of the remotely operated machine. Further, the pitch display and the roll display include a pitch text field and a roll text filed to display a numeric value of the pitch and roll respectively. Also, the pitch indicator and the roll indicator can be configured to change to a first color and a second color based on a degree of movement or pivot.

In recent years, companies have invested significantly in the research and development of technology for remotely controlling construction machines such as hydraulic excavators, bulldozers or dump trucks, and track-type tractors. Particularly in working sites that are dangerous for workers to enter, such as a site for restoration against natural calamities or the construction of a dam, a quarry, or an iron mill, machines are controlled through a remote operating station. The machine can be employed on an actual worksite, while the remote operating station can be positioned indoors. Machine operators interface with machines through a control panel in the remote operating station. The operator continuously monitors the machine on a display device of the remote operating station. The display device is used to indicate the state of the machine. In other words, the display device indicates the machine's movement, such as speed or direction. However, in various work areas, machines usually work on grades and/or slopes. In such a scenario, information regarding the orientation or attitude of the machine is important for the operator to control the machine.
It can be imperative for the operator to know the attitude parameters such as pitch and roll of the machine. Pitch is the angle of the wheel base or track frame of machine while moving up/down on a slope. In other words, if a machine is moving up/down an incline, it has a certain pitch with respect to horizontal. On the other hand, if a machine is banked or tilted towards left of right, it is said to have a certain roll with respect to horizontal. In other words, pivotal movement about the transverse axis is called pitch, and rotation about the longitudinal axis of the machine is termed as roll. The operator can use information on both pitch and roll to control the machine. If the pitch is beyond a threshold level, the machine engine can stall or the machine can topple. On the other hand, if the roll exceeds a threshold value, the machine can capsize and tumble to the side.
Presently, there are several ways to indicate machine attitude. The indicating devices have been commonly mounted on the machine. For example, U.S. Pat. No. 3,846,781 discloses an indicating device having a pendulum and a pointer arrangement. The pendulum and the point arrangement are attached to the machine. The pendulum moves in the longitudinal direction and the pointer is configured to move in a transverse direction to indicate the pitch and roll of the machine, respectively. The disclosed arrangement is a mechanical assembly that indicates the sideward slope and the up and down slope of the machine. Another existing indicating device to indicate the pitch and roll can be found in the domain of aircraft. For example, 2006 US publication 0212182 describes a pitch and roll indicator display, where the movement of the horizon relative to a fixed aircraft symbol indicates the pitch and roll of the aircraft.
There is a need for indicating attitude of the machine at the remote operating station that is used to operate a machine from a remote location.


A fuel cell system comprises a fuel cell stack, radiator, stack side cooling water passage, radiator side cooling water passage, bypass cooling water passage, deionizer, stack side cooling water pump, and radiator side cooling water pump. The pump are formed from rotary pumps able to change directions and amounts of cooling water discharged by changes of drive speeds. Drive speeds of the pumps are controlled to thereby control an amount of cooling water flowing through the radiator side cooling water passage, an amount of the cooling water flowing through the stack side cooling water passage, and a direction and amount of the cooling water flowing through the bypass cooling water passage.

1. Field of the Invention
Embodiments of the present invention relate to a fuel cell system and a method of control of the same.
2. Related Art
A fuel cell system is known in the art, which is provided with a fuel cell stack configured to generate electric power by an electrochemical reaction between hydrogen gas and air, a radiator configured to lower a temperature of a cooling water for the fuel cell stack. The fuel cell system is further provided with a cooling water feed passage connecting together an outlet of an in-radiator cooling water passage in the radiator and an inlet of an in-stack cooling water passage in the fuel cell stack. The cooling water feed passage includes a feed side branching point, a radiator outflow passage from the outlet of the in-radiator cooling water passage to the feed side branching point, and a stack inflow passage from the feed side branching point to the inlet of the in-stack cooling water passage. The fuel cell system is further provided with a cooling water discharge passage connecting together an outlet of the in-stack cooling water passage and an inlet of the in-radiator cooling water passage. The cooling water discharge passage includes a discharge side branching point, a stack outflow passage from the outlet of the in-stack cooling water passage to the discharge side branching point, and a radiator inflow passage from the discharge side branching point to the inlet of the in-radiator cooling water passage. The fuel cell system is further provided with a bypass cooling water passage connecting together the feed side branching point and the discharge side branching point, a check valve arranged in the bypass cooling water passage and enabling the cooling water to flow through the bypass cooling water passage only from the cooling water discharge passage to the cooling water feed passage, a stack side cooling water pump arranged in the stack inflow passage so that its outlet faces the fuel cell stack, and a radiator side cooling water pump arranged in the radiator inflow passage so that its outlet faces the radiator. In the fuel cell system, if a temperature of the cooling water flowing out from the in-stack cooling water passage is lower than a prescribed temperature, the fuel cell system drives the stack side cooling water pump and stops the radiator side cooling water pump, whereby the cooling water circulates through a first route formed by the stack inflow passage, in-stack cooling water passage, stack outflow passage, and bypass cooling water passage, without flowing through the in-radiator cooling water passage. If the temperature of the cooling water flowing out from the in-stack cooling water passage is higher than the prescribed temperature, the fuel cell system drives the stack side cooling water pump and the radiator side cooling water pump, whereby the cooling water circulates through a second route formed by the cooling water feed passage, in-stack cooling water passage, cooling water discharge passage, and in-radiator cooling water passage, without flowing through the bypass cooling water passage (for example, see Japanese Patent Publication No. 2010-097709A). According to Japanese Patent Publication No. 2010-097709A, the radiator side cooling water pump which is stopped acts as a closed valve. For this reason, the cooling water having flowed through the stack outflow passage flows into the bypass cooling water passage without flowing into the radiator inflow passage, therefore the cooling water circulates through the first route. That is, if the temperature of the cooling water is low, the cooling water is kept from being cooled by the radiator.

Fuel cell system and control method thereof


A RF pass-through connector comprises at least a spring-loaded terminal comprised of a rod member and a sleeve member resiliently telescopically formed in a housing and adapted to be correspondingly contacted with a signal terminal formed in a socket and a receptacle cavity in the socket to be electrically connected with a grounding loop formed in a circuit board fixed in an electronic device, whereby upon a connection of the RF pass-through connector with the socket of the electronic device, a reliable, stable and efficient signal communication or transmission may be obtained through the terminals.

A conventional RF (Radio Frequency) connector is provided to externally connect a radio frequency antenna or signal sources from an electronic device, such as: a notebook computer, flat computer (iPad), portable electronic device, or vehicle multi-media communication devices, to enhance the capability for receiving radio frequency signals.
Such a conventional method for receiving radio frequency signals may mate a terminal in the conventional RF connector with another terminal in a socket fixed in the electronic device for signal transmission or communication through the RF connector in between the externally connected antenna and the electronic device. The contact terminal in the RF connector should be kept in a close contact with the signal terminal in the socket of the electronic device in order to complete a well signal connection therebetween. After a long time use, the contact between the RF connector and the socket in electronic device may however be loosened, weakened, or even disconnected due to the following reasons:    1. After long-time service, the contacting pressure between the two mating terminals may be weakened, to loosen their contacting and attenuate their signal transmission.    2. The dust or dirts may be accumulated in between the mating terminals to thereby block or disconnect their signal transmission or communication.    3. The vibration, shaking or movements of the related systematic equipments may deviate the locations of the terminals to affect their contacting and the signal transmission efficiency.
The present inventor has found the drawbacks of a conventional RF connector and invented the present spring-loaded RF connector for an easy assembly and a stable connection.


A multi-core processor includes a plurality of cores to execute a plurality of threads and to monitor metrics for each of the plurality of threads during an interval, the metrics including stall cycle values, prefetches of a first type, and prefetches of a second type. The multi-core processor further includes criticality-aware thread prioritization (CATP) logic to compute a stall fraction for each of the plurality of threads during the interval using the stall cycle values, identify a thread with a highest stall fraction of the plurality of threads, determine the highest stall fraction is greater than a stall threshold, prioritize demand requests of the identified thread, compute a prefetch accuracy of the identified thread during the interval using the prefetches of the first type and the prefetches of the second type, determine the prefetch accuracy is greater than a prefetch threshold, and prioritize prefetch requests of the identified thread.

In a multicore system, multiple applications (e.g., threads) running on different cores share a main memory. Requests from the applications may interfere at the main memory, resulting in delays in request service and eventually, performance degradation. The queueing latency of requests to main memory increases when multiple applications are executing in a system, as compared to when a single application/thread is executing on a system. When memory requests of an application are delayed for such long times waiting for the main memory, the application could stall until the data corresponding to the request is fetched from main memory, resulting in performance degradation. Applications/threads slow down when the applications/threads are run in a multiple threaded workload along with other threads, as compared to when the thread is run alone.

Coordinated thread criticality-aware memory scheduling


A dryer apparatus is disclosed comprising a container having a container inlet and outlet, a pump that is configured to motivate a first air-vapor mixture flow via the container inlet and via the container outlet, a heating device configured to heat the first air-vapor mixture, a selector with at least two states, a compressor that is configured to compress and motivate a part of the first air-vapor mixture flow as a second air-vapor mixture flow, to flow through a first heat exchanger and to flow through a second heat exchanger and a pressure reducing device that is configured to reduce the pressure of said second air-vapor mixture downstream said first heat exchanger. The selector is configured to direct most of the first air-vapor mixture to flow in a closed cycle through the container, or configured to exchange most of the first air-vapor mixture with air located outside the apparatus.

The current invention originates from mechanical steam compression dryers.
Mechanical steam compression dryers use water in the form of steam which is recovered from a tumble drying process (such as a laundry dryer). First, a tumbler and its contents are heated to near 100° C. The saturated steam which is created replaces most of the air in the tumbler's volume. As saturated steam flow exits the tumbler, part of the flow is mechanically compressed increasing its temperature. The compressed steam flow is passed in a heat exchanger where it transfers its condensation latent heat to the main steam flow, later expanding. Liquefied water resulting from the condensation gathers in a drawer or is drained. The main flow of steam is superheated in the heat exchanger and is injected back into the tumbler. There, its heat causes more water to vaporize from the clothing, creating more wet steam and restarting the cycle.


A multi-chip electronic package and methods of manufacture are provided. The structure includes a lid encapsulating at least one chip mounted on a chip carrier; at least one seal shim fixed between the lid and the chip carrier, the at least one seal shim forming a gap between pistons of the lid and respective ones of the chips; and thermal interface material within the gap and contacting the pistons of the lid and respective ones of the chips.

Thermal management of multi-chip electronic packages is critical to ideal performance of the multi-chip electronic packages. Currently, multi-chip electronic packages encapsulate chips between a lid and chip carrier by forming a customized gap between pistons of the lid and the chips mounted on the chip carrier, and dispensing a thermal interface material (TIM) within the gap. The gap is formed by the use of a chip shim placed between pistons of the lid and the chips of the multi-chip electronic packages.
Referring to FIGS. 1a and 1b, a plurality of chips 12 are shown attached to a chip carrier 10. During assembly, a chip shim is placed between the pistons 16 and chip 12 in order to form a gap between the pistons 16 and the chips 12 (FIG. 1a). A lid or hat 14 (hereinafter referred to as a lid) is positioned over the chip carrier 10. The lid has "pistons" 16 that are moved such that they contact the chip shim. The lid is then removed from the chip carrier 10, and the pistons 16 are fixedly attached to the lid 14. The chip shim is removed and the thermal interface material is then placed on the chips. Once the thermal interface material is on the chips 12, the chip carrier 10 and lid are sealed to one another in order to encapsulate the chips 12 (FIG. 1b).
The chip shim needs to retain flexibility to conform to the chip surfaces; however, this becomes increasingly more difficult with the increasing number of chips on the package. In fact, it also becomes difficult to use the chip shims when other components or features are placed between the chips. Also, using the chip shim increases production costs due to the complexity of conforming the chip shim to the features of the chip and other components on the chip carrier, as well as the cost of the chip shim, itself.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.

Multichip electronic packages and methods of manufacture

International Business Machines Corporation


Techniques for distributing information over a network having a database in data communication with said network include a method that records in the database a plurality of computer readable profiles. Each computer readable profile corresponds to one of multiple users of the network. One of the computer readable files includes a query term that is associated with it. Generated on a common user interface are both perceivable stimuli in response to activity on said network of users corresponding to subgroup of the plurality of computer readable profiles, and information corresponding to computer readable profiles of the subgroup. The corresponding users of the subgroup possess knowledge related to the query term. A region of the user interface in which the perceivable stimuli is present defines an activity stream region. A region of the user interface in which said information is present defines a connections region of the user interface.

Some of the daunting tasks in an organization are identification of experts for collaboration, sharing of knowledge with peers and colleagues, and ensuring the acquired knowledge is shared uniformly so it may be re-used over and over again. A common problem individuals in an organization have is finding enough ongoing or up-to-date learning to help them be effective in their jobs. The nature of work is that it is changing sufficiently fast enough that a corporate university or set of class offerings by an organization approach may not be able to provide sufficient up-to-date content to meet the needs of the organization and/or the individual.
As a result, individuals may resort to the traditional method of finding critical content and experts by simply asking people they know or using corporate knowledge systems and forums. Such approaches may be ineffective because there is no way to ensure the appropriate expert is found as one is limited to who they directly ask. These approaches may also be a waste or inefficient use of resources because a search for experts must be repeatedly performed by each individual seeking an expert. The problem exists both for the experts and the people looking for them because the ability for an individual to share widely their expertise in a way that can be consumed effectively by others does not exist with current approaches.
E-mail, phone or face-to-face communication do not provide a central place to review or store information. Rather, information is scattered in different places and at times may not be accessible by the appropriate people. Accordingly, it is desirable to provide an efficient and effective way to communicate expert information.


A method of manufacturing an electronic apparatus including a first and a second components, includes: forming a first solder bump on one of the first component and the second component; forming a second solder bump on the other one of the first component and the second component; bringing the first solder bump into contact with the second solder bump at a temperature higher than the liquidus temperature of any of the first and the second solder bumps such that the first and the second solder bumps are fused together to form a solder joint of an alloy having a lower liquidus temperature than any of the first and the second solder bumps; and solidifying the solder joint between the first and the second component.

In general, in the case where the processing speed and function of a large-scale integration (LSI) circuit are increased, the number of connection terminals of a semiconductor chip tends to correspondingly increase. A flip-chip mounting technique is employed as a connection technique, in which a solder bump formed on a semiconductor chip is utilized when the semiconductor chip faces downward. Examples of a material used to form the solder bump of a semiconductor chip include a tin (Sn)-silver (Ag) alloy, a tin-copper (Cu) alloy, and a tin-silver-copper alloy.
In the flip-chip mounting technique, a solder bump is generally formed on an electrode of a semiconductor chip as described above, while a solder alloy is supplied also onto an electrode of a circuit board on which the semiconductor chip is to be mounted. In general, the solder alloy to be supplied onto the electrode of the circuit board has a primary component that is the same as that of the solder bump that is formed on the semiconductor chip. Such an approach is employed for the following reasons: solder wettability is improved at the time of forming a solder bump connection, solder is supplied at a finer pitch in a sufficient amount, and high connection reliability is maintained.
In order to reduce production costs and provide a fine structure, a build-up substrate in which an organic material is used is employed as a circuit board. In the case where a semiconductor chip is bonded to a circuit board by using a material of the above solder bump, heat is applied at a high temperature higher than or equal to 250° C., for example. By virtue of such application of heat, the solder bump of the semiconductor chip is melted as well as that of the circuit board, and then the melted solder bumps are fused together. Subsequently, the resultant product is cooled to complete the bonding process.
In the cooling process, the state of a solder joint, which is formed as a result of fusing together the solder bumps, is changed from a liquid to a solid, and then the semiconductor chip is physically fixed to the circuit board. A circuit board that is produced by using an organic material exhibits a high thermal expansion coefficient that is in the range from 15 to 22 ppm/° C. In contrast, a semiconductor chip exhibits a low thermal expansion coefficient that is in the range from 3 to 5 ppm/° C. Therefore, during the cooling process to normal temperature (a process of changing a state of the solder from solidification to normal temperature), the semiconductor chip, circuit board, and solder joint are exposed to application of large stress due to differential thermal expansion. Such stress causes a significant problem of deterioration of quality, such as cracking of the semiconductor chip and damaging of the joint. Such a problem, which is caused by differential thermal expansion (stress) between the semiconductor chip and the circuit board, will come to have an increasingly significant influence in the future resulting from an increase in a device size due to the increased number of terminals of the semiconductor chip.
The usage of a low-melting-point solder has been suggested as an approach to overcome such a problem. Examples of the low-melting-point solder include Sn-58Bi solder having a melting point of 139° C. and Sn-52In solder having a melting point of 115° C. The usage of a low-melting-point solder serves as a technique for overcoming various problems due to the stress generated during the bonding process. However, usage of a low-melting-point solder in the semiconductor chips causes problems in that the solder is melted during a burn-in test of the semiconductor chip and in that the reliability with respect to electric properties may not be sufficiently evaluated.
The followings are reference documents:    [Document 1] Japanese Laid-open Patent Publication No. 10-41621    [Document 2] International Publication Pamphlet No. WO 94/027777    [Document 3] Japanese Laid-open Patent Publication No. 2007-208056

Method of manufacturing electronic apparatus, electronic component-mounting board, and method of manufacturing the same


A method and a system are provided for processing electronic medical records for predicting a health condition of a patient. The method may determine a first set of datasets of a first patient based on one or more first electronic medical records. The method may extract one or more second sets of datasets of one or more second patients from a database server based on the first set of datasets. The method may generate one or more bipartite graphs based on the first set of datasets and the one or more second sets of datasets. The method may determine a set of edges from the one or more edges based on a matching score in each bipartite graph. The method may further predict the health condition of the first patient based on at least the matching score associated with each of the one or more bipartite graphs.

Currently, data driven approaches are extensively used in several domains, such as finance, healthcare, life sciences, and social and physical sciences, for discovering data patterns. Unsupervised learning methods, such as clustering or self-organizing maps, are the most preferred tools for discovering data patterns.
In the field of healthcare analytics, clustering is extensively used to discover patterns in disease risk profiles and treatment responses based on common procedures, such as stratification of patients. Such procedures may be used at various levels, such as for analyses within a hospital, using electronic medical records or electronic health records and population-level analyses in hospital information systems (HIS). A clustering method, such as partitioning-based clustering (such as K-Means), relies on a measure of similarity or distance between at least two objects being clustered. The efficacy of such methods depends on a distance metric used, such as Euclidean distance, cosine similarity, and Jaccard distance, which in turn depends on the data and the application. While such distance metrics are useful in a large number of applications, other applications may require the use of specialized distance metrics.
In healthcare analytics, patient data that includes unstructured notes, such as discharge summaries and nursing notes, are clustered by using text-processing techniques. The text in the unstructured notes may be analyzed to determine several postoperative complications, detect clinical conditions in an ailment with a consistency that is indistinguishable from that of physicians reviewing the same reports, and predict mortality in the intensive care units (ICUs). In certain scenarios, based on the vast amount of real-time information associated with different health-related parameters of a patient, it may be difficult to predict certain medical conditions that may need immediate attention. Thus, an automated technique may be desired to cluster the recorded medical reports of a patient in a structured manner for predicting the health of the patient.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to a person having ordinary skill in the art, through comparison of described systems with some aspects of the present disclosure, as set forth in the remainder of the present application and with reference to the drawings.

Method and system to process electronic medical records for predicting health conditions of patients


A light-emitting diode includes a light-emitting epitaxial layer having a first surface as a light-emitting surface and a second, opposing, surface, including a first type semiconductor layer, an active layer, and a second type semiconductor layer; a metal reflective layer disposed over the second surface; and a protective layer formed seamlessly on a surface of the metal reflective layer and on a side wall of the metal reflective layer.

In recent years, light-emitting diodes (LEDs) have been widely applied and play an increasingly more important role in various fields such display system, lighting system and automobile tail light. An LED with AlGaInP-based light-emitting layer has high internal quantum efficiency. However, external quantum efficiency of conventional LED has been restricted by many factors, such as internal total reflection, metal electrode blocking and light absorption by GaAs semiconductor material.

This patent is subject to a terminal disclaimer.

Light emitting diode and fabrication method thereof

XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.


The disclosed is an DRAM which is accessible in response to four-state address signal. A two-state address signal generator receives the four-state address signal respectively defined by four voltage levels and converts it to a row address signal and a column address signal which are two-state address signals. Converted address signals are supplied to a row decoder and a column decoder, respectively. Address signals for access are supplied without adopting an address multiplexing system, so that it is possible to perform accurate addressing under the requirement of high speed operation. In addition, the number of sense amplifiers to be activated in one read operation can be reduced, and therefore power consumption can be also reduced.

1. Field of the Invention
This invention relates generally to semiconductor memory devices and memory access systems, and more particularly, to a semiconductor memory device and a memory access system using an address signal having four states for high speed operation. The invention has particular applicability to dynamic random access memories (DRAMs).
2. Description of the Background Art
Recently, semiconductor memories have been widely used in various electronic apparatus. In particular, a dynamic random access memory (hereinafter referred to as a "DRAM") has a larger storage capacity compared to other semiconductor memories, for example a static random access memory (hereinafter referred to as an "SRAM"), and therefore it is frequently employed for data storage in a computer system. That is, a DRAM is used to constitute for example a main memory in a computer system because of its low cost per bit in data storage and high degree of integration.
With the advancement of recent VLSI design and process technology, an operation speed of a microprocessor has become higher, and higher speed memory access has become necessary in a computer system. That is, a semiconductor memory used in a computer system, for example, a DRAM, a SRAM, etc. needs to operate at a higher speed. Under this situation, the operation speed of a DRAM and a SRAM has become higher in recent years, and it is predicted that the operation speed will reach almost the limit in the near future. The invention is applicable generally to semiconductor memories for higher speed memory access, but application to a DRAM will be described by way of an example.
FIG. 14 is a block diagram of a memory access circuit showing a background of the invention in a computer system. Referring to FIG. 14, this memory access circuit comprises a microprocessing unit (hereinafter referred to as an "MPU") 1 and a DRAM 110 accessed by MPU 1. The following circuit is provided for the interface between MPU 1 and DRAM 110. In the following description, it is assumed that DRAM 110 has a memory capacity of 16M bits.
An address expansion circuit 2 performs a process for expanding address space in order to handle memory space exceeding address space which allows direct addressing by MPU 1. A real address converter 3 receives a virtual address signal VA generated from MPU 1 and generates row address signals RA0 through RA11 and column address signals CA0 through CA11 for access to DRAM 110 by real address conversion. An address multiplexer 105 receives row address signals RA0 through RA11 and column address signals CA0 through CA11, and performs switching operation for address multiplexing. That is, address multiplexer 105 outputs row address signals RA0 through RA11 and column address signals CA0 through CA11 alternately, that is, in a time division multiplexing manner, in response to a switching control signal /MPX generated from a timing controller 106. Consequently, a row address signals and a column address signals which have 24 bits in total can be obtained as 12 bit address signals A0-A11 by performing a time division multiplexing process. Address signals A0 through A11 are applied to DRAM 110 through an address buffer 107. MPU 1 can access not only DRAM 110 but also other memory devices and input/output devices, etc. (not shown).
In the memory access circuit shown in FIG. 14, only control signals to access DRAM 110 are indicated. When MPU 1 requires a read operation to DRAM 110, MPU 1 applies a memory read signal /MR to timing controller 106. When MPU 1 requires a write operation to DRAM 110, MPU 1 applies a memory write signal /MW to timing controller 106. In addition, MPU 1 applies state signals /S0 and /S1 to timing controller 106 to show a status of an operation cycle in MPU. Timing controller 106 applies a wait signal /WAIT to MPU 1 in a period of memory access to DRAM 110. Timing controller 106 generates a row address strobe signal /RAS, a column address strobe signal /CAS and a write enable signal /WE and a switching control signal /MPX. Signals /RAS, /CAS and /WE are applied to DRAM 110 through a control signal driver 8. A data buffer 9 is connected between MPU 1 and DRAM 110, and data buffer 9 transfers data D to/from DRAM 110 in response to a write control signal /WR generated from timing controller 106.
FIG. 15 is a time chart of a read cycle in the memory access circuit shown in FIG. 14. In the following description, it is assumed that a read cycle and a write cycle are performed in 4 period of a reference clock signal CLK. Referring to FIG. 15, a memory access request signal /CS and state signals /S0 and /S1 generated by decoding memory address signals are sampled in response to the fall of a clock signal CLK. A signal /RAS and a signal /MPX fall in response to the first fall of a clock signal CLK. Address multiplexer 105 first outputs row address signals RA0 through RA11, and in response to the fall of a signal /MPX it is switched and outputs column address signals CA0 through CA11. In a timing chart of FIG. 15 only i-th bit is indicated among address signals A0 through A11 of 12 bits in total. Therefore, in response to a signal /MPX, i-th row address signal RAi is switched to i-th column address signal CAi. Thus, address signals A0 through A11 of 12 bits each processed in a time division multiplexing manner are generated from address multiplexer 105. A signal /CAS falls in response to the second rise of clock signal CLK (period T2). Address signals A0 through All processed in a time division multiplexing manner are applied to DRAM 110 through address buffer 107 and then a read operation from DRAM 110 is performed.
FIG. 16 is a time chart of a write cycle in the memory access circuit shown in FIG. 14. The write cycle is also performed in four periods of clock signal CLK. Referring to FIG. 16, in response to the first rise of clock signal CLK, signals /RAS and /MPX rise. Therefore, in response to signal /MPX, address multiplexer 105 outputs column address signals CA0 through CA11 in stead of row address signals RA0 through RA11. Address signals processed in a time division multiplexing manner are applied to DRAM 110 through address buffer 107 as address signals A0 through A11 of 12 bits, and then a read operation from DRAM 110 is performed.
As an operation speed of microprocessor, that is, MPU has recently been increased, there is an increasing requirement for a DRAM having a higher operation speed. An operation speed of a DRAM has been increased as the generation of a DRAM advances. In a DRAM having memory capacity of 4 megabits or 16 megabits, 60 ns or 120 ns cycle time has already been achieved. It is predicted that this trend is going to continue in future and that the access time will be more shortened. In addition, it is also predicted that the time length allowed for access control between a MPU and a DRAM will be shorter and access control timing will be more complicated.
FIG. 17 is a block diagram of the conventional DRAM 110 shown in FIG. 14. Referring to FIG. 17, the DRAM 110 comprises a memory cell array 11 including a number of memory cells arranged in columns and rows, a row decoder 12 for selecting a memory cell row, a column decoder 13 for selecting a memory cell column, a sense amplifier 14 for amplifying a data signal read from a memory cell. One address buffer 115 receives address signals A0 through A11 processed in a time division multiplexing manner by the aforementioned address multiplexer 105. A clock signal generator 118 generates various clock signals necessary for the operation of DRAM 110 in response to signals /RAS, /CAS and /WE. A data input buffer 16 receives a data signal Din to be written and applies it to memory cell array 11 through an IO bus. A data output buffer 17 receives and outputs a read data signal Dout through an IO bus.
Address signals A0 through A11 applied to address buffer 115 include row address signals RA0 through RA11 and column address signals CA0 through CA11 processed in a time division multiplexing manner as mentioned above, and row address signals RA0 through RA11 are applied to row decoder 12 and column address signals CA0 through CA11 are applied to column decoder 13 by clock signals generated from clock signal generator 118.
FIG. 18 is a time chart for describing a read operation of a DRAM shown in FIG. 17. Referring to FIG. 18, a read operation is defined by a fall of a signal /CAS after at least time period t.sub.RCS has passed from a rise of a signal /WE. An address signal Ai processed in a time multiplexing manner is latched within address buffer 115 in response to the fall of a signal /RAS and a row address signal RAi is obtained. In addition, address signal Ai is latched within address buffer 115 in response to the fall of a signal /CAS and a column address signal CAi is obtained. Row address signal RAi and column address signal CAi latched within address buffer 115 are applied to row decoder 12 and column decoder 13, respectively. Row decoder 12 activates one word line (not shown) in response to row address signals RA0 through RA11. Sense amplifier 14 amplifies a data signal read from a memory cell connected to the activated word line. Column decoder 13 selects one bit line pair in response to column address signals CA0 through CA11, and the amplified data signal Dout is output through data output buffer 17. In FIG. 18, /RAS access time t.sub.RAC, /CAS access time t.sub.CAC and address access time t.sub.AA are indicated. An output terminal Dout is normally brought into high impedance state (Hi-Z), but it is activated only when the read data signal is output. In FIG. 18, /RAS active time t.sub.RAS and /RAS precharge time t.sub.RP are also indicated.
FIG. 19 is a time chart for describing the write operation of the DRAM shown in FIG. 17. The time chart shows an early write operation. That is, a write operation is started by the fall of a signal /WE prior to the fall of a signal /CAS. Similarly to the read operation shown in FIG. 18, a row address signal RAi and a column address signal CAi processed in a time multiplexing manner are latched within address buffer 115, and a data signal Din applied through a data input buffer 16 is written to the memory cell designated by these address signals.
FIG. 20 is a circuit diagram of memory cell array 11 and peripheral circuit thereof shown in FIG. 17. Referring to FIG. 20, a memory cell M comprises an NMOS transistor Qs for switching and capacitor Cs for storing a data signal. The memory cell M is connected to a j-th bit line BLj. Transistor Qs has its gate connected to a k-th word line WLk. Sense amplifier 14 comprises NMOS transistors Q1 and Q2, and PMOS transistors Q3 and Q4. The sense amplifier 14 is activated in response to sense amplifier activation signals .phi..sub.N and .phi..sub.P.
FIG. 21 is a time chart for describing the operation of the circuit shown in FIG. 20. Referring to FIGS. 20 and 21, a read operation will be described below. The potential of word line WLk is raised by a row decoder, so that transistor Qs is turned on. Therefore, a very small potential difference appears between bit line pair BLj and /BLj. Sense amplifier 14 is activated in response to an activation of sense amplifier activation signals Sn and Sp, so that a very small potential difference is amplified. This amplification is performed by charging and discharging a bit line pair BLj and /BLj by sense amplifier 14. Subsequently, column decoder 13 raises a signal Yj, so that gate transistors Q8 and Q9 are turned on and an amplified signal is applied to an IO bus line pair. A data signal on the IO bus line pair is output through data output buffer 17.
FIG. 22 is a block diagram of address buffer 115 shown in FIG. 17. In this figure only the circuit which handles an i-th bit Ai among address signals A0 through A11 of 12 bits. Referring to FIG. 22, the address buffer 115 comprises a row address input circuit 601 for receiving a row address signal, a switching circuit 602 for interlock, a row address latch circuit 603, a column address input circuit 604 for receiving a column address signal, a switching circuit 605 for interlock, and a column address latch circuit 606.
FIG. 23 is a timing chart for describing the operation of address buffer 115 shown in FIG. 22. Referring to FIGS. 22 and 23, the operation will be described. Control signals /RASA, /RAI, /RAL, /CASA, /CAI and /CAL are generated from clock signal generator 18 shown in FIG. 17.
A signal /RASA falls at time t1, so that a row address signal RAi which is the first half of an applied address signal Ai is received by a row address input circuit 601. Subsequently, at time t2, signal /RAI falls, so that the received signal is applied to a row address latch circuit 603 through a switching circuit 602. At time t3 a signal /RAL falls, so that row address latch circuit 603 latches applied row address signal RAi. At time t4, a column address signal CAi which is the latter half of an address signal Ai is applied. At time t5 a signal /CASA falls, so that a column address signal CAi is received by a column address input circuit 604. At time t6 a signal /CAI falls, so that the received column address signal CAi is applied to a column address latch circuit 606 through a switching circuit 605. At time t7, a signal /CAI falls, so that column address latch circuit 606 latches column address signal CAi. Row address signal RAi and column address signal CAi latched within latch circuit 603 and 606 respectively are transferred to row decoder 12 and column decoder 13, respectively.
As can be seen from FIG. 23, in the period from time t3 when signal /RAL falls to time t4, row address signal RAi must be latched within a row address latch circuit 603. However, the time length of this period At becomes shorter and shorter, as an operation speed of the DRAM increases. As the time length At becomes shorter, row address signal RAi needs to be certainly latched in this short time length At. Otherwise, a correct address signal is not supplied to row decoder 12 and therefore incorrect access is caused.
Such a problem is considered to result from adopting an address multiplexing system in a DRAM. That is to say, timing control in the switch is difficult because row address signals and column address signals are supplied in a time division multiplexing manner through one address terminal. A pseudo-SRAM has been developed conventionally in order to avoid such a problem. A pseudo-SRAM has a large capacity of a DRAM and usability of a SRAM. The aforementioned problem in latch timing of address signals processed in a time division multiplexing manner can be avoided, since the aforementioned address multiplexing system is not adopted. However, address input pins for receiving a row address signal and a column address signal respectively are needed, so that twice as many address input pins as those in a DRAM having the same memory capacity are required. This implies that it is necessary to enlarge the package of the pseudo-SRAM, and therefore a decline in packaging efficiency on a printed board cannot be avoided.
In addition to the above problem, the following problem is also pointed out concerning power consumption of a DRAM. FIG. 24(A) is a schematic diagram showing a memory cell size of a memory cell array 11 shown in FIG. 17. DRAM 110 shown in FIG. 17 is accessed in response to row address signals RA0 through RA11 and column address signals CA0 through CA11 each having 12 bits. Since the numbers of bits of a row address and a column address are the same, the same number of memory cells, that is, 4090 (=2.sup.12) memory cells are provided in each of a row direction and a column direction. That is to say, as shown in FIG. 24(A), 2.sup.12 memory cells MC are placed along one word line WL and 2.sup.12 memory cells MC are placed along one bit line BL. In other words, memory cell array 11 has a shape of almost square.
FIG. 25 is a waveform diagram showing the change of a power consumption level of a conventional DRAM. Referring to FIG. 25, consumption current Irow indicates the maximum current consumed by a row address system circuit and current Iary indicates the maximum current consumed in one read operation in memory cell array 11. Current Icul indicates the maximum current consumed by a column address system circuit and current Ires indicates the maximum current consumed for reset. As can be seem from FIG. 25, current Iray consumed by a memory cell array and its peripheral circuit in one read operation is larger than any other consumption current, and therefore, when this consumption current Iary is supplied from a power supply potential Vcc, a power supply level falls by .DELTA.V because of a voltage drop. This voltage drop can be a cause of malfunction which may occur in this DRAM.
FIG. 26(A) is a graph showing consumption current in a conventional DRAM. Referring to FIG. 26(A) power Pary consumed by a memory cell array and its peripheral circuit occupies more than a half of all the power consumption and the rest is occupied by power consumption Pcul of column system circuit and power consumption Prow by a row system circuit. The reason why the current consumed by the memory cell array and its peripheral circuit is large is described below.
As shown in FIG. 20, a sense amplifier 14 is connected to each of bit lines of memory cell array 11. As described above, sense amplifier 14 consumes large current to charge and discharge bit lines BLj and /BLj. Therefore, power consumption of sense amplifier 14 occupies the large part of power consumption Pary shown in FIG. 26(A).
Referring again to FIG. 24(A), since 2.sup.12 memory cells MC are connected to word line WL along word line WL, 2.sup.12 sense amplifiers SA1 are connected to as many bit lines BL. 2.sup.12 sense amplifiers SA1 are activated in one read operation and each sense amplifier charge/discharge bit line BL, and therefore large power is consumed.

Semiconductor memory device and memory access system using a four-state address signal


In a reactor tube for conducting a stream of gas through a bed comprised of particulated solid treating material, which is held within the tube. A retainer is removably positioned in the tube to secure the bed in place without obstructing the gas flow. The retainer includes a head which functions as a gas pervious barrier, yet precludes removal or carrying away of the particulated solid material. A tensioned loop at the retainer end includes a pair of oppositely positioned arms to engage the conductor inner wall. The arms are depressible to increase internal tension on the loop thereby allowing the retainer to be inserted into a tube end and held by friction.

Field of the Invention
The invention pertains to a reactor having one or more tubes for conducting a gaseous flow through a bed of a particulate solid material held within the tubes. The bed in one embodiment can include a particulated catalyst material that contacts the gas flow and prompts or supports a desired reaction.
The use of catalytic materials in reactors is a well known concept. Catalysts can assume many forms and characteristics depending on the function in a particular process or form of apparatus. Physically, the catalyst can be used in the form of rods, cylinders, powder, spheres, tubes, etc. In any instance, the catalyst material is usually aggregated into a compact though porous bed through which the gas, or even a liquid must pass to thereby enhance the desired reaction.
As with any catalyst, over a period of time it will lose its strength or effectiveness. The catalyst must therefore, after a sufficient degree of deterioration, be rejuvenated or be replaced.
Depending on the use to which it is applied, a reactor for treating a particular gas can be comprised of several thousand tubes each of which holds a small catalytic bed through which the gas flow will pass. The catalyst bed is maintained in the tube in a manner to allow the process gas to flow freely through it. In the instance of a reactor wherein the various gas conducting tubes are arranged in a general upright disposition, the catalyst bed must be held in place by a suitable yet convenient means. Said means will function to restrain the catalyst particles from being carried away on the gas stream, but will not hinder the treated gas flow.
When, after a period of usage, it becomes necessary to replace or rejuvenate the catalyst, normally the latter is removed from the gas conducting tubes. This of course necessitates closing down the process and the reactor, both of which steps can be time consuming and expensive.
One widely used means for retaining a catalyst bed in a gas conducting tube is through use of a coiled, spring-like member. The latter is inserted into the lower end of an upright reacted tube. The coils of the spring will support the catalytic bed and yet permit treated gas to flow through the spring's coiled openings.
Removal of the coiled retaining spring and subsequently the catalyst material from several thousand reactor tubes can be prolonged over a period of days. Further, special tooling is usually required to engage the retainer spring and to withdraw it from its position in a tube.


An e-beam system for making masks corrects the beam for pattern-dependent errors by executing the bulk of the post-processing program only once, with two sets of output data being generated by the encode routine. A first output file of the encode routine generates the beam control data without pattern-dependent corrections. A second output file merges the beam control data with the data for metrology marks. A test wafer is patterned using the second output file and measured to generate a set of pattern correction data. Production wafers are written using the beam control data corrected on the fly by the pattern correction data.

It is known in the art, as described e.g. in U.S. Pat. No. 5,424,548, that an e-beam system must be corrected for systematic or constant errors that arise because of various non-linearities in the system. For example, FIG. 1 shows in highly simplified form, an e-beam system in which a wafer 30 has a pattern being written on a field (or small portion) 31. FIG. 2 shows the wafer in more detail as being divided up into a set of fields 31. A field represents the deflection range of the beam. Mechanical motion of the stage is used to move from one field to another. Those skilled in the art will be aware that distortions will increase non-linearly as the distance from the system axis increases and fields 31 at the edge of the wafer will have more distortion than those close in. Within a field, distortions also increase as the beam deflection increases.
It is standard practice to make a calibration wafer by writing a stock pattern, such as that shown in FIG. 3, measuring the wafer after transferring the pattern to the wafer, and generating an algorithm to convert the nominal data (if the fields in the system were perfect) to corrected data. Such corrected data will be referred to as global correction data and will depend on system distortions, not on the density or other features of the pattern being written. Conventional measuring systems, such as the LMS 2000 by the Leica company are commercially available to perform the measurement. Those skilled in the art will be aware that there is another class of errors that vary from one mask to another and that depend on at least the density of lines within a field 31.
The cited patent discloses an approach to correcting such errors by adding metrology features or marks, such as those shown in FIG. 3, in vacant portions of the particular mask in question. Thus, the distortions in the metrology marks located within the nth field (31n) will depend on the mask pattern in that field 31n. A sacrificial calibration wafer is made up containing the metrology marks and is discarded after the measurements for correction have been made.
As the art has progressed, the requirements for distortion correction have become more stringent and the density of features has increased, so that the previous method is no longer sufficient.
The previous method, moreover, not only made a sacrificial mask that was discarded, it also required two computer runs to generate the e-beam control data for the two masks. The computer resources used in the "post-processing" programs used to generate the e-beam data are non trivial. For example post processing for a complex state of the art microprocessor can take tens of hours on a powerful machine such as an IBM R/S 6000 mod 595. Since mask shops make masks in only small quantities, this expense cannot be spread over a lengthy production run and has a significant effect on the shop's costs.
Thus, the field of mask making has sought an economical method for obtaining pattern-dependent corrections. The field has also sought a method of reducing turn-around time in mask fabrication by reducing post-processing time.

Correction of pattern-dependent errors in a particle beam lithography system

International Business Machines Corporation


An exhaust aftertreatment system and method enables servicing by a single technician and provides singular location mounting and alignment.

The invention relates to exhaust aftertreatment assemblies.
Various exhaust aftertreatment assemblies require removal and servicing of an aftertreatment element, e.g. a particulate soot filter element and/or a catalyst element. For example, in the case of diesel engine emissions, a particulate soot filter element needs to be serviced after it builds up a certain amount of ash. One system for accomplishing this is to make the element removable from the exhaust aftertreatment assembly, and then cleaned remotely. Sections of the assembly are moved away from the filter element section and manually held by one technician, while another technician removes the filter element section.
The present invention rose during continuing development efforts relating to the above assemblies. In one aspect, the present system requires only one technician to accomplish the task of separating assembly housing sections and removing an aftertreatment element section for servicing. In another aspect, a system is provided facilitating orientation and alignment of sensors and ports in assembled housing sections relative to mounting structure, which is desired in certain applications including certain vehicle applications.

Serviceable aligned exhaust aftertreatment assembly


A device for detecting light intensity, a display screen and a mobile terminal are provided. The device for detecting light intensity includes a controller, and a first photosensitive sensor and a second photosensitive sensor which are electrically coupled to the controller, the first photosensitive sensor and the second photosensitive sensor being spaced apart and located in a same illumination environment, and the controller is configured to, when an external beam illuminates the first photosensitive sensor, perform calculation based on a difference value between illumination parameters of the first photosensitive sensor and the second photosensitive sensor to obtain a light intensity of the external beam.

A mobile terminal such as a mobile phone or a tablet computer is provided with a display screen to output corresponding display information. The display screen or device housing is provided with a light sensor that is connected to a control module and associated with the display screen to control the brightness or off of the display screen. For example, when the mobile phone is in a call state, the light sensor detects corresponding illumination parameter information, and may control a display area of the display screen to be turned off to avoid an accidental touch.
However, with the development of a display screen processing technology and the increasing screen-to-body ratio of a mobile phone screen, a ratio of a non-display area is decreasing, and it is difficult to stack and design light sensors on the mobile terminal. Moreover, the ambient light sensor (ALS) approaches a light emitting panel of an organic light-emitting diode (OLED)/liquid crystal display (LCD) of the display screen, and light of the light emitting panel leaked from the screen directly or indirectly illuminates the ALS, thereby resulting in a large noise floor and low detection accuracy.

Light intensity detecting device, screen member and mobile terminal

Beijing Xiaomi Mobile Software Co., Ltd.


Disclosed herein are ultraviolet absorbing glasses. The glasses can be strengthened by a chemical tempering process and maintain good mechanical and optical properties while having a reduced thickness compared to conventional glasses. The ultraviolet absorbing glasses can include coloring agents and can be formed into ophthalmic lenses. Methods of making and using the ultraviolet absorbing glasses are also described.

Numerous UV-protective glass (oxides) and plastic lens compositions have been previously described. Often, a trade-off exists between strength or mechanical properties and UV absorbance. For example, plastic lenses are lightweight due to their low densities; they can also be formed thinner than most glasses to further reduce weight. They also generally absorb UV radiation better than their glass counterparts. However, glass lenses, while typically heavier and thicker, are more scratch resistant and have better mechanical strength. Both glass and plastic lenses may be tinted a variety of colors, with the most common being green, gray, and brown.
One strategy for improving UV absorbance of glass lenses involves adding a cuprous or cuprous-cadmium halide crystal phase to non-photochromic colorless borosilicate glass. UV absorbance is improved in these glasses; however, the relative proportions of the oxide components in such compositions must be adjusted to maintain basicity. Thus, the use of alkali metals and alkaline earth metals is limited, which can adversely affect mechanical and optical properties.
An alternative strategy for improving UV absorbance of glass lenses involves the addition of silver salts to the glass composition, including a final hydrogen firing step to product a tint. However, the thickness of such glasses must be kept above about 1.8 mm when fabricated as lenses to insure adequate mechanical strength.
Thinner glass lenses with good mechanical properties have also been prepared, but are not designed to absorb UV radiation. Instead, they are designed to be used as laminates, with at least some of the scratch resistance and mechanical strength imparted by the additional laminated layers.
Consequently, there is a need for a thin glass material with the UV absorption capabilities of plastic and the high mechanical strength of glass. Ideally, small amounts of coloring agents could be used to produce a tint in these glasses without affecting optical or mechanical properties. The present application addresses this need.

Ultraviolet absorbing glass and articles thereof


A cask for whisky (10), e.g. in a hexagonal or triangular prism shape for ease of stackability. The cask is comprised of a number of staves (11), bound together to form the prism shape. Accordingly, stacking multiple casks naturally compresses the staves together and reduces spirit loss through the side wall of a cask. A method for stacking casks is also described, wherein the cask may be hexagonal, triangular or square ended.

A traditional whisky cask is a bilge-barrel shape, formed by a plurality of curved staves that result in an overall bulge when it is assembled and bound together. Such a bulge (bilge) is useful for manually rolling and controlling the direction of the cask, which may weigh 500 kg or more, on its side.
Casks for spirits can be made of any suitable material; however, whisky casks are required to be made from oak which is important for the maturation process. It is typically found that after several uses (e.g. at intervals of ten years when a new batch of spirit is introduced to the cask for maturation) the interior wood of the cask must be "rejuvenated" by flailing the surface (e.g. by wire brush) in contact with the spirit. As such an average barrel normally has a lifespan of 50 years.
The general design of whisky casks in common use, made from oak, has not changed significantly in many hundreds of years, although some attempt has been made to introduce new designs over the years. For example,    Patent Citation 0001: GB 1136469 A (GEORGE RICHARD MORRIS; ALVA DONALD MESSENHEIMER). Dec. 11, 1968.describes a square ended barrel with the intent to save space in a warehouse; since square shapes can pack together more efficiently than a circular/cylindrical shape that must necessarily have empty gaps therebetween.
However, GB1136469 in fact describes a "cabinet" construction and not a cask in the traditional sense. The staves of the cabinet must have a jointing mechanism and rely on an elastomeric bonding agent for sealing and cohesion.
A particular problem experienced with traditional cask designs, i.e. casks that do not utilise bonding and/or sealing agents, is that when warehoused (e.g. palletised upright or high racked on their bilge; in both cases up to six levels high) the staves can be forced apart by sheer weight, causing slow loss of spirit. Loss is also observed at the area of the bung where whisky is introduced/removed from the barrel.


A data recovery device. The device adjusts a digital signal according to a pulse signal output by a phase-locked loop circuit. The sampling circuit samples each bit of the digital signal five times to generate a first sampled signal. The data delay buffer decides a sampling range of the first sampled signal and outputs a second sampled signal. The sampling range selector picks a part of bits of the second sampled signal and outputs output data. The weighted detecting module outputs a phase shifting signal responding to the output data. The first loop filter outputs a first adjusting signal. The first sampling window module outputs a phase selecting signal. The second loop filter outputs the recovery signal and a second adjusting signal. The second sampling window module outputs the first phase checking signal and the second phase checking signal. The phase picking module outputs the output data.

1. Field of the Invention
The present invention relates in general to a data recovery device. In particular, the present invention relates to a device and method for high-speed data recovery using feedback of the sampled digital data.
2. Description of the Related Art
Normally, image data transmitted between the host and the monitor of a computer is an analog signal. The decoder of the monitor transforms the analog image data to digital image data. However, the image data will fade after transformation from analog data to digital data.
Therefore, a transition minimized differential signal (TMDS) interface has been developed. The system transmits data in a digital form. However, the image data fades because of shifting of the data.