An architecture and methods for self-sovereign digital identity is described. The method mimics the handling of identities in the physical world, by provisioning unique digital identities to people. Digital identities and consent tokens are said to be self-sovereign because they are tightly controlled by their owners using identity engines installed on personal devices. Identity engines are interoperable, establishing a web identity layer. Self-sovereign digital identities are used to identify their holders, sign and encrypt transactions, and create digital seals that cannot be repudiated. Digital seals affix the identities and attestations of collaborating parties to digital identities, consent tokens, transactions, documents, and other artifacts. Self-sovereign digital identities can be exchanged securely, verified using proof-of-possession and proof-of-custody tests when collaborating synchronously, and verified using a proof-of-existence identity registry when collaborating asynchronously.

The terms "identity", "credential", "electronic credential", "e-credential", "identity credential", "web identity", "online identity", "digital persona" and "digital identity" have been used, more or less, synonymously in the literature and by practitioners. In the current context, "self-sovereign digital identity" and "self-sovereign identity" specifically denote electronic identities that are tightly controlled by their owners.
The identity crisis caused by concentration and centralization of control over identity by web service providers, excessive capture of personal and private information, and over-dependency on passwords to authenticate users, has led our research for better ways to establish digital identities and use them to enhance user privacy, and secure transactions.
Today, private information is widely scattered to support a patchwork of identity schemes, bridges, add-ons, and protocols for identity access and management. Remote information access and sharing is much too dependent on passwords which can be stolen, lost, cracked, and hacked. Many web-based business models capture enormous volumes of private information while providing inadequate governance, control, and privacy protection. Most consumers/citizens are unaware or oblivious to the risks. The alarming growth of service provider repository breaches, disclosure of private data, fraud, and unattributed information, confirm that the identity crisis has not been solved.
The Internet needs a generative user-centric identity platform whereby users have and control and use richly specified digital identities by means of a single simple protocol across and "identity layer" that everyone implements.
Further, digital identities should be highly intuitive and easy to use, mimicking identity issuance in the real world.
Examples of identity on the web in the context of existing identity technologies and familiar processes used to issue physical identities include passports, driver licenses, bank cards, and credit cards issued to their owners.
Online user access and collaboration continues to be predominately secured by server-centric remote authentication methods including remote access passwords and biometric authenticators-controlled service providers. To overcome the limitations of server-centricity, self-sovereign identity schemes provide digital identities that can be completely controlled by their owners.
FIDO (Fast IDentity Online) is a consortium of companies offering authenticators that employ biometrics, time, counters and PINs to locally authenticate users, remotely binding them to online services by way of public-private key-pairs. Leoutsarakos discloses vulnerabilities in the FIDO protocol including the lack bilateral challenge-response protocol and the use of a single key-pair per online account. The present invention improves upon FIDO by combining user authentication with identity, proofing and attestation of the user, while supporting both online and peer-to-peer (owner-to-owner) secure collaboration.
OpenID Connect specifies protocols whereby web services control the provisioning of identity and access tokens enabling password-authenticated users to grant relying parties access to their web resources. Mladenov and Mainka disclose security flaws in the web server and client-side software and protocols. The present invention overcomes shortcomings by using self-sovereign digital identities to replace or augment passwords, and digitally seal consent tokens managed and controlled directly by their owners.
The Signal Messaging Protocol, formally analyzed by Cohn-Gordon et al. explains that this protocol for peer-to-peer messaging leverages long-term, medium-term, one-time, and ephemeral key-pairs, including key derivation and ratchet functions, to achieve strong forward and future secrecy. Signal's Key Agreement Protocol adapts the Diffie-Hellman method. However, Signal does not deliver identities characterizing collaborating parties, does not support identity proofing and attestation, and does not include methods verifying acquired or presented digital identities of collaborators.
Diffie-Hellman Key Exchange is a method relying on Elliptical Curve (EC) public-private key cryptography that enables collaborating parties to create a shared symmetric key to exchange information across an insecure channel. Hoffstein et. al. of Brown University explain that collaborators can each pick a secret private key, use exponentiation to create their public keys, and independently calculate the same shared secret key without knowing the private key of the other party.
The present invention adapts Diffie-Hellman to exchange self-sovereign digital identities including their embedded public keys.

Architecture and methods for self-sovereign digital identity


According to a certain embodiment, the nonvolatile semiconductor memory device includes: a first conductivity-type semiconductor substrate including a crushed layer on a back side surface thereof; a memory cell array disposed on a front side surface of the semiconductor substrate opposite to the crushed layer; and a first conductivity-type high voltage transistor HVP disposed on the semiconductor substrate and including a first conductivity-type channel, configured to supply a high voltage to the memory cell array. The first conductivity-type high voltage transistor includes: a well region NW disposed on the surface of the semiconductor substrate and having a second conductivity type; a source region and a drain region disposed in the well region; and a first conductivity-type first high concentration layer WT2 disposed between the crushed layer of the semiconductor substrate and the well region and having a higher concentration than an impurity concentration of the semiconductor substrate.

3-Dimensional (3D) NAND flash memories as nonvolatile semiconductor memory devices have been known. In 3D NAND flash memory chips, since the number of cells to be stacked increases as a generation progresses, the height of NAND flash memory devices formed on a semiconductor substrate also increases accordingly.
Accordingly, it is required to form such semiconductor substrates thinner, in order to form 3D NAND flash memory chips having a thickness within a specified thickness.

Semiconductor memory device capable of suppressing leakage current


An imaging apparatus includes an imaging section, an imaging acquisition range control section, a distortion information obtaining section, and a display section. The imaging section includes a lens and obtains an image data by imaging a subject image. The imaging acquisition range control section controls an acquisition range of the image data such that a part of the subject image is read out. The distortion information obtaining section obtains distortion information of the lens. The distortion correction section corrects distortion of the image data in accordance with the distortion information. The display section performs enlarged live-view display operation to display an enlarged image of the corrected image data in the acquisition range. The imaging acquisition range control section updates the acquisition range, when the distortion information is changed while the enlarged live-view display operation is performed, in accordance with the changed distortion information.

1. Field of the Invention
The present invention relates to an imaging apparatus having a distortion correction function, and an imaging method used in the imaging apparatus.
2. Description of the Related Art
In recent years, an increasing number of imaging apparatuses such as digital cameras have a live-view display function (also referred to as through-image display function). The live-view display function is a function of displaying an image, which is obtained by performing continuous imaging by an imaging device, on a display section in real time. The live-view display function enables the user to check composition in photographing and the like, by using the display section provided on the back surface of the digital camera. In addition, recently a function of the imaging device has also been improved, and there are imaging devices which can capture only signals corresponding to a partial range of the imaging devices. In recent years, enlarged live-view display operation has also become possible, by using the function of the imaging device described above. The enlarged live-view operation means operation of enlarging a partial range of the image displayed by the live-view display function and subjecting the part to live-view display, when the partial range of the image displayed is designated by the user.
The imaging apparatuses such as digital cameras generally have a lens to form a subject image on the imaging device. Since the lens has distortion, the subject image formed on the imaging device through the lens has a distorted shape with respect to the shape of the subject to be actually obtained. In recent years, various proposals have been made with respect to imaging apparatuses which have an electronic distortion correcting function of electronically correcting a distorted image obtained from the imaging device into an image with no distortion. For example, in Jpn. Pat. Appln. KOKAI Pub. No. 2005-45513, a desired small area in an image is read out and distortion correction for each small area can be performed. By using the method of Jpn. Pat. Appln. KOKAI Pub. No. 2005-45513, distortion correction can be performed also in the enlarged live-view operation.


In this invention a micro vacuum tube is used to form a flash memory cell. The micro vacuum tube is position over a floating gate and is used to program, erase, read and deselect the flash memory cell. A first embodiment includes a source and drain with the floating gate to provide a means to produce bit line current to be read by the flash memory sense amplifiers. In a second embodiment the source and drain are eliminated and cathode gate current is used to indicate the state of the flash memory cell. In a third embodiment the floating gate is replace with a diffusion in the semiconductor substrate. The cathode tip is formed by filling a depression in a sacrificial material used to temporarily fill the volume that will be the vacuum chamber when the vacuum tube is completed. The tip can be a convex cusp producing a needle like point or an elongated convex cusp having an sharp line edge. The two different shaped cathode tips depend on the shape of the vacuum chamber, and the elongated convex cusp produces a more efficient emission of electron.

1. Field of Invention
This invention relates to flash memories and more particularly to flash memory cells created from micro vacuum tube technology.
2. Description of Related Art
A micro vacuum tube is a cold cathode field emission device in which electrons are emitted into a vacuum at room temperature under a sufficiently high electric field. The electric field does not require a high voltage to produce emission providing that the emitting surface has a sufficiently small radius of curvature. Electrons are emitted by the cold cathode past a selector gate and collected at an anode. The anode can be a floating gate of a flash memory cell. One of the advantages of the micro vacuum tube is the small area required on the surface of a semiconductor substrate. The micro vacuum tube devices can be manufactured on the surface of a semiconductor substrate using integrated circuit techniques and finally sealing the micro vacuum tube with a layer of metalization under a vacuum.
In U.S. Pat. No. 5,731,597 (Lee et al.) a field emitter array (FEA) is incorporated with MOSFET's using common processing steps. In U.S. Pat. No. 5,651,713 (Lee et al.) describes a method for manufacture of a low voltage FEA array with minute gate holes on a semiconductor substrate. In U.S. Pat. No. 5,231,606 (Gray) is disclosed a FEA array having two or more collector electrodes, an extractor electrode, at least one deflector electrode and at least one electron field emitter.
In nonvolatile memories such as flash memories the durability of the oxide in the program and erase path is key to the longevity of the flash memory. A major issue with the development of flash memories is lessening the program and erase damage; however, it is inevitable that the oxide quality will decay and eventually end the useful life of a flash memory cell. A micro vacuum tube technology forming an FEA provides a means by which the classical degradation of an oxide does not exist because hot carriers are not used as a means to charge a floating gate. Instead a flow of electrons from a cold cathode is used to providing the charge for the floating gate.

Flash memory using micro vacuum tube technology

Taiwan Semiconductor Manufacturing Company


A method, non-transitory computer readable medium, and apparatus for processing a call on a mobile endpoint device in any orientation are disclosed. For example, the method receives an incoming call, detects a call answering signal, detects an audio signal within a time period after the call answering signal, determines an orientation of the mobile endpoint device and activates a microphone from a first speaker and microphone pair and a speaker from a second speaker and microphone pair based upon the orientation of the mobile endpoint device.

Current mobile endpoint devices are typically rectangular in shape and allow for orientation in two limited directions, e.g., portrait or landscape. As a result, a user is limited to having to orient the mobile endpoint device into one these two limiting options when viewing the display.
In addition, currently when a user receives an incoming call on his or her mobile endpoint device, the user can only answer the call in one direction or orientation if they put the mobile endpoint device to his or her ear (as opposed to using a speaker phone mode or a hands free kit). As a result, the user is always required to first look at his or her mobile endpoint device, rotate the mobile endpoint device until it is in the proper orientation and then answer the incoming call.

Method and apparatus for allowing any orientation answering of a call on a mobile endpoint device


The present invention provides a system and method for using a hardware-based compression of signals acquired with an magnetic resonance imaging (MRI) system. This allows a first multi-channel MR signal to be compressed to a second multi-channel MR signal having fewer channels than the first MR signal. This system and method reduces the number of RF receivers needed to achieve the sensitivity encoding benefits associated with highly parallel detection in MRI. Furthermore, the system and method reduces bottlenecks connection an MRI system's RF receiver and reconstruction computer and reduces the computational burden of image reconstruction.

The present invention relates generally to magnetic resonance imaging ("MRI") methods and systems and, more particularly, the invention relates to a system and method for the compression, in hardware, of acquired MR data.
When a substance such as human tissue is subjected to a uniform magnetic field (polarizing field B0), the individual magnetic moments of the excited nuclei in the tissue attempt to align with this polarizing field, but presses about it in random order at their characteristic Larmor frequency. If the substance, or tissue, is subjected to a magnetic field (excitation field B1) that is in the x-y plane and that is near the Larmor frequency, the net aligned moment, MZ, may be rotated, or "tipped", into the x-y plane to produce a net transverse magnetic moment Mt. A signal is emitted by the excited nuclei or "spins", after the excitation signal B1 is terminated, and this signal may be received and processed to form an image.
When utilizing these "MR" signals to produce images, magnetic field gradients (Gx, Gy and Gz) are employed. Typically, the region to be imaged is scanned by a sequence of measurement cycles in which these gradients vary according to the particular localization method being used. The resulting set of received MR signals are digitized and processed to reconstruct the image using one of many well known reconstruction techniques.
The measurement cycle used to acquire each MR signal is performed under the direction of a pulse sequence produced by a pulse sequencer. Clinically available MRI systems store a library of such pulse sequences that can be prescribed to meet the needs of many different clinical applications. Research MRI systems include a library of clinically proven pulse sequences and they also enable the development of new pulse sequences.
The MR signals acquired with an MRI system are signal samples of the subject of the examination in Fourier space, or what is often referred to in the art as "k-space". Each MR measurement cycle, or pulse sequence, typically samples a portion of k-space along a sampling trajectory characteristic of that pulse sequence. Most pulse sequences sample k-space in a raster scan-like pattern sometimes referred to as a "spin-warp", a "Fourier", a "rectilinear" or a "Cartesian" scan. The spin-warp scan technique is discussed in an article entitled "Spin-Warp MR Imaging and Applications to Human Whole-Body Imaging" by W. A. Edelstein et al., Physics in Medicine and Biology, Vol. 25, pp. 751-756 (1980). It employs a variable amplitude phase encoding magnetic field gradient pulse prior to the acquisition of MR spin-echo signals to phase encode spatial information in the direction of this gradient. In a two-dimensional implementation (2DFT), for example, spatial information is encoded in one direction by applying a phase encoding gradient (Gy) along that direction, and then a spin-echo signal is acquired in the presence of a readout magnetic field gradient (Gx) in a direction orthogonal to the phase encoding direction. The readout gradient present during the spin-echo acquisition encodes spatial information in the orthogonal direction. In a typical 2DFT pulse sequence, the magnitude of the phase encoding gradient pulse Gy is incremented (ΔGy) in the sequence of measurement cycles, or "views" that are acquired during the scan to produce a set of k-space MR data from which an entire image can be reconstructed.
There are many other k-space sampling patterns used by MRI systems These include "radial", or "projection reconstruction" scans in which k-space is sampled as a set of radial sampling trajectories extending from the center of k-space as described, for example, in U.S. Pat. No. 6,954,067. The pulse sequences for a radial scan are characterized by the lack of a phase encoding gradient and the presence of a readout gradient that changes direction from one pulse sequence view to the next. There are also many k-space sampling methods that are closely related to the radial scan and that sample along a curved k-space sampling trajectory rather than the straight line radial trajectory. Such pulse sequences are described, for example, in "Fast Three Dimensional Sodium Imaging", MRM, 37:706-715, 1997 by F. E. Boada, et al. and in "Rapid 3D PC-MRA Using Spiral Projection Imaging", Proc. Intl. Soc. Magn. Reson. Med. 13 (2005) by K. V. Koladia et al and "Spiral Projection Imaging: a new fast 3D trajectory", Proc. Intl. Soc. Mag. Reson. Med. 13 (2005) by J. G. Pipe and Koladia.
An image is reconstructed from the acquired k-space data by transforming the k-space data set to an image space data set. There are many different methods for performing this task and the method used is often determined by the technique used to acquire the k-space data. With a Cartesian grid of k-space data that results from a 2D or 3D spin-warp acquisition, for example, the most common reconstruction method used is an inverse Fourier transformation ("2DFT" or "3DFT") along each of the 2 or 3 axes of the data set. With a radial k-space data set and its variations, the most common reconstruction method includes "regridding" the k-space samples to create a Cartesian grid of k-space samples and then performing a 2DFT or 3DFT on the regridded k-space data set. In the alternative, a radial k-space data set can also be transformed to Radon space by performing a 1 DFT of each radial projection view and then transforming the Radon space data set to image space by performing a filtered backprojection.
Depending on the technique used, many MR scans currently used to produce medical images require many minutes to acquire the necessary data. The reduction of this scan time is an important consideration, since reduced scan time increases patient throughout, improves patient comfort, and improves image quality by reducing motion artifacts. Many different strategies have been developed to shorten the scan time.
One such strategy is referred to generally as "parallel imaging". Parallel imaging techniques use spatial information from arrays of RF receiver coils to substitute for the encoding that would otherwise have to be obtained in a sequential fashion using RF pulses and field gradients (such as phase and frequency encoding). Each of the spatially independent receiver coils of the array carries certain spatial information and has a different sensitivity profile. This information is utilized in order to achieve a complete location encoding of the received MR signals by a combination of the simultaneously acquired data received from the separate coils. Specifically, parallel imaging techniques undersample k-space by reducing the number of acquired phase-encoded k-space sampling lines while keeping the maximal extent covered in k-space fixed. The combination of the separate MR signals produced by the separate receiver coils enables a reduction of the acquisition time required for an image (in comparison to conventional k-space data acquisition) by a factor that in the most favorable case equals the number of the receiver coils. Thus the use of multiple receiver coils acts to multiply imaging speed, without increasing gradient switching rates or RF power.
Two categories of such parallel imaging techniques that have been developed and applied to in vivo imaging are SENSE (SENSitivity Encoding) and SMASH (SiMultaneous Acquisition of Spatial Harmonics). With SENSE, the undersampled k-space data is first Fourier transformed to produce an aliased image from each coil, and then the aliased image signals are unfolded by a linear transformation of the superimposed pixel values. With SMASH, the omitted k-space lines are filled in or reconstructed prior to Fourier transformation, by constructing a weighted combination of neighboring lines acquired by the different receiver coils. SMASH requires that the spatial sensitivity of the coils be determined, and one way to do so is by "autocalibration" that entails the use of variable density k-space sampling.
A more recent advance to SMASH techniques using autocalibration is a technique known as GRAPPA (GeneRalized Autocalibrating Partially Parallel Acquisitions), introduced by Griswold et al. This technique is described in U.S. Pat. No. 6,841,998 as well as in the article titled "Generalized Autocalibrating Partially Parallel Acquisitions (GRAPPA)," by Griswold et al. and published in Magnetic Resonance in Medicine 47:1202-1210 (2002). Using these GRAPPA techniques, lines near the center of k-space are sampled at the Nyquist frequency (in comparison to the greater spaced lines at the edges of k-space). These so-called autocalibration signal (ACS) lines are then used to determine the weighting factors that are used to reconstruct the missing k-space lines. In particular, a linear combination of individual coil data is used to create the missing lines of k-space. The coefficients for the combination are determined by fitting the acquired data to the more highly sampled data near the center of k-space.
Large coil arrays, for example, coil arrays having 96 or more channels, provide improved sensitivity and increased acceleration capabilities. However, MR systems currently capable of using these large coil arrays, that is, MRI systems equipped with 96 or more receiver channels, are expensive and scarce. Furthermore, image reconstruction from so many channels of data is a computationally expensive process that is especially problematic for high-resolution and high-acceleration imaging, which are the type of applications for which large coil arrays are typically designed. Unaccelerated image reconstruction is readily parallelizable with one processor assigned to each channel followed by a simple combination method such as the pixel-by-pixel, "sum-of-squares" method. In contrast, the computational burden and difficulties in parallelizing reconstruction increase dramatically when a method, such as GRAPPA or SENSE, is used in which all of the multi-channel data is operated on simultaneously. With GRAPPA for example, the computation burden scales approximately as the cube of the number of channels. Therefore, the reconstruction of an accelerated 96-channel scan can easily take ten times longer than the reconstruction of an accelerated 32-channel scan. This is true even when using an expensive, high-end reconstruction computer, for example, a dual quad-core Opteron with 32 GB RAM running 64-bit Linux.
The data-rate limitation of the communication bus between a digital receiver and a reconstruction computer poses an additional problem when acquiring multi-channel MR data using large coil arrays. For example, the throughput limit of common bus technologies, such as PCI, is approached when performing a 128-channel scan with a fast pulse sequence, for example, a 2D 64×64 echo planar imaging (EPI) pulse sequence at 15 slices per second. Methods such as echo volumar imaging (EVI), which may use a 64×64×48 matrix at five volumes per second, can produce a 40-fold increase in data-throughput requirements that exceeds the limitations of common bus technologies.
The computational burden of image reconstruction can be reduced by employing a software-based compression scheme to compress multi-channel MR data prior to reconstruction. These software-based compression schemes may implement a technique known as mode-mixing, which decomposes and transforms multi-channel data so that the signal-to-noise ratio (SNR) is contained within a small subset of channels, allowing channels that contribute relatively little to SNR to be eliminated. For example, digital mode-mixing schemes employing eigen-decomposition of singular value decomposition (SVD) are often used to compress images without significant losses in image quality. These digital mode-mixing strategies provide reduced computational burden during image reconstruction and may be optimized for a given array. Moreover, digital mode-mixing strategies allow the computation of multiple mode-mixing matrices to optimize different acquisitions, for example, unaccelerated SNR or SNR in an accelerated image with different rates or different acceleration directions. However, digital mode-mixing strategies cannot reduce MRI system receiver channel requirements or the data bus bottleneck between the digital receiver and the reconstruction computer.
Hardware-based compression of acquired MR data has been provided for specific coil arrays. For example, a traditional hardware-based, mode-mixing strategy for compressing MR data utilizes degenerate birdcage coils. Unlike high-pass or low-pass birdcage coils, the modes of oscillation of a degenerate birdcage coil are resonant at the Larmor frequency and the spatial patterns of the birdcage modes are orthogonal. Therefore, decomposition is not needed to diagonalize the sensitivity correlation matrix. Furthermore, the spatial modes have very unequal weights. The commonly used "uniform mode" contains the most sensitivity while "gradient modes" contain a null in the center and a monotonic increasing sensitivity towards the periphery. Importantly, half the modes have the correct circular polarization for MR detection, so-called "CP modes," while the other modes, the "anti-CP modes," have the incorrect polarization and contribute no new information. Since the anti-CP modes contribute nothing, they can be excluded with little penalty, thereby allowing the benefits of a 2N-channel coil with N receivers.
It has been shown that typical head coil arrays having a single ring of loop coils on a cylindrical frame show this type of degenerative birdcage symmetry. A hardware implementation of the complete mode-mixing matrix needed for forming birdcage modes from a cylindrical ring of loop elements has recently been developed. Birdcage modes are formed by sending equal amplitude currents to each element around a cylindrical ring with a phase relationship that varies in uniform steps from zero to 2π for the uniform mode, from zero to 4π for the first gradient mode, and so forth. As a result, the mode-mixing matrix resembles a Fourier transform. This technique was implemented for radar using quadrature hybrids and phase shifters by Butler in 1961. This "Butler matrix" and mode truncation have recently been used to capture the majority of the benefit of a 7T 16-element stripline transmit array using an 8-channel parallel transmit array.
Siemens has implemented another hardware-based mode compression scheme in its total imaging matrix (TIM) RF system, which utilizes a reduced and local implementation of the birdcage basis set. In this system, data acquired by clusters of three coils is combined locally before being sent to the receivers. TIM is a registered trademark of Siemens Aktiengesellschaft of Germany. Groups of three adjacent coils are combing using a 3×3 mode-mixing matrix with fixed values, which utilizes the phase relationship that these elements would have if they formed a sub-section of a cylindrical ring and the first three birdcage modes were desired. Thus, the three loop coils are transformed into a local approximation of the birdcage modes. These modes include the "primary mode," or CP-mode, in which the loops are added with the phase relation of the uniform birdcage mode; the "secondary mode" which utilizes the phases of the first gradient mode; and the anti-CP mode. To the extent that the cylindrical birdcage symmetry holds, the primary mode contains most of the sensitivity while the secondary mode holds some sensitivity near the periphery, and the anti-CP mode contributes relatively little. Therefore, if a large coil array is used with an instrument having a reduced number of receivers or if faster reconstruction is desired, only the primary mode or the primary and secondary modes are connected to the receivers.
While highly advantageous for specific coil arrays, such as cylindrically symmetric birdcage coils, traditional hardware-based mode-mixing strategies are more limited for general coil arrays. For example, the Butler matrix combination is inapplicable when coils are distributed along the direction of the principal magnetic field (B0). These limitations ultimately prevent the use of hardware-based MR data compression for a wide variety of applications. Furthermore, software-based mode-mixing strategies cannot reduce receiver channel requirements in MRI systems or data bottlenecks on the bus that conveys acquired scan data to an image reconstruction computer
It would therefore be desirable to develop a system and method for mode-mixing that reduces RF receiver requirements for MRI scanners, data bus bottlenecks, and the computational burden of image reconstruction.

System and method for variable mode-mixing in magnetic resonance imaging


In various embodiments, a remote client is allowed to access at least a part of a connection service located on alternate sources other than the primary remote presentation server. In some embodiments, the remote presentation virtual channels may be split into multiple connections with the purpose of allowing better flow control. Some embodiments may be implemented in a virtual machine environment for cases in which the data to be transferred through a data channel is located in the host virtual machine partition but the remote endpoint is located on the guest virtual machine partition.

Remote computing systems can enable users to remotely access hosted resources. Servers on the remote computing systems can execute programs and transmit signals indicative of a user interface to clients that can connect by sending signals over a network conforming to a communication protocol such as the TCP/IP protocol. Each connecting client may be provided a remote presentation session, i.e., an execution environment that includes a set of resources. Each client can transmit signals indicative of user input to the server and the server can apply the user input to the appropriate session. The clients may use remote presentation protocols such as the Remote Desktop Protocol (RDP) to connect to a server resource.
In remote desktop scenarios the graphics content of a user's desktop located on a host computer (e.g., the server) is typically streamed to another computer (e.g., the client). The server and the client will exchange the desktop graphics data in a well defined protocol or format. In some cases the graphics data may be generated on a host virtual machine and when the client end point is on a guest virtual machine partition, the guest virtual machine may have to communicate through a communication channel such as a virtual bus to receive the graphics data from the host, which in turn is transmitted to the client. Such a setup can introduce latencies that can affect the remote client's user experience. Thus, other techniques are needed in the art to solve the above described problems.


A method, system, and program for automated distribution of an instant messaging request for an unavailable intended recipient to a backup recipient are provided. A chat support system detects a particular messaging request from a requester for initiating a communication with an intended recipient who is unavailable to respond to the messaging request and, in response, the chat support system selects a backup recipient designated to receive the particular messaging request. The chat support system then directs the opening of a communication channel for a messaging session between the requester and the backup recipient. Then, the chat support system detects a message log of at least one message entry for the messaging session between the requester and the backup recipient. The chat support system then updates the intended recipient with the message log, such that even though the intended recipient is unavailable to respond to the messaging request, the intended recipient is enabled to monitor the resulting messaging session between the requester and the backup recipient.

1. Technical Field
The present invention relates in general to improved messaging systems and in particular to improving automated responses when an intended recipient is not available. Still more particularly, the present invention relates to automated distribution of a messaging request initiated for communication with an intended recipient to a backup recipient, wherein the intended recipient is updated with the message log from any resulting communication between the requester and the backup recipient.
2. Description of the Related Art
The use of electronic messaging and communications, such as electronic mail (e-mail), instant messaging, and text messaging has expanded rapidly over the last few years. Typically, an e-mail application, such as Lotus Notes (Lotus Notes is a registered trademark of International Business Machines Corporation), provides a user interface between the user and an e-mail server that sends and receives e-mail via a network, such as the Internet. In addition, typically, instant messaging applications and chat applications, such as AOL Instant Messenger (AIM) (AOL and AIM are registered trademarks of AOL, Inc.), provide a user interface between the user and an instant messaging server that opens a communication channel between at least two users and facilitates distribution of messages through that communication channel.
Since instant messaging is essentially "real-time" communication, this type of electronic communication is often used when users need to communicate immediately about a particular topic. As it evolves, instant messaging is commonly used as a substitute for telephone calls because the conversation can happen in "real-time" but all parties to the messaging session can remain at their computer system and respond when needed.
As much as the "real-time" communication element is a characteristic of instant messaging communications, many instant messaging applications and devices that facilitate instant messaging now allow users to set an "availability setting" indicating that the user is "logged off", "away from the desk", "available", and other settings that indicate a level of availability. In one example, a user may designate for a particular availability setting to be automatically selected when no user activity at a particular device is detected over a particular period of time.
When an intended recipient of a messaging request is unavailable, the intended recipient may have a designated backup recipient. Currently, however, messaging systems are limited because a requester will have to search for the designated backup recipient for the intended recipient in a directory and then initiate another messaging session with the designated backup recipient. Further, messaging systems are limited because when the requester initiates another messaging session, the initial intended recipient is left out of the communication. Moreover, as described with reference to co-pending patent application titled "AUTOMATED SELECTION OF A BACKUP RECIPIENT AND DISTRIBUTION OF AN INSTANT MESSAGING REQUEST TO THE BACKUP RECIPIENT", Ser. No. 11/006,125, herein incorporated by reference, messaging systems are limited because a requester searching for a backup recipient is typically limited to a single backup in a business directory, where that backup is only a backup for business subject matter, however, requesters may need a backup recipient for other types of subject matter.
Therefore, in view of the foregoing, it would be advantageous to provide a method, system, and program for automated distribution of a message request initiated by a requester to a backup recipient when an intended recipient is unavailable, wherein the intended recipient is updated with a message log of any resulting communication between the requester and the backup recipient.

This patent is subject to a terminal disclaimer.

Automated distribution of an instant messaging request for an unavailable intended recipient to a backup recipient


A multi-layer armor structure that includes a first composite layer and a second composite layer affixed to the first composite layer, wherein the second composite layer includes a metal plate and sound-wave-deadening material. The first and second composite layers form an overall composite layer. Some embodiments provide a multi-layer composite-armor article that includes a first metal layer, wherein the metal layer has an outer face that will be closer to an outermost surface of the armor article, and an inner face that will be farther from the outermost surface of the armor article; and a multi-layer polymer structure attached to the inner face of the first metal layer, wherein the polymer structure has an outer portion that is attached to the inner face of the first metal layer, and an inner portion that has a lower durometer value than the outer portion.

In combat vehicles, armor is generally placed on the vehicle to protect the occupants from injury or to lessen the type and severity of injuries received when an enemy hits the combat vehicle with a projectile.
In addition, combatants are constantly working to improve projectile apparatus and methods of deployment. In some instances, the projectiles are improved to increase their ability to pierce armor of various types. Similarly, other combatants seek to improve armor to defeat the latest in projectile technology. Therefore, combatants are constantly seeking to improve armor to protect the troops that operate combat vehicles.
There is a need for improved armor for vehicles and buildings.

Multi-layered composite belly plate and method of making and using


The present invention is an air purification method and device. Due to the lower airflow resistance that the present invention induces, an exhaust fan or blower with motor of lower torque is adopted. Consequently, the whole air purification is operated at a lower noise level. Lower operational voltage is applicable for the high-voltage electrostatic precipitator device and provides a similar or superior performance and effectiveness for dust removal. The air purification device/system is designed with higher flexibility and of more compact in dimension and size. Dust is removed from the environment by a high voltage electrostatic precipitator. The airflow stream within a high-voltage electrostatic precipitator is such that the direction of the path of the airflow is changed at least twice.

The air pollutants exist in two major physical phases: particle phase pollutants and gaseous phase pollutants. The particle phase pollutants are pollutants with significant physical sizes including dust particles, airborne bacteria and mold. They may be composed and be bound together by different matters with different compositions. The gaseous phase pollutants are pollutants with simple chemical structures. The size of the gaseous phase pollutants are small from angstrom to nano-scale.
There are many methods to eliminate the particle phase pollutants or pollutants with significant physical sizes. Conventionally, a High-Efficiency Particulate Arresting filter (HEPA filter) is used to filtrate particulate matter from the polluted air. On another hand, some may utilize a high-voltage to produce an electrostatic effect for dust removal. Some may release negative ion to the ambient, which eventually charges up the dust particulate, and allows them be collected in some regions which are relatively neutral or positively charged.
The efficiency and performance of using HEPA filter for dust removal is always better than that of the dust removal by the ionization or by the electrostatic precipitation methods. Nevertheless, the HEPA filter is a consumable item and cannot be recycled. It induces a high airflow resistant when the air is passing through it. When an air purifier integrated with HEPA filter, a fan with motor of relative large torque is usually needed in order to compensate the high airflow resistant that induced. It is not a environmental friendly method as more energy need to be consumed.
The air resistance induced by the electrostatic dust removal or particulate precipitation methods with the high-voltage component is usually low. To further improve the performance and efficiency of dust removal by a high-voltage component, higher operation voltage is usually employed. Though the operation current of the high-voltage is usually low, increasing of the operation voltage of the high-voltage component will lead to a high power consumption, which is not environmental friendly. In the past, many inventions disclosed special circuit design for the purpose to improve the performance of the high-voltage component for the electrostatic precipitation. Increase the operation voltage of the high-voltage component or decrease the distance between the positive and negative components of the electrostatic precipitator can generally help to improve the performance and efficiency of the dust removal. However, harmful ozone may be released as a side-product by these methods. On another hand, more strict regulations and requirements are imposed on the air purifier where high-voltage electrostatic precipitator for the safety concerns, which as a result, lower the flexibility and freedom on the design for the air purifier or air purification system. It is therefore difficult for designer of air purifier product to made the volume of air purifier small and compact.
Chinese utility model ZL200820120906.7 discloses an air purifier with high-voltage electrostatic precipitation component, where needle-shape charger is passing through the cylindrical electrostatic hollow collectors is disclosed. The invention reveals a one dimension, unidirectional and forwarding airflow path design. In order to increase the efficiency, very long cylindrical electrostatic hollow collectors are needed. Nevertheless, when the long cylindrical electrostatic hollow collectors occupied fully with dirty dust and particulates after used, the user would find the maintenance works become very annoyed and not convenience. The need of long cylindrical electrostatic hollow collectors would also lower the flexibility on air purifier design.
French patent FR 2623424 (A1) discloses that downstream of an ionization mean, a metal device for trapping the ionized particles by an electrostatic effect is installed. The metal device is curvature in shape and it is in perpendicular with the direction of the airflow. The airflow paths are allowed to be changed within a 2 dimensional planar orientation when come across the metal device, and hence the dust removal efficiency is therefore improved. Nevertheless, the process of fabrication of the metal device into this particular curvature shape during manufacturing is costly and complicated. Same as the mentioned Chinese utility model (Utility Patent No.: ZL200820120906.7), the maintenances works by the user after used are inconvenience as there are too many hidden curvature surface within the dust collector.


The present disclosure relates to a measuring instrument and a method implemented in such a measuring instrument. The measuring instrument includes an image sensor, an actuator, a control unit and a processor. The actuator is arranged to move a field of view of the image sensor. The control unit is configured to cause the image sensor to capture at least one digital image during motion of the field of view of the image sensor by the actuator. The exposure time for capturing the digital image is longer than an identifiable section of a regulating pattern for modulation of an optical radiation either emitted or reflected by at least one target. The processor is configured to process at least a portion of the captured image for detecting in the at least one portion the identifiable section of the regulating pattern. Such a measuring instrument is advantageous for detecting and/or identifying a target in the vicinity of the instrument.

The art of surveying involves the determination of unknown positions, surfaces or volumes of objects using measurements of angles and distances. For this purpose, a surveying instrument may comprise an electronic distance measuring device (EDM) which may be integrated with angle sensors in a so-called total station. A distance measuring total station combines electronic, optical and computer techniques and may furthermore be provided with a computer or control unit with writable information for controlling the measurements to be performed and for storing data obtained during the measurements. The total station may also comprise a tracking function, i.e. the total station may comprise a target tracker (or tracker unit). For tracking purposes, the total station may also include servo drives.
An optical quadrant tracker, or simply quadrant tracker, can be used to measure angular deviation of an optical radiation, e.g., a focused optical radiation such as a laser beam, from its ideal line-of-sight path and provide deviation signals indicative of the angular deviation from the ideal line-of-sight path in order to enable corrective adjustment of the line-of-sight path. The quadrant tracker typically comprises a photodetector enabling detection of a modulated signal contained in the optical radiation.
Tracking of a target in the vicinity of a measuring instrument, for instance for searching for, locking onto and/or identifying the target, may be performed using such a quadrant tracker.
Other techniques for obtaining these functionalities, and in particular for identifying the presence of a target, may be based on digital imaging using e.g. a CMOS sensor or the like. However, there is still a need to provide new methods and instruments improving these functionalities.

Method and measuring instrument for target detection and/or identification


A drone (2) has an upper coupler (6) that releasably connects to a lower coupler (8) of a second drone (4), interconnecting the drones in a stacked combined flying machine (5A). The couplers index a predetermined rotational relationship between the two drones about a central vertical axis (10). An embodiment (5C) provides coaxial counter-rotating propellers of the respective upper and lower drones. Other embodiments rotationally offset the upper and lower drones to minimize overlap (A1, A2) of the upper and lower propeller disks or to overlap only portions (A1) of the propeller disks that rotate in opposite directions. The couplers may have electrical connectors that integrate control systems (38, 40) that establish a master/slave control relationship.

Multi-copter drones provide aerial delivery of packages. A drone can be overloaded by a large package and under-utilized by a small package. Using only large drones would result in unnecessary expense for most packages. This can be addressed with a fleet of different sized drones. However, the need for a given sized drone at a given location at a given time is largely unpredictable, resulting in wasteful relocating of unloaded drones or often using local drones that are larger than needed.
U.S. Pat. No. 9,457,899 and US patent application 2016/0378108 teach connecting multiple drones side-by-side into a collective unmanned aerial vehicle (UAV) that can carry larger packages but can separate into smaller or single vehicles for smaller packages. This prior art teaches connecting the drones to each other by connectors on their propeller guards and related peripheral parts.


A hardware emulation system having a heterogeneous cluster of processors is described. The apparatus for emulating a hardware design comprises a plurality of processors, where each processor performs a different function during an emulation cycle. The method performed by the apparatus comprises using a data fetch processor to retrieve data from a data array, evaluating the retrieved data using the data fetch processor to produce an output bit, supplying the output bit to an intracluster crossbar and using a data store processor to store the output bit in the data array.

1. Field of the Invention
Embodiments of the present invention generally relate to a processor based hardware emulation system and, more particularly, to a heterogeneous processor based hardware emulation system.
2. Description of the Related Art
Hardware emulators are programmable devices used to verify hardware designs. A common method of hardware design verification is to use processor-based hardware emulators to emulate the design prior to physically manufacturing the integrated circuit(s) of the hardware. These processor-based emulators sequentially evaluate combinatorial logic levels, starting at the inputs and proceeding to the outputs. Each pass through the entire set of logic levels is known as a cycle; the evaluation of each individual logic level is known as an emulation step.
An exemplary hardware emulator is described in commonly assigned U.S. Pat. No. 6,618,698 titled "Clustered Processors In An Emulation Engine", which is hereby incorporated by reference in its entirety. Hardware emulators allow engineers and hardware designers to test and verify the operation of an integrated circuit, an entire board of integrated circuits, or an entire system without having to first physically fabricate the hardware.
The complexity and number of logic gates present on an integrated circuit has increased significantly in the past several years. Hardware emulators need to improve in efficiency to keep pace with the increased complexity of integrated circuits. The speed with which a hardware emulator can emulate an integrated circuit is one of the most important benchmarks of the emulator's efficiency, and also one of the emulator's most important selling factors in the emulator market.
Conventional hardware emulators are comprised of identical processors. The processors are generally arranged into groups of processors known as clusters. In a conventional hardware emulator, each processor performs an identical set of functions, i.e., retrieving data from a memory, evaluating the data, and writing the processed result back to the memory. Processors address the memory via an instruction word. The instruction word is stored in a special instruction memory and contains a read address for the data to be evaluated and a Boolean function table that instructs the processor on how to evaluate the data. The processor then stores the produced result back to the same memory location as indicated by the instruction address.
The amount of memory required by a conventional hardware emulator is directly dependent on the number of processors present in the hardware emulator. Specifically, the hardware emulator must contain a memory that is at least equal to the number of processors multiplied by the depth of the instruction memory. The instruction word must contain several address fields to enable the processor to address any location within the memory. Also, during each instruction execution cycle, each processor must perform numerous energy-consuming read and write accesses to the memory.
Thus, there is a need in the art for a hardware emulator that contains more processors than a conventional hardware emulator but does not require substantially more memory.

Hardware emulation system having a heterogeneous cluster of processors


A fine strontium carbonate powder having a BET specific surface area of 20 to 150 m2/g, which comprises spherical particles having a mean aspect ratio of 2.0 or less shows high dispersibility in liquid media and is of value for producing dielectric ceramic materials such as strontium titanate.

A strontium carbonate powder is of value as a material for producing dielectric material powders such as strontium titanate powder. For instance, the strontium titanate powder can be produced by mixing strontium carbonate powder and titanium dioxide powder to give a mixture thereof and calcinating the mixture. The dielectric material powders can be utilized for producing dielectric ceramic layers of multilayer ceramic capacitors.
Since electronic devices are recently requested to have a smaller size, the multilayer ceramic capacitors are also requested to have a smaller size. In order to manufacture multilayer ceramic capacitors, it is required that the dielectric ceramic layers of multilayer ceramic capacitors have a decreased thickness. In order to produce dielectric ceramic layers having a decreased thickness, it is necessary to employ fine dielectric ceramic powders having a uniform composition.
The fine and uniform dielectric ceramic powders can be produced from a uniform powdery mixture comprising fine ceramic components. The uniform powdery mixture is generally produced by a wet-mixing procedure. Therefore, it is desirous that the strontium carbonate powder for the production of a dielectric ceramic powder is fine and shows high dispersiblity in liquid media.
JP 2007-76934 A discloses a process for preparing a fine strontium carbonate powder, which comprises the steps of supplying gaseous carbonate dioxide into an aqueous solution or dispersion containing strontium hydroxide in an amount of 1 to 20 wt. % under stirring at a flow rate of 0.5 to 200 mL/min., per one gram of the strontium hydroxide, in the presence of an organic acid having 3 to 12 carbon atoms and at least two carboxyl groups or hydroxyl groups or carboxyl group in one molecule, thereby carbonating the strontium hydroxide to give an aqueous dispersion containing strontium carbonate particles; and drying the dispersion. Examples of the organic acid include citric acid, malic acid, adipic acid, gluconic acid, glucaric acid, tartaric acid, maleic acid, and ascorbic acid. Preferred are citric acid and ascorbic acid. JP 2007-76934 further describes that the disclosed process gives a fine strontium carbonate powder having a specific surface of 52 to 300 m2/g and that the fine strontium carbonate powder can be pulverized by means of ceramic beads to give strontium carbonate particles comprising primary particles having a size of 5 to 50 nm (size calculated from projected area thereof) and an aspect ratio of 2 or less.
JP 2008-222496 A discloses that a fine strontium carbonate powder showing increased dispersibility in liquid media can be prepared by treating a strontium carbonate powder with a polymer comprising a polycarboxylic acid or anhydride thereof which has a side chain of polyoxyalkylene group. JP 2008-222496 A further discloses that the treatment of a strontium carbonate powder with a polymer comprising a polycarboxylic acid or anhydride thereof which has a side chain of polyoxyalkylene group can be performed by pulverizing strontium carbonate particles in an aqueous medium containing the polymer by the use of ceramic beads.

Strontium carbonate micropowder and process for production


The embodiments relate to performing a write operation in a filesystem. Replica files embedded with respective sets of data are stored are on persistent storage local to replica nodes of the filesystem. The storage includes atomically updating the replica files to the replica nodes. Each set of data has information for self-characterizing each replica file. A map stored at persistent storage local to a remote node is updated. The map maintains information for identifying each replica file stored at each replica node.

The embodiments described herein relate generally to replica files stored at replica nodes in a filesystem. More specifically, the embodiments described herein relate to recovering from replica node failure using the stored replica nodes.
A filesystem is a term of art to refer to structure and logic rules for managing data (i.e., files). Specifically, filesystems are used to control how data is stored, retrieved, and updated. One type of filesystem is a distributed storage system, where replicated versions of a file are stored on multiple replica nodes. Distributed storage systems are used in scenarios in which high-performance data analytics is required over large datasets. Key challenges for managing such "big data" workloads within a distributed storage system include low-overhead durability or persistence to enable fast runtime performance, and enabling lower downtime for the distributed storage system during recovery from a failure at a replica node.
Traditionally, filesystem durability is provided through the use of logs, which are referred to herein as journals. Journals are used to keep track of intended changes to a filesystem such that, in the event of a filesystem crash or other failure, the filesystem can be returned to proper operation quicker and with a lower likelihood of corruption. However, utilizing journals in a distributed storage system results in poor performance and slow recovery. This is primarily because each node of the distributed storage system introduces a set of additional writes and cache flushes for ordering and persisting updates to storage. However, without journaling, filesystem recovery generally requires a complete scan of the address space of the storage system. This increases downtime because the filesystem cannot be mounted until a successful reconstruction of filesystem metadata during a filesystem consistency check for verifying crash consistency of lost updates. Additionally, the replicas of the distributed storage system need to be reconciled with each other to account for version consistency across the replica nodes. Both crash and version consistency checks result in performance loss and slow recovery for distributed storage systems. Moreover, the additional writes reduce the lifetime for wearable storage devices such as flash or solid-state drive memory technology.

Fast recovery using self-describing replica files in a distributed storage system


An efficient, multistep process for the synthesis of certain 6-(1-hydroxyethyl) 2-substituted penem antibiotics from 2-[4R-(triphenylmethylthio)-3S-(1R-(dimethyl-t-butylsilyloxy)ethyl)-2-azet idon-1 yl]acetic acid ester.

The present invention is directed to efficient multistep processes for the preparation of compounds of the formula (6) and (6'), as shown in Scheme 3 below; and to certain of the intermediates, specified by the general formulas (8) and (9) below, which find special value in these multistep processes. The compounds of the formulas (6) and (6') are useful as precursors of the various penem antibiotics specified by the formula (7) and (7'), also shown in Scheme 3 below.
Heretofore, a number of processes have been reported for the preparation of penem antibiotics substituted at the 2-position with an alkyl group or a thioether group, --SR.sup.2, as found in the formulas (6), (6'), (7) and (7') below. For thioether compounds (6) and (7), two of the more general of these processes are illustrated in Schemes 1 and 2. In Scheme 1, an alternative intermediate to the silver salt of the mercaptan is the mercaptan itself, reportedly obtained by Zn/H.sup.+ reduction of the tritylated thiol (Girijavallabhan et al., J. Antibiotics 39, 1182 (1986); U.S. Pat. No. 4,584,133). Menard et al., U.S. Pat. No. 4,272,437, has also described processes related to those of Scheme 2, which were applied more generally to the synthesis also of the compounds (6') and (7'). For example intermediates of the type (K) are reacted with an acylating agent such as EQU R.sup.5 R.sup.6 CH--COCl
to form compounds structurally related to (L), which in turn are heated to close the ring and thus form said compounds (6') and (7'). See also published application EP No. 199,446, where compounds of the type (6') and (7') below in which R.sup.5 and R.sup.6 are taken together are similarly prepared. ##STR1##
References:
Girijavallabhan et al., J. Antibiotics 39, 1182 (1986); U.S. Pat. No. 4,584,133, wherein ##STR2## R.sup.e =--CH.sub.2 CH.dbd.CH.sub.2, R.sup.f =beta-naphthyl, ##STR3## etc., X.sup.a =leaving group. DiNinno et al., U.S. Pat. No. 4,610,823 (1986); Leanza et al., Tetrahedron 39, 2505 (1983), wherein ##STR4## R.sup.g =alkyl, aralkyl, etc., X.sup.a =leaving group. PA0 (a) Hamanaka, U.S. Pat. No. 4,614,737; PA0 (b) Girijavallabhan et al., U.S. Pat. No. 4,614,738; PA0 (c) Hamanaka, U.S. Pat. No. 4,619,924; PA0 (d) Girijavallabhan et al., U.S. Pat. No. 4,443,463; PA0 (e) Girijavallabhan et al., U.S. Pat. No. 4,530,793; PA0 (f) Girijavallabhan et al., U.S. Pat. No. 4,584,133; PA0 (g) Ganguly et al., U.S. Pat. No. 4,690,922; PA0 (h) McCombie, European published application No. 61,205; PA0 (i) Hamanaka, European published application No. 132,101; PA0 (j) Hamanaka, European published application No. 138,539; PA0 (k) Perrone et al., European published application No. 199,490; PA0 (l) Takemura et al., European published application No. 210,883; PA0 (m) Kirkup et al., European published application No. 238,285; PA0 (n) Sunegawa et al., European published application No. 243,686; PA0 (o) McCombie et al., European published application No. 257,602; and PA0 (p) DiNinno et al., Tetrahedron Letters No. 3535 (1982).
See also Girijavallabhan et al., U.S. Pat. Nos. 4,443,373 and 4,530,793 for an alternative synthesis of the compounds (E), wherein R.sup.d is CH.sub.3 CHOH-- and R.sup.e is CH.sub.2 CH.dbd.CH.sub.2 or CH.sub.2 CH.sub.2 OSi(CH.sub.3).sub.3, from the compound (A). ##STR5##
*These steps assumed on the basis of the footnote 16 reference to U.K. No. 2,042,514.
Reference:
DiNinno et al., Tetrahedron Letters 23, 3535 (1982), wherein: ##STR6## --CH.sub.2 CH.sub.2 OH, etc.
See also Ganguly et al., J. Antimicrob. Chemo. 9, Suppl. C1, (1982) using several similar steps in a different sequence.
Ghosez et al., Tetrahedron Letters 39, 2493 (1983) have described the synthesis of 2-oxopenams from penicillin G and the conversion of same to 2-alkoxypenem derivatives of penicillin G. Japanese Kokai No. 84-115,788 (Chem. Abst. 96:34979y, Derwent Abst. 78700D) similarly describes conversion of hydroxy and carboxy protected 6-(1-hydroxyethyl)-2-oxopenams to the corresponding alkoxy analogs.
Additional, alternative methods for the synthesis of penems include those described by Dextraze et al., U.S. Pat. No. 4,769,451; Pirie et al., U.S. Pat. No. 4,751,297; Volkmann et al., U.S. Pat. No. 4,739,047; Brighty, U.S. Pat. No. 4,695,626; Brighty et al., U.S. Pat. No. 4,782,145; Perrone et al., J. Org. Chem., 51, 3413 (1986); Batastini et al., U.S. Pat. No. 4,631,150; UK Patent application No. 2,187,448; Alpegiani et al., U.S. Pat. No. 4,577,016; and Franceschi et al., J. Antibiotics 36, 938 (1983).
There have been numerous reports in the literature concerning the conversion of 2-oxocarbapenams and 3-oxocephams to 2-(alkylthio)-2-carbapenems and 3-alkylthio-3-cephems via enolic esters: ##STR7## where R.sup.h is a conventional carboxy protecting group, R.sup.i is, for example, diphenyl- or diethylphosphoryl, tosyl, mesyl, or trifluoromethanesulfonyl. See for example Sletzinger et al., Tetrahedron Letters 21, 4221 (1980); Andrus et al., J. Am. Chem. Soc. 106, 1808 (1984); Evans et al., Tetrahedron Letters 26, 3787 (1985), and 27, 3119 (1986) and U.S. Pat. No. 4,673,737; Ratcliffe et al., 21, 31 (1980); ibid. 1979, 4947; Salzmann et al., ibid. 21, 1193 (1980); Melillo et al., ibid. 21, 2783 (1980); Iimori et al., and J. Am. Chem. Soc. 105, 1659 (1983). However, the chemistry observed with these carbapenem ketone groups has been generally inapplicable to the thiolactone carbonyl group of 2-oxopenems. For example, the reaction of mesyl chloride or mesyl anhydride with a compound of the type (4) below produces a compound of the type ##STR8## while either tosyl chloride or triflyl chloride and a compound of the type (4) produces a compound of the type: ##STR9## More recently it was specifically reported in published European patent application No. 257,419 that a compound of the type (4) below was reacted with diphenylphosphoryl chloride to form the diphenylphosphoryl ester in situ, which was in turn reacted with a phenol to form a compound of the type ##STR10## in very low yield. This application offers no specific support for the asserted broader use of other potential enol ester forming reagents such as triflyl chloride, which is in fact a known chlorinating agent, not a triflate ester forming reagent (vide supra; and Hakimelahi et al., Tetrahedron Letters, 1979, pp. 3643-3644).


A hearing aid (100) fits in an ear of a user and amplifies a sound and outputs the amplified sound. Specifically, the hearing aid includes: a microphone (110) as a pick-up unit which picks up the sound; a wireless communicating unit (130) which receives, from an external apparatus connected via wireless, an instruction for outputting a searching sound, the instruction for outputting a searching sound which is used for outputting a searching sound; an amplifier (140) which amplifies the outputted sound; an earphone (150) as an outputting unit which outputs the sound amplified by the amplifier (140); and an operation switching unit (120) which switches between a hearing mode and a searched mode, the hearing mode causing the amplifier (140) to amplify a hearing sound which is a sound picked up by the microphone (110) with a use of a first amplification factor, and the searched mode causing the amplifier (140) to amplify the searching sound, in response to the reception of the instruction for outputting a searching sound, with a use of a second amplification factor greater than the first amplification factor.

Most of hearing-impaired people have chosen an in-the-canal hearing aid thanks to its inconspicuousness. Such a hearing aid includes: a body into which an electric circuit, such as a microphone, and a battery are built; an extending portion, having a speaker pore, into an external auditory canal; and a cover for covering the battery. An overall appearance of the hearing aid is designed in a shape and dimensions that allow the hearing aid itself to be inserted into the ear hole (See Patent Reference 1, for example).
Another hearing aid is equipped with a strap, so that the user may avoid misplacing and inadvertently dropping the hearing aid
Meanwhile, minor hearing-impaired people do not have to wear a hearing aid all day in the above manner. Thus, when the minor hearing-impaired people use an in-the-canal hearing aid, those people put on and take off the hearing aid more often than the regular impaired people do.

Hearing aid, hearing-aid apparatus, hearing-aid method and integrated circuit thereof


A method and apparatus for self-discovering throttling is described. The system includes a first queue to track a current rate of task completion and a second queue to track an average rate of task completion over time. The system further includes a comparator to compare an average of the first queue and an average of the second queue. The system includes a throttle to adjust the number of connections based on the results from the comparator.

Allocating computing resources can be difficult. For example, in multimedia messaging a large number of Multimedia Messages (MMS) can be concurrently sent to a Multi-media service center (MMSC). The number of messages can be so large that the computer system is overwhelmed. The parts that can be overwhelmed are:
1) CPU (central processing unit/processors)
2) bandwidth
3) memory
4) databases
5) other parts
In traditional resource allocation schemes, the system monitored each of the resources, and attempted to determine which resource was being overwhelmed. This added more overhead to the system, and thus slowed down an overwhelmed system even further. Additionally, the performance of a system may be affected by external factors, such as the available bandwidth, the capability of external system which sends or receives data from the system, or other factors. Therefore, an improved method of resource allocation would be useful.

Feedback integration of dynamic operations


A left ventricular assist device and method is utilized to relieve the hemodynamic burden on a diseased left ventricle in the heart of a patient by inserting a shunt having an impellar for effectuating a substantially non-turbulent, non-traumatic flow of blood either from the left atrium or the patient's venous system, directly into the patient's arterial system. The impellar shunt may be utilized in either a temporary or permanent implant setting.

The present invention relates generally to methods and apparatus for treating a diseased human heart, and in particular to a method and apparatus for treating a patient having a severely diseased left ventricle.
The human heart has four main chambers, the right and left ventricles and the right and left atria. From the right ventricle, blood is pumped through the pulmonary artery into the lungs, where the blood is oxygenated from the alveoli. The blood then returns from the lungs through the pulmonary veins into the left atrium. After passing through the mitral valve, the blood is then pumped out of the left ventricle and into the aorta and thence into the arteries of the body. The venous system then returns the blood to the right atrium via the inferior and superior vena cava. During diastole, the heart relaxes and blood fills the atria and ventricles. During systole, the right and left ventricles contract and drive the blood from the right ventricle into the lungs, and simultaneously from the left ventricle into the aorta and its branching arteries.
One type of heart ailment is commonly referred to in layman's terms as a "diseased left ventricle". This term is applied here to any heart disease in which the contractile properties of the left ventricle are impaired.
It is known that, even when a left ventricle of a patient is in a diseased condition, the left ventricle does not cease to function entirely; rather, the capacity of the left ventricle to deliver the proper amount of blood to the aorta is only partially reduced.
There have been recent suggestions for the insertion of pumping devices through the arterial system for relief of the diseased left ventricle, in order to provide mechanical assistance in delivering blood from the diseased left ventricle into the aorta.
In U.S. Pat. No. 4,105,016, Donovan discloses the use of a centrifugal blood pump in order to reduce the pressure in either the right or left ventricle in synchronism with the ventricular contractions of a diseased heart. The pump disclosed in the Donovan '016 patent is implanted in a parallel relationship with the ventricle to be assisted, and is run at a constant speed. When the ventricular pressure reaches a predetermined value, blood automatically begins to flow through the pump, thereby reducing the maximum allowable pressure in the ventricle being assisted.
In U.S. Pat. No. 4,688,998, Olsen et al disclose a ventricular assist pump utilizing a magnetically-suspended impeller inside a centrifugal flow tube. Other prior art centrifugal heart-assist pumps are also disclosed in the following United States patents: U.S. Pat. No. 3,647,324 to Rafferty et al.; Reissue No. 28,742 to Rafferty et al; and U.S. Pat. No. 3,608,088 to Dorman et al. Similar prior art is disclosed in an article by Tanaka et al, in an article entitled "A Compact Centrifugal Blood Pump for Extracorporeal Circulation: Design and Performance", Transactions of the ASME, Vol. 109, August 1987.
In the aforementioned patents to Rafferty et al, there is a detailed discussion of the complex makeup of blood and its constituents, and the deleterious effect on blood when it is subjected to shear action or other mechanical stresses; see Col. 2, lines 19-60 of U.S. Pat. No. 3,647,324.

Left ventricular assist device and method for temporary and permanent procedures


A method of managing a distributed cache structure having separate cache banks, by detecting that a given cache line has been repeatedly accessed by two or more processors which share the cache, and replicating that cache line in at least two separate cache banks. The cache line is optimally replicated in a cache bank having the lowest latency with respect to the given accessing processor. A currently accessed line in a different cache bank can be exchanged with a cache line in the cache bank with the lowest latency, and another line in the cache bank with lowest latency is moved to the different cache bank prior to the currently accessed line being moved to the cache bank with the lowest latency. Further replication of the cache line can be disabled when two or more processors alternately write to the cache line.

1. Field of the Invention
The present invention generally relates to computer systems, specifically computer cache memory, and more particularly to a method of managing a distributed cache structure of a multiprocessor computer system.
2. Description of the Related Art
The basic structure of a conventional computer system 10 is shown in FIG. 1. Computer system 10 may have one or more processing units, two of which 12a and 12b are depicted, which are connected to various peripheral devices, including input/output (I/O) devices 14 (such as a display monitor, keyboard, and permanent storage device), memory device 16 (such as random access memory or RAM) that is used by the processing units to carry out program instructions, and firmware 18 whose primary purpose is to seek out and load an operating system from one of the peripherals (usually the permanent memory device) whenever the computer is first turned on. Processing units 12a and 12b communicate with the peripheral devices and memory by various means, including a generalized interconnect or bus 20. Computer system 10 may have many additional components which are not shown, such as serial, parallel and universal bus ports for connection to, e.g., modems, printers or network interface cards. Those skilled in the art will further appreciate that there are other components that might be used in conjunction with those shown in the block diagram of FIG. 1; for example, a display adapter might be used to control a video display monitor, a memory controller can be used to access memory 16, etc. Also, instead of connecting I/O devices 14 directly to bus 20, they may be connected to one or more secondary (I/O) buses via I/O bridges connected to bus 20. The computer can have more than two processing units.
In a symmetric multiprocessor (SMP) computer, all of the processing units are generally identical, that is, they all use a common set or subset of instructions and protocols to operate, and generally have the same architecture. A typical architecture is shown in FIG. 1. A processing unit includes a processor core 22 having a plurality of registers and execution units, which carry out program instructions in order to operate the computer. The processing unit can also have one or more caches, such as an instruction cache 24 and a data cache 26, which are implemented using high speed memory devices. Caches are commonly used to temporarily store values that might be repeatedly accessed by a processor, in order to speed up processing by avoiding the longer step of loading the values from the more remote memory 16. These caches are referred to as "on-board" when they are integrally packaged with the processor core on a single integrated chip 28. Each cache is associated with a cache controller (not shown) that manages the transfer of data between the processor core and the cache memory.
A processing unit 12 can include additional caches, such as cache 30, which is referred to as a level 2 (L2) cache since it supports the on-board (level 1) caches 24 and 26. In other words, cache 30 acts as an intermediary between memory 16 and the on-board caches, and can store a much larger amount of information (instructions and data) than the on-board caches can, but at a longer access penalty. For example, cache 30 may be a chip having a storage capacity of 512 kilobytes, while the processor may have on-board caches with 64 kilobytes of total storage. Cache 30 is connected to bus 20, and all loading of information from memory 16 into processor core 22 usually comes through cache 30. Although FIG. 1 depicts only a two-level cache hierarchy, multi-level cache hierarchies can be provided where there are many levels of interconnected caches. Furthermore, cache 30 may also be an on-board cache. Caches are said to be horizontally oriented when they are on the same level of the memory hierarchy (e.g., caches 24 and 26), and are said to be vertically oriented when they are on different levels of the memory hierarchy (e.g., caches 24 and 30).
A cache has many blocks which individually store the various instructions and data values. The blocks in any cache are divided into groups of blocks called sets or congruence classes. A set is the collection of cache blocks that a given memory block can reside in. For any given memory block, there is a unique set in the cache that the block can be mapped into, according to preset (variable) mapping functions. The number of blocks in a set is referred to as the associativity of the cache, e.g. 2-way set associative means that for any given memory block there are two blocks in the cache that the memory block can be mapped into; however, several different blocks in main memory can be mapped to any given set. A 1-way set associate cache is direct mapped, that is, there is only one cache block that can contain a particular memory block. A cache is said to be fully associative if a memory block can occupy any cache block, i.e., there is one congruence class, and the address tag is the full address of the memory block.
An exemplary cache line (block) includes an address tag field, a state bit field, an inclusivity bit field, and a value field for storing the actual instruction or data. The state bit field and inclusivity bit fields are used to maintain cache coherency in a multiprocessor computer system (to indicate the validity of the value stored in the cache). The address tag is usually a subset of the full address of the corresponding memory block. A compare match of an incoming address with one of the tags within the address tag field indicates a cache "hit." The collection of all of the address tags in a cache (and sometimes the state bit and inclusivity bit fields) is referred to as a directory, and the collection of all of the value fields is the cache entry array.
When all of the blocks in a congruence class for a given cache are full and that cache receives a request, whether a "read" or "write," to a memory location that maps into the full congruence class, the cache must evict one of the blocks currently in the class. The cache chooses a block by one of a number of means such as least recently used (LRU) algorithm, random, pseudo-LRU, etc. If the data in the chosen block is modified, that data is written to the next lowest level in the memory hierarchy which may be another cache (in the case of an L1 cache) or main memory (in the case of an L2 cache), as depicted in the two-level architecture of FIG. 1. By the principle of inclusion, the lower level of the hierarchy will already have a block available to hold the written modified data. However, if the data in the chosen block is not modified, the block can be simply abandoned and not written to the next lowest level in the hierarchy. At the end of this process, the cache no longer holds a copy of the evicted block. When a device such as the CPU or system bus needs to know if a particular cache line is located in a given cache, it can perform a "snoop" request to see if the address is in the directory for that cache. Various techniques have been devised to optimize cache usage, such as special cache instructions and coherency states.
As multiprocessor systems have grown in size and complexity, there has been an evolution in the memory hierarchy toward the computer system topology known as non-uniform memory access (NUMA), which addresses many of the limitations of SMP computer systems at the expense of some additional complexity. A typical NUMA computer system includes a number of interconnected nodes that each have one or more processors and a local "system" memory. Such computer systems are said to have a non-uniform memory access because each processor has lower access latency with respect to data stored in the system memory at its local node than with respect to data stored in the system memory at a remote node.
In addition to non-uniform main (system) memory, multiprocessor systems can also employ a non-uniform cache architecture (NUCA). NUCA systems are becoming more prevalent as improvements in silicon technology allow increasingly larger amounts of caches and multiple processors to be incorporated into a single integrated circuit (IC) chip. In a NUCA scheme, the overall cache structure is distributed among many smaller cache banks or ways scattered on the IC chip. A cache block mapping function can spread a cache set across multiple banks. This arrangement will result in two processors on the chip having different latencies to different ways of the same set, and the latency of accessing a cache line from a remote cache way can be significantly higher than the latency of accessing it from a way that is closer to the processor. Thus, an L1 or L2 cache access may have considerably different latencies depending on the location of the bank holding the way where the requested value resides.
At any given moment, if a memory block is stored in a NUCA cache, it can only be located in one of the cache ways in a set. Throughout program execution, the cached value (program instruction or operand data) may move closer to the processor that accesses it more often due to natural cache usage and eviction. There is, however, a problem in the design of such multiprocessor systems wherein multiple processors share a NUCA cache. The value may move back and forth between horizontal cache banks of the two (or more) processors. This situation can result in a thrashing effect when there is a high rate of usage of that memory block by both processors, leading to inefficiencies and bottlenecks in overall processing throughput. It would, therefore, be desirable to devise an improved method of managing a distributed cache structure which mitigates or removes unwanted horizontal thrashing while retaining the benefits of a NUCA cache.

Data replication in multiprocessor NUCA systems to reduce horizontal cache thrashing


A rubber composition with 10-50 parts by mass of polyamide short fiber per 100 parts by mass of a rubber and 10-100 parts by mass of a solid lubricant per 100 parts by mass of the rubber.

1. Field of the Invention
This invention relates to rubber compositions and, more particularly, to a rubber composition that can be used to define a component of a power transmission belt.
2. Background Art
V-ribbed power transmission belts are used extensively in the automotive industry to drive various systems in engine compartments. As examples, these types of belts are commonly utilized to drive air compressors, alternators, etc.
It is common with this type of belt to embed, in ribbed portions of the belt, short fibers such as cotton, polyamide, vinylon, rayon, aramid, etc., with the lengths of the fibers aligned generally widthwise of the belt. The fibers provide lateral reinforcement to the belt body. It is also known to project the fibers from pulley-engaging side surfaces of the belt to controllably alter the frictional characteristics between the belt and cooperating pulley. At the same time, the projecting fibers suppress sound generation caused by adhesion between the belt and cooperating pulleys.
However, by increasing the lateral strength of the belt body through the incorporation of the reinforcing fibers, the ability of the rubber layer to elongate in the lengthwise direction of the belt may be decreased. The reinforcing fibers are commonly embedded in the compression rubber layer which experiences the decreased elongation capabilities. As a result, the bending properties of the reinforced rubber are generally adversely affected. By decreasing bending resistance, there is a tendency of the rubber to crack prematurely in normal operation. This cracking phenomenon is particularly prevalent in systems wherein the belt is caused to be severely bent in a serpentine manner and its outside surface is used to engage cooperating pulleys in use.
The recent trend in the automotive industry has been to design engines with greater displacement. Further, in the interest of reducing gas consumption and harmful emissions after combustion, these engines have been designed to operate in a lean combustion mode. Thus, there is a tendency of these engines to vibrate more significantly during operation than the conventional designs that preceded them. The power transmission belts operating on these engines are thus subjected to more severe vibratory conditions.
Further, these belts are typically operated in more compact engine compartments, thus requiring that they be trained around relatively small diameter pulleys at severe angles through a serpentine path. Thus the belts become heavily loaded and tend to generate a significant amount of sound during use. It is generally believed that the cause of the sound generation is a result of a repeated stick-slip phenomenon that occurs between the belt and cooperating pulleys.
To diminish the effects of this stick-slip phenomenon, it is known to apply powder, such as talc, to the pulley-engaging portions of the belt. It is also known to adhere silicone oil thereto. This surface treatment is intended to decrease the coefficient of friction between the engaging surfaces on the belt and pulleys. One method for treating belts in this manner is shown in JP-UM-B-7-31006.
In JP-A-5-132586, it is described that a silicone oil adsorbed in porous particles, such as activated carbon, on the exposed side surfaces of the belt, will keep the frictional coefficient between the belt and pulleys at a reduced, constant value over an extended operating period.
As another alternative, JP-A-2001-173728 discloses the blending of a solid, inorganic lubricant in a power transmission belt component to control frictional characteristics of the pulley-engaging surfaces thereon.
While applying talc powder or silicone oil to the pulley-engaging surfaces of the belt reduces stick-slip sound generation, generally this positive effect will not last for an adequate, extended period. During the initial stages of use, the coefficient of friction between the belt and pulleys may be adequately reduced. However, after extended running periods, the amount of lubricant/powder may diminish so that the effects thereof on the frictional characteristics of the belt likewise diminish unacceptably.
While the blending into the belt of porous particles with adsorbed silicone oil has extended the positive friction reducing effect over a more substantial period, there are inherent problems associated with making power transmission belts in this manner. It is difficult to uniformly blend and disperse the porous particles throughout the rubber in order to have the oil bleed uniformly and in an adequate amount at the exposed belt surfaces. Further, generally the porous particles only immediately at, or adjacent to, the exposed belt surfaces, bleed appreciably to significantly affect the frictional characteristics. Little, if any, bleeding of oil from any appreciable depth below the exposed surfaces may result.
It is also believed that the blending of a solid lubricant has limitations in terms of its long term effectiveness. Adequate reduction of the coefficient of friction between a belt and cooperating pulley may not be realized with belt constructions incorporating short reinforcing fibers.

Rubber composition and power transmission belt incorporating the rubber composition


Technology is described herein for encoding and decoding numbers. In one aspect, floating point numbers are represented as binary strings. The binary strings may be encoded in a manner such that if one bit flips, the average and maximum distortion in the number that is represented by the binary string is relatively small. In one aspect, 2^n binary strings are ordered across an interval [a, b) in accordance with their Hamming weights. Numbers in the interval may be uniformly quantized into one of 2^n sub-intervals. For example, floating point numbers in the interval [a, b) may be uniformly quantized into 2^n sub-intervals. These 2^n sub-intervals may be mapped to the 2^n binary strings. Thus, the number may be assigned to one of the 2^n binary strings. Doing so may reduce the distortion in the number in the event that there is a bit flip in the assigned binary string.

The present disclosure relates to technology for digitally encoding and decoding numbers.
One representation of numbers is the IEEE 754 standard for representing floating point numbers. In one implementation, referring to FIG. 1, a floating-point number 10 has a binary representation in which one bit is used for the sign 12, "e" bits are used for an exponent 14, and "m" bits are used for a mantissa 16. Thus, the floating point number 10 may be represented by a string of e+m+1 bits. This string of bits may be stored to memory and/or processed within a digital computer.

Hamming distance based binary representations of numbers


A method for installing a fastener by positioning a cap around the fastener, spraying a cooling agent from a sprayer of a cooling system. The fastener may have a top portion including a dielectric material. The cooling system may be configured to cool the top portion of the fastener to stiffen the top portion. A tool may be configured to install the fastener in a structure after cooling, while retaining the cooling agent within the cap.

1. Field
The present disclosure relates generally to aircraft and, in particular, to manufacturing aircraft. Still more particularly, the present disclosure relates to a method and system for installing fasteners with electromagnetic effect protection in an aircraft.
2. Background
In manufacturing aircraft, different parts may be connected to each other to form aircraft structures. Aircraft structures may include, for example, without limitation, a wing and a fuselage of an aircraft. In some cases, these aircraft structures are formed from composite materials.
A number of fasteners may be used to assemble composite structures, attach composite structures to the aircraft, or both. Typically, these fasteners may include a head and a metal shank. The head may have a top portion comprising at least one of a metal, a soft polymeric material, or some other suitable type of material. Thousands of fasteners may be used in forming the aircraft.
An aircraft formed from composite structures may be exposed to various types of conditions during operation. Some of these conditions may result in undesirable electromagnetic effects.
Composite structures in the aircraft may not conduct the electrical currents and electromagnetic forces generated by these conditions away from the structures in a desired manner. In other illustrative examples, these electromagnetic effects may have an undesirable effect on composite structures, systems within the aircraft, or a combination thereof.
To protect against electromagnetic effects, aircraft may be equipped with electromagnetic effect protection. Electromagnetic effect protection may be used to divert current in a desired manner. For example, without limitation, a conductive coating may be placed on the surface of a composite structure to divert current from a lightning strike away from metal fasteners used to join the composite structures. In other illustrative examples, a dielectric sealant may be used between components to reduce arcing and sparking.
In some instances, a dielectric coating may be associated with the head of the fastener to protect against electromagnetic effects. In an illustrative example, a cap formed from dielectric material may be placed on the head of the fastener. In another illustrative example, the outermost portion of the head of the fastener is formed from a dielectric coating. This dielectric coating may be formed from, for example, without limitation, a soft polymeric material.
Fasteners including electromagnetic event protection may be installed in various ways. For example, without limitation, at least one of human operators, human-controlled machines, or computer-controlled machines may install the fasteners using an installation device. The fasteners may be installed such that a substantially smooth surface is formed at the interface between the composite structure and the fastener. For instance, the fasteners may be countersunk into the surface of the composite structure. This substantially smooth surface may increase the aerodynamic performance of the aircraft.
In some cases, however, installing fasteners with electromagnetic effect protection may result in undesired inconsistencies forming on the top portion of the fastener. In this illustrative example, the top portion of a fastener may include the dielectric cap, dielectric coating, or both, associated with the head of the fastener. These inconsistencies may include, for example, without limitation, protrusions, cracks, voids, deformation, and other types of inconsistencies. These inconsistencies may reduce the effectiveness of the fastener at diverting electromagnetic effects, decreasing the aerodynamic performance of the composite structures, or both. Accordingly, there is a need for a method and system which take into account one or more of the issues discussed above as well as possibly other issues.

Method for installing fasteners with electromagnetic effect protection


A method for isolating a plant device of an industrial plant, wherein at least one safety measure is implemented on the plant device in order for work to be done safely on the plant device is provided. Isolation information is communicated to a control and protection system using a data communication unit having a data input that receives data from the plant device. An interface between the data communication unit and a control and protection system of the industrial plant is used to transmit the isolation information from the data communication unit to the control and protection unit. A device for isolating a plant device of an industrial plant to carry out work on the plant device is also provided.

In an automated industrial plant, such as a production line, a petrochemical plant, a power plant or conveying plant, an industrial process is carried out with the aid of a large number of plant devices. If one of these plant devices is to be repaired or maintained then it must be ensured that the plant device is not automatically and undesirably put into operation, loaded with media or connected to a power grid during the work. Catalogs of measures which list safety measures that are to be carried out before the start of the actual work on the plant device exist to ensure occupational safety. These safety measures are conventionally carried out by an industrial plant employee and the plant device is then isolated for the work to be carried out.
This isolation can take place in that the catalog of measures is ticked off measure for measure on a form, an industrial plant employee signs the form and a copy of the form is given to the maintenance engineer as confirmation of isolation. Once work on the plant device is concluded, the isolation is cancelled in that the maintenance engineer gives the industrial plant employee the confirmation of isolation again and he then reverses the safety measures. Only then is the plant device put back into operation.

Method for isolating a plant device of an industrial plant