A color television receiver having an automatic white control circuit which includes a detection circuit for detecting whether or not a given magnitude of a cathode current of a CRT flows, and generating a detection signal when the cathode current exceeds the given magnitude; and an interruption circuit for interrupting the supply of a video signal to the CRT until a given period of time has elapsed after the generation of the detection signal. The heat-up of the cathode of CRT is detected by the generation of the detection signal. The interruption circuit makes the CRT free from the video signal for the given period of time after the heat-up, so that no raster with maximum brightness appears after the power-on of the television receiver.

The present invention relates to an improvement of a color television receiver having an automatic white control circuit.
In a conventional color television receiver of an NTSC television system, a reference white color temperature of a CRT is set to be 6,774 K, for example. The reference white of the color temperature is the basis for color reproduction. Deviation between the CRT reference white color temperature and the color temperature of 6,774 K results in a color misregistration between the original color of a photographed object and the color reproduced by the television receiver. Therefore, the reference white must be accurately maintained at a predetermined value.
A color CRT of the color television receiver is driven by red (R), green (G) and blue (B) signal components extracted from a composite color television signal. The CRT drive levels at the R, G and B electron guns in response to the R, G and B signal components must be accurately set at predetermined levels in order to determine reference white. When the drive biases of the respective electron guns deviate from prescribed values, an adverse effect such as a cutoff error (deviation in cutoff level) of the color CRT occurs. The cutoff error is caused by a deteriotation in electron emission of the CRT cathode due to aging and/or caused by a drift of the operating point of associated circuitries. Accordingly, a color television receiver is generally provided with a means for adjusting the bias of the CRT in order to eliminate disadvantages due to the cutoff error.
The above bias adjusting means conventionally includes an electronic circuit with a service switch. The service switch has two switching positions. One is a "service position" and the other is a "normal position". When the service switch selects the service position, the CRT is off-circuited from a video signal and the vertical scanning is stopped. In this state, each cutoff voltage of electron guns of the CRT is set at a given value by adjusting each bias of the electron guns. Then, the CRT is properly cut off at the black level of the video signal, and the relative amplitude ratio among chrominance signals throughout the entire luminance level is properly maintained. When the bias adjustment is completed, gains of CRT drivers coupled to the respective electron guns are adjusted to predetermined values. As a result, the amplitude ratio among the R, G and B drive signals in the normal operation of the CRT becomes optimal.
The above-mentioned adjustment requires skill and experience. It is quite hard for general users to complete the above adjustment at home. When the color television receivers are used for a long period of time, the reference white becomes deviated from the prescribed value, resulting in unnatural color reproduction.
An automatic white control circuit has been recently proposed to automatically adjust the reference white even if a deterioration in the CRT cathode emission and an operating point drift in the associated circuitries occur. A typical example of such a white control circuit is shown in FIG. 1.
Referring to FIG. 1, a reference numeral 10 denotes an antenna. A television signal caught by antenna 10 is fed to a television signal processing circuit 11. Circuit 11 is generally formed of a tuner, PIF circuit, video detector, amplifier, chrominance/luminance separator, sync separator, etc. Color difference signals EllR, EllG and EllB for R-Y, G-Y and B-Y respectively appear at output terminals 11R, 11G and 11B of circuit 11. Signals E11R, E11G and E11B are supplied to matrix circuits 12R, 12G and 12G, respectively.
A video signal E11Y including a luminance signal -Y which appears at an output terminal 11Y of circuit 11. Signal E11Y is supplied via a mixer 13 to matrix circuits 12R, 12G and 12B. In circuits 12R, 12G and 12B, luminance signal -Y is mixed with color difference signals E11R, E11G and E11B (R-Y, G-Y and B-Y) to produce chrominance signals E12R, E12G and E12B for R, G and B, respectively.
A blanking signal E11S containing blanking pulses BLK appears at an output terminal 11S of circuit 11. Signal E11S is supplied to a pulse separator 14. In separator 14, blanking pulses BLK are separated into a vertical blanking pulse E14V and horizontal blanking pulse E14H. Vertical and horizontal blanking pulses E14V and E14H are supplied to vertical and horizontal blanking pulse shapers 15 and 16, respectively. Shaper 15 supplies a signal E15 containing a wave-shaped vertical blanking pulse VB to a signal generator 17. Shaper 16 supplies a signal E16 containing a wave-shaped horizontal blanking pulse HB to generator 17.
A reference insertion pulse E17A appears at an output terminal 17A of generator 17. Pulse E17A is supplied to mixer 13. In mixer 13, pulse E17A is inserted in a given part, excluding a picture signal interval, of one horizontal period of video signal E11Y. The inserted reference insertion pulse E17A is supplied, together with luminance signal -Y, to matrix circuits 12R, 12G and 12B.
Chrominance signals E12R, E12G and E12B outputted from matrix circuits 12R, 12G and 12B are supplied to cathodes 21R, 21G and 21B of a color CRT 21 via level correction circuits 18R, 18G and 18B, CRT drivers 19R, 19G and 19B, and output circuits 20R, 20G and 20B, respectively. DC levels of output signals E18R, E18G and E18B from circuits 18R, 18G and 18B are increased or decreased according to DC control voltages E35R, E35G and E35B. These voltages E35R, E35G and E35B are respectively supplied to control terminals 22, 23 and 24 of circuits 18R, 18G and 18B.
Hereinafter, CRT drivers 19R, 19G and 19B are represented schematically by CRT driver 19B. CRT driver 19B is formed of an NPN transistor 25. The base of transistor 25 receives signal E18B from level correction circuit 18B. The collector of transistor 25 is coupled via a resistor 26 to a positive voltage source Vcc, and the emitter thereof is circuit-grounded via a resistor 27. An output signal E19B from the collector of transistor 25 is supplied to output circuit 20B. The circuit arrangement of CRT drivers 19R and 19G may be the same as that of CRT driver 19B.
Output circuits 20R, 20G and 20B are similarly represented by output circuit 20B. Output circuit 20B includes a PNP transistor 28 whose base receives a signal E19B from the collector of transistor 25. The collector of transistor 28 is circuit-grounded via a resistor 29, and the emitter thereof is connected to cathode 21B of CRT 21. When the current amplification factor h.sub.FE of transistor 28 is far larger than "1", a cathode current I21B flowing from cathode 21B into the emitter of transistor 28 is substantially the same as the collector current of transistor 28. In this case, the voltage drop across resistor 29 directly corresponds to the cathode current I21B. Thus, resistor 29 serves as a current detecting resistor. The arrangement of circuits 20R and 20G may be the same as that of circuit 20B.
A signal E20B corresponding to the voltage drop at resistor 29 is supplied to a sampling circuit 33B. Signals E20R and E20G being proportional to cathode currents I21R and I21G of CRT 21 are similarly supplied from circuits 20R and 20G to sampling circuits 33R and 33G, respectively. Circuits 33R, 33G and 33B may be conventional sample/hold circuits. Each of sampling circuits 33R, 33G and 33B receives a gate pulse E17B obtained from an output terminal 17B of signal generator 17. Gate pulse E17B is generated in synchronism with the generation timing of reference insertion pulse E17A (a detailed description regarding the generation timing of E17A and E17B will be made later with reference to the timing chart of FIGS. 2A to 2E).
Sampling circuit 33R samples the DC potential of signal E20R at the duration of reference insertion pulse E17A, and holds the sampled potential to provide a sampling output signal E33R. Sampling circuit 33G samples the DC potential of signal E20G at the duration of pulse E17A, and holds the sampled potential to provide a sampling output signal E33G. Sampling circuit 33B samples the DC potential of signal E20B at the duration of pulse E17A, and holds the sampled potential to provide a sampling output signal E33B.
Sampling output signals E33R, E33G and E33B are supplied to respective negative inputs (-) of comparators 35R, 35G and 35B. Each positive input (+) of comparators 35R, 35G and 35B receives a reference potential E1 from a reference potential source 36. Comparators 35R, 35G and 35B respectively supply DC control voltages E35R, E35G and E35B to control terminals 22, 23 and 24 of level correction circuits 18R, 18G and 18B. Then, three independent negative feedback control loops for R, G and B are formed. DC control voltages E35R, E35G and E35B from comparators 35R, 35G and 35B increase when the potentials of sampling output signals E33R, E33G and E33B become lower than reference potential E1. Voltages E35R, E35G and E35B decrease when the potentials of signals E33R, E33G and E33B become higher than reference potential E1. DC control voltages E35R, E35G and E35B are converged to certain values by the DC negative feedback operation when the differences between the reference potential E1 and the respective potentials of signals E33R, E33G and E33B become zero.
Incidentally, a high voltage is applied to the anode of CRT 21 via an anode cap 40. Horizontal and vertical deflection currents are supplied via terminals 42 and 43 to a deflection coil 41. Other non-essential parts for the present invention, such as an audio circuit etc., are not illustrated.
The automatic white control circuit of FIG. 1 will operate as follows.
FIG. 2A shows a typical waveform of video signal E11Y from terminal 11Y of television signal processing circuit 11. In FIG. 2A, reference symbol VB denotes a vertical blanking pulse; HB denotes a horizontal blanking pulse; and L denotes a picture signal. FIG. 2B shows a waveform of signal E15 from vertical blanking pulse shaper 15, and FIG. 2C shows a waveform of signal E16 from horizontal blanking pulse shaper 16. Blanking pulses VB and HB shown in FIGS. 2B and 2C are supplied to signal generator 17. Reference insertion pulse E17A shown in FIG. 2D appears at output terminal 17A of signal generator 17. Pulse E17A is generated, excluding the period of picture signal L, within an interval (T1) of horizontal blanking pulse HB. Pulse E17A can be easily obtained by a conventional counter circuit with a proper gate circuit. Pulse E17A (FIG. 2D) is mixed in mixer 13 with video signal E11Y (FIG. 2A), so that a composite signal E13 (FIG. 2E) is obtained. Composite signal E13 is supplied to the respective cathodes of CRT 21 via circuit elements 12, 18, 19 and 20.
In the following description, the operation regarding the blue circuit elements represents each operation of the red, green and blue circuit elements.
Cathode current I21B from cathode 21B of CRT 21 flows into resistor 29 through the emitter-collector path of transistor 28. Resistor 29 provides a voltage drop corresponding to the magnitude of cathode current I21B, and signal E20B having a potential corresponding to the above voltage drop appears at the node between resistor 29 and the collector of transistor 28. Signal E20B is then supplied to sampling circuit 33B. Circuit 33B receives gate pulse E17B in synchronism with the generation (period T1) of reference insertion pulse E17A. Gate pulse E17B determines the timing of sampling and holding operations in circuit 33B. Sampling circuit 33B samples the potential of signal E20B and holds the sampled potential in a capacitor Cb. The sampled and held signal E33B is supplied to the negative input (-) of comparator 35B.
Comparator 35B has a characteristic as shown in FIG. 3. When the reference potential applied to the positive input (+) of comparator 35B is given to be E1 and the input and output potentials of comparator 35B are respectively plotted along the abscissa and ordinate, the output potential (E35B) decreases as the input potential (E33B) increases.
Level correction circuit 18B has such an electrical characteristic that the output DC level of signal E18B raises when DC control voltage E35B applied to control terminal 24 increases, while the output DC level of E18B falls when E35B decreases.
When the emission of cathode 21B is deteriorated (or a certain drift in the operating point of associated circuitries occurs), the corresponding cathode current I21B flowing into resistor 29 of circuit 20B becomes small. The potential of signal E33B from sampling circuit 33B is proportional to the magnitude of cathode current I21B which is obtained at the period of reference insertion pulse E17A (FIG. 2D). Since the sampling is performed only during the period T1 of reference insertion pulse E17A, the potential of signal E33B is independent of the period of picture signal L. Thus, when the deterioration of cathode emission occurs, the sampled output E33B is decreased regardless of the presence of any picture signal L.
Comparator 35B compares reference potential E1 with the potential of sampled output E33B. When a deterioration of the cathode emission occurs, comparator 35B generates DC control voltage E35B which is increased in accordance with the characteristic of FIG. 3. Then, the DC level of signal E18B from level correction circuit 18B is increased, thereby increasing the corresponding cathode current I21B.
On the contrary, when the cathode current increases, operation opposite to the operation described above is performed so as to decrease the corresponding cathode current. The increase/decrease operation point of the negative feedback control is stably converged to a point at which the difference between the reference potential E1 and the sampled output E33B becomes zero.
The cathode emission correction operation for R and G components may be performed in the same manner as that for the B component as described above. When the negative feedback control circuit is arranged to set the difference between the reference potential (E1) and the sampled output (E33) to be zero while the initial reference white is properly adjusted, the CRT biases for R, G, and B are automatically adjusted even if a deterioration in the cathode emission of CRT or a drift in the operating point of associated circuitries occurs. As a result, an automatic correction is so performed that the reference white is always maintained at a predetermined value.
In a color television receiver having the automatic white control circuit described above, no problem occurs in normal operation. However, when the power of a color television receiver has been switched off for a long period of time, the temperature at each cathode of a CRT is substantially the same as room temperature. When the power of a color television receiver is switched on under this condition, a certain period of time (generally several seconds) is required to heat-up the CRT cathode. Unless the CRT cathode is heated up to a sufficient temperature, no cathode emission is obtained and no cathode current flows. As is apparent from the negative feedback operation described before, when no cathode current flows, each potential of outputs from sampling circuits 33R, 33G and 33B becomes minimum. For this reason, the outputs from comparators 35R, 35G and 35B and hence the output DC levels of level correction circuits 18R, 18G and 18B are increased, so that the drive voltage for each cathode of the CRT is fixed at the saturation level of the CRT drive circuits. (In this condition, each cathode potential of the CRT is minimum so as to increase the cathode current because each of the negative feedback loops detects no cathode current.) Under this condition, when each cathode temperature rises over a certain value, each cathode current begins to flow. Then, the drive voltage for the CRT cathode begins to decrease and is converged to a certain given value.
When the power of the above color television receiver is switched on with cool CRT cathodes, a picture is reproduced under the minimum cathode potential so that the raster of CRT always appears with the maximum brightness at the initial period of power-on, thereby shortening the life of CRT, causing deviations in reference white, and discomforting viewers. This is the problem to be solved by the present invention.


This invention relates to flame retardant nanocomposites and methods of reducing the flammability of polymeric compositions using nanotubes.

Due to their unique mechanical, thermal, and electrical properties, discrete fillers, including functionalized nanotubes, discrete carbon fibers, multi-walled nanotubes, ceramic powders, metallic nanoparticles, silicates, or single-walled carbon nanotubes, could be used for making polymeric nanocomposite materials with exceptional properties.
For example, if such fillers improved the flammability properties of polymers, they would provide an alternative to conventional flame retardants. The flame retardant (FR) effectiveness of clay-polymer-nanocomposites with various resins has been demonstrated (see, e.g., Giannelis, E., Adv. Mater. 1996, 8(1), 29; Gilman, J. W.; Kashiwagi, T., SMAPE J. 1997; 33(4), 40; Gilman, J. W., Applied Clay Sci. 1999; 15, 31; Zhu, J.; Morgan, A. B.; Lamelas J.; Wilkie, C. A., Chem. Mater. 2001; 13, 3774; Zanetti, M.; Camino, G.; Mulhaupt, R., Polym. Degrad. Stability, 2001; 74, 413; Gilman, J. W.; Jackson C. L.; Morgan, A. B.; Harris, R. Jr.; Manias, e.; Giannelis, E. P.; Wuthernow, M.; Hilton, D.; Phillips, S. H., Chem. Mater. 2000; 12, 1866). Similarly, the FR effectiveness in poly(methyl methacrylate) ("PMMA") of nanoscale silica particles (average diameter of 12 nm) has also been disclosed (Kashiwagi, T., Morgan, A. B., Antonoucci, J. M., VanLandingham, M. R., Harris, R. H., Awad, W. H. and Shields, J. R., Thermal and Flammability Properties of a Silica-PMMA Nanocomposite, J. Appl. Poly. Sci. Vol. 89, No. 8, 2072-2078, 2003). Likewise, multi-walled carbon nanotube/poly(propylene) composites made by shear mixing method showed a significant increase in decomposition temperature due to presence of the nanotubes (Kashiwagi, T.; Grulke, E.; Hilding, J.; Harris, R.; Awad, W.; Douglas, J. Macromol. Rapid Commun. 2002, 23, 761), and multi-walled carbon nanotubes have also been studied in ethylene vinyl acetate (Beyer, G., Fire Mater., 2002; 26, 291).
Single-walled carbon nanotubes ("SWNTs") possess a unique combination of strength, high modulus of elasticity, and excellent heat and electrical conductivity. However, SWNTs are prone to aggregation ("bundling") due to Van der Waals attraction among the tubes, which have large surface areas. Adequate dispersion is a key factor in composite performance, and many previous attempts to uniformly disperse SWNTs throughout a polymer matrix have been less than fully successful.
It has now been discovered that a flame retardant composite can be made from SWNTs uniformly dispersed throughout a polymer matrix to form a composite.

The Trustees of the University of Pennsylvania


A method for forming tubular solid oxide cells is described. The methods include co-extrusion of an electrode precursor and a sacrificial material to form a multi-layered precursor followed by phase inversion and sintering to remove the sacrificial layer and form an electrode substrate for use in a tubular solid oxide cell. Upon phase inversion and sintering of the precursor, a micro-channel array can be generated in the electrode that is generally perpendicular to the tube surface. The open pored micro-scale geometry of the porous electrode substrate can significantly reduce resistance for fuel/gas transport and increase effective surface area for electrochemical reactions.

The solid oxide cell is an environmentally friendly and highly efficient energy conversion technology that can convert chemical energy directly to electricity in the fuel cell mode (SOFC) and vice versa in the electrolysis mode (SOEC). This technology has wide stationary and mobile applications and is of interest in power applications (e.g., transportation and power grid applications), in fuel production and energy storage, in chemical synthesis, and as an electrolyzer in various applications (e.g., pressurized oxygen production in medical applications). In general, a solid oxide cell includes a solid oxide ionic (or protonic) conducting material layer as electrolyte separating two electrodes that are also based on ceramics that become electrically or ionically active at relatively high temperatures. In the fuel cell mode oxygen is reduced at a first electrode (the cathode) to form oxygen ions that diffuse across the electrolyte and serve to oxidize the fuel, e.g., hydrogen gas, carbon monoxide gas, to form water and carbon dioxide gases, respectively, at the second electrode (the anode) in order to produce electricity. The process is reversed in the electrolysis mode during which water can be electrolyzed to produce hydrogen and oxygen gases, or carbon dioxide can be electrolyzed to produce carbon monoxide and oxygen gases.
Among various configuration designs, micro-tubular solid oxide cells (MT-SOFCs) have attracted increasing attention due to the advantages of good thermal cycling stability, good thermal shock resistance, easy sealing, high volumetric power density, and quick start-up capability. Unfortunately, the micro-tubular configuration imposes great challenges on fabrication process designs, especially when the diameters of the micro-tubes reach millimeter or sub-millimeter scales, which are required to meet volumetric power density goals. A phase inversion-based spinning method has been successfully demonstrated for the fabrication of anode-supported MT-SOFCs. Typical microtubular anode substrates prepared by this method have the feature of multiple-layered microstructures, with a sponge-like layer sandwiched by two thicker layers and including thin but relatively dense skin layers covering the inner and outer surfaces of the anode. The thick layers define large continuous finger-like pores perpendicular to the sponge-like layer, but both the sponge-like layer and the skin layers contain small and non-continuous pores. As a result, the porosity of these structures is very low. These anode substrates, albeit unique, show serious disadvantages for facile fuel/gas transport as, although the thick finger-like layers do facilitate gas transport, the poor transport properties of the sponge-like layer and the thin skin layer of the inner surface of the substrate can significantly increase resistance to fuel/gas diffusion. This in turn can severely deteriorate electrochemical performance of MT-SOFCs.
A need exists for improved methods for synthesizing microtubular electrodes for use in solid oxide fuel/electrolysis cells. For instance, a method that can provide a microtubular electrode substrate that can demonstrate improved fuel/gas diffusion can provide for improved electrochemical performance of MT-SOFCs.

Fabrication method for micro-tubular solid oxide cells


A logic translating buffer for low voltage operation for receiving a TTL compatible signal and providing a current mode logic signal. The logic translating buffer includes an emitter coupled differential pair of NPN transistors with the common emitters each being connected to a current source. One of the transistors of the differential pair has a constant voltage bias applied to the base thereof that is equal to the sum of a forward biased PN junction, a forward biased Schottky diode, and the voltage drop across a first resistor. The other transistor of the differential pair is provided a signal that is representative of the logic level input to the translating buffer. A clamping transistor is provided for keeping the other transistor of the differential pair from saturating.

The present invention relates to a buffer for interfacing a signal to a device and, in particular, to a buffer that is capable of interfacing between a TTL compatible output signal provided by a device operated with a five volt nominal supply voltage and a device suited for operation with a supply voltage that is substantially less than five volts, e.g. 2.5 volts.
A buffer is used in digital logic assemblies to provide a separation in impedance between logic elements. Buffers are frequently used in combination with logic elements as part of an integrated circuit (IC). These integrated circuits make use of an input buffer for receiving logic signals from other assemblies and output buffers for transmitting logic signals to other logic assemblies.
Input buffers that are part of an integrated circuit are frequently used to interface relatively low logic impedance elements with logic elements that have relatively high impedance. These low impedance elements are often output buffers that are capable of driving loads that have relatively low input impedance. In contrast, the high impedance elements are frequently logic elements that have high input impedance and are part of the integrated circuit. These input buffers may also provide additional features such as electrostatic discharge protection for preventing relatively large voltages on the logic inputs from damaging the integrated circuit. In addition, input buffers are frequently capable of interpreting an electrically unconnected input or "floating" input to the integrated circuit as a predefined logic state. For example, TTL input buffers frequently make use of a pull down resistor so that a floating input is interpreted as a logic low state.
When interfacing between digital logic assemblies of different families, it is often necessary that a level shifter or translator circuit be used. Each of these families of integrated circuits, such as complementary-metal-oxide-semiconductor (CMOS), transistor-transistor logic (TTL) and emitter coupled logic (ECL) have characteristic parameters for logic high and logic low states. Therefore, the translator or level shifter must be capable of accepting the voltage or current levels from one logic family and providing the appropriate voltage and current levels for the second integrated circuit family for which the translator is providing an interface.
FIG. 1 shows a prior art input buffer 10 that operates with a five volt nominal supply voltage. Input buffer 10 includes an input terminal 12 for receiving a TTL compatible signal from a device operating with a five-volt nominal supply voltage. Input buffer 10 further includes a pair of output terminals 14 and 16 for providing a differential current mode logic (CML) signal for a device operating at a five volt nominal supply. Signals present at output terminals 16 and 14 represent the positive or true output signal and the negative or complement output signal, respectively. The positive side of the supply voltage is connected to a terminal 18 and the negative side of the supply voltage is connected to a terminal 20.
Input buffer 10 includes a switch control transistor 22 that receives a signal at the input terminal 12 and provides a control signal for operating a current switch circuit. The current switch circuit includes a pair of transistors 24 and 26 that are connected in a common emitter configuration to a current source transistor 28. Each of transistors 24, 26 and current source transistor 28 have an emitter, base and collector.
A constant polarity voltage bias is applied between the base and emitter of current source transistor 28. The current source transistor 28 is biased by resistor 30, diode 32, transistor 34 and resistor 36 each connected in series between the positive terminal 18 and the negative terminal 20. Transistor 34 has a base and a collector that are electrically connected together to form a PN junction between the collector and an emitter.
The bias voltage applied to the base of current source transistor 28 is equal to a forward bias voltage drop across the PN junction of transistor 34 plus a voltage drop across resistor 36 resulting from a current passing therethrough. Resistor 36 is selected such that the bias current that passes between the positive terminal 18 and negative terminal 20 through resistor 36 causes a voltage drop of approximately 700 millivolts to occur across the resistor 36. Therefore, the bias voltage provided between the base of transistor 28 and the negative terminal 20 is approximately equal to 700 millivolts plus the 700 millivolt forward bias voltage drop across transistor 34, or 1.4 volts. The bias voltage applied to the base of transistor 28 is constant as long as the voltage between terminals 18 and 20 is constant.
This bias voltage applied to the base of current source transistor 28 forward biases the base-emitter junction so that current is conducted between the collector and the emitter of the current source transistor 28. In this manner, current source transistor 28 conducts or sinks current provided by each of the emitters of transistors 24 and 26.
Transistor 26 has a bias voltage applied between its base and the negative terminal 20 that is equal to the sum of the bias voltage applied to the base of the current source transistor 28 plus the forward bias voltage drop across diode 32. The forward bias voltage drop across diode 32 is approximately 700 millivolts. Therefore, the bias voltage applied to transistor 26 is approximately equal to 2.1 volts or the forward bias voltage drop of three PN junction diodes connected in series. The bias voltages applied to transistor 26 are relatively constant as long as the supply voltage applied between terminals 18 and 20 is constant. The bias voltage applied to transistor 26 sets the voltage threshold level at which transistor 26 transitions from a conducting state where current is conducted between the collector and the emitter and a non-conducting state where current is substantially prevented from passing between the collector and the emitter. Transistor 26 is in the conducting state when the voltage between the base and emitter is sufficiently large so that a PN junction between the base and emitter is forward biased. Conversely, transistor 26 is in the non-conducting state when the PN junction between the base and the emitter, respectively, is reverse biased.
Transistor 24 has a conducting state and a non-conducting state similar to transistor 26. Transistor 24 is in a conducting state if a PN junction between the base and emitter is forward biased and in a non-conducting state if the PN junction is reverse biased.
Transistors 24 and 26 together form a symmetrical current switch for providing current to the current source transistor 28. The base of transistor 24 is connected to the emitter of the switch control transistor 22. As the voltage at the emitter of the switch control transistor 22 varies between relatively high voltages and relatively low voltages, the operation of transistor 24 varies between conducting and non-conducting states. If the voltage provided by switch control transistor 22 to the base of transistor 24 is sufficiently large, then transistor 24 is in the conducting state. If the voltage applied to the base of transistor 24 by switch control transistor 22 is not large enough so that transistor 24 is in the conducting state, then only transistor 26 will be in the conducting state.
Because transistors 24 and 26 are connected in a common emitter configuration, voltages applied to the base of transistor 24 also affect the operation of transistor 26. If the voltage provided to the base of transistor 24 is sufficiently large, the voltage at the common emitter of transistors 24 and 26 rises so that transistor 26 is no longer forward biased and is therefore not in the conducting state.
The current conducted by both transistors 24 and 26 will have an inverse relationship that results from the common emitter configuration. Therefore, as the current conducted between the collector and emitter of transistor 24 increases, the current conducted between the collector and the emitter of transistor 26 decreases. Conversely, as the current conducted between the collector and the emitter of transistor 24 decreases, the current conducted between the collector and emitter of transistor 26 increases. The current that enters the collector of current source transistor 28 is equal to the sum of the currents provided by the emitter of transistors 24 and 26.
Transistor 24 and transistor 26 are each connected to separate collector circuits. The current provided by the emitter of transistor 24 is substantially the same as the current passing through a resistor 38 that is electrically connected between the positive terminal 18 and the collector of transistor 24 except for a small current entering the base of transistor 24. Similarly, the current provided by the emitter of transistor 26 is substantially the same as the current passing through resistor 40 that is electrically connected between the positive terminal 18 and the collector of transistor 26, except for a small current entering the base of transistor 26.
The voltage at the output terminals 14 and 16 are related to current entering the collector of transistors 24 and 26, respectively. The output terminals 14 and 16 each has an output voltage present that is equal to the voltage at the positive supply terminal 18 minus the voltage drop across the resistors 38 and 40, respectively, that are electrically connected between the positive supply 18 and the output terminals. Therefore, the voltage at output terminal 14 relative to terminal 20 is equal to the voltage at positive terminal 18 minus the product of the resistance of resistor 38, in ohms, and the current entering the collector of transistor 24. Similarly, the voltage at output terminal 16 is equal the voltage at the positive terminal 18 minus the product of the resistance of resistor 40, in ohms, and the current entering the collector of transistor 26. If transistors 24 and 26 are matched and resistors 38 and 40 are identical, then the voltage swing at output terminals 14 and 16 will be the same.
The switch control transistor 22 is biased through resistor 46 that is connected between an emitter and the positive terminal 18. The bias on switch control transistor 22 allows the voltage at the emitter to track the voltage at the base. The emitter of switch control transistor 22 is level-shifted from the voltage at the base by the forward bias voltage drop of the emitter-base junction. The switch control transistor 22 selects the source of current provided to current source transistor 28 based on the signal at input terminal 12. If the voltage between the input terminal 12 and the negative terminal 20 is in a logic low state, then the emitter-base are forward biased and switch control transistor 22 is in a conducting state. When in the conducting state, current passes from the positive terminal through resistor 46 causing a voltage drop across resistor 46 thereby reducing the voltage at the base of transistor 24. If the voltage at the base becomes sufficiently reduced, transistor 24 becomes non-conducting.
Alternatively, resistor 46 may be replaced by a PNP transistor having an emitter connected to the positive terminal 18, a collector connected to the emitter of transistor 22 and a base connected to a bias or current source. In this arrangement, the PNP transistor provides bias current to transistor 22 as well as base current to transistor 24 in a manner similar to resistor 46.
If the voltage between the input terminal 12 and the negative terminal 20 is in a logic high state, then the emitter-base are reverse biased and switch control transistor 22 is in a non-conducting state. When in the non-conducting state, very little current, if any, flows through resistor 46 thereby causing the voltage at the base of transistor 24 to be pulled up to or nearly equal to the positive terminal 18 voltage. When the voltage at the base of transistor 24 becomes sufficiently large, the transistor 24 will be in the conducting state. As will be discussed, a clamping transistor 48 prevents the voltage at the base from becoming too large thereby preventing the saturation of transistor 24.
A clamping transistor 48, having a base, an emitter and a collector, is provided to prevent the transistor 24 from saturating and thereby providing a non-symmetrical signal at output terminals 14 and 16. The clamping transistor 48 is connected so that the emitter is connected to the base of transistor 22 and the collector connected to the negative terminal 20. The clamping transistor prevents saturation of the transistor 24 by conducting current between the collector and emitter thereby limiting the voltage at the base of transistor 24. The clamping threshold or voltage at the base of transistor 24 for which the clamping transistor 48 conducts is set by the voltage at the base of clamping transistor 48. If the voltage at the emitter of transistor 48 is sufficiently large relative to the voltage drop across the series combination of diode 32, diode 34 and the voltage across resistor 36 due to the current flowing therethrough, then the emitter-base becomes forward biased and transistor 48 conducts limiting or clamping the positive voltage excursion at the base of transistor 24.
A degeneration resistor 42 is connected between the emitter of current source transistor 28 and the negative terminal 20. Emitter degeneration resistors are known and are used in common emitter amplifiers to provide feedback increasing voltage stability as well as increasing both the input impedance and output impedance. The emitter degeneration resistor 42 also increases the range of voltages supplied at input terminal 12 over which the voltage at output terminals 14 and 16 behaves in a linear fashion. Finally, the degeneration resistor 42 sets the transition time for the voltage swing at the output terminals 14 and 16 by setting the current passing through current source transistor 28.
Resistor 52 is a pull-down resistor for pulling the voltage at the base of switching transistor 22 low or toward the voltage of the negative terminal 20 if the input terminal 12 is in a floating state. An input resistor 44 is connected between input terminal 12 and the switch control transistor 22 for limiting large in-rush currents such as those caused by an electrostatic discharge. Epitaxial connections 60 and 62 are made between the positive terminal 18 and each of resistors 52 and 44.
Buffer 10 requires that the supply voltage be sufficiently large so that transistor 24 is in the conducting state when a logic high signal is provided to input terminal 12. To ensure transistor 24 conducts in this condition, the supply voltage must be greater than the bias voltage applied to the base of transistor 48, 2.1 volts, plus the forward bias voltage drop of the PN junction between the base and emitter of transistor 48, 0.7 volts. Therefore, the supply must be greater than 2.8 volts to ensure transistor 24 achieves the proper voltage swing and that clamping transistor 48 is in the conducting mode when transistor 24 is conducting maximum current. However, because the forward bias voltage drop for both the base emitter junctions of transistors 48 and 34 and the diode 32 have large temperature coefficients under worst case temperature conditions, the minimum supply voltage must be much greater than 2.8 volts. Under worst case temperature conditions, the voltage drop across the emitter base junctions for transistors 48 and 34 and across diode 32 is approximately 0.85 volts each. Therefore, under worst case temperature conditions, the minimum supply voltage is approximately 3.25 volts. Therefore, buffer 10 does not readily lend itself to low supply voltage operation because an adequate voltage swing at the base of transistor 24 cannot be achieved at low supply voltages.
There is a present need for input buffers for integrated circuits of one logic family to interface with logic elements of another family that are capable of operation with a low supply voltage. These input buffers should be reliable, able to allow the voltage at the input terminal to be grater than the supply voltage and provide fast transition times between states.

Logic translator interfacing between five-volt TTL/CMOS and three-volt CML


A postage meter resetting apparatus includes a stepper motor as a first motive arrangement for turning the resetting shaft of a mechanical postage meter, another stepper motor as a second motive mechanism to enable or disable resetting by the first stepper motor. A lead screw, lead nut and linkage, driven by the second stepper motor, when resetting is authorized, moves an axially movable part of a coupling between the second stepper motor and the meter's axially movable resetting shaft, to bring the resetting gear on the shaft into engagement with a gear of the meter's descending register. An input to the first stepper motor, representing a variable amount of postage, effects turning of the resetting shaft and the engaged gears by amounts corresponding to the desired variable amount of postage to be added to the meter's descending register. An encoder coupled to the shaft of the first stepper motor provides an output indication of the amount that the shaft has turned. A CPU routine assures that the gear on the meter's resetting shaft has cleared a blocking pin and engaged the descending register gear prior to resetting by the first stepper motor. Another CPU routine clears jams when it is detected that the shaft has not been turned the amount desired.

This invention relates to a remote resetting mechanical postage meter and more particularly to a mechanical postage meter with an electromechanical resetting unit that makes available additional postage from the meter when authorized to do so.
Postage meters have been proposed that avoid the necessity of being taken to the Post Office for resetting. Early proposals used mechanical combination locks having predetermined combinations that changed with each resetting. The combinations stored in the meter were known to a central authority with a "data center", but not to the user. If the data center approved the introduction of a fixed amount of additional postage, it advised the user of the next combination. The user would enter the next combination, and the meter would be reset by adding the fixed postage amount to the descending register total. In meters of this kind punched tapes were sometimes suggested as the means for storing the fixed series of combinations. For meters that use the punched tape storage of the sequence of combinations known only to the data center, telephone communication from the data center of a combination identical to the next of a stored, fixed series of combinations in the meter has been suggested, to enable resetting the meter with a fixed amount of postage. In at least one instance, it was suggested that the code transmitted by telephone be a series of pulses of different frequency to be compared with spaces and punched marks in a tape. Each correct comparison of a mark on a space would advance the tape a step, and after ten advanced steps, the corresponding movement would be applied to the meter's mechanical descending register.
The art has also described electronic meters, which is to say any meters with electronic registers, capable of being reset by the user's introduction of a one time only combination. For resetting these meters with a variable amount of postage, a central computer of an authorizing authority generates the combination based on either the amount of postage requested or the number of resets of the pertinent meter or both. The combination is then given to the user by telephone to enable resetting.

Mechanical postage meter resetting device and method


An electrical connector having an insulative housing, a plurality of first terminals and a plurality of second terminals. The first terminals are disposed in the insulative housing. Each of the first terminals has a first contact portion, a first solder portion, and a first connection portion between the first contact portion and the first solder portion. The plurality of second terminals are also disposed in the insulative housing. Each of the second terminals has a second contact portion, a second solder portion, and a second connection portion between the second contact portion and the second solder portion. The first solder portions of the first terminals and the second solder portions of the second terminals are arranged in two rows in a lateral direction, respectively. The row of the first solder portions is separated from the row of the second solder portions by a predetermined distance in a longitudinal direction.

Well known electrical connectors are used to provide a power connection and/or a signal connection between electronic equipment. Generally, space restrictions require such electrical connectors to have a plurality closely spaced terminals. Therefore, creating a tendency for crosstalk between adjacent terminals and disadvantageously affecting signals transmitted through the terminals.
USB (Universal Serial Bus) is a communication standard, which has been updated from a conventional USB2.0 standard to a current USB3.0 standard. Accordingly the transmission speed thereof has been increased from 480 Mbit/s to 5 Gbit/s. The USB3.0 standard has very rigorous requirements for the structural design and the electrical performance especially with respect to the electrical connector interface for transmitting super speed signals.
FIG. 9 shows a conventional USB3.0 connector having a first group of terminals 811, 812, 813 and a second group of terminals 920, 281, 923.
As shown in FIG. 9, all solder portions (solder feet) 818, 817, 927, 928, 929, 817, 818 of the first and second groups of terminals are arranged in the same row in a lateral direction. In this way, the solder portions (solder feet) 818, 817, 817, 818 of the first group of terminals 811, 812, 813 are aligned with the solder portions (solder feet) 927, 928, 929 of the second group of terminals 920, 281, 923 in a longitudinal direction, therefore, tending to cause crosstalk between the first group of terminals 811, 812, 813 and the second group of terminals 920, 281, 923.
Accordingly, it is desirable to provide an electrical connector which can more effectively reduce the crosstalk between terminals.


A self-energizing seal includes a housing and a plurality of annular seal ring segments movable relative to the housing. The annular seal ring segments include a circumferential slot and a plurality of holes defining a flow passage into the circumferential slot. A plurality of self-energizing ring segments are disposed in the circumferential slot. The annular seal ring segments and the self-energizing ring segments establish a seal with the exterior of a pipe and permit movement of the pipe in a direction orthogonal to the axis of the pipe.

An expansion joint is an apparatus that is situated between a device such as a boiler and a pipe and allows for expansion and contraction at the joint in order to account for movement of the pipe relative to the device. Expansion joints are used for example at power plants in order to couple boilers to steam pipes that are used to rotate generators. For example, power plants are configured to operate using steam having a temperature up to or exceeding approximately 1200 degrees Fahrenheit and pressure up to or exceeding 2000 PSI. Boiler systems may operate at this temperature, and at high pressure.
Seals are well known in the art for preventing leakage of fluid or contamination from one portion of an assembly to another. Seals can be provided by the use of adhesive sealants and mechanical devices such as gaskets, hermetic seals, labyrinth seals, wiper seals, or adhesive sealants. Depending on the type of seal used and the application, movement of components, high pressures, high temperatures and other environmental conditions may cause significant wear. In some applications, seals may be exposed to sufficiently high pressure or temperature, making use of traditional seals unsuitable. In some applications, a seal may be desired for use around a moving member, and these traditional seals may be too rigid to adequately seal the area while allowing movement of the components.
In the past, pipes, cylinders or rods which penetrate a pressure boundary may require a certain amount of movement relative to the pressure boundary. In these environmental conditions a seal may be used which is formed of a fabric sleeve which is vulnerable to failure in high temperature environments. Alternatively, a metal bellows seal may be utilized which has a limited fatigue life before cracking. Alternatively, a mechanical seal may be utilized which has undesirable tolerances between the seal and the pipe, cylinder, or rod, resulting in substantial leakage. Mechanical seals are subject to tolerance controlled leakage. Mechanical seals may utilize a packing-gasket like material which may experience wear and increase the dimensions for a gap between a pipe and sealing member. In the past, seals which attempt to simultaneously control leakage flow, corrosion, temperature, and gas leakage have experienced marginal reliability.


An electronic battery tester for testing a storage battery determines a condition of the battery. The condition is a relative condition and is a function of a dynamic parameter of the battery and an empirical input variable.

The present invention relates to measuring the condition of storage batteries. More specifically, the present invention relates to electronic battery testers which measure a dynamic parameter of batteries.                Electronic battery testers are used to test storage batteries. Various examples of such testers are described in U.S. Pat. No. 3,873,911, issued Mar. 25, 1975, to Champlin, entitled ELECTRONIC BATTERY TESTING DEVICE; U.S. Pat. No. 3,909,708, issued Sep. 30, 1975, to Champlin, entitled ELECTRONIC BATTERY TESTING DEVICE; U.S. Pat. No. 4,816,768, issued Mar. 28, 1989, to Champlin, entitled ELECTRONIC BATTERY TESTING DEVICE; U.S. Pat. No. 4,825,170, issued Apr. 25, 1989, to Champlin, entitled ELECTRONIC BATTERY TESTING DEVICE WITH AUTOMATIC VOLTAGE SCALING; U.S. Pat. No. 4,881,038, issued Nov. 14, 1989, to Champlin, entitled ELECTRONIC BATTERY TESTING DEVICE WITH AUTOMATIC VOLTAGE SCALING TO DETERMINE DYNAMIC CONDUCTANCE; U.S. Pat. No. 4,912,416, issued Mar. 27, 1990, to Champlin, entitled ELECTRONIC BATTERY TESTING DEVICE WITH STATE-OF-CHARGE COMPENSATION; U.S. Pat. No. 5,140,269, issued Aug. 18, 1992, to Champlin, entitled ELECTRONIC TESTER FOR ASSESSING BATTERY/CELL CAPACITY; U.S. Pat. No. 5,343,380, issued Aug. 30, 1994, entitled METHOD AND APPARATUS FOR SUPPRESSING TIME-VARYING SIGNALS IN BATTERIES UNDERGOING CHARGING OR DISCHARGING; U.S. Pat. No. 5,572,136, issued Nov. 5, 1996, entitled ELECTRONIC BATTERY TESTER DEVICE; U.S. Pat. No. 5,574,355, issued Nov. 12, 1996, entitled METHOD AND APPARATUS FOR DETECTION AND CONTROL OF THERMAL RUNAWAY IN A BATTERY UNDER CHARGE; U.S. Pat. No. 5,585,416, issued Dec. 10, 1996, entitled APPARATUS AND METHOD FOR STEP-CHARGING BATTERIES TO OPTIMIZE CHARGE ACCEPTANCE; U.S. Pat. No. 5,585,728, issued Dec. 17, 1996, entitled ELECTRONIC BATTERY TESTER WITH AUTOMATIC COMPENSATION FOR LOW STATE-OF-CHARGE; U.S. Pat. No. 5,589,757, issued Dec. 31, 1996, entitled APPARATUS AND METHOD FOR STEP-CHARGING BATTERIES TO OPTIMIZE CHARGE ACCEPTANCE; U.S. Pat. No. 5,592,093, issued Jan. 7, 1997, entitled ELECTRONIC BATTERY TESTING DEVICE LOOSE TERMINAL CONNECTION DETECTION VIA A COMPARISON CIRCUIT; U.S. Pat. No. 5,598,098, issued Jan. 28, 1997, entitled ELECTRONIC BATTERY TESTER WITH VERY HIGH NOISE IMMUNITY; U.S. Pat. No. 5,656,920, issued Aug. 12, 1997, entitled METHOD FOR OPTIMIZING THE CHARGING LEAD-ACID BATTERIES AND AN INTERACTIVE CHARGER; U.S. Pat. No. 5,757,192, issued May 26, 1998, entitled METHOD AND APPARATUS FOR DETECTING A BAD CELL IN A STORAGE BATTERY; U.S. Pat. No. 5,821,756, issued Oct. 13, 1998, entitled ELECTRONIC BATTERY TESTER WITH TAILORED COMPENSATION FOR LOW STATE-OF CHARGE; U.S. Pat. No. 5,831,435, issued Nov. 3, 1998, entitled BATTERY TESTER FOR JIS STANDARD; U.S. Pat. No. 5,871,858, issued Feb. 16, 1999, entitled ANTI-THEFT BATTERY; U.S. Pat. No. 5,914,605, issued Jun. 22, 1999, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 5,945,829, issued Aug. 31, 1999, entitled MIDPOINT BATTERY MONITORING; U.S. Pat. No. 6,002,238, issued Dec. 14, 1999, entitled METHOD AND APPARATUS FOR MEASURING COMPLEX IMPEDANCE OF CELLS AND BATTERIES; U.S. Pat. No. 6,037,751, issued Mar. 14, 2000, entitled APPARATUS FOR CHARGING BATTERIES; U.S. Pat. No. 6,037,777, issued Mar. 14, 2000, entitled METHOD AND APPARATUS FOR DETERMINING BATTERY PROPERTIES FROM COMPLEX IMPEDANCE/ADMITTANCE; U.S. Pat. No. 6,051,976, issued Apr. 18, 2000, entitled METHOD AND APPARATUS FOR AUDITING A BATTERY TEST; U.S. Pat. No. 6,081,098, issued Jun. 27, 2000, entitled METHOD AND APPARATUS FOR CHARGING A BATTERY; U.S. Pat. No. 6,091,245, issued Jul. 18, 2000, entitled METHOD AND APPARATUS FOR AUDITING A BATTERY TEST; U.S. Pat. No. 6,104,167, issued Aug. 15, 2000, entitled METHOD AND APPARATUS FOR CHARGING A BATTERY; U.S. Pat. No. 6,137,269, issued Oct. 24, 2000, entitled METHOD AND APPARATUS FOR ELECTRONICALLY EVALUATING THE INTERNAL TEMPERATURE OF AN ELECTROCHEMICAL CELL OR BATTERY; U.S. Pat. No. 6,163,156, issued Dec. 19, 2000, entitled ELECTRICAL CONNECTION FOR ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,172,483, issued Jan. 9, 2001, entitled METHOD AND APPARATUS FOR MEASURING COMPLEX IMPEDANCE OF CELLS AND BATTERIES; U.S. Pat. No. 6,172,505, issued Jan. 9, 2001, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,222,369, issued Apr. 24, 2001, entitled METHOD AND APPARATUS FOR DETERMINING BATTERY PROPERTIES FROM COMPLEX IMPEDANCE/ADMITTANCE; U.S. Pat. No. 6,225,808, issued May 1, 2001, entitled TEST COUNTER FOR ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,249,124, issued Jun. 19, 2001, entitled ELECTRONIC BATTERY TESTER WITH INTERNAL BATTERY; U.S. Pat. No. 6,259,254, issued Jul. 10, 2001, entitled APPARATUS AND METHOD FOR CARRYING OUT DIAGNOSTIC TESTS ON BATTERIES AND FOR RAPIDLY CHARGING BATTERIES; U.S. Pat. No. 6,262,563, issued Jul. 17, 2001, entitled METHOD AND APPARATUS FOR MEASURING COMPLEX ADMITTANCE OF CELLS AND BATTERIES; U.S. Pat. No. 6,294,896, issued Sep. 25, 2001; entitled METHOD AND APPARATUS FOR MEASURING COMPLEX SELF-IMMITANCE OF A GENERAL ELECTRICAL ELEMENT; U.S. Pat. No. 6,294,897, issued Sep. 25, 2001, entitled METHOD AND APPARATUS FOR ELECTRONICALLY EVALUATING THE INTERNAL TEMPERATURE OF AN ELECTROCHEMICAL CELL OR BATTERY; U.S. Pat. No. 6,304,087, issued Oct. 16, 2001, entitled APPARATUS FOR CALIBRATING ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,310,481, issued Oct. 30, 2001, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,313,607, issued Nov. 6, 2001, entitled METHOD AND APPARATUS FOR EVALUATING STORED CHARGE IN AN ELECTROCHEMICAL CELL OR BATTERY; U.S. Pat. No. 6,313,608, issued Nov. 6, 2001, entitled METHOD AND APPARATUS FOR CHARGING A BATTERY; U.S. Pat. No. 6,316,914, issued Nov. 13, 2001, entitled TESTING PARALLEL STRINGS OF STORAGE BATTERIES; U.S. Pat. No. 6,323,650, issued Nov. 27, 2001, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,329,793, issued Dec. 11, 2001, entitled METHOD AND APPARATUS FOR CHARGING A BATTERY; U.S. Pat. No. 6,331,762, issued Dec. 18, 2001, entitled ENERGY MANAGEMENT SYSTEM FOR AUTOMOTIVE VEHICLE; U.S. Pat. No. 6,332,113, issued Dec. 18, 2001, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,351,102, issued Feb. 26, 2002, entitled AUTOMOTIVE BATTERY CHARGING SYSTEM TESTER; U.S. Pat. No. 6,359,441, issued Mar. 19, 2002, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,363,303, issued Mar. 26, 2002, entitled ALTERNATOR DIAGNOSTIC SYSTEM; U.S. Pat. No. 6,377,031, issued Apr. 23, 2002, entitled INTELLIGENT SWITCH FOR POWER MANAGEMENT; U.S. Pat. No. 6,392,414, issued May 21, 2002, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,417,669, issued Jul. 9, 2002, entitled SUPPRESSING INTERFERENCE IN AC MEASUREMENTS OF CELLS, BATTERIES AND OTHER ELECTRICAL ELEMENTS; U.S. Pat. No. 6,424,158, issued Jul. 23, 2002, entitled APPARATUS AND METHOD FOR CARRYING OUT DIAGNOSTIC TESTS ON BATTERIES AND FOR RAPIDLY CHARGING BATTERIES; U.S. Pat. No. 6,441,585, issued Aug. 17, 2002, entitled APPARATUS AND METHOD FOR TESTING RECHARGEABLE ENERGY STORAGE BATTERIES; U.S. Pat. No. 6,437,957, issued Aug. 20, 2002, entitled SYSTEM AND METHOD FOR PROVIDING SURGE, SHORT, AND REVERSE POLARITY CONNECTION PROTECTION; U.S. Pat. No. 6,445,158, issued Sep. 3, 2002, entitled VEHICLE ELECTRICAL SYSTEM TESTER WITH ENCODED OUTPUT; U.S. Pat. No. 6,456,045, issued Sep. 24, 2002, entitled INTEGRATED CONDUCTANCE AND LOAD TEST BASED ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,466,025, issued Oct. 15, 2002, entitled ALTERNATOR TESTER; U.S. Pat. No. 6,465,908, issued Oct. 15, 2002, entitled INTELLIGENT POWER MANAGEMENT SYSTEM; U.S. Pat. No. 6,466,026, issued Oct. 15, 2002, entitled PROGRAMMABLE CURRENT EXCITER FOR MEASURING AC IMMITTANCE OF CELLS AND BATTERIES; U.S. Pat. No. 6,469,511, issued Nov. 22, 2002, entitled BATTERY CLAMP WITH EMBEDDED ENVIRONMENT SENSOR; U.S. Pat. No. 6,497,209, issued Dec. 24, 2002, entitled SYSTEM AND METHOD FOR PROTECTING A CRANKING SUBSYSTEM; U.S. Pat. No. 6,507,196, issued Jan. 14, 2003; entitled BATTERY HAVING DISCHARGE STATE INDICATION; U.S. Pat. No. 6,534,993, issued Mar. 18, 2003, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,544,078, issued Apr. 8, 2003, entitled BATTERY CLAMP WITH INTEGRATED CURRENT SENSOR; U.S. Pat. No. 6,556,019, issued Apr. 29, 2003, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,566,883, issued May 20, 2003, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,586,941, issued Jul. 1, 2003, entitled BATTERY TESTER WITH DATABUS; U.S. Pat. No. 6,597,150, issued Jul. 22, 2003, entitled METHOD OF DISTRIBUTING JUMP-START BOOSTER PACKS; U.S. Pat. No. 6,621,272, issued Sep. 16, 2003, entitled PROGRAMMABLE CURRENT EXCITER FOR MEASURING AC IMMITTANCE OF CELLS AND BATTERIES; U.S. Pat. No. 6,623,314, issued Sep. 23, 2003, entitled KELVIN CLAMP FOR ELECTRICALLY COUPLING TO A BATTERY CONTACT; U.S. Pat. No. 6,633,165, issued Oct. 14, 2003, entitled IN-VEHICLE BATTERY MONITOR; U.S. Pat. No. 6,635,974, issued Oct. 21, 2003, entitled SELF-LEARNING POWER MANAGEMENT SYSTEM AND METHOD; U.S. Pat. No. 6,707,303, issued Mar. 16, 2004, entitled ELECTRONIC BATTERY TESTER; U.S. Pat. No. 6,737,831, issued May 18, 2004, entitled METHOD AND APPARATUS USING A CIRCUIT MODEL TO EVALUATE CELL/BATTERY PARAMETERS; U.S. Ser. No. 09/780,146, filed Feb. 9, 2001, entitled STORAGE BATTERY WITH INTEGRAL BATTERY TESTER; U.S. Ser. No. 09/756,638, filed Jan. 8, 2001, entitled METHOD AND APPARATUS FOR DETERMINING BATTERY PROPERTIES FROM COMPLEX IMPEDANCE/ADMITTANCE; U.S. Ser. No. 09/862,783, filed May 21, 2001, entitled METHOD AND APPARATUS FOR TESTING CELLS AND BATTERIES EMBEDDED IN SERIES/PARALLEL SYSTEMS; U.S. Ser. No. 09/880,473, filed Jun. 13, 2001; entitled BATTERY TEST MODULE; U.S. Pat. No. 6,495,990, issued Dec. 17, 2002, entitled METHOD AND APPARATUS FOR EVALUATING STORED CHARGE IN AN ELECTROCHEMICAL CELL OR BATTERY; U.S. Ser. No. 60/348,479, filed Oct. 29, 2001, entitled CONCEPT FOR TESTING HIGH POWER VRLA BATTERIES; U.S. Ser. No. 10/046,659, filed Oct. 29, 2001, entitled ENERGY MANAGEMENT SYSTEM FOR AUTOMOTIVE VEHICLE; U.S. Ser. No. 09/993,468, filed Nov. 14, 2001, entitled KELVIN CONNECTOR FOR A BATTERY POST; U.S. Ser. No. 10/042,451, filed Jan. 8, 2002, entitled BATTERY CHARGE CONTROL DEVICE; U.S. Ser. No. 10/093,853, filed Mar. 7, 2002, entitled ELECTRONIC BATTERY TESTER WITH NETWORK COMMUNICATION; U.S. Ser. No. 10/098,741, filed Mar. 14, 2002, entitled METHOD AND APPARATUS FOR AUDITING A BATTERY TEST; U.S. Ser. No. 10/112,114, filed Mar. 28, 2002, entitled BOOSTER PACK WITH STORAGE CAPACITOR; U.S. Ser. No. 10/109,734, filed Mar. 28, 2002, entitled APPARATUS AND METHOD FOR COUNTERACTING SELF DISCHARGE IN A STORAGE BATTERY; U.S. Ser. No. 10/112,105, filed Mar. 28, 2002, entitled CHARGE CONTROL SYSTEM FOR A VEHICLE BATTERY; U.S. Ser. No. 10/112,998, filed Mar. 29, 2002, entitled BATTERY TESTER WITH BATTERY REPLACEMENT OUTPUT; U.S. Ser. No. 10/119,297, filed Apr. 9, 2002, entitled METHOD AND APPARATUS FOR TESTING CELLS AND BATTERIES EMBEDDED IN SERIES/PARALLEL SYSTEMS; U.S. Ser. No. 60/387,046, filed Jun. 7, 2002, entitled METHOD AND APPARATUS FOR INCREASING THE LIFE OF A STORAGE BATTERY; U.S. Ser. No. 10/177,635, filed Jun. 21, 2002, entitled BATTERY CHARGER WITH BOOSTER PACK; U.S. Ser. No. 10/200,041, filed Jul. 19, 2002, entitled AUTOMOTIVE VEHICLE ELECTRICAL SYSTEM DIAGNOSTIC DEVICE; U.S. Ser. No. 10/217,913, filed Aug. 13, 2002, entitled, BATTERY TEST MODULE; U.S. Ser. No. 10/246,439, filed Sep. 18, 2002, entitled BATTERY TESTER UPGRADE USING SOFTWARE KEY; U.S. Ser. No. 10/263,473, filed Oct. 2, 2002, entitled ELECTRONIC BATTERY TESTER WITH RELATIVE TEST OUTPUT; U.S. Ser. No. 10/271,342, filed Oct. 15, 2002, entitled IN-VEHICLE BATTERY MONITOR; U.S. Ser. No. 10/310,515, filed Dec. 5, 2002, entitled BATTERY TEST MODULE; U.S. Ser. No. 10/310,490, filed Dec. 5, 2002, entitled ELECTRONIC BATTERY TESTER; U.S. Ser. No. 10/310,385, filed Dec. 5, 2002, entitled BATTERY TEST MODULE; U.S. Ser. No. 60/437,224, filed Dec. 31, 2002, entitled DISCHARGE VOLTAGE PREDICTIONS; U.S. Ser. No. 10/349,053, filed Jan. 22, 2003, entitled APPARATUS AND METHOD FOR PROTECTING A BATTERY FROM OVERDISCHARGE; U.S. Ser. No. 10/388,855, filed Mar. 14, 2003, entitled ELECTRONIC BATTERY TESTER WITH BATTERY FAILURE TEMPERATURE DETERMINATION; U.S. Ser. No. 10/396,550, filed Mar. 25, 2003, entitled ELECTRONIC BATTERY TESTER; U.S. Ser. No. 60/467,872, filed May 5, 2003, entitled METHOD FOR DETERMINING BATTERY STATE OF CHARGE; U.S. Ser. No. 60/477,082, filed Jun. 9, 2003, entitled ALTERNATOR TESTER; U.S. Ser. No. 10/460,749, filed Jun. 12, 2003, entitled MODULAR BATTERY TESTER FOR SCAN TOOL; U.S. Ser. No. 10/462,323, filed Jun. 16, 2003, entitled ELECTRONIC BATTERY TESTER HAVING A USER INTERFACE TO CONFIGURE A PRINTER; U.S. Ser. No. 10/601,608, filed Jun. 23, 2003, entitled CABLE FOR ELECTRONIC BATTERY TESTER; U.S. Ser. No. 10/601,432, filed Jun. 23, 2003, entitled BATTERY TESTER CABLE WITH MEMORY; U.S. Ser. No. 60/490,153, filed Jul. 25, 2003, entitled SHUNT CONNECTION TO A PCB FOR AN ENERGY MANAGEMENT SYSTEM EMPLOYED IN AN AUTOMOTIVE VEHICLE; U.S. Ser. No. 10/653,342, filed Sep. 2, 2003, entitled ELECTRONIC BATTERY TESTER CONFIGURED TO PREDICT A LOAD TEST RESULT; U.S. Ser. No. 10/654,098, filed Sep. 3, 2003, entitled BATTERY TEST OUTPUTS ADJUSTED BASED UPON BATTERY TEMPERATURE AND THE STATE OF DISCHARGE OF THE BATTERY; U.S. Ser. No. 10/656,526, filed Sep. 5, 2003, entitled METHOD AND APPARATUS FOR MEASURING A PARAMETER OF A VEHICLE ELECTRICAL SYSTEM; U.S. Ser. No. 10/656,538, filed Sep. 5, 2003, entitled ALTERNATOR TESTER WITH ENCODED OUTPUT; U.S. Ser. No. 10/675,933, filed Sep. 30, 2003, entitled QUERY BASED ELECTRONIC BATTERY TESTER; U.S. Ser. No. 10/678,629, filed Oct. 3, 2003, entitled ELECTRONIC BATTERY TESTER/CHARGER WITH INTEGRATED BATTERY CELL TEMPERATURE MEASUREMENT DEVICE; U.S. Ser. No. 10/441,271, filed May 19, 2003, entitled ELECTRONIC BATTERY TESTER; U.S. Ser. No. 09/653,963, filed Sep. 1, 2000, entitled SYSTEM AND METHOD FOR CONTROLLING POWER GENERATION AND STORAGE; U.S. Ser. No. 09/654,217, filed Sep. 1, 2000, entitled SYSTEM AND METHOD FOR PROVIDING STEP-DOWN POWER CONVERSION USING INTELLIGENT SWITCH; U.S. Ser. No. 10/174,110, filed Jun. 18, 2002, entitled DAYTIME RUNNING LIGHT CONTROL USING AN INTELLIGENT POWER MANAGEMENT SYSTEM; U.S. Ser. No. 60/488,775, filed Jul. 21, 2003, entitled ULTRASONICALLY ASSISTED CHARGING; U.S. Ser. No. 10/258,441, filed Apr. 9, 2003, entitled CURRENT MEASURING CIRCUIT SUITED FOR BATTERIES; U.S. Ser. No. 10/705,020, filed Nov. 11, 2003, entitled APPARATUS AND METHOD FOR SIMULATING A BATTERY TESTER WITH A FIXED RESISTANCE LOAD; U.S. Ser. No. 10/280,186, filed Oct. 25, 2002, entitled BATTERY TESTER CONFIGURED TO RECEIVE A REMOVABLE DIGITAL MODULE; and U.S. Ser. No. 10/681,666, filed Oct. 8, 2003, entitled ELECTRONIC BATTERY TESTER WITH PROBE LIGHT; U.S. Ser. No. 10/748,792, filed Dec. 30, 2003, entitled APPARATUS AND METHOD FOR PREDICTING THE REMAINING DISCHARGE TIME OF A BATTERY; U.S. Ser. No. 10/767,945, filed Jan. 29, 2004, entitled ELECTRONIC BATTERY TESTER; U.S. Ser. No. 10/783,682, filed Feb. 20, 2004, entitled REPLACEABLE CLAMP FOR ELECTRONIC BATTERY TESTER; U.S. Ser. No. 60/548,513, filed Feb. 27, 2004, entitled WIRELESS BATTERY MONITOR; U.S. Ser. No. 10/791,141, filed Mar. 2, 2004, entitled METHOD AND APPARATUS FOR AUDITING A BATTERY TEST; U.S. Ser. No. 60/557,366, filed Mar. 29, 2004, entitled BATTERY MONITORING SYSTEM WITHOUT CURRENT MEASUREMENT; U.S. Ser. No. 10/823,140, filed Apr. 13, 2004, entitled THEFT PREVENTION DEVICE FOR AUTOMOTIVE VEHICLE SERVICE CENTERS; which are incorporated herein in their entirety.
It is known that the condition of a battery can be provided by comparing a rating of the battery with a measured value. However, other techniques for providing a relative battery test could provide additional information regarding battery condition.

This patent is subject to a terminal disclaimer.

Electronic battery tester with relative test output


A method of informing a first network user of activity by other network users includes receiving information identifying television programming viewed by at least one other network user and displaying the information to the first network user on a user interface.

This invention relates to selecting a television channel.
The computer system illustrated in FIG. 1 represents a typical hardware setup for executing software that allows a user to perform tasks such as communicating with other computer users, accessing various computer resources, and viewing, creating, or otherwise manipulating electronic contentxe2x80x94that is, any combination of text, images, movies, music or other sounds, animations, 3D virtual worlds, and links to other objects. The system includes various input/output (I/O) devices (mouse 103, keyboard 105, display 107) and a general purpose computer 100 having a central processor unit (CPU) 121, an I/O unit 117 and a memory 109 that stores data and various programs such as an operating system 111, and one or more application programs 113.
As shown in FIG. 2, a user of a computer system can access electronic content or other resources either stored locally at the user""s own client system 202 (e.g., a personal or laptop computer) or remotely at one or more server systems 200. An example of a server system is a host computer that provides subscribers with online computer services such as e-mail and Internet access. Users of a host computer""s online services typically communicate with one or more central server systems 200 through client software executing on their respective client systems 202.
In practice, a server system 200 typically will not be a single monolithic entity but rather will be a network of interconnected server computers, possibly physically dispersed from each other, each dedicated to its own set of duties and/or to a particular geographical region. In such a case, the individual servers are interconnected by a network of communication links, in known fashion. One such server system is xe2x80x9cAmerica Online 4.0xe2x80x9d from America Online, Incorporated of Virginia.
FIG. 3 is a screen shot of a xe2x80x9cbrowserxe2x80x9d application 300 (Internet Explorer) displaying a typical HTML document, or web page 302. A xe2x80x9cbrowserxe2x80x9d is an example of client software that enables users to access and view electronic content stored either locally or remotely, such as in a network environment (local area network (LAN), intranet, Internet). A browser typically is used for displaying documents described in Hyper-Text Markup Language (HTML) and stored on servers connected to a network such as the Internet.
A user instructs a browser to access an HTML document, or web page, by specifying a network addressxe2x80x94or Uniform Resource Locator (URL)xe2x80x94at which a desired document resides. In response, the browser contacts the corresponding server hosting the requested web page, retrieves the one or more files that make up the web page, and then displays the web page in a window on the user""s computer screen.
As shown in FIG. 3, a single web page may be composed of several different files potentially of different data types 304 (e.g., text, images, virtual worlds, sounds, movies, etc.). In addition, a web page can includes links 306, or pointers, to other resources (e.g., web pages or individual files) available on the network. Each link has an associated URL pointing to a location on the network. When a user clicks on, or otherwise selects a displayed link, the browser automatically will retrieve the web page corresponding to the link""s associated URL and display it to the user.
As shown in FIG. 4, some server systems offer chat rooms that display user messages in real time. Client chat room software (e.g., America Online 4.0 and Internet Relay Chat) depicts a text window 402 that displays each message submitted by users visiting the chat room. The client software also provides controls for entering a message and submitting the entered messages to the server system. The server system broadcasts each submitted message to the other chat room users for display on their respective text windows 402. Typically, chat rooms are named for discussion topics to help users to find chat rooms of interest.
FIG. 4 also shows a list of users 404 known as a xe2x80x9cbuddy listxe2x80x9d. A user creates a buddy list by entering the names of other server system users (e.g., friends, family, or co-workers). The server can notify the user when the users in the buddy list log-on to the server system. The server can also provide other information such as which chat room the user is currently visiting.
Recently, a special purpose computer referred to as a xe2x80x9cset-top boxxe2x80x9d has been developed and used in connection with standard television (TV) sets for viewing web pages on the Internet. The term set-top box derives from the usual placement of the device on top of a television. The term, however, should not be construed literally. That is, a set-top box may neither be a box nor be placed on top of a display. A set-top box essentially has the same basic components as the general purpose computer illustrated in FIG. 1, except that it also includes a TV tuner for receiving broadcast and/or cable TV signals. Users of such xe2x80x9cweb TVxe2x80x9d systems can make dual usage of their TV setsxe2x80x94that is, either to watch TV or to view web pages and otherwise xe2x80x9csurfxe2x80x9d the Internet.
Various implementations of the invention may include one or more of the following features.
In general, in one aspect, the invention features a method of informing a first network user of activity by other network users. The method includes receiving information identifying television programming viewed by at least one other network user and displaying the information to the first network user on a user interface.
Embodiments may include one or more of the following. The information may be received via the Internet, for example, by a set-top box having an Internet connection. The user interface may also display television programming (e.g., a TV show). The method may further include transmitting a message requesting the information from a server. Displaying the information may include displaying a link that automatically tunes the set-top box to television programming identified by the link. The method may also include maintaining a list (e.g., a buddy list) of network users associated with the first user.
In general, in another aspect, the invention features a method of informing a first network user of activity by other network users. The method includes maintaining a list of network users associated with the first user, receiving information from one or more of the other users that corresponds to the television programming viewed by the other network user(s), and transmitting information describing the television programming viewed by the other network user(s) to the first network user.
Embodiments may include one or more of the following features. The information may be received by an Internet service provider. The list may be received from a client.
In general, in one aspect, the invention features a computer program, disposed on a computer readable medium, for informing a first network user of activity by other network users. The computer program includes instructions for causing a processor to receive information identifying television programming viewed by at least one other network user, and display the information on a user interface.
In general, in one aspect, the invention features a computer program, disposed on a computer readable medium, for informing a first network user of activity by other network users. The program includes instructions for causing a processor to maintain a list of network users associated with the first user, receive information from one or more of the other users that corresponds to the television programming viewed by the other network user(s), and transmit information describing the television programming viewed by the other network user(s) to the first network user.
The details of one or more embodiments are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.

Informing network users of television programming viewed by other network users


A resist material comprising (a) a polymer having a monomer unit having a special functional group, a monomer unit having a phenolic hydroxyl group, and if necessary a third monomer unit, (b) a photoacid generator, and (c) a solvent can provide a resist film excellent in heat resistance and adhesiveness to a substrate when exposed to light with 300 nm or less such as deep UV light, KrF excimer laser light, etc., and is suitable for forming ultrafine patterns.

This invention relates to a resist material usable in the production of semiconductor elements. More particularly the present invention relates to a resist material used in the formation of a positive tone pattern using deep ultraviolet (UV) light of 300 nm or less such as KrF excimer laser light, etc.
With recent higher density and larger scale integration of semiconductor devices, wavelengths used in exposing devices for minute processing, particularly for lithography become shorter and shorter. Now, KrF excimer laser light (248.4 nm) is studied. But, there have been no photosensitive materials suitable for use as such a wavelength.
For example, there are proposed dissolution inhibiting type resist materials comprising a resin having high transmittance for light of near 248.4 nm and a photosensitive compound having a group of the formula: ##STR1## as a resist material for a light source such as KrF excimer laser light and deep UV light (e.g. Japanese Patent Unexamined Publication Nos. 1-80944, 1-154048, 1-155338, 1-155339, and 1-18852; Y. Tani et al: SPIE's 1989 Sympo., 1086-03, etc.). But, these dissolution inhibiting type resist materials are low in sensitivity, and thus cannot be used for deep UV light and KrF excimer laser light which require highly sensitive resist materials.
On the other hand, in order to reduce the exposure energy amount (so as to increase the sensitivity), chemical amplified resist materials we recently have proposed wherein an acid generated by exposure to light is used as a catalyst [H. Ito et al: Poly. Eng. Sci. vol. 23, page 1012 (1983)]. Various chemical amplified resist materials are reported, for example, in U.S. Pat. Nos. 4,491,628 and 4,603,101, Japanese Patent Unexamined Publication No. 62-115440, W. R. Brunsvold et al: SPIE's 1989 Sympo., 1086-40, T. Neenan et al: SPIE's 1989 Sympo., 1086-01, etc. But these chemical amplified resist materials have the following disadvantages. When phenol ether type resins such as poly(4-tert-butoxycarbonyloxystyrene), poly(4-tert-butoxycarbonyloxy-.alpha.-methylstyrene), poly(4-tert-butoxystyrene), poly(4-tert-butoxy-.alpha.-methylstyrene) are used, heat resistance is poor, and resist films are easily peeled off at the time of development due to poor adhesion to substrates, resulting in a failure to obtain pattern shapes. Further, when carboxylic acid ester type resins such as poly(tert-butyl-4-vinylbenzoate), etc. are used, the transmittance for light of near 248.4 nm is poor due to the aromatic rings of the resin. When poly(tert-butylmethacryalte) and the like is used as the resin, heat resistance and resistance to dry etching are poor. As mentioned above, the chemical amplified resist materials have higher sensitivity than known resist materials, but are poor in heat resistance of resin, poor in adhesiveness to substrates, and insufficient in transmittance for light of near 248.4 nm, resulting in making practical use difficult. Thus, practically usable highly sensitive resist materials overcoming these problems mentioned above are desired.

Chemical amplified resist material containing photosensitive compound capable of generating an acid and specific polystyrene copolymer having functional groups that become alkali-soluble under an acid atmosphere


A method and apparatus allows users to quickly effect a modal change in an appliance having first and second modes. The apparatus captures a user actuation indicative of a modal change. The user actuation may be a mouse button closure, a keyboard button closure, or a remote control button closure. Upon detecting the user actuation indicative of a modal change, the apparatus detects the current mode for the appliance. Based on the current mode of the appliance, the apparatus cycles to the next mode in a round-robin basis and sets the next mode to become the current mode for the appliance. Further, in setting the next mode, the apparatus displays the next mode of the appliance as a mode change item in a menu list. The apparatus also then requests a second user actuation confirming a modal change. Further, in the event that the user confirms the modal change, the apparatus sets the next mode of the appliance to be the current mode for the appliance and maximizes the window associated with the mode of the appliance.

1. Field of the Invention
The present invention relates to modalities in a computer appliance, and more specifically, to an apparatus and a method for changing modalities of a home theater computer appliance.
2. Description of the Related Art
Remarkable improvements in computer hardware price/performance ratios during the last decade have caused major shifts in both home and office computing environments. Spiraling advances in semiconductor technology have enabled the appearance of personal computers with the computing power equivalent to supercomputers available a decade ago. Further, the advent of high performance audio and graphics sub-system has turned the personal computer into a multimedia device capable of saturating the user's audio-visual senses.
Along with the growth of computer usage, a new publishing medium called a World-Wide Web has gained rapid acceptance world wide. The World-Wide Web (WWW) is a system of documents and multimedia files that can be retrieved and viewed by any person who has access to the Internet. Originally developed as a network to facilitate communications among military and scientific research users, the Internet has since been expanded beyond its original defense orientation and is now being used world wide for a variety of commercial purposes.
The Internet proved to be a remarkable way for people to communicate and share information. However, in its native form, the interface of the Internet is so nonintuitive that only computer specialists could navigate the Internet. To overcome this problem, the World-Wide Web (WWW) is distributed across thousands of host computers attached into the system's communications network. The World-Wide Web is simply a series of communications of protocols representative of information in documents that could be linked to other documents and stored on computers throughout the Internet. Users of the Internet can access documents or pages via a program called a browser. Although early browsers were text-only, today's browsers offer windows-based icons, pull-down menus, bit-map graphics and colorful links to display hyper-text documents. Furthermore, the Web standard presents a system independent graphical user interface for users.
Due to its ability to tie together many disparate sources and its unified, easy to access user interface, the World-Wide Web is rapidly gaining acceptance as an information delivery media. The accessibility of audio and image files such as video over the World-Wide Web is also enabling the Internet to become a central repository suitable for entertainment as well. Hence, the collision between the Internet, the computer industry and the communications industry has resulted in the development of new appliances which satisfy computing, information gathering and entertainment needs of users. Thus, the graphical Web browser supports an information revolution and a cultural phenomenon.
In a related trend, the television (TV) industry has also been positively affected by advances in semiconductor technology. As TV sets are migrating from the older analog technology to digital technology, new features have been added that previously would have been impractical or cost prohibitive to implement. As digital TVs become mainstream, TV viewing is beginning to shift from a passive to an active experience. Applications such as home shopping, home banking, video-on-demand, and remote education have added to the utility of the ubiquitous TV sets. With digital set-top boxes and digital TVs, the difference between a computer and a TV starts to diminish.
The popularity of the Internet, coupled with the advent of digital TV sets, has accelerated the convergence of the computer and the TV industries. The TV-PC convergence is leading to products that share attributes of both the computer and the television unit so that Internet access, word processing, gaming, and TV watching are integrated into one unit. Although the convergence of the computer industry and the communications industry offers consolidated services which significantly improve the productivity and convenience for many users, to date, Internet capable devices have offered inconsistent and complex interfaces in communicating with users.
The problem arises as each device now has to provide multiple personalities or functionalities which had previously been provided in separate devices. The inconsistency of the user interface in these appliances often leaves the user with a less than satisfying experience, for these users are typically not technically oriented and demand dynamic products and services that adapt to their lifestyles rather than forcing them to adapt their lives to fit the needs of the device. As users want consistency and flexibility in the use of mobile devices, what the users require are devices that provide a consistent "look and feel" experience independent of the underlying application mode that the device is currently running. Thus, a need exists for a consistent, yet intuitive interface supporting a plurality of modalities to allow users the ability to easily switch amongst the different modes of the appliance and yet still retain the familiar graphical user interface available in current computers.


Provided are an iron-based absorbable and implantable medical device and manufacturing method thereof. The iron-based absorbable and implantable medical device (1) comprises a substrate (11), a degradable polymer layer (12), and an anionic surfactant layer (13) located between the substrate (11) and the degradable polymer layer (12). The anionic surfactant, by using the hydrophobicity thereof, can form a hydrophobic barrier layer in a solution to isolate a surface of the iron-based substrate (11) from a body fluid environment, thereby avoiding direct contact with an acidic environment resulting from degradation of the degradable polymer layer (12) at the initial and early stages of implantation, thus preventing severe local corrosion of the iron-based substrate (11).

Many research efforts have reported using iron-based materials to manufacture a biological absorbable and implantable medical device. Compared with magnesium-based materials and degradable polymers, an implantable medical device is made of the iron-based alloy which has more ideal strength and slower absorption speed. For example, an iron-based alloy intraluminal scaffold can provide enough effective support during the healing stage of the lumen tissue (for example, the healing stage of vessel is about 3 months). However, there is a drawback of iron-based intraluminal scaffold that after the lumen tissue is repaired, the iron-based intraluminal scaffold corrodes slowly and does not completely corrode in the short-term. Therefore, the clinical degradation time requirement for an absorbable device cannot be satisfied, so the iron corrosion speed needs to be improved.
The prior art discloses that an iron-based substrate with degradable polyester coating on its surface can improve the corrosion speed of the iron-based alloy. The corrosion speed of iron-based material is demonstrated to significantly improve by accelerating its corrosion in a local subacidic environment near the implantation location of the device resulting from the degradation of a degradable polyester, which decreases the pH of local environment. Corrosion products of an iron-based material were obtained when the iron-based material corroded.
Whether the mass of the iron-based materials matches the mass of the degradable polyester coat affects the corrosion speed of the iron-based material and the final corrosion product morphology. For a given specification iron-based device, when the degradable polyester type and mass of the degradable polyester that is sufficient to completely corrode the iron-based substrate are determined, whether the degradation speed of the degradable polyester matches the corrosion speed of the iron-based alloy affects the early mechanical performance of the implantable device. For example, local corrosion may easily occur in the iron-based substrate at initial implantation (for example, after 1 to 7 days of implantation to a coronary artery) and during early periods (within one month after implantation). If the local corrosion occurs too quickly, a large amount of corrosion products accumulate. Therefore, endothelialization of the device is incomplete, and the risks of acute and sub-acute thrombosis are high. Some parts of the substrate may crack when corrosion is severe, and the device fails to provide effective support. Therefore, for an iron-based device including a degradable polyester, at present, a significant problem that needs to be addressed is to avoid local corrosion of the iron-based device at the initial and short-term periods after implantation so as to ensure safety and effectiveness of the iron-based device.

Iron-based absorbable and implantable medical device and manufacturing method thereof


A digital photographing apparatus and a control method thereof are disclosed. The digital photographing apparatus receives a voice, recognizes the received voice, and stores the recognized voice to correspond to a face. In this way, by recognizing the voice while displaying an image, an owner of the voice can be identified and thus a face of a person which is not included in an image being captured can be displayed on a screen.

1. Field of the Invention
The invention relates to a digital photographing apparatus and a control method thereof.
2. Description of the Related Art
Digital cameras are configured such that only an image of a screen is captured, and thus persons outside the screen cannot be known from a captured image or moving image. However, particularly in moving images, or movies, voices of a photographer and persons around the photographer can be heard, but their identity may not be known.

Digital photographing apparatus and control method thereof


A photoresist composition containing a resin that is hardly soluble or insoluble, but which is soluble in an aqueous alkali solution by action of an acid, and a salt represented by formula (I):

A photoresist composition to be used for semiconductor usually comprises a salt as an acid generator.
US2007/0122750A mentions a salt represented by the following formula as an acid generator.
(wherein X represents monocyclic or polycyclic hydrocarbon group having 3 to 30 carbon atoms or the like, Q1 and Q2 each independently represent a fluorine atom or a C1-C6 perfluoroalkyl group, and A+ represents an organic cation).

Salt, photoresist composition and method for producing photoresist pattern

Abstract: wherein Q1, Q2, L1, W1, W2, R1, R2, t1 and t2 are defined in the specification, and Z+ represents an organic cation.


Keel joint assemblies are described that permit a degree of rotational movement of a riser within the keel of a floating vessel and greatly reduce the amount of stress and strain that is placed upon the riser, as well. Keel joint assemblies described provide a limiting joint between the riser and the keel opening that permits some angular rotation of the riser with respect to the floating vessel. Additionally, the limiting joint permits the riser to move upwardly and downwardly within the keel opening, but centralizes the riser with respect to the keel opening so that the riser cannot move horizontally with respect to the keel opening. In described embodiments, the limiting joint is provided by a single annular joint that allows that riser to move angularly with respect to the can. In some embodiments, the keel joint assembly incorporates a cylindrical stiffening can that radially surrounds a portion of the riser and is disposed within the keel opening. In these embodiments, a flexible joint is provided between the can and the riser. Supports or guides may be used to retain the can within the keel opening.

1. Field of the Invention
The invention relates generally to methods and devices for providing a stress-relieving joint between a riser and the keel of a floating platform.
2. Description of the Related Art
Deep water floating platforms use risers to communicate production fluid from the sea floor to the floating production platform. Floating platforms have a portion that lies below the surface of the sea. For stability of the platform, it is desired that there be a very deep draft. The spar, for example, is a popular style of floating platform that has an elongated, cylindrical hull portion which, when deployed, extends downwardly a significant distance into the sea. The lowest portion of the submerged hull is referred to as the keel. Currents in the sea tend to move the floating platform laterally across the sea surface. Despite the presence of anchorages, the platform imparts bending stresses to the riser during lateral movement. Localized, or point, stresses are particularly problematic for risers.
One known joint arrangement for use with risers and floating vessels is described in U.S. Pat. No. 5,683,205 issued to Halkyard. Halkyard describes an arrangement wherein a joint means is positioned within a keel opening in the floating vessel to reduce the amount of stress upon a pipe passing through the keel opening. The joint means consists of a radially enlarged sleeve member with an elastomeric annulus at either end that is in contact with both the sleeve member and the pipe. Halkyard""s intent is to reduce stress upon the pipe that is imposed by lateral movement of the floating vessel upon the sea. In order to reduce stress, Halkyard contacts the pipe at two points with an elastomeric annulus, which is described as providing a resilient, somewhat yieldable connection. Unfortunately, Halkyard""s arrangement is problematic since it permits almost no angular movement of the pipe within the sleeve member. While point stresses upon the pipe are reduced, they are still significant. Further, the pipe is required to bend within the confines of the sleeve. This bending, together with the induced point stresses at either end of the sleeve, place significant strain on the pipe.
The present invention addresses the problems in the prior art.
Keel joint assemblies are described that permit a degree of rotational movement of a riser within the keel of a floating vessel. The assemblies of the present invention greatly reduce the amount of stress and strain that is placed upon the riser, as well. The present invention describes keel joint assemblies that provide a limiting joint between the riser and the keel opening that permits some angular rotation of the riser with respect to the floating vessel. Additionally, the limiting joint permits the riser to move upwardly and downwardly within the keel opening, but centralizes the riser with respect to the keel opening so that the riser cannot move horizontally with respect to the keel opening.
In described embodiments, the limiting joint is provided by a single annular joint that allows that riser to move angularly with respect to the can. In some embodiments, the keel joint assembly incorporates a cylindrical stiffening can that radially surrounds a portion of the riser and is disposed within the keel opening. In these embodiments, a flexible joint is provided between the can and the riser. Supports or guides may be used to retain the can within the keel opening.

Keel joint arrangements for floating platforms


In a screw lift the lift cage is carried by a drive nut rotatably provided on an essentially upright screw, the lift cage carrying a bearing means and a drive means for the nut. The screw is supported by several supporting braces attached thereto along the length thereof. The nut has the shape of a spiral having turns, the pitch and axial thickness of which are adapted to the distance between the braces and the dimensions of these in the length direction of the screw so as to enable the nut to pass freely past the braces by passing between the turns of the nut during the passage.

1. Field of the Invention
The present invention relates to an arrangement in a screw lift, in which the lift cage or similar is carried by a nut rotatably provided on an essentially upright screw, the lift cage carrying a bearing means and a drive means for the nut.
2. Discussion of the Related Art
Conventionally, in such screw lifts, the screw hangs from an attachment at the uppermost end of a guide rod. This design is limited with respect to its lifting height, since the dead weight of the screw plus the lift cage with its load shall be carried by the screw. Furthermore the guide rod must be designed so as to be able to carry the above mentioned load plus dynamic additional loads at catching and braking operations.