An execution unit for a processing engine comprising first head part circuitry for deriving an intermediate signal from an input signal. The execution unit also comprises further circuitry which receives the intermediate signal and operates on it to produce a final signal. The further circuitry is typically configured to perform one or more signal processing functions in combination with the first circuitry, and generally comprises separate circuitry for each function. The intermediate signal is configured to be usable by each of the separate circuitry.

This application claims priority to S.N. 99400557.7, filed in Europe Patent Office on Mar. 8, 1999 and S.N. 98402455.4, filed in Europe Patent Office on Oct. 6, 1998.
The present invention relates to processing engines configurable to manipulate bit fields, and in particular but not exclusively, to digital signal processors.
Many different types of processing engine are known, of which microprocessors are but one example. For example, Digital Signal Processors (DSPs) are widely used, in particular for specific applications. DSPs are typically configured to optimise the performance of the applications concerned and to achieve this they employ more specialised execution units and instruction sets.
A particular application of DSPs is in telecommunications equipment. Modern telecommunications systems require a high level of processing of the data transmitted over the system, for example for channel coding and de-coding, interleaving and de-interleaving or error checking or correction techniques such as cyclic redundancy checking. Such processing operates on bit fields within the data, which are expanded into or extracted from data packets transmitted over the telecommunication system and provide for data to be split and reconstructed in a manner suitable for improving or enhancing the robustness or integrity of the transmission channel. Another application is in pure signal processing, where it is frequently necessary to normalize a table of numbers representing a sampled signal, in order to maintain a good level of accuracy throughout the signal processing task. Such normalization may occur during floating point operations. Typically a normalized number, such as the mantissa, has its sign bit in the most significant bit (msb) position and the complement of the sign bit on the next lower bit position (in the form of S, not (S), X, Y, . . . Z). A mantissa which is not normalized has more than one sign bit from its most to its least significant bit (in the form of S,S, . . . , S, not (S), X, Y, . . . Z). Normalization typically comprises finding the bit location of the xe2x80x9cS, not (S)xe2x80x9d sequence within the number (typically called exponent computation) and shifting the xe2x80x9cS, not (S)xe2x80x9d sequence to the most significant bits. Often, the msb for the mantissa value is not the same as the msb for the data word comprising the mantissa. For example, for a 40 bit data word the msb for the mantissa value, or normalized sign position bit, may be bit 31. The remaining more significant bits serve as overflow bits during floating point arithmetic. Thus, even for a normalized mantissa there could be a sequence of sign bits from the msb of the data word to the msb of the mantissa.
It is known to implement bit processing techniques either in software or hardware. Software implementations generally have a slow performance and a large code size. Hardware implementations are generally less flexible, and are physically located in different processor units, for example one in a fixed-point module and the other in a floating-point module. Additionally, bit field extract or expand functions have been implemented in a limited fashion that requires the bits to be extracted to be in a contiguous area of the data source, that is data memory. This is due to the fact that known bit field extract or expand functions utilize a shifter combined with mask logic. Additionally, the shifter is limited to performing only the bit field extract or expand functions, and is unable to be used in parallel for other tasks.
The present invention is directed to improving the performance of processing engines such as, for example but not exclusively, digital signal processors.
Particular and preferred aspects of the invention are set out in the accompanying independent and dependent claims. Combinations of features from the dependent claims may be combined with features of the independent claims as appropriate and not merely as explicitly set out in the claims.
In accordance with a first aspect of the invention, there is provided an execution unit for a processing machine comprising first circuitry adapted to derive an intermediate signal input thereto. This is also provided further circuitry for receiving an intermediate signal and operating on it and/or receiving and operating on a signal associated with the input signal, in accordance with the intermediate signal in order to provide a further signal derived from the input signal and/or associated signal.
In a first embodiment in accordance with the invention, the further circuitry comprises tail-part circuitry operable with the first circuitry to form a composite bit counter, and to process intermediate signal in order to provide a bit count of the input signal.
In accordance with a second embodiment of the invention, the further circuitry comprises circuitry operable with the first circuitry for forming composite bit extract circuitry, and for utilizing the intermediate signal to provide a bit sequence extracted from the associated signal in accordance with the input signal.
In accordance with a third embodiment of the invention, the further circuitry comprises circuitry operable with said first circuitry for forming a composite bit expand circuitry. The intermediate signal is utilized to provide a bit sequence expanded from said associated signal in accordance with said input signal.
In accordance with a fourth embodiment of the invention, the further circuitry comprises tail-part circuitry operable with the first circuitry for forming composite exponent counting circuitry, utilizing said intermediate signal to provide a shift value for normalizing the input signal.
The foregoing embodiments in accordance with the invention may be provided together in any combination of two or more embodiments. An advantage of such a combination is that there is provided a common architecture for bit processing functionality typically required in signal processing applications. In particular, bit count circuitry, bit field extract and bit field expand circuitry and exponent counting circuitry may be combined into a common architecture sharing a first or head part circuitry which produces signals utilizable by separate specific circuitry for performing separate signal processing functions. Such an architecture advantageously reduces the surface area required by the signal processing functions on integrated circuits, thereby reducing the cost of such integrated circuits, or providing opportunities for further circuits and functionality on that integrated circuit.
Additionally, the common architecture supports bit field extract and expand functions for non-contiguous bits, such as bits from non-contiguous locations in an accumulator register, for example. Additionally, the common architecture provides single cycle operation within a processor timing sequence.
The further circuitry typically comprises separate circuits for performing respective signal processing operations on the associated signal in accordance with the intermediate signal, and/or for performing respective operations on the intermediate signal to derive respective signal processor results from the input signal. Each of said separate circuits can be directed to one or more of the preferred embodiments such as bit expand or extract, bit count or exponent count circuitry.
Preferably the first circuitry is adapted to derive the intermediate signal such that it is optimally configured for utilization by the further circuitry. More preferably the first circuitry is adapted to operate on segments of the input signal, said segments being sized to provide the optimally configured intermediate signal. Such optimal configuration may be directed towards reducing the number of processing elements or gates required for implementing the first and further circuitry, thereby reducing the surface area required by the common architecture.
The first circuitry and separate ones of the further circuitry provide respective composite signal processing circuitry for respective signal operations, and such respective composite signal processing circuitry may be formed non-concurrently with other of said respective composite signal processing circuitry. Thus, the common architecture may be configured to operate in parallel thereby providing enhanced speed of operation, or one composite signal processing circuit at a time.
Typically, the first circuitry is operable to determine the number of occurrences of a date attribute in respective segments of the input signal, wherein the input signal generally comprises a sequence binary digits (bits). Suitably, the respective segments comprise groups of bits. The data attribute for an input signal comprising a sequence of binary digits is one of xe2x80x9csetxe2x80x9d or xe2x80x9cnot setxe2x80x9d.
It is advantageous to provide first circuitry performing xe2x80x9cbitxe2x80x9d counting, since signal processing functions generally require knowledge of a number of bits in an input signal or segments of input signals in order to perform the function. Thus, such bit counting circuitry provides a suitable head part or first circuitry for a common architecture for signal processing functions.
Generally a first stage of a first circuitry comprises digital counters respectively associated with respective segments of the input signal, and providing an output which is representative of the number of occurrences of a data attribute in an associated segment.
The respective segments generally comprise groups of four bits, and the digital counters comprise four inputs. In a preferred embodiment, the digital counters comprise xe2x80x9cfour into twoxe2x80x9d counters.
A suitable configuration for the first stage is that of the first stage of a reduction tree for obtaining the bit count for the input signal, and a second stage of the first circuitry is suitably configured as a second stage of a reduction tree for obtaining a bit count for the input signal. In a preferred embodiment, the second stage provides the intermediate signal.
Generally, the second stage outputs a signal which is representative for a bit count for two adjacent segments of the input signal.
For the first embodiment in accordance with the invention, the tail part circuitry is configurable as a reduction tree for receiving the intermediate signal from the second stage and for providing a bit count of the input signal. Advantageously, the reduction tree is a xe2x80x9cWallace-likexe2x80x9d reduction tree which is a well known configuration. It is preferable, that the intermediate signal comprises a classically encoded bit count for the adjacent respective segments.
In accordance with the second embodiment of the invention, the further circuitry comprises means for slicing the associated signal and input signal into corresponding groups and shifting a bit positioned in an associated signal group to a position determined by a corresponding input signal group. The further circuitry further comprises means for receiving a signal corresponding to a signal from the slicing means comprising the shifted bit, and operating on that signal in accordance with controlled signals derived from intermediate signal. The means for receiving the signal is adapted to operate on a signal in larger groups than the means for slicing, and to shift a bit positioned in that signal to a position determined by the control signals. Thus, the subsequent stages of the further circuitry operate on groups of bits corresponding to larger segments or groups of the input signal.
Preferably, the further circuitry comprises a further means for receiving, which means it is adapted to operate on a signal from the means for receiving in a yet larger group, and to shift a bit positioned in said signal from said means for receiving to a position determined by further controlled signals derived from the intermediate signal.
Advantageously, the slicing means comprises an encoder, and the means for receiving and further means for receiving comprise multiplexors. The input signal comprises a bit mask for identifying the bits to be extracted from the associated signal.
In the third embodiment of the invention, the further circuitry comprises means for distributing bits from the associated signal to bit locations in at least two bit groups determined by control signals derived from intermediate signals. The further circuitry also comprises means for distributing bits of the distributed bits to bit locations in smaller bit groups determined by further control signals derived from the intermediate signal. Finally, the further circuitry comprises a further means for distributing bits of a signal corresponding to distributed bits from the means for distributing to bit locations in yet smaller groups determined by controlled signals derived from the input signal or mask.
Suitably, the means for distributing bits from the associated signal and the means for distributing bits of the distributed bits comprised in multiplexors, and the further means for distributing comprises an encoder.
In the fourth embodiment in accordance with the invention, the further circuitry comprises tail-part circuitry comprising respective processing means for receiving respective segments of the input signal and controllable by signals derivable from respective parts of the intermediate signal to provide the shift value for normalizing the input signal.
Embodiments in accordance with the invention help reduce the surface area necessary for providing circuitry for performing signal processing functions. Thus, further functionality may be incorporated on a processor, digital signal processor or integrated circuit incorporating embodiments of the invention. This makes embodiments of the invention particularly suitable for portable apparatus, such as wireless communication devices, in which maximum functionality in minimum surface area is desirable.
A particularly advantageous utilization of embodiments in accordance with the invention is in a wireless communications device comprising a user interface including a display, a keypad or key board for inputting data to the communication device, a transceiver and an antenna operable coupleable to the transceiver, and which further comprises an execution unit as described above, or a processor, a digital signal processor or integrated circuit comprising such an execution unit.


A collapsible, recessed wheel chock is described. The chock is intended to be mounted in the bed of a truck or trailer and can be collapsed into a flush mount with the bed when not in use. The chock when in use is rotated from the closed position into an open position which is at an obtuse angle to the bed, and is supported in that position by right and left supports so that a wheel of a motorcycle or the like can be received against the open chock and retained between the lateral supports against movement The supports also function to prevent damage to the chock in the event the retained vehicle wheel. attempts to move forward.

This invention relates to a wheel chock for transporting a motorcycle, all terrain vehicle (ATV), or similar vehicles in a truck or trailer.
When transporting a motorcycle or other sport vehicle typically the vehicle will be tied down either in a pulled trailer, or in the bed of a pickup truck. The vehicle will be transported to where it is to be ridden, and then off loaded. It is necessary then to stabilize such a vehicle during transport and chocks have been used for this purpose for many years. A chock typically will be used to engage the front wheel of front wheels in the case of an ATV and typically the chock is bolted to the bed of the truck or trailer. In this case cargo capacity will be severally limited when the vehicle is not being transported by the presence of the chock on the truck or trailer bed surface.
In U.S. Pat. No. 2,858,905 there is a described an adjustable wheel block which is normally recessed in the floor of a freight car. The block can be raised to engage the wheels of a heavy truck or similar vehicle being transported in the freight car. Spindles are provided on either end of the block which engage a recessed track against movement of the wheels.
Collapsible chocks are also known, and such a chock is described in U.S. Pat. No. 2,829,738. This is a chock for airplane wheels and it is intended that the chock will be collapsed and stored within the airplane when not in use. The chock is raised to an upright position by a linkage and collapsed by pivoting this linkage out of the way.
Another type of collapsible chock is described in U.S. Pat. No. 703,280 which is a sidewalk mounted chock for a bicycle. When not in use the chock collapses into a recess in the sidewalk, and when it is in use it is manually raised and engages the front wheel. When the chock is in a raised position a stop at the base engages an end of the recess against further movement.
These collapsible chocks then are not intended to stabilize a motorcycle or similar vehicle as it is being transported with the incumbent vibration and bumps inherent in such travel.
Accordingly, there is a need for a recessed chock which can be mounted in the bed of a truck or trailer and which may be collapsed when not in use so that the vehicle can be used for unrestricted hauling of cargo.
The collapsible chock of this invention is normally stowed in a recess in the bed of a trailer or truck and is essentially flush mounted when closed. The chock, which is essentially a plate, is hingeably mounted at the forward end to the recess frame and a hole is provided in the opposite end for gripping to raise the chock. When the rear end of the plate is raised it pivots about the hinge mounting.
Parallel side support members are provided which are engaged at the upper end of the plate and the rear end of the recess frame and they are intended to both stop movement of the plate in the open position, and engage the tires of the vehicle mounted in the chock. The side support members then function to stabilize the vehicle laterally, and in the forward direction so that, for example, if the vehicle brakes sharply the motorcycle will not damage the chock as it is urged forward by inertia.
Accordingly it is an object of this invention to provide a recessed chock which is stabilized against movement of a vehicle engaged in the chock and which may be collapsed into a flush mounting with the floor of the trailer or truck bed when not in use.
It is another object of this invention to provide a collapsible chock which is structurally able to stabilize a motorcycle, ATV or similar vehicle as it is being transported in the bed of a truck or in a trailer.
It is another object of this invention to provide a collapsible chock which can be flush mounted with the bed of a trailer or truck as part of the floor thereof when not in use and easily raised by hand when a vehicle is being transported so that the front wheel engages the chock.


A supporting apparatus for a display device is provided. The supporting apparatus may include a stationary unit coupled to an installation site, a device supporting unit that supports the display device, a connection unit that connects the stationary unit to the device supporting unit and that guides motion of the device supporting unit, and a tilting frictional unit interposed between the connection unit and the device supporting unit to guide a tilting motion of the device supporting unit. The tilting frictional unit may include a first arc member fixed to the connection unit and a second arc member fixed to the device supporting unit. The first and second arc members contact each other to generate frictional force.

Generally, a display device is for display an image. Recently, flat panel displays that can be formed in a two-dimensional flat shape have been released.
Since the flat panel display is provided in the form of a planar structure and is lighter in weight, the user washes the display with the display mounted on a wall. Considering this circumference, a variety of wall-mounting type supporting apparatus for the flat panel display have been released.


A capacitive touch matrix has first conductive row elements spaced apart from one another, and first row interconnection circuitry electrically connects the first conductive row elements. Second conductive row elements are spaced apart from one another, and second row interconnection circuitry electrically connects the second conductive row elements. First conductive column elements are positioned between two adjacent ones of the first conductive row elements, the first conductive column elements being spaced apart from one another. Second conductive column elements are positioned in a same column as the first conductive column elements and between the two adjacent ones of the first conductive row elements, the second conductive column elements being spaced apart from one another. First column interconnection circuitry electrically connects each first conductive column element, and second column interconnection circuitry electrically connects each conductive column element. The conductive elements and interconnection circuitries are coplanar with one another.

Touch screens are prevalent in today's computing environment. Portable computers, desktop computers, tablets, smart phones, and smartwatches typically employ a touch screen to gain user input for navigation and control of these devices. Thus, discerning the intent of the user via touch inputs is an important feature of a touch screen device.
Touch screens typically operate based on capacitive touch sensing, and include a patterned array of conductive features. For instance, the patterned array of conductive features may include sets of lines, conductive pads, overlapping structures, interleaved structures, diamond structures, lattice structures, and the like. By evaluating changes in capacitance at different lines or sets of lines, a user touch or hover, such as by a finger or stylus, can be detected.
A common capacitive touch sensing technique that may be performed on touch screens is mutual capacitance sensing. As shown in FIG. 1A, in mutual capacitance sensing, a drive or transmit signal is applied from a touch screen controller to a subset of the lines referred to as drive or transmit lines, and capacitance values are measured at a subset of the lines referred to as sense or receive lines, with it being understood that in this specific example the receive lines cross the transmit lines in a spaced apart fashion therefrom. Each crossing of transmit line and receive line forms a capacitive node. Since bringing a finger or conductive stylus near the surface of the touch screen changes the local electric field, this causes a reduction in the capacitance between the transmit lines and the receive lines (the "mutual" capacitance), and the capacitance change at every individual capacitive node can be measured to accurately determine the touch location. Therefore, the output of mutual capacitance sensing is a two-dimensional matrix of values, with one value for each capacitive node.
The conductive lines collectively can be referred to as a capacitive touch matrix. One way in which these lines can be arranged is to have the transmit lines be perpendicular to the receive lines and spaced apart from (not co-planar with) the receive lines, as shown in FIG. 1B.
Another way the conductive lines can be arranged is into diamond shapes, as shown in FIG. 1C. Here, the transmit lines and receive lines are diamond shaped, with one (either the transmit lines or receive lines) being located within one plane, and with the other being generally located in the same plane but with a wire or bridge extending through another plane to provide for spaced apart intersections between the transmit lines and receive lines. As can be seen in FIG. 1C, the lines labeled as X-ITO extend within a single plane, while the lines labeled as Y-ITO have portions extending into a second plane to cross the lines labeled as X-ITO.
While the capacitive touch matrix arrangements of FIGS. 1B-1C provide for accurate touch sensing, they have drawbacks in that they can be more expensive to produce than desired, have a lower manufacturing yield than desired, are thicker than desired (due to the capacitive touch matrix requiring more than a single layer), and may lead to the touch screen they are incorporated into having larger bezels than desired. As such, additional development is needed.


The distortion pedal for electric guitar and other electronic musical instruments employs vacuum tube circuitry operated by low voltage "battery eliminator" DC power supply. A pull-up resistor biasing circuit on the vacuum tube grid improves input and output impedance and circuit headroom while providing good control over the harmonic content and sustain.

The present invention relates generally to electronic musical instruments. More particularly, the invention relates to a signal processing device for altering the spectral content and sustain characteristics of electronic musical instruments such as electric guitars and the like.
The popularity of electric guitars and other electronic musical instruments has created quite a demand for signal processing devices to change the timber, overtones, coloration, sustain and other musical properties of the instrument. Today electronic musical instruments are played through amplifiers, audio mixing consoles and even portable headphone amplifiers. Regardless of the final output device, be it amplified speakers, mixing console or headphones, many musicians prefer using standalone signal processing devices to enhance their sound.
One type of signal processing device is the distortion booster which produces a fuzz-like tone by overdriving cascaded amplifier stages. There are many popular overdrive units on the market, many of them being transistorized battery-powered circuits housed in small foot pedal boxes. Occasionally, these transistorized distortion pedals have a jack for connection to an external "battery eliminator" power supply. These power supplies typically comprise a transformer and rectifier circuit in a self-contained module intended to be plugged directly into household AC current. Battery eliminators of this type typically supply either 6 or 9 volt DC output.
When several amplifier stages are cascaded together and biased to overdrive, nonlinearity results. Transistor circuits are used in foot pedal distortion booster circuits because they are economical and can be operated on low DC voltages. When driven into the nonlinear regime, transistor circuits tend to produce tonal harmonics which are odd multiples of the original or fundamental tone. This is what produces the distortion or fuzz-like sound. For some types of music, such sound is considered by some to be desirable.
However, many musicians find that the addition of odd harmonics to the fundamental tone lacks musical aesthetic qualities. It has been found that the even harmonics are more pleasing to many and would be preferred over the odd harmonics produced by transistor circuitry. Since naturally occurring musical tones and the scales and chords upon which modern music are based all employ even harmonics, it is advantageous to accentuate these harmonics by signal processing.
Although virtually replaced by transistor and semiconductor devices, vacuum tubes naturally provide the beneficial quality of generating even harmonics when overdriven to the point of distortion. There are some musical instrument amplifiers on the market today which use vacuum tube circuitry to gain this advantage. However, because of packaging and power supply constraints, there has not heretofore been a stand-alone distortion pedal operable by battery eliminator DC power supplies which use vacuum tubes. Indeed, the classical vacuum tube bias circuit often employs voltages in the range of ninety to several hundred volts for the plate supply, with 6 volt and 12 volt filament heater voltages being common. Thus traditional vacuum tube circuits simply are not designed to work with a 9 volt battery eliminator power supply of the type commonly used with transistorized distortion pedals. Of the very few distortion pedals which use vacuum tubes, all have 110 volt AC power cords like lamps, toasters and other household appliances.
Several problems arise when AC power is used in this conventional fashion. First, distortion pedals employing conventional AC power cords require step down transformers and rectification circuitry to be built into the foot pedal housing. Placement of the transformer in close proximity to the vacuum tube creates a significant problem with electromagnetically induced hum, an extremely undesirable quality in the musical instrument industry. In addition, because these devices operate at full line current, the components are more expensive and require Underwriter's Laboratories' approval. As a result, AC powered distortion pedals tend to cost approximately twice what the transistorized pedal costs.
Furthermore, the requirement of needing a separate AC outlet to operate a distortion pedal can be a significant drawback to the studio musician or performing musician. In the studio and on stage, there is often a shortage of AC outlets and also often quite a tangle of cables and wires leading between the instruments, microphones, amplifiers, mixing consoles and the like. The proximity of AC power cords to high impedance, high gain circuitry found in this equipment can induce unwanted hum. Also the AC power cord of a distortion pedal can create ground loop problems as well.
The present invention provides a unique and novel vacuum tube overdrive distortion pedal which is capable of operating from a low voltage "battery eliminator" DC power supply. The presently preferred embodiment employs a 12 AX7A vacuum tube (filament heater requirement 12 volts) and a 9 volt DC battery eliminator serves as the power supply. The invention provides a rich, warm distortion emphasizing even harmonics. The invention thus rivals the sound qualities of the finest AC powered tube distortion circuits, without any of the power supply problems described above.
The invention is preferably packaged in a small foot pedal with jack on the rear into which the conventional battery eliminator low voltage conductors are plugged. The foot pedal conforms to the size, shape and power requirements of popular transistorized effects devices. Thus the invention can be connected together with other effects devices to a common battery eliminator supply. There are effects pedal carrying cases on the market today which accommodate several interconnected effects pedals and which supply the pedals with the proper DC operating voltage. The distortion pedal of the invention will operate with such carrying cases, making it popular with traveling musicians.
The signal processing device of the invention employs a unique biasing circuit with pull-up circuitry which references the vacuum tube grid to the B+ supply voltage, rather than to ground as is the conventional practice. This gives the circuit a desirable high input impedance, increases nondistorted headroom substantially and lowers output impedance of the device. Although not fully understood, it is believed that the circuit also produces a secondary emission from the grid by pulling it slightly positive, allowing electrons from the cathode to move more freely toward the plate. Notably, the power supply voltage is also lower than the conventional requirements for filament heater operation.
For a more complete understanding of the invention, its objects and advantages, reference may be had to the following specification and to the accompanying drawings.

Tube overdrive pedal operable using low voltage DC battery eliminator


Vessel roadmapping systems and methods that generate a display of live fluoroscopic imaging of an intravascular device within vessels of a patient and a pre-generated vessel roadmap. The systems and methods pan the vessel roadmap in coordination with movement of a field of view of an image acquisition machine obtaining the live fluoroscopic imaging so that registration of the live fluoroscopic imaging and the vessel roadmap is preserved in the displayed overlay.

WO2012011035 discloses vessel roadmapping, which includes a vessel display, i.e. the vessel roadmap, computed from vessel phase or pre-navigation imaging, and an intravascular device display computed from device phase, real-time, or live fluoroscopy imaging of an intravascular device in a vessels of a patient. The vessel roadmap is built from contrast enhanced angiographic imaging. With the roadmapping technique, the contrast enhanced vessels are displayed with an overlay of the live imaging of the intravascular device for aiding location of, and navigation of, the intravascular device. This document discloses pruning of the vessel roadmap based on detected device position to display a more focused, more relevant vessel roadmap.
In known roadmapping systems, if a clinician changes the geometry of an image acquisition machine during the device phase (e.g. a position of the source/detector of the image acquisition machine and/or a patient table), then a mismatch between the vessel roadmap and the intravascular device occurs. In such situations, a vessel roadmap function may be switched off. Thereafter, a clinician either needs to restore the vessel roadmap position through re-position of the position of the image acquisition machine or the clinician has to recreate the vessel roadmap through a new vessel phase image acquisition process involving subjecting the patient to toxic contrast agent injection and a further round of detailed angiographic (e.g. X-ray) imaging. Angiographic X-ray imaging is a high dose, high detail X-ray imaging technique.
Thus, it is desired to provide vessel roadmapping systems and methods that reduce the number of vessel phase imaging operations. It is further desirable to avoid vessel roadmap mismatches in so far as possible to increase procedure efficiency.

Angiography panning during x-ray roadmap


A printed circuit board inspection apparatus can inspect a mounting state of a component by generating depth information on the component by using a pattern of light reflected from the component mounted on a printed circuit board received by an image sensor, generating two-dimensional image data for the component by using at least one of light of a first wavelength, light of a second wavelength, light of a third wavelength, and light of a fourth wavelength reflected from the component received by a first image sensor, inputting the depth information and the two-dimensional image data for the component into a machine learning-based model, obtaining depth information with reduced noise from the machine learning-based model, and using the noise-reduced information.

In general, in a manufacturing process using surface-mount technology (SMT) on a printed circuit board, a screen printer prints solder paste on the printed circuit board, and a mounter mounts components on the printed circuit board printed with the solder paste.
In addition, an automated optical inspection (AOI) device is used to inspect the mounting state of the components mounted on the printed circuit board. The AOI device inspects whether the components are normally mounted on the printed circuit board without displacement, lifting, or tilting by using a captured image of the printed circuit board.
On the other hand, in a process in which the AOI device generates an image for the printed circuit board, noise may be generated in multiple reflections of light irradiated on the printed circuit board or in the process of processing received light by an image sensor. That is, optical noise and signal noise may be variously generated, and if the noise generated in such a manner is not reduced, the quality of the captured image of the printed circuit board generated by the AOI device may be degraded. When the quality of the captured image of the printed circuit board is degraded, inspection of the mounting state of the components mounted on the printed circuit board using the captured image of the printed circuit board may not be accurately performed.

Method for inspecting mounting state of component, printed circuit board inspection apparatus, and computer readable recording medium


The disclosed technology relates a system is configured to generate a protected configuration for a network device based on network connectivity data for a plurality of devices in a managed network associated with a cloud management system. The system is further configured to receive a configuration change for the managed network, determine that the configuration change is incompatible with the protected configuration, and generate a notification that the configuration change is incompatible with the protected configuration.

A managed network, such as an enterprise private network or a data center network, may contain a large number of entities distributed across the network. These entities may include, for example, endpoint machines, access points, routers, switches, servers, firewalls, gateways, or other computing devices. The entities may also include logical, virtual, or other types of entities such as virtual machines, containers (an instance of container-based virtualization), or resources (e.g., applications, endpoint groups, etc.). In addition to being different types, these entities may be grouped in different departments, located in different geographical locations, and/or serve different functions.
Some modern technologies enable a network to be remotely managed. This scheme is sometimes referred to as cloud managed networking, where one or more networks (which may be geographically dispersed) may be managed by a cloud management system which communicates with the one or more networks over the internet. Depending on the implementation, cloud managed networking may provide centralized management, visibility, and control without the cost and complexity of controller appliances or overlay management software. For example, cloud managed networks may enable network administrators to control and manage a network from a single interface that may be deployed at a different geographical location from the managed network. Furthermore, cloud managed networks further provide more efficient and effective scalability. However, there are still several technical limitations associated with this emerging technology area.


A voltage controlled oscillator (VCO) for generating a clock of a 50% duty includes a VCO unit and a duty correction unit. The VCO unit generates first and second signals having a 180° phase difference to each other with an oscillation frequency according to a control voltage to output the first and second signals through first and second oscillation output terminals. The duty correction unit generates a clock signal of a 50% duty according to the first and second signals through the first and second oscillation terminals.

1. Field of the Invention
The present invention relates to a voltage controlled oscillator (VCO) applied to a phase-locked loop (PLL) of a communication terminal or a broadcasting receiver, and more particularly, to a VCO that can stably generate a clock of a 50% duty from a simple circuit and have an excellent duty correction function in noise.
2. Description of the Related Art
A VCO is an important element used in a tuner or a modem of a communication system or a broadcasting system. Since a system has been more complicated, required properties for the VCO become more diverse and strict. Especially, various kinds of systems require a clock of a 50% duty to process data accurately.
FIG. 1 is a view of a related art VCO.
The VCO includes a VCO unit 10 generating a signal S1 with a frequency according to a control voltage VC, and a flip-flop 20 generating a signal Sout with a 50% duty through performing a divide-by-2 on the output signal S1 of the VCO unit.
FIG. 2 is a timing chart of main signals in the VCO of FIG. 1.
Referring to FIG. 2, the signal S1 outputted from the VCO unit 10 has duty lower than 50%. The flip-flop 20 is required to make the signal S1 to be a 50% duty. Then the flip-flop 20 outputs a signal having a 50% duty. Here, the signal Sout outputted from the flip-flop 20 corresponds to a frequency (Fvco/2) that is a half frequency Fvco in the VCO unit 10.
However, the related art VCO needs to generate a frequency outputted from the VCO unit, which is two times higher than a frequency of a final output.

Voltage controlled oscillator with duty correction


This application discloses a dual-polarized antenna, a radio frequency front-end apparatus, and a communications device. The dual-polarized antenna is a planar antenna, and a maximum radiation direction of the dual-polarized antenna is parallel to an antenna plane. A radio frequency circuit may be disposed at a side opposite to the maximum radiation direction of the dual-polarized antenna and located on a same circuit board as the dual-polarized antenna. A low profile feature is implemented, and the radio frequency circuit and the dual-polarized antenna do not need to be connected by using an interconnection plug, thereby reducing an insertion loss and reducing an assembly difficulty.

As an apparatus for transmitting and receiving an electromagnetic wave, an antenna is an important part of a wireless communications system. A dual-polarized antenna can simultaneously transmit or receive two electromagnetic wave signals of which polarization directions are orthogonal, and this is equivalent to providing two transmission channels on a frequency band, so that reliability of the wireless communications system can be effectively improved.
FIG. 1a and FIG. 1b are schematic structural diagrams of a related art dual-polarized antenna. The dual-polarized antenna is a planar antenna, and the dual-polarized antenna includes a radiation patch, a dielectric plate 1, a microstrip L1 and a microstrip L2 that are orthogonal to each other, a dielectric plate 2, and a metal floor in sequence from top to bottom. The microstrip L1 is configured to couple and excite the radiation patch. A maximum radiation direction of an electromagnetic wave signal generated by excitation is perpendicular to an antenna plane, and a polarization direction is parallel to the microstrip L1 and parallel to the antenna plane. The microstrip L2 is configured to couple and excite the radiation patch. A maximum radiation direction of an electromagnetic wave signal generated by excitation is perpendicular to the antenna plane, and a polarization direction is parallel to the microstrip L2 and parallel to the antenna plane. Therefore, two polarization directions of the dual-polarized antenna are orthogonal to each other and are parallel to the antenna plane, and the maximum radiation direction is perpendicular to the antenna plane.
To avoid interference caused by the antenna to a radio frequency circuit, the radio frequency circuit is usually placed in a place with minimum radiation energy of the antenna. Based on an antenna pattern of a related art dual-polarized antenna, the radio frequency circuit is placed in a radiation back lobe direction of the dual-polarized antenna and is perpendicular to the antenna plane, and the radio frequency circuit and the dual-polarized antenna form a three-dimensional structure. Therefore, it is difficult to realize miniaturization and integration of a device. In addition, the radio frequency circuit needs to be connected to the dual-polarized antenna by using an interconnection plug. This connection manner causes a significant increase in an insertion loss. Meanwhile, due to a limitation of a wavelength, a volume of the interconnection plug is very small. Therefore, a requirement on an assembly process is high.

Dual-polarized antenna, radio frequency front-end apparatus, and communications device


An allergen detector and allergen detection method for sampling the environment where the detector is located and providing an alarm indication when allergen particulates exceed a predetermined level. The invention comprises a housing having a passageway formed therethrough with a fan disposed in the passageway that is responsive to a flow control signal for creating air flow in a first direction through the passageway. At least one filter is disposed in the passageway for removing particulates larger than allergen particulates in air flowing through the passageway in the first direction. An allergen particulate detector is disposed in the passageway downstream of the filter, with respect to air flow in the first direction, for detecting allergen particulates in the air flowing through the passageway and for providing a corresponding detection signal. A controller is disposed in the housing and coupled to the fan and the allergen detector for generating, at periodic time intervals for a predetermined time period, the flow control signal. The controller is responsive to the detection signal for generating an alarm signal when the detection signal reaches a predetermined level indicative of a condition of excessive allergen particulates present in the environment. An alarm disposed in the housing and coupled to the controller receives the alarm signal and provides an indication of the condition of excessive allergen particulates present in the environment.

I. Field of the Invention
The present invention relates to a method and apparatus for detecting allergens in the environment. More specifically, the present invention relates to a novel and improved self-contained apparatus and method for sampling the environmental air and providing an alarm indication when allergen particulates exceed a predetermined level.
II. Background Art
Many individuals suffer from allergies or hypersensitivity to airborne particulates or particles which at times are present in the environmental air that is breathed by the individual. These particulates to which many individuals are sensitive are typically in the size range of 5-20 microns. These particles may come from various sources such as dust, pollens, mold spores, smoke, animal danders, insect body parts, foods and various other sources which produce particles in the allergen size range.
It is generally well known that it is particles of the 5-20 micron size which provoke respiratory symptoms such as asthma, coughing, sneezing rhinoconjunctivitis, as well as skin rashes and anaphylaxis. Typically larger particles do not easily pass through the nasal and pharyngeal barriers and thus generally do not produce serious symptoms. However, for those individuals who are sensitive to the allergen-sized particles, it would be desirable to be alerted to environmental conditions in which there is a presence of an excessive number of allergen particulates. Real time knowledge of the allergen particulate level in the environmental air would enable one to take measures to avoid exposure to the environmental condition, to activate filters to remove the allergens, or to seek immediate medical assistance.
Previously developed air sampling devices have operated on the basis of sampling the environment for airborne particulates for later analysis. No such device is known which is capable of providing a real time detection and warning to an individual of the condition of excess particulates, especially allergen particulates, in the environmental air. It is therefore most desirable to have a device that is capable of providing almost instantaneous warning of allergy provoking environmental conditions so that the individual may take steps to avoid further exposure.
It is therefore an object of the present invention to provide a new and improved air sampling device and method for detecting the presence of an excessive number of allergen particulates and providing concurrently therewith an alarm condition indication when the allergen particulates exceed a predetermined level.
It is yet a further object of the invention to provide a self-contained, real-time allergen detection device capable of providing a warning to sensitive individuals of the presence of allergen particles in respired air.
It is yet a further object of the present invention to provide along with a real time warning of the presence of excessive of airborne allergen particles, means by which the particles may be trapped for later analysis.

Method and apparatus for detecting airborne allergen particulates


Systems and methods are provided that use a mobile robotic device to transport rechargeable batteries between a base station, which charges the batteries, and a battery operated device, such as battery powered kiosk or signage system, which uses a charged battery as a power source. After traveling to a battery operated device, the mobile robotic device removes any discharged batteries from the battery operated device and installs a charged battery. The mobile robotic device then travels to the base station and attaches the discharged battery to the base station for recharging. The mobile robotic device may be configured to perform other transfers, such as data transfers and paper transfers. In addition, the mobile robotic device may be configured to perform a photographic and spatial survey of the isles, retail shelves, and surrounding environment for various purposes, such as generating three-dimensional store models and remote viewing.

Kiosks and digital signage devices are commonly available devices typically located in retail environments. Kiosks are computerized devices that allow customers to access information, place orders, and make purchases. Digital signage devices are electronic display devices that present information, advertising, and other messages to customers. Kiosks and digital signage devices require a source of power to operate and typically require an electrical receptacle to be installed nearby the kiosk or digital signage device. In addition, kiosks and digital signage devices generally require frequent data updates and may require a network connection to be installed nearby the kiosk or digital signage device or may require the retail environment to deploy a wireless network. The expertise, regulation, and costs associated with installing electrical receptacles, network connections, and wireless networks are prohibiting factors of installing kiosks and digital signage devices and can greatly limit the scope of kiosk and digital signage device deployments. Thus, the present inventor has recognized a need for improved systems and methods for delivering power and data to battery operated devices, such as kiosks and signage devices, in a retail environment.

Automated battery and data delivery system


A computer readable storage medium has stored thereon a computer program having instructions, which, when executed by a computer, cause the computer to apply a first plurality of RF pulses during a first TR interval of an MR pulse sequence to generate a first echo train. A plurality of echoes of the first echo train are split into a plurality of echo pairs. Within a first echo space, first and second gradient pulses are applied during respective first and second generated echoes, and respective first and second sets of k-space data are acquired that correspond to respective first and second blades of k-space data in the same k-space. The first and second blades have orientations at different angles from one another. The instructions further cause the computer to reconstruct an image based on the acquired first and second sets of k-space data.

Embodiments of the invention relate generally to Fast Spin Echo (FSE) magnetic resonance (MR) imaging and, more particularly, to a system and method of split-echo, split-blade data collection for PROPELLER MR imaging.
When a substance such as human tissue is subjected to a uniform magnetic field (polarizing field B0), the individual magnetic moments of the spins in the tissue attempt to align with this polarizing field, but precess about it in random order at their characteristic Larmor frequency. If the substance, or tissue, is subjected to a magnetic field (excitation field B1) which is in the x-y plane and which is near the Larmor frequency, the net aligned moment, or "longitudinal magnetization", MZ, may be rotated, or "tipped", into the x-y plane to produce a net "transverse magnetization" Mt. A signal is emitted by the excited spins after the excitation signal B1 is terminated and this signal may be received and processed to form an image.
When utilizing these signals to produce images, magnetic field gradients (Gx, Gy, and Gz) are employed. Typically, the region to be imaged is scanned by a sequence of measurement cycles in which these gradients vary according to the particular localization method being used. The resulting set of received NMR signals are digitized and processed to reconstruct the image using one of many well known reconstruction techniques.
FSE imaging is an imaging technique commonly used as an efficient method of collecting MR data with minimal artifact. A FSE pulse sequence uses multiple refocusing RF pulses to generate an echo train after a single excitation RF pulse. Generally, FSE requires that the phase of all the refocusing RF pulses be substantially identical to that of the initial transverse magnetization after excitation, commonly referred to as the Carr-Purcell-Meiboom-Gill (CPMG) condition. If this condition is not met, the resulting MR signal is generally affected by destructive echo interference, resulting in unstable echo train and signal cancellation. Specifically, the signals of FSE echo train are from the contributions of a large number of so-called pathways. Under CPMG condition, the signals from different pathways reinforce one another thus the signal intensities of the later echoes are stably maintained. If the CPMG condition is violated, these signals from different pathways no longer line up and destructive interference occurs. Accordingly, the resulting signals will decay rapidly in successive echoes.
As a result, FSE imaging with diffusion weighted imaging (DWI) may be difficult, in general, since even minute patient motion or system vibration during application of diffusion weighting gradients leaves the spins with a spatially varying and unknown starting phase prior to refocusing RF pulse train. A number of imaging techniques have been developed that modulates the phase of the refocusing pulses to attempt to delay the echo signal decay. However, these known techniques have been shown to prolong the signal magnitude, but, in general, cause a spatially varying phase which alternates between even and odd echoes, which makes combining the two sets of echoes difficult.
FSE imaging has been implemented with PROPELLER (Periodically Rotated Overlapping Parallel Lines with Enhanced Reconstruction) technique to address the phase discrepancy among echo trains. PROPELLER encodes MR signals by collecting data during an echo train such that a rectangular strip, or "blade", through the center of k-space is measured. This strip is incrementally rotated in k-space about the origin in subsequent echo trains, thereby the phase inconsistency among blades can be corrected by using the overlapped data at central k-space. PROPELLER can mitigate the violation of CPMG condition by RF phase modulation combined with split-blade acquisition. However, for this type of techniques, the flip angle of refocusing RF pulses is preferred to be high enough to stabilize the echo train, which results in long scanning time at high field strength due to the limit of specific absorption rate (SAR). Also, the number of the acquired lines of each blade is just half of the echo train length, which is not desirable for PROPELLER reconstruction that requires wide blade width to avoid potential artifacts.
SPLICE PROPELLER is another imaging approach that can mitigate non-CPMG artifacts. SPLICE uses an imbalanced readout gradient and an extended acquisition window to split each echo in an echo train into an echo pair. Two k-space datasets have to be acquired simultaneously, and two intermediate PROPELLER images have to be reconstructed by separately using the first and second echoes in each echo pair. As such, SPLICE PROPELLER has the disadvantage of decreased data acquisition efficiency, due to the requirement of simultaneous acquisition of two k-space datasets.
It would therefore be desirable to have a system and method capable of acquiring split-echo split-blade data while mitigating non-CPMG artifacts. Specifically, it would be desirable to provide a FSE method that generate echo pairs to create two blades for each echo train, without the reduction of blade width to avoid the potential narrow-blade artifacts. Also, it would be desirable to place the two split blades into a single k-space such that the data acquisition efficiency is not sacrificed.

System and method for split-echo split-blade data collection for propeller magnetic resonance imaging


A method for preparation of highly porous and preferentially-oriented {100} platinum on a substrate by electrodeposition in a deposition bath, comprising using a deposition potential Edep lower than ERHE+150 mV and an acidified platinum salt solution having a Pt salt concentration less than 5.0 mmole L−1 or, in presence of hydrogen, comprising limiting the concentration of Pt salts in the electrolyte to less than 5.0 mmole L−1 and controlling the temperature of the electrolyte. Preferentially-oriented {100} platinum nanowires and thin films, comprising Pt{100} in a range between about 20 and about 60% and having a roughness factor of at least 50 are produced.

The electrochemical oxidation of ammonia and hydrazine has been studied for many years. Ammonia oxidation is important in the fabrication of electrochemical sensors for water and air analyses. In addition, ammonia is a common water pollutant in industrial wastewaters and in continental waters. Therefore, the development of an electrochemical method to convert ammonia into nitrogen would open up new possibilities in environmental electrochemistry. Likewise, hydrazine is important in numerous industrial applications, including metal plating and protection against corrosion to control concentrations of dissolved oxygen. It is also used in various rocket fuels and as a component in explosives. Hydrazine is highly toxic and its electrochemical detection is also of significant interest. Finally, the most recent developments in low-temperature fuel cell technology have shown nitrogen hydrides, ammonia, and hydrazine to be suitable candidates in the race for commercial, high-performance, portable fuel cells.
Several studies have been devoted to the electro-oxidation of ammonia and hydrazine on polycrystalline substrates. More recently, studies of ammonia and hydrazine oxidation on single-crystal metal surfaces have been reported, providing evidence that the electro-oxidation process of these small nitrogen hydride molecules is structure-sensitive. For example, in acidified solution, it was found that hydrazine adsorbs more readily on Pt (100) steps than on Pt (111) terraces. While it was shown that the basal planes of platinum and rhodium are much more active for hydrazine oxidation than the corresponding gold surfaces, it was also shown that the (100) plane was one of the most active planes of all three metals. In alkaline media, the electrocatalytic activity of basal planes increases in the order Pt(110)>Pt(100)>Pt(111). Likewise, in alkaline media, the electro-oxidation of ammonia on Pt occurs almost exclusively on surface sites with (100) symmetry.
Therefore, from a practical viewpoint, it would be highly desirable to prepare Pt electrodes that could exhibit both a high electrochemically active surface area and a preferentially-oriented {100} surface structure.
In the early 1970s, an electrochemical method was presented to obtain Pt electrode surfaces with preferred orientations from bulk polycrystalline platinum. The method is based on the use of repetitive potential sweeps at high frequency under carefully-selected potential perturbation conditions. Under the right conditions, the formation of preferentially-oriented {100} surfaces was achieved, but the roughness factor was low and does not exceed R=3. Under these conditions, while the intrinsic electrocatalytic activity (expressed as current per Pt surface atom) for the electro-oxidation of nitrogen hydrides might be high, the overall electrocatalytic activity (expressed as current per geometric surface area) will remain low as a result of the low roughness factor.
Several groups have focused on the use of preferentially-oriented {100} platinum particles to combine both a high intrinsic electrocatalytic activity and high electrochemically active surface area. These particles consist of Pt cubic nanoparticles synthesized in the form of colloidal platinum, using a capping agent (sodium polyacrylate) and hydrogen gas as a reducing agent. According to high-resolution transmission electron microscopy, these nanoparticles show flat surfaces with {100} facets, and the distances between the adjacent lattice fringes is the interplanar distance of Pt {200}. Pt nanoparticles prepared using the same method elsewhere have been shown to exhibit characteristic hydrogen adsorption/desorption peaks, CO-stripping peaks, as well as the characteristic response of irreversibly-adsorbed germanium on (100) sites of platinum. These oriented nanoparticles show higher current densities for the electro-oxidation of ammonia in alkaline media than polycrystalline Pt nanoparticles.
Colloidal methods using organic ligand stabilizers are one of the most commonly used methods to make shape-controlled particles. However, the organic ligand shells can be difficult to remove. Various methods have been devised for cleaning the nanoparticles, such as heating in different atmospheres or submitting the nanoparticle to electrochemical decontamination by surface oxidation. However, these methods could produce a change in the surface structure. It was shown that modification of the surface structure may be limited if electrochemical decontamination is performed under the right conditions, and residual surfactant molecules were still present, causing an incomplete deposition of the Pt nanoparticles (floating) on the surface of the substrate. From a more pragmatic point of view, the preparation of an electrode from an assembly of such nanoparticles is also challenging.
It was shown recently that electrodeposition might be used to prepare metallic particles of various shapes. For example, it was demonstrated that granular Cr nanoparticles or hexagonal microrods could be obtained depending on the deposition conditions, and the synthesis of tetrahexahedral Pd nanocrystals with high Miller Index facets was demonstrated using a pulse electrodeposition method. Likewise, it was shown recently that Pt nanowire with preferentially-oriented {100} surfaces could be prepared through template-assisted deposition, using an anodic aluminum oxide (AAO) membrane.
The present description refers to a number of documents, the content of which is herein incorporated by reference in their entirety.

Method and system for preparation of highly porous and preferentially-oriented {100} platinum nanowires and thin films

INSTITUT NATIONAL DE LA RECHERCHE SCIENTIFIQUE


A hat connecting sunglass retention clip is provided having a curved inner surface, a spring urged clamp for frictionally impinging to the hat inner sidewall, and a pair of retaining spikes that both impinge against the hat outer sidewall as well as form upper and lower retention walls for securing the eyeglass arms thereto.

1. Field of the Invention
The present invention relates generally to a sunglass retention clip(s) and, more particularly, to a sunglass retention clip having a curved inner surface, a spring urged clamping means for frictionally impinging to the hat inner sidewall, and a pair of retaining spikes that both impinge against the hat outer sidewall as well as form upper and lower retention walls for securing the eyeglass arms thereto.
2. Description of the Related Art
Although a number of methods exist for retaining eyeglasses of all varieties, including but not limited to sunglasses, safety glasses or the like (collectively "eyeglasses"), they may require an alteration of the hat or cap or require the user to slide the ear piece of the glasses into a holder. Such holders generally protrude into the inner volume of the hat wearing area, thereby forming an uncomfortable impingement between the hat and the user's head. Also, such devices either fail to provide optimal retention friction to the hat, the eyeglass holding arms, or both. Further, they are made from unacceptable materials and/or they are non uniform in shape. As such, the current art will not work with all styles of ear pieces, whether they are manufactured from metal or plastic.
A search of the prior art did not disclose any patents that read directly on the claims of the instant invention; however, the following references were considered related.
U.S. Pat. No. 6,668,426, issued in the name of Morris, discloses safety glasses holders and eye glass holder for securing to hats or fabric comprising a fixed fastener design, wherein said fastener design has a broad Y-shaped insertion point, a rigid or resilient serrated tooth or ratchet type interference eyeglass holder mechanism and a narrowing U-shaped body similar to the shape of an eyeglass arm and fastening design which allows the fastener to either be sewn into or glued onto the hat for holding the arm of a pair of eye glasses, sun glasses or safety glasses.
U.S. Pat. D571,982, issued in the name of Kirby, discloses an ornamental design for a hat.
U.S. Pat. No. 6,792,619, issued in the name of Morris et al., discloses an implement holder to be attached to a cap, hat, clothing or other item is provided. The holder is a single unit, which can be integrated into the construction of the cap, hat, clothing or other item or removably attached to the outer surface of the article. The two sides of the unit are attached and form a loop for receiving a pencil, pen or other elongated implement. The unit additionally contains an adjustable flap for receiving the temple of eyewear, including glasses, sunglasses, or protective eye gear. The outer side of the unit is smooth and is designed to receive identifying or advertising indicia.
U.S. Pat. No. 6,298,495, issued in the name of Totani, discloses a hat with an insertion hole adapted to permit a temple of a pair of glasses to be inserted therein, positioned in each lateral side of the edge portion of the crown of a hat. The hat is so formed as to permit the temples of the glasses to be positioned between the crown and the slip band that is provided along the inner surface of the edge portion of the crown.
U.S. Pat. No. 6,637,074, issued in the name of Morris, discloses safety glasses holders and eye glass holders for securing to hats or fabric comprising a clip on design and a fastening design, wherein said clip design has an adjustable height design and fastening design which allows the clip to either be temporarily attached to a hat by way of the clip or sewn into the hat and/or comprises a frame secured to the insides of a hat with pins attached to and extending from said frame and penetrating said hat to attach to and engage the adjustable height clip for holding the arm of a pair of safety glasses.
U.S. Pat. No. 7,275,270, issued in the name of Cotutsca, discloses a utility holder assembly for securely holding articles such as eyewear and the like, small tools and accessories such as screwdrivers, flash lights, pliers, and the like, and writing utensils such as pencils, pens and the like to the sides of various types and styles of headwear. The utility holder assembly may be mounted on the outside surface or the inside surface of the headwear to accommodate easy insertion of an article for temporary storage. The holder may include a gripping mechanism such as hook and loop fasteners, a ductile layer, or a ductile member, such that the holder may be configured to conform to the shape of the article to more securely retain the article within the holder.
U.S. Pat. No. 6,644,807, issued in the name of Hood, discloses a pair of eyeglass temple holders attached to opposite sides of a hat, a baseball cap and other types of headwear. The temple holders are releasably attached to ends of a pair of temples attached to a pair of eyeglasses, which eliminate the need of placing the ends of the temples on top of a wearer's ears. Each of the pair of eyeglass temple holders includes an elastic strap with a rear end of the strap attached to a rear of one side of the headwear. A front end of the elastic strap is attached to a temple fastener. The temple fastener is used for releasably engaging an end of a temple, which is part of a pair of eyeglasses. The temple fastener, in one embodiment, can be hollow plastic tube with one end inserted in a press fit into the end of the temple. The temple end fastener, in additional embodiments, can be hook and loop fasteners or a metal snap with a post received in a hole in the end of the temple. The elastic straps of the temple holders allows the eyeglasses to be moved from a resting position next to the sides and front of the headwear to a position in front of the wearer's eyes.
U.S. Pat. No. 6,481,059, issued in the name of Morris, discloses safety glasses holders and eye glass holders for securing to hats or fabric comprising a wedge shaped design, a clip on design and a fastening design, wherein said fastening design comprises a frame secured to the insides of a hat, a first and second elastic cord or pin penetrating said hat and secured to said frame, and a strip disposed between said first and second elastic cords or pins for holding the arm of a pair of safety glasses.
U.S. Pat. No. 6,935,742, issued in the name of Wilson, Sr., discloses a strap that has two hooks placed on the ends and a curved clip in the center of the strap. The strap is elastic so that it holds onto a hat brim firmly. Once in place, the strap stays on the brim until it is needed. Because there is no large clip, the strap can be used on sun visors as well as hats. To store eye ware, the user places the eye ware on the brim and flips the curved clip over the bridge of the glasses. To release the glasses; the user simply flips the curved hook back, thereby releasing the glasses. Moreover, the user can easily remove the strap when it is not needed. Thus, the device does not permanently alter the look of the hat. Finally, because the device hooks onto the brim, it does not alter the feel of the hat when worn.
United States Patent Application Publication 2007/0220656, filed in the name of Cotutsca, discloses a utility holder assembly for securely holding articles such as eyewear and the like, small tools and accessories such as screwdrivers, flash lights, pliers, and the like, and writing utensils such as pencils, pens and the like to the sides of various types and styles of headwear. The utility holder assembly may be mounted on the outside surface or the inside surface of the headwear to accommodate easy insertion of an article for temporary storage. The holder may include a gripping mechanism such as hook and loop fasteners, a ductile layer, or a ductile member, such that the holder may be configured to conform to the shape of the article to more securely retain the article within the holder. The utility holder may also hold an article securely when the headwear is removed.
While the capacity to accept and retain the support arms of eyeglasses are incorporated into this invention in combination, other elements are different enough as to make the combination distinguished over the inventors' own prior art.
Consequently, there is a need in the art for an improved clip design that provides an attachment clip having a curved inner surface, a spring urged clamping means for frictionally impinge to the hat inner sidewall, and a pair of retaining spikes that both impinge against the hat outer sidewall as well as form upper and lower retention walls for securing the eyeglass arms thereto.

Hat connecting sunglass retention clip(s)


To obtain water-dispersible varnish used in an alternative refrigerant/refrigerating machine oil refrigerant system or a natural refrigerant/refrigerating machine oil refrigerant system, the water-dispersible varnish being capable of solving two problems, namely, reducing the volatile components and the like during thermal curing and resistance of the cured varnish to the refrigerant system,

There are electric compressors mounted on refrigeration and air-conditioning apparatuses, such as refrigerators and air conditioners, with structures illustrated in FIGS. 1 and 2. FIG. 1 is a schematic explanatory diagram (schematic diagram of a longitudinal section) illustrating an embodiment of an electric compressor mounted on a refrigeration and air-conditioning apparatus. FIG. 2 is a partial schematic explanatory diagram illustrating a stator of a motor component in FIG. 1, in which FIG. 1A is a plan view and FIG. 1B is a side view partially showing a cross sectional view. Note that in FIGS. 1 and 2, a hermetic electric compressor is shown as an embodiment of an electric compressor mounted on a refrigeration and air-conditioning apparatus.
A motor component 2, a compression component 3 that is driven by the motor component 2, and other components are provided in a hermetic vessel 1. Further, refrigerating machine oil 4 is retained in the bottom portion of the hermetic vessel 1.
The motor component 2 includes a stator 21 and a rotor 22. An outer circumference of the stator 21 is fixed to the hermetic vessel 1. A magnet wire 6 provided in the stator 21 is connected to a sealed power terminal 7 provided in the hermetic vessel 1, and is supplied with power from a power source (not shown). The rotor 22 is supported so as to maintain a constant gap with an inner circumference of the stator 21, and is connected to the compression component 3 with the crankshaft 5.
As illustrated in FIG. 2, the stator 21 includes a core 8, the magnet wire 6, an insulating film 10, and a binding thread 11. The core 8 is a cylindrical laminate of iron plates. The magnet wire 6 is arranged so as to pass through a plurality of slots 9 that are formed in the axis direction in the core 8. Further, the magnet wire 6 is bound together with the binding thread 11. Furthermore, impregnation is applied to the magnet wire 6 with impregnating varnish 12 in order to improve its insulation performance.
The insulating film 10 is provided between the core 8 and the magnet wire 6, and between the layers of the magnet wire 6.
Conventional impregnating varnishes used in the impregnation of the magnet wire 6 include solventless varnish, such as polyester resins that include an aromatic olefin compound, represented by styrene, as a reactive diluent; epoxy resin based solvent varnish; and epoxy resin based solventless varnish. When impregnation is applied to the magnet wire 6 with such solventless varnish or solvent varnish, a large amount of solvent or volatile components of the reactive diluent volatilize during thermal curing. Accordingly, from the viewpoint of reducing environmental load, the amount of volatile components and the like volatilizing during thermal curing needs to be reduced.
Incidentally, refrigeration and air-conditioning apparatuses conventionally use chlorofluorocarbon refrigerants such as dichlorodifluoromethane (R-12) and hydrochlorofluorocarbon refrigerants such as monochlorodifluoromethane (R-22) (hereinafter, these refrigerants are referred to as "conventional refrigerants"). When conventional refrigerants are used in refrigeration and air-conditioning apparatuses, mineral oil based or alkylbenzenic based refrigerating machine oil or the like (hereinafter, referred to as "conventional refrigerating machine oil") with low polarity are typically used.
Furthermore, from the viewpoint of preventing depletion of the ozone layer, hydrofluorocarbon refrigerants such as 1,1,1,2-tetrafluoroethane (R-134a) that does not contain any chlorine atom in its molecules (hereinafter, may also be referred to as "alternative refrigerant") are used in refrigeration and air-conditioning apparatuses. Hydrofluorocarbon refrigerants are refrigerants with zero ozone depleting potential. When the alternative refrigerant is used in a refrigeration and air-conditioning apparatus, refrigerating machine oil based on polyalkylene glycol, ester, or ether (hereinafter, referred to as "alternative refrigerating machine oil") that have high polarity and high compatibility with the alternative refrigerant is used.
Additionally, in recent years, from the viewpoint of preventing global warming, refrigerants are being replaced to natural refrigerants such as CO2, propane, or the like, since hydrofluorocarbon refrigerants has a large GWP (Global Warming Potential), which is the magnitude of influence on the global temperature rise. Alternative refrigerating machine oil with high polarity is also employed when a natural refrigerant is used in a refrigeration and air-conditioning apparatus.
That is, the cured varnish (impregnating varnish after thermal curing) in the hermetic vessel 1 is in an environment with a high-temperature high-pressure refrigerant system, the refrigerant system such as a conventional refrigerant/refrigerating machine oil, alternative refrigerant/refrigerating machine oil, or natural refrigerant/refrigerating machine oil. In addition, since refrigerant systems such as alternative refrigerant/alternative refrigerating machine oil and natural refrigerant/alternative refrigerating machine oil have higher polarity compared to that of the conventional refrigerant/refrigerating machine oil, when an alternative refrigerant or a natural refrigerant is used in a refrigeration and air-conditioning apparatus, degradation of the cured varnish and dissolving from the cured varnish into the refrigerant system occur. In particular, the extractability from the cured varnish is high when CO2 is used as the refrigerant.
At this time, when the impregnating varnish includes components with low polarity, the compatibility between the extract that is extracted (dissolved) from the cured varnish and the refrigerating machine oil is low. Thus, substances with low molecular weight or the like is educed and is accumulated as sludge in an expansion unit, such as a capillary tube and an expansion valve, in the refrigeration and air-conditioning cycle, resulting in clogging of the expansion unit after operating for a long period of time. Accordingly, the impregnating varnish needs to have excellent resistance to the refrigerant system, such as little deterioration suppressing deterioration of mechanical strength, low extractability to the refrigerant system, and the like.
To overcome the above problems, a known impregnating varnish has been presented. For example, "an aqueous epoxy resin emulsion containing the following dissolved and/or dispersed in water: A) at least one binder selected from a group consisting of epoxy resins and modified epoxy resins; B) at least one polyurethane-based associative thickener; and C) at least one catalyst for curing that can be produced by allowing at least one boron trifluoride complex to react with at least one compound having at least one epoxy group" (see, Patent Literature 1, for example). The known impregnating varnish disclosed in Patent Literature 1, for example, aims to reduce volatile components and the like that volatiles during thermal curing.

Abstract: wherein the water-dispersible varnish has a specific thermosetting resin as base polymer, a specific vinyl monomer as reactive diluent, organic peroxide as reaction initiator, and water mixed therein.


When an area in a first image is specified, an amounts of characteristics of image data included in the area and a neighboring area are detected and it is determined based on the amount of the characteristics whether or not a notification display indicating that the area is likely not to be a target area needs to be presented. If it is determined that the notification display needs to be displayed, a notification image that enables the area to be identified is generated for the first image and is combined with a second image to generate a composite image and the composite image is displayed on a display unit. On the other hand, if it is determined that the specified area is likely to be a target area, the second image based on the image data included in the area is displayed over the full screen of the display unit.

1. Field of the Invention
The present invention relates to an image display apparatus for displaying an image and a control method of the image display apparatus and, in particular, to a technique for extracting and displaying an area from an image.
2. Description of the Related Art
Techniques for extracting an area from an input image and displaying the area on a display screen have been put into practical use. Japanese Patent Laid-Open No. 05-337077 proposes such a display apparatus.
A problem with the technique disclosed in Japanese Patent Laid-Open No. 05-337077 will be described below. The technique disclosed in Japanese Patent Laid-Open No. 05-337077 extracts and enlarges a desired area from an input original image and displays the area as a main window. A sub-window displaying the original image is displayed in a portion of the main window so that the original image (sub-window) is superimposed on the image extracted and enlarged from the original image. The technique in Japanese Patent Laid-Open No. 05-337077 displays the sub-window all the time while the area extracted and enlarged from the input original image is displayed as the main window, regardless of whatever is contained in the main window. This is because the sub-window displaying the original image is superimposed on the image of the extracted area in order to enable an operator to readily identify which portion of the original image corresponds to the area extracted and enlarged from the original image. Accordingly, even when the enlarged image displayed in the main window is of interest to the operator and the operator can perform manipulations on the display of the main window alone without any difficulty, a portion of the main window is always occupied by the sub-window displaying the original image. Therefore, there is a problem that the overall main window enlarged cannot completely be viewed because the sub-window interferes with viewing of the image in the main window.

Image display apparatus and control method thereof


In a chip package, semiconductor dies in a vertical stack of semiconductor dies or chips (which is referred to as a ‘plank stack’) are separated by a mechanical spacer (such as a filler material or an adhesive). Moreover, the chip package includes a substrate at a right angle to the plank stack, which is electrically coupled to the semiconductor dies along an edge of the plank stack. In particular, electrical pads proximate to a surface of the substrate (which are along a stacking direction of the plank stack) are electrically coupled to pads that are proximate to edges of the semiconductor dies by an intervening conductive material, such as: solder, stud bumps, plated traces, wire bonds, spring connectors, a conductive adhesive and/or an anisotropic conducting film. Note that the chip package may facilitate high-bandwidth communication of signals between the semiconductor dies and the substrate.

1. Field
The present disclosure generally relates to the design of chip packages. More specifically, the present disclosure relates to a chip package that includes a group of semiconductor dies arranged in a plank stack and a substrate oriented at a right angle relative to the plank stack, and which communicates with the semiconductor dies.
2. Related Art
Chip packages that include stacked semiconductor chips can provide significantly higher performance in comparison to conventional individually packaged chips that are connected to a printed circuit board. These chip packages also provide certain advantages, such as the ability: to use different processes to fabricate different chips in the stack, to combine higher density logic and memory, and to transfer data using less power. For example, a stack of chips that implements a dynamic random access memory (DRAM) can use a high metal-layer-count, high-performance logic process in a base chip to implement input/output (I/O) and controller functions, and a set of lower metal-layer-count, DRAM-specialized processed chips can be used for the rest of the stack. In this way, the combined set of chips may have better performance and lower cost than: a single chip that includes the I/O and controller functions manufactured using the DRAM process; a single chip that includes memory circuits manufactured using a logic process; or a system constructed by attempting to use a single process to make both logic and memory physical structures.
It can, however, be difficult to obtain low-cost, high-performance (e.g., high-bandwidth) interconnections between the stacked chips. For example, the chips can be electrically coupled using wire bonds between exposed bond pads on surfaces in a stack of chips in which the chips are offset from one another to define a staircase of chip edges. But while these wire bonds can be implemented using low-cost assembly techniques, the resulting wire bonds typically have a low bandwidth.
In contrast, TSVs typically have a higher bandwidth than wire bonds. In a TSV fabrication technique, chips are processed so that one or more of the metal layers on their active face are conductively connected to new pads on their back face. Then, chips are adhesively connected in a stack, so that the new pads on the back face of one chip make conductive contact with corresponding pads on the active face of an adjacent chip.
However, TSVs typically have a higher cost than wire bonds. This is because TSVs pass through the active silicon layer of a chip. As a consequence, a TSV occupies area that could have been used for transistors or wiring. This opportunity cost can be large. For example, if the TSV exclusion or keep-out diameter is 20 μm, and TSVs are placed on a 30-μm pitch, then approximately 45% of the silicon area is consumed by the TSVs. This roughly doubles the cost per area for any circuits in the chips in the stack. (In fact, the overhead is likely to be even larger because circuits are typically spread out to accommodate TSVs, which wastes more area.) Furthermore, fabricating TSVs usually entails additional processing operations and yield loss, which also increase cost. In addition, TSVs typically limit the number of stacked semiconductor dies and usually present a significant challenge for thermal management when a large number of semiconductor dies are stacked.
Hence, what is needed is a chip package that offers the advantages of stacked semiconductor dies without the problems described above.

Chip package with plank stack of semiconductor dies