A semiconductor integrated device includes a first insulating film 407 formed on any one of a conductive layer 406 and an interlayer insulating film 405, a first layer pad 408 which is in a two-layer pad and which is formed on the first insulating film 407, a third insulating film 413 deposited on both of the first insulating film 407 and the first layer pad 408 of the two-layer pad, a conductive plug 411 which is arranged to connect upper and lower pads of the two-layer pad and which is formed in the third insulating film 413, a second layer pad 401 which is in the two-layer pad and which is formed on the third insulating film 413, a second insulating film 409 which is formed on any one of the conductive layer 406 and the interlayer insulating film 405 and which has a film thickness greater than that of the first insulating film 407, and a single-layer pad 421 formed on the second insulating film 409. The single-layer pad is used at the time of a wafer test, and the second layer pad of the two-layer pad is used at the time of wire bonding.

1. Field of the Invention
The present invention relates to a semiconductor integrated device. In particular, the present invention relates to a semiconductor integrated device in which damage to circuits under pads at the time of wafer test and the occurrence rate of cracks in circuits under pads are reduced without detriment to wire bonding characteristics.
2. Description of the Prior Art
In recent years, it has been well known that information electronic equipment comprises semiconductor integrated devices which contain transistors. As shown in FIG. 1, a semiconductor chip 101 of the semiconductor integrated device has an internal circuit area 102 which contains transistors, and I/O buffers 103 on the periphery of the semiconductor chip 101. The I/O buffers 103 are configured to connect the internal circuit area 102 and external devices. The semiconductor chip 101 further has pads 104 connected to the I/O buffers 103 by interconnection lines 105. In particular, in the case where the semiconductor chip 101 is large in size, the semiconductor chip 101 has many I/O buffers 103.
Moreover, in a semiconductor integrated device of this type, it has been also known that the manufacturing yield of the semiconductor integrated device is improved by reducing the area occupied by a chip. Specifically, as shown in FIG. 2, in a semiconductor chip 201 of this type, pads 204 are arranged in I/O buffers 203 in order to reduce the area occupied by a chip.
Moreover, it has been also publicly known that a two-metal-layer structure is adopted as the structure of the pad 204. The pad 204 has a multilayer structure in upper and lower sides of which have two ore more layers of conductive films which are connected by a plurality of conductive plugs. Such a conductive pad having two or more layers in upper and lower sides therein is disclosed in, for example, Japanese Patent Laid-Open Publication No. 2001-358169.
FIG. 3A depicts a plan view of an I/O buffer 300 containing the conventional pad of the above described structure. FIG. 3B depicts a cross-sectional view taken along the line Ixe2x80x94I in FIG. 3A.
The conventional I/O buffer 300 has a semiconductor substrate 304 and a semiconductor device 312 formed on the semiconductor substrate 304. The conventional I/O buffer 300 further has insulating films (305-1, 305-2, and 307) in a plurality of layers and conductive films (306-1 and 306-2) in a plurality of layers, both of which are formed on the semiconductor device 312.
Furthermore, the conventional I/O buffer 300 has a pad 314 comprising a conductive pad 301 in an upper layer, a conductive pad 308 in a lower layer, and conductive plugs 311 which connect the conductive pads (301 and 308) in the upper and lower two layers. Moreover, the conventional I/O buffer 300 has an insulating film 309 disposed in the uppermost layer.
Here, in the plan view of FIG. 3A, the conductive plugs 311 are depicted as if they can be seen, for convenience of explanation, though they cannot be seen due to the conductive pad 301 actually. Moreover, the conductive films (306-1 and 306-2) are also depicted as if they can be seen, for convenience of explanation.
In the pad 314, the conductive pad 308 in the lower layer is formed on an interlayer insulating film 307, and furthermore, the conductive pad 301 in the upper layer is formed thereon with an interlayer insulating film 309 interposed therebetween. An interconnection line 308a to be connected to an internal circuit is led from the conductive pad 308 in the lower layer. The conductive pad 308 in the lower layer and the conductive pad 301 in the upper layer are connected by the plurality of conductive plugs 311. Here, the conductive plugs 311 are arranged in the form of a square grid over the entire surfaces of the conductive pads at the minimum spacing specified by a design standard, or at approximately the minimum spacing.
Note that technologies for arranging conductive pads in a plurality of layers and connecting the conductive pads using conductive plugs have been publicly known by, for example, Japanese Patent Laid-Open Publication No. 2000-114309 and the like.
In the conventional semiconductor chip 201 described above, after a manufacturing process in a wafer state has been completed, the pads 314 are explored with probes for testing. Moreover, after the semiconductor chip 201 has been separated into each individual chip and die-bonded to an island of a package, wires are bonded to the pads 314. Probing is performed on the pads obliquely from above. Further, at the time of wire bonding, ultrasonic vibration is applied to a tool.
However, in the pad structure of FIG. 3A, cracks are apt to occur under the pads due to stress during probing or wire bonding. A wafer test and wire bonding with these pads 314 having a two-metal-layer structure cause considerable damage to conductive films, insulating films, and circuit devices arranged under the pads. On the other hand, if a single-metal-layer structure is adopted in order to avoid damage, pads tend to be peeled off. This causes deterioration in bonding characteristics.
Accordingly, an object of the present invention is to provide a semiconductor integrated device in which damage to circuits under pads at the time of a wafer test and the occurrence rate of cracks in circuits under pads can be reduced without detriment to wire bonding characteristics in a layout structure in which circuits exist under pads (such a layout structure is referred to as xe2x80x9cCircuit Under Padxe2x80x9d and hereinafter abbreviated to CUP).
A semiconductor integrated device of the present invention includes a first insulating film and a second insulating film formed on any one of a conductive layer and an interlayer insulating film, a lower layer pad of a two-layer pad formed on the first insulating film, a third insulating film deposited on both of the first insulating film and the lower layer pad of the two-layer pad, a conductive plug which to connects upper and lower pads of the two-layer pad and which is formed in the third insulating film, a upper layer pad which is in the two-layer pad and which is formed on the third insulating film, a second insulating film which is formed on any one of the conductive layer and the interlayer insulating film and which has a film thickness greater than that of the first insulating film, and a single-layer pad formed on the second insulating film.
The single-layer pad is bonded without a bonding wire, and the second layer pad of the two-layer pad is bonded with the bonding wire.


Methods and systems are provided for monitoring an aircraft. An exemplary method involves capturing, by a computing system at a ground location, a flight tracking image associated with the aircraft that is displayed on a first display device at the ground location, and communicating the captured flight tracking image to the aircraft for display on a second display device onboard the aircraft.

Airlines and other aircraft operators utilize various personnel on the ground to monitor and provide weather, air traffic, and other relevant information to pilots that supplements the information provided to pilots via air traffic control, automatic terminal information service (ATIS), onboard instrumentation, and the like. For example, ground personnel may track the flight of an aircraft while concurrently monitoring weather (e.g., using Doppler radar or the like), and notify the pilot of the aircraft prior to the aircraft encountering an impending weather hazard. In this situation, the ground personnel may communicate a data link message to the pilot that describes the upcoming weather or suggests an alternative route (e.g., a different flight path, flight level, destination, or the like) to avoid the weather. However, the pilot is often deprived of the ability to independently analyze the information being relied on by the ground personnel, and therefore, lacks situational awareness when determining how to proceed with operating the aircraft.

Aircraft monitoring with improved situational awareness


Agents for lightening keratinic fibers, which include, based on their weight, 20 to 75% by weight of oil(s), 0.05 to 5% by weight of polymer(s) from the group of ethylene/propylene/styrene copolymers and/or butylene/ethylene/styrene copolymers and/or butylene/propylene/styrene copolymers, and 1 to 70% by weight of peroxydisulfate(s), whereby the weight ratio of sodium peroxydisulfate in the agent to the total amount of peroxydisulfates in the agent is at least 0.2, possess increased storage stability, the improvement being not only in physical stability (sedimentation, phase separation) but also in chemical stability (degradation of the persalts). There are also improvements in product yield, spreadability of the application mixture, and the bleaching effect.

The oxidizing agents present in bleaching agents are capable of lightening hair fiber by the oxidative breakdown of the hair's own pigment, melanin. For a moderate bleaching effect, the use of hydrogen peroxide as the sole oxidizing agent is sufficient, optionally with the use of ammonia or other alkalizing agents; a mixture of hydrogen peroxide and peroxydisulfate salts and/or peroxymonosulfate salts is typically used to achieve a greater bleaching effect.
For reasons of stability, commercial bleaching agents are customarily offered in two preparations packaged separate from one another, which are mixed immediately before use to form a finished application preparation. Commercial bleaching agents typically consist of a liquid oxidizing agent preparation and a powder including solid oxidizing agents. Alternatively, instead of the powder, pasty agents can be mixed with a liquid oxidizing agent preparation, as a result of which the problem of dust during the production and during mixing is prevented. Products with other components are also offered commercially.
Pasty bleaching agents usually include higher amounts of an inert oil, which can lead to stability problems (sedimentation of the solid oxidizing agents out of the oil). Even with peroxydisulfates that have not sedimented completely, a concentration gradient can occur within the packaging, so that different portions from the packaging after being mixed can produce a different lightening effect. A high viscosity is desirable to minimize these problems.
On the other hand, the viscosity of the bleaching paste must be so low that it can be mixed well and rapidly with the liquid oxidizing agent preparation. The resulting bleaching mixture must be sufficiently liquid, moreover, in order to the applied easily and uniformly, but viscous enough in order not to drip off the head or from application aids such as brushes. In addition, the resulting bleaching mixture should not separate, because sedimentation or phase separation is perceived by customers as a quality defect.
WO 2009/134875 A1 describes bleaching agents including persulfate salts and an oil gel, which in turn consists of oil(s) and specific polymers.
According to this invention, stability with respect to sedimentation and phase separation are cited as desirable properties of the agent.
EP 1 034 777 A1 discloses agents for lightening keratinic fibers, which include at least two preparations (A) and (B) packaged separate from one another, which are mixed immediately before use to form an application mixture, whereby preparations (A) are oil-based and include polymer(s), which form oelogels or lipogels.
The bleaching pastes disclosed in the state of the art are notable for low foaming of the application mixture. It has now been found that because of the rather large surface area of the application mixture, foaming can be quite desirable, because the product yield, spreadability of the application mixture, and the bleaching effect can be improved.
It is therefore desirable to improve further the properties of bleaching agents; in this case, on the one hand, the storage stability is to be increased, whereby not only the physical stability (sedimentation, phase separation) but also the chemical stability (decomposition of the persalts) are to be improved. Moreover, in particular the product yield, distributability of the application mixture, and the bleaching effect should be improved.
Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this

This patent is subject to a terminal disclaimer.


Method for mounting a gradient coil in a cylindrical magnet of a magnetic resonance system and associated magnetic resonance system, wherein the exterior of the gradient coil is foam-bonded flat against the inner wall of the magnet at least in sections, at least one element being foamed in place during mounting, thus creating at least one continuous channel, said channel being used for the insertion of a cutting and/or separating tool for ripping open the foam bond between the gradient coil and the cylindrical magnet.

When mounting gradient coils in cylindrical magnets of magnetic resonance systems, it may sometimes be beneficial to bond the exterior of the gradient coil as flat as possible, at least in sections, to the inner wall of the magnet, in order thus to suppress vibrations and noise. As noise in the form of airborne sound can escape from the resulting gap between the gradient coil and the magnet cylinder, it is advantageous to seal this gap either partially or even completely. To this end, isolated attempts have been made to cast the gradient coil in place by means of an epoxy casting compound or to foam it in place using construction foam.
However, the problem with using an epoxy casting compound or construction foam is that it is then virtually impossible to replace the gradient coil in the event of a fault or, for example, after ingress of water into the equipment.
However, if the gradient coil is only wedged into the magnet bore or supported on special bearing blocks not connected to the magnet, on the one hand too much space is required, while on the other hand the sealing of the gap between the gradient coil and the cylindrical magnet, or more specifically the bonding of the exterior of the gradient coil flat to the inner wall of the magnet, is not achieved, with the result that vibrations and noise are not suppressed.
DE 102 48 499 A1 discloses a magnetic resonance tomography equipment with a nondestructively releasable adhesive bond between equipment components. There the gradient coil is likewise fixed in the cylindrical magnet by an all-round foam layer. If the gradient coil is removed, after the foam layer has been e.g. sawn open, with the equipment described in the cited document any remaining foam or filling compound residues can be easily removed due to the fact that a separating layer is provided which is disposed on their boundary layer to a foamed-in equipment component. This separating layer constitutes to some extent a nominal fracture point which allows easy detachment of the filling compound residues after the part to be separated has been released or dismantled, thereby obviating the need for time-consuming cleaning of the surface.


A transmission device includes reference signal generator (204) generates a transmission instruction for DMRS or SRS produced by base station (100), and an RS that corresponds to a transmission instruction in the DMRS and SRS on the basis of identification information of an RS pattern used in the DMRS and SRS and set in base station (100). Transmission signal formation unit (207) maps the generated RS to a time frequency resource. The RS pattern of the DMRS and the RS pattern of the SRS have a relationship in which the RS pattern of the SRS is obtained by adding the length of a CS series/4 to the cyclic shift amount, which is an element of the CS series pattern, in the RS pattern of the DMRS, and inverting the identification information of a first Walsh series or a second Walsh series, which are constituent elements of an OCC pattern.

The release 10 (Rel.10) standard in 3GPP LTE-Advanced (3rd generation partnership project long-term evolution-advanced, hereinafter simply referred to as "LTE-A") uses SU-MIMO (single user-multi input multi output) using up to four antenna ports in uplink data transmission. The system throughput can thereby be improved. A demodulation reference signal (DMRS) is also transmitted in the uplink. A cyclic shift sequence (CS sequence) which is an orthogonal sequence and a Walsh sequence (orthogonal cover code, OCC) are used as the demodulation reference signal (see FIG. 1). Inter-sequence interference can be reduced in this way. Here, a terminal generates a transmission sequence used by the terminal by applying to a basic sequence, a cyclic shift corresponding to one of cyclic shift values 0 to 7 (that is, indicated with 3 bits) reported from a base station. A cyclic shift value is represented by "cyclic shift (CS) number "0 to 11"×symbol length/12." In this way, orthogonality among cyclic shift sequences can be secured. As OCC, two OCCs: w1=[1 1] and w2=[1 −1] having orthogonality are provided. Two pilot signals located in one subframe are multiplied by w1=[1 1] or w2=[1 −1]. A Zadoff-Chu sequence is used as a basic sequence in the LTE standard.
FIG. 2 shows a table of demodulation reference signals defined in the Rel.10 standard. In FIG. 2, four antenna port identification numbers, cyclic shift values and identification information of a Walsh sequence (that is, w1 or w2) corresponding to each antenna port identification number are associated with each other regarding each of eight demodulation reference signal candidates. When the base station assigns demodulation reference signal candidates to a terminal, the base station indicates identification information of the demodulation reference signal candidate (3 bits) to an assignment target terminal via a PDCCH (physical downlink control channel) (see Non-Patent Literature 1).
In FIG. 2, antenna ports 40, 41, 42 and 43 mean antenna ports #0, #1, #2 and #3 when four antenna ports are used. Antenna ports 20 and 21 mean antenna ports #0 and #1 when two antenna ports are used. Although antenna port 10 is not shown in FIG. 2, antenna port 10 is located on the same column on which antenna ports 40 and 20 are located.
As is obvious from FIG. 2, an offset pattern (hereinafter simply referred to as "offset pattern") regarding offset values of cyclic shift values with respect to a second antenna port (#1), a third antenna port (#2) and a fourth antenna port (#3) from a cyclic shift amount corresponding to a first antenna port (#0) is fixed. That is, in the case of four antenna ports (that is, in the case of 4-antenna MIMO transmission), the offset pattern is "0, 6, 3, 9." That is, CS intervals among antenna ports are designed to be maximum in both cases of 2-antenna MIMO and 4-antenna MIMO. For example, when the number of antenna ports used for DMRS transmission is 2, the amount of offset of CS numbers is "0, 6" and the CS interval becomes a "symbol length/2." On the other hand, when the number of antenna ports used for DMRS transmission is 4, the amount of offset of CS numbers is "0, 6, 3, 9" and the CS interval becomes a "symbol length/4."
According to the Rel.10 standard, when the number of antenna ports used for DMRS transmission is 2, DMRS is orthogonalized by only a CS sequence. For example, for one DMRS, OCC numbers are common to two antenna ports and only one of w1 and w2 is applied. Furthermore, according to the Rel.10 standard, when the number of antenna ports is three or more, OCCs differing from one antenna port to another may be applied for one DMRS. This is because, when the number of antenna ports used for DMRS transmission is two, only the CS sequence is sufficient, whereas when the number of antenna ports used for DMRS transmission is three or more, the CS interval cannot always be said to be sufficient for orthogonalization by only the CS sequence. For this reason, when the number of antenna ports used for DMRS transmission is three or more, orthogonality is improved through orthogonalization by OCC in addition to the CS sequence (see Non-Patent Literature 3). In FIG. 2, for half of the demodulation reference signal candidate group (3-bit indication is '000', '010', '001' and '111'), OCC identification information is common regarding antenna ports #0 and #1, and OCC identification information differs regarding antenna ports #2 and #3. For the remaining half (3-bit indication is '100', '011', '101' and '110'), OCC identification information is common to all antenna ports #0, #1, #2 and #3.
As described above, a pair of a "CS pattern candidate" and an "OCC pattern candidate" are associated with each of eight RS pattern candidates in the DMRS reference signal (RS) pattern table shown in FIG. 2. The term "CS pattern candidate" is defined by four antenna port identification numbers and a cyclic shift value (or CS number) corresponding to each antenna port identification number. On the other hand, the "OCC pattern candidate" is defined by four antenna port identification numbers and identification information of a Walsh sequence corresponding to each antenna port identification number (that is, w1 or w2).
Furthermore, according to the Rel.10 standard, SRS (sounding RS) which is a receiving quality measuring reference signal is transmitted in uplink. This SRS is time-division multiplexed (TDM) with a symbol different from DMRS. More specifically, a DMRS is mapped to the fourth and eleventh symbols and an SRS is mapped to the fourteenth symbol (see FIG. 3). Note that a DMRS and SRS are mapped independently of each other. Furthermore, DMRSs and SRSs of a plurality of terminals are assigned to the same frequency.
As described above, DMRSs are used to demodulate data signals. A terminal which is on the data signal transmitting side transmits a DMRS from an antenna port from which a data signal is transmitted in a subframe where the data signal is transmitted. On the other hand, SRSs are used to acquire receiving quality information used for frequency scheduling. Therefore, since SRS transmission has a low correlation with data signal transmission, SRSs are generally transmitted independently of other signals. Furthermore, in an LTE uplink, a bandwidth in which a demodulation reference signal is transmitted is identical to a bandwidth of a data signal, whereas a bandwidth in which a receiving quality reference signal is transmitted is not dependent on the bandwidth of the data signal.
According to the LTE-A Rel.11 standard, an expansion of SRS resources is planned in preparation for shortage of resources used for SRS transmission (hereinafter, may also be referred to as "SRS resources") as the number of terminals that perform MIMO communication increases. A candidate for such a method is a method of code-multiplexing an SRS (e.g., for UE#1) with a DMRS (e.g., for UE#2) as shown in FIG. 4 (see Non-Patent Literature 2). According to the technique disclosed in Non-Patent Literature 2, an SRS is configured in the same way as for a DMRS (e.g., sequence group) except that trigger information used for timing control of SRS transmission is indicated by a base station to a terminal via a PDCCH. That is, when transmission of an SRS to be code-multiplexed with a DMRS is triggered, an SRS is generated according to the table described in FIG. 2 as with DMRS. Examples of the method of triggering SRS transmission include a method of changing an instruction (e.g., constellation) which is less likely to be used during normal operation to trigger information and a method of newly providing a trigger bit or the like.

Transmission device, receiving device, transmission method, and receiving method

PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA


A disclosed image forming apparatus comprises an image forming unit configured to form an image on a to-be-recorded medium, and a foam application unit configured to apply foam of at least one of a liquid and a gel to the to-be-recorded medium or an intermediate member. The intermediate member is configured to apply the foam to the to-be-recorded medium. The foam application unit includes a storage unit configured to store the foam and spread the foam in a width direction of the to-be-recorded medium or the intermediate member, an applicator configured to apply the foam to the to-be-recorded medium or the intermediate member, and a transport unit configured to transport the foam from the storage unit to the applicator.

There are image forming apparatuses such as printers, facsimile machines, copying machines, plotters, and multifunction machines having function of these devices. Inkjet recording apparatuses are known as liquid ejection recording type image forming apparatuses that use a recording head for ejecting ink droplet. The liquid ejection recording type image forming apparatuses form an image on a sheet by ejecting ink droplets from a recording head onto the sheet being transported.
The image forming apparatuses of this type include serial type image forming apparatuses that form an image by ejecting liquid droplets from a recording head moving in a sub scanning direction and line type image forming apparatuses that form an image by ejecting liquid droplets from a stationary recording head.
The term "sheet" as used herein is not limited to paper but may be any substance, including OHP sheets, to which ink droplets or liquid can adhere. The "sheet" may also be referred to as a "to-be-recorded medium", a "recording medium", "recording paper", and a "recording sheet". The term "recording", "printing", and "imaging" may be used as synonyms for the term "image formation".
The term "image forming apparatus" as used herein indicates a device that forms images by ejecting liquid onto media such as paper, strings, fibers, cloth, leather, metal, plastic, glass, wood, and ceramics. The term "image formation" as used herein indicates not only forming images that have meanings, such as characters and figures, on a medium, but also forming images that do not have meanings, such as patterns, on a medium (i.e., merely ejecting liquid droplets onto a medium). The "ink" is not limited to liquid that is commonly called ink but may be any material that turns into liquid when ejected. For example, ink may include DNA samples, resist, and patterning materials.
These liquid ejection type image forming apparatuses form an image by ejecting ink containing color materials in the form of liquid droplets. Therefore, problems such as feathering, which refers to dots of liquid droplets spreading to produce a feather-like edge, and color bleeding, which refers to a blurred border between colors due to adjacent different color ink droplets on a sheet being mixed, may occur. Moreover, it takes time for liquid droplets on a sheet to dry after printing.
Japanese Patent Laid-Open Publication No. 8-323977 (Patent Document 1) discloses a technique to prevent blurring using a heating device before or after printing and quickly dry ink after printing.
Japanese Patent Laid-Open Publication No. 2002-137378 discloses a technique to prevent blurring by applying a pretreatment liquid that reacts with ink using an application roller. Japanese Patent Laid-Open Publication No. 2005-138502 discloses a technique to apply a pretreatment liquid by ejecting the pretreatment liquid in the form of mist.
However, providing a heating device as in Patent Document 1 results in increased power consumption. On the other hand, using an application roller or a liquid ejection head as in Patent Documents 2 and 3 causes uneven application of a pretreatment liquid. Further, since the pretreatment liquid is in liquid form and therefore does not dry quickly after reaction with ink on a sheet, the sheet tends to be curled or warped, which often results in jamming.

Image forming apparatus and foam application device


Apparatuses and methods related to digital mobile radio (DMR) with enhanced transceiver are disclosed herein. The transceiver detects waveforms of signals received by a digital mobile station radio (MS). By detecting whether the waveforms of the signals, the transceiver allows a digital baseband processor of the MS to remain in a sleep state while the signals are being detected by the DMR, thereby reducing an amount of power used while the signals are being detected.

Digital mobile radio (DMR) has developed as a popular radio protocol for land mobile radio. Mobile station radio (MS), which may also be referred to as DMR radio or DMR walkie-talkie, often support both DMR and analog frequency modulation (FM). In order to support both DMR and FM, the MS determines whether a DMR signal or an FM signal is received by the MS.
The MS includes a radio frequency (RF) transceiver (TRx) and a baseband integrated circuit (BBIC). In legacy implementations, the TRx includes a TRx transmitter channel (RF Tx) and a TRx receiver channel (RF Rx) for transmission and reception of signals via an antenna of the MS, and the BBIC determines whether received signals is a DMR signal or an FM signal.
The legacy implementations of an MS switch among three states during operation. In a transmission (TX) state, the RF Tx and the BBIC are in an active mode to provide for transmission of signals via the antenna. In a reception (RX) state, the RF Rx and the BBIC are in an active mode to provide for reception of signals via the antenna. In an idle state, the MS is put to sleep to save power. However, the MS has wake periods during the idle state to detect incoming signals. During these wake periods, the RF Rx and the BBIC in legacy implementations are in an active mode to perform DMR signal detection. While the idle state does save some power, having to maintain the RF Rx and the BBIC in active mode during the wake periods causes power to be drawn by both the RF Rx and the BBIC during these time periods. As power is limited in an MS, power draws can affect the operation time of the MS between required charging.

Digital mobile radio with enhanced transceiver

Analog Devices International Unlimited Company


Apparatus and methods for detecting the presence of an airborne chemical or biological analyte utilize:                a substantially gas- and liquid-impermeable container;        means for introducing a substantially analyte-free collection liquid into said container;        means for rapidly sampling ambient air and transferring said analyte therefrom into said collection liquid, said sampling means comprising an air intake means and and an air venting means; and        means for removing from said container an analyte-enriched collection liquid;wherein said volume of air passes through a substantially horizontal air inlet and downward through a substantially vertical collector electrode tube with means for applying an electric field between said tube and a co-axial spiked wire- or rod-shaped discharge electrode.

This invention relates to improved apparatus and methods for detecting harmful substances, whether airborne or grounded, whether biological or chemical, which may pose an immediate or long term hazard to human life or health.
The afore-cited patents and co-pending applications, disclose apparatus and methods for collecting various contaminants (including vapors and particles, chemical or biological) from a large volume of air into a small volume of carrier liquid, so as to permit or facilitate rapid and ultra-sensitive detection of traces of hazardous or illicit substances which may be otherwise difficult to detect. The collected contaminants may be either dissolved by or suspended in the carrier liquid.
The earliest apparatus of this type was intended mainly for the absorption of vapors by the carrier liquid and was therefore referred to as liquid-absorption air sampler. With subsequent use of the same apparatus for the collection of respirable particles, the term (absorption) became inappropriate, as the collected particles may remain suspended in the carrier liquid without being dissolved therein. Such apparatus and methods will therefore be referred to herein as (HTLAAS) for High-Throughput Liquid-Assisted Air Sampling, which applies to collected air contaminants which are either dissolved or suspended in a carrier liquid.
A good measure of the performance of HTLAAS devices is the concentration factor F, which is proportional to the ratio of the concentrations in the liquid carrier and in air of the monitored contaminant, hereinafter referred to as (analyte.) The concentration factor F is defined by the equationF=εS/vL   [1],where ε is the sampler's collection efficiency, S is its air sampling rate, and vL is the volume of liquid in which the analyte is collected. The concentration factor F can thus be enhanced by increasing ε and/or S or by decreasing vL.
The need for efficient aerosol collectors has been appreciated for more than a decade both for all point bio-detection systems and for future chemical point detectors, where the term "point" applies to spots where samples are taken as opposed to remote detection. Several collectors have been developed and used by the military and first responders. However, recent incidents of bio-terrorism have revealed serious shortcomings of these collectors. When these were used in conjunction with immunoassay-based test strips, the resulting effective detection limit for anthrax bacilli was far above the known dangerous or lethal concentrations, so that inhalation of low but lethal doses of anthrax or other biological warfare [BW] aerosol agents could have been easily overlooked. Although several existing wetted wall cyclone aerosol collectors can remove a substantial fraction of particulates from a large volume of air (several cubic meters) and transfer them into a small liquid volume (a few milliliters) for analysis, their power requirements are high (400-500 watts)—driven by the need to collect particles as small as 1 micron. Cyclones and most inertial separation devices are intrinsically very inefficient at capturing small particles.
Somewhat of an exception may be the PHTLAAS [Portable HTLAAS] of U.S. Pat. No. 6,087,183, a variant of which was found to yield a collection efficiency of 66±3% for 1-micron particles and 84±4% for 4-micron particles at an air flow rate of 317 liters/minute, as reported by Kesavan, J.; Carlile, D.; Doherty, R. W.; Sutton, T.; and Hottell, A., "CHARACTERISTICS AND SAMPLING EFFICIENCY OF PHTLAAS™ AIR SAMPLER," ECBC-TR-267, US ARMY, 2002. When a similar sampler, hereafter referred to as "recent PHTLAAS", was operated at full power with a 12-volt battery, the measured power consumption was only 42 watts [3.5 amps at 12 volts]. The comparatively low power consumption of only 42 watts by the recent PHTLAAS is attributed to its unique flow pattern in which the direction of the air stream is partly reversed as it enters through the air intake, as disclosed in U.S. Pat. No. 6,087,183.
Although this recent PHTLAAS seems to compare favorably with other inertial-separation-type collectors, it still cannot match the much higher efficiencies that are obtainable with electrostatic precipitation [EP] technology for removing small particles from a gas [see, e.g., Altman, R.; Buckley, W.; and Ray, I.; "WET ELECTROSTATIC PRECIPITATION DEMONSTRATING PROMISE FOR FINE PARTICULATE CONTROL," Power Engineering, January-February, 2001, or Parker, K. R., editor; "Applied Electrostatic Precipitation," Chapman & Hall, London, 1997].
According to the latter references, wet EP [WEP] can achieve collection efficiencies of 99.9% for particles as small as 0.01 micron in size and for various gaseous species, including dioxins/furans, which could also assure capture of toxins and dry virus particles. The latter remain suspended in air long after evaporation of water from the droplets in which they were originally dispersed and may thus present a persistent not readily noticeable hazard. Therefore, an ability to collect dry virus particles should greatly enhance the effectiveness of biological agent detection systems.
Inertial separation devices, including the PHTLAAS, operate on altogether different principles than EP and consequently have different physical structures. Whereas the airflow within the PHTLAAS is highly turbulent and swirling rapidly, so as to impel particles towards the container wall by centripetal action, the flow in EP devices is substantially laminar, so as to permit high flow rates at rather low pressure drops and low power consumption.
The major reduction in power consumption that is expected from the use of EP yields not only major savings in the size, operating costs, and equipment cost of the resulting collectors, but also smaller and lighter instruments by reducing the size and weight of required batteries or else permits uninterrupted operation between battery replacements for longer time periods, thereby further increasing the utility of portable collectors.

Abstract: Efficient wet electrostatic precipitation with efficient collection of captured particles into a tiny liquid volume are achieved by the use of a liquid flow system comprising a programmable reversible pump with a reversible filter and appropriate liquid connections and valves. Injection of water sprays into the air stream and onto the interior walls of the collector electrode permits thorough wetting of interior surfaces and efficient removal of residual captured particles.


Method for forming bottle trenches by liquid phase oxide deposition. The method includes the steps of providing a substrate having a pad layer formed thereon, and a trench formed in a predetermined position; forming a masking layer at the bottom part of the trench; using liquid phase deposition (LPD) to form an LPD oxide layer on the sidewalls of the trench; removing the masking layer to expose the bottom part of the trench; subjecting the LPD oxide layer to annealing; and etching the bottom part of the trench not covered by the LPD oxide layer to form a bottle trench.

1. Field of the Invention
The present invention relates to a method for forming bottle trenches. In particular, the invention involves the formation of bottle trenches by liquid phase oxide deposition.
2. Description of the Prior Art
Generally speaking, capacitors widely used in dynamic random access memory (DRAM) are formed by two conductive layers (electrode plate) having an insulation layer between. The ability of a capacitor to store electric charges depends on the thickness of the insulation layer, surface area of the electrode plate and the electrical characteristics of the insulating material. In recent developments to reduce size of semiconductor elements to enhance integration density, memory cell area must be continuously reduced to hold a large number of memory cells, thereby increasing density. Meanwhile, the electrode plates of a capacitor in a memory cell must present sufficient surface area to store enough electric charge.
Nevertheless, since element size is continuously reducing, trench storage node capacitance of DRAM is decreasing as well. As a result, storage capacitance must be increased to maintain good operating performance for memory.
Currently, the method for increasing storage capacitance for DRAMs increases the width of the bottom of the trench, thereby increasing surface area to form a bottle-shaped capacitor. An example of the method for forming bottle trenches in Dynamic Random Access Memory (DRAM) devices is as follows. After the formation of a deep trench, sidewalls of the trench is then oxidized to form collar oxide. Nitride and poly are then deposited to cover the sidewalls and bottom of the trench. The poly layer is then oxidized, followed by forming photoresist at the bottom part of the trench. Oxide not cover by the photoresist is then removed. Next, the photoresist layer is stripped, followed by nitridation to form a nitride layer. Bottom oxide, bottom poly, top nitride and top poly are then sequentially etched. After the removal of collar oxide, a protective layer covering the top part of the trench is then formed. Bottle trench is then formed by enlarging the bottom part of the trench.
As the size of semiconductor device continues to decrease, the formation of a total number of five layers (oxide, nitride, TEOS, poly, oxide) in the trench requires much wet strip process at the bottom of the trench for follow-up striping of films. This easily creates many combined process window issues and makes the process even more difficult to control during mass production.
In order to overcome the above problems, an object of the invention is to provide an anti-collar method for forming bottle trenches by liquid phase oxide deposition, which can be adopted in 0.09 xcexcm or even finer generation of DRAMs without the necessity for formation of multiple layers in the trench.
In order to achieve the above objects, there is provided a method for forming bottle trench, comprising providing a substrate having a pad layer formed thereon, such that a trench is formed in a predetermined position, forming a masking layer at the bottom part of the trench, using liquid phase oxide deposition to form an LPD oxide layer on the sidewalls of the trench, removing the masking layer to expose the bottom part of the trench, subjecting the LPD oxide layer to annealing, and etching the bottom part of the trench not covered by the LPD oxide layer to form a bottle trench.
According to another embodiment of the invention, the method for forming bottle trenches, comprises providing a substrate having a pad layer formed thereon, such that a trench is formed in a predetermined position, forming a protective layer on the pad layer and on the sidewalls of the trench, forming a masking layer at the bottom part of the trench, using liquid phase oxide deposition to form an LPD oxide layer on the protective layer, removing the masking layer to expose the protective layer at the bottom part of the trench, subjecting the LDP oxide layer to annealing, removing the protective layer not covered by the LPD oxide layer, and etching the bottom part of the trench not covered by the LPD oxide layer to form a bottle trench.
According to the method for forming bottle trenches by liquid phase oxide deposition of the invention, the process for forming bottle trenches is made much simpler and allows for easier process control. Consequently, the LPD oxide also helps in terms of promoting overall quality and yield of DRAM processes.
The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings, given by way of illustration only and thus not intended to be limitative of the present invention.


When brain images are inputted through MRI (Magnetic Resonance Imaging) and subjected to image processing to assist the diagnosis of brain diseases, functional and morphological images in an ASL coordinate system are inputted from the head of a subject by an ASL (Arterial Spin Labeling) imaging method using an MRI device. The inputted functional images are subjected to mask processing to extract only the region of cerebral parenchyma, and functional images of only the extracted region of the cerebral parenchyma are thereby produced and displayed to be overlaid on the morphological images. In this manner, a functional image such as a perfusion weighted image of only the region of the cerebral parenchyma can be extracted and displayed overlaid on a morphological image.

With the advent of an aging society, the number of patients with dementia is increasing year by year. There are various types of dementia, and it is important to determine the type of dementia by diagnosis so that the disease is treated appropriately according to the determined type.
To respond to such a demand, an ASL imaging method (hereinafter may be simply referred to as an ASL method) based on ASL (Arterial Spin Labeling) is recently being used as a novel perfusion weighted imaging technique using MRI.
PWI (Perfusion Weighted Imaging) (also referred to as perfusion imaging) is a technique for imaging perfusion, which is the flow of blood through capillary vessels in tissues (see, for example, Patent Literature 1). The state of perfusion can be known by marking blood on the upstream (arterial) side of the tissues and observing the passage of the blood flowing through the tissues.
In a general conventional method, a contrast medium containing a radioactive isotope serving as a tracer is injected into an artery, and the injected radioactive isotope is observed. However, this method has an invasion problem.
The ASL method is characterized in that perfusion weighted images can be noninvasively obtained without any contrast medium.
The principle of the ASL method is as follows. A carotid artery is irradiated with inversion pulses to spin-label protons in blood flowing through the carotid artery, and images of the head are taken after a predetermined time, i.e., after the brain is perfused with the blood. These images are used as labeled images. Similarly, images are taken without irradiation with inversion pulses and are used as non-labeled images.
The above procedure is repeated to obtain a group of labeled images and a group of non-labeled images. PWIs quantitatively showing the distribution of cerebral blood flow can be obtained by the difference between the group of labeled images and the group of non-labeled images.
In addition, absolute CBFs (Cerebral Blood Flows) can be obtained from the PWIs. More specifically, the absolute CBFs are determined by substitution of the time of passage of the labeled blood, a blood-brain partition coefficient, the longitudinal relaxation time of the blood, etc. (see Non Patent Literature 1).
Generally, labeled images and non-labeled images are taken using a fast imaging sequence such as EPI (Echo Planar Imaging). Such a fast imaging sequence allows fast imaging, but the resolution of the images is low. However, when there is a need to take additional high resolution MRI images using a conventional imaging method, an imaging sequence that can provide additional high resolution images may be performed subsequent to the imaging procedure using the ASL method with the subject being secured.
The above-described and other features of the ASL method are summarized as follows:—Perfusion weighted images can be noninvasively obtained without any contrast medium. Morphological images (low-resolution images), together with functional images including PWIs and CBFs, are obtained by the ASL method, and the positions in the obtained images completely match each other. Morphological images (high-resolution images) can be taken using a conventional method subsequent to the imaging by the ASL method, and the positions in the morphological images substantially match the positions in the PWIs and CBFs.
As described above, PWIs and CBFs are very useful in the diagnosis of various brain diseases because the level of local blood flow can be obtained.

Medical image display processing method, device, and program


Surface-binding peptides have the capability of binding to surfaces of biocompatible materials and can thereby be used to immobilize various heterologous molecules of interest onto the surface. This means that surfaces of, for instance, implants and implantable medical devices can be tailored to present various characteristics by immobilizing selected heterologous molecules of interest on the surfaces of the implants and implantable medical devices. The surface-binding peptides consist of 5-17 consecutive amino acids of an extended beta-hairpin motif EIIATMKKKGEKRCLNP (SEQ ID NO: 57) in Interferon gamma-induced protein 10 (IP-10).

Implants and other medical devices implanted into the body of an animal or human body can trigger various immunological responses and rejection reactions. Such responses and reactions could prevent implantation of the medical device or affect the operation of the medical device in the body.
Accordingly, there is a general need for providing implants and medical devices with surfaces that prevent or at least reduce triggering immunological responses and rejection reactions in the host body. Various physical and chemical surface treating methods have been proposed in the art. The former includes coating the surface with various biocompatible materials, such as biocompatible metals or metal alloys, to present a biocompatible surface towards the immune system of the host body.
WO 2013/055749 discloses a chemical modification of implant surfaces to increase the immune tolerance of implantable medical devices. The surfaces of the implantable medical device are coated with one or more diketopiperazines.
However, so for there have been little progress in the art of biologically modifying surfaces of implants and medical devices using biomolecules such as proteins and enzymes. Hence, there is a need for a technology enabling modifying surfaces of such implants with various biomolecules.


A joined structure includes a metal terminal, a ceramic member and a joining layer between the metal terminal and the ceramic member. The joining layer includes a metal adhesive layer containing at least indium metal. The invention further provides a joined structure including a metal member, a ceramic member, and a joining layer. The metal member includes a tip face and a side face. A hollow portion is formed in the ceramic member. The joining layer is formed between a bottom surface facing the hollow portion and the tip face of member, and further formed between a side wall surface facing the hollow portion and the side face of the metal member. The joining layer also includes a metal adhesive layer containing at least indium metal.

The present invention relates to a joined structure of a metal member, particularly metal terminal, and a ceramic member, and an adhesive material therefor.
Dense ceramics are noted as a base material for an electrostatic chuck. In the field of semiconductor producing systems, electrostatic chucks have been practically used as susceptors containing an electrode for applying high frequency power to generate plasma. In a such device for applying high frequency power, the electrode for applying high frequency power has been embedded in a substrate made of silicon nitride or alumina.
In such devices, it is necessary to embed a metal electrode in a ceramic substrate such as aluminum nitride, alumina or the like and to electrically connect the metal electrode to an outer connector for supplying electric power. The Applicants disclosed a process of producing a ceramic heater, an electrostatic chuck and an electrode system for applying high frequency voltage used for a semiconductor producing system (see Japanese patent laid-open xe2x80x9cKokaixe2x80x9d number 277, 173A/1996 and 209, 255A/1998). In these applications, Applicants proposed the following process for producing a joined structure. A hole is formed in a ceramic substrate by machining to expose a part of a metal electrode that is embedded in the substrate. A metal terminal with the shape of a cylinder is inserted into the hole and its end face is adhered to the metal electrode by brazing.
The inventors have tried the following process for brazing a ceramic member and a metal terminal. In this process, a hollow or a blind hole is formed in a surface region of a ceramic member and the end face of a metal terminal is inserted into the hollow. A metal foil is interposed between the metal terminal and the inner wall surface of the ceramic member facing the hollow to obtain an assembly, which is then heated to join the terminal and member by brazing. In an actual production line, however, some problems were found in the step of cooling the ceramic member to room temperature after the brazing (heating) step. That is, cracks may occur in the ceramic member near the inner wall surface, particularly near the corner portions of the hollow of the ceramic member. Such cracks result in off-specification products and reduce the production yield.
It is an object of the invention to join a ceramic member and a metal member with a sufficiently high bonding strength and to prevent crack formation in the ceramic material constituting the ceramic member.
The present invention provides a joined structure of a metal terminal and a ceramic member. According to one embodiment, a joining layer is formed between the metal terminal and the ceramic member, wherein the joining layer comprises a metal adhesive layer containing at least indium.
According to another embodiment of the present invention, a joined structure of a metal member and a ceramic member is provided, wherein the metal member includes a tip face and a side face. A hollow is formed in the ceramic member, which has a side wall surface and a bottom surface both facing the hollow. A joining layer is formed between the bottom surface facing the hollow and the tip face of the metal member, and between the inner wall surface facing the hollow and the side face of the metal member. The joining layer comprises a metal adhesive layer containing at least indium.
According to the present invention, a ceramic member and a metal member may be joined with each other with a sufficiently high bonding strength and without crack formation in the ceramic material constituting the ceramic member.

Joined structures of metal terminals and ceramic members, joined structures of metal members and ceramic members, and adhesive materials


Disclosed is a method of processing a light-sensitive silver halide color photographic material comprising; subjecting to exposure a light-sensitive silver halide color photographic material comprising a support; a light-sensitive silver halide emulsion layer containing at least one of a core/shell silver halide grain containing 3.0 mole % or more of silver iodide and a tabular silver halide grain containing 3.0 mole % or more of silver iodide; and a compound capable of releasing at a developing processing a restrainer or restrainer precursor which forms silver salt having the solubility product with a silver ion, of 1.times.10.sup.-9 or less, and thereafter; carrying out a color developing processing by using a color developing solution containing an aromatic primary amine type color developing agent, for a period of 120 seconds or less and so as to have a value of (developed silver amount at the maximum density portion)/(total silver amount), of 0.5 or less.. The method of processing a light-sensitive silver halide color photographic material according to this invention can accomplish improvements of graininess and sharpness, and also prevention of surface-peeling of the light-sensitive silver halide color photographic material and scratch of an emulsion surface during the processing.

This invention relates to a method of processing a light-sensitive silver halide color photographic material, and, more particularly, it relates to a method of processing a light-sensitive silver halide color photographic material, that can reduce graininess, can improve sharpness, and also can prevent the light-sensitive silver halide color photographic material from being surface-peeled and the emulsion surface from being scratched during the processing.
In general, light-sensitive silver halide color photographic materials comprise a substrate provided by coating on its surface with three kinds of photographic silver halide emulsion layers selectively subjected to spectral sensitization so as to have sensitivities to blue light, green light and red light. For example, light-sensitive silver halide photographic materials for color negative are generally provided by coating with a blue-sensitive silver halide emulsion layer, a green-sensitive silver halide sensitive layer and a red-sensitive silver halide emulsion layer in this order from the side to be exposed, and, between the blue-sensitive silver halide emulsion layer and the green-sensitive silver halide emulsion layer, a yellow filter is usually provided in order to absorb the blue light transmitting through the blue-sensitive silver halide emulsion layer. It is further practiced to provide intermediate layers between the respective emulsion layers for special purposes, and also a protective layer as an outermost layer. It is also known that these respective light-sensitive silver halide emulsion layers can be provided in the order other than the above-mentioned, and it is further known that two or more layers of light-sensitive silver halide emulsion layers having sensitivity to the light of each color in substantially the same wavelength regions and having different sensitivities can be used as the respective silver halide emulsion layers. In these light-sensitive silver halide color photographic materials, an aromatic primary amine type color developing agent, for example, is used as a color developing agent to develop exposed silver halide grains, to form dye images by the reaction of an oxidized product of the color developing agent with a dye forming coupler. In such a method, usually, phenol or naphthol type couplers, 5-pyrazolone type, pyrazolinobenzimidazole type, pyrazolotriazole type, indazolone type or cyanoacetyl type magenta couplers, and acylacetamide type yellow couplers are respectively used for the formation of the cyan, magenta and yellow dye images. These dye forming couplers are contained in light-sensitive silver halide emulsion layers or in a developing solution. This invention is suitable as a method of processing a light-sensitive silver halide color photographic material containing the couplers in silver halide emulsion layers in the previously non-dispersed form.
Recent years, it has been practiced to miniaturize the image size of films and hence miniaturize a camera to enhance the portability, but, as well known, this may cause poorness of print images. Namely, as a picture size of a light-sensitive color photographic material is made smaller, the enlargement magnification becomes larger when a print is produced in a same size, and therefore, in proportion thereto, the graininess or the sharpness of printed images becomes poor. Accordingly, it is required to improve the graininess, resolution and sharpness of films in order to obtain good prints even when a camera has been miniaturized.
Of these, as techniques for improving the graininess, techniques improved almost only by light-sensitive materials have been hitherto known and practically used, such as a method in which a high speed reactive coupler is used as described in Japanese Unexamined Patent Publication No. 62454/1980, a method in which the number of silver halide grains is increased as described in T. H. James "The Theory of the Photographic Process", 4th Ed. pp.620-621; a method in which used is a non-diffusible coupler capable of forming a diffusible dye wherein a dye spreads in the desired degree by reacting with an oxidized product of a color developing agent; a method in which the silver iodide content is made to be 8 mole % or more as described in Japanese Unexamined Patent Publication No. 128443/1985; and other methods described in Japanese Unexamined Patent Publications No. 191036/1984, No. 3628/1985, No. 128440/1985, etc.
On the other hand, core/shell emulsions have been recently developed as a silver halide emulsion having a high sensitivity, whose grains have been made finer and silver is so effectively utilized as to meet the requirement of resource protection. One of them is monodispersed core/shell emulsion prepared by utilizing a preliminary silver halide emulsion as a seed of crystal, and laminating successive precipitates on it one and another while controlling intentionally the formulation of the respective precipitates or the progress environment. Including a core/shell type high sensitivity emulsion wherein the core contains silver iodide, these core/shell emulsions are found to have very desirable high sensitivity and other photographic performances.
In particular, as a result of studies made by the present inventors, a light-sensitive color photographic material containing a core/shell silver halide grains containing 3.0 mole % or more of silver iodide is found to have insufficient graininess. Especially, the graininess to be achieved when the size has been small-formatted is a technical subject for an improvement to be made a great deal.
Similarly, as an emulsion having a high sensitivity and useful for eliminating the defects conventionally involved, there have been developed a technique employing tabular silver halide grains as described in Japanese Unexamined Patent Publications No. 113930/1983, No. 113934/1983, No. 127921/1983, No. 108532/1983, etc.
According to this tabular grains technique, even if the number of light quantum captured by silver halide grains increases, the amount of silver to be used does not increase and also no poorness of images is caused. However, even when these tabular grains are used, the light-sensitive color photographic material containing a tabular silver halide grains containing 3.0 mole % or more of silver iodide can not have sufficient graininess. Especially, the graininess to be achieved when the size has been small-formatted is a performance to be improved. In particular, the defect in the graininess of a light-sensitive silver halide color photographic material having been extremely small-formatted as in the case of a so-called disk film obstructs the spread of the same.
The technique to improve graininess is generally carried out by designing the layer constitution of a light-sensitive silver halide color photographic material as described in Japanese Patent Publication No. 15495/1974, Japanese Unexamined Patent Publications No. 7230/1978, etc., but it is not sufficient and required to be further improved.

Method of processing light-sensitive silver halide color photographic material having three mole % silver iodine core/shell or tabular halide grains


A communication device is provided that includes a communication unit configured to perform communication of a voice signal with a party device via a communication line, a wireless communication unit configured to perform wireless communication of a data signal with an external device, and a controller configured to perform first wireless communication and second wireless communication in parallel, using the wireless communication unit. The first wireless communication is adapted to enable wireless communication of the voice signal between a voice communication device and the communication unit via the wireless communication unit. The second wireless communication is adapted to enable wireless communication of the data signal between the external device and the wireless communication unit.

1. Technical Field
The following description relates to one or more techniques for performing wireless voice communication and wireless data communication.
2. Related Art
A communication system has been known that includes a base phone for a digital cordless phone and a wireless local area network (WLAN). The communication system is configured to perform in parallel voice communication using the digital cordless phone and data communication using the WLAN.

Communication device, and computer-readable storage device and method for the same


A semiconductor device includes a semiconductor substrate as a drain region. A metal source region is located on a first surface of the substrate. The metal and the substrate constitute a Schottky junction. An insulated gate, including a gate electrode and an insulating film surrounding the gate electrode, is adjacent to the Schottky junction, such that angle formed by the Schottky junction and the insulated gate in the substrate is an acute angle. A part of the Schottky metal can be buried in the form of a pillar in the substrate, and a channel region of the Schottky junction can be formed on the pillar near the insulated gate.

1. Field of the Invention
The present invention relates to a semiconductor device in which a thickness of an energy barrier of a Schottky junction is modulated by an electric field of an insulated gate electrode to control a tunnel phenomenon, thereby controlling a main current.
2. Description of the Background Art
In FIGS. 1 to 6, there is shown a conventional semiconductor device such as a Schottky tunnel transistor, in which a thickness of an energy barrier of a Schottky junction is modulated by an electric field of an insulated gate electrode to control a tunnel phenomenon, thereby controlling a main current, as disclosed in Japanese Patent Laid-Open Specification No. 62-274775.
As shown in FIG. 1, an n.sup.+ -type drain region 2 is formed in the surface area of an n.sup.- -type silicon semiconductor substrate 1, and apart from the drain region 2 a Schottky metal 4 for acting as a source region is also embedded in the surface area of the substrate 1 so as to form a Schottky junction between the substrate 1 and the Schottky metal 4. A gate electrode 8 is formed on the surface of the substrate 1 via a gate insulating film 5 formed thereon between the drain region 2 and the Schottky metal source region 4. In this case, the barrier thickness of the Schottky junction 3 formed between the substrate 1 and the Schottky metal source region 4 in the direction perpendicular to the surface of the substrate 1 is modulated by the electric field of the gate electrode 6 to control the tunnel current, as hereinafter described in detail. An insulating film 7 is formed on the gate electrode 6 and the surface of the substrate 1 so as to cover these members, and source and drain electrodes 8 and 9 arc attached to the source and drain regions 4 and 2, respectively, and arc separated from the gate electrode 6.
In FIGS. 2a to 2d, there is shown a method for producing a Schottky tunnel transistor shown in FIG. 1.
In FIG. 2a, an ion implantation of an n-type impurity is effected in the surface area of an n.sup.- -type silicon semiconductor substrate 1 using a photoresist mask (not shown), and then a heat diffusion of the implanted impurity is carried out to form an n.sup.+ -type drain region 2 in the surface area of the substrate 1. As shown in FIG. 2b, a hollow 10 is formed in the surface area of the substrate 1 by a photo etching. In FIG. 2c, the hollow 10 of the substrate 1 is filled up with a Schottky metal 4 such as tungsten by a selective growth. Then, a silicon oxide (SiO.sub.2) film as a gate insulating film is formed over the surface of the substrate 1, and a conductive polycrystalline silicon film is formed on the silicon oxide film. The obtained laminate layer composed of the silicon oxide and the polycrystalline silicon films is patterned by the photo etching to obtain a gate electrode 6 on the surface of the substrate 1 between the drain region 2 and the Schottky metal source region 4 so that the barrier thickness of the Schottky junction 3 formed between the substrate 1 and the Schottky metal source region 4 in the direction perpendicular to the surface of the substrate 1 may be modulated to control a tunnel current by the electric field of the gate electrode 6. In FIG. 2d, an insulating film 7 is formed on the gate electrode 6 and the surface of the substrate 1 so as to cover these members 6 and 1, and then contact holes 7a for providing drain and source electrodes on the drain and source regions 2 and 4 are opened in the insulating film 7 by the photo etching. Then, source and drain electrodes 8 and 9 are formed on the drain and source regions 2 and 4 in the contact holes 7a of the insulating film 7 using vapor deposition and patterning, thereby obtaining a Schottky tunnel transistor shown in FIG. 1.
In FIGS. 3a to 3d, there are shown energy band structures of a surface portion of the semiconductor substrate 1 near the gate insulating film 5 of the semiconductor device shown in FIG. 1.
As shown in FIG. 3a, when both gate voltage V.sub.G and drain voltage V.sub.D are zero, the thickness of the Schottky barrier is thick, and thus there is no electron flow between the drain and the source. In FIG. 3b, when V.sub.G =zero and V.sub.D >zero, a reverse bias voltage is applied to the Schottky junction 3, and no electron flows between the drain and the source in a similar manner to that shown in FIG. 3a. In FIG. 3c, when V.sub.G >zero and V.sub.D >zero, a certain positive voltage is applied to the gate electrode 6, and the thickness of the Schottky barrier is modulated by the electric field of the gate electrode 6 and is reduced to a thickness value W. Hence, electrons flow from the Schottky metal 4 to the semiconductor substrate 1 through the Schottky junction 3 therebetween by the tunnel effect, and thus a tunnel current flows from the drain region 2 to the Schottky metal source region 4 through the Schottky junction 3. In FIG. 3d, when V.sub.G =zero and V.sub.D <zero, a forward bias voltage is applied to the Schottky junction 3. As a result, a lot of electrons can move from the semiconductor substrate 1 to the Schottky metal 4, and the electric current flows therebetween in the forward-direction.
As described above, the condition where the tunnel current can flow through the Schottky barrier is as follows. That is, the thickness W of the Schottky barrier in FIG. 3c, i.e., the distance between the junction (vertical line) in the energy band illustration and the crossing between the Fermi level and the lower end line of the conductive zone inclined by the electric field of the semiconductor substrate 1, is approximately 100 .ANG.. In the semiconductor device shown in FIG. 1, the electric field of the gate electrode 6 gives such an affection to the Schottky junction 3 in a range of at most 1000 .ANG. in depth from the surface of the substrate 1.
In the process for forming the hollow 10 in the silicon semiconductor substrate 1, when the isotropic etching is effected using a photoresist etching mask 11, the cross section of the side wall of the hollow 10 is as shown in FIG. 4a, and when the anisotropic dry etching is effected, the cross section of the side wall of the hollow 10 is as shown in FIG. 4b. In these cases, the Schottky junction 3 contacts with the semiconductor substrate 1 at an angle of approximately 90.degree. with respect to the surface of the substrate 1 in the range of approximately 1000 .ANG. in depth.
FIG. 5a is an enlarged schematic view illustrating the electric field spreading from the gate electrode 6 to the Schottky junction 3 via the gate insulating film 5 in the connection portion between the gate insulating film 5 and the Schottky junction 3 of the Schottky tunnel transistor which is prepared via the hollow etching step shown in FIG. 4a or 4b. In FIG. 5a, O is a contact point between the end of the Schottky junction 3 and the lower surface end of the gate insulating film 5, and A is a point on the Schottky junction 3 at a distance r away from the point O. The distance r represents the range of the Schottky junction 3 being affected by the electric field of the gate electrode 6. B is a point on the interface between the silicon semiconductor substrate 1 and the gate insulating film 5 at the distance r away from the point O, and C is a point where the vertical line standing from the point B intersects the upper surface of the gate insulating film 5.
Now, when a depletion layer is formed in the vicinity of the Schottky junction 3, as shown in FIG. 3c, electric line force extends from the gate electrode 6 to the Schottky junction 3 along the line CBA, as shown in FIG. 5a, i.e., along the arcuate line BA around the point O in the silicon semiconductor substrate 1. In fact, this electric line force is affected by a relatively weak electric field of the n.sup.+ -type drain region 2, which, however, can be ignored for explaining the principle of the Schottky tunnel transistor.
Assuming that the length of the arc BA is L=.pi..multidot.r/2, the energy band structure along the line CBA in FIG. 5a is shown in FIG. 5b, wherein .phi.B is a height of the Schottky barrier and dox is a thickness of the gate insulating film 5. In the silicon semiconductor substrate 1, since the depletion layer is formed in the vicinity of the Schottky junction 3, the following equation is obtained from Polsson's equation, EQU d.psi./dX=-q.multidot.N.sub.D /.xi.Si (1)
wherein .psi. is a potential, X arc coordinates on a segment AB whose direction extending from the point A to the point B is defined as positive, q is an electric charge, .xi.Si is a dielectric constant of the silicon semiconductor substrate 1, and N.sub.D is a donor density of the n-type silicon semiconductor substrate 1.
In FIGS. 5a and 5b, the following equation is obtained at the point B from the law of constant electric flux, EQU .epsilon.OX.multidot.Eox=.epsilon.Si.multidot.ESi (2)
wherein .epsilon.ox is a dielectric constant of the gate insulating film 5, Eox is electric field in the gate insulating film 5, and ESi is electric field in the silicon semiconductor substrate. Then, assuming that the electric field at the point B is Vs, the following equation is obtained: EQU Eox=(V.sub.G -V.sub.S)/dox (3)
From the above described equations (1) (2) (3), the thickness W of the Schottky barrier can be obtained when a tunnel current flows. When the gate voltage V.sub.G, the thickness dox of the gate insulating film 5 and the donor density N.sub.D are constant, the thickness W of the Schottky barrier can be expressed as a function of the length L of the arc BA. When the length L is small near the point O, the voltage is large, and the thickness W becomes small. Hence, a tunnel current having a large current density flows. On the other hand, when the length L is large away from the point O, the thickness W is large, and the current density of the tunnel current is rapidly reduced.
As described above, the thickness W of the Schottky barrier is approximately 100 .ANG. when the tunnel current starts to flow through the Schottky junction. Therefore, now, when the thickness W of the Schottky barrier is 100 .ANG. at the constant values of V.sub.D and V.sub.G, the length of the line BA is defined to L, and the section OA of the Schottky junction 3 is a channel equivalent region which is referred to as a "channel" region of the Schottky tunnel transistor.
In FIG. 6, there is shown a characteristic curve representing a relation between a thickness W of the Schottky barrier and a tunnel current density when the height .phi.B of the Schottky barrier is 0.6 eV. From FIG. 6, it is readily understood that as the thickness W of the Schottky barrier is reduced, the current density of the tunnel current is rapidly increased.
In a conventional Schottky tunnel transistor, the angle formed by the Schottky junction 3 constituting the channel region and the electrode surface (lower surface) of the gate electrode 6 or the lower surface of the gate insulating film 5 having a uniform thickness, i.e., the angle AOB defining the corner of the silicon semiconductor substrate 1 between the Schottky junction 3 and the gate insulating film 5 in FIG. 5a is approximately 90.degree., and thus the channel region can not be sufficiently large. Hence, a large current capacity can not be obtained.


An improved screwdriver comprises a hollow cylinder having a plurality of guiding slots therein, each guiding slot receiving a slidable connecting piece having one end connected to a driver bit; a hollow guiding cylinder having a plurality of sliding slots therein is connected to one end of the hollow cylinder, the sliding slots corresponding to the guiding slots in the hollow cylinder for receiving the driver bits; a positioning head is connected to the other end of the hollow guiding cylinder and has an exit end with a hole of the size of the driver bits; a hollow sealing cover is connected to the other end of the hollow cylinder; and an actuator rod is slidably mounted within the sealing cover, and a peg is provided at the center of the actuating rod. An engaging piece is engageable at the outside of the sealing cover such that by rotating and pressing down the actuating rod, the peg is caused to contact any selected connecting piece, so that different sizes and shapes of driver bits can be extended from the positioning head as desired.

The present invention relates to an improved screwdriver, in particular, to a screwdriver having a plurality of driver bits which can be replaced and thus the screwdriver can be conveniently used as desired. When operating the screwdriver, a actuating rod is operated so cause one of the driver bits protruding from the exiting end of the screwdriver.
When turning and driving screws, one often makes use of several screwdrivers to fit different-sized screws. As a result, it is not convenient to use these screwdrivers for the reason that some of the required screwdrivers may not be easily available, particularly precision screwdrivers. In order to overcome such a shortcoming, these screwdrivers may be orderly arranged in a storage case to avoid misplacing of the screwdrivers. However, it is rather inconvenient to carry the storage case along when using the screwdriver.

Screwdriver with replaceable driver bits

No. 14, Alley 86, Lane 412, Chen-Hsing Road


The present invention is an alarm clock device which programmably and automatically coordinates the movement of one or more electric toy trains, or the like. The present invention alarm clock preferably triggers the movement of an electric toy train when a pre-set alarm time is reached. The alarm clock device comprises at least one base that defines an elongated substantially non-linear track for regulating the movement of a toy train. The traveling speed of the train is preferably regulated by a voltage varying device, such as a transformer, that is attached to the track and also coupled to a manually adjustable speed controlling member within the alarm clock. The movement of the train is preferably accompanied by applicable audible sounds that correspond therewith. The duration of movement may be programmed manually and may be adjusted in any variety of ways.

1. Field of the Invention
The present invention is directed to programmable alarm clocks, and more particularly to programmable alarm clocks which automatically coordinate the movement of at least one electric vehicle coupled therewith.
2. Information Disclosure Statement
Conventional alarm clocks come in a variety of shapes and sizes and function in a variety of ways. The intent of many such alarm clocks is to provide a convenient means for waking the user from a sleeping state. The pertinent prior art discloses alarm clocks which incorporate, for example, radio receivers and cassette players.
In addition, the prior art also discloses alarm clocks which incorporate an accompanying vehicle which is triggered into motion along a linear track when a predetermined alarm time is reached. The following samples represent different variations of alarm clocks which exemplify the art.
U.S. Pat. No. 5,311,488 to Herbert B. Trantham teaches an alarm clock which coordinates mechanical motion or action, with a distinctive sound, of an object such as a train engine between end stops when an alarm clock reaches a set alarm time. When the moving object reaches a front end stop of a linear track, sound is terminated and a regular alarm clock signal is enabled.
U.S. Pat. No. 3,611,151 to Jose F. Fernandez teaches an electric alarm clock with a radio and a cartridge-type tape receptacle and playback head mechanism. Also included are awake and sleep switches and a selector switch for selectively operating the radio or the tape mechanism in the morning and in the evening.
Notwithstanding the prior art in this field, it is believed that the present invention, which comprises a programmable alarm clock which automatically and adjustably coordinates the duration of movement and the speed of one or more vehicles, as described herein, is neither taught nor rendered obvious.
The present invention is an alarm clock device which programmably and automatically coordinates the movement of one or more electric toy trains, or the like. The present invention alarm clock preferably triggers the movement of an electric toy train when a pre-set alarm time is reached. The alarm clock device comprises at least one base that defines an elongated substantially non-linear loop track for regulating the movement of a toy train. The traveling speed of the train is preferably regulated by a voltage varying device, such as a transformer, that is attached to the track and also coupled to a manually adjustable speed controlling member within the alarm clock. The movement of the train is preferably accompanied by applicable audible sounds that correspond therewith. The duration and speed of movement may be programmed manually and may be adjusted in any variety of ways.

Alarm clock with time activated and speed controlled vehicle device


The present disclosure provides a display array substrate, a compensation method, a display panel and a display device. The display array substrate includes at least one power line and a voltage application unit. The at least one power line is connected to pixels in at least one column within an effective display region on the display array substrate. The power application unit is arranged outside the effective display region and configured to apply power supply voltages to at least two power supply voltage input points on the at least one power line. An absolute value of a voltage difference between the at least two power supply voltage input points is less than a predetermined voltage threshold.

Active matrix/organic light-emitting diode (AMOLED) display device is currently one of the hotspots in the field of flat-panel display devices. The OLED has such advantages as low power consumption, low production cost, self-luminescence, wide viewing angle and rapid response. As a core technique for the AMOLED display device, the design of a pixel driving circuit is of an important significance. For the AMOLED display device, a stable current is required so as to control the OLED to emit light.
As shown in FIG. 1, an existing typical AMOLED pixel driving circuit includes one driving transistor DTFT, one switching transistor T1 and one storage capacitor Cs. When one row of scanning lines is selected, a scanning signal Gate(n) on this row is of a low level, T1 is turned on, and a data voltage Vdata corresponding a grayscale level is written into the storage capacitor Cs. After this row of scanning lines has been scanned, Gate(n) is changed to be of a high level, T1 is turned off, and DTFT is driven by a gate voltage stored in Cs, so that a current is generated by DTFT to drive the OLED, thereby to ensure the OLED to emit light continuously within one frame. The current IOLED flowing through the OLED=K(VGS−Vth)2=K(Vdata−ELVDD−Vth)2, wherein K is a constant, VGS is a gate-to-source voltage of DTFT, Vth is a threshold voltage of DTFT, and ELVDD is a power supply voltage. An existing pixel compensation circuit merely compensates for the drift of the threshold voltage Vth of DTFT in each pixel generated due to the manufacture process and the aging of elements.
However, it should be appreciated that, as can be seen from the above equation for calculating the current flowing through the OLED, the current is also affected by the power supply voltage ELVDD. Because the OLED is a current-driven element, there is a relatively large current flowing through a power line for applying the power supply voltage ELVDD. As shown in FIG. 2, on an OLED display panel, the pixels in each column within an effective display region are connected to a corresponding power line, and the power supply voltage is applied by a power supply lead ELVDD_O located outside the effective display region to the power lines within the effective display region. The large current flows through, from top down, the power lines within the effective display region, so on the OLED display panel, the power supply voltage ELVDD at an upper left portion is larger than that at a middle left portion, and the power supply voltage ELVDD at the middle left portion is larger than that at a bottom left portion. Identically, the power supply voltage ELVDD at an upper right portion is larger than that at a middle right portion, and the power supply voltage ELVDD at the middle right portion is larger than that at a bottom right portion.
In FIG. 2, a first power supply voltage input point BLP is located on the OLED display panel at the bottom left, a second power supply voltage input point ULP is located on the OLED display panel at the upper left, a third power supply voltage input point URP is located on the OLED display panel at the upper right, a fourth power supply voltage input point BRP is located on the OLED display panel at the bottom right, a fifth power supply voltage input point MLP is located on the OLED display panel at the middle left, and a sixth power supply voltage input point MRP is located on the OLED display panel at the middle right. VULP>VMLP>VBLP, VURP>VMRP>VBRP, wherein VULP is a voltage at ULP, VMLP is a voltage at MLP, VBLP is a voltage at BLP, VURP is a voltage at URP, VMRP is a voltage at MRP, and VBRP is a voltage at BRP.
As can be seen from the above equation for calculating the current flowing through the OLED, the brightness of the entire OLED display panel gradually increases from top down, i.e., the brightness unevenness occurs. In the related art, an appropriate material is selected so as to reduce a resistance of the power line for applying the ELVDD, thereby to reduce a difference in an IR drop (which refers to a voltage drop or rise across a network in an existing integrated circuit (IC) between the power supply and the ground). However, along with an increase in the resolution, there is less room for the power lines, and as a result, the IR drop become very serious on the OLED display panel.

Display array substrate, compensation method, display panel and display device


A blend unit in a display pipe for processing pixels of video and/or image frames may include multiple blend stages, where each blend stage may include multiple levels for blending pixels according to a blend equation. The blending operation includes blending pixel color values and Alpha values. A multiplication may be performed at each blend level, necessitating Alpha value normalizations in the form of divisions to obtain pixel color values having a specified bit-length. Color value normalizations are not needed when the desired result is an actual color value. In order to reduce the compounding of errors that may result from the introduction of an error at each division, Alpha value normalizations may not be performed at each blend level, carrying the intermediate results forward in fractional form—through one or multiple blend stages—until the end of the blending operation. At or after the final blend level—in each blend stage, or in a final blend stage—a single division may performed, preventing the compounding of errors that would be incurred at each blend level if a division at each blend level were performed.

1. Field of the Invention
This invention is related to the field of graphical information processing, more particularly, to blending multiple layers of pixels.
2. Description of the Related Art
Part of the operation of many computer systems, including portable digital devices such as mobile phones, notebook computers and the like is the use of some type of display device, such as a liquid crystal display (LCD), to display images, video information/streams, and data. Accordingly, these systems typically incorporate functionality for generating images and data, including video information, which are subsequently output to the display device. Such devices typically include video graphics circuitry to process images and video information for subsequent display.
In digital imaging, the smallest item of information in an image is called a "picture element", more generally referred to as a "pixel". For convenience, pixels are generally arranged in a regular two-dimensional grid. By using this arrangement, many common operations can be implemented by uniformly applying the same operation to each pixel independently. Since each pixel is an elemental part of a digital image, a greater number of pixels can provide a more accurate representation of the digital image. The intensity of each pixel can vary, and in color systems each pixel has typically three or four components such as red, green, blue, and black.
Most images and video information displayed on display devices such as LCD screens are interpreted as a succession of image frames, or frames for short. While generally a frame is one of the many still images that make up a complete moving picture or video stream, a frame can also be interpreted more broadly as simply a still image displayed on a digital (discrete, or progressive scan) display. A frame typically consists of a specified number of pixels according to the resolution of the image/video frame. Information associated with a frame typically consists of color values for every pixel to be displayed on the screen. Color values are commonly stored in 1-bit monochrome, 4-bit palletized, 8-bit palletized, 16-bit high color and 24-bit true color formats. An additional alpha channel is oftentimes used to retain information about pixel transparency. The color values can represent information corresponding to any one of a number of color spaces.
In addition to the color values, the pixels may also have associated per-pixel Alpha values providing opacity information for the pixel. Alpha values may be stored what is commonly referred to as an Alpha channel, and each Alpha value may be between 0 and 1, with a value of 0 meaning that the pixel does not have any coverage information and is transparent, and a value of 1 meaning that the pixel is opaque. Based on this opacity information, various layers of an image frame may be blended together. In general, blending is the process of combining multiple layers of an image to overlay portion of one layer atop another layer, or to create the appearance of partial transparency of certain elements in some of the layers. For example, blending is used extensively when combining computer rendered image elements with live footage. In many cases blending operations include multiple layers that perform blending, where each level performs a normalization division. Over multiple levels of blending, the errors introduced by the normalization at each level may be compounded, resulting in less than the desired accuracy in how the blended images are displayed.
Other corresponding issues related to the prior art will become apparent to one skilled in the art after comparing such prior art with the present invention as described herein.