In a reactor (1) which has a bundle of catalyst tubes (2) and in which a heat transfer medium is circulated through the space surrounding the catalyst tubes, with the ring lines (3, 4) at both ends of the reactor with openings (5, 6) through the wall for introduction or removal of a heat transfer medium by means of one or more pumps, where the heat transfer medium is introduced into the lower ring line (4) and is returned via the upper ring line (3) to the pump(s) and the heat transfer medium or a substream of the heat transfer medium may, if desired, be passed over one or more external heat exchangers, and with deflecting plates (7) which alternately leave free an open cross section in the middle of the reactor and at the edge of the reactor, the lower ring line (4) is divided by means of a horizontal dividing wall (8) into two regions between which material can pass via preferably uniformly distributed openings (9) having a regulatable open cross section.

The present invention relates to a reactor which has a bundle of catalyst tubes and in which a heat transfer medium is circulated through the space surrounding the catalyst tubes, and to the use of the reactor for carrying out oxidation reactions.
The customary construction of such reactors comprises a generally cylindrical vessel in which a bundle, i.e. a multiplicity, of catalyst tubes is accommodated, usually in a vertical arrangement. These catalyst tubes which may contain supported catalysts are, at their ends, fixed to and sealed into tube plates and each open into a cap joined to the vessel at its upper or lower end. The reaction mixture flowing through the catalyst tubes is introduced and removed via these caps. A heat transfer medium is circulated through the space surrounding the catalyst tubes in order to level out the heat balance, particularly in the case of strongly exothermic reactions.
For economic reasons, reactors having a very large number of catalyst tubes are used, with the number of catalyst tubes accommodated in the reactor frequently being in the range from 10,000 to 50,000.
As regards the heat transfer medium circuit, it is known that a largely homogeneous temperature distribution in the heat transfer medium across each horizontal section through the reactor should be achieved so that virtually all catalyst tubes participate uniformly in the reaction (e.g. DE-C 16 01 162). The smoothing of the temperature distribution is achieved by introduction of heat or removal of heat via external ring lines which are installed at each of the ends of the reactor and have a multiplicity of openings through the wall, as described, for example, in DE-C 34 09 159.
A further improvement in heat transfer is achieved by installation of deflecting plates which alternately leave free an open cross section in the middle of the reactor and at the edge of the reactor. Such an arrangement is suitable, in particular, for annular tube bundles having a free central space and is known, for example, from GB-B 31 01 57.
In large reactors which have a number of catalyst tubes in the above mentioned range from about 10,000 to 50,000 and are additionally fitted with deflecting plates, the pressure drop of the heat transfer medium is comparatively very large. Thus, the eutectic salt melt of potassium nitrate and sodium nitrite frequently used for removal of the heat liberated in oxidation reactions, which has a water-like viscosity at a use temperature of preferably from about 250xc2x0 C. To 400xc2x0 C., has to be pumped with a head of from about 4 to 5 m into a reactor of the above mentioned size in order to overcome the pressure drop.
In such large reactors, the pump system is advantageously located between the upper ring line and the lower ring line, with the heat transfer medium being fed into the lower region of the reactor, for example, via a ring line.
The reaction mixture is customarily passed through the catalyst-filled catalyst tubes from the top downward. As the reaction progress in the catalyst tubes, a temperature profile with a temperature maximum (hot spot) in the initial region of the tubes through which the reaction mixture flows is established. A particular problem here is that the activity of the catalyst drops with increasing operating time and as a consequence the hot spot region migrates from the top downward through the reaction tubes.
It is an object of the present invention, starting from a single external heat transfer medium circuit, to achieve a heat transfer medium flow which can be regulated over the height of the reactor and as the reaction progresses.
The achievement of this object starts out from a reactor which has a bundle of catalyst tubes and in which a heat transfer medium is circulated through the space surrounding the catalyst tubes, with ring lines at both ends of the reactor with openings through the wall for introduction or removal of a heat transfer medium by means of one or more pumps, where the heat transfer medium is introduced into the lower ring line and is returned via the upper ring line to the pump(s) and the heat transfer medium or a substream of the heat transfer medium may, if desired, be passed over one or more external heat exchangers, and with deflecting plates which alternately leave free an open cross section in the middle of the reactor and at the edge of the reactor.
In the reactor of the present invention, the lower ring line is divided by means of a horizontal dividing wall into two regions between which material can pass via preferably uniformly distributed openings.
In a further variant of the reactor of the present invention, at least one radial chamber which extends over the entire height of the reactor and has a regulatable feed opening for the heat transfer medium from the lower ring line and a central outlet for the heat transfer medium at a set table height in the middle of the reactor is provided.
The reactors of the present invention ensure, by means of simple constructional measures, an increased degree of operational safety combined with an extension of the catalyst life and an increase in capacity and selectivity.
This is achieved according to the present invention by the lower ring line via which the heat transfer medium is introduced into the reactor being divided by means of a horizontal dividing wall into two regions which are connected to one another via openings. The horizontal dividing wall can in principle be located at any height in the lower ring line, but preference is given to a symmetrical division into two equal regions. Likewise the openings to be provided in the horizontal dividing wall can in principle be of any number and size, but they are preferably distributed uniformly. The geometry of the openings is preferably circular, with the openings particularly preferably widening conically toward the top. The openings have preferably a regulatable open cross section, with slide gates or valves which are controllable via a regulating drive being used in a known manner for regulation. The openings can also have fixed open cross sections. The number and size of the openings is preferably such that a proportion of from 0 to 70%, preferably from 20 to 50%, of the heat transfer medium flow enters the upper region of the lower ring line directly.
In a preferred embodiment, one or more further ring lines for the introduction in each case of regulatable substreams of the heat transfer medium stream from the lower ring line via regulatable openings in the horizontal dividing wall of the lower ring line and also suitable feed lines to the further ring lines are provided, distributed over the height of the reactor, in the region between the lower ring line and the upper ring line. The further ring lines are particularly preferably distributed symmetrically over the height of the reactor. More preferably, two or three further ring lines are used. The substreams to be separated off can in principle each represent any proportion of the heat transfer medium stream introduced into the lower ring line. Particular preference is given to in each case separating off a proportion of from 0 to 70%, preferably from 20 to 30%, of the heat transfer medium stream introduced.
In a further embodiment, a radial chamber which extends over the entire height of the reactor and has a regulatable feed opening for the heat transfer medium from the lower ring line and a central outlet for the heat transfer medium at a set table height in the middle of the reactor is provided. Industrial implementation of this embodiment is carried out particularly simply by providing a tube-free space of essentially any width, preferably a width in the range from 100 mm to 500 mm, in particular 100 mm over the entire height of the reactor along a reactor diameter. The heat transfer medium is introduced into this tube-free space at the circumference of the reactor, from the lower ring channel via openings having a regulatable open cross section. The inflow of heat transfer medium is preferably regulated by means of an actuating drive which has a shut-off device, in particular a slide gate or a valve.
Complete separation of the heat transfer medium in the region between the reaction tubes is not necessary. Even the catalyst tubes themselves, which are generally installed at the highest possible density for cost reasons, generally at a ratio of spacing, i.e. a distance between two nearest-neighbor tubes, to external tube diameter in the range from 1.26 to about 1.6, substantially deflect the major part of the heat transfer medium stream into the tube-free middle of the reactor for hydrodynamic reasons. In addition, it is possible to provide parallel side walls for separating the chamber from the reactor space fitted with catalyst tubes, but it is not necessary for these side walls to be liquid-tight.
The central outlet for the heat transfer medium in the middle of the reactor can in principle be located at any desired height; matching the temperature profile to the reaction to be carried out is, in particular, a decisive factor in this choice.
The regulation of the heat transfer medium flow via the lower ring channel by means of a horizontal dividing wall or via additional ring channels distributed over the height of the reactor is particularly preferably combined with the regulation of the heat transfer medium flow via the middle of the reactor by means of a radial chamber.
It is also possible to provide a further radial chamber which is arranged at an angle of 90xc2x0 to the first radial chamber, thus forming a cross arrangement.
It can be advantageous to install static mixers in one or all regions in the middle of the reactor where the deflecting plates leave free an open cross section. In this way, an increased temperature across the reactor cross section is achieved; in particular, inequalities in the temperature distribution over the two halves of the reactor are levelled out. There are in principle no restrictions in respect of the static mixers which can be used; particular preference is given to static mixers having ring- or plate-shaped internals which may, in particular, be perforated or corrugated.
The reactor is not limited in terms of the type of heat transfer medium, which can be used either for the removal of heat, i.e. for carrying out exothermic reactions, and also for the supply of heat to the reaction mixture flowing through the catalyst tubes, i.e. for carrying out endothermic reactions.
The reactor is particularly suitable for carrying out oxidation reactions, in particular for preparing phthalic anhydride, maleic anhydride, glyoxal, (meth)acrolein and (meth)acrylic acid.

Counterflow reactor with a bundle of contact tubes


A label printer can continue to print labels without causing a paper jam even when the label detector is not operating. During label printing by the label printer 1, this method confirms if the label detection operation of the optical sensor 14 disposed near the label dispensing slot 3 is normal or not (step ST2). If normal, the next label printing operation starts automatically after a label is printed and the optical sensor 14 detects that the label has been removed from the label dispensing slot 3 (steps ST3, 4, 5). If not normal, an error indicating LED flashes to inform the operator and operation switches to a manual label printing mode in which the optical sensor 14 is not used and starting the next label printing operation waits for manual input (steps ST6, 7, 8). Labels can still be printed when the optical sensor 14 is not operating normally.

A label printer generally prints labels while conveying label paper, which has labels adhesively affixed at a constant interval on a long web, passed the printing position, then peels the labels from the web by means of a peeler mechanism, and dispenses the printed peeled labels from a label dispensing slot. The peeler conveys the label paper around a bend of more than 90 degrees, and uses the stiffness of the label (the rigidity of the label paper) to peel each label from the web. Patent Reference 1 noted below teaches a printer having this type of peeler mechanism.
In this type of label printer the labels are conveyed to the label dispensing slot as the labels are peeled from the web by the peeler, and the web from which the labels have been peeled is discharged through a different path than the labels. Conveying the labels and web stops at the point where only a part of the trailing end of the label in the transportation direction remains affixed to the web. This is because the label will fall out if the printed label is completely separated from the web. Most of the label peeled from the web is exposed externally to the label dispensing slot at this point so that the operator can remove the label. At some point thereafter, the operator removes the printed label.
If the operator does not remove the printed label and the next label is printed and discharged while a label remains in the label dispensing slot, labels with the adhesive face exposed will build up one after another at the label dispensing slot, eventually leading to a paper jam. To avoid this, a reflective optical sensor is generally disposed as a label detector near the label dispensing slot to detect if the printed label remains in the label dispensing slot (that is, to detect the presence of a label). If the label detector detects that the label was removed (detects that a label is not present), the next label printing operation starts.
[Patent Reference 1] Japanese Patent No. 2992363

Label printing control method and label printer


A control for a lawn and garden vehicle, such control utilizing a "U" shaped main direction control pivotally mounted to the handlebars. The control being physically interconnected to a transmission such that movement of the direction control forward causes the vehicle to move forward, and movement of the direction control backward causes the vehicle to move in reverse with the control being spring biased into a central neutral position.

Lawn and garden vehicles typically have wheels on opposing sides of the vehicle which are selectively interconnected through a variable speed transmission and clutching mechanism to an engine. The wheels themselves are normally also braked. Typically the controls for this transmission and brake are mounted on the handlebars, typically with individual lever controls for the right and left sides in walk behind mowers. Examples of this may be found in U.S. Pat. Nos. 4,920,734, 4,991,382, 4,967,543, 5,127,215, and 5,146,735. In these units, some sort of levers which are mounted on either side of the handles of the lawn mower are utilized to control the wheel drive systems. In all cases, the operator maintains a separate solid interconnection directly to the handlebars as well.

Operator control for lawn and garden vehicles


There is provided a method and system for optimizing delivery of data to a mobile device over a network. According to one embodiment, the invention includes a communication stack, such as a TCP/IP stack, which includes an application protocol interface (API) between an application layer and a transport layer. According to this embodiment, the method includes receiving delivery optimization information; determining the priority of the data using the delivery optimization information; providing the priority of the data to a physical layer in the communication stack; and delivering the data to the mobile device based on the priority.

1. Field of the Invention
The present invention relates generally to communication networks. More particularly, the present invention relates to optimizing the delivery of data in mobile networks.
2. Background Art
The functionality of today's mobile devices, such as cellular telephones and personal digital assistants (PDAs), has rapidly increased to allow users of such mobile devices to receive and use applications that make frequent network requests, as well as content constituting large amounts of data, such as music and videos, over a communication network. Consequently, it has become critical for the hosts delivering such data over a communication network to exercise control over the manner in which the data is delivered to optimize network traffic and to improve user experience.
A host typically uses Transport Control Protocol (TCP) and Internet Protocol (IP) (TCP/IP) to communicate with a mobile device. TCP/IP is a suite of protocols designed to allow communication between networks regardless of the technologies implemented in each network. For example, FIG. 1 of the present application illustrates various layers of conventional TCP/IP stack 100.
As shown in FIG. 1, TCP/IP stack 100 includes application layer 105, presentation layer 110, session layer 115, transport layer 120, network layer 125, data-link layer 130 and physical layer 135. Application layer 105 is a user process cooperating with another process on the same or a different host. Examples of application layer 105 include telnet (protocol for remote terminal connections), FTP (file transfer protocol), RPC (remote procedure calls), SMTP (e-mail), TFTP (trivial file transfer protocol), DNS (domain name system) and NFS (network file system). Presentation layer 110 provides services such as encryption and compression of data and session layer 115 controls dialog by managing the period and timing of transmissions. Transport layer 120 provides end-to-end data transfer. The most common example transport layer 120 protocols are TCP, UDP (User Datagram Protocol) and ICMP (Internet Control Message Protocol). Network layer 125 provides a virtual network image of the internetwork and, in doing so, shields the higher layers from the lower network structure. IP is the best known of network layer 125 protocols. Data-link layer 130 provides an interface to the actual network hardware. Lastly, physical layer 135 is purely the hardware layer, such as the cable, radio-wave, satellite and network interface card.
As a packet is received by a host, the packet enters the lowest point of TCP/IP stack 100, which is physical layer 135, and travels the sequence of layers 105-135 that make up TCP/IP stack 100. Each layer then proceeds to strip-out the data it needs and passes the remaining packet, if required, to the next layer up in the stack. Likewise, when application layer 105 creates a packet, application layer 105 will pass the packet down to the next layer where further information is added by each and every subsequent layer until the packet emerges onto physical layer 135 as a full TCP/IP packet. As an example, a 30-byte packet created by application layer 105 may be sent to transport layer 120, e.g. TCP, where 20 bytes of TCP header are added to the packet. Thereafter, 20 bytes of IP header may be added by network layer 125 to the packet, and 22 bytes of Ethernet header may be added by data-link layer 130, before a full packet of 96 bytes arrives at physical layer 135 for transmission in the network. Similarly, when a packet arrives at physical layer 135, data are stripped out from the packet at each layer until a 30-byte packet arrives at application layer 105.
When multiple mobile devices request data (e.g., applications or content) from the host, for example, the host sequentially delivers the data over the network using conventional TCP/IP stack 100 in the order that the requests for the data were received. However, one or more of the mobile devices might experience poor radio frequency (RF) conditions, which can undesirably result in substantially reduced data transfer rates or dropped connections. Consequently, a request for data by a mobile device experiencing poor RF conditions can disadvantageously congest the flow of data in conventional TCP/IP stack 100, thereby degrading the performance of subsequent requests for data by other mobile devices that are experiencing good RF conditions.
Moreover, since TCP/IP stack 100 sequentially delivers data to mobile devices over the network in the order that the requests for the data were received, the flow of data in conventional TCP/IP stack 100 can also be congested, for example, by a single mobile device requesting a large amount of data. Such congestion can substantially degrade the performance of other mobile devices by causing lengthy delays in the delivery of smaller amounts of data requested by other mobile devices. Another major drawback of conventional TCP/IP stack 100 is that TCP/IP stack 100 cannot provide enhanced performance for premium users over non-premium users, since conventional TCP/IP stack 100 can only deliver data in the order that the requests for the data were received, regardless of the classification of the user (e.g., premium or non-premium). Consequently, conventional TCP/IP stack 100 cannot provide premium users with a better user experience than non-premium users.
Thus, there is a strong need in the art for a method and system for optimizing delivery of data to a mobile device over a communication network.

Optimization of data delivery in mobile networks


For each logic gate in a logic circuit, all paths containing the gate are determined and the paths are classified by their length between each of the input or launch SRLs and each output or capture SRL. The paths are assigned a single threshold value and then divided into two groups in accordance with their path length classification relative to the threshold value with all paths in each group treated as a single path. Pseudo random LBIST patterns are then simulated using standard LBIST tool. When a fault associated with a logic gate is detected by a capture SRL of a path with a length above the threshold, the fault is viewed as tested and marked off from the fault list. When a fault is detected in any path that is below the threshold, it is not marked off and testing of the fault continues until testing patterns for all the paths of the group falling below the threshold value are simulated. When all the faults paths of the group falling below the threshold have been tested, a separate determined test generation program is activated. In the generated test, the fault is forced to propagate through the longest path above the threshold value.

The present invention relates to testing of complex combinatorial and sequential logic circuits embodied in large scale integration (LSI) and very large scale integration (VLSI) circuit devices.
A fault occurring anywhere in a LSI or VLSI circuit device can have its effect propagated through a number of feedback loops including storage or memory elements in the sequential logic before reaching a testable output of the device. Level sensitive scan design (LSSD) rules were devised to eliminate the complications in testing caused by this propagation through feedback loops. As described by E. B. Eichelberger and T. W. Williams in an article entitled xe2x80x9cA Logic Design Structure for LSI Testabilityxe2x80x9d on pages 462-468 of the Proceedings of the 14th Design Automation Conf., LSSD rules impose a clocked structure on logic circuit memory elements such as latches and registers, and require these memory elements be tied together to form a shift register scan path so that they are accessible for use as test input and output points. Therefore, test input signals can be introduced or test results observed wherever one of the memory elements occurs in the logic circuit. Being able to enter the logic circuit at any memory element for introducing test signals or observing test results, allows the combinational and sequential logic to be treated as much simpler combinational logic for testing purposes thus considerably simplifying test generation and analysis. Patents describing LSSD techniques include U.S. Pat. Nos. 3,783,254; 3,784,907; 3,961,252, 4,513,418 and 5,983,380. The subject matter of these patents and the above described Eichelberger and Williams article are hereby included by reference.
Self-testing has been employed in connection with LSSD to reduce the time it takes to generate the test patterns and to perform the testing. Self-testing involves the use of pseudo-random pattern generators and response compression structures that are built into logic circuit devices. Using such pattern generators and compression structures eliminates the computer time needed to generate the tests and placing these testing elements on the device containing the logic allows the application of vast numbers of test patterns to the circuits in a reasonable period of time.
In the aforementioned U.S. Pat. No. 5,983,380, the shift register latches (SRLs) in the LSSD scan paths perform both input data launching and output data capturing. The test patterns come from the scan path that is configured into a linear feedback shift register (LFSR). The test data is then outputted into a multiple input shift register (MISR) for data compression. Alternate scan path shift cycles are applied to the SRLs exercising the combinational logic with the contents of the SRLs and capturing the results of the response back into the SRLs where they are used as test inputs for the next cycle. At the end of a calculated number of cycles, the contents of the scan path are read out as the signature to be compared with the desired value. Such self-testing is referred to as Logic Built-In Self-Test (LBIST).
Two types of LBIST tests are applied. One is DC-LBIST which uses the stuck-at fault model to generate and simulate the patterns. Another is AC-LBIST which uses the transition fault model to generate and simulate the patterns. In present AC-LBIST test methodology, a series of pseudo random patterns generated from LFSR are fed to logic through SRLs, as described above. During AC-LBIST simulation, when a fault resulting from the application of the pseudo random patterns is detected at a capturing latch, it is marked off from the fault list. That is, the fault is marked off as long as it reaches the capturing latch no matter the length of the path it traveled. Very often that detecting path is a short rather than a long one. As VLSI technology has evolved, increasing chip complexity and speed and shrinking circuit dimensions have made such small AC defects a more serious impediment to proper operation of the circuits being tested.
Therefore, it is an object of the present invention to provide improved LSSD testing methods and apparatus.
It is another object of the present invention to provide for more efficient testing of logic circuits for small AC delay defects.
It is a further object of the invention to provide improved AC-LBIST testing.
In accordance with the present invention for each logic gate in a logic circuit, all paths containing the gate are determined and the paths are classified by their length between input or launch SRL and output or capture SRL. The paths through the logic gate are assigned a single threshold value and then divided into two groups in accordance with their path length classification relative to the threshold value with all paths in each group treated as a single path. A standard LBIST tool is used to apply pseudo random LBIST patterns to the logic circuit. When a fault associated with a logic gate is detected by a capture SRL of a path that is above the threshold, the fault is viewed as tested and marked off from the fault list. When a fault is detected in any path that is below the threshold, it is not marked off and testing of the fault continues until all pseudo random testing patterns for the group falling below the threshold value are performed. When pseudo random testing of the group falling below the threshold is completed, a separate test generation program is activated. In the generated test, the test patterns are forced to propagate through the longest path that is above the threshold value to complete testing for the remaining faults.


A sulfur recovery unit comprising: a reaction furnace configured to carry out a high-temperature Claus reaction between hydrogen-sulfide-containing gas and oxygen-containing gas introduced to the reaction furnace; a sulfur condenser configured to cool reaction gas discharged from the reaction furnace and condense sulfur contained in the reaction gas; and a pipe that connects the reaction furnace to the sulfur condenser, wherein the reaction furnace is fixed to the ground; and the sulfur condenser and the pipe are arranged so as to be able to move relative to the reaction furnace.

Natural gas produced from natural gas wells contains sulfur compounds such as hydrogen sulfide, other sulfides, and thiophene. Crude oil from oil wells also contains sulfur compounds. Hydrocracking of crude oil produces hydrogen sulfide along with light gases. Since sulfur compounds turn into anticatalysts during reaction processes and into sulfur oxides (SOx) when burned, sulfur components are usually separated and recovered and not discharged directly. Because natural gas wells with low sulfur compound contents have been exploited actively first, natural gas currently produced from the remaining natural gas wells has sulfur compound concentrations as high as about 40% by weight.
Hence, gas plants and oil refinery plants are equipped with sulfur recovery units (hereinafter "SRUs") that absorb and separate hydrogen sulfide from natural gas with high hydrogen sulfur contents or from light gas and recover elemental sulfur. Recent SRUs have grown in size to accommodate the increase in sulfur compound concentration.
An SRU includes a reaction furnace configured to carry out a high-temperature Claus reaction. According to a high-temperature Claus reaction, hydrogen sulfide is reacted with oxygen in air at high temperatures to obtain elemental sulfur (S2) and water (H2O) from hydrogen sulfide (H2S). The high-temperature Claus reaction is carried out at a temperature over 850° C.
The reaction furnace also serves as a waste heat boiler (WHB) in order to effectively use reaction heat generated by the Claus reaction. In a WHB, the reaction gas is subjected to primary cooling and heat is recovered as high-pressure steam. Since the reaction gas contains remaining sulfur compounds such as hydrogen sulfide and sulfur oxides, an SRU is further equipped with a reactor configured to heat the reaction gas, which has been subjected to primary cooling, with low-pressure steam to induce a catalytic Claus reaction and convert unreacted hydrogen sulfide into elemental sulfur. Sulfur in the gas that has reacted in the reaction furnace or reactor is cooled to about 140° C. and is recovered as liquid sulfur. An SRU process is, for example, disclosed in Patent literature No. 1.
Since the reaction gas has a high temperature as discussed above, the pipes and devices constituting the SRU expand due to heat as the temperature rises. However, since the displacement thereof is restrained, thermal stresses are generated. Accordingly, measures against thermal expansion have been taken in the pipes and devices constituting the SRU, such as increasing the strength of surrounding portions of nozzles of the devices so that the surrounding portions have a sufficient strength against thermal stresses generated in the nozzle section or installing pipe structures that absorb thermal expansion or contraction so as to decrease thermal stresses generated in the pipe and the nozzle section. Such pipe structures are installed in the middle of pipes and bent into a ring shape so as to absorb the expansion or contraction generated by the temperature difference and are thus called "expansion loops".
FIG. 1 is a diagram illustrating an example of a typical SRU. The SRU in FIG. 1 includes a reaction furnace 1010 for mixing and incinerating hydrogen sulfide (H2S) and air to carry out a high-temperature Claus reaction, a condenser 1020 that cools the reaction gas, and a pipe 1030 that connects the reaction furnace 1010 and the condenser 1020. The pipe 1030 includes an expansion loop 1040. The reaction furnace 1010, the condenser 1020, and the pipe 1030 thermally expand when heated to high temperatures and thermal stresses are generated as a result. Deformation caused by the thermal expansion is absorbed by elastic deformation of the expansion loop 1040 of the pipe 1030 between the reaction furnace 1010 and the condenser 1020. This decreases the thermal stresses applied to the nozzles of devices. In order to avoid excessive deformation due to thermal stresses, the nozzles of the reaction furnace 1010 and the condenser 1020 are designed to have a thickness and strength sufficient to withstand the thermal stresses. In order to ensure there be sufficient elastic deformation in a direction of the thermal expansion or thermal contraction, the expansion loop is provided in a direction orthogonal to the direction of thermal expansion or thermal contraction. In FIG. 1, only one expansion loop is provided. However, two or more expansion loops are desirably provided when the displacement caused by thermal expansion or thermal contraction of the pipe is expected to be large.

Sulfur recovery unit and sulfur recovery method


An air inlet and outlet passage module for desiccation is formed in a hollow structure including a frame and two boards. The frame has a frame channel formed between frame sides and a duct cap on an outer side. The duct cap has an opening communicating with the frame channel and is coupled with an air duct to connect a plurality of air inlet and outlet passage modules in series. The duct cap not being coupled is sealed through a lid. The two boards are located at two corresponding sides of the frame and have a plurality of air vents formed thereon to facilitate air ventilation. Each air vent is formed at a diameter smaller than that of a grain to prevent crops from dropping into the module. The invention can be assembled and disassembled, and coupled in series or parallel easily to enhance drying efficiency and reduce energy waste.

The traditional agricultural society generally adopts sunshine drying to desiccate crops. The harvested crops usually are spread on the road under sunshine for drying, and have to be tumbled frequently by labor power to move the dried crops at the upper side to the bottom. It takes a prolonged period of sunshine, tumbling and wind blowing to dry the crops for preservation.
However, in undesirable environments such as damp or raining weather, or a drying site is difficult to get, or time is urgent for transportation or storage, the crops are easily damped and damaged. Moreover, tumbling grains manually requires a great deal of manpower, and people working in such an environment is easily suffered from heatstroke or sunburn, and the dried crops still need manpower to put them into sacks, transport and store. It leaves a lot to be desired.
With advance of technology, drying systems dedicated for crops have been developed and available on the market. They generally are held in a storage tank. Dry air enters the storage tank from the bottom and damp is expelled from the top of the storage tank. Air is circulated in such a fashion to dry the crops. But in such a drying approach, moisture in the crops is conveyed upwards layer by layer from the bottom of the storage tank to the top, and the moving distance is lengthy and a longer time is needed. Moreover, the crops piled in the storage tank are thicker than the layer adopting the traditional sunshine drying approach, the moisture expelled from the bottom tends to be absorbed by the upper crops before moving to the top. Hence drying effect suffers and energy waste occurs. There is still room for improvement.

Air inlet and outlet passage module for desiccation


A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to a drive transistor, a data loading transistor, a first capacitor for storing data charge, and a second capacitor. During a data programming phase, the data loading transistor may be activated to load in a data value onto the first capacitor. After the data programming phase, the second capacitor may be configured to receive a lower voltage, which extends a threshold voltage sampling time for the pixel. Configured and operated in this way, the temperature luminance sensitivity of the display can be reduced.

This relates generally to electronic devices with displays and, more particularly, to display driver circuitry for displays such as organic light-emitting diode (OLED) displays.
Electronic devices often include displays. For example, cellular telephones and portable computers typically include displays for presenting image content to users. OLED displays have an array of display pixels based on light-emitting diodes. In this type of display, each display pixel includes a light-emitting diode and associated thin-film transistors for controlling application of data signals to the light-emitting diode to produce light. It can be challenging to design a satisfactory OLED display for an electronic device.

Displays with reduced temperature luminance sensitivity


A computer-implemented method for scanning data stored on cloud computing platforms may include (1) identifying a cloud computing service that hosts a plurality of cloud computing instances and a plurality of data volumes that store data for the plurality of cloud computing instances, (2) determining that a data volume within the plurality of data volumes that stores data for a cloud computing instance within the plurality of cloud computing instances is subject to a security scan, (3) detecting a computing system that is external to the cloud computing instance, and (4) performing the security scan on the data volume from the computing system that is external to the cloud computing instance instead of performing the security scan from within the cloud computing instance. Various other methods, systems, and computer-readable media are also disclosed.

Organizations and consumers increasingly use cloud-based services to run applications and store data. Cloud-based computing services may provide a number of benefits to customers, including flexibility, reliability, low capitalization requirements, add-on services, data sharing, and centralized access to data. For example, organizations may quickly create or modify cloud-based computing instances on an as-needed basis to execute applications.
In order to ensure information security, many organizations install security systems on their computing systems to scan data stored by applications executing on those computing systems. Traditional approaches to cloud-based information security may often operate in a similar fashion. For example, organizations may deploy security software within their cloud-based computing instances to scan the cloud-stored data corresponding to each computing instance. Unfortunately, security scanning operations may often be computationally intensive, potentially creating a negative impact on the performance of primary applications executing within the computing instances.
Accordingly, the instant disclosure identifies and addresses a need for additional and improved systems and methods for scanning data stored on cloud computing platforms.

Systems and methods for scanning data stored on cloud computing platforms


A user request processing method and apparatus, using an upstream channel, is provided, in which if a user request of predetermined processing for some predetermined nodes in interactive multimedia contents services, preferably, in an MPEG-4 binary format for a scene (BIFS) scene occurs, the user terminal forms an upstream channel message for the BIFS scene and transmits the message to the server through upstream channels, and the server processes and encodes the corresponding BIFS scene nodes and then transmits the nodes to the terminal. According to the methods and apparatuses, by properly handing events of user requests on partial elements in an arbitrary multimedia content provided for the user as interactive multimedia contents services, predetermined elements can be selectively processed. Therefore, information volume to be transmitted for restoration from an error can be minimized, and the terminal can quickly receive restored information.

1. Field of the Invention
The present invention relates to a system providing bidirectional communication services, and more particularly, to a user request processing method and apparatus using an upstream channel in interactive multimedia contents services.
2. Description of the Related Art
In order to provide various functions for interactive multimedia contents services, in the field for providing bidirectional communication services, for example, in the field of moving picture expert group (MPEG)-4 system (ISO/IEC JTC 1/SC 29/WG11 14496-1), various technologies for enabling those services are being standardized. To satisfy various requirements from users who receive multimedia contents services, those systems are providing functions for each multimedia contents provider processing various events occurring at user's sites, through an upstream channel of each multimedia contents provider.
Between a server (including an encoder) for encoding and managing data on arbitrary object information, and a user terminal (including a decoder) for receiving and restoring the data, two types of channels for transmitting data exist including a downstream channel for transmitting data from the server to the user terminal and an upstream channel for transmitting data from the user terminal to the server. When user's various requests should be processed frequently as in video-on-demand (VOD) or World Wide Web (WWW) environment, an upstream channel are used. That is, the upstream channel is used in a system for providing bidirectional communication services, in which necessary information is immediately provided from a server for services that cannot be processed in a user terminal.
For data, in which errors occurred, on an application which provides only one-way telecommunications services, the processing method from the system side is different from that from the user side. On the system side, the size of a transmission data packet on a channel is checked, or whether or not data error occurred is checked according to the data format types such as a parity bit, in a lower layer of a network, such as a TCP/IP layer. If an error occurred, the server receives the data again for processing the error. However, in this method, it is a problem that logical errors occurred in transmission data or retransmission service in order of importance of data to be restored cannot be provided from the system side. Therefore, to consider this problem, a system for providing bidirectional communication service is needed, in which the user terminal checks errors in the restoration process, and if an error exists, transmits related information for restoring original data to the server through an upstream channel, and then the server restores error-containing data, retransmits the data to the user terminal so that the original data can be restored and errors can be processed.
Meanwhile, an MPEG-4 system providing bidirectional communication services enables the use of an upstream channel provided by each multimedia content provider in processing various events occurring in a user terminal. However, more specifically, for example, in various interactive multimedia contents services such as providing three-dimensional scenes for users, and receiving a request of processing some nodes in a scene from a user, the MPEG-4 system does not propose how to process the user request using the upstream channel.

User request processing method and apparatus using upstream channel in interactive multimedia contents service


In a lithium-ion secondary battery (100), a battery case (300) has sidewalls (300A, 300B) facing toward side ends of a wound electrode body (200), the side ends being at opposite lateral sides of the positive electrode sheet (220), and of the sidewalls (300A, 300B), one of the sidewalls (300A) (positive-electrode-side sidewall) facing toward an uncoated portion (222) of the positive electrode sheet (220) is thicker than the other sidewall (300B) (negative-electrode-side sidewall). In other words, the relationship between the thickness A of the one sidewall (300A) facing toward the uncoated portion (222) of the positive electrode sheet (220) and the thickness B of the other sidewall (300B) is A>B.

The importance of secondary batteries has been increasing in applications as the on-vehicle electric power sources and the electric power sources for personal computers and mobile information terminals. Regarding such secondary batteries, JP 2001-185225 A (Patent Document 1), for example, discloses a lithium-ion secondary battery in which a plurality of oblong cylindrical-shaped battery elements are enclosed in a battery case so that the side faces of the oblong cylindrical shapes are attached to each other, and a heat releasing member is disposed between the battery case and the battery elements.
An example of the secondary battery that is lightweight and achieves high energy density is a lithium-ion secondary battery. The lithium-ion secondary battery is expected to be used suitably for an on-vehicle high-power electric power source. A typical example of the lithium-ion secondary battery includes positive and negative electrodes each having an electrode active material that can absorb and release lithium ions, a separator disposed between them, and a non-aqueous electrolyte solution. A known example of such a lithium-ion secondary battery has a construction in which an electrode assembly (wound electrode body), made by interposing separators between positive and negative electrode sheets and winding them together, is enclosed in a battery case (battery container) with a non-aqueous electrolyte solution, the electrode assembly. This type of battery is disclosed in, for example, JP 2007-18968 A (Patent Document 2).


A multi-function pen includes a cap; a metal body connected with the cap, where a first accommodating cavity is formed between the metal body and the cap, an outer wall of the metal body is provided with a gap for opening a bottle cap, and the gap is disposed below the first accommodating cavity; a light emitting structure accommodated in the first accommodating cavity; a nib in threaded connection with the metal body, where a second accommodating cavity is formed between the nib and the metal body; and a refill accommodated in the second accommodating cavity. The multi-function pen can meet the basic working demands of electricians and woodworkers, and is small, light, convenient to be put in pockets of operators and practical.

In the technical field of mechanical engineering, to meet various demands in practical work, operators usually need to bring a tool kit for various operations. However, the tool kit is generally large, heavy and inconvenient to carry, which is not conducive to work efficiency and safety.
Based on this, we propose a multi-function pen, which meets the basic working demands of electricians and woodworkers, and is small and light enough to be put in pockets of the operators.


An apparatus and a method performing work free from variations among a plurality of work heads having individual differences. A working apparatus includes a number n (a natural number 2 or greater) of work heads, a stage retaining a work object, drive devices moving the stage and the work heads relative to each other in three directions, a work amount measurement device measuring a work amount of each work head, and a control device, wherein the first-direction drive device enables the number n of work heads to be independently moved in a first direction, and the second-direction drive device includes a second-direction main drive device moving the number n of work heads simultaneously in a second direction, and a second-direction auxiliary drive device moving n−1 work heads among the number n of work heads independently in the second direction. A working method is carried out using the working apparatus.

The so-called "multi-piece processing" of forming a plurality of same-type semiconductor devices in a matrix pattern on a comparatively large-sized substrate, e.g., a rectangular substrate having one side of about 500 mm, and then cutting the substrate into the individual semiconductor devices has been increasingly performed in manufacturing of semiconductor devices, etc. In order to manufacture a large number of semiconductor devices, an improvement of productivity is always demanded. In this Description, the term "productivity" is principally assumed to be the number of semiconductor devices processed per unit time.
The most easy and general method of improving the productivity is to install a plurality of same-type manufacturing apparatuses and to perform parallel processing with those apparatuses. However, that method increases the total size of the manufacturing apparatuses and increases the cost.
In view of the above-described situation, it is tried to improve the productivity by mounting a plurality of work heads to one manufacturing apparatus and making the work heads perform the same work at the same time while the size of the manufacturing apparatus is kept substantially same as before. Regarding a liquid material application apparatus, for example, the following techniques of mounting a plurality of discharge devices as the work heads are disclosed.
Patent Document 1 discloses an application apparatus of drawing a desired pattern on an application object by discharging an application material onto the application object from a nozzle of application means, wherein the application apparatus includes a plurality of application means, a moving mechanism moving the application object in accordance with a drawing form of the application material, and control means individually controlling amounts of the application material applied from the plurality of application means.
Patent Document 2 discloses a paste application apparatus comprising an application head discharging a paste toward an application object from a nozzle with rotation of a screw in an amount depending on a rotational speed of the screw, a moving mechanism moving the application object and the application head relative to each other, a detector detecting the amount of the paste applied onto the application object, and means adjusting a relative moving speed between the application object and the application head or the rotational speed of the screw on the basis of the detected application amount to obtain a target application amount, and controlling the application head and the moving mechanism in accordance with the adjusted relative moving speed or the adjusted rotational speed.


An electrical connector is formed from two pairs of contacts. One pair of contacts is rotatable with respect to the other pair of contacts. Both pairs are in conductive and frictional engagement throughout a 90 degree rotational distance. One pair of contacts have an arcuate conductive contact surface, each contact being symmetrically arranged with respect to the axis of rotation, in opposed relation to one another and separated at each end by a non-conductive space. One pair of contacts are attached to a pair of male electrical prongs. The other pair of contacts are attached to an electrical appliance. The one pair of contacts and the attached pair of male electrical prongs are themselves attached to a nonconductive disk. The nonconductive disk is disposed in a circular groove in a disk holder. The nonconductive disk and the pair of contacts and electrical prongs attached thereto are rotatable within the circular groove. Stops are employed to limit the rotational distance to 90 degree. The electrical connector allows an electrical appliance, such as a night light, attached to the connector to be oriented in a desired direction regardless of whether an outlet is vertically or horizontally disposed.

Rotatable electrical connectors which permit movement of one side of the connector with respect to the other side of the connector are known in the art. Typically, such connectors allow for 360 degree rotation of the two sides by the use of concentric annular coaxial contact surfaces and are designed to prevent twisting of cords connected thereto. For example, U.S. Pat. No. 4,583,798 discloses the use of a series of contact rings in alignment with contact elements, all disposed within a shell having an openended cylindrical bore. The contact rings are disposed on a barrel within the bore. The barrel is free to rotate about the bore as the cords attached to either end of the connector exhibit rotational movement, thereby preventing the cords from being twisted and kinked. Electrical contact is continuously maintained between the contact rings and the contact elements throughout the rotational movement.
U.S. Pat. No. 4,753,600 discloses a similar concept employing inner and outer copper circular rings. A pair of opposing plates are rotatably joined together by an axle around which the plates rotate so that during rotation, electrical current passes through both plates without interruption. Thus, for example, a tool being directed in a circular motion can be attached to the connector and can then be used continuously without concern of twisting or effective shortening of the electrical supply cord.
U.S. Pat. No. 4,026,618 discloses an electrical plug which is designed to be mounted to a wall socket. The electrical cord connected to the plug may be rotated to any point around a 360 degree path. Such a plug allows for a low profile (i.e., the plug extends outward a very short distance away from the wall socket) thereby allowing objects such as furniture to be positioned very close to the wall. If an electrical appliance is connected to the plug through the electrical cord, such a design allows the electrical cord to be turned around the plug as the orientation of the electrical appliance to the plug changes. These results are achieved by the use of a rotatable disk plate with concentric annular conductive ridges.
All of these patents have in common the fact that they are designed to allow free movement along a 360 degree path and are not designed to be set or held at any particular angular position.
The problem often arises that the orientation of the plug end of an electrical appliance prevents the use of an adjacent plug within the same electrical box. For example, the most common form of electrical outlet comes in pairs. A rotational feature allows for an electrical appliance such as a night light to make advantageous use of multiple plug electrical outlets, regardless of their original orientation against a wall or along an extension cord. However, in the prior art described above, the lack of a tight frictional contact between the two parts which rotate with respect to one another will not allow the electrical connector to remain in a desired fixed position. Also, any twisting of cords attached to the connector would provide sufficient force to change the connector's orientation. If an electrical appliance were directly attached to the connector, the resting position of the appliance in the outlet would depend upon gravitational forces instead of a desired functionally useful position (e.g., one that does not block other outlets or cause electrical cord to hang over other outlets) or an aesthetically pleasing position.
Certain types of plug-in appliances, such as clocks and lighting fixtures, have a required or preferred orientation but typically are furnished with an electrical plug whose orientation is fixed with respect to the appliance. Electrical wiring codes vary in different parts of the country. Some codes require outlets in the same electrical box to be positioned horizontally with respect to one another while other codes require outlets in the same electrical box to be positioned vertically with respect to one another. Such appliances are readily accommodated by an outlet of a given orientation but are not suitable for use with outlets oriented at 90 degrees from the given orientation.
There is still a need for a rotatable electrical connector which allows for movement between a limited angular range to accommodate different orientations of electrical plugs and outlets, which will stay fixed in a desired position unless physically moved and which can achieve these goals through a design that is simple to fabricate. The present invention fills that need.


A knife has a housing, a blade carrier supported in the housing and adapted to hold a blade, and an actuating element coupled to the blade carrier. A handle can move between a nonactuated position and an actuated position and is coupled to the actuating element such that on movement from the nonactuated position to the actuated position the actuating element displaces the blade carrier from a safety position in which blade mounted on the blade carrier is retracted into a seat of the housing in a first cutting position in which the blade projects out of the housing. A pivot joint connects the actuating element with the blade carrier. A guide supports the blade carrier in a translatory and a rotatable manner on the housing.

Such a knife is known from U.S. Pat. No. 4,713,885. Here, the knife has a blade carrier which is mounted displaceable in a translatory manner within a knife housing and which is moveable between a rear position and a front position by means of a handle. The handle is formed by a lever which is pivotably attached to the housing by means of a joint. Further, a toggle mechanism is pivotably attached to the housing with one end and is pivotably attached to the blade carrier with the other end. The pin joint of the toggle mechanism is guided in an elongated hole of the handle.
The knife is in need of improvement in particular with respect to its safety.


An object of the present invention is to deploy soccer players in optimum positions in a soccer game. As means for achieving this object, a base position and ability parameters of player characters are stored in memory as attribute data. Player character/formation selection means obtain an operating signal from a controller and thereby obtain player character and formation information. Player character deployment means reference the attribute data to determine the optimum positions for the player characters on a soccer field. Game execution means execute the game on the basis of the determined positions.

1. Field of the Invention
The present invention relates to technology for the optimum deployment of characters on a field which is formed in a video game space, data management technology for team data, and technology for forming a model using a montage.
2. Description of the Related Art
In competitive team sports such as soccer, each player is provided with a role (position), and by modifying these positions into arrays (formations) laid out in predetermined configurations, the positions are made to correspond to the conditions of a match. In soccer, there are formations such as a 4-4-2 formation, which lays emphasis upon defense by deploying 4 defenders (DF) at the rear, 4 midfielders (MF) in midfield, and two forwards (FW) up-front, or a 3-4-3 formation which lays emphasis upon attack by deploying 3 DFs at the rear, 4 MFs in midfield, and 3 FWs up-front. These formations are selected according to the opponent, the aptitude of the players on the team, the match plan and so on.
Among conventional soccer video games simulating the real sport, there have been disclosed games with a system for such formations which can be set by a game player. In the setting method of the formation system in a conventional soccer game, first the player characters who are to take part in a match and the formation of the players are selected, after which setting is performed for each player character to determine which player will be deployed in each of the positions laid out in accordance with the selected formation. According to this method, however, the game player must set all of the positions for a maximum of 11 players (in the case of a soccer game) manually, which is complicated.
In order to solve such a problem, a so-called automatic deployment system is known, this system being constituted such that the positions in each formation and each individual player character are allotted corresponding internal reference numbers such that when a player character and a formation are selected, the reference numbers of the selected player characters and the reference numbers of the positions in each formation are referenced in order to deploy each player character in positions on the field corresponding to the respective positions in the selected formation. In this automatic deployment system, the base position of each player character is noted, and player numbers are allocated to player characters for each of the respective positions. For example, player numbers FW1 to FWn are allocated to n number of FW player characters, player numbers MF1 to MFm are allotted to m number of MF player characters, and player numbers DF1 to DFk are allocated to k number of DF player characters. Reference numbers are also allocated to each position in each of the formations. For example, the position numbers F1 to Fp are allocated to the FW positions, M1 to Mq are allocated to the MF positions, and D1 to Dr are allocated to the DF positions. Here, p+q+r=10.
Then, when the game player selects the player characters who are to take part in the match and the formation, the player numbers and position numbers are referenced, whereby the player characters are automatically deployed in the desired positions. When, for example, a game player selects FW1 and FW3, MF1, MF2, MF4 and MF6, DF1, DF2, DF3 and DF5 as player characters and selects a 4-4-2 formation as the match array, the player characters are deployed in order of player number in the position with the smallest number onward, such that player character FW1 is deployed in position F1, player character FW3 is deployed in position F2, player character MF1 is deployed in position M1, and so on.
However, in a conventional automatic deployment system, the deployment of the player characters in each position consists of nothing more than simply deploying the player characters in order of player number in the position with the smallest number onward. Thus, player deployment is performed in a manner inconceivable in real soccer, without consideration of the abilities and aptitude of the individual player characters. This may cause the game player to lose interest. To explain according to the aforementioned example, if MF6 is right-footed, then the right foot ought to be used to hit a back pass accurately toward the center of the field, and therefore a position on the right side of the field, in other words M1 or M2, is desirable. However, according to the aforementioned example, MF1, MF2 and MF4 are deployed in positions M1 through M3, and therefore MF6 is deployed in position M4 on the left side of the field and is unable to exploit his abilities.
This kind of problem becomes even worse when the number of player characters selected differs from the number of positions established for each formation since proper deployment cannot be conducted. For example, if a 4-3-3 formation is selected as the match array, regardless of the player characters selected as above, a situation arises in which 1 FW is lacking and 1 MF is lacking, and therefore 1 MF must move to an FW position. It is desirable to move an MF player character who possesses good attacking ability and judgment ability as an FW to the FW position, but since the conventional automatic deployment system does not take into consideration the base positions, ability values, dominant feet and so forth of the individual player characters, positioning is carried out simply on the basis of a reference number. As a result, inappropriate positioning, such as deploying the MF with the lowest number as an FW, is carried out without due consideration.
Furthermore, even if the number of selected player characters correctly corresponds to the formation system, the number of player characters to be deployed in each of the positions will change if the formation system is modified, and thus the same problem will arise. In any case, it is necessary for the game player to perform a manual resetting operation in order to deploy the players in more suitable positions, but complicated to do so. In order to avoid these problems, a further method has been considered in which ideal player deployments in all of the formations are preset in respect of all of the player characters in all of the teams that are set in the game system. However, since this would expand the amount of data, it is unrealistic.
A conventional soccer game has also been disclosed in which the team formation, starting members, the personal appearance, names, base positions, ability values and so on of the player characters can be created using an editing mode. However, since the edited data are set so as to be overwritten in succession onto the same file, editing cannot be performed easily. Further, saving a plurality of edited data created by the game player so as to be usable has not been considered.
A conventional soccer game has also been disclosed in which polygons (parts) constituting a part of the faces of the player characters, such as the eyes, nose, and mouth, are assembled so as to create a favored face by means of a montage system, whereupon these faces are morphed to create various facial expressions. However, in a conventional montage, the magnitudes, shapes and so on of the polygons are preset, and therefore couplings among polygons are limited, making it difficult to create an individual face with a small amount of data. Moreover, when an attempt is made to render a moving facial expression by shifting the vertex of each polygon to fix an expression on a face, the degree of freedom is small, and it is therefore difficult to render richly expressive faces. Furthermore, if one considers that in the case of a soccer game, there are as many as 60 teams entering tournament games, league games1 and so on, and approximately 20 player characters per team, the total is near 1200 player characters, and thus the amount of polygon data expands. It is therefore necessary to develop technology for creating a large number of richly expressive faces with a small amount of data.
It is therefore an object of the present invention to disclose technology for a competitive team sports game which enables the positioning of player characters on a field to be determined on the basis of the attributes and abilities of the individual player characters. It is also an object of the present invention to disclose technology for a competitive team sports game which ameliorates the creation, inspection and so on of edit data for a team. It is a further object of the present invention to disclose technology for creating expressive objects using a small amount of data.

Method and computer-readable medium for deploying characters in a game


A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.

Signaling rate advances continue to outpace core access time improvement in dynamic random access memories (DRAMs), leading to memory devices and subsystems that output ever larger amounts of data per access in order to meet peak data transfer rates. In many cases, the increased data output is achieved through simple extension of the output burst length; the number of data transmissions executed in succession to output data retrieved from a given location within the memory core. FIGS. 1A-1C illustrate this approach within a prior-art memory system 100 formed by memory controller 101 and memory module 103. Memory module 103 includes two sets of memory devices, shown in grouped form as memory devices A and memory devices B, with all the memory devices coupled to a shared command/address path (CA), shared clock line (CLK) and shared chip-select line (CS), and with memory devices A coupled to a first set of data lines, DQ-A, and memory devices B coupled to a second set of data lines, DQ-B. Referring to FIG. 1B, the memory controller initiates a memory access by outputting a row activation command (ACT) and column access command (RD) and associated row and column address values onto the command/address path during successive cycles, 0 and  1, of a clock signal (Clk), asserting the chip-select signal (i.e., CS=1) during both clock cycles. All the memory devices (i.e., memory devices A and memory devices B) respond to assertion of the chip-select signal by sampling the command/address path during clock cycles 0 and 1 to receive the row activation command and the column access command, collectively referred to herein as a memory access command. Thereafter, each of the A and B memory devices responds to the memory access command received during clock cycles 0 and 1 by activating the address-specified row within the memory core, then retrieving read data from the address-specified column within the activated row. Accordingly, some time, TRD, after receipt of the memory access command, the read data values retrieved within each of the A and B memory devices are output in parallel data burst sequences (i.e., with each transmission within the burst sequence being consecutively numbered, 0-3) on data lines DQ-A and DQ-B during clock cycles 4 and 5. By this operation, memory access transactions may be pipelined so that the memory access command for a given transaction is transmitted simultaneously with data transmission for a previously-transmitted memory access command. Because the data burst length (sometimes called "prefetch") matches the memory access command length, the command/address and data path resources may be fully utilized during periods of peak data transfer.
FIG. 1C illustrates a timing arrangement that may result as the data and command signaling rates are doubled relative to the core access time. As shown, the amount of data retrieved from the memory core is doubled in order to meet the increased bandwidth of the data interface, thereby extending the data burst length by an additional two clock cycles (i.e., as shown by transmissions 4-7 during clock cycles 6 and 7) on data lines DQ-A and DQ-B and doubling the granularity of the memory access. The extended burst length and resulting increased access granularity produces two potentially undesirable effects. First, because the trend in a number of data processing applications is toward finer-grained memory access, the increased data burst length may result in retrieval and transmission of a substantial amount of unneeded data, wasting power and increasing thermal loading within the memory devices. Additionally, utilization of the command/address and data path resources is thrown out of balance as the extended burst length prevents memory access commands from being transmitted back-to-back (i.e., in successive pairs of clock cycles) and thus results in periods of non-use on the command/address path.

This patent is subject to a terminal disclaimer.

Memory module with reduced access granularity


A portable telephone device has a long-range wireless communication function and a short-range wireless communication function for communicating with an external adapter. The quality of short-range communication with the external adapter is monitored during the long-range communication. When the quality of short-range communication has been deteriorated, a message indicative of short-range communication deterioration is transmitted to the party on the other end of line. Voice data received from the party on the other end of line in response to the message is recorded onto a data memory.

1. Field of the Invention
The present invention relates to a portable telephone terminal having an external adapter connected thereto through a short-range wireless link and in particular to communication control techniques for the portable telephone terminal and the external adapter.
2. Description of the Related Art
In recent years, a portable telephone device such as a cellular phone has become used not only as a telephone but also as a sophisticated information terminal having various additional functions, for example, browsing information on the Internet, e-mail transmission/reception and the like. However, voice communication is still of essential importance to such portable telephone devices.
To ensure ease in carrying, a portable telephone device becomes smaller in size. But smaller size makes a portable telephone device inconvenient to use because the distance between a microphone (transmitter) and a speaker (receiver) thereof is also made shorter.
One solution to such a problem is to employ a headset having an earphone and transmitter therein, which is connected to the portable telephone device by radio.
Japanese Patent Application Unexamined Publication No. 11-220765 discloses a combined mobile communication device. A mobile communication device is formed by combining a main unit with a radio transceiver, a voice input/output device having an earphone-microphone therein and other components, which are individual units connected to the main circuit unit by wireless interfaces.
Japanese Patent Application Unexamined Publication No. 2002-33824 discloses a portable communication device equipped with a radio transmitter for communication with a base station and a BlueTooth® transmitter for data communication directly with another portable communication device. In this conventional portable communication device, the remaining amount of battery is monitored and, when it drops below a predetermined threshold level, data transmission by the BlueTooth transmitter is terminated so as to avoid destroying important data to be transferred from a master to a slave.
However, in the case of a portable telephone device having a handset connected thereto by a short-range radio communication link, a problem arises when the communication quality of a radio channel to the handset has been deteriorated. When the quality of the short-range radio communication is reduced due to some reason, for example, a failure of the portable telephone device, the voice communication with the base station is also made difficult. In such a case, the base station is not expected to do channel disconnection processing or the like. It is necessary for the portable telephone device or the handset to handle such a problem.
The above conventional portable communication device equipped with the radio transmitter and the BlueTooth transmitter cannot handle such a problem of deteriorating the quality of short-range radio communication link because it looks at only the remaining amount of battery.

Portable telephone device and external adapter connected by a short-range wireless link


A measurement system for measuring an input electrical current (Ics) from a current source (CS) and generating a current measurement signal, comprising a current measuring circuit (70) having a first input terminal (72) connected to the current source and an output terminal (74) for providing the current measurement signal. The current measuring circuit further comprises one or more power supply terminals (75, 76) arranged to receive one or more voltages from a power supply (77a, 77b) for powering the current measuring circuit. The current measuring circuit also comprises a first voltage source (VD) coupled to the one or more power supply terminals, the first voltage source providing a disturbance voltage to the one or more power supply terminals, the disturbance voltage representing a voltage at the first input terminal.

1. Field of the Invention
The present invention relates to a capacitive sensor for measuring distance, in particular capacitive sensor for measuring distance to a target in a lithography apparatus.
2. Description of the Related Art
In many applications it is important to measure an electrical current very precisely. For example, charged particle and optical lithography machines and inspection machines for example, typically require highly accurate measurement of the distance from the final lens element of the machine to the surface of a wafer or other target to be exposed or inspected. These machines and others with movable parts often require precise alignment of various parts which may be achieved by measuring distance from the moveable part to a reference point. Capacitive sensors may be used in such applications requiring fine position or distance measurement. When a capacitive sensor is energized, an electrical current flows through the sensor which varies in dependence on the distance between the sensor element and an opposing surface. A precise measurement of this current may be used to accurately determine the measured distance.
To measure an electric current, a measurement circuit may be used having the current to be measured as the input and providing a measurement signal as an output, often in the form of a voltage which may be further processed and converted to a digital signal. There are several factors which contribute to errors in such measurement circuits. These include stray impedance in the input circuitry of the measuring circuit, a limited common mode rejection ratio (CMRR) of the input circuitry, and inaccuracy on the transfer function of the measurement circuit independent of common mode. The value of such stray impedance may change, e.g. depending on factors such as temperature, and disturbances on the input may also change with time. This makes it difficult to compensate for these effects.
It is often necessary to locate the electronic measurement circuits used for driving the capacitive sensors and for generating the desired measurement signals at a distance from the sensors due to the inhospitable environment in which the sensors are located or lack of a suitable place to locate the circuits close to the sensors. In modern lithography applications such as EUV and charged particle systems, the sensors are typically located in a vacuum environment that is very sensitive to contaminants and outside disturbances, and which creates problems with heat removal from electronic circuits if they are located in the vacuum environment, and impedes access for maintenance for such circuits.
The wiring connections between the sensors and remotely located driving and measurement circuits introduce parasitic capacitances into the system which affect the reading of the sensor. If the measuring circuits could be located at the sensor probe, the sensor current could be measured directly and accurately. Because of these parallel parasitic capacitances introduced by the cabling system, measurement of current flow in the sensor is often avoided in systems with remotely located measuring circuits. Conventional solutions introduce measurement errors which need to be taken into account, usually by calibrating the combined sensor and wiring installation. The longer the wiring connection, the more severe these problems become.
The requirement to calibrate the sensors in combination with the sensor wiring reduces flexibility in designing and building sensor systems and increases their cost, and it adds a requirement for recalibration whenever a sensor or its wiring is replaced, making such a replacement complex, time-consuming, and expensive.


An arbitration system for a shared address, data and control bus provides burst mode operations for transferring data between a peripheral device and memory via a bus master. The arbitration system is responsive to high priority bus activities, such as memory refresh cycles and DMA cycles to temporarily transfer control of the shared bus from the bus master to a circuit controlling the high priority activity. After the high priority activity is completed, the arbitration system returns control of the shared bus to the bus master so that the associated peripheral device may continue operating in the burst mode. This transfer of control occurs without requiring the time overhead of arbitrating priority between bus masters having active bus requests. The arbitration system further includes timing circuits to assure that a bus master transferring data in the burst mode does not retain control of the shared bus for an excessive amount of time.

1. Field of the Invention
The present invention is related to microprocessor-based computers, and, more particularly, to computers having a shared address, data and control bus for providing access to a memory storage unit to store instructions and data therein and to retrieve instructions and data therefrom. Specifically, the present invention is related to bus arbitration units that determine which of many devices is granted access to a shared bus, such as an AT-type shared bus as used in an IBM.RTM. PC-AT or a compatible computer system.
2. Description of the Related Art
There are many types of computers ranging in size and performance from relatively inexpensive hand-held calculators to large and powerful "mainframe" computers costing millions of dollars. The present invention relates to a type of computer system that is commonly referred to as a microprocessor-based computer system and is often referred to as a "personal computer", or PC, although such microprocessor-based computer systems are used more and more frequently in business, industry, government and other applications where minicomputers and smaller mainframe computers were previously used. As used herein, a microprocessor-based computer system refers to a computer system that comprises a mass-produced integrated circuit microprocessor, such as, for example, the Intel.RTM. 80.times.86 family (i.e., the 8086, the 80286, the 80386, and other integrated circuits). The integrated circuit microprocessor provides the computational power for such a computer system, but it will be understood by one skilled in the art that the successful operation of such a computer system depends upon a number of supporting circuits that control the data inputs and outputs to and from the microprocessor and that provide the microprocessor with sequences of instructions to perform.
In a typical computer system based upon the 80286 microprocessor, for example, the memory of the computer system is the focal point of the system rather than the microprocessor. The microprocessor retrieves instructions and data from the memory and stores data into the memory. The memory of the computer system typically comprises read-only memory (ROM) that is non-volatile and that provides the microprocessor with instructions when the computer system is first powered up or immediately after the computer system is reset. The memory of the computer system also includes random access read/write memory (RAM) that provides substantially larger amounts of data storage. In addition to the microprocessor, various other devices, such as a floppy disk controller, transfer data directly to and from the memory.
In some larger computer systems, such as many mainframe computers, the memory was a separate unit from the processor and other devices that used the memory. In order to provided access to the memory, each of the users, including the processor, is provided with a port to the memory by which address and data are transferred to and from the memory. The memory unit typically has its own control unit to select the device to be provided access at any one time and to provide any necessary memory management functions, such as memory refresh, as in the case of dynamic RAM. Access to the memory in such a manner is commonly referred to as direct memory access (DMA), and this term is generally used to refer to as providing access to the memory without having to transfer data through the microprocessor. For example, in many input/output devices, such as a disk drive, the data transfer rates are often too fast to be handled by the processor. Furthermore, the overhead of having the processor handle the input and output is undesirable as the processor in such large mainframe systems can continue to process other data, perhaps to and from another bank of memory.
In the considerably smaller microprocessor-based computer systems that are the subject of the present application, the memory of the computer system is not a separate unit. Rather, the memory typically resides in the same enclosure as the microprocessor and other devices and is coupled to the microprocessor and other devices by a shared address, data and control bus. As is well known in the art, the address, data and control bus is the heart of the entire computer system. In order for the microprocessor to operate, it must apply the address of an instruction to the shared bus and receive an instruction or series of instructions from the memory via the same shared bus. Thereafter, during the course of executing an instruction, the microprocessor will typically transfer bytes of data to and from the memory via the same shared bus. Furthermore, as set forth above, other devices, such as a floppy disk controller, or the like, transfer data directly to and from the memory via the same shared bus. Finally, the typically read/write memory in a microprocessor-based computer system is dynamic memory. Such a memory retains the data stored therein for only a short amount of time unless the data is "refreshed" by periodically accessing certain sequential addresses in the integrated circuits that comprise the dynamic memory in so-called refresh cycles. Although data is generally not transferred to and from the memory during these refresh cycles, it is necessary in some systems to apply an address to the shared bus as part of a refresh cycle. The microprocessor-based computer system includes refresh circuitry that controls the timing and selection of addresses to periodically refresh the dynamic memory circuits.
In order to provide access to the memory by each of the users (i.e., the microprocessor, the refresh circuitry, the floppy disk controller, and other users), each of the users includes bus interface circuits that are connected to the bus at the same time, but which are activated at different times so that only a single user can affect the contents of the bus. Frequently, such interface circuits are so-called tri-state circuits that have an active state in which they operate to apply one of two logic levels to the shared bus and have an inactive state in which they present a high impedance to the shared bus and thus have no effect on the operation of the bus.
In order to assure that the interface circuits from only one user are active at any one time, a typical microprocessor-based system includes a bus arbitration circuit that receives bus requests from the users connected to the bus and selects one of the users to control the bus at any one time. When a user is granted control of the shared bus, the user operates in conjunction with the memory timing to apply addresses to the shared bus and to transfer data to or receive data from the memory via the shared bus.
It should be understood that in most microprocessor-based computer systems the microprocessor is the most intensive user of the shared bus. Thus, in the Intel 80.times.86 family of microprocessors, the microprocessor includes control signals that determine whether the microprocessor is exerting control over the shared bus or is relinquishing the shared bus to other users. In particular, the microprocessor and its associated clock and timing circuitry includes a HOLD control signal input which can be activated by a bus arbitration circuit, or the like, to indicate that another user is requesting access to the shared bus, and includes a HLDA (hold acknowledge) control signal output that indicates that the microprocessor has finished its current cycle and is willing to relinquish the shared bus, at least temporarily. When the HLDA control signal is received, the bus arbitration circuit grants control of the shared bus to the requesting user having the highest priority (e.g., the refresh circuit, the floppy disk controller circuit, and so on).
The foregoing bus arbitration scheme is sometimes referred to as "cycle stealing" because the bus arbitration circuit is stealing a memory cycle from the microprocessor and granting the memory cycle to another user on the shared bus. In known shared bus arbitration schemes, such cycle stealing is performed only one or a few cycles at a time. For example, the microprocessor has the control of the bus returned to it after the requesting user has accessed the bus for one or more predetermined memory cycles. This system of limiting the grant of the bus to only one or a few memory cycles has been used in known systems a means of preserving the operational integrity of the microprocessor-based computer system. If a user other than the microprocessor is granted control of the shared bus for an extended amount of time (i.e., a large number of memory cycles), the microprocessor would no longer have any control over the operation of the entire system. By returning control of the shared bus to the microprocessor on a periodic basis, the microprocessor can monitor the activities of the other users. More importantly, the microprocessor can process time critical data, such as clock interrupts, and the like.
Although the cycle-stealing arbitration system described above, has the advantage of being relatively immune from system failure caused by the loss of the shared bus by the microprocessor, such arbitration systems suffer from excessive time overhead. In other words, the time required for the bus arbitration circuitry to recognize a request from a user and send the HOLD control signal to the microprocessor; the time required for the microprocessor to recognize the HOLD control signal, finish its current cycle, relinquish the shared bus, and activate the HLDA control signal; the time required for the bus arbitration circuitry to grant control of the shared bus to the requesting user is lost time which becomes significant when accumulated over a large number of user requests. Furthermore, in systems having more than one user other than the microprocessor and the refresh circuitry, the other users must continually vie for priority to use the shared bus. Thus, in microprocessor-based computer systems, such as an AT-type computer system, where the memory refresh operation uses the shared bus, the so-called burst mode of data transfer, in which large quantities of data are transferred to and from the memory, is effectively unknown. Rather, such data is transferred one or two bytes at a time on a cycle stealing basis. The DMA provided by exemplary microprocessor-based computer systems is notoriously slow. In many microprocessor-based systems, the DMA is sufficiently slow that large amounts of data at high data rates, such as to and from a hard disk drive, are transferred through the microprocessor using programmed input and output rather than using the DMA provided by the known bus arbitration circuitry.
Thus, it can be seen that a need exists for an improved bus arbitration circuit that will provide faster and more efficient access to the shared address, data and control bus while maintaining the operational integrity of the microprocessor-based computer system.

Shared memory bus system for arbitrating access control among contending memory refresh circuits, peripheral controllers, and bus masters


The finishes of the present invention consist essentially of metal alloys having the general formula: EQU T.sub.a Cr.sub.b Zr.sub.c B.sub.d M.sub.e M'.sub.f X.sub.g I.sub.h(I). in which a+b+c+d+e+f+g+h=100 atomic percent;. T is Ni, Co, Ni--Co or any combination of at least one of Ni and Co with Fe, wherein 3<Fe<82 at. % and 3<a<85 at. %; PA1 M is one or more elements of the group consisting of Mn, Cu, V, Ti, Mo, Ru, Hf, Ta, W, Nb, Rh, wherein 0<e<12 at. %; PA1 M' is one or more rare earths, including Y, wherein 0<f<4 at. %; PA1 X is one or more metalloids of the group consisting of C, P, Ge and Si, wherein 0<g<17 at. %;. I represents inevitable impurities, wherein h<1 at. %, and 5.ltoreq.b.ltoreq.25, 5.ltoreq.c.ltoreq.15, and 5.ltoreq.d.ltoreq.18.. Powders obtained from these alloys that are deposited on substrates by thermal projection provide finishes having increased hardness in addition to high ductility and excellent resistance to corrosion. The finishes are suited for applications including hydraulic equipment.

This invention relates to amorphous alloy-based metallic finishes which are resistant to wear and corrosion, processes for obtaining these finishes, and suitable applications for using these finishes to provide anti-wear surfaces, and particularly in hydraulic equipment.
In the following description, these metallic finishes will be primarily described by reference to their applications onto metal substrates. It is, however, within the scope of the present invention to apply these metallic finishes to non-metal substrates such as wood, paper, synthetic substrates and the like.
Solutions are being sought in numerous fields to overcome the problems associated with wear due to abrasive erosion, scoring and friction in aggressive surroundings, and cavitation. These particular problems are especially severe in hydraulic equipment such as turbines.
The materials presently being used are generally hard, but they are fragile and accordingly their users are seeking materials which provide the following improved combination of properties: (1) increased hardness to resist the harmful effects of erosion, friction and scoring; (2) high ductility to resist shocks and minor deformations; and (3) homogeneous structures to assure uniform high corrosion resistance.
The materials which are presently available, such as steels having high mechanical properties, stellite, ceramics, and the like, do not have all these properties. In particular, those materials having high corrosion resistance have insufficient mechanical properties.
One of the solutions so far for obtaining materials having a satisfactory compromise of these contradictory properties has been metal alloys having amorphous structures that have been obtained by rapid cooling techniques.
The amorphous alloys that have so far been used are essentially in the form of thin strips obtained by casting methods or very thin deposits obtained by electrochemical methods.
The thermal projection methods and, for example, the arc-blown plasma method, have not yet enabled the obtaining of completely amorphous alloys at the level of X-ray diffraction in the form of thick (i.e., >0.5 mm) powder deposits on surfaces as large as several square meters.
Among the various known amorphous alloys are the iron-based metal/metalloid alloys (Fe--B or Fe--Cr--P--B alloys) which have provided the best mechanical properties. However, none of these alloys have satisfied the contradictory requirements of increased mechanical resistance, corrosion resistance and high ductility.

Amorphous alloy-based metallic finishes having wear and corrosion resistance