text:
|Publication number
|Publication type
|Application number
|Publication date
|Mar 20, 2012
|Filing date
|Jun 26, 2007
|Priority date
|Jun 26, 2007
|Fee status
|Also published as
|Publication number
|Ralph E. Bellofatto, Matthew R. Ellavsky, Alan G. Gara, Mark E. Giampapa, Thomas M. Gooding, Rudolf A. Haring, Lance G. Hehenberger, Martin Ohmacht
|Original Assignee
|International Business Machines Corporation
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (110), Non-Patent Citations (14), Referenced by (6), Classifications (6), Legal Events (5)
|External Links: USPTO, USPTO Assignment, Espacenet
The U.S. Government has a paid-up license in this invention and the right in limited circumstances to require the patent owner to license others on reasonable terms as provided for by the terms of Contract. No. B554331 awarded by the Department of Energy.
The present invention is related to the following commonly-owned, co-pending U.S. patent applications filed on even date herewith, the entire contents and disclosure of each of which is expressly incorporated by reference herein as if fully set forth herein. U.S. patent application Ser. No. 11/768,777, for "A SHARED PERFORMANCE MONITOR IN A MULTIPROCESSOR SYSTEM"; U.S. patent application Ser. No. 11/768,645, for "OPTIMIZED COLLECTIVES USING A DMA ON A PARALLEL COMPUTER"; U.S. patent application Ser. No. 11/768,781, for "DMA SHARED BYTE COUNTERS IN A PARALLEL COMPUTER"; U.S. patent application Ser. No. 11/768,784, for "MULTIPLE NODE REMOTE MESSAGING"; U.S. patent application Ser. No. 11/768,697, for "A METHOD AND APPARATUS OF PREFETCHING STREAMS OF VARYING PREFETCH DEPTH"; U.S. patent application Ser. No. 11/768,532, for "PROGRAMMABLE PARTITIONING FOR HIGH-PERFORMANCE COHERENCE DOMAINS IN A MULTIPROCESSOR SYSTEM"; U.S. patent application Ser. No. 11/768,857, for "METHOD AND APPARATUS FOR SINGLE-STEPPING COHERENCE EVENTS IN A MULTIPROCESSOR SYSTEM UNDER SOFTWARE CONTROL"; U.S. patent application Ser. No. 11/768,547, for "INSERTION OF COHERENCE REQUESTS FOR DEBUGGING A MULTIPROCESSOR"; U.S. patent application Ser. No. 11/768,795; for "DMA ENGINE FOR REPEATING COMMUNICATION PATTERNS"; U.S. patent application Ser. No. 11/768,799, for "METHOD AND APPARATUS FOR GRANTING PROCESSORS ACCESS TOA RESOURCE"; U.S. patent application Ser. No. 11/768,800, for "METHOD AND APPARATUS FOR EFFICIENTLY TRACKING QUEUE ENTRIES RELATIVE TO A TIMESTAMP"; U.S. patent application Ser. No. 11/768,572, for "BAD DATA PACKET CAPTURE DEVICE"; U.S. patent application Ser. No. 11/768,593, for "EXTENDED WRITE COMBINING USING A WRITE CONTINUATION HINT FLAG"; U.S. patent application Ser. No. 11/768,805, for "A system and method for PROGRAMMABLE BANK SELECTION FOR BANKED MEMORY SUBSYSTEMS"; U.S. patent application Ser. No. 11/768,905, for "AN ULTRASCALABLE PETAFLOP PARALLEL SUPERCOMPUTER"; U.S. patent application Ser. No. 11/768,810, for "DATA EYE MONITOR METHOD AND APPARATUS"; U.S. patent application Ser. No. 11/768,812, for "A CONFIGURABLE MEMORY SYSTEM AND METHOD FOR PROVIDING ATOMIC COUNTING OPERATIONS IN A MEMORY DEVICE"; U.S. patent application Ser. No. 11/768,559, for "ERROR CORRECTING CODE WITH CHIP KILL CAPABILITY AND POWER SAVING ENHANCEMENT"; U.S. patent application Ser. No. 11/768,552, for "STATIC POWER REDUCTION FOR MIDPOINT-TERMINATED BUSSES"; U.S. patent application Ser. No. 11/768,527, for "COMBINED GROUP ECC PROTECTION AND SUBGROUP PARITY PROTECTION"; U.S. patent application Ser. No. 11/768,669, for "A MECHANISM TO SUPPORT GENERIC COLLECTIVE COMMUNICATION ACROSS A VARIETY OF PROGRAMMING MODELS"; U.S. patent application Ser. No. 11/768,813, for "MESSAGE PASSING WITH A LIMITED NUMBER OF DMA BYTE COUNTERS"; U.S. patent application Ser. No. 11/768,619, for "ASYNCRONOUS BROADCAST FOR ORDERED DELIVERY BETWEEN COMPUTE NODES IN A PARALLEL COMPUTING SYSTEM WHERE PACKET HEADER SPACE IS LIMITED"; U.S. patent application Ser. No. 11/768,682, for "HARDWARE PACKET PACING USING A DMA IN A PARALLEL COMPUTER"; and U.S. patent application Ser. No. 11/768,752, for "POWER THROTTLING OF COLLECTIONS OF COMPUTING ELEMENTS".
1. Field of the Invention
The present invention generally relates to computer systems generally, and, more particularly, to a novel implementation of a system and method for performing debugging operations of digital chips implemented in computer systems that is subject to software or hardware failures.
2. Description of the Prior Art
While bringing up an electronic system, the root cause for any given bug needs to be determined. In some cases, it is very hard to determine whether the hardware or the software is at fault. If the suspicion is on the hardware (or on very subtle interactions between the software and the hardware), conventional methods of debugging use probes external to the chips (such as oscilloscopes or logic analyzers). These probes give only a limited view of the state internal to the chips. To get a better view of the logical state and its evolution in time, several prior microprocessor designs have invested chip area in trace arrays. This additional chip area for trace arrays is useful in chip bring-up and debug, but adds cost to every production chip, where the trace array goes unused. While a definite improvement over external probing by logic analyzers, trace arrays still only give a limited view of the internal state of the microprocessor. This limitation stems both from the limited set of pre-selected on-chip signals that can be routed to the trace array (as determined and fixed at design time), and from the limited depth of any hardware-implemented array, so that the selected signals can be followed only for a limited length of time.
It would be highly desirable to provide a system and method for facilitating the debugging of various IC chips, by allowing the user to construct a cycle-by-cycle view of a very large part of the state of a digital chip, without design-imposed limitations on signal selection, and at a minimal overhead in chip area and cost.
Further desirable would be to provide a system and method for facilitating the debugging of various IC chips, by allowing the user to construct a cycle-by-cycle view of a very large part of the state of a digital chip that are under control of software.
It is therefore an object of the present invention to provide a novel system and method for facilitating the debugging of various IC chips, by allowing the user to construct a cycle-by-cycle view of a very large part of the state of a digital chip that are under control of software.
That is, the present invention teaches a technique for constructing a cycle-by-cycle view of any part of the state of a digital chip, using a combination of on-chip circuitry and software. The chip state can be followed for a length of time that is limited only by the amount of storage space of external computers. The subset of the digital chip state to be viewed is not subject to pre-determined restrictions (such as special on-chip wiring), other than that the state is contained in scannable latches, such as commonly already required for manufacturing test of the chip.
In one advantageous embodiment of this invention, flexibility is provided for enabling choice of the chip state of interest at bring-up time (as opposed to at design time). The lack of restrictions (other than data volume) for the length of time over which the chip state can be followed is another principal advantage of this invention.
The additional on-chip circuitry required to implement this invention constitutes only minimal additional chip area, as it is largely shared with existing Logic Built In Test (LBIST) circuitry for chip manufacturing test.
Accordingly, in one embodiment of the invention, there is provided an apparatus and method for evaluating a state of an electronic chip in a computing system having a plurality of integrated circuits (ICs), each IC including one or more processor elements for controlling operations of IC sub-units, and each the IC supporting multiple frequency clock domains. The method comprises:
generating a synchronized set of enable signals in correspondence with one or more IC sub-units for starting operation of one or more IC sub-units according to a determined timing configuration;
counting, in response to one signal of the synchronized set of enable signals, a number of main processor IC clock cycles; and,
upon attaining a desired clock cycle number, generating a stop signal for each unique frequency clock domain to synchronously stop a functional clock for each respective frequency clock domain; and,
upon synchronously stopping all on-chip functional clocks on all frequency clock domains in a deterministic fashion, scanning out data values at a desired IC chip state.
According to a further embodiment of the invention, there is provided an apparatus for evaluating a state of an electronic chip in a computing system having a plurality of integrated circuits (ICs), each IC including one or more processor elements for controlling operations of IC sub-units, each said IC supporting multiple frequency clock domains, the apparatus comprising:
a first circuit means for generating a synchronized set of enable signals in correspondence with one or more IC sub-units for starting operation of one or more IC sub-units according to a determined timing configuration;
a second circuit means responsive to one signal of the synchronized set of enable signals to start counting a number of main processor IC clock cycles and, upon attaining a desired clock cycle number, generating a stop signal for each unique frequency clock domain to synchronously stop a functional clock for each respective frequency clock domain,
wherein all on-chip functional clocks are synchronously stopped on all frequency clock domains in a deterministic fashion to place the IC in a state for scanning out IC chip state data values from the IC.
Advantageously, while the invention is described in the context of a microprocessor chip, the invention can be broadly applied to many other digital chips.
The objects, features and advantages of the present invention will become apparent to one skilled in the art, in view of the following detailed description taken in combination with the attached drawings, in which:
Referring now to drawings, and more particularly to
A control system software running on an external computer and the operating system running on the microprocessor chip to be tested include facilities to: silence all processes that would lead to non-deterministic execution (such as interrupts, daemons, messages), initialize all necessary arrays, etc.; program the requested cycle for the clock stop in a register; start the program execution; wait until the microprocessor stops at the requested cycle; control the microprocessor scan-out mechanism so that the latch states of interest are scanned out; and, relate the scanned-out data to the design data of the microprocessor so that the collected scan-out data is mapped to the contents of each specific latch. These process steps may be repeated for any desired number of iterations, with each iteration stopping at a next successive clock cycle, until (or past) the point where the bug manifests itself.
The successive lists of latch states so obtained are rearranged into a time-ordered succession of states for every individual latch, and processed in a form suitable for display on a conventional waveform viewer, such as a viewer a designer may have used for logic verification of the original chip design. This gives a familiar view to the logic designers, who can then graphically follow the progression of the program and chip state as a function of time until (or past) the point in time that the bug manifests itself.
According to the invention, in one embodiment, the chip design provides circuitry that ensures that execution of a given program can be performed in an exactly reproducible fashion on a cycle-by-cycle basis. Hardware facilities to implement this include, for example, a set of synchronized reset/enable signals applied so that all chip sub-units start operation synchronized with the main chip clock. Furthermore, non-deterministic state left in the chip from previous program executions (for example, in un-initialized memory arrays) should not affect the execution of the present program. A facility is provided either in hardware or in software to initialize such arrays in preparation for cycle-reproducible runs.
In further view of
In this fashion, new chip configurations will only be admitted to the chip at a strictly deterministic point in time with respect to all functional clock edges. The Unit_Enable signals 111 output from the synchronization register 105 are forwarded to the respective on-chip units via as many pipeline stages as required, without affecting this synchronicity and repeatability. It is further understood that the Unit_Enable signals 111 additionally comprise the Reset/Enable signals for all on-chip processor cores.
As part of the initialization sequence, the control system may copy the chip configuration state (signals 102) into a register device, e.g., Config0 register, 106, and will next drive the allow_processor_control signal (101) to a '1'. Multiplexer 107 will normally transmit the contents of Config0 register to multiplexer 103, and when the allow_processor_control signal (101) is driven to a '1', multiplexer 103 will transmit the chip configuration state signals to the synchronization complex of multiplexer 104 and synchronization register 105.
Thus, from this point onward, software running on the on-chip processors can configure the on-chip units, as required, by modifying the contents of Config0 register 106. For example, unused units can be put in quiescent state. As before, each change in configuration state will become visible as a changed set of Unit_Enable signals 111 at a strictly deterministic point in time with respect to all functional clock edges.
Such state changes via Config0 register 106 are under control of the software running on an on-chip processor. In case of multiple on-chip processors, at least one on-chip processor will need to be and stay operational to do so. It is understood that this one processor cannot reset itself via Config0 register 106, as it would not be able to enable itself again.
To allow a full chip reset under on-chip program control, a further set of circuits is provided such that a processor can reset and re-enable itself. In the preferred embodiment, this device is implemented by a configuration register element Config1 register 108 as shown in
On subsequent clock_x8 cycles, the down-counter will decrement, until it reaches zero and stop. Upon reaching zero, comparator 110 will switch multiplexer 107 back to transmitting Config0 register 106, which, in the example, will lead to the processor(s) being re-enabled. As before, the re-enable of the processors will happen at a strictly deterministic and strictly repeatable point in time with respect to all functional clock edges.
The implementation of a clock stop on a software-programmable cycle number can in principle be achieved by a simple counter mechanism. However, additional clock control circuitry is added to ensure that all on-chip functional clocks are stopped in deterministic fashion, as now described with respect to
In particular,
Thus, according to the logic employed by the clock_stop synchronizer module 204, a same fixed and deterministic offset will occur at the issuance of each clock_stop_cmd signal. This gating (stopping) logic is designed to ensure that clock stopping across many synchronous domains of different frequencies will occur in a deterministic fashion and without glitches. This includes ensuring that slower frequencies will see their full pulse-width clock as their final signal.
Thus, in one example chip design, where functional clocks have frequency divisions of 1.5, 2, 3, 4, 6, 8 with respect to the fastest processor clock, the offset is the least common multiple (LCM) of these clock divisions (e.g., LCM=24). With this LCM offset, the functional clock domains will stop with all clock edges in the same phase relationship as in the cycle in which the clk_stop_cmd was raised. The exact offset is tuned per clock domain to compensate for additional pipelining in the distribution of the clock gating signals. In the end, the clock gating signals 215 that shut down the functional clocks will arrive at all clock splitter elements 206 of all functional clock domains synchronously (only one of which is shown in
Returning to
Having described a teaching of the invention that ensures that execution of a given program is exactly reproducible on a cycle-by-cycle basis; and ensures that all clocks on the chip are able to stop on the chip synchronously on a specific clock cycle count number since starting the execution of a program, there is now provided additional teachings of the invention for ensuring that the chip may be brought into a scan state with stopped clocks, while preserving the contents of the latches; and, ensuring that the latch states can be scanned out of the chip.
For example, upon completion of a synchronous clock stop on all clock domains, the chip exists in a state that is ready to scan out all master/slave latch data. In the example chip design, scanning the chip is performed under JTAG control, with the on-chip scan chains configured as Test Data Registers according to the IEEE 1149.1-1990/IEEE 1149.1a-1993 standard (also commonly known as JTAG standard) incorporated by reference as if fully set forth herein. The distribution of the scan clocks (derived off the rising and falling edges of the JTAG TCK clock—not shown) utilizes existing scan clock paths implemented for manufacturing test, thus again driving no additional area. In the example chip design, scannable latches are partitioned across several separate scan chains, one per synchronous clock domain. This provides fine granularity and short scan times. However, the scan-out could alternatively be done at coarser granularity, at the designer's discretion, up to a single large chain spanning the whole chip.
Great care needs to be taken in software initialization that the device under test (DUT) can execute programs repeatably in a cycle-accurate fashion. One example chip design in which the present invention may be implemented includes multiple microprocessor cores and a memory subsystem, which includes a double data rate (DDR) DRAM controller. For this example chip design, the following steps are executed to initialize the chip in a mode that ensures cycle reproducibility:
In a first step, the DUT performs its standard initialization. For this step, the DUT may interact with the control system block (
For instance, in a next step, performed by one or more processors (e.g., up to four of more processor cores in a multiprocessor system), the DUT detects that it is requested to have a cycle reproducible run. In response, the DUT soft-initializes processor state for all processor cores on-chip that are not affected by a device reset signal (e.g., instruction and data cache are invalidated, branch history table is cleared).
Then, in a next step, all of the on-chip processors enter a local barrier. That is, when each individual processor is done performing the tasks described herein, they signal to the that they are done, and then enter a wait state until all processors are done. In other words, the local barrier is a stopping point, where the processors that finished more quickly than others wait for the others to catch up.
Then, one processor core is selected as the initialization core, while the other processor cores enter a spin loop, waiting to be reset. That is, three of the processor cores are idled, and one "chosen" processor core continues through the following steps a1-e1, terminating itself at step e1 in the manner as described. This selected processor core then performs the following steps: a1) the DUT records the DDR calibration settings. The settings need to saved to a non-DDR, non-volatile memory (e.g., SRAM); b1) the DUT soft-initializes any hardware latches that are not affected by a device reset signal (e.g. on the example chip: clear lockbox state, Invalidate L2 cache and flush L3 cache to DDR); c1) DUT places the DDR controller in self-refresh; d1) the DUT increments a value (on the example chip: in non-volatile SRAM memory) that indicates that it has been reset; and, e1) the DUT pulls device reset. This accomplished through the full chip reset mechanisms under on-chip program control provided by devices 107, 108, 109, 110 as described herein with respect to
After the processors are synchronously re-enabled, the DUT should be prevented from accessing any asynchronous external devices. Continuing, as performed by one or all processors, as required, the DUT detects that this is the second run-through of the initialization sequence (via the value that was incremented prior to the reset that was performed at sub-step d1 above)). Then, the DUT performs a modified initialization sequence including, but not limited to steps of: a2) setting up a reproducible mode for correcting errors in memory. I.e., as the automatic memory error correction paths (e.g., DDR memory errors) take longer to process memory accesses than occurrences without memory errors, for reproducibility, the memory controllers need to be placed in a mode where all memory accesses are forced down the correction path. Alternatively, for reproducibility, the memory controllers need to be placed in a mode that forces a fatal error when any correctable memory errors occur; b2) restoring the DDR calibration settings stored from step a1) above; c2) disabling DDR auto-calibration; d2) configuring the DDR refresh to be deterministic; e2) removing DDR memory out of self-refresh mode; and, f2) At this point, the node may now access DDR memory.
Continuing further with the software programming there is next implemented a step of: enabling the DUT clock_stop unit, writing to the clock_stop unit registers (202) with the cycle number to stop at, and enabling the clock_stop synchronizer 204 by setting guard bit 405. Then, under control of the program that sensitizes the suspected bug (taking anywhere from one to four processor cores), the DUT launches the loaded kernels and program automatically. The DUT will continue execution until the pre-programmed cycle count is reached and the clock_stop_cmd fires. The clockstop synchronizing logic halts the clocks to the DUT, as described herein above, freezing the DUT from a software perspective. After the DUT has reached its stop clock point, the control system module 50 (
The above software implemented steps are run repeatedly for any desired number of iterations, with each iteration stopping at a next successive clock cycle, until (or past) the point where the bug manifests itself.
When the entire run is done, a text description is read in that relates the information collected in the scan files to the design latch names in the logical description of the chip design. Using a library that allows the writing of wave information to be viewed by a conventional waveform viewer, all the latch names and the wave form information are written out into a wave trace file. The waveform viewer thus displays to the logic designer the evolution of the chip state, leading up to the bug, in a familiar format, very much like the waveforms viewed during the logic verification stage of the chip design.
In operation of the foregoing, it is understood that gathering even a single cycle's worth of latch data takes time (boot time plus time-to-failure). So determining the "cycle-of-interest" is a critical step. Thus numerous scenarios can be formulated to find the cycle of interest as quickly as possible: In a first search variation, a gross linear search starting at cycle '0' may be performed first until inactivity is detected on the node (e.g., cycle X=cycle X+n. where n is some large number of cycles). Afterward, a binary search may be performed between cycle '0' and cycle 'X'. If cycle X/2 compares to cycle X then a 'left' branch of the binary search tree may be taken; otherwise, the 'right' branch is followed. Implementing this search scheme will enable quick convergence on the precise cycle where inactivity starts. It takes at most log 2(X) scans to determine the cycle. It is understood that a comparison of the latches may be the full chip, or a subset of latches.
In a second variation, a paired binary search may be performed. It may become necessary to generate a waveform of a particular failing chip, for example, to compare a working chip to a failing chip, running the same code on each. Thus, node A should always compare to node B. Thus, there is performed a gross linear search starting at cycle '0' until node A's scan does not compare to node B's scan (e.g., while cycle X.a=cycle X.b, then X=X+n. where n is some large number of cycles). Afterward, a binary search between cycle '0' and cycle 'X' is performed. If the scans on both nodes compare at cycle X/2, then a 'right' branch of the binary search tree is taken; otherwise, the 'left' branch of the binary search tree is taken.
In a third variation, instability is sought. That is, it may become necessary to generate a waveform of a particular sequence of codes that are intermittent/timing sensitive. In this variation, thus, a gross linear search is performed starting at cycle '0' scanning 'Y' times per cycle until at least 1 of those 'Y' scans results in a miscompare (e.g., while cycle X.1=cycle X.2. X=X+n. where n is some large number of cycles). Then a binary search is performed between between cycle '0' and cycle 'X'. Then, a 'Y' number of scans are taken and compared at cycle X/2. If those scans all compare, then take the 'right' branch of the binary search tree is followed; otherwise, the 'left' branch is taken.
The present invention may be advantageously employed in a novel Massively Parallel High Performance computing system such as described in commonly-owned, co-pending U.S. patent application Ser. No. 11/768,905, having a plurality of computing "nodes", each computing node comprising an ASIC that integrates all the functions of a computer into a single compute chip, enabling dramatic reduction of node size and power consumption. In a supercomputer, this can be further leveraged to increase node density thereby decreasing the overall cost/performance for the machine. The ASIC of this particular implementation, which may function as both a compute node and an I/O node in the computing system, include four processing cores, each having a "double" floating point unit, that includes two coupled standard floating point units. In one embodiment, the processor core is a PowerPC450 embedded core available from IBM microelectronics, although future versions of this core may be used as technology improves. The node further incorporates other elements and functions into the ASIC including, but not limited to: an embedded DRAM, an integrated external DDR2 memory controller, DMA, 10 Gb Ethernet functionality as well as all the network link cut-through routing buffers and routing control block that allow any two nodes to communicate with low latency. The compute node, in one embodiment, includes four embedded cores, such as the PPC450, each capable of being utilized for message handling and computation operations. Also included in a node is a "scratch" SRAM, provided to serve as a background communication mechanism with a host system. All four cores have equal access to the SRAM which is critical for the independent exchange of messages between each core and the host system. There is additionally provided at the node two DDR-2 controllers which enable use of the low cost commodity DDR-2 external memory.
Furthermore, as part of the Massively Parallel High Performance computing system, a Control Network, which may comprise a combination of a 1 Gb Ethernet and a IEEE 1149.1 Joint Test Access Group (JTAG) network, is implemented to provide complete low-level debug, diagnostic and configuration capabilities for all nodes in the entire machine, and which is under control of a remote independent host machine, called the "Service Node". Preferably, use of the Control Network operates with or without the cooperation of any software executing on the nodes of the parallel machine. Nodes may be debugged or inspected transparently to any software they may be executing. The Control Network provides the ability to address all nodes simultaneously or any subset of nodes in the machine. This level of diagnostics and debug is an enabling technology for massive levels of scalability for both the hardware and software.
The present invention has been described with reference to flow diagrams and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flow diagram flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flow diagram flow or flows and/or block diagram block or blocks.
The computer program instructions may also be loaded onto a computer-readable or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flow diagram flow or flows and/or block diagram block or blocks.
While there has been shown and described what is considered to be preferred embodiments of the invention, it will, of course, be understood that various modifications and changes in form or detail could readily be made without departing from the spirit of the invention. It is therefore intended that the invention be not limited to the exact forms described and illustrated, but should be constructed to cover all modifications that may fall within the scope of the appended claims.
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|International Classification
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|Sep 20, 2007
Owner name: INTERNATIONAL BUSINESS MACHINES CORPORATION, NEW Y
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Owner name: INTERNATIONAL BUSINESS MACHINES CORPORATION, NEW Y
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:BELLOFATTO, RALPH E.;ELLAVSKY, MATTHEW R.;GARA, ALAN G.;AND OTHERS;SIGNING DATES FROM 20070816 TO 20070820;REEL/FRAME:019858/0228
|Apr 15, 2008
Owner name: ENERGY, U.S. DEPARTMENT OF, DISTRICT OF COLUMBIA
Free format text: CONFIRMATORY LICENSE;ASSIGNOR:INTERNATIONAL BUSINESS MACHINES CORPORATION;REEL/FRAME:020807/0785
Effective date: 20080222
|Oct 30, 2015
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text:
SPIM industry event hosts successful 5th edition
The event takes place every two years and is held in the town of Vichy. It welcomes scientists and researchers to meet and network, and discuss the latest in physiology, biology, biochemistry and dermatology from an international perspective.
This year's delegates included 150 scientists of 20 nationalities from four continents, organisers state, and covered a programme of 21 conferences. Hot topics included the microbiome, autophagy, the scalp, skin structure and matrix.
The event is hosted by the Greentech company Foundation, and organisers say it aims to advance skin sciences across the world.
Award winners
SPIM also features an awards celebration, the Greentech Awards, which honour young researchers for high quality work in the field of skin physiology.
This year, the category of Best Junior Scientist 2016 was won by Laura Cau, a PhD student working at UDEAR and the CNRS in Toulouse, France.
Her research covers filaggrin, an epidermal differentiation marker, and is titled: 'The role of peptidylarginine deiminases in the regulation of filaggrin proteolysis'. Cau receives a EUR 15,000 bursary to progress her research.
Cau was joined on the winners' podium by Emer Duffy, who was recognised as winner of the Best Poster category. She wins a bursary worth EUR 4,000, which will support her work focussed on volatile skin molecules, titled: 'Proving skin physiology through the analysis of volatile metabolites towards non-invasive dermatological screen and diagnostics'.
Recognising art
Event organisers note that the SPIM meeting also spotlights contemporary art by exhibiting the works of internationally renowned artists.
This year, space was given to Robert Combas, a French artist at the forefront of the Figuration Libre movement.

subset: commoncrawl


text:
Nightmare on Elm Street turns 30 in style with this badass Freddy Figure
Ah, Mr. Krueger. Growing up I was never a fan of scary stuff, but Freddy was the bane of my childhood - scaring the living bejesus out of kid-me the moment I first saw his design. Now, 30 years after his début, NECA are getting ready to creep me out all over again with this amazingly detailed Freddy figure.


text:
I've read in so many books that stress doesn't affect flares. I bother to disagree. I can count that every flare that I've had has come on after a period of high stress levels. My doctor realizes this, and he has often fussed at me for stressing so much.
I feel so blessed to have found my husband. He is very sympathetic about my disease and helps out every way that he can. I was at my healthiest point right when I met him, and I was given a few really great years. Then, I got pregnant, and I've been flaring on and off since. My daughter is 19 months old and is very active. I am usually worn out from my days spent running after her and trying to deal with her tantrums!
I went through several bad relationships prior to meeting my hubby, and I can tell you that I remained sick 24/7 through all of them. I know it was hard for you to decide to end the relationship, but believe me, in the long run, your health and the ability to care for your daughter is the most important thing. You deserve someone who will step up to the plate and take charge when you are too sick to care for yourself. The last thing you need is a partner who makes things worse.
As far as your family, they can't begin to understand what you go through. There's no way that I can really put into words what the pain feels like. I wouldn't worry about them.
Also, as far as the new "friend", just be careful. You just ended a relationship, and I would just not stress about this right now. Just try to relax and accept that whatever happens is fine with you. Just take it one day at a time. Rushing into anything is probably not a good idea right now. Take care of your health first. I'm not saying that you shouldn't pursue anything; I'm just saying to take your time. That's usually when the good stuff happens!
Karen (Karendee)
Diagnosed w/ Crohn's Disease March 2007 On 150mg Azathioprine (generic Imuran), Pentasa, & Entocort (take zofran for nausea now)
Diagnosed w/ Fibromyalgia May 2007 also on Soma
Also have Arthritis, and feel like I am falling apart sometimes...
Thank you ladies for all your support!!!
Well,we made it through the MRI, & today we go back down to Asheville for the EEG tomorrow morning.I have to pull an all nighter tonight because Jasmine has to be sleep deprived for 8 hours before the test.It sure would be easier for me to stay up if I didn't have to fight her to stay up & if we didn't have to be super quiet so my lil bro & his wife can get thier sleeep.And I sure hope that she cooperates,because I am getting to old to do this multiple times...hehe.
Nat, thanks for putting your 2 cents in.Time may be on my side for now,& lord knows that I have been forced to learn much patience these past 5 months...lol.I feel pretty certain that if there is enough chemistry,the geography issues will work itself out.In the meantime,I will keep cool & work on myself. BTW,were u rolling your eyes at me ....hehe


text: Featuring free WiFi and a sun terrace, Le bois René offers accommodations in Leubringhen, just 24 miles from Le Touquet-Paris-Plage. Free private parking is available on site. Every room is equipped with a flat-screen TV with satellite channels. The rooms are fitted with a private bathroom equipped with a bathtub. For your comfort, you will find bathrobes, free toiletries and a hairdryer. You can play ping-pong at the bed and breakfast. Calais is 9 miles from Le bois René, and Boulogne-sur-Mer is 10 miles from the property. The nearest airport is Le Touquet Airport, 24 miles from Le bois René.


text:
First details for the 2014 Infiniti QX60 are out. What is it? Well, if you know the current JX crossover, you know the QX60. It's not at all surprising that what Infiniti has shown, in first pictures today, looks just like the 2013 Infiniti JX, only with different badging and perhaps a few other...Read More»
Hyundai has announced prices for three-row versions of the 2013 Hyundai Santa Fe models, which now slot alongside the 2013 Hyundai Santa Fe Sport, effectively replacing the now-discontinued Veracruz. The Santa Fe lands at a base price of $29,195 for the base front-wheel-drive Santa Fe GLS...Read More»
Last year, in several of BMW's mainstream models like the 3-Series and 5-Series, the German automaker did what might have a few years earlier been the unthinkable for the U.S. market: replaced its much-loved naturally aspirated in-line six with a turbocharged four-cylinder engine. Now for 2013 BMW...Read More»
In the 2014 Jeep Compass and 2014 Jeep Patriot, the CVT is history. And because of that, we think both of these models are worth giving a second look if you've previously taken note of their rugged good looks and city-sized compact-car sensibilities. This bears some explanation. The Jeep...Read More»
Late-model Jeep Patriot compact crossovers may have an issue with stalling, and federal safety officials are looking into a series of complaints. Earlier this week, the National Highway Traffic Safety Administration opened a Defect Investigation on Jeep Patriot utility vehicles from the 2011 and...Read More»
Have you reshuffled your priorities in a family vehicle over the past few years? Most busy parents have, and those who might have opted for a full-fledged SUV a few years ago probably aren't quite as smitten over the idea of a musclebound off-road truck. Meanwhile, rakish, crossover utility...Read More»
With its CX-9, Mazda proved that spacious family vehicles can actually be exciting to look at, as well as exciting to drive. Now, well ahead of an official introduction in October at the the 2012 Australian International Motor Show in Sydney, it's given us a first look and preview of a...Read More»
It didn't take us a journey halfway across the Pacific Ocean to understand that Subaru—and the new 2013 XV Crosstrek, or just 'Crosstrek,' as Subaru of America would rather call it (the XV already stands for 'crossover vehicle')—is for active, outdoorsy...Read More»
How can so many people still not see the beauty in the Flex? The boxy Ford Flex wagon isn't just fashionable; it would be on our shortlist of best vehicles to take on a cross-country trip; and for carrying six adults out for the evening; and for busy moms; and for all of an afternoon's ill-advised...Read More»
In these days of tighter family budgets, and in many cases a desire to be more understated, compact crossover vehicles like the Honda CR-V have a lot of appeal. Parents know that they provide more versatility—and freedom, by some gauges—than sedans, and they're a little smaller...Read More»
The Jeep Wrangler remains one of the most iconic, uniquely American, and instantly recognizable vehicles. Even those who aren't at all vehicle enthusiasts—or small kids—will be able to point it out as a Jeep. And having such a continuous and consistent design heritage are important...Read More»
Oregon's Coast Range doesn't get very high, but near the top its peaks and ridgelines are so steep and boulder-strewn that all the highways and paved roads follow lower passes. Yep, to get to the great viewpoints, you either have to huff it, or you need a serious off-roader—like a Jeep. This...Read More»
In choosing a diesel vehicle instead of a gasoline model, you almost always get a lot more torque, for comfortable highway cruising and easier towing, plus significantly better fuel economy. Between the gasoline-powered 2011 Mercedes-Benz ML350 and the 2011 ML350 BlueTec, this is true. EPA fuel...Read More»
Finding a car that fits most of the family needs can be a tough proposition – especially if you're looking for a vehicle that isn't a minivan. There's nothing wrong with minivans--really, there isn't. This year, every minivan sold in America, from the Kia Sedona to the Honda...Read More»
BMW has announced the recall of some of its 2012 X5 xDrive35d models, manufactured from March 31, 2011 through May 19, 2011. Some 923 of the utes may have been built with a faulty power steering belt tensioner. The welds used in forming the tensioner can crack over time, leading to a failure of the...Read More»
We call them war horses--tough off-road SUVs with enough room for a family to make the great outdoor trek this summer. We've brought you the first five in our group (check them out here) of family haulers that are just as comfortable – and capable – off-road as on. Some, you might not...Read More»
Volvos are known for safety, but the Swedish automaker's also trying to build a reputation for its all-weather, all-activity vehicles--the XC range of crossovers. Earlier this month, I rode along in a pack of XC60 and XC70 wagons throughout the desert southwest, on a 900-mile quest from San...Read More»
Blending new elements with an existing look is tough, and often fails. You should have seen the 70-something gentleman trying to rock 30-something "hair" aboard my recent flight to Munich. Once in Bavaria and on a drive to Austria courtesy of Volkswagen, updates to the 2012 Tiguan proved more...Read More»
If you're looking for a major redesign on the 2013 Buick Enclave, Chevrolet Traverse or GMC Acadia, it appears that you have a bit longer to wait. The Lambda-platform crossovers are getting a few improvements and updates for the 2013 model year, but big changes to the product line...Read More»


text: Human Rights Observatory Satellite Launch Sparks Spectacular Light Show The launch of a military satellite this morning provided a spectacular light show over the skies of southern Florida. The Atlas V rocket blast off at 6:18 a.m. Wednesday from Cape Canaveral Air Force Station carrying a military communications satellite. After a brief technical delay of 19 minutes, the massive spacecraft roared into the pre-dawn skies riding 2.5 million pounds of thrust. As dawn broke, the exhaust from the rocket mixed with the sunlight, creating an eerie glow as...Read complete article© Voice of America - Wednesday, September 2nd 2015


text:
Thomas Sabo
Thomas Sabo Winter Holiday Star Charm 0621
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text:
Work with one of our experienced designers for free!
Macco's Floor Covering Center offers a 1 hour design consultation. Our designers will work with you on the process of interior design and help guide you through the selection process on our product offerings. Get a free consultation today!
At Macco's Floor Covering Center we know floors! We will make sure you are happy from your first step into our showroom, to your first step onto your new flooring. Save on thousands of ceramic, natural stone, rugs, carpets, hardwood flooring, laminate flooring, and vinyl sheet options. Visit one of our conveniently located showrooms to speak with our experienced and knowledgeable staff members who can guide you through the process of selecting the right floor to fit your taste, lifestyle, and budget. More options, more ideas, more professional service, that's our advantage.


text:
Last week, Victoria Bick found herself the victim of an everyday crime.
After participating in a volunteer training session at a west Hamilton church, the 25-year-old gardener ambled outside into the rain to unlock her bike for what promised to be a soggy ride home.
But her bike was gone, cleaved from the lamppost to which it had been locked.
Tears ran down her face, already wet from the rain. After all, her bike — a vintage red Raleigh, restored by Bick's own hands — was no ordinary ride.
"This one, I had gone and bought it from a friend of a friend and it fit. It was the perfect bike for me," she told CBC Hamilton. "It was my baby."
That night, she got a ride home from another volunteer, and then found herself home alone to grieve.
Teeming with "anger," Bick felt she needed to write down her feelings — both her rage at the thief and her wistfulness at the loss of the bike.
While figuring out how to report the incident, she typed up "An open letter to the deadbeat who stole my bike," which she later posted to the social media site Reddit. (It contains language that some may find offensive).
Composed over a couple of hours, the piece reads like a cutting cri de coeur for Hamiltonians whose bikes have been pinched.
But you, oh scum-of-the-earth, you're going to do what with it exactly? Sell it? Dump it in a ditch, or over the edge of our beautiful escarpment? Put it in a garage, repaint it? What exactly? Ride it for fun? I doubt it. Commute on it? Pshaw. Use it to get to your various volunteer gigs all over the city? As if. Imagine you contributing to society in some way!
Moreover, Bick's post is also a touching requiem for her "beloved" lost bike, what was for her a "shining beacon" on two wheels.
One of my favourite things was pulling my boyfriend along the paved rail trail. He would ride his long-board, and hold onto one end of my lock (the one you wrecked), and I would hold the other end and pedal us along. Stopping was an issue, but it was a lot of fun while it lasted.
Since it's Hamilton Bike Month, we ask you to tell us: What's your favourite bike that you loved, then lost? Let us know on Twitter (@cbchamilton) or on our Facebook page. We'll share some of the responses in the space below.


text:
A beautiful jogger, drained of blood, dismembered, then meticulously reassembled on the grass in Central Park. Subway derailments, plummeting elevators, collapsing construction cranes, apartment explosions - all creating a bloody, senseless puzzle. Detective Frank Quinn knows that even while the slayer is taunting the cops and the public, he's also screaming to be caught. But Quinn will have to risk everything he holds precious to bring in this killer....
©2015 John Lutz (P)2015 Brilliance Audio, all rights reserved.
"Should of called it Gremlin"
The book was good, Scott Brick narration is always spot on. Had it been someone else I may have not liked it as much. He can make any book better over all worth the listen
"What Happened John Lutz?"
I kept looking at my iPod to see if I accidentally purchased the abridged version of the book. It seemed like there where huge holes in the story. The setting would change and a lot of time had passed. It was like I had missed a chapter or two, and this happened several times throughout the book.
Lutz usually includes all of the characters working at his agency, with this book they are all but non existent. The story line was unrealistic. The only way this story could have been more ridiculous and sloppy is if the main character Quinn had decided to dress as Batman and was battling the Joker.
Yes, his performance was as I expected it would be.
It made the other books in the series look much better.
I don't know if I will ever read another Frank Quinn book. This book felt like Lutz pushed it out just to satisfy a publishing contract or for a quick buck. This effort is so far below Lutz's usually effort. Weak storyline, weak plot progressing, poor organization with huge holes in the story. I am so disappointed.
"Oh, Brother!"
What an overdone, melodramatic mess this is. A recycle of a serial killer story, complete with the abusive childhood backstory recounted in multiple historical flashbacks, then throw in dozens of deaths performed in numerous ways which become ever more unbelievable.
Our villain is called The Gremlin, and while his description is remarkable for short, jockey-sized stature, an outlandishly large and pointed ear, and a spritely, skipping stride, he seems to miraculously evade recognition time and time again - even by people who are actively looking for him and within hand-shaking distance, and despite being front-page news for weeks, if not months. He also seems to have all the time in the world to plan and carry out his murders, some of which in the real world would take hours and require enormous muscular stamina to perform. And the murders, like his pointy ear, become more outlandish as the story progresses. What a pile of baloney.
Not even the great Scott Brick can salvage this turkey. My suggestion? Move along...there's nothing to see here.
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One of the best popular science books I have ever read. It fully lives up to the hype generated by the pre-publication reviews and by Stephen Fry's blurb on the dustjacket.
Stuart Jeffries, The Guardian
One of the most entertaining and thoughtful pop-science books to be published for years.
The Sunday Times Summer Reading
Erudite, elegant and thoughtfully constructed.
Wonderful stuff, the most thoughtful pop science book of the last few years.
Rod Liddle, The Sunday Times
In this book, which is hugely fun to read, Christopher Potter, who is not a scientist by trade, tries to explain everything — by which I mean everything in the universe — in slightly less than 300 pages. I read it in an evening, with a sense of increasing excitement, and then vertigo, and finally a sort of stunned awe. Potter has written a wonderful account of the universe we live in, which is also a history of science, and touches, in some places, on a philosophical investigation.
Potter will inspire lots of people.
William Leith, The Standard
With marvellous clarity, compassion, erudition, humour and open-mindedness, Potter blasts us through the vast vacuum of space. Packing in facts about satellites, planets and rotating black holes, he takes us to the outer limits of an expanding universe. Then he sucks us back through the mini-universes inside ourselves, to atoms and their component particles and on into quantum theory. He explains the theories of Aristotle, Newton, Einstein, Darwin and Dirac, giving the "unfeeling" science a human context by quoting from poets, prophets and philosophers of all eras and ethnicities. We're guided through the mysteries of the Large Hadron Collider and asked to consider forces deemed "unworthy" of science, like love. We're reminded that all knowledge is provisional and reassured that: "To be at peace with the universe is not easy."
Helen Brown, The Telegraph
He effortlessly transcends any nonsense about CP Snow's "two cultures" (science vs humanities) as he weaves together physics, philosophy, palaeoanthropology and Proust into a grand synthesis. Although a mathematician by training, he eschews equations and is disarmingly honest about his (and our) limitations. Potter has a relaxed, man-in-an-armchair voice and an urbanity that put me in mind of Alastair Cooke, but talking about pulsars and genomes rather than American politicians.
Andy Martin, The Independent
We are waltzed through a history of scientific thinking, a brief history of human development (with genetics thrown in) and a brisk briefing on the formation and history of our galaxy.
Less folksy and biographical than Bill Bryson, less zany than a Bluffer's Guide. But many a bang for your buck, washed down with quotations from the greats.
Almost no scientific knowledge is required because it is all supplied by the book itself, though a familiarity with arithmetic would come in handy when those big numbers are being bandied about.
Potter has an engaging style, with many an entertaining diversion.
Rita Carter, The Mail
This "Portable History of the Universe" is awe-inspiring in its reach. It ranges easily over millions of miles and takes in billions of centuries at a stroke, yet at the same time it's somehow intimate and conversational in its manner.
His book opens up to us the vastness of the cosmos.
Michael Kerrigan, The Scotsman
Christopher Potter's new book sweeps across both space and time in an ambitious attempt to show what science has revealed about our place in the cosmos in a way that is accessible and yet doesn't skimp on the science.
Potter's crisp, authoritative writing and his deft handling of difficult subjects makes this a book worth reading.
Anyone drawn to "the big questions" will enjoy this latest synthesis.
Dan Falk, New Scientist
An idiosyncratic, encyclopedic blitzkrieg of a book.
Even if you already know the science Potter surveys, his speed and style will keep you reading. He's a clean, swift writer, as likely to quote John Updike, Thomas Mann, or Friedrich Nietzsche as he is Richard Feynman or Isaac Newton. And this book is very briskly paced; in less than 300 pages, he left me dizzy.
Anthony Doerr, Boston Globe
Reading "You Are Here" is like taking a guided tour of the universe with a private car and driver. Potter discourses with ease while all the grand theories and grand thinkers – relativity, evolution, quantum field theory, string theory, Pythagoras, Galileo, Einstein – flash by the window. He meditates on the origins and ascent of life through the eons, on the infinitesimally tiny atom systems within our bodies and the infinitely vast galactic systems beyond our own, cavorting on the edge of the space-time continuum in a way that tends to make people unbearably nervous: to induce existential vertigo, as he puts it more elegantly, giving us in the course of a few hours' time quite an advanced education in certainties and their opposite.
Amanda Heller, Boston Globe
One of the best short surveys of science and its history in recent years.
Kirkus Review
Fun, highly readable guide to the origin's of the universe.
New York magazine
For those who found Stephen Hawking as clear as a black hole, Christopher Potter's You Are Here offers a friendly, poetic introduction to our current understanding of the big bang, relativity, evolution, life, particle physics and the universe in general.
Potter is here to hold our hands and walk us through the universe, and he is an excellent tour guide.
Potter has created a friendly and poetic introduction to the current understanding of the universe. He begins by mapping out the heavens, light-year by light-year, and then turns his gaze to the minuscule and the quantum (admitting, even, that some scientists think quantum physics makes no sense). He covers evolution and explains the birth process of a star, all the while sparing us from feeling like idiots if we get lost in the theory.
"Nature resists our attempts to uncover her secrets," the author writes. That she does — but at least we have writers as patient and clever as Christopher Potter to translate those secrets we have uncovered.
Jessa Crispin, Books We Like, NPR
Potter's genial exegesis of the mysteries of the universe, in which quarks, squarks, and "vibrating lengths of pure energy" are elegantly expounded.
He gives a foothold to the floundering with evocative description—"A beard grows a few nanometres in the time taken to raise a razor to the skin"—and with liberal doses of trivia. Among other things, he notes that the moon was formed when a huge planetary collision blew the crust of the earth into the atmosphere, and that the human body contains ten times as many bacterial cells as human ones. Most compellingly, Potter examines the provisional nature of scientific inquiry, in which conjecture can lead to insight and a weakness of a hypothesis can become a strength.
New Yorker
Any reader who has avoided science for fear of being overwhelmed will find a friendly guide in Potter.
This clear and smoothly written look at the mind-boggling history of everything is both informative and provocative.
Publishers Weekly
Christopher Potter is a skilled writer with a sincere interest in the search for the secrets of the universe, and his book is a layman's compelling journey that succeeds in mapping out the complicated evolution of science and its quest for knowledge.
You Are Here is a triumph of popular science that clearly and succinctly elucidates the significance of the subject at hand. It is a book that should be put into the hands of every high school freshman, so they may better understand the goals and purposes of physics, astronomy, biology, chemistry, and anthropology before their leaden, lifeless textbooks chase them out of science classrooms. It is a book that should be read by adults, to attain a fuller picture of how our world works, so they may take some time to fully contemplate the enormity of what surrounds them and the improbability of their own existence.
Michael Patrick Brady, popmatters
Every thing you need to know about science.
There's too much in here to internalize on one reading, so — and what more praise does a book need — you're going to have to read it again. Even then, to paraphrase Potter's quote of the wise Thomas Edison, you probably still won't know a millionth of one percent about anything.
Gilbert Cruz, Time
For his elegant debut, Potter set out to write a history of the universe. And if that project sounds ambitious to you, imagine pulling it off in less than 300 pages.
Like the Powers of Ten postcard books you sometimes find in museum gift shops, Potter's book, You Are Here, begins with impossibly small things (like quarks and electrons), ends with incomprehensibly large ones (stars, galaxies, and the universe itself), and considers string theory, general relativity, and the paradoxes of quantum mechanics along the way. Potter has a knack for rattling off the latest scientific facts without eliding the deeper questions they raise, and he ends up with the mother of them all: Why is there something rather than nothing? That, Potter admits, is a cosmic mystery that science may never solve.
Very Short List
'A sort of commonplace book full of paradox and conflicting ideas, shocking facts and redemptive anecdotes, turbulent with two or three millennia of human thought … by turns pessimistic and celebratory, mawkish and solemn … The source material is wonderfully diverse … ['How To Make A Human Being'] has great fun bringing the work of canonical writers together with a loose philosophical examination of some of the big existential questions … Very enjoyable.'
Gavin Francis, Guardian
'Christopher Potter's first book, "You Are Here", was a dazzling introduction for non-scientists to cutting-edge physics … Potter now focuses inward, turning from physics to neuroscience, biology and philosophy. He asks not "where are we?", but "who are we?" — and finds that science does not have half the answers it thinks. Still, science's best efforts, as gathered here, feel pretty rich and wonderful … A clever, subtle, enjoyable book. If we are a parliament of selves, this book is a parliament of explanations — and a deeply English one, at that, full of idiosyncrasy and resistance to easy answers.'
James McConnachie, Sunday Times
'A quirky and effective way of managing material that has engaged and baffled the greatest minds since antiquity'
New Statesman
'Potter illuminates the human in all its manifestations from single cell to creator of culture … The scattershot narrative somehow coalesces into a brilliant whole and a compelling case for anti-reductionism'
Nature Magazine
See Sunday Times archive for book reviews.


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Awesome free things for entrepreneurs & startups
#2 Product of the MonthMarch 2015
- Pros:
These "freebies" are for me invaluable! Startingan organic pest control service was a huge task and these paved the road!
I've never found a better batch of help and updated timely.
What can I say more...so smart in startup acumen..NOTHING COMPARES!
You need to become a Contributor to join the discussion - Find out how.
It's a massive resource. You probably read the article on Medium. :)
Bram Kanstein (@bramk)@bramk · @nocodemvp | @startupstash (Acquired)
@v4violetta and made by @meseali himself!
Ali MeseMaker@meseali · http://growthsupply.com/
@v4violetta @bramk thanks guys! Now I know what happens when you go to bed in Singapore and find your website on PH the next morning :) It's actually from that Medium article I had written in January that started going viral strangely in mid-Feb and got around 600K hits all of a sudden: http://bit.ly/1DiSqCn I just put all those resources on a Squarespace template on http://freebie.supply , hoping to update it regularly. If anybody wants to do sth about it, just let me know as I am currently blocked with some other projects. Here are also few words I had written about the story behind it: http://bit.ly/19web9c Thank you! Feels so great to be on PH!
Saijo George@saijogeorge · Digital Marketer
Great work on getting this out @meseali. I love it and a big thanks for featuring my project http://www.producthunt.com/posts... in there :D
Ashkan Motamedi@ashmotamedi
Very well curated! Nice job.
Fabien Saujot@fabs_31 · On vacations !
Update 15 min later : It seems that work now... / "the link does not work... :-("
@fabs_31 Which link does not work?
Tim Finnigan@timfinni · Founder of Blockshelf.com
Great collection of resources! I don't mean to be self-promoting, but I've reviewed the key points from almost 50 books for entrepreneurs and startups on my website http://Blockshelf.com -in case you wanted to add that to the 'Learn' section of your website.
@timfinni Hey Tim, I like your resource! Very useful.


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About The Key of Alanar by Rory B Mackay:
On his seventeenth birthday, David is given a crystal amulet, but it's a gift that comes with a price. Targeted by a brutal military force, his home is attacked and destroyed and he finds himself on the run and embroiled in a dangerous quest. A dark force that first penetrated his realm in ancient times has returned. In possession of a remarkable latent power, David discovers that he alone can safeguard his world from a full-scale invasion. However, the enemy isn't just pursuing him—it's now within him.
Battling both hostile terrain and his own demons, an impossible choice lies ahead, the echoes of which will ripple throughout time, leading David to the very limits of the human experience, and beyond…
From the explosive opening to a truly cosmic finale, this visionary fantasy/sci-fi epic is a tale of loss, courage, betrayal, and redemption, unravelling the very meaning of existence. You have the Key. Are you ready to use it?
Buy the book, and follow the author on social media:
Learn more about the writer. Visit the Author's Website.
Buy the Book On Amazon.
Visit the Facebook Fan Page.
Visit the Twitter page.
Author Bio:
A writer, thinker and dreamer from a young age, one of Rory Mackay's true passions is exploring the potential of fiction and art to elevate mood and expand consciousness. A social science graduate and student of Vedanta, Zen and Taoism, Rory's aim is to use words and stories to bridge ancient Eastern wisdom with modern Western insight.
Rory is the author of the visionary fantasy/sci-fi novels "Eladria" and "The Key of Alanar", as well as a translation and commentary of the Tao Te Ching.


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Wessex FM News
Cheap Fish'n'Chips Thanks To Norway!
9:24am 17th May 2014
A Weymouth Chippy's selling Fish and Chips from 99 pence today to celebrate Norway Day.
King Edward's Fish and Chips are one of 99 outlets around the country to get a share of 16 metric tonnes of cod from the Norwegian Seafood Council.
Les Young, owner of King Edward's Fish & Chips comments, "We are so pleased to be taking part in this annual celebration. Fish and chips are a firm favourite in Weymouth; I know that our customers will enjoy the delicious takeaway Norwegian cod and chips on offer - and they will certainly enjoy the prices too!"
99p fish and chips are being served by chippies in commemoration of the 200th Anniversary of the Norwegian constitution.
Norwegian cod is a popular choice for British chippies due to its firm flesh and flaky texture, its light, delicate flavour, versatility and good quality. Fish and chip lovers can also enjoy this delicious fish supper with a clear conscious as the sustainability of Norwegian cod stocks are carefully managed in order to safe guard the fish for generations to come. This means that Norwegian cod is in plentiful supply, so much so that the vast majority of cod sold by fish and chip shops in the UK is caught in the icy, clear Arctic waters of the Barents Sea off the northern Norwegian coast.
Jack-Robert Møller, UK Director for the NSC, comments: "Norway has provided UK fish and chips shops with delicious cod from the icy Barents Sea for nearly 70 years now. We are so pleased that due to the abundance of sustainable cod in Norway, that we are able to give the gift of this fish to Dorset in celebration of our historic Norway Day."
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The recently licensed quadrivalent seasonal influenza vaccine (QIV) may provide better protection than the traditional trivalent influenza vaccine (TIV) as it includes one more influenza B strain. We developed a Monte Carlo simulation model to determine the economic value of a QIV compared to the TIV for ten influenza seasons (1999–2009). The addition of the influenza B strain to convert the TIV into a QIV could result in substantial cost savings to society (median of $3.1 billion) and third party payers (median of $292 million), even when the cost of QIV is significantly higher
By including one more influenza B strain than the traditional trivalent influenza vaccine (TIV), the recently licensed quadrivalent seasonal influenza vaccine (QIV; MedImmune FluMist Quadrivalent for persons aged 2 to 49 years[1]) may provide better protection for the population [2–3]. Each year, the TIV contains three influenza strains, A/H1N1, A/H3N2, and one of two B strains, selected at least 6 months prior to the start of the influenza season [3–4]. The QIV may be an important advantage since predicting which of the two influenza B strain lineages, Yamagata and Victoria, will circulate in the following influenza season has been a continuing challenge and a vaccine with just one B strain may offer little protection against the other B strain [2–4]. Reed et al. estimated the additional influenza cases that a QIV may have averted over TIV during the past decade [3]. In this study, we utilize the results from the Reed et al. study to determine the potential cost-savings the QIV may provide, which can in turn help guide pricing, adoption, and reimbursement of the QIV.
We developed a Monte Carlo simulation model in Microsoft Excel (Microsoft, Redmond, WA) using a Crystal Ball (Oracle, Redwood City, CA) add-in to determine the economic value of a QIV compared to the TIV for ten influenza seasons (1999–2009) from the third party payer and societal perspectives. The third party payer perspective included only the direct costs of illness (i.e., cost of outpatient visits and hospitalization), while the societal perspective included direct and indirect costs of illness (i.e., productivity losses due to missed work and mortality). Table 1 shows our model inputs. All costs were age-stratified where applicable and in 2012 $US, converted using a 3% discount rate[5].
The age-stratified population (using the following groups: <1, 1–17, 18–44, 45–64, 65–84, and ≥85 years) for each influenza season came from the US Census Bureau (e.g., the 2008–2009 influenza season assumed the 2008 US population estimate) [6].
The study by Reed et al. provided the number of all influenza cases, hospitalizations, and deaths averted each year by vaccinating with a QIV compared to the TIV[3]. The first step was to separate these numbers into three mutually exclusive categories by age (using the age distributions from Table 1):
The Reed et al. study made several key assumptions that also hold in our study: (1) QIV would have efficacy against each included strain comparable to the strain included in the TIV (47–68%), assuming that the added B strain in the QIV would have the same efficacy as the B strain that was included (2) efficacy would not differ as substantially over different age strata and influenza strain/lineage; and (3) fewer does of QIV would be produced and its introduction would be in stages rather than wholesale replacement of TIV. Reed et al. also used population averages, and therefore did not account for potential differences in age, influenza strain/lineage, and health impact. Additionally, as the Reed study used vaccine coverage rates (18–30%) based on prior vaccination target population recommendations for each particular year, our study does as well.
Probabilistic sensitivity analyses simultaneously varied each parameter throughout their ranges listed in Table 1. Additional sensitivity analyses varied the price premium of the QIV vaccine over the TIV vaccine (range: $0–$120). Each simulation involved 5,000 iterations or trials.
Table 2 shows expected median cost-savings across the entire United States for the third party payers and society if the QIV instead of the TIV were used at different price premiums for the QIV vaccine (i.e., if the QIV cost $5, $15, $30, and $120 more than the TIV). This would translate to a median of $3.1 billion societal cost-savings (mean: $3.1 billion; 95% range: $2.8–3.5 billion) and a median of $292 million third party payer costs savings (mean: $294 million; 95% range: $251–342 million) during the decade if the QIV were used instead of the TIV and priced equally to the TIV. Raising the price of the QIV over the TIV decreased the median cost-savings. A higher costing vaccine would still be beneficial in some seasons, as cost-savings were seen for the QIV up to premiums of $120 for society and $105 for third party payers. Utilization of QIV becomes less cost-saving as QIV price premiums surpass $105 for third party payers.
Over the entire decade, 2,684,145 total cases were averted. From the third party payer perspective, a $120 premium would have saved $11 per case and a $0 premium would have saved $109 per case across the entire decade (from 1999–2009). Cost-savings per case across the entire decade from the societal perspective ranged from $1,163 ($0 premium) to $1,041 ($120 premium). The cost per case tended to increase as premiums decreased, resulting in less cost-savings.
As there were no cases averted for the 1999–2000 and 2000–2001 influenza seasons, there was no cost advantage of the QIV. From the third party payer perspective, the 2007–2008 season yielded the highest median cost-savings per case and death averted, even saving costs with a premium as high as $120 ($2 per case averted and $3,831 per death averted). Whereas the highest cost-savings per hospitalization averted were found for the 2001–2002 influenza season for all premiums up to $105 (from both perspectives). At higher premiums it would cost third party payers up to $23–$38 to averted one case, $4,450–$7,332 to averted one hospitalization, and $45,865–$75,570 to averted one death, for premiums of $105 and $120 respectively.
Adding an additional B strain to the seasonal influenza vaccine could reap substantial cost-savings for society and third party payers, even if the QIV enjoyed a significant price premium over TIV. It is not common for a new medical technology, especially one that is a variation of an existing technology, to immediately generate cost-savings[9]. (Most technologies require additional costs to result in health benefits.) Such savings may reassure third party payers of the value of covering a more expensive QIV as they would be likely to recoup this investment through averting healthcare costs. This in turn could facilitate adoption and also motivate additional scientists, developers, and manufacturers to enter the QIV market and investigate the possibility of adding even more strains to the vaccine. Moreover, the cost-savings could be greater in the coming decade as the Advisory Committee on Immunization Practices (ACIP) has increased the scope of whom they recommend should be vaccinated[10], which could in turn increase coverage of the overall population.
These findings also highlight the difficulty in accurately predicting the circulating influenza strains for the upcoming influenza season and the cost of inaccurate predictions. For example, missing on the B strain for the 2007–2008 influenza season seems to have cost third party payers well over $100 million and society well over $1 billion. This year 29% of all influenza were influenza B viruses, of which 98% were from the Yamagata lineage, while the TIV vaccine was manufactured with the Victoria lineage[3]. Although there are continuing efforts to improve the accuracy of strain predictions, adding more strains to the seasonal vaccine could be a promising route.
Currently, only MedImmune's QIV has FDA approval , but GlaxoSmithKline, Sanofi Pasteur, and Novartis Vaccines are in various stages of QIV development; their QIV formulations are expected to reach the market for the 2013–14 influenza season [11]. MedImmune plans to discontinue the current TIV FluMist and offer only the FluMist Quadrivalent vaccine for the 2013–14 influenza season, where as GlaxoSmithKline and Sanofi Pasteur plan to introduce their QIV formulations in conjunction with their current TIV vaccines[11].
Every model is a simplification of real life and cannot account for every possible factor and outcome[12]. Our results assume that QIV vaccine production could have been high enough to cover the number of TIV doses administered each year, which should eventually be possible, but could require an expansion in production capacity to accommodate the additional strain[2]. Therefore, the realization of cost-savings would depend on the timing of replacement of TIV with QIV: more slowly for gradual replacement and more near term if companies such as MedImmune do rapid en masse replacement[11]. Expansion of vaccine manufacturing capacity since the 2005–06 season and the inception production methods (e.g., cell culture) could further foster industry's ability to replace TIV[11]. On the other hand, additional limitations may make our estimates of the cost-savings conservative. Our study used the adjusted vaccine production numbers from Reed et al.; using less conservative numbers would increase QIV's cost-savings by averting more influenza outcomes. Current and future broader target population recommendations may further enhance the economic value of the QIV. It also did not account for over-the-counter self-treatment and all additional costs from medical problems (e.g., congestive heart failure or pulmonary disease exacerbations) that may be precipitated by influenza. Our model did not include any potential adverse events since reported ones are infrequent and relatively minor (e.g., runny nose, nasal congestion, sore throat)[1] and evidence does not suggest a higher rate than TIV. Our study draws from the Reed et al. study and therefore is subject to its limitations and assumptions.
In conclusion, the addition of the influenza B strain to convert the TIV into a QIV could result in substantial cost-savings to society and third party payers, even when the cost of QIV is significantly higher, information which could be useful to insurers (e.g., coverage decisions), manufacturers (e.g., production and pricing), developers (e.g., prioritizing research), and policy makers (e.g., adoption).
We model the economic value of a QIV compared to the TIV for ten influenza seasons
QIV provided cost savings during the decade if used instead of the TIV
A higher costing (up to $120) vaccine would still be beneficial in some seasons
Adding an additional B strain could reap substantial savings
This study was supported by the National Institute of General Medical Sciences Models of Infectious Disease Agent Study (MIDAS) grant 1U54GM088491-0109, the Vaccine Modeling Initiative funded by the Bill and Melinda Gates Foundation, the National Library of Medicine grant 5R01LM009132-03, and the Centers for Disease Control and Prevention Center for the Advanced Study of Informatics in Public Health grant 5P01HK000086-02. The funders had no role in the design and conduct of the study; collection, management, analysis, and interpretation of the data; and preparation, review, or approval of the manuscript.
Publisher's Disclaimer: This is a PDF file of an unedited manuscript that has been accepted for publication. As a service to our customers we are providing this early version of the manuscript. The manuscript will undergo copyediting, typesetting, and review of the resulting proof before it is published in its final citable form. Please note that during the production process errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.
The authors report no conflicts of interest.
PubMed Central Canada is a service of the Canadian Institutes of Health Research (CIHR) working in partnership with the National Research Council's national science library in cooperation with the National Center for Biotechnology Information at the U.S. National Library of Medicine(NCBI/NLM). It includes content provided to the PubMed Central International archive by participating publishers.


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Baltimore Installs Solar-Powered Parking Meters
"More than 400 of the solar-powered high-tech meters will roll out in the city during the coming months, offering drivers the option of paying with coins, credit cards or bank debit cards.
While Collier said the meters are not a revenue-making scheme by the city, drivers are more likely to comply with parking regulations when they don't have to hunt for change to feed the old-fashioned meters.
And, instead of losing money by overfeeding parking meters, drivers can take their purchased time with them for use in other parking spaces without individual meters, he said.
The technology for the machines comes from E-Z Park, a Clearwater, Fla.-based company that contracts with the city to provide the machines and technology."


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World No. 1 Novak Djokovic rallied from a twosettoone deficit Saturday to defeat Stanislas Wawrinka 26, 76 (74), 36, 63, 64 and advance to his fourth consecutive U.S. Open final.
The Serbian started slowly from the baseline, winning just one of nine secondserve points in the first set, but gradually found the range on his ground strokes as the match wore on.
A major turning point came early in the fourth set, when Djokovic earned a break of serve en route to a 30 lead.
The Serbian went on to take that set and then had the fitness edge in the fifth set when Wawrinka began suffering from an upper right thigh strain.
Wawrinka held serve in a marathon third game of the final set to go up 21, but that proved to be a last hurrah as the Swiss was broken in his very next service game and Djokovic finished the match off a few games later.
Next up for Djokovic, the 2011 champion, in Monday's final will be either world No. 2 Rafael Nadal of Spain or France's Richard Gasquet.