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Inkerman - Garage - Rent
3 bedroom(s)
In a select designer development, this large contemporary 3 level, 3 bedroom, 3 bathroom townhouse is ideally located close to Carlisle St & Chapel shops and transport yet also offers privacy and a peaceful position set back from the street. Ground level: Entry hall, 3rd double bedroom (timber...
2015-25-02 - gumtree.com.au save
Bli Bli - Home - Sale
4 bedroom(s)
Time to act this weekend, Vendor wants it sold this weekend and at this price there is going to be a que! Add your own personal touches, style & landscape this gorgeous Queenslander and be rewarded! Not many properties can boast the views that 21 on Caitlin has. This custom designed replica...
2015-25-02 - gumtree.com.au save
Queries related : house plans with two kitchens
Butler - Home - Sale
Looking to build your First home or Invest? 4x2 $379,000 Easy Finance $3,000 Deposit $450pw 6 months work history required. Call today to book a free information session. Perfect for the first home buyer or investor looking to get into the market at an affordable price. With record low interests...
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Darwin - Apartment - Sale
3 bedroom(s)
Secure luxury,ocean and harbour view living with all the trimmings in this superb executive apartment located in the exclusive Evolution building in the heart of Darwin CBD. - Panoramic ocean and harbour views - Spacious open-plan living and dining room with premium quality appointments - Living and...
2015-23-02 - gumtree.com.au save
Port Macquarie - Home - Sale
6 bedroom(s)
Big brick & rendered brick, tiled roof, two-storey modern house; 4-6 bedrooms (incl study and rumpus) depending on configuration. Peaceful, suburban "Lighthouse Beach" area. Upstairs 3brm, 2 bathroom incl ensuite and walk-in robe to very spacious master brm in "parents wing"; 2 other Queen brms in...
2015-22-02 - gumtree.com.au save
Queries related : house plans 6 bedrooms 3 bathrooms
Gold Coast - Apartment - Sale
3 bedroom(s)
What's not to love about Stillwater, one of the most prestigious apartment complexes on the northern end of the Gold Coast. This huge 3 bedroom, 2 bathroom, 2 balcony water front apartment with 2 carparks and buggy space located on the second floor offers cool breezes throughout summer and sunlight...
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Northgate - Garage - Sale
3 bedroom(s)
STUNNING 3 BEDROOM RESIDENCE THE ULTIMATE IN MODERN LIVING! Beautifully situated with views to the foothills in Adelaide's most prestigious new near CBD development. Downstairs: - An Open Plan kitchen/living/dining features all stainless steel kitchen appliance - Downstairs powder room - A private...
2015-21-02 - gumtree.com.au save
Doreen - Home - Sale
646 m² hab - 4 bedroom(s)
New Modern Family Living - 4 Bedrooms Plus Study Please Enquire For Inspection Days And Times. Surround yourself with contemporary elegance in this impressive modern 4 bedroom plus study family home of just 2 years. In pristine condition, featuring large open plan living areas, on an approximately...
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Doreen - Home - Sale
646 m² hab - 4 bedroom(s)
New Modern Family Living - 4 Bedrooms Plus Study Please Enquire For Inspection Days And Times. Surround yourself with contemporary elegance in this impressive modern 4 bedroom plus study family home of just 2 years. In pristine condition, featuring large open plan living areas, on an approximately...
2015-21-02 - gumtree.com.au save
Don - House - Sale
This is the time to invest as prices are starting to rise! Recently the popular show "Selling Houses Australia" visited Macleay Island. This episode will air in (Season 8) on Foxtel TV on 4th March 2015, so if you are interested in buying a property on Macleay Island, don't delay as prices will...
2015-20-02 - gumtree.com.au save
Queries related : house plans all bedrooms downstairs and kitchen upstairs
Montville - Home - Sale
3 bedroom(s)
WORK FROM HOME.... On a lush green ¼ acre block on top of Montville is this charming home with a versatile floor plan providing a variety of options including dual living, home office or just wonderful family BEST LITTLE BUY ON THE RANGE Lovely home with an abundance of appeal and so affordable....
2015-19-02 - gumtree.com.au save
Queries related : house plans for dual living - house 10 bedroom floor plan
Cook - Home - Sale
Set in the much sought after suburb of Chelmer lies a luxuriously large, warm and inviting family home. Perfectly positioned on an awesome 810m2 block of land your whole family will enjoy all the space it affords as well as the nearby parks, walk ways and endless choice of amenities. This versatile...
2015-19-02 - gumtree.com.au save
Palmerston - Home - Sale
4 bedroom(s)
Open for Inspection: Sat 21/2/15 10-11am. Sun 22/2/15 11am-12pm. Attention first home owners! This home is currently eligible for the $26,000 NT First Home Owners discount. Be the first to live in this brand new executive 4 bedroom 2 bathroom home, surrounded by tranquil lakes and bushland in the...
2015-19-02 - gumtree.com.au save
Airlie Beach - Apartment - Rent
A luxurious, fully furnished and spacious two bedroom 2 bathroom in Summit Apartments, Airlie beach. The master Bedroom boasts a king size bed, walk in wardrobe, ensuite with shower, bath and toilet. It's a bright room with large windows that get the morning sun but also come equiped with blackout...
2015-18-02 - gumtree.com.au save
Butler - House - Sale
Looking to build your First home or Invest? Easy Finance $3,000 Deposit $500pw U can Qualify!! Air conditioning,Tiles, carpets, Theatre Room by one of perth's Biggest builder 22years reputation in the building industry. Easy Finance only $500 repayments per week Low Deposit Finance arranged fast to...
2015-18-02 - gumtree.com.au save
Edith - House - Rent
Close to everything - Dianella Plaza, Morley Galleria, Mount Lawley, Edith Cowan University, Highgate and mere 7 kms from the CBD. You will be spoilt for choice in this brilliant location. STUNNING built residence, established gardens, large courtyard for entertaining and SO MUCH MORE! Notable...
2015-17-02 - gumtree.com.au save
Price - Apartment - Rent
3 bedroom(s)
We are proud to present to you this immaculate 3 bedroom Penthouse apartment. Situated at the end of a cul de sac, this property has all the amenities of an upper market city apartment without the city Traffic or the price tag. One of only 16 in the complex, this 8 year old property has magnificent...
2015-17-02 - gumtree.com.au save
Sale - House - Sale
4 bedroom(s)
16 MARIPOSA BOULEVARD, SECRET HARBOUR This low maintenance 4 bedroom, 2 bathroom home with fully reticulated & landscaped gardens was built in 2010 and sits on a 504sqm block with 203sqm of living space. It has a large open plan living area, meals & kitchen with a 900mm stainless steel electric...
2015-17-02 - gumtree.com.au save
House - Rent
4 bedroom(s)
***BALDIVIS BEAUTY*** HOME OPEN SUNDAY 22nd FEB at 12:00 - 1:00 PM Large & Modern 4 bedrooms 2 bathrooms Home in The Ridge Estate in Baldivis Large, hotel style master bedroom with ensuite incl. bath and double shower Theatre, open plan living, dining and games area Chef style kitchen with 900mm...
2015-17-02 - gumtree.com.au save
Darwin - Apartment - Rent
3 m² hab - 4 bedroom(s)
Fully Furnished Apartment with fourth bedroom which could be used as a study This air-conditioned luxury apartment is located on the 24th floor and commands 280 degree views over the harbour, city and hinterland. It is located in the Evolution building in the Darwin CBD and is walking distance to...
2015-16-02 - gumtree.com.au save
floor plans master bedroom ensuite bathroom
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text:
The 2015Nobel Prize in Chemistry was awarded on Wednesday 7 October to Sweden's Tomas Lindahl, American Paul Modrich and Turkey's Aziz Sancar for their work on DNA repair mechanisms. Consequences of this work include applications in cancer control.
Our gene pool, or more precisely the DNA that constitutes it, is under constant attack. Indeed, excessive exposure to UV radiation from the sun, tobacco smoke, and many other agents present in our environment can damage our DNA. We refer to genotoxic attacks.
The lesions generated are potentially dangerous, as they can modify the functioning of the cells that make up our body, and lead to their transformation into malignant cells. Fortunately, there are cellular mechanisms responsible for detecting these lesions and eliminating them. The cell has several DNA repair systems to do this, allowing the targeting and removal of the different types of lesions that can modify the genetic material.
© Inserm/IGBMC
Nucleotide Excision Repair - NER - 2012
The 2015 Nobel Prize in Chemistry has been awarded three pioneers who have mapped several of these repair systems:
This last system is described in this animated film, directed by Jean-Marc Egly, Christophe Giraudon and Gabriel Picard, with support from Inserm and the Institute of Genetics and Molecular and Cellular Biology (IGBMC, Ilkirch).
Read the press release : "Inserm International Prize 2008, Nobel Prize in Chemistry 2015" (07.10.2015)Retour à la liste

subset: commoncrawl


text: U.S. port authorities are pleased about the passage of H.R. 3983, the "Maritime Transportation Antiterrorism Act of 2002," by the House Transportation and Infrastructure (T & I) Committee on March 20. "We thank Chairman Don Young (R-AK) of the House T & I Committee, and Subcommittee Chairman Frank LoBiondo (R-NJ) of Coast Guard and Maritime Transportation, for their leadership on moving to address maritime security," said Kurt J. Nagle, president of the American Association of Port Authorities (AAPA). "We are encouraged about the $225 million authorized for Federal grants to help ports enhance seaport security, and the local flexibility provided for vessels and facilities to address terrorism at America's ports. AAPA strongly supports enactment of Federal legislation to address maritime security." AAPA members met March 20 at their Annual Spring Conference in Washington, D.C., and heard from Chairman LoBiondo just prior to committee action on H.R. 3983. Rep. LoBiondo told ports that he was committed to increasing funding for Federal agencies and ports, that enhanced security should not be funded through new user fees on the industry, and that security measures should not impede the efficient movement of cargo. AAPA also embraces these goals. Overall, H.R. 3983 takes a slightly different approach than the Senate bill, S. 1214, "The Port and Maritime Security Act of 2001. " It is focused solely on terrorism and is not as detailed on planning requirements. The bill only covers areas that the Department of Transportation (DOT) determines are at risk of having a catastrophic emergency in the event of a terrorist attack. Also, because of jurisdictional limitations of the committee, the bill only focuses on DOT activities, not those of the U.S. Customs Service. The bill is modeled on the Oil Pollution Act, in which Congress outlined broad planning requirements but left most of the details to the discretion of DOT. Like S. 1214, it requires a family of plans, including national, area and vessel/ facility plans. H.R. 3983 calls for grants over three years totaling $225 million (less than S.1214, which over a five-year period, calls for $390 million in grants), but limits them to technology. Enhancing seaport security is a top priority for U.S. ports. Pubic port agencies want to maintain the safest, most secure facilities possible while moving goods efficiently to their destination. Increased Federal resources for public ports will be critical to enhance security in the areas of training for security personnel, controlling access, and physical security. Ports work in partnership with government agencies like the U.S. Coast Guard and Customs, which protect water borders and inspect vessels and cargo. These agencies also need increased resources.


text:
|Publication number
|Publication type
|Application number
|Publication date
|Nov 6, 1990
|Filing date
|Mar 2, 1987
|Priority date
|Mar 2, 1987
|Fee status
|Also published as
|Publication number
|Yiu-Fai Chan, Chuan-Yung Hung
|Original Assignee
|Altera Corporation
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (8), Non-Patent Citations (10), Referenced by (47), Classifications (8), Legal Events (7)
|External Links: USPTO, USPTO Assignment, Espacenet
This invention relates to programmable integrated circuit logic array devices of the type shown in Birkner et al. U.S. Pat. No. 4,124,899, issued Nov. 7, 1978, Hartmann et al. U.S. Pat. No. 4,609,986, issued Sept. 2, 1986, Hartmann et .al. U.S. Pat. No. 4,617,479, issued Oct. 14, 1986, Hartmann et al. U.S. patent application Ser. No. 742,089, filed June 6, 1985, now U.S. Pat. No. 4,713,792, and Veenstra U.S patent application Ser. No. 722,684, filed April 12, 1985, now U.S. Pat. No. 4,677,318, all of incorporated by reference herein, and all of which are hereinafter collectively referred to as "the patent references".
Prior programmable integrated circuit logic array devices have not been readily connectable to microprocessors, especially higher speed microprocessors, for certain functions. Various interface devices have been required in many instances between the microprocessor and the programmable logic array device. Prior programmable logic array devices have also not been able to completely process certain information at the basic microprocessor clock rate. This is especially of concern in relation to applications requiring faster and faster microprocessors.
In view of the foregoing, it is an object of this invention to provide improved programmable integrated circuit logic array devices.
It is a more particular object of this invention to provide programmable integrated circuit logic array devices that are more readily connectable to external microprocessors or other similar external devices.
It is another more particular object of in this invention to provide programmable logic array devices that can process information to a greater degree at the clock rate of a microprocessor.
It is yet another more particular object of this invention to provide programmable logic array devices that are capable of performing more logic functions and are programmable to a greater degree.
These and other objects of the invention are accomplished in accordance with the principles of the invention by providing programmable integrated circuit logic array devices having one or more of the following features: (1) a bus port for receiving data directly from or making data available directly to an external microprocessor or other similar external device (hereinafter simply "microprocessor"), (2) an internal bus (preferably with internal bus arbitration logic for resolving competing demands for utilization of the bus) for conveying data between the bus port and the logic arrays and/or between the logic arrays themselves, (3) the ability to operate either in an edge-trigger mode (in which controlled functions such as input registers are triggered by the transitional edges of control signals) or in a flow-through mode (in which controlled functions such as input registers are triggered by the logical states rather than the transitional edges of the control signals), and (4) the ability to operate either in a fast mode (in which timing control signals are applied substantially directly to the elements to be controlled) or in a slow mode (in which timing signals propagate through the logic arrays rather than being applied directly to the elements to be controlled).
Further features of the invention, its nature and various advantages will be more apparent from the accompanying drawings and the following detailed description of the invention.
FIG. 1 is a circuit block diagram of an illustrative programmable integrated circuit logic array device constructed in accordance with the principles of this invention.
FIGS. 2-4 are more detailed circuit block diagrams of portions, of the device of FIG. 1.
FIGS. 5 and 6 are more detailed circuit diagrams of portions of the apparatus shown in FIGS. 1 and 4.
FIG. 7 is a more detailed circuit diagram of a component shown in FIGS. 1, 3, and 4.
An illustrative programmable integrated circuit logic array device 10 constructed in accordance with the principles of this invention is shown in FIG. 1. As has been mentioned, device 10 is a device of the general type shown in the patent references mentioned above. Device 10 is typically fabricated as described in the patent references, and it is ultimately made up of various elements, all of which are individually shown in the patent references and/or are individually well-known to those skilled in the art.
With some minor exceptions, device 10 is substantially symmetrical about a central vertical axis A--A as viewed in FIG. 1. The letter L is used in some component or signal names associated with the left side of the device, and the letter R is used in a similar way in connection with the right side of the device. The letters L and R are either omitted or replaced by the letter X when a name generic to the left and right sides is needed. The letter N is sometimes added to a signal name to indicate the logical inverse ("bar") of the signal without the N. Because of the substantially symmetrical nature of device 10, it will generally only be necessary to describe one side in detail, it being understood that the same description applies to the other side as well.
The central elements of device 10 are the elements labelled Macrocell A and Macrocell B. Typical Macrocells A and B are shown in more detail in FIGS. 2 and 3, respectively. Each Macrocell A 210 or B 310 includes an erasable, electronically-programmable Logic Array 212 or 312 (labelled EPROM Array in FIG. 1) which can be programmed to perform various logic functions as shown and described, for example, in the patent references. Device 10 includes four A Macrocells 210 and 16 B Macrocells 310. The A Macrocells are somewhat simpler than the B Macrocells, and unlike the B Macrocells, are not directly connected to internal bus 20.
Considering now the external connections of device 10, starting at the top of FIG. 1 and going counter-clockwise around that drawing, VCC represents a power supply terminal or pin (typically +5 volts; logic 1). The next two pins (I/P) are input pins, each of which is connected to a respective pair of word line drivers in each of word line driver arrays 22L and 22R. (Each word line driver array 22 includes 40 devices, each of which drives one word line and its complementary word line in the associated EPROM Array as represented, for example, by the horizontal lines 40, 41, 42, etc., in FIG. 5 of U.S. Pat. No. 4,617,479). The signals applied to the I/P pins are general-purpose input signals which would typically come from the external microprocessor (not shown but entirely conventional) associated with device 10, or from other devices in the electronic system.
The next pin is the inverse Write Strobe (WS bar) pin. The signal applied to this pin is applied (like an I/P signal) to arrays 22, and is also usable as a write strobe input signal for indicating that the microprocessor associated with device 10 is ready to write data to device 10.
The next pin is the Clock Left (CLKL) pin. The signal applied to this pin is (1) applied to arrays 22 like an I/P signal, (2) optionally usable as a synchronous clock signal for the register flip-flops 230 (FIG. 2) and 330 (FIG. 3) of left side Macrocells 210 and 310, and (3) optionally usable in the Fast Output Latch Enable (Fast OLE) mode (described in detail later) to assist in timing the operation of the left side Macrocell B output latches 384.
The next two pins are Input/Output (I/O) pins which can be used either for data input to or data output from the associated A Macrocells. In a typical application, these pins might be connected to the address or control bus of the associated microprocessor-driven system, or to other devices in the electronic system.
The next eight pins are B Macrocell Input/Output Left (BI/OL) pins. These are similar to the above-mentioned I/O pins, but for the associated B Macrocells. (In FIG. 3 the corresponding pin is merely labelled I/O Pin.)
Along the bottom of device 10 as viewed in FIG. 1 are eight Bus Port (0-7) pins. In a typical application, these pins might be connected to the data bus of the associated microprocessor-driven system for allowing byte-wide exchange of data between that external data bus and eight-conductor internal bus 20.
VSS represents ground (0 volts; logic 0).
On the right-hand side as viewed in FIG. 1 are eight more B Macrocell Input/Output Right (BI/OR) pins similar to the BI/OL pins, and two more A Macrocell Input/Output (I/O) pins similar to the I/O pins on the left-hand side.
The final signals to be discussed are (1) the Clock Right (CLKR) signal which is similar to the CLKL signal but for the right-hand Macrocells, (2) the inverse Read Strobe (RS bar) signal which is similar to the WS bar signal but indicates that the associated microprocessor is ready to read data from device 10, and (3) two more I/P pins similar to the previously described I/P pins.
In addition to the A and B Macrocells mentioned above, each half of device 10 includes three smaller Macrocell-type elements (collectively 24L or 24R) for respectively generating Output Latch Enable (OLE), Transfer Output to Bus (TOB), and Input Latch Enable (ILE) signals. (Although FIG. 1 shows the TOB signals being applied directly to Output Latches 384, the more detailed depiction provided in FIG. 4 shows that TOBL and TOBR are processed by logic element 468 to produce the Output Latch Output Disable Left and Right (OLODL and OLODR) signals which are the control signals actually applied to Output Latches 384.) The right-hand side of device 10 also includes one more small Macrocell-type device 26 for generating a Bus Port Output Enable (BPOE) signal.
Along the bottom of FIG. 1 each Bus Port pin 0-7 has a pair of tri-state driver elements 28a and 28b. When enabled by the BPOE signal, each element 28a allows data to flow from an associated lead of internal bus 20 to the associated Bus Port pin. When enabled by the Bus Port Input Enable (BPIE) signal, each element 28b allows data to flow from the associated Bus Port pin to an associated lead of eight-conductor internal bus 20. When not enabled as described above, each element 28a or 28b blocks the flow of data through that element.
The other elements shown in FIG. 1 (e.g., the 16 Output Latches (0/P Latch) 384, the 16 Input ET/FT Flip-Flops 392, and the 16 multiplexers (MUX) 390) are shown again elsewhere (e.g., FIG. 3) and are more readily discussed in connection with those other drawings.
As mentioned above, a typical A Macrocell 210 is shown in more detail in FIG. 2. Macrocell 210 makes use of 11 product terms in Logic Array 212. (Each product or P term corresponds, for example, to one vertical column 32, 34, 36, etc., in FIG. 5 of U.S. Pat. No. 4,617,479.) The top two P terms are logically combined by AND gates 214a and 214b and OR gate 216 and (optionally) inverted by EXCLUSIVE OR gate 218 to produce an output signal which can be used either as an asynchronous clock signal for controlling register flip-flop 230 or for enabling tri-state driver element 260. Whether or not the output signal of OR gate 216 is inverted by EXCLUSIVE OR gate 218 depends on the state of Invert Select element 220. Element 220 is an erasable, electronically-programmable read-only memory (EPROM) element used for controlling the "architecture" of Macrocell 210 (and therefore the architecture of device 10). Accordingly, it may be similar to the EPROM architecture control elements shown and described, for example, in U.S. Pat. No. 4,617,479 and in U.S. patent application Ser. No. 742,089. (Similar EPROM architecture control elements are represented by the same schematic symbol throughout the drawings of this application.)
The destination of the output signal of EXCLUSIVE OR gate 218 is controlled by multiplexer elements 222 and 224 (each of which may be similar to multiplexer elements shown and described, for example, in U.S. Pat. No. 4,617,479). Multiplexer 222 is controlled by ASYNC/OE Mode Bit element 226 (an EPROM element similar to element 220) and has the characteristics of a double-pole double-throw switch. In one state, element 226 causes multiplexer 222 to apply the output signal of gate 218 to the clock input of register 230 and VCC (logic 1) to multiplexer 224. In the other state, element 226 causes multiplexer 222 to apply the Synchronous Clock signal (CLKL or CLKR in FIG. 1) to register 230 and the output of gate 218 to multiplexer 224. Multiplexer 224 is controlled by Dual Feedback O/P Tri-State element 228 (an EPROM element similar to element 220) and is like a single-pole double-throw switch. In one state (Output or O/P), element 228 causes multiplexer 224 to apply the output signal of multiplexer 222 to tri-state driver element 260 (to selectively connect the output of multiplexer 254 to the associated I/O Pin in synchronization with a logic 1 state in the output of gate 218). In the other state (Dual Feedback), element 228 causes multiplexer 224 to apply VSS (logic 0) to driver element 260 (to interrupt the signal path between multiplexer 254 and the associated I/O pin). In that way, the I/O pin can be used as an input through word line driver 22-262 (one portion of array 22L or 22R in FIG. 1) independent of internal feedback from multiplexer 254 through word line driver 22-258 (another portion of array 22L or 22R in FIG. 1).
Eight other P terms in Logic Array 212 are logically combined by AND gates 232a-h and OR gate 234 and (optionally) inverted by EXCLUSIVE OR gate 236, the inversion function of which is controlled by Invert Select EPROM element 238 (similar to 220). The output signal of gate 236 is applied directly to the Data (D) input terminal of multiplexer 242 (similar to 224) and the Combinatorial (C) input terminal of multiplexer 254 (also similar to 224). It is also applied to EXCLUSIVE OR gate 240, together with the Q output of register 230, and the resulting signal is applied to the Toggle (T) input terminal of multiplexer 242. Multiplexer 242 is controlled by DFF/TFF Select EPROM element 244 (similar to 220) and is like a single-pole double-throw switch. Accordingly, in one state, element 244 causes multiplexer 242 to apply the output of gate 240 to the Data (D) input terminal of register 230. (This is the Toggle, J-K or R-S flip-flop operation described in more detail in U.S. patent application Ser. No. 722,684.) In the other state, element 244 causes multiplexer 242 to apply the output of gate 236 to the D input terminal of register 230. In addition to being fed back to gate 240, the Q output signal of register 230 is applied to the Register (R) input terminal of multiplexer 254. Accordingly, multiplexer 254, which is controlled by R/C Mode Select EPROM element 256 (similar to 220), can apply to its output terminal either the output signal of register 230 (i.e., a Register (R) output) or the unregistered Combinatorial (C) output signal of gate 236. The resulting multiplexer 254 output signal is fed back to Logic Array 212 via word line driver array element 22-258, and it may also be applied to the associated I/O Pin via driver element 260 if that driver element is enabled as discussed above. The signal applied to the I/O Pin shown in FIG. 2 is applied to Logic Array 212 via word line driver array element 22-262. This signal may be either the output of driver element 260 as described immediately above, or it may be an external input signal as described in connection with FlG. 1.
The final P term in the portion of Logic Array 212 associated with Macrocell 210 is applied to the reset (C) input terminal of register 230 via AND gate 246.
From the foregoing, it will be seen that among the characteristics of Macrocell 210 are the following: It can be programmed (element 226) to be clocked either synchronously (Synchronous Clock) or asynchronously (from the output of gate 218). It can be programmed (element 256) to produce either register (R) or combinatorial (C) output signals at the output of multiplexer 254. It can be programmed (element 228) to feed back the output of multiplexer 254 to Logic Array 212 either with or without also applying that multiplexer output to the associated I/O Pin. If the output of multiplexer 254 is fed back to Logic Array 212 without being applied to the associated I/O Pin, the I/O Pin remains free for use as an external input. Because the output signal of gate 218 is the logical combination of two P terms and a selective inversion (rather than being just a single P term output with no selective inversion as in prior art devices), that output signal can be a much more logically complex signal than in the past, thereby greatly enhancing the flexibility and utility of the device in relation to the generation of either an asynchronous clock signal (applied via element 222 to register 230) or an output enable signal (applied via elements 222 and 224 to element 260).
A typical B Macrocell 310 is shown in FIG. 3. Components of Macrocell 310 that are similar to components of Macrocell 210 have reference numbers with the same last two digits as the corresponding component of Macrocell 210. Thus, for example, element 320 in FIG. 3 is similar to element 220 in FIG. 2. These similar, and therefore correspondingly numbered elements, will not be discussed again in detail in connection with FIG. 3.
In addition to the components and features described above for Macrocell 210, Macrocell 310 has the following components and features: In addition to controlling multiplexer 322, the output signal of ASYNC/OE Mode Bit EPROM element 326 is applied to NAND gate 372. The other input to gate 372 is the Select Bus (SBUS) signal inverted by inverter 370. The SBUS signal is produced by one of two Bus I/O EPROM elements 30L or 30R (FIG. 1) for controlling, inter alia, whether the associated B Macrocell input latches are to accept data from internal bus 20 or from the associated I/O Pin. The output signal of NAND gate 372 is applied to AND gate 374 along with one output of multiplexer 322. The Output Enable (OE) output signal of AND gate 374 is used to control element 360. Accordingly, if the synchronous mode is selected (ASYNC=0), the output signal of gate 318 is applied to element 360 regardless of the state of SBUS. On the other hand, if the asynchronous mode is selected (ASYNC=1), the state of SBUS controls whether or not VCC is applied to element 360 (i.e., VCC is applied to element 360 only if SBUS=1).
Unlike Macrocell 210, in Macrocell 310 the output signal of multiplexer 354 is not necessarily fed back via element 22-358. Instead, the multiplexer 354 output signal is applied to one input terminal of multiplexer 380, the other input of which is connected to the associated I/O Pin. Multiplexer 380 is similar to multiplexer 354 and is controlled by MAC-I/O Feedback EPROM element 382 (similar to 220) to connect either of its inputs to its output depending on the state of element 382. Thus the signal applied to element 22-358 can be either the fed back output signal of multiplexer 354 or the signal (usually an external input signal) applied to the associated I/O Pin.
The output signal of multiplexer 380 is also applied to the Data (D) input terminal of Output Latch 384 (labelled O/P Latch in FIG. 1). Output Latch 384 accepts the applied signal when and if enabled by the Output Latch Enable (OLE) signal applied to its G input terminal. When and if tri-state driver element 386 (similar to element 360) is enabled by the Output Latch Output Disable (OLOD) signal, the Q output of Output Latch 384 is applied to one associated lead of eight-conductor internal bus 20. Accordingly, the output signal of multiplexer 380 can be applied to internal bus 20 if desired.
In addition to being applied to multiplexer 380, the I/O Pin signal is applied to one input of multiplexer 390 (one of the multiplexers labelled 8 MUX in FIG. 1). The other input of multiplexer 390 is the associated lead of internal bus 20. Multiplexer 390 (similar to 380) is controlled by the SBUS signal. When SBUS=0, multiplexer 390 applies the I/O Pin signal to the Data (D) input of Input Flip-Flop 392 (one of the flip-flops labelled 8 Input ET/FT FF in FIG. 1). When SBUS=1, multiplexer 390 applies the associated internal bus signal to Input Flip-Flop 392. The Q output signal of Input Flip-Flop 392 is applied to Logic Array 312 via driver element 22-362. Accordingly, either the I/O Pin signal or the internal bus signal can be applied to Logic Array 312 via elements 390, 392, and 22-362. (The Edge-Trigger (ET) and Flow-Through (FT) modes of Input Flip-Flop 392 are discussed below.)
FIG. 4 shows portions of the right half of device 10 in more detail than is shown in FIG. 1. In particular, the lower portion of FIG. 4 shows the smaller Macrocells 24R and 26 in more detail. These Macrocells generate the Input Latch Enable (ILE), Output Latch Enable (OLE), Output Latch Output Disable Left and Right (OLODL and OLODR), and Bus Port Output Enable (BPOE) signals. The corresponding left-hand portions of device 10 (especially smaller Macrocells 24L) are similar and therefore need not be shown or described in detail. Because there is only one BPOE signal for the entire chip, Macrocell 26 is not duplicated on the left-hand side of device 10.
Logic Array 412 (labelled EPROM Array in FIG. 1 and identified by reference numbers 212 and 312 in FIGS. 2 and 3) has already been described. Two product or P terms of Logic Array 412 are logically combined by AND gates 414a and 414b and OR gate 416 and (optionally) inverted by EXCLUSIVE OR gate 418 to produce the Enable Input Latch Enable (EILE) signal. The inversion function of gate 418 is controlled by invert select element 420, which is another EPROM element like element 220 in FIG. 2.
The further processing of the EILE signal to produce the ILE signal is based on (1) whether or not the Slow Write mode is selected, and (2) whether the Edge-Trigger (ET) mode or the Flow-Through (FT) mode is selected. In the Fast Write mode (or the Fast Read mode) (which are respectively the complements of the Slow Write and Slow Read modes), the timing of input/output functions is controlled by the WS bar and RS bar signals, with the product or P term signals from Logic Array 412 being the enabling signals. In other words, in the Fast modes the WS bar and/or RS bar signals are not delayed by having to propagate through Logic Array 412. In contrast, in the Slow Write mode (or Slow Read mode) the P terms are both the timing and enabling signals for the input/output functions. The Slow modes therefore free up the WS bar and RS bar pins for use as ordinary input pins if desired.
Either ET or FT can be used in either Fast or Slow mode, and determine whether the input register will be edge-triggered or flow-through. In ET mode, certain transitions (edges) in control signals trigger certain functions of device 10, especially the input/output functions of the device. In FT mode, certain logical levels (i.e., logic 1 or logic 0) of the control signals effect control of device 10, especially its input/output functions. Accordingly, ET can be used to provide more precisely timed control than is possible with FT. The combination of Fast mode and ET makes possible very rapid and precisely timed communication (especially Bus Port communication) with an associated microprocessor. This is especially advantageous with higher-speed microprocessors.
The ET/FT mode selection is controlled by ET/FT Flip-Flop Select EPROM elements 32L and 32R. Thus a separate ET/FT mode selection can be made for each half of the chip. The Slow Write and Slow Read mode selections (each of which applies to the entire chip) are respectively controlled by Slow Write and Slow Read select EPROM elements 34 and 36.
Considering now the EILE signal processing logic shown in FIG. 4, the output of gate 418 is applied to one input of multiplexer 422 and also to element 424 (labelled Sample EILE Product Term at Falling Edge of WS bar). The other input to element 424 is the WS bar signal. As the label implies, element 424 latches in the logical state of the output of gate 418 concurrent with the falling edge of the WS bar signal. The output signal of element 424 is this latched signal, and it is applied to the other input of multiplexer 422. The state of multiplexer 422 is controlled by the output of OR gate 426, the inputs of which are the FT and Slow Write mode selection signals. If either FT or Slow Write is selected, then multiplexer 422 applies the EILE signal to AND gate 428. On the other hand, if both ET and Fast Write are selected, then multiplexer 422 applies the output of element 424 to AND gate 428. The other input to AND gate 428 is derived from multiplexer 430 (controlled by the Slow Write selection signal). If Slow Write is selected, then multiplexer 430 applies VCC (logic 1) to AND gate 428. Otherwise, multiplexer 430 applies the output of element 432 to AND gate 428. Element 432 is a multiplexer including an inverter 434 in one of its input paths. The WS bar signal is applied to both input paths of element 432, and the state of the multiplexer in that element is controlled by the FT signal. Accordingly, when FT is selected, element 432 applies an inverted WS bar signal (WS or WSFT) to multiplexer 430, and when ET is selected, element 432 applies WS bar (WSET) to multiplexer 430. The output signal of AND gate 428 is the ILE signal used to enable Input Flip-Flop latches 392 in B Macrocells 310. As shown in FIG. 4, each of latches 392 effectively has an ET mode and an FT mode selected by the associated ET/FT Flip-Flop Select element 32. In the ET mode, each latch 392 responds to certain transitions in the ILE signal (in particular, to the ILE signal transition concurrent with the rising edge of the WS bar signal). In the FT mode, on the other hand, each latch 392 accepts data when the WS bar signal goes to logic 0. An illustrative implementation of a typical latch 392 is shown in FIG. 7 and described below.
As shown in FIG. 7, typical Input Flip-Flop latch 392 includes an upper "master" stage including cross-coupled inverters 790a and 790b, and a lower "slave" stage including cross-coupled inverters 790c and 790d. The FTILEN signal couples the signals DATAN and DATA to the master stage via N-channel transmission gates 792a and 792b. FTILEN is a logical combination of the ET/FT mode selection signal and the ILE signal. In FT mode, FTILEN=1 at all times. In ET mode, FTILEN = ILEN. The Data signal to be selectively latched into latch 392 is applied directly to one side of the master stage and is inverted by inverter 794 for application to the other side of the master stage. The two sides of the master stage are respectively coupled to the two sides of the slave stage via N-channel transmission gates 792c and 792d. The ILE signal is used to transfer data from the master stage to the slave stage via N-channel transmission gates 792c and 792d and N-channel transistor 796. The output of the latch is derived from buffer 798. Accordingly, in the ET mode (FTILEN = ILEN), latch 392 latches in the Data signal value as FTILEN transitions from logic 1 to logic 0. In the FT mode (FTILEN=1), on the other hand, the Data signal "flows through" gates 792a and 792b, and latch 392 latches in the Data signal value when ILE reaches 0.
From the foregoing it will be seen in relation to FIG. 4 that the selection of Fast Write causes the WS bar signal to be logically combined with the ILE P term signal without the WS bar signal being subject to the propagation delays associated with Logic Array 412. Assuming that Fast Write has been selected, the additional selection of ET causes input latches 392 to accept data from internal bus 20 concurrent with particular transitions in the ILE signal, which transitions are in turn concurrent with certain transitions in the WS bar signal (in particular, the rising edge of the WS bar signal). Accordingly, the timing of data input to latches 392 can be controlled very precisely in relation to the WS bar signal, thereby facilitating rapid data communication via internal bus 20. And since internal bus 20 is connected to the Bus Port, this in turn makes possible the precisely timed Bus Port data communication required for direct connection of device 10 to high-speed microprocessors.
Considering now the generation of the OLE signal, the output signals of two P terms in Logic Array 412 are logically combined by the collection of elements 440 (similar to elements 414, 416, 418, and 420) to produce the Enable Output Latch Enable Right (EOLER) signal applied to one input of AND gate 442. The other input to AND gate 442 comes from multiplexer 444 and is either VCC (logic 1), if the Slow OLE mode is selected by EPROM element 446 (similar to 220), or the CLKR signal if the Fast OLE mode (complement of the Slow OLE mode) is selected. The OLER output signal of AND gate 442 is applied to the G or enable input terminal of the Output Latch 384 in each B Macrocell 310 on the right-hand side of device 10. (The corresponding OLEL signal is used similarly on the left-hand side of device 10.) Accordingly, it will be seen that the Fast and Slow OLE modes are conceptually and operationally similar to the Fast and Slow Read and Write modes. In the Fast OLE mode, the timing of the OLE signal is controlled by the associated CLK signal (undelayed by having to pass through Logic Array 412), with the Output Latch Control P terms providing the enabling signal. In the Slow OLE mode, on the other hand, the P terms are both the timing and enabling signal, thereby freeing the associated CLK pin for use as an ordinary input pin if desired. As will become more apparent as the description proceeds, the Fast OLE mode facilitates the Fast Read mode of operation.
Turning now to the generation of the OLODR and OLODL signals, the output signals of two P terms in Logic Array 412 are logically combined by the collection of elements 450 (similar to elements 414, 416, 418, and 420) to produce the Enable Transfer Output to Bus Right (ETOBR) signal applied to the collection elements surrounded by dotted line 460. FIG. 4 shows the overall logic employed to produce the Transfer Output to Bus Right (TOBR) signal from the ETOBR signal, and also the overall logic employed to produce the OLODR, OLODL, Bus Port Input Enable (BPIE), and BPOE signals from the TOBR and TOBL signals. This logic is shown in more detail in FIGS. 5 and 6. (Some signals have different names in FIG. 4, on the one hand, and in FIGS. 5 and 6, on the other hand. Signal correspondence is as follows: RSN = RS bar; SLORDN = Slow Read Not or Fast Read; TOBLPT = TOB Left Product Term or ETOBL; TOBRPT = TOB Right Product Term or ETOBR; TOBLN = TOB Left Not or TOBL bar; TOBRN = TOB Right Not or TOBR bar; BPOEPT = BPOE Product Term or EBPOE.) As shown in FIG. 4, the RS bar signal is inverted by inverter 462 and applied to one input of multiplexer 464. The other input of multiplexer 464 is connected to VCC (logic 1), and the state of multiplexer 464 is controlled by Slow Read select EPROM element 36 which has already been described. Accordingly, when Fast Read (the complement of Slow Read) is selected, multiplexer 464 applies the inverted RS bar (RS) signal to one input of AND gate 466. On the other hand, when Slow Read is selected, multiplexer 464 applies VCC to AND gate 466. The other input to AND gate 466 is the ETOBR signal described above.
The TOBR output signal of AND gate 466 is logically combined with the TOBL signal (generated similarly on the left side of the chip) by logic element 468. Logic element 468 is shown in detail in FIG. 5 (with some additional elements that have already been described and with the addition of the left side counterpart of AND gate 466). (Because FIGS. 5 and 6 are closer to a chip implementation, the types of logic elements shown in these drawings differ slightly from their counterparts in FIG. 4. The basic correspondence of the elements is indicated by using the same last two reference number digits throughout FIGS. 4-6.) As shown in FIG. 5, logic element 468 includes NOR gates 570a and 570b and inverters 572a and 572b interconnected so that the first-occurring one of TOBL and TOBR causes the Output Latches 384 on the associated side of device 10 to seize internal bus 20. This is done by producing appropriate OLODL and OLODR signals for application to driver elements 386. In this way, any possible contention between the two sides of device 10 for the use of internal bus 20 is automatically resolved in favor of the side whose TOB signal is first applied to logic element 468. The side of device 10 that was not previously allocated the bus would be allocated the bus after the first-applied TOB signal returned to zero, provided that the TOB signal that came in later remained valid.
As in the case of Fast Write vs. Slow Write, in the Fast Read mode the RS bar signal provides the timing for data transfer from Output Latches 384 to internal bus 20 without having to propagate through Logic Array 412. Fast Read data transfer can therefore be timed much more precisely than Slow Read data transfer in which both the timing and enabling information comes from Logic Array 412. Fast Read can therefore be used (typically in conjunction with Fast OLE) to facilitate higher speed data communication, and especially communication via the Bus Port with a high-speed microprocessor.
Considering now the signals for enabling the Bus Port (shown at the bottom of FIG. 1 and again along the right-hand side of FIG. 4), the output signals of two P terms in Logic Array 412 are logically combined by the collection of elements 480 (similar to elements 414, 416, 418, and 420) to produce the Enable Bus Port Output Enable (EBPOE) signal. This signal is logically combined with TOBL and TOBR as shown in FIG. 4 (and again in FIG. 6) to produce BPOE and BPIE. As shown, for example in FIG. 4, if either the left or right side of device 10 wants to output data to internal bus 20, one or the other of the TOB signals will be logic 1, thereby causing the output of OR gate 482 to be logic 1. If EBPOE is also logic 1, the output of AND gate 484 will be logic 1 and Bus Port output driver elements 28a will be enabled. Data appearing on internal bus 20 can therefore be transferred via the Bus Port from device 10 to an external device such as an associated microprocessor. At the same time, whenever either of the TOB signals is logic 1, NOR gate 486 causes BPIE to go to logic 0, thereby disabling Bus Port input driver elements 28b. This prevents any external device (such as an associated microprocessor) from putting any data on internal bus 20 via the Bus Port while either the left or right side of device 10 is attempting to write to the internal bus. On the other hand, when neither of the TOB signals is logic 1 and internal bus 20 is therefore free, BPIE is logic 1, thereby enabling Bus Port input drivers 28b. An external device such as a microprocessor can then transfer data to device 10 via the Bus Port and internal bus 20. BPOE is zero whenever BPIE is one.
With regard to arbitration of possibly competing external demands for use of the Bus Port, note that (as shown in FIG. 1 and as described above) both the WS bar and RS bar signals go to the EPROM Arrays, as well as to the logic circuits which allow the Fast Read and Fast Write modes of operation (also described above). In the event that the conditions for both the Read operation (outputting data via the Bus Port) and the Write operation (inputting data via the Bus Port) occur simultaneously, an arbitration protocol can be established by appropriate programming of the programmable elements in the EPROM Arrays (labelled Logic Array 412 in FIG. 4) controlled by the WS and RS word lines in the P terms that generate EBPOE, ETOBR, ETOBL, and EILE. For example, if the Write operation is to take precedence over the Read operation, then the ETOB and EBPOE product terms could be conditioned in Logic Array 412 by the WS signal applied to the Logic Array such that ETOB and EBPOE can only be 1 when WS bar is 1 (i.e., when there is no Write operation request as indicated by WS being 0). Alternatively, if the Read operation is to take precedence over the Write operation, then the EILE product term could be conditioned in Logic Array 412 by the RS signal applied to the Logic Array such that EILE can only be 1 when RS bar is 1 (i.e., when there is no Read operation request as indicated by RS being 0).
As can be seen from the foregoing, elements 460 allocate use of internal bus 20 so that conflicting uses cannot be made simultaneously. The following is a tabulation of possible uses of internal bus 20 and the control signals that allow each use and prevent other conflicting simultaneous uses:
______________________________________Internal Bus Function BPIE ILEX TOBX BPOE______________________________________1. Bus Port to left 1 1,0 0,0 0or right side or 0,1to both sides 1,12. Left or right side 0 0,0 1,0 1to Bus Port 0,13. Left side to 0 1,0 0,1 0right side or 0,1 1,0vice versa (withoutsimultaneous BusPort output)4. Left side to 0 1,0 0,1 1right side or 0,1 1,0vice versa (withsimultaneous BusPort output)______________________________________
Although the term EPROM has been used above in connection with programmable elements such as the EPROM Arrays in FIG. 1 and the architecture control elements like element 220 in FIG. 2, it will be understood that these programmable elements can alternatively be implemented in many other ways known to those skilled in the art. Among the possible alternatives to EPROMs are electronically-erasable, electronically-programmable read-only memories (EEPROMs), fusable elements, random-access memories (RAMs), read-only memories (ROMs), and any other programmable and/or re-programmable storage elements, all of which (including EPROMs) are referred to herein and in the appended claims as "programmable elements" or "programmable means". Similarly, although these programmable elements or programmable means are sometimes described and claimed herein as producing output signals indicative of their states, it will be understood that this is merely convenient, generic terminology, and that in many embodiments within the scope of the description and claims, these elements merely process an applied signal differently depending on the programmed state of the programmable element.
It will be understood that the foregoing is merely illustrative of the principles of the invention, and that various modifications can be made by those skilled in the art without departing from the scope and spirit of the invention. For example, the number of A and B Macrocells can be changed as desired, as can the number of Logic Array P terms employed in each Macrocell.
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|Mar 2, 1987
Owner name: ALTERA CORPORATION, 3525 MONROE STREET, SANTA CLAR
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text:
Edinburgh International Book festival podcast: highlights from the World Writers' Conference
The centrepiece of this year's Edinburgh International Book festival has been a recreation of a 1962 conference debating the state and future of fiction. Over five days, 50 writers from around the world gathered for daily two-hour sessions debating the issues identified 50 years ago: should literature be political, style versus content, is there such thing as a national literature, censorship, and the future of the novel.
We have carried the opening polemics on the website over the course of the conference, so decided to devote this podcast to finding out what some of the other delegates attending the conference felt, asking them how relevant are the questions posed today, how do the issues differ from country to country, and is it possible to identify a way forward.
Our interviewees hailed from everywhere from Argentina to Pakistan, Boston to Beijing: they include Junot Diaz, Elif Shafak, Kamila Shamsie, Alan Bissett, Patrick Ness, Carlos Gamerro, Denise Mina and Xi Chuan.
Reading list: the polemics
Ahdaf Souief: should literature be political
Ali Smith: style vs content
Irvine Welsh: is there such a thing as a national literature
Patrick Ness: censorship
China Miéville: the future of the novel


text:
10 years ago Andre weighed 130 kg.
He was unfit and in poor health. He ate whatever he wanted, did not exercise and smoked. His body did not respond well to that.
He then made the decision to lose some weight and over the next couple of years went on numerous diets to try and drop the weight. He found that each time he lost weight, he would regain the weight he lost fairly quickly.
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This is how Andre looked a few years ago.


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Unforgettable Moments Hasc Vol 3 DVD
Enjoy this two-hour long journey through Hasc's most Unforgettable Moments, including 9 brand-new, never seen before footage for your viewing pleasure. The best of Hasc just got better! Includes a peek backstage at an actual Hasc concert, and much much more! Entertainment for the whole family!
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text:
Why This Pen and Paper Gal is Turning to Digital Organization (A Review of the New ListPlanIt)by Ann Timm
One of my favorite ways to stay organized has just gotten even better. I've been using ListPlanIt's printable lists and organizational pages in my homemaking binder, menu plans on my fridge, shopping lists tucked into my purse, and anywhere else... Read More
Real Food Makeover: The "W" Familyby Ann Timm
Introducing the first of four families to receive a Real Food Makeover! Each week, I will be highlighting a different family and offering suggestions and resources to help them along the road to eating more real, whole, healthy foods. Meet... Read More
Organization in the Real Food Kitchen: Favorite Recipes Listsby Ann Timm
My poor hubby. He really dislikes piles, and yet he married a gal who's just a little bit "out of sight, out of mind". Thus, I'm a piler. All through the Christmas holidays, there was one particular pile that continued... Read More
Explore the Keeper of the Home CollectionHomemade/DIY Real Food Healthy Living For Women Keeping the Home Family Life Do It Yourself Natural Remedies Recipes
Have a Question? Ask Ann!


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Changing the SharePoint Farm Administrator Password
Updated: November 1, 2013
Applies To: System Center 2012 - Data Protection Manager, System Center 2012 R2 Data Protection Manager, System Center 2012 SP1 - Data Protection Manager
When the SharePoint farm administrator password is changed, you have to rerun the ConfigureSharePoint.exe tool on the front-end Web server that is configured for SharePoint protection in System Center 2012 – Data Protection Manager (DPM). For more information about how to use ConfigureSharePoint.exe, see Using ConfigureSharePoint.
If you do not rerun ConfigureSharePoint.exe after changing the farm administrator password, SharePoint farm backups will continue with the following limitations:
DPM will be unable to discover any changes in the SharePoint farm topology (for example, adding a new database or deleting an existing database).
In DPM, the list of URLs in the SharePoint farm cannot be updated. Therefore, item-level recovery for newly added items will not be available for protection.
Recovery of the complete farm content cannot be triggered from DPM. The databases must be recovered one by one.
Databases in the farm cannot be recovered by using the Recover to original Instance of SQL Server option in the DPM Recovery Wizard. You can recover the databases to the original location by using the Recover to any SQL Instance option.
The alert "DPM Alert – BackupMetaDataEnumeration Failed" is generated in DPM. See the Details pane for more information about the cause of this alert.


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Published on 7/03/2017 10:50:49 AM | Source: Dion Global Solutions Ltd.
Bharat Financial Inclusion dips nearly 6% on NPA concerns
Shares of Bharat Financial Inclusion (formerly S K S Microfinance), tumbled nearly 6 per cent in early trade on the Bombay Stock Exchange after micro lender informed the investor community that 4.5 per cent of its gross loan portfolio is under risk of slipping into bad loan in the fourth quarter.
Reacting to the news, shares of company declined as much as 5.97 per cent to hit intra-day low of Rs 754.25 apiece on the Bombay Stock Exchange. In a similar fashion, stocks of company slipped 1.76 per cent to Rs 788.40 apiece on the National Stock Exchange. Meanwhile, the broader benchmark BSE Sensex was trading at 29,035.54, down 12.65 points, or 0.04 per cent, at 10:08 hours.


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India is a wonderful country with all its glorious festivals. After the pompous celebration of Navratri, people get back to their normal lives but the sense of celebration still resonates in their minds. Karwa Chauth is such a festival which lights up your mood with its magical touch. Specifically, this is a festival celebrated by married women of North India.
Best Recipes To Try After Karwa Chauth Fasting
According to the Hindu calendar, the festival is celebrated on the month of 'Kartik', just after the full moon. Here, 'Karwa' means small earthen pot and 'Chauth' stands for the fourth day of the dark-fortnight (Krishna-Paksha). On this occasion, married women keep fast for the long life and prosperity of their husbands. The fast starts with the sunrise and women break it after seeing the moon.
Have These Items For Karva Chauth Vrat
This festival consists of several rituals. Fasting is the most important part of it. Hindu women perform all rituals with complete dedication. With passion and vigor, Karwa Chauth is now celebrated throughout the country with regional variations. But what is the significance of Karwa Chauth? Every festival has its own importance. If you know about the significance of Karwa Chauth, the spirit of the occasion will increase a lot. So, before celebrating Karwa Chauth this year, know the significance of this special day-
1. Establish A Strong Marital Bond- What is the significance of Karwa Chauth? The fast is observed by married women for the sake of their husbands. This festival strengthens the love between the couple. Today, many men observe fast along with their wives to show their support and love.
2. Bond Between Mother-In-Law And Daughter-In-Law- Significance of Karwa Chauth also lies in the reinforcement of the bond between mother-in-law and daughter-in-law. A girl leaves her family behind and comes to her in-laws' house. Through the 'sargi', (gifts of mother-in-law to daughter-in-law), a lovely relationship can be made between these two important women of the house.
3. Prayer For Good Harvest- This festival falls during the wheat-sowing time. The northern states are well-known for wheat cultivation. As the wheat seeds are stored in earthen pots or 'Karvas', it is believed that, women celebrate the festival with the hope of good wheat cultivation.
4. Self-Restriction- What is the significance of Karwa Chauth in Hindu religion? A fast from sunrise to moonrise is not an easy task. It is the symbolism of self-control and focus on the importance of the festival.
5. Self-Dedication- It is believed that the fasting ritual of the wife offers health and prosperity to the husband. Not only for the husband's well-being, but the rituals of Karwa Chauth are also a token of dedication offered to the almighty. So, do you realise the significance of Karwa Chauth?
So, Karwa Chauth is not just a mere festival. The underlying significance of Karwa Chauth can make you understand the value of it. The festival is celebrated by several women at one place, all dressed up in glorious sarees and ornaments. They put mehendi on their palms and worship the moon together. A 'pujarin' or elderly woman conducts the whole function. After seeing the moon, they break their fast by taking water and food from their husbands.


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The Bible in a Postmodern Age
Written by William Macleod
|Reformed Worldviews - Postmodernism
We are in what is called the Postmodern Age. It is important for us as Christians to be aware of the philosophical outlook of those among whom we live and whose lives impact upon us within the church. In order to relevantly communicate the Gospel in our day, we must be aware of the way people think. What are the distinctives of Postmodernism? What is different about our age from that of our fathers? The Modernists had great faith in reason and in science as able to provide all the answers. Postmodernists are disillusioned with regard to science's ability to answer the deepest questions. What is truth? Postmodernists argue that there is no such thing as objective truth. Rather everyone must come to his own conclusion. Your understanding is right for you and my understanding is right for me. Everyone does that which is right in his own eyes (compare Judges 21:25). Everyone is right. I decide what is right for me. There is no absolute truth. That means that I am happy in my beliefs and you are free to be happy in yours. The Postmodernist says I must not criticize others but accept their views as right for them even if these views are the opposite of mine.
Every Religion Right?
So, on the basis of Postmodernism, every religion is right. One is a Roman Catholic, another is a Charismatic, another is a conservative Presbyterian and yet another is against formal religion and worships on his own at home. Even the atheist is justified in his position. Similarly, according to Postmodernism, every lifestyle is right. One follows a traditional Christian lifestyle and lives with his spouse and is faithful to that spouse all his life. Another lives with a partner unmarried and later moves on to another partner. Another practises homosexuality. What right, they ask, have you to criticize others? If someone is caring and loving then surely that is all that matters? Toleration is everything. The Postmodernist says that you must not try to force your views on others. One of the advantages we have in this postmodern world is, on one level, more tolerance for all religions and lifestyles. You can believe what you like and live the way you want. No one will mock, criticize or persecute you. One follows Christ, another Islam, another Buddha, and someone else invents his own new religion – that is all fine. All religions are different pathways up the mountain to God. You go your way and I will go mine. Sadly this means we end up with no objective religious truth.
True Christianity is Exclusive
True Christianity is totally different to this Postmodernism. It cuts across every religion and every personal opinion. It says that there is truth – absolute truth, and that absolute truth is to be found in the Bible alone. There is only one way of salvation and that is by faith in the Lord Jesus Christ. Jesus is the great Prophet and Teacher and He said: 'He that rejecteth me, and receiveth not my words, hath one that judgeth him: the word that I have spoken, the same shall judge him in the last day' (Jn.12:48). Every man and woman is wrong and all are going to hell apart from those who believe and follow the Bible. Jesus stated quite categorically, 'I am the way, the truth, and the life: no man cometh unto the Father but by me' (Jn.14:6). Every other religion leads to a lost eternity. Every form of the Christian religion apart from that which teaches faith in Christ alone as the only way of salvation also leads to eternal destruction. So Christianity and Postmodernism are against one another. Christianity demands repentance from every other outlook and philosophy. The natural man, the unconverted man, is always wrong in his thinking. The mind of fallen man is defective: 'Ye must be born again' (Jn.3:7). 'The wisdom of this world is foolishness with God … The Lord knoweth the thoughts of the wise that they are vain' (1Cor.3:19-20). 'The natural man receiveth not the things of the Spirit of God: for they are foolishness unto him: neither can he know them, because they are spiritually discerned' (1Cor.2:14). The Bible is the truth – the absolute truth – as true as the laws of science. It calls everyone to turn from Modernism and Postmodernism and every other unbiblical way of thinking and submit to God and His Word.
The Bible's Teaching about Itself
With regard to every other doctrine we look to Scripture to see what it teaches. For example we look to the Bible for the right understanding of Justification or the Atonement. So we must look to the Bible to see what it teaches about itself.
Paul writes to Timothy: 'All Scripture is given by inspiration of God' (2Tim.3:16). The word 'inspiration' is sometimes misunderstood. It is treated as if it meant something like a poet being inspired to write a poem. The word used in the Greek is 'theopneustos' which means 'God breathed'. The idea is not that something is breathed into the Scripture but that the Scripture itself is breathed out by God. It is His breath and His word. This quality belongs not just to part of it but to 'all Scripture'. The first reference of this passage is of course to the Old Testament which was the Scripture of the day. But Peter writes: 'The longsuffering of our Lord is salvation; even as our beloved brother Paul also according to the wisdom given unto him hath written unto you; as also in all his epistles, speaking in them of these things; in which are some things hard to be understood, which they that are unlearned and unstable wrest, as they do also the other Scriptures, unto their own destruction' (2Pet.3:15-16). Here Peter refers to the epistles of Paul. He finds difficulty understanding all that Paul writes and speaks of heretics who twist Paul's words in just the same way as they do other parts of Scripture, finding in them weird and wonderful false doctrines to lead themselves and others astray and eventually to Hell. It is interesting to note that here Paul's writings are called Scriptures. These New Testament writings are thus placed on the same level as the accepted Old Testament Scriptures of that day. Earlier in his second Epistle, Peter writes of the way in which Scripture was written: 'Knowing this first, that no prophecy of the Scripture is of any private interpretation. For the prophecy came not in old time by the will of man: but holy men of God spake as they were moved by the Holy Ghost' (2Pet.1:20-21). The prophets and other holy men who wrote the Bible were not presenting their own ideas or their own views about God. It was not their private interpretations. Rather they were moved and carried along by the Holy Spirit. They were directed in what they wrote by the Spirit. It was because of this operation of the Holy Spirit upon them that the Bible can rightly be described as Godbreathed. Scripture is not man's reflections on God but God's revelation of essential truths to man. The amazing thing about inspiration is that each writer writes with his own distinctive background, vocabulary and style, but at the same time the end product is the word of God. Because it is God's word it is inerrant. The writer is not simply writing down like an amanuensis the words that God speaks to him. We do not believe in a dictation theory of inspiration. Rather all is processed through the mind of the author but the Spirit ensures that what is written is infallible.
Since Scripture is God-breathed it is rightly to be equated with God Himself. It has all the authority of God behind it. Ministers and churches only have authority as they act or speak in accord with the Bible. God rules the world and the church. The means He uses for conveying His will to His subjects is the Scriptures. The terms, 'Scripture says', 'It says' 'It is written' and 'God says', are used interchangeably in the New Testament when quoting the Old Testament. This makes plain that what Scripture says, God says. Jesus stated, 'The Scripture cannot be broken' (John 10:35). The Bible is infallible and inerrant. A quotation from the Scripture settles disputes. God has spoken and that concludes the matter. God does not make mistakes and whatever He writes is without mistake or error. Some liberal teachers who do not like Scripture's doctrine of inspiration claim that there are errors and contradictions in the Bible. However when you ask them to point out the errors they are not so ready. There are a few apparent contradictions in Scripture but they are only apparent. Not one part of Scripture really contradicts another. There is a reasonable explanation for every apparent contradiction and a good evangelical commentary will provide an explanation. Because all Scripture is the Word of God it comes to us with the authority of God. He has spoken and we must believe and obey. Jesus states: 'Thy word is truth' (Jn.17:17).
It is necessary to say a few words on Canon. The Canon is simply the list of books which rightly belong to the Bible. We accept only the 39 books of the Old Testament and the 27 books of the New Testament. The Old Testament books were accepted by the Jews and are quoted extensively in the New Testament. The New Testament books were similarly accepted by the New Testament church. The Apocrypha which consists of twelve books written in the inter-testamental period was accepted by the Roman Catholic Council of Trent (Sixteenth Century) but was rejected by the Reformers. They were not accepted by the Jews as being on the same level as Scripture. They are not quoted in the New Testament and so are not to be given the authority which the New Testament authors afford to the Old Testament. Why are some books chosen as belonging to the Bible and not others? Simply on the basis of inspiration. We do not at the end of the day depend on Jewish or church councils. Rather the question we must ask with regard to any book is, Is it inspired? If it is inspired it should be in the Canon but not otherwise. And how do we know which books are inspired? It is by the Holy Spirit witnessing with our spirit. The Spirit witnesses with our Spirit that we are the children of God (Rom.8:16). In the same way He assures us that certain books belong to the Bible and so are His Word.
The Bible is fundamental to Christianity. There are some churches which depend more on tradition eg the Roman Catholic Church and the Eastern Orthodox Churches. But even with them, their starting point has originally been the Bible and then they have moved on from there with their evolving traditions. Yet even these churches like to show how their beliefs and practices are in some way related to the teaching of the Scriptures. Other churches are more rationalistic. They are regarded as liberal and depend on human reason. Disregarding the fallenness of human reason they try to work out what parts of the Scriptures are acceptable to human reason. Some of the Bible they dismiss as myth – time-bound and primitive. Miracles, for example, are regarded as impossible and belonging to a pre-scientific age and so requiring to be re-interpreted for today's world. They move with fashions and what is generally acceptable in contemporary society. They, as it were, use scissors to remove unacceptable parts from the Scriptures. Yet they too must start with the Bible because we have no other sourcebook for knowledge of God and Christ and salvation but the Bible. We would have no Christianity without the Bible. The only way we can get to know about God is by His revealing Himself to us. Man by searching cannot find God (Job 11:7). The Bible is God's special revelation to us. It reveals what we are to believe and how we are to live. There is, of course, what is called general revelation outside of the Bible. The heavens declare the glory of God (Psalm 19:1ff). Creation around us reveals to us the Creator: 'For the invisible things of Him from the creation of the world are clearly seen, being understood by the things that are made, even His eternal power and Godhead; so that they are without excuse' (Rom.1:20). Further, all human beings have a conscience. When God created us He placed within us a sense of Himself. Atheists argue vehemently against God's existence. Why? Richard Dawkins, the renowned atheist, gets very angry as he argues against those who believe in God's existence. Why? Because he has a conscience and is suppressing the truth in unrighteousness (Rom.1:18), and he does not find it easy to do that. His conscience is condemning his atheism. From nature we learn about the power and godhead of God. We are made aware that He is Creator and that we are answerable to Him at the end of the day. But the only way we can know the Gospel of Jesus Christ is by special revelation. 'How shall they believe in him of whom they have not heard? and how shall they hear without a preacher?' (Rom.10:14). 'It pleased God by the foolishness of preaching to save them that believe' (1Cor.1:21). Also even with regard to those things revealed by general revelation we need the Bible to give us clarity and a full, proper understanding. The Scriptures are vital to Christianity. In the Bible we have a great treasure which humanity needs. We must unashamedly, fearlessly and fervently communicate this message. Loving our fellowmen we cannot leave them in the darkness of Postmodernism. We must call to Postmodern man as Jesus did to the people of the day in which He lived: 'Repent: for the kingdom of heaven is at hand' (Mt.4:17).
Rev. William Macleod is the pastor of the Knightswood Free Church of Scotland Continuing, in Glasgow, Scotland, UK. He is the editor of his denomination's magazine, the Free Church Witness, and is Principal of the Free Church Seminary, Inverness. This article was previously printed in the Free Church Witness and is republished here with permission.


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|Cruisin' Amoung the Hot Rods : Foster`s Daily Democrat
Contributed by: deuceswild
By GEOFF CUNNINGHAM Jr.
The grounds at Gunstock Mountain Resort looked like something out of "Grease" on Friday as automobile enthusiasts from all over the country gathered for a "Laconia Nationals" auto show weekend that clearly focuses on the hot rod.
The 6th annual "Laconia Nationals" event is expected to bring more than 800 hot rods, custom and muscle cars to Gunstock throughout the Memorial Day Weekdend and the event kicked off on Friday saw vehicles of all shapes and colors thundering into the region carrying those who say they have gasoline running through their veins.
Bob Canney (Hotrod Bob) of Berwick, Maine, is a longtime hot rod enthusiast who dresses and looks the part, with a vintage leather jacket and jeans — a look that prompted Laconia Nationals head Jim Candle to joke, "He thinks Eisenhower is still president."
Canney is a member of multiple car clubs, both locally and nationally, and has brought his 1932 Ford "five-window coupe" to this year's Laconia Nationals event.
He said the car took 18 months for him to build and — while small in stature — it boasts a 350 V-8 engine.
"I'm pushing 400 horsepower," said Canney with a smile.
Ian Targonsky of Connecticut restored his 1929 Ford Model A in four months and preferred a less-polished look, with cracked whitewall tires and a primer black paint job.
The pair said such vehicles were plentiful and cheap following World War II and were often purchased, modified and raced.
Targonsky, a landscaper by trade, has a side business in restoring hot rods, but he owns more cars than he would like to admit, including a 1966 Cadillac limousine and a 1949 Chevy pickup.
"I've got cars coming out of my ears," said Targonsky with a laugh.
While many of the cars look in showroom shape, don't think they don't get driven.
Canney said he put 17,000 miles on his Ford hot rod last year.
Mike Shea of Spencer, Mass., has a '31 Ford that he has driven 30,000 miles in just over two years.
He traded his hot rod sedan for the more sporty Ford, which features a 300-horsepower engine and a menacing look with a slim windshield a face could barely fit in.
Shea has one windshield wiper and joked, "The passanger doesn't need to see."
Many of those attending are in multiple car clubs and attend such gatherings each year.
"It's like a traveling community," explained Canney.
Officials say the rapidly growing Laconia Nationals event offers fun and entertainment for the whole family and a chance to see and — of course — hear hundreds of high-horsepower, eye-popping cars and trucks up close.
Last year's owners of participating vehicles came from eight states and Canada to be part of festivities, including smoke shows on the "Burnout Pad" and the antics of the "Flame Crew" — a New Jersey outfit that shot fire 100 feet in the air from the exhaust pipes of their cars.
Motor-building competitions, early hot rod movies from the 1950s and 1960s, and model-building for the children help round out an event that also features vendors, a "Monster Truck Ride" on Saturday and entertainment by "Memphis Rockabilly" — a band billed as one of the best rockabilly bands in the country, having performed with major artists like Roy Orbison, Jerry Lee Lewis and the Fabulous Thunderbirds.
New this year will be a continuous "Cruise to Nowhere" on Saturday night between Laconia and Weirs Beach. Those interested in taking part need only to own a registered car built before 1980 and go to www.laconianationals.com to register for an event that will feature an awards ceremony on Sunday afternoon boasting $10,000 in prizes.
One lucky participant will be qualified for the Right Coast Association's Giveaway Car valued at more than $40,000.
Admission to this year's event is $10 for adults and $5 for children ages 6-12. A two-day pass runs $15.
Views: 3,762


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Animal Protection Trial: Turkish Human Rights Campaigners angered. Charge against Austrian Association of Judges
Turkish human rights campaigners have responded angrily to a statement given by the Association of Judges earlier this week. The association's statement followed strong criticism from the media for the decision to charge a professor of law for criticising the judge's handling of the animal protection case
In the newspaper interview the professor stated that, after being at the court she was of the opinion that the defendants were not being given a fair trial. The Vice President of the Association of Judges told the press We are not in Turkey, we are not in Sudan. Here we conform to human rights.
Angered by the statement, human rights campaigners in Turkey wrote a public letter concerning the matter which can be read at the following link:
In the letter campaigners from the group 'Freedom to Earth Association' point out that human rights violations in Turkey are not an excuse to ignore fundamental rights of people in Austria, as they are being in the animal protection case.
Charges are being brought against the Vice President of the Austrian Judges Association for slander
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"Dr. Alice Kuntz is an absolute perfectionist! She thoroughly explained my facial rejuvenation treatment and we discussed every detail about the look I wanted to achieve. Her staff is professional, knowledgeable, and helpful. Working with Dr. Kuntz and her staff is one of the most pleasant experiences I have ever had with a physician's office. I would not hesitate to recommend her to family, friends, and acquaintances." Linda N.
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About me
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|Sept. 17, 2009
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My Reviews
AFOM - Memory Recovery & Retention For Firefox Only
Rated 4 out of 5 stars
Been using very recently on XP SP2 and FF 3.5.3 on a VM. So far no crashes, average reduction of ~65% in memory usage and of 45-55% in memory peaks.
Will give further feedback. Thanks.
Download YouTube Videos + Flash Video Downloader / Download-Helper
Rated 5 out of 5 stars
A lot better than most alternative add-ons. Detects video and music files better than NetVideoHunter.
As I can tell so far, it doesn't try to send info anywhere, and it has no adds nor annoying popups.
Just one thing: could there be an option to not show the icon neither in the stabur nor the toolbar?
Tab Mix Plus
Rated 5 out of 5 stars
An indispensable add-on for Firefox. Just one request: could you add some of Multiple Tab Handler features, namely the ability to select several tabs and perform actions on the select tabs? Also, the Copy URIs with several copying alternatives is useful. (The tab saving portion is well covered with MAFF).
Many thanks
Rated 4 out of 5 stars
Tested it in a scenario with two scheduled actions while the browser was open, and it worked well. Still, as others commented, the UI needs work. For instance, Options opens up the scheduler itself, when one would expect actual options (like not showing the item menu in Tools, and so on). It has great potential, especially if the scheduling rules become more advanced.
Good work.
Load Control
Rated 5 out of 5 stars
Simple and works well. I use Tab Mix Plus, that allows to reload all tabs through a context menu, but has no option to stop loading them. A Useful add-on.This review is for a previous version of the add-on (0.2).
Rated 5 out of 5 stars
Tested it in Windows, it does exactly what is intended, so far without errors:
- one can open the Library in either a tab, sidebar or window;
- the History's default shortcut opens it in a tab;
- all operations one can use in the default FF window work well (including drag and drop, open with double-click, ...);
Nicely done
To create your own collections, you must have a Mozilla Add-ons account.


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MOVIE SYNOPSIS [ General Audiences ] Movie of Brendan Foley. Introduced in cinemas in 2016, with production teams of USA. You can watch Sonata online on TV cable or theaters with original audio in English at different dates. This film premiered in theaters in 2016.
Rating: 5 by 10 users./
Runtime: 100 minutes
Booboo Stewart and Kiril Kulish.
Drama, Romantic.
100-minute film (full movie) directed by Brendan Foley.
The original audio of Sonata has dialogues in Dolby Digital, it was produced in USA.
It premiered in cinemas or television in 2016.
Screenplay written by Brendan Foley, Matt Nicholas and Nastassja Sanchez.
Ashley Anguline, Judi Bell and Matt Nicholas.
This film was produced and / or financed by Rebel Maverick Productions and Iconic Media Productions.
Without commercial breaks, the full movie Sonata has a duration of 100 minutes; the official trailer can be watched in streaming on the Internet. You can watch this full movie free in EnglishDolby Digital in movie TV channels, renting the DVD or with VoD services (Video On Demand player, Hulu) and PPV (Pay Per View, Netflix).
See the page of this full movie, Sonata in FULLTV Movies.