text:
|Publication number
|Publication type
|Application number
|Publication date
|29 Aug 2006
|Filing date
|10 Mar 2003
|Priority date
|10 Mar 2003
|Fee status
|Also published as
|Publication number
|Larry L. Byers, Joseba M. Desubijana, Gary R. Robeck, William W. Dennin
|Original Assignee
|Qlogic Corporation
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (23), Non-Patent Citations (1), Referenced by (9), Classifications (20), Legal Events (5)
|External Links: USPTO, USPTO Assignment, Espacenet
This application is related to the following U.S. patent applications assigned to the same assignee, filed on even date herewith and incorporated herein by reference in their entirety:
"Method And System For Supporting Multiple External Serial Port Devices Using A Serial Port Controller In An Embedded Disk Controller", Docket Number QE1042.U.S. Ser. No. 10/385,039 with Michael R. Spaur and, Ihn Kim as inventors. "Method And System For Automatic Time Base Adjustment For Disk Drive Servo Controllers", Docket Number QE1040.U.S. Ser. No. 10/384,992, With Michael R. Spaur And Raymond A. Sandoval as inventors. "Method And System For Collecting Servo Field Data From Programmable Devices In Embedded Disk Controllers", U.S. Ser. No. 10/385,405 Docket NO. QE1041.US, with Michael R. Spaur And Raymond A. Sandoval as inventors.
"Method And System For Embedded Disk Controllers", Docket No. QE1034. U.S. Ser. No. 10/385,022 with Larry L. Byers, Paul B. Ricci, Joseph G. Kriscunas, Joseba M. Desubijana, Gary R. Robeck, David M. Purdham and Michael R. Spaur as inventors. "Method And System For Using An Interrupt Controller In Embedded Disk Controllers", U.S. Ser. No. 10/384,991 Docket No. QE1039.US, with David Purdham, Larry L. Byers and Andrew Artz as inventors; and "Method And System For Using An External Bus Controller In Embedded Disk Controllers" U.S. Ser. No. 10/385,056 Docket No. QE1035.US With Gary R. Robeck, Larry L. Byers, Joseba M. Desubijana. And Fredarico E. Dutton As Inventors.
1. Field of the Invention
The present invention relates generally to disk controllers, and more particularly to an embedded disk controller that includes a hard disk controller, a microprocessor, a digital signal processor, and a servo controller.
2. Background
Conventional computer systems typically include several functional components. These components may include a central processing unit (CPU), main memory, input/output ("I/O") devices, and disk drives. In conventional systems, the main memory is coupled to the CPU via a system bus or a local memory bus. The main memory is used to provide the CPU access to data and/or program information that is stored in main memory at execution time. Typically, the main memory is composed of random access memory (RAM) circuits. A computer system with the CPU and main memory is often referred to as a host system.
The main memory is typically smaller than disk drives and may be volatile. Programming data is often stored on the disk drive and read into main memory as needed. The disk drives are coupled to the host system via a disk controller that handles complex details of interfacing the disk drives to the host system. Communications between the host system and the disk controller is usually provided using one of a variety of standard I/O bus interfaces.
Typically, a disk drive includes one or more magnetic disks. Each disk typically has a number of concentric rings or tracks on which data is stored. The tracks themselves may be divided into sectors, which are the smallest accessible data units. A positioning head above the appropriate track accesses a sector. An index pulse typically identifies the first sector of a track. The start of each sector is identified with a sector pulse. Typically, the disk drive waits until a desired sector rotates beneath the head before proceeding for a read or write operation. Data is accessed serially, one bit at a time and typically, each disk has its own read/write head.
The disk drive is connected to the disk controller that performs numerous functions, for example, converting digital data to analog head signals, disk formatting, error checking and fixing, logical to physical address mapping and data buffering. To perform the various functions for transferring data, the disk controller includes numerous components.
Typically, the data buffering function is used to transfer data between the host and the disk. Data buffering is needed because the speed at which the disk drive can supply data or accept data from the host is different than the speed at which the host can correspondingly read or supply data. Conventional systems include a buffer memory that is coupled to the disk controller. The buffer memory temporarily stores data that is being read from or written to the disk drive.
Conventionally, when data is read from the disk drive, a host system sends a read command to the disk controller, which stores the read command into the buffer memory. Data is read from the disk drive and stored in the buffer memory. An ECC module determines the errors that occur in the data and appropriately corrects those errors in the buffer memory. Once it is determined that there are no errors, data is transferred from the buffer memory to the host system.
Conventional disk controllers do not have an embedded processor or specific modules that can efficiently perform the complex functions expected from disk controllers.
Conventional disk controllers cannot access plural external memory having different timing characteristics. In addition, conventional controllers do not easily permit use of different bus data width to which external memory is coupled.
Conventional disk controllers do not have a built in module that can track bus activity and hence provide valuable information for de-bugging. In conventional disk controllers, the disk controller must be coupled to an external bus analyzer to debug and/or monitor bus activity. This process is cumbersome and requires additional pins on the disk controller. In addition, conventional monitoring techniques cannot easily isolate components within the disk controller that need to be monitored.
Conventional disk controllers do not have a dedicated module that controls, prioritizes and generates interrupts.
Therefore, what is desired is an embedded disk controller system that can efficiently function in the fast paced, media storage environment.
The present invention solves the foregoing drawbacks by providing an embedded controller with more than one processor.
In one aspect of the present invention, a history module for monitoring plural components in an embedded disk controller with a first main processor operationally coupled to a first bus and a second processor operationally coupled to a second bus is provided. The history module includes an event control module that receives break point conditions that stops the history module from recording information of a component; and a first register that allows selection or-de-selection of certain components in the embedded disk controller. The first register can also store a trigger mode value, which specifies a number of entries that are made in history module buffer(s) after a break point condition is detected.
The history module continues to record information until a break point condition is encountered. The history module may stop or continue to test for break point condition even after a break point condition is encountered. An interrupt module generates an interrupt after a break point condition is detected and an interrupt source is enabled.
The history module also uses a second register that includes a pointer which tracks where a next entry in a history module buffer will be made while the history module is recording information.
In another aspect of the present invention, a method for monitoring plural components in an embedded disk controller with a first main processor operationally coupled to a first bus and a second processor operationally coupled to a second bus is provided. The method includes, determining if break point testing is enabled; determining if a trigger mode field is set up; and testing for break point condition if a break point condition is set.
In one aspect of the present invention, history module 234 provides visibility to transactions on the internal AHB Bus 236 or APB Bus 208. In another aspect of the present invention, the history module selects specific slave or peripheral transactions for recording based on a slave or peripheral mask. This allows selective monitoring of components.
In yet another aspect of the present invention, the process provides break point conditions for stopping History module recording. However, external break point signal may be continually provided after recording stops. In addition, break point conditions may be provided for an Address/Data break point and an Address Range break point. In another aspect of the present invention, an external analyzer is not required to record bus transactions. This saves pins and the effort required for connecting an embedded disk controller to an external device so that its components can be monitored.
This brief summary has been provided so that the nature of the invention may be understood quickly. A more complete understanding of the invention can be obtained by reference to the following detailed description of the preferred embodiments thereof in connection with the attached drawings.
The foregoing features and other features of the present invention will now be described. In the drawings, the same components have the same reference numerals. The illustrated embodiment is intended to illustrate, but not to limit the invention. The drawings include the following Figures:
To facilitate an understanding of the preferred embodiment, the general architecture and operation of a disk controller will be described initially. The specific architecture and operation of the preferred embodiment will then be described.
The disk drive system of
As shown in
As is standard in the industry, data is stored on disk 115 in sectors. Each sector is byte structured and includes various fields, referred to as the sector format. A typical sector format includes a logical block address ("LBA") of about four bytes followed by a data field of about 512 bytes. The LBA contains position information, for example, cylinder, head and sector numbers. A field for a CRC checksum of 4 bytes typically follows the data field. A subsequent field for a number of ECC bytes, for example 40–80 bytes, is located at the end of the sector.
Controller 101 can be an integrated circuit (IC) (or application specific integrated circuit "ASIC") that comprises of various functional modules, which provide for the writing and reading of data stored on disk 115. Microprocessor 100 is coupled to controller 101 via interface 118 to facilitate transfer of data, address, timing and control information. Buffer memory 111 is coupled to controller 101 via ports to facilitate transfer of data, timing and address information.
Data flow controller 116 is connected to microprocessor bus 107 and to buffer controller 108. An ECC module 109 and disk formatter 112 are both connected to microprocessor bus 107. Disk formatter 112 is also coupled to data and control port 113 and to data bus 107.
SCSI controller 105 includes programmable registers and state machine sequencers that interface with SCSI port 102 on one side and to a fast, buffered direct memory access (DMA) channel on the other side.
Sequencer 106 supports customized SCSI sequences, for example, by means of a 256-location instruction memory that allows users to customize command automation features. Sequencer 106 is organized in accordance with the Harvard architecture, which has separate instruction and data memories. Sequencer 106 includes, for example, a 32-byte register file, a multi-level deep stack, an integer algorithmic logic unit (ALU) and other special purpose modules. Sequencer 106 support's firmware and hardware interrupts schemes. The firmware interrupt allows microprocessor 100 to initiate an operation within Sequencer 106 without stopping sequencer operation. Hardware interrupt comes directly from SCSI controller 105.
Disk formatter 112 is a disk interface controller and performs control operations when microprocessor 100 loads all required control information and parameter values into a writable control store (WCS) RAM (not shown) and issues a command. Disk formatter 112 executes the command with no microprocessor 100 intervention.
Buffer controller 108 can be a multi-channel, high speed DMA controller. Buffer controller 108 connects buffer memory 111 to disk formatter 112 and to an ECC channel of ECC module 109, a SCSI channel of SCSI controller 105 and micro-controller bus 107. Buffer controller 108 regulates data movement into and out of buffer memory 111.
To read data from disk 115, a host system sends a read command to disk controller 101, which stores the read commands in buffer memory 111. Microprocessor 100 then read the command out of buffer memory 111 and initializes the various functional blocks of disk controller 101. Data is read from disk 115 and is passed through disk formatter 112 simultaneously to buffer controller 108 and to ECC module 109. Thereafter, ECC module 109 provides the ECC mask for errors, which occurred during the read operation, while data is still in buffer controller 108. The error is corrected and corrected data is sent to buffer memory 111, and then passed to the host system.
System 200 includes a microprocessor ("MP") 240 (which is also the overall system processor) that performs various functions described below. MP 240 may be a Pentium� Class processor designed and developed by Intel Corporation� or an ARM processor (for example, ARM966E-S�) or any other processor. MP 240 is operationally coupled to various system 200 components via buses 236 and 208. Bus 236 may be an Advanced High performance (AHB) bus as specified by ARM Inc. Bus 208 may an Advanced Peripheral Bus ("APB") as specified by ARM Inc. The specifications for AHB and APB are incorporated herein by reference in their entirety. It is noteworthy that the present invention is not limited to any particular bus or bus standard.
Arbiter 245 arbitrates access to AHB bus 236, while APB bridge 235 is used to communicate between buses 236 and 208.,
System 200 is also provided with a random access memory (RAM) or static RAM (SRAM) 238 that stores programs and instructions, which allows MP 240 to execute computer instructions. MP 240 may execute code instructions (also referred to as "firmware") out of RAM 238.
System 200 is also provided with read only memory (ROM) 237 that stores invariant instructions, including basic input/output instructions.
MP 240 includes a TAP controller 242 that performs various de-bugging functions.
MP 240 is also coupled to an External Bus Interface Bridge (or Controller) ("EBC" also referred to as "EBI" or "EBI controller") 228 via an external bus interface ("EBI/F") 227. EBC 228 allows system 200 via MP 240 and EBI/F 227 to read and write data using an external bus, for example, a storage device external to system 200, including FLASH memory, read only memory and static RAM. EBC 228 may be used to control external memory (not shown), as discussed in detail below. EBI/F 227 may be programmed to interface with plural external devices.
System 200 includes an interrupt controller ("IC") 207 that can generate regular interrupts (IRQ 207A) or a fast interrupt (FIQ 207B) to MP 240. In one aspect of the present invention, IC 207 is an embedded system that can generate interrupts and arbitrates between plural interrupts. IC 207 is described below in detail.
System 200 includes a serial interface ("UART") 201 that receives information via channel 203 and transmits information via channel 204.
System 200 includes registers 209 that include configuration, system control, clock and power management information.
System 200 also includes an address break point and history module (also referred to as "history module" or "history stack") 234 that monitors activity on busses 236 and 208 and builds a history stack. Such history stack may be used for debugging, and monitoring plural components of system 200. History module 234 is discussed below in detail.
System 200 also includes a timer module 206 that controlled by MP 240 and includes various timers, for example, the "Watchdog timer".
System 200 is provided with a general purpose input/output ("GPIO") module 202 that allows GPIO access to external modules (not shown).
System 200 is also provided with a digital signal processor ("DSP") 229 that controls and monitors various servo functions through DSP interface module ("DSPIM") 210 and servo controller interface 212 operationally coupled to a servo controller 216.
DSPIM 109 interfaces DSP 229 with MP 240 and updates a tightly coupled memory module (TCM) 212 (also referred to as "memory module" 212) with servo related information. MP 240 can access TCM 212 via DSPIM 210.
Servo controller interface ("SCI") 211 includes an APB interface 214 that allows SCI 211 to interface with APB bus 208 and allows SC 216 to interface with MP 240 and DSP 229. SCI 211 also includes DSPAHB interface 215 that allows access to DSPAHB bus 233. SCI 211 is provided with a digital to analog/analog to digital converter 213 that converts data from analog to digital domain and vice-versa. Analog data 223 enters module 213 and leaves as data 222 to a servo drive 221.
SC 212 has a read channel device (RDC) interface 217, a spindle motor control ("SVC") interface 219, a head integrated circuit (HDIC) interface 218 and servo data ("SVD") interface 219A.
System 200 also includes a hard disk controller 101A that is similar to the HDC 101 and includes a code cache 101B.
In one aspect of the present invention, because system 200 includes, dual embedded processors (MP 240 and DSP 229) with dedicated history module 234, IC module 207, servo controller and EBC 228, it can perform various functions independently. This not only saves the resources of MP 240 but also improves communication between a host and an external device.
In another aspect, embedded processors (MP 240 and DSP 229) provide independent real time control, with one processor as the system control processor (MP 240) and the second processor (DSP 229) as a slave to the first for real time control of the disk servo mechanism. DSP 229 as a slave also provides real time control for positioning a disk actuator. This includes analyzing error positioning data and outputting error correction data.
Dual processors also provide a real time overlap for processing host commands. For example, one processor may move the actuator while the other processor translates the LBA into physical information and queues host requests.
The dual processors also improve overall performance for the host. It also allows data recovery when ECC cannot correct data failures. Using unique data recovery algorithms and error recovery information data may be recovered if the ECC module 109 fails to dynamically correct the data.
The following describes the various components of system 200 in detail, according to various aspects of the present invention.
EBC 228 is a slave on AHB bus 236 and adapts the high performance of AHB bus 236 to a slower external bus (not shown) that can support external memory (including without limitation, flash memory, ROM, and static memory (not shown)).
In one aspect of the present invention, MP 240 via EBC 228 may access multiple devices with different timing characteristics or data width. At least a Segment Descriptor register is provided, which specifies the timing characteristic of each external device. Also provided is at least a device range register, which specifies the size of the external device address space. Depending on the external bus data width, EBC 228 may convert AHB bus 236 transactions into multiple external bus transactions.
Each device segment descriptor register 601 may be formatted the same way with the same fields. Segment descriptor registers 601 allow firmware to program timing characteristics for an external memory device on an external memory bus. For example, as shown in the table of
DW 601E specifies the data width of an external bus device (not shown). A state machine may be used by EBC 228 to use the various register 601 values, as shown by the state machine diagram in
System 1400 includes a set of registers, for example, HaddrReg 1408, HwriteReg 1411 and HsizeReg 1412 register and their usage is described below.
State S0: This is an idle state, until a valid operation on the bus is received.
State S1: This is a first stage for decoding an address in HaddreReg 1408 to determine which external device if any, is the target for a read or write cycle. After determining the target external device, various counter values, as shown in
State S2: This is a second state during which state machine 1402 remains in this stage until the SW1 601D and TRW 601B values expire to avoid data contention on the external bus.
State S3: The state machine stays in this state for at least one clock cycle with all external bus controls as being inactive. This state is only used for sequential write operations.
State S4: During this state the appropriate chip select signal (XCS 317) is asserted while the write enable (XWEn 319) or output enable (XOEn 318) are deasserted, until SW2 601C expires.
State S5: The state machine logic 1402 stays in this state until a current read or write operation is completed. During this state the chip select, write enable or out enable signals are asserted. For write commands, EBC 228 writes data and for read operation, EBC 228 reads data.
State S6: This state is entered only during write operations and is used to provide write data hold time. During this state, EBC 228 continues to drive the write data on the external bus while it keeps the write enable signal de-asserted.
State S7: During this state, registers within EBC 228 are read or written.
The relationship between the various states is shown in
Interrupt Controller ("IC") 207:
IC 207 synchronizes and prioritizes interrupt signals as a slave on the APB bus 208. IC 207 handles two types of interrupts, Fast Interrupt Request ("FIQ") and Interrupt Request ("IRQ"). The interrupts are sent to MP 240. The FIQ 207B is used for critical interrupts as defined by a user or firmware. IRQs 207A are provided for routine interrupts. IC 207 provides the interrupts to MP 240 that interrogates IC 207 to retrieve a particular interrupt with an interrupt vector, as described below. MP 240 may clear the interrupt after retrieving the interrupt information.
In one aspect of the present invention, IC module 207, provides FIQ 207B for critical interrupts, scans interrupts for priority, prevents interrupt source lockout (interlock) in the interrupt service and allows a user to change various interrupt options using firmware.
IC module 207 uses plural registers for controlling interrupts. The base address of IC module 207 is specified in APB Bridge 235. When signal PSELIC 1604 from APB bridge 235 is sent to IC module 207, the base address of IC module 207 is detected by APB bridge 235 and IC module 207 decodes signals PADDR 1605 and PWRITE 1606 to select the appropriate register address. IC module 207 examines signal PADDR 1605 for exceptions. An access to an undefined or reserved register address results in IC module 207 asserting the PADREXCPT signal 1610 to APB Bridge 235. It is noteworthy that this does not change the state of IC module 207. Also, access to an undefined "read" address results in PADREXCPT signal 1610 to APB Bridge 235.
Interrupt Request Pending ("IRP")-Read Only field 1904C is set when a corresponding interrupt source is asserted. When IRS 1904B is set, IRP 1904C is cleared. In addition, when the source interrupt is masked, IRP 1904C may be cleared. Polarity ("PLR") 1904D is used to specify the polarity of an interrupt source.
Register 1904 also includes a trigger mode TM value 1904E that specifies the mode of an interrupt source signal. Field 1904E specifies whether the interrupt signal is edge triggered or level sensitive. Use of TM 1904E in register 1904 is discussed below in detail.
Fields 1901F and 1901L contain interrupt vector addresses assigned by MP 240 to a corresponding interrupt source. This field specifies a vector address to firmware and specifies the priority of the interrupt with the interrupt source. The vector field in 1905B is updated when an entry in the interrupt control register array (described below) that corresponds to an active interrupt is seen as having a higher priority while the register array is being scanned.
FIQ Interrupts:
Input signal 1608 from a FIQ source is sent to module 2005. Module 2005 selects either the FIQ source signal, or a TestSource signal depending on the state of ICIntTestControl 2017. If the FIQ source signal is selected, then it is synchronized by raw interrupt synchronization module 2006. The synchronized signal is sent for FIQ registration to FIQ registration module 2007. Module 2007 includes registers 1904, and 1902.
Signal 1607 is sent to mask module 2004 (that includes register 1903) and to FIQ IC module 2008. Mask module 2004 sends the mask (1903A) to FIQ IC module 2008, which then sends a signal to interrupt generation module 2009. Interrupt generation module 2009 also receives input from IRQ Scanner 2011 and based upon the priority of the request, an interrupt is generated, for example FIQn 1611, SysInt 1614 and IRQn 1613.
When FIQIRP 1904C is set, then a fast interrupt is asserted. The interrupt request signal remains asserted until MP 240 reads register 1902. When register 1902 is read, FIQn signal 1611 is de-asserted by setting FIQIRS 1904B and clearing FTQIRP 1904C.
In one aspect, another interrupt request cannot be made until FIQIRS 1904B is cleared as follows:
(a) If FIQ interrupt source as defined by TM 1904E is level sensitive then the firmware ensures that the FIQ interrupt source is de-asserted and then an end of interrupt ("EOI") is sent to IC 207 to clear the FIQIRS 1904B state; or
(b) If the FIQ interrupt source as defined by TM 1904E is edge triggered, the firmware need only read register 1902, FIQIRP 1904C is cleared and FIQIRS 1904B is set. In edge triggered mode, FIQIRS clears when the interrupt source de-asserts. The next interrupt does not occur until the interrupt source signal de-asserts, and asserts again.
IRQ Interrupts:
Incoming IRQESOURCE signals 1609 is received by module 2002. Module 2002 selects either the IRQESOURCE signal, or TestSource signals depending on the state of ICTestControl 2015. If the IRQESOURCE signals are selected, then they are synchronized by raw interrupt synchronization module 2003. The synchronized signals are sent for IRQ registration to IRQ registration module 2013. IRQ interrupt registration module 2013 sets the field 1906B in register 1906. Signal 1607 is sent to mask module 2004 (that includes register 1903) and to IRQ Interrupt Registration Module 2013. Mask module 2004 sends the mask (1903A) to IRQ Interrupt Registration module 2013, which then sends signals to the IRQ Priority Evaluation And Scanner module 2011 (also referred herein as "IRQ Scanner 2011"). It is noteworthy that firmware may mask an interrupt before it is sent to MP 240. This de-registers the interrupt by clearing field 1906B.
For each possible interrupt input, information regarding that interrupt is stored in IRQ register control array 1901. Register control array 1901 includes vector values (1901F and 1901L), TM values (1901E and 1901K) and PLR values (1901D and 1901J) for each interrupt source, i.e. even and odd source. MP 240 may write the foregoing values in register control array 1901. Vector values 1901F and 1901L provide the offset for firmware to access the interrupt handler (Not shown) and establish the priority of the interrupt within plural interrupt sources, for example, 16 IRQ sources. It is noteworthy that the invention is not limited to 16 IRQ sources. In one aspect, the highest vector value is given the highest priority. When one of the registers in register control array 1901 is read then, the mask, IRS, IRP, Vector, TM and PLR values are also read at the same time. Output 2012 from register control array 1901 is sent to IRQ scanner 2011 that scans the vector values, as described below. IRQ scanner 2011 provides an input 2011A to interrupt generator 2009 that generates IRQn 1613.
When MP 240 retrieves the IRQ interrupt from IC module 207 it reads register 1905 which sets the IRQIRS bit (1901B or 1901I) associated with the interrupt source in register 1905, which prevents the same interrupt source from generating another interrupt until the IRQIRS bit is cleared.
In one aspect, another interrupt from the same source cannot be made until IRQIRS (1901B or 1901I) is cleared as follows:
(a) If the IRQ interrupt source is defined by TM 1901E or 1901K as level sensitive then the firmware ensures that the IRQ interrupt source is de-asserted. Thereafter, an end of interrupt ("EOI") is sent to IC 207 to clear the IRQIRS 1901B or 1901I state; or
(b) If the IRQ interrupt source is defined by TM 1901E or 1901K as edge triggered, the firmware need only read register 1905. IRQIRP 1901C or 1901H is cleared and IRQIRS 1901B or 1901I is set. In edge triggered mode, IRQIRS clears when the interrupt source de-asserts. The next interrupt does not occur until the interrupt source signal de-asserts, and asserts again.
In step S2800, an IRQ signal 1609 is received from an interrupt source.
In step S2801, IRQ signal 1609 is selected by logic 2002.
In step S2802, valid IRQ signal 1609A is synchronized by synchronization module 2003.
In step S2803, synchronized IRQ signal 1609B is registered by IRQ interrupt registration module 2013.
In step S2804, registers in register control array 1901 are read.
In step S2805, vector values are scanned (discussed below with respect to
In step S2806, based on the vector values, output interrupt signal 1613 is sent to MP 240.
In step S2900, IRQ scanner 2011 receives register values 2012 from register control array 1901 and IRQESOURCE 2013A from IRQ interrupt registration module 2013. IRQ scanner 2011 receives vector values from register control array 1901. IRQ scanner 2011 examines each interrupt during every interrupt cycle
In step S2901, the process determines if an interrupt is being sent (sent as used here includes "pending" interrupts). If an interrupt is being sent (or pending), then in step S2902, IRQ scanner 2011 compares the vector values of the interrupt being sent (or pending) with the scanned vector values of every other active interrupt input in a given interrupt cycle.
In step S2903, IRQ scanner 2011 replaces the previous vector values if the most current vector values have higher priority.
If an interrupt is not being sent (or pending) in step S2901, then in step S2904, IRQ scanner 2011 loads the current vector values from an active interrupt input from S2901 and the process moves to step S2902.
In one aspect of the present invention, a fast interrupt scheme is provided so that for critical interrupts, MP 240 does not have to wait.
In another aspect of the present invention, interrupt priority is established efficiently by a scanning process.
In yet another aspect of the present invention, firmware can change priority and mask interrupts from any source, providing flexibility to a user and also optimizes MP 240 usage.
In another aspect of the present invention, use of TM values prevents interlocking of interrupt service by MP 240.
History Module 234:
History module 234 is a peripheral on APB Bus 208 that records transaction information over either AHB Bus 236 and/or APB Bus 208. The recorded information may be used for debugging and analyzing firmware and hardware problems. History module 234 is set up and initiated through APB Bridge 235 and information from History module 234 is extracted through APB Bridge 235. History module 234 includes a buffer(s) (not shown) for reading and writing recorded information.
Field 3300J defines break point conditions for History Module 234. Break point conditions are those, which stop recording/monitoring by History Module 234. Field 3300I enables break points, while break point testing stops after a break point is detected, if field 3300E is set.
Trigger mode field 3300G specifies the number of entries made in a History Module 234 buffer after a break point condition is detected.
HSP 3501 may be zero at the beginning of a recording session. Firmware has the flexibility to change HSP 3501 values. In one aspect, firmware may set this value to zero. HSP 3501 allows the firmware to recover a recording regardless of the reason why a recording session stopped. HSP 3501 is incremented each time an entry is accessed from the history stack buffer.
To start history module 234, field 4300A of register 4300 is set, that allows recording when signals HREADY 307 or PENABLE 1607 are asserted. In one aspect of the present invention, history module 234 may record data simultaneously for buses 236 and 208. This allows history module 234 to write in buffers 4313, 4314 and 4315. Although
History module 234 continues to make entries until a break point (or event) is reached as defined by fields 33001 and 3330J in register 3300 or field 4300A is cleared by firmware, as discussed below in detail.
Valid Recorded Entry: Before recording, buffers 4313, 4314 and 4315 are cleared by firmware issuing a "clear History stack Buffer Access 4201 command. All valid entries in buffer 4314 are cleared. When recording, field 4201 is toggled each time an entry is made in buffers 4313–4315.
Break Point and Break Point Interrupt: Firmware can set field 3300I to enable a break point defined by break point condition field 3300J. Event control module 4336 generates field 4300A value that is sent to flip-flop module 4323. Firmware can set field 4300A value that enables flip-flop module 4323. History module 234 tests for break point condition 3300J in every clock cycle as defined by firmware.
When history module 234 detects the defined break point condition then it stops recording bus transactions based on TM value 3300G and an interrupt may be generated, as discussed below. After a break point is detected, history module 234 stops recording and based on field 3300E setting either continues to test for the break condition or stops testing for the break point condition.
An interrupt is generated based on the detection of the break point condition and if field 3300F is set, after the interrupt source is enabled in IC module 207.
Break points may be set for address and/or data or address range based on fields 3601 and 3602. Firmware may also send a "Clear Enable Record status" field 4300A to trigger a firmware break point, if a firmware break point condition is set in 3300J.
Clock Slam: When a break point condition is detected, and if field 3300D is enabled (Enable clock Slam), history module 234 asserts signal ClkSlam 4343 to clock control via flip-flop module 4340. Break point condition 3300J′, which indicates that a break point condition has occurred, is sent to event control module 4336 with trigger mode value 3300G. This stops all the clocks in system 200. This signal remains asserted until system 200 is reset. This allows system 200 component information to be scanned out for analysis and diagnosis using standard debugging tools.
Filter Control: History module 234 can selectively filter out system 200 components based on filter control command 4324. Filter control command 4324 is based on select mask field 3300A in register 3300. If field 3300A is set then transactions related to, a specific peripheral (s) or slave (depending on the bus) is not recorded.
Trigger Mode:
Trigger mode field 3300G specifies the number of entries that are made in buffers 4313–4315 after a break point condition has been detected. In one aspect, field 3300G may be set so that history module 207 stops recording within a single clock cycle, or may continue to record a pre-defined amount of data before stopping.
Starting and Stopping Recording:
History module 234 starts and stops recording based on register 4300 fields. Field 4300A when set to "EnableRcrdReg", allows history module 234 to record. Setting "Clear Enable Record and Status" bit in field 4300A stops history module 234 from recording and break point testing, unless specified otherwise by firmware.
Bus (208 and 236) transactions are recorded when EnableRcrdReg is set. Mux 4324 samples signals HREADY 307 and PENABLE 1603. The signals indicate that a valid transaction is on the bus that may be recorded unless masked by field 3300A.
History Stack Pointer:
History stack pointer 3500, as shown in
Extracting Recorded History Information:
As stated above, when recording stops, history stack pointer 3501 points to the "oldest recorded entry". MP 240 bus master (not shown) reads the history address buffer 4313 and history module 234 places the recorded entry into register 4300 (
Turning in detail to
In step S4501, the process determines if field 3300E is set to enable any break point testing. Field 3300J in register 3300 may be used to specify break point conditions.
In step S4502, transactions are recorded. Bus (208 and 236) transactions are recorded when EnableRcrdReg field 4300 is set. Signals HREADY 307 and PENABLE 1603 are sampled by Mux 4324. The signals indicate that a valid transaction is on the bus that may be recorded unless masked by field 3300A. When an entry is made in buffers 4313–4315, pointer 3501 is updated. When history module 234 stops making entries in buffers 4313–4315, the value of 3501 points to the last entry plus one.
In step S4503, based on whether break point condition testing is enabled, history module 234 tests for break point conditions. Based on the setting of EnBPStp 3300E, history module 234 may continue or stop break point condition testing after a particular break point is encountered.
In step S4504, the process determines the value of TM field 3300G. This sets the amount of data that is to be recorded after a break point condition is detected. It is noteworthy that steps S4502–4504 may occur simultaneously.
In step S4505, recording is stopped and field 4300A is cleared.
In step S4506, recorded information is extracted. MP 240 bus master (not shown) reads the history address buffer 4313 and history module 234 places the recorded entry into register 4327 (
In one aspect of the present invention, history module 234 provides visibility to transactions on the internal AHB Bus 236 or APB Bus 208.
In one aspect of the present invention, history module 234 selects specific slave or peripheral transactions for recording based on a slave or peripheral mask. This allows selective monitoring of system 200 components.
In yet another aspect of the present invention, the process described above provides break point conditions for stopping History module 234 recording. However, external break point signal may be continually provided after recording stops. In addition, break point conditions may be provided for an Address/Data break point and an Address Range break point.
In another aspect of the present invention, an external analyzer is not required to record bus transactions. This saves pins and the effort required connecting system 200 to an external device so that its components can be monitored.
Firmware Synchronization:
DSPIM 210 provides an interface for communication between MP 240 and DSP 229 as a bridge between APB bus 208 and DSPAHB bus 233. DSPIM 210 provides an IN/OUT register file for passing command and status parameters between MP 240 and DSP 229.
MP 240 writes in register 4600 and interrupt is sent to DSP 229. MP 240 sets field 4900C in status register 4900, which generates an interrupt to DSP 229.
In step S5000, MP 240 send information to DSP 229.
In step S5001, MP 240 writes the information (or address of the information) in register 4600.
In step S5002, MP 240 sets field 4900C and generates an interrupt for DSP 229.
In step S5003, DSP 229 services the interrupt by reading register 4600 and clears field 4900C.
In step S5005, register 4600 is again available for MP 240 to write into register 4600.
DSPIM 210 is operationally coupled to memory module 212 via interface 230. MP 240 and DSP 229 for storing firmware control instructions and any other information may use memory module 212. Interface 230 allows APB bus 208 to access memory module 212 while DSPIM 210 executes firmware instructions.
Memory module 212 is shared using registers 4600, 4700 and semaphore register 5100 shown in
Memory module 212 uses an indirect access register 5200 that facilitates communication between DSP 229 and MP 240 without using any counters. Memory module 212 uses at least a FIFO buffer from where data may be read and/or written. Memory module 212 uses register 5300 (
An indirect read transaction may be initiated by setting up field 5200A and 5200C. Each time register 5300 is accessed, the address in field 5200F is updated. If field 5200C is set then it indicates that the read access is a sequence of continual read accesses that keeps memory module 212 FIFO (not shown) full.
An indirect write access may be initiated by setting field 5200A and 5200B. After the indirect access, register 5300 is updated with data that is written into memory module 212. Each time data is written into register 5300, DSPIM 210 writes data into memory module 212.
One advantage of providing the mail-box" concept is that no write conflict occurs between MP 240 and DSP 229.
In one aspect, MP 240 and/or DSP 229 do not have to gain ownership and then relinquish ownership (clear) of any registers to communicate with each other. This saves performance time and improves overall efficiency, because the registers are dedicated.
In another aspect of the present invention, indirect access is available to access memory module 212.
In another aspect of the present invention, the IN/Out mailbox environment may be used to efficiently run test cases. MP 240 using Assembler or any other language may run test cases. A sub-set of test instructions may be executed by DSP 229. The mailboxes have a buffer (not shown) that keeps a real-time picture of a test case. When the test is complete, mail-boxes are unloaded and a report may be generated that can be used for bug fixing and analysis.
Although the present invention has been described with reference to specific embodiments, these embodiments are illustrative only and not limiting. Many other applications and embodiments of the present invention will be apparent in light of this disclosure and the following claims.
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|Programmable interrupt controller, interrupt system and interrupt control process
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|U.S. Classification
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text:
I'd heard about Transalpin, the groundbreaking restaurant that moved into 410 East Seventh Avenue (current home of Lala's) almost three decades ago, because Robert Tournier ran it, and Tournier, who's had Le Central for 23 years now, is still very much a part of the Denver scene.
And of course I'd heard about Sacre Bleu, favored watering hole of some of the city's hippest, richest and most blown-out show ponies. I didn't get to eat there, snort lines off the mirrored tables or cavort disreputably in the men's room, though; Sacre Blow (as it was colloquially known) opened in early 2000 and went dark during my first or second week on this job. But it lives on in raucous tales of Denver's seedy restaurant history, and has always seemed a place better loved in the recollection than it ever was while operating.
I actually got to experience Vega, the restaurant owned by Michael Payne (who'd sorta inherited Sacre Bleu from his wife, Julie, when she became his ex-wife, and hung on to the space after it was the ex-Sacre Bleu) and run by Sean Yontz in his pre-Jesse Morreale partnership days, when he was just out from under the thumb of Kevin Taylor at his places and Richard Sandoval at Tamayo and looking to make a name for himself with the town's first good Nuevo Latino restaurant. Vega had great albondigas, fantastic tamales, a lovely room with starched white tablecloths and gleaming glassware and frosty gold-and-white decor — but it closed after eighteen months. Today it represents a kind of high-water mark for Denver's fine dining in the early 2000s — a tideline, the point to which the waters had risen, then slowly started to roll back. Vega was an amazing restaurant in its time; in its death throes, it became almost legendary because it was the place that almost broke Yontz, which drove him very publicly out of fine dining and into the tacos-and-shots world of Mezcal, effectively capping this city's flirtation with high-end fusion that began (some might claim) two decades earlier at Transalpin, in this very same place. Full circle.
410 East Seventh Avenue
Except that the circle wasn't done yet, because the space itself — scene now of multiple closures — was too well-placed to stay dark for long. Sparrow came next, bought into by Nancy and Mark Scruggs, with the kitchen under the thumb of Josh Botsford, a respected veteran chef out of Boston. I remember Sparrow well because I loathed it more than almost any other restaurant in the city. No need to mince words: Sparrow was awful. Lazy, dumb and muddled cuisine, a floor staff so vapid that they all could've been killed like lemmings had I thrown a shiny ball of tin foil out in the street, and a vibe that was like forever showing up at the wrong after-party — a room full (almost always full...) of suckers and rubes and also-rans wanting badly to feel like they were somewhere when, truly, they were nowhere at all. And yet, somehow, Sparrow even managed to expand, opening a cafe/market a block away, at 701 Grant Street.
I remember Sparrow for so many reasons — for a half-dozen or more hateful visits; for the decor that I'd initially thought an improvement over the cold grandeur of Vega, with its open kitchen and rearranged floor, but quickly came to loathe for its generic rusticity (all bare tables and pea greens and dark woods) and frigid pseudo-warmth. I remember the clutching panic of sitting at the bar, surrounded by mobs of dimwit foodies who thought they'd really discovered something with Sparrow, all jawing and screeching at each other with delight, and thinking that this was what my city had been reduced to; that this swampy, retarded cross-section of Denver's dining public was all that was left.
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It wasn't, thank God. It was just an anomaly, a freaky spike on the foodie radar. Both Sparrows closed early last year — first the restaurant, then the market — leaving two openings (one big, one teensy) in highly visible spots in a restaurant neighborhood that's never gotten as much respect as it ought to. I mean, think about it. Along this stretch of Seventh, we've got Mizuna and Luca d'Italia, Benny's, the Lancer Lounge, Racines, Govnr's Park, Lala's and now Bones, which took over the Sparrow Market space. That's eight joints, serving food that runs the gamut from gourmet pizza to high-tone Italian to smothered burritos to noodles. Taken all together, they provide a tiny culinary history of Denver being played out in the real world every night, from the thirty-year neighborhood veteran (Govnr's) to the stable grownup (Mizuna) to their kids (Lala's and Bones); from the complete non-dive (Racines) to the unapologetic Colorado-Mexican half-dive (Benny's) to a real dive like the Lancer (stiff drinks, dirt cheap and no bullshit — and no kitchen at the moment, either, since the Lancer is currently without a cook).
Denver has other strong restaurant neighborhoods — in Highland and on Broadway and along Sixth and 17th avenues — but none are this condensed and wide-ranging at the same time. None are as disparate. And none are quite so cool.
Leftovers: No sooner had I offered a half-dozen places in town to drink Guinness — an antidote to the January 8 Bite Me about Irish bars — than one of those places closed. Say so long — for now, at least — to the Auld Dubliner, which has closed its doors at 2796 South Broadway.

subset: commoncrawl


text:
TSPussyhunters---TPH-26300 Ashlynn Leigh and Jayla Marie
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text:
All the festive trappings were set in place for Bonita Vista's 2011 home opener at Southwestern College. Photo by Phillip Brents
The Barons stand at attention during the playing of the National Anthem. Photo by Phillip Brents
Moises Villapalpdo leads the Bonita Vista defense. Photo by Phillip Brents
Bonita Vista quarterback Ryan Miguel drops back to pass. Photo by Phillip Brents
John Matranga scored the Barons' lone touchdown of the game. Photo by Phillip Brents
Bonita Vista quarterback Ryan Miguels airs out the ball in last Friday's home opener. Photo by Phillip Brents
Bonita Vista quarterback Ryan Miguel drops back to pass. Photo by Phillip Brents
For those in attendance at last Friday's high school football game at Southwestern College between the host Bonita Vista Barons and the Steele Canyon Cougars, one thing was apparent: The outcome would come down to which team could break off the big plays to break an otherwise defensive stalemate.
Steele Canyon did, capitalizing on a fumble in the face of the Barons' goal line, a 78-yard punt return, 64-yard pass play and 60-yard interception return for touchdowns to crown a 34-10 non-league victory.
The win evened the Cougars' early season record at 1-1 while Bonita Vista fell to a 0-2 start.
It was evident early that the defenses of both teams came ready to play. The Barons couldn't get any decent field position and constantly had to punt the ball from deep in their territory. Likewise, Steele Canyon couldn't seem to move the ball each time after receiving it at midfield.
That changed when BV's John Matranga fumbled the ball on a second-effort run and the Cougars' P.J. Russell recovered the ball at the Baron 17-yard line.
Three plays later Ernie Flint made it 7-0 for the visitors on a one-yard scoring run with three minutes elapsed in the opening quarter.
Flint's TD looked to hold up through the first half of play until Britten Wright returned a punt 78 yards in the dying seconds of the first half. Wright took the ball down the Baron sideline untouched for a 14-0 lead.
Steele Canyon finally mustered a sustained offensive drive, taking the opening possession of the second half 80 yards on eight plays for a score as senior quarterback T.J. Carlyon hit senior receiver Chanceller James on a 64-yard strike.
21-0 Cougars.
The hosts fought back to cut the lead to 21-10 in the fourth quarter as John Matranga scored a touchdown, Devon Roncorroni kicked the PAT and Osmark Millan split the uprights on a field goala nd appeared driving for more until Wright grabbed a tipped BV pass and returned it 60 yards for a touchdown.
Steele Canyon racked up 13 decisive points in the final quarter to stamp its name on the victory.
Lonnie Tuff closed out the game with a bruising 33-yard touchdown run with seven minutes to play
Cougar coach Ron Boehmke indicated his team would depend on defense in the early part of the season until his new-look offense gained confidence and experience.
Steele Canyon, which dropped a 27-7 non-league game in its season opener at four-time defending Division III champion Cathedral Catholic, was led onto the field by Carlyon, one of many new starters on the team this season.
Tuff finished the game with 64 rushing yards on 10 carries. In two games, Tuff has rushed for 131 yards while Flint has rushed for 107 yards.
Carlyon has completed 13 of 35 passing attempts in two games for a modest 200 yards, with two touchdown passes and five interceptions.
James leads the team's receivers with six catches for 118 yards.
The Cougars return to the road on Friday, Sept. 16, with a non-league game at Temescal Canyon (2-0) before hosting the top-ranked Eastlake Titans on Sept. 23.
Extra points
Through the opening two weeks of play, 34 teams remain undefeated in the San Diego Section, including five East County squads. Mt. Miguel, Granite Hills, Santana, Grossmont and Foothills Christian all boast 2-0 records in the early part of the season.
Mt. Miguel, which entered its game at Valhalla ranked seventh in the section (first among Division IV teams), edged the Norsemen, 28-27, on a blocked field goal with 1:07 remaining last Friday. It was the second blocked field goal of the game for the Matadors.
Derrick Dunn led Mt. Miguel with 130 rushing yards and two touchdowns while quarterback Ernest Williams passed for 152 yards. Tony Dozier and Williams each scored one rushing touchdown.
Valhalla quarterback Frank Foster threw for 300 yards in the loss, connecting with Kevin Mills on three touchdown plays, while also rushing for a score. Mills finished the game with 147 receiving yards, including TD catches of five, 93 and 42 yards.
The Norsemen (1-1) led 13-7 at halftime and 27-21 with 9:57 to play. Valhalla's potential game-winning boot was low and hit Matador defender Daniel Morales in the facemask.
In other games last Friday:
The Landon Lozoya Show continued for the Santana Sultans in their 35-25 non-league win against visiting Kearny as he snagged two long touchdown passes and also turned in several key defensive plays. Lozoya broke loose to score on plays of 51 and 80 yards on passes from QB Kyle Gasner. Gasner passed for 306 yards and three TDs in the game.
The Sultans forced five turnovers against the Komets (1-1).
Granite Hills remained perfect on the season as Michael Millien rushed for two touchdowns, Tyler Hopper threw a 61-yard score to Taylor Fleury, Dylan Whittingham scored on a short run and kicker Gabe Kane booted two field goals to lead the host Eagles past the El Capitan Vaqueros 34-20.
The Vaqueros (0-2) scored two late touchdowns on passes from Josh Murphy and Kevin Browning after falling behind 31-7.
Grossmont's defense stiffened in the second half to hold off a strong University City team, 21-14, in a game played at La Jolla High School. Jeff Bowers scored on an 86-yard interception return to provide the margin of victory while Foothillers quarterback Anthony Lawrence threw a pair of scoring passes — one each to Ryan Green and Marcus Phillips.
Lawrence threw for 205 yards while Green grabbed nine passes for 120 yards.
Foothills Christian continues to build early momentum for its entry into the new Manzanita League after defeating Army-Navy Academy, 16-6, at Seau Field. Spencer George led the Knights with 201 rushing yards and two touchdowns.
High School Football Rankings
San Diego Sportswriters Association Poll
1. Eastlake (2-0)
2. Helix (1-1)
3. Oceanside (1-1)
4. Cathedral Catholic (2-0)
5. Poway (2-0)
6. Mt. Miguel (2-0)
7. Mira Mesa (2-0)
8. Torrey Pines (1-1)
9. La Costa Canyon (1-1)
10. St. Augustine (2-0)
11. San Pasqual (2-0)
12. Westview (2-0)
13. Point Loma (2-0)
14. Mt. Carmel (2-0)
15. Madison (2-0)
16. Mission Hills (0-2)
17. (tie) Santana (2-0)
17. (tie) Vista (0-2)


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Come to a free meditation session at the Kernersville Branch Library. All are welcome, from newbies to seasoned practitioners, to join us on the first and third Tuesday of every month at 6:30 p.m. for a guided meditation. No registration is necessary; just bring your body and mind! In the Paddison Room.
This month Lara Luck, our Collection Development Manager, makes an encore as our book reviewer as she delves into the world of epic fantasy.
Saturday, December 2, 11 a.m. Join us for a discussion on the Vietnam war and its aftermath with Chris Brady, Bruce Brady and Ed Ramon. Chris Brady has written two books on the Vietnam War: Remembering Firebase Ripcord and his latest book, We Answered the Call - a novel.
Zinio for Libraries has merged with RBdigital. Please download the new RBdigital app on your mobile device. Your username and password will remain the same.
Free "Welcome to Medicare" educational seminar at the Kernersville Branch Library on Tuesday, December 5 at 11 a.m.
If you are new to Medicare or approaching age 65, join us for a free informational session on how to navigate the Medicare system, and get your questions answered.
Follow the construction of the new Kernersville Branch Library with our newly activated web cam.


text:
At Gemvara, we believe that the jewelry you wear should be as unique as you. Every beautiful Gemvara platinum contemporary jewelry design will be made just for you. It's jewelry for all life's occasions, from a wedding or Valentine's Day to your own personal milestones and celebrations. Celebrate her graduation with a brilliant gift of jewelry that will always remind her of you. Gemvara uses only the highest quality materials to craft your platinum contemporary jewelry with meticulous attention to detail. Our precious metals are recycled or responsibly mined. Naturally white and exceptionally rare, platinum's 95% purity makes it hypoallergenic too. You'll feel the difference: platinum weighs 40% more than 18k gold. Our wide selection of platinum contemporary jewelry by Tony Rodrigues, Damon Washington, Gemvara Essentials, and other talented designers means you can find rings, earrings, and necklaces that are exactly your style. You can also shop by style, choosing our Timeless Hearts, Commitment, or Flower Collections. When our work is done and you open that box, you'll see your design is even more beautiful when brought to life in the finest precious materials.
We can help right away. Chat with a jewelry expert now!


text:
Brewers win 2nd straight on road, top Rockies, 4-3
Shaun Marcum tossed five solid innings before leaving with a strained neck and the Brewers survived a ninth-inning rally to beat the Colorado Rockies 4-3 on Sunday to split the four-game series.
"It's unbelievable," closer John Axford said. "Things weren't looking too great in the first two games and it's awesome to come out of here with a split."
Rickie Weeks, Casey McGehee and Nyjer Morgan had two hits each for Milwaukee. The Brewers last won back-to-back road games when they swept a four-game series in Florida June 3-6.
"Getting the split's huge," Marcum said. "Hopefully we can keep it going in Arizona and have a good series out there."
It wasn't an easy finish for the Brewers or Axford, who got his 25th save after his second straight nail-biting ninth inning.
Jonathan Herrera reached on an error by shortstop Josh Wilson and scored on Ty Wigginton's double to right to make it 4-3. Carlos Gonzalez grounded out to third for the first out, pinch-hitter Mark Ellis struck out looking and Jason Giambi followed with a walk.
"Run scoring and a guy on second with nobody out, that's not the way you want to start out," Axford said.
Troy Tulowitzki struck out on three pitches to end the threat.
"We can't give Giambi anything he can hit out of the ballpark, even though you don't want to pitch to Tulowitzki either," manager Ron Roenicke said. "We'll throw it in tough places and if they swing and get themselves out, that's good."
Marcum (8-3) was cruising along until he gave up a leadoff homer to Giambi in the bottom of the sixth. He went to a 2-0 count on Tulowitzki when a Brewers' trainer and Roenicke came to the mound to talk with Marcum. Marcum threw a few warmup pitches before being replaced by reliever LaTroy Hawkins.
Marcum said he was injured when he landed on his right shoulder after throwing out Dexter Fowler on a bunt attempt on the last play of the fifth inning.
"I landed on the backside of my shoulder and I jarred something in my back a little bit," he said. "It's a little stiff right now, but I don't think it's anything to be too alarmed about. Keep doing the treatment and be ready the next time out."
Marcum allowed two earned runs and four hits, struck out four and walked two in five-plus innings.
Milwaukee took the lead for good in the fifth and chased Rockies starter Aaron Cook (0-5). Prince Fielder drew a one-out walk, Weeks singled and George Kottaras followed with a double to left to score Fielder. Weeks was thrown out at home on the play, allowing Kottaras to advance to third.
McGehee knocked in Kottaras with a single and came home on Wilson's double to make it 3-1.
Matt Belisle relieved Cook and got the final out of the inning.
"I felt all right but I'm tired of losing," Cook said. "I got three pitches up in the zone in the fifth inning and those were the only bad ones that I made. I gave up those two runs and it ended up costing us the game."
The Brewers made it 4-1 in the sixth when Corey Hart singled, took second on Morgan's sacrifice and scored on Mark Kotsay's single.
Giambi had two hits, including a homer, and Seth Smith also had two hits for Colorado.
Giambi's 10th homer, into the third deck in right field, made it 4-2 in the sixth. The Rockies threatened for more against Hawkins, but Herrera grounded out to second with runners at first and third to end the rally.
The Brewers scored first when Weeks led off the second with a double, moved to third on Kottaras' ground out and scored on McGehee's sacrifice fly.
The Rockies tied it in the fourth when Fowler scored from second on Smith's single off Weeks' glove.
NOTES: OF Ryan Braun was held out of the lineup with tightness in his left calf and hamstring but pinch hit in the ninth. Manager Ron Roenicke said Braun could play Monday at Arizona. ... Giambi's homer was the second one hit into the third deck at Coors Field this season.
Last updated: 5:52 pm Thursday, December 13, 2012


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Hey, it's vulpixtrainer12 first post in the forum. I need some help getting the brown colors(light brown, dark brown, etc.) on both JavaDraw and FlashDraw. If someone can be so kind as to help me out here, I'd be most grateful. Thanks, peeps! I'll be awaiting some tips on this. You can private message me, or answer me here, it doesn't matter. Thanks again, Peeps later!
you can click through the color palette things and you'll find a brown~ ouo
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Twenty & Six Espresso
594 Queensberry Street
North Melbourne, VIC 3051
03 9329 0298
I don't normally publish coffee posts back-to-back, but let me make an exception here. Willem's my secret informant when it comes to new places around North Melbourne and Carlton. He eats there very early on and then tells me if he thinks it's worth visiting. I got very excited with Twenty and Six because he tells me they use Proud Mary beans. Proud Mary coffees so near where I work? That's perfect!!
Fakegf and I asked boss to cover us while we eagerly scuttled out for an early lunch. Twenty and Six is a mere 5 mins drive from work, but food blogging can be such a photography assignment sometimes that I feel a lot has to be accomplished within an hour. Any extra minutes we have on hand makes a world of difference.
Stepping in, we instantly loved the bright and beautiful cosiness of this café. The tables, chairs and little details were whimsical, colourful and gorgeous. And bright, smiling staff completed the picture.
'Angel Wings' Skinny Magic $3.80
'Angel Wings' Piccolo $3.80
Trust fakegf and I to order our usual skinny magic / piccolo combo these days. It won't be long before she moves on to skinny piccolos. Fakegf liked how fresh her magic tasted, but tells me she prefers blends with more punch and less citrus.
Beans here comes from Proud Mary's 'Angel Wings' (Costa Rica / El Salvador / Guatemala) house blend. This was the first time I really could taste most of the hints and notes as it was written up on the board: "orange acidity, floral upfront, very complex mix of hazelnut, plum and cocoa". The citrus and flowers were very detectable in my piccolo. Wonderfully refreshing, and I could taste nuts and chocolate at the end of my sip. Simply beautiful.
As mentioned in my previous post, Proud Mary beans have the tendency to taste astringent. I think it takes real skill balancing 'citrusy-type beans' in coffees as it can taste sour if made badly. They were good here in my piccolo, smooth yet zesty. I'd even venture to say that they make 'Angel Wings' piccolos here better than at (mothership) Proud Mary.
While the menu is pretty small, the food on offer is good and they didn't take long to arrive. Fakegf's portobello mushroom, creme fraiche, baby endive, manchego on quinoa + soya bread $14.90 was a nicely balanced dish. Enjoyable, although she thought the portion was just a tad small.
I loved my dish. Robin $16 – roasted red capsicum and parsley salad, blue creme fraiche, Istra bacon, baby cos, two free range poached eggs on sourdough. Never had roasted capsicums in a breakfast dish before, and loved the use of piquant creme fraiche rather than butter. Great bacon, the eggs bled perfectly and the sourdough (by Brasserie Bread) was amazing. I'm not a bread person, but this one deserved mention. The bread's texture was just so soft, yet elastic and resilient. Everything worked here, I was completely satisfied.
Single Origin Piccolo
Thanks to boss, we still had time for sweets and shared a chocolate and salted caramel tart $5. I also had a single origin piccolo from COD Tanzania "Oran estate" (washed). Again, a fascinatingly citrus drink with a fresh, floral zing. But this one was also punchier.
< This brunch simply had all the ticks happening. What a pleasurable one hour (and a bit) work lunch! We zipped back into work with such an ebullient mood... thats what a perfect brunch with good coffees does to you! Three things I know I'll be doing as a result of this visit: First, I'm more than happy to come back. Second, I'll be buying Proud Mary coffee beans from here, they sell it! And lastly, I now want to visit Brasserie Bread in South Melbourne!


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Andrew Wiseman over at New Columbia Heights points to an item floating around the Twittersphere: a Tea Partier's guide to D.C. And Teaism doesn't make the list!
Also out: Taking the Green or Yellow Lines after dark.
A blogger with the Maine Refounders leg of the Tea Party offers some advice for Tea Partiers attending the Glenn Beck's "Restoring Honor" march on Washington, which just happens to fall totally coincidentally on the anniversary of Martin Luther King, Jr.'s "I Have a Dream" speech, delivered during his March on Washington for Jobs and Freedom in 1963. Beck is delivering his speech at the Lincoln Memorial, approximately the same spot where King delivered his speech. (Another coincidence.)
Writer Bruce Majors provides restaurant recommendations and useful tips for the tourist who's never traveled to D.C. Then he offers some unconventional transit pointers:
If you are on the subway stay on the Red line between Union Station and Shady Grove, Maryland. If you are on the Blue or Orange line do not go past Eastern Market (Capitol Hill) toward the Potomac Avenue stop and beyond; stay in NW DC and points in Virginia. Do not use the Green line or the Yellow line. These rules are even more important at night.
He hastens to add that "[t]here is of course nothing wrong with many other areas; but you don't know where you are, so you should not explore them." But his general proviso rules out the Frederick Douglass National Historic Site, the only Target in the city, and everything in between.
In truth there are just two places Tea Partiers should stay away from while Glenn Beck is in town. One, Hank's Oyster Bar, because I might want to eat there that night, and they don't take reservations. Two, Dunbar High School, where Rev. Al Sharpton will gather with the annual "Reclaim the Dream" march before proceeding to the Martin Luther King, Jr., Memorial. Beck and Sharpton do not exactly see eye to eye on the legacy of King (or Lincoln).


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Marseille's Gerets 'impatient' over transfer of Kone
MARSEILLE, July 8 (Ligue 1) - Marseille coach Eric Gerets is becoming 'impatient' over the transfer negotiations for Nice forward Bakari Kone.
OM have reportedly had an 8.5million euro bid for Kone rejected by their south coast neighbours, who want 12million for the player who scored 14 goals in 30 Ligue 1 appearances last season.
That decision has angered Kone, who missed training on Sunday in protest at his move being blocked.
Marseille president Pape Diouf remains confident an agreement will be reached, and Gerets revealed he is constantly asking the board to do what they can to make it happen.
'Every day I've got the president on the phone to make my point,' Gerets told newspaper La Provence. 'I'm also discussing it a lot with (sporting director) Jose Anigo.
'Both of them know that I'm waiting for Kone impatiently. With Bakari, our recruitment would be 95% complete.'
However, despite his desire to bring the 26-year-old to the Stade Velodrome, Gerets will not be held to ransom.
'But I also understand that he (the president) can't just spend astronomical sums of money and the club can't just let itself do whatever it fancies,' he added.
Despite Nice president Maurice Cohen being determined to hold out for more money, reports in the French media on Tuesday suggested the saga would reach a conclusion by the end of the day.
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5pstats generates statistics about the pppd usage. It consists of two parts. One (perl script, called in ip-down) captures information about the amount of transferred bytes and the time you spent online and stores it in a MySQL database. The other part is written in php and generates html pages with several statistics.
Alt+Connect is a program to manage dialup connections: it allows a group of networked machines to share a single internet connection through their server. Users use special client software to start or stop their internet connection, and the server (connectd) ensures that the connection remains up only while someone's using it.
aswvdial is a dock/wharf app frontend for wvdial
Babylon comprises a device independent PPP stack which works under the GNU/Linux operating system, drivers for all of SpellCaster's ISDN adapters and standard analog modem support. It has an easy to use interface to configure dial in/out accounts.
chestnut-dialer is a PPP dialing program, written in Python that does not require root permissions, but require read and/or write access to some system files (modem device etc). chestnut-dialer use standard pppd daemon for set up network interface.
Command Line Masqdialer
Command Line Masqdialer is a client to be used in conjuction with the Masqdialer server allows an authorized user to dial out a connection.
Dial2net is an application that configures a PPP connection according to the ISP, which is selected by the user.
DWUN brings a PPP connection up and down based on clients stating their desire to connect. It is intended to be used on a masquerading gateway so that it will dial your ISP when someone on one of the masqueraded boxes tells it they want to be connected, and disconnect when no clients remain that wish to be connected.
Eznet is designed to make it much easier to get PPP running under Linux. Basically all you have to do is supply a name for your ISP, a login name, password and phone number and eznet will do the rest.
FreeNIBS is a loadable plugin for the FreeRADIUS radius server. FreeNIBS provides authorization, authentication, and accounting for dial-in (PPP/PPPOE/PPTP) users. It can be used for real-time prepaid and postpaid billing. FreeNIBS can bill users based on service accuration, time, traffic, and both time and traffic. FreeNIBS has very flexible settings for groups, users, and prices. All data is stored in SQL databases such as MySQl, PgSQL, and Oracle.
GMasqdialer is a small GNOME client (works with plain GTK+ now too) for masqdialer server which you can use to connect to internet in IP masqueraded networks without using telnet.
Gnome PPP
Gnome PPP is a modem dialup tool designed to integrate nicely into Gnome 2 Desktop Environment. It is very similiar to GPPP dialup utility for Gnome 1 and KDE equivalent, KPPP.
Gnome-Dial is an user-friendly PPP dialer for GNOME 2. Unlike other dialers like Gnome-PPP it requires just the GNOME Desktop Environment version 2.x. It aims at giving GNOME 2 users an easy tool to make dialup connections like kppp or the program used by Microsoft Windows with the highest possible number of settings while maintaining a good consistency, usability, integration with GNOME and speed.
Gppp is a ppp dialup utillty similiar to kppp or the windows dial-up-network. Unlike other programms it doesnt use skripts to start pppd; instead it uses wvdial.
gpppkill is a program for Linux that ends a ppp connection if it doesn't receive a minimal
amount of bytes during certain time. It shows a bar plot according to the amount of bytes
received per second. All resident ppp daemons are recognized and gpppkill lets you choose
which one to kill. It is written in C++ using the GTK+ toolkit.
gpppoe-conf is a Gtk2 tool for creating ppp accounts as easy as it can be. It also includes a tool for configurating Speedtouch modems.
isp-connect is a set of scripts which should make it easy to connect from a single GNU/Linux-workstation to an (or several) Internet service provider using a dial-connection. It supports single PPP connection over ISDN or modem (PAP/CHAP authentication only). Support is planned for raw-IP (over ISDN) and multiple connections simultaneously.
killppp is a shell script that kills the PPP process after a specified time period of no traffic. This is especially useful for dial-up users who pay per time-unit of being connected. The typical use for it is to start a large download along with killppp and go away. The script will shut down PPP right after the downloading is done, thus saving unnecessary cost of unused network connectivity.
KMasqDialer is a client for the Masqdialer server. It is designed to run on KDE2.x and QT2.x. The latest version of KMasqDialer will run on KDE3/QT3.
kppp is a dialer and pppd front-end.
KWvDial is a KDE based graphical re-implementation of WorldVisions' WvDial Intelligent PPP Dialler.
LANdialler enables several computers on a LAN (Local Area Network) to share control of a dial up connection to the Internet.
MyPPP is a ppp dialer+logger for Red Hat Linux. It let's you start a ppp dialup connection to your ISP and it records how much time you're online every month. With MyPPP, you don't have to worry about excess internet bills.
optisurf is a smartsurfer or least cost router for modem users living in Germany. It is an extension to the kppp application from KDE and is entirely written in bash. The GUI uses the kmdr-executor from quanta.
Penggy aims to provide connection trough AOL. Its goals are to support IP tunneling and other proprietary parts of the AOL protocol like mail, newsgroups, billing info, etc.
ppp is an open source package which implements the Point-to-Point Protocol (PPP)
ppp_bytes is designed to work out how many bytes you have
sent / received through your internet connection.
pppctl is a suite of programs for controlling a PPP connection.
PPPDropper is a small utility wrote to allow the author to come up with a form of "semi-demand" dialing. PPPDropper will allow you to drop a ppp connection on the basis of both a IN and OUT bound data rate.
PPPGun-Dialer is a Tcl/Tk script that can be used to etablish a PPP connection by dialing a remote terminal server. It is based on PPP-on/PPP-off scripts, but it is more flexible than those scripts, allowing a more intelligent dialog with the modem.
ppplag reads system log and shows a table of all found ppp sessions with stats for start time, duration, bytes in/out, and speed in/out.
ppplog keeps track of your ppp online sessions. Once started it detects when you are online and automatically calculates costs according to your local phone company.
PPPMon is a clone of the RP3 program (from RedHat). This utility shows the activity in the PPP connection, and to allow the user to start or stop it easily.
pppoesk is a small C program which goal is to terminate a bogus PPPoE session in an automatic way.
pppusage summarizes average and total transfer volumes, number of connections and average and total online time for all logged PPP connections. The data is collected by reading the syslog files which contain the ppp[d] messages. A database file is used to store the relevant data, thus it doesn't get lost when your ppp[d] logfiles are rotated or deleted.
QPPP is yet another ppp dialer, a simpler modification to MyPPP. QPPP is suitable for prepaid internet users.
QTmclient is a Qt based version of C. P Wright's masqdialer server.
QtWvDialer is a simple graphical front-end to wvdial. It provides you with a easy to use GUI to fire up a ppp connection. Additionally you have access to the output of wvdial, some PPP statistics and a editor for the wvdial configuration.
QuickPPP is a simple utility that configures pppd to connect to an ISP.
rg1000 dialer
rg1000 dialer is a command line utility for connecting or disconnecting an RG-1000 or Apple Airport from your ISP.
Slirp emulates a PPP or SLIP connection over a normal terminal. This is an actual PPP or SLIP link, firewalled for people's protection. It makes a quick way to connect your Palm Pilot over the Internet via your Unix or Linux box!
TkMasqdialer is a Tcl/Tk client for the Masqdialer daemon. The purpose of the masqdialer system is to allow users on a IP masqueraded computer without a modem, to use a computer's modem attached to the LAN.
vii-ppp-scripts is yet another set of ppp scripts. They feature handling multiple ISPs, autosetting DNS from ISP, ability to have a different resolv.conf for each connection, phone billing, chatscripts, and good customisability.
Wife's Network Controller
Wife's Network Controller is a GNOME applet to control diald. The applet allows you to choose from three states: auto, on, and off. When using the included scripts the auto state gives dial-up control to diald, the on state forces the dial-up link to come and stay up, and the off state closes the dial-up link.
WvDial makes it easy to connect your Linux workstation to the Internet. It will automatically detect your modem, and it can log into almost any Internet provider's server without any special configuration.


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In the space of a year, Valerie Sobel endured more grief than most people experience in a lifetime. First, she watched her witty, 18-year-old son, Andre, go blind, lose his ability to speak, and die of a brain tumor. Then on Jan. 4, 1996, just shy of the first anniversary of Andre's death, Sobel's husband of 26 years, Los Angeles attorney Erwin Sobel, shot himself in the head. In his suicide note, he said he couldn't bear to outlive his son. The double loss, Sobel says, was a "dark night of the soul."
In the years that followed, Sobel, whose family survived the Holocaust, found she couldn't shake a certain memory: In the hospital room next to Andre was a 12-year-old boy with cancer, alone. When she asked why, he replied that his mother was back home in another state, caring for his three siblings. The Sobels were affluent, and Valerie could afford to remain by her son's side from diagnosis to death. "It took me a long time to realize how privileged I was to have been able to be there with my son," she says. "I did not have to dilute my life for one moment to wonder, how am I going to keep a roof over my head?"
That realization gave a new direction to Sobel's shattered life. With $10 million inherited from her husband, Sobel, now 66, set up the Andre Sobel River of Life Foundation in 2000. Its purpose: to help parents of gravely ill and dying children be with their offspring and not worry about financial ruin. And that's a real concern for many families of the roughly 500,000 U.S. kids with life-threatening conditions—from cystic fibrosis to cancer—many of whom do not have the money or the ability to take time off work to care for their children. "I've personally seen families lose their homes, bitter divorces, cars repossessed, jobs lost, bank accounts wiped out," says Ann Armstrong-Dailey, founding director of Children's Hospice International in Alexandria, Va.
When 5-year-old Noah Benchek was diagnosed with a brain tumor in 2004, his parents, Kristina and Robert, dropped everything to be at his bedside. They left their jobs—he was an electrical contractor; she ran a home-based business—and stowed Noah's 3-year-old brother with an aunt. The emotional and financial stress was so intense that as Noah underwent surgery and then endured radiation therapy, emotions erupted. "Once, my husband and I were arguing, and I threw dinner at him," says Kristina, 36, of Lompoc, Calif.
At the end of their first nonworking month, the Bencheks found they could not make a $1,500 mortgage payment; a social worker at the hospital suggested they contact Valerie Sobel. The foundation paid their mortgage and bought the family groceries. Noah was declared cancer free and the Bencheks' marriage survived. "When they paid that July mortgage, we had not left the hospital for a month," Kristina Benchek recalls. "It gave us a sense that we could focus our energy where it needed to be."
That gift was a fraction of the $3.7 million Sobel's fund has given away to 2,700 families, all within 24 hours of hearing about a case. Networking through social workers at hospitals across the country, Sobel runs a kind of anti-bureaucracy. Parents fill out a simple application that requires no proof of income. Bills are then paid directly to the banks, utilities and businesses where the money is owed. And that was a godsend for Cassie Sargent, a single mom, whose son C.J. was diagnosed with nasopharyngeal cancer in 2004 at the age of 15. During his three-month hospitalization, Sargent took off from her job as a customer-service rep. She fell behind on her rent and car payments and could barely afford gas to drive herself 220 miles from her home in Reno to the hospital in San Francisco. She looked up Sobel on the Internet and fired off a desperate plea. Sobel replied within hours, and the foundation then paid Sargent's monthly costs, between $3,000 and $4,000, for three months.
"She just took charge, a total fairy godmother," says Sargent. 41. C.J., now 18, has recovered after complications from surgery to remove the cancer. He remembers the change in his mother after Sobel began to help. "She wasn't stressed about money and always talking on the phone. She could spend more time taking care of me. That made me feel a lot better."
Helping parents like Sargent is what Sobel says is most satisfying to her after a life that has had more than its share of tragedy. "Pain unites us," she says. "These are all my sisters and I am theirs."
Know a hero? Send suggestions to email@example.com For more information on Sobel's foundation, go to http://www.andreriveroflife.org


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- Name: Mary Ann Lubas
- E-mail: firstname.lastname@example.com
- Age: 29
- Where: Fort Lauderdale, Florida
- Height: 5' 6"
- Weight: 135 Lbs., Contest: 125 Lbs.
- Years Bodybuilding :2
- Favorite Bodypart: Legs
- Favorite Exercise: Legs
- Favorite Supplements: Dymalean Whey Protein and Diet Turbo Tea
How Did You Get Started?
I started training 10 years ago and was an avid reader of fitness magazines. Monica Brant was one of the fitness models I have always admired. It wasn't until I moved to Florida from NY and saw my first fitness competition show when I realized I wanted to compete. So I did extensive research on preparations of competing and entered my first show which was the 2006 Debbie Kruck Classic. I won first place in my class and now I'm addicted!
What Workout Plan Worked Best For You?
I train 4 days on weights hitting each body part twice a week and seven days of cardio. Some days I will double up the cardio doing one session in the morning and one in the evening for 30 to 45 minutes. During off season, I increase the weights and do less reps. I focus on increasing more muscle and working on my weak areas to improve for the next show. I do abs in between sets to save time and keep my heart rate up. Cardio I do 3 days a week for 20 to 30 minutes.
What Nutrition Plan Has Worked Best For You?
Preparing for a show, I eat chicken, fish, egg whites, protein shakes, oatmeal, lots of green veggies, and take flax seed oil. I eat six small meals a day every three hours and drink a ton of water! During off season, I still eat clean but add more nutritious foods in my diet. Occasionally, I will indulge with a glass of wine and my favorite Italian dish Chicken Marsala. Some of my other favorite cheat foods are pizza, my mom's gulumpki's and of course chocolate!
What Supplements Have Given You The Greatest Gains?
I love taking Dymalean Whey Protein. It's more satisfying than other whey shakes and it tastes great! I also drink Diet Turbo Tea before my workouts to give me extra energy.
Why do you love Bodybuilding?
I love living a healthy lifestyle and being in shape. It makes me feel strong and confident. Competing challenges my body to get into the best shape its ever been. I love being on stage and showing off what I have worked so hard for. Its such an enormous satisfaction for me. Also, competing helps you meet a lot of great people in the fitness industry.
What Are Your Future Bodybuilding Plans?
My future fitness plans is to compete on the national level in the NPC next year and one day earn my IFBB pro card status.
What One Tip Would You Give Other Bodybuilders?
My number one tip to others is to believe in yourself and make it fun.
Who Are Your Favorite Bodybuilders?
Monica Brant and Valerie Waugaman.
|Calling All Over 40 Amateurs!