text:
|Publication number
|Publication type
|Publication date
|May 7, 1974
|Filing date
|Mar 23, 1971
|Priority date
|Mar 23, 1971
|Also published as
|Publication number
|Hoyt H
|Original Assignee
|Meyer Labs Inc
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (10), Referenced by (18), Classifications (7)
|External Links: USPTO, USPTO Assignment, Espacenet
United States Patent 11 1 1111 Hoyt, Jr. May 7, 1974 [54] ELECTRONIC TRAFFIC SlGNAL CONTROL 3,482,208 12/1969 Auer, Jr. et al 340/35 SYSTEM 3,414,878 12/1968 Smith 340/41 [75] Inventor: Harold C. Hoyt, Jr., St. Louis, Mo. Primary Examiner Kathleen H Claffy [73] Assignee: Meyer Labs, Inc., St. Louis, Mo. Assistant Examiner-Randall P. Myers Filed: Mar. 1971 Attorney, Agent, or Firm-Ralph W. Kalish [21] Appl. No.: 127,134 [57 ABSTRACT An electronic traffic signal control system. Logic cir- [52] US. Cl 340/41 R cuitry is included for providing a sequence of timed [51] Int. Cl G08g 1/085 changing logic states which define operating periods [58] Field of Se 41 for a plurality of signal lights. Control means is re- [56] References Cited UNITED STATES PATENTS 3,644,884 2/1972 Matysek 340/40 3,434,0l6 3/l969 Curtis 340/41 3,251,030 5/1966 Bolton et al. 340/41 3,525,980 8/1970 Schmidt et al 1 340/41 3,384,871 5/1968 Selzer et al. 340/37 3,605,084 9/197] Matysek 340/40 3,594,720 7/1971 Cane 340/37 3,376,546 4/1968 Cress, Jr. et al. 340/37 ii ifij 1 (59 '33 1 fi fl fi OPTIONAL TIMING TIMING .37 1 G ADJUST POLICE FUNCTION CONTROL CONTROL TIMING TIMING PULSES LOGIC SYNCHRONIZING SIGNAL Va 49 r j) SYNCHRONIZER 1 FLASHER I AND DELAY I CONTROL I 2TH t J sponsive to the changing logic states for selectively energizing predetermined ones of the signal lights during each of respective operating periods defined by the logic states. Timing circuitry generates timing pulses for causing successive changing of the logic states. Provision is made for manually varying the timing of generation of the timing pulses for preselecting the lengths of the respective operating period defined by each of the logic states.
14 Claims, 13 Drawing Figures TURN 39 5? SIGNAL OPTION TEST LIGHTS YE RE 1.5 cu m RN 25 4|" "43 LN {Q o o o 91 POWER 3 CONTROL POWER FAULT OUTPUT MONITOR POW-ER CONTROL I I 3 y I BIB GE YE {2E \LE GN) YN) RN) LN mamas TRAFFIC SIGNAL A.c. POWER TO SYSTEM 69 AC. POWER SWITCHING A.C. POWER IN mamznm m 3310.084
saw our 11 FIGZA CHRON MODULE FAULT LOGIC MODULE TO LT. RE
FLASHER PATENTEU m 7 I974 8310.084 SWEET 030E n Y FIGZBI LOGIC POWER MODULE CONTROL MODULE MODULE (FIG.5) I
' saw us or 11 2% MW m4 z 20 men 5m m3 m8 3m 'PATENTEDNAY 7 I974 84 sum -a? or 11 @fi T Q sol GN POT N602 (PF FIG.6 @LN POT Dl C3) GE b AS 604 W Joiq @l Ne GROUP 2 INPUT I W J TIMING GROUP 3 INPUTW q LE GAP POT E LN GAP POT 6D? FAST PASS IN TIMING CAP OUT TO SYNCHRONIZER TIMING PULSE T0 LOGIC MODULE POLICE CONTROL INPUT 25 v. B+ OUT AND POLLC CONTROL 4.5 0.0. PUMP CIRCUIT ou 20V AC 1 20 VAC. 2
I CLOCK SWITCH 3 CLOCK SWITCH 2 A.. C RETURN .PATENTEDIAY H914 3810.084 sum 09Uf11 Flea FIG.9
PATENTEDm 1 m4 sum 110F 11 v 253 EzQw 0P ELECTRONIC TRAFFIC SIGNAL CONTROL SYSTEM BACKGROUND OF THE INVENTION This invention relates to traffic signal control systems and more particularly to electronic traffic signal control systems of the pre-timed, multiphase type.
Traffic signal controllers of the prior art have been of either mechanical (i.e., electromechanical) or electronic types. Mechanical controllers typically employ motor-driven drum switches which operate switching contacts. After prolonged continuous use, such contacts may stick together, break off or become otherwise inoperative. In general, mechanical controllers include moving parts which are subject to failure in use, such as through wear. On the other hand, electronic controllers have heretofore been typically complex and expensive. Further, because of their complication, such controllers may be difficult to initially place in operation, and may involve difficult or confusing programming as with pegboards or the like. Further, previous electronic controllers have not been fully reliable. More significantly, however, such controllers have generally included no provision for sensing when the operation of the controller is improper.
Regardless of the type, prior art controllers have also included such limitations or disadvantages as narrow range of adjustment; limited flexibility in use, i.e., limited facility for changes in capability as use requirements vary; and have caused difficulty in installing, adjusting or testing and difficulty in servicing and maintaining.
A frequently encountered requirement in the use of controllers of the present type is that the operation of the controller be synchronized with the operation of other controllers such as at other intersections. Such synchronization is conventionally effected through the use of a synchronizing signal carried on a synchronization line to which a plurality of controllers are connected. This synchronizing signal is conventionally constituted by utility service a.c. line voltage which is periodically interrupted (through the operation of a master controller) to cause operation by other controllers slaved to the master controller by the virtue of being commonly connected to synchronization line. A problem sometimes encountered in the use of prior art controllers which are synchronized in this manner results because the cycle of operation of each slaved controller is typically halted at some point and then caused to resume (thereby effecting synchronized operation) by either the interruption or the return of the a.c. synchronizing signal. If the controller of the type in which the cycle of operation is resumed when the synchronizing signal returns, normal controller operation may be indefinitely halted if, for example, the synchronization line should break. Where several controllers of this type are connected to the same synchronization line, a break in the line may cause all of the controllers to become inoperative, terminating traffic signal operation at each of several intersections. On the other hand, if the controllers are of the type wherein the cycle of operation is caused to resume when the synchronizing signal is interrupted, a failure of the master controller to interrupt the a.c. line voltage on the synchronization line will cause operation of all of the slaved controllers to cease, again resulting in several intersections being affected, presenting the possibility of a massive traffic jam. Not only do types of failures occur in the operation of traffic signal control systems, but another type of failure may result where the synchronizing signal is intermittently present. This may be caused by an intermittent or faulty connection in the synchronization line, for example. In the use of prior art controllers, this intermittent condition can result in irregular operation of all of the slaved controllers with corresponding interruption of normal traffic flow.
BRlEF SUMMARY OF THE lNVENTlON Among the several objects of the invention may be noted the provision of an electronic traffic signal control system; the provision of such a system which is solid state in design, utilizing microcircuitry, and utilizing no moving parts during normal operation; the provision of such a system adapted for multiphase traffic control; the provision of such a system including provision for optional controlling of left turn signals; the provision of such a system including provision for switching signal timing to one or more auxiliary time groups, under time switch control (for changing signal light operating periods) and for switching under control of such a time switch to a flashing signal mode of operation; the provision of such a control which is adjustable over a wide range of preset signal light operating periods; the provision of such a control which is easily installed and placed in service, easily adjusted, and easily tested; the provision of such a control which has great flexibility in use and, for this purpose, which is modular in design to facilitate the addition or deletion of features and options for changing the system capabilities in accordance with varying use requirements; the provision of such a control which is fail-safe in operation, including a provision for this purpose which automatically monitors operation of the system and initiates signal flasher operation in response to a malfunction; the provision of such a control which, while being of the pre-timed type, Le, a local controller, can be synchronized, or slaved, to the operation of other controllers by means of a synchronizing signal, but which reverts to pre-timed operation in response to failure of the synchronizing signal and wherein operation is not substantially affected by an intermittent condition of the synchronizing signal; the provision of such a system which can be used either as a local controller or to generate a synchronizing signal as a master controller to which other controllers are slaved; the provision of such a system which is highly accurate over a wide range of temperatures and which operates with high reliability and long-life; and the provision of such a system which is economical and relatively simple to manufacture. Other objects and features will be in part apparent and in part pointed out hereinafter.
Briefly, a solid state electronic traffic signal'control system of the present invention comprises a local controller which is adapted for multiphase control of a plurality of traffic signal lights. The system includes logic means including a code generator for generating a repeating coded sequence of timed logic states and a decoder for defining operating periods for the signal lights according to this coded sequence. Control circuitry having a plurality of semiconductor current switching devices is operative in response to the decoder for selectively energizing predetermined one of the signal lights during each of respective operating periods defined by these logic states. Timing means is responsive to selective energization of the signal lights and is operative to generate timing pulses for causing the code generator to generate the successive logic states.
Means is provided for manually varying the timing of BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a system of the invention;
FIGS. 2A and 28 together constitute a master schematic circuit diagram showing the overall layout of and interconnection between various circuit modules of the preferred embodiment of the invention;
FIG. 3 is a schematic circuit diagram of a control logic module of the FIG. 2 system;
FIG. 4 is a schematic circuit diagram of each of a pair of power control modules of the system of FIG. 2;
FIG. 5 is a schematic circuit diagram ofa power output module of the FIG. 2 system;
FIG. 6 is a schematic circuit diagram of a function timing module of the FIG. 2 system;
FIG. 7 is a schematic circuit diagram of a synchronization module of the system shown in FIG. 2;
FIG. 8 is a schematic circuit diagram of an auxiliary time group module for use with the FIG. 2 system;
FIG. 9 is a detailed schematic diagram of certain logic circuitry of the FIG. 3 logic module and which controls entry and exit of a flasher mode of operation;
FIG. 10 is a schematic circuit diagram ofa fault monitoring module employed in the system of FIG. 2;
FIG. 11 is a schematic circuit diagram of a flasher control module which can be used with the FIG. 2 system; and
FIG. 12 is a timing diagram useful in explaining operation of the system.
Corresponding reference characters indicate corresponding parts throughout the several views of the drawings.
GENERAL DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to FIG. 1, a traffic signal control system, or traffic controller, of this invention is adapted for multiphase control ofa plurality of traffic signal lights 21. As is known in the art, multiphase control implies that a plurality of traffic phases are controlled, there being one complete series of traffic control functions including at least green, yellow (or amber), and red signal lights for one or more directions of traffic flow. For example, an intersection defined by a pair of streets which cross or join suggests two phases of traffic, each phase corresponding to traffic moving in either direction along a respective one of such streets.
For purposes of simplifying illustration, it is assumed hereinafter that the present controller is utilized for two-phase control of an intersection defined by an East-West steet along which traffic flows in both directions. Traffic along the East-West street is hereinafter referred to as phase A. Traffic is similarly assumed to flow along the North-South street in both directions and is referred to as phase B. For convenience, the East-West street is assumed to be the principal artery, or main" street, and the North-South street is assumed to be a street of secondary importance, or side' street, in determining priority of traffic control. Notwithstanding these assumptions, however, it will be apparent that the controller is fully adapted for control of one-way traffic, including half-plus-half phase control, or one-plus-half phase, and so forth.
It is further assumed that the present controller can control left turn signals for both directions of both traffic phases in addition to the conventional green, yellow and red signals for each traffic phase. Regardless of their number or their positioning with respect to the in tersection, there are thus assumed to be the following traffic signal lights and which are identified as shown in parentheses:
green-east (GE) yelIow--east(YE) redeast(RE) left-east(LE) greennorth(GN) yellownorth(YN) red--north(RN) leftnorth(LN) The present controller is adapted to cause concurrent operation of the respective signal lights of one color for both directions of traffic flow of either phase: e.g., green-eat (signal light GE) is energized concurrently with green-west (signal light GW); signal light LN is energized concurrentlywith signal light LS, and so forth. Accordingly, for simplicity, reference is in general made hereinafter only to the following signal lights, viz., GE, YE, RE, LE, GN, YN, RN, and LN. Such ones of signal lights 21 are so-designated in FIG. 1. The presence and concurrent operation of the corresponding signal lights such as GW, YW, RW, etc., is then assumed.
In general, the present controller includes control logic means 23 which includes a code generator for generating a repeated coded sequence of timed logic states and a decoder for defining operating periods of the signal lights 21 according to this coded sequence. Control means including a first power control circuit 25 for traffic phase A, a second power control circuit 27 for traffic phase B, and a power output circuit 29 are shown functionally interconnected with the control logic 23. The power output circuit 29 comprises a plurality of semiconductor current switching devices whose triggering is controlled by power controls 25 and 27 in response to the operation of the decoder of control logic 23 thereby to selectively energize predetermined ones of the signal lights 21 during each of respective operating periods defined by the timed logic states.
Function timing circuitry 31 is shown functionally interconnected with the control logic 23 and operates to generate timing pulses for causing the code generator of logic 23 to generate successive logic states. Timing adjustment means 33'interconnected with the timing circuit 31 permits manually varying the timing of generation of the timing pulses. This permits preselection, i.e., presetting of the length of the respective operating period defined by each of said logic states. Functional interconnections 35 and 37 are shown between timing adjustment means 33 and the respective controls 25 and 27, providing a type of feedback for causing the timing circuit 31 to be responsive to the selective energization of the signal lights 21.
A turn signal option circuit is designated 39 and allows manual preselection between a first type of controller operation wherein left turn signal lights (i.e., signal lights LN and LE) are normally energized during the normal operation cycle and a second type of operation wherein energization of the left turn signal lights for either phase of traffic is prevented. Option circuit 39 is shown functionally interconnected, as indicated at 41 and 43 with the power control circuits 25 and 27, respectively. A functional interconnection 45 between turn option circuit 39 and timing circuit 31 is provided for causing accelerated generation of a timing pulse when energization of turn signal lights (LN or LE) is prevented. This has the purpose of causing accelerated changing of the logic state defining an operating period for the turn signal light.
A police control circuit is indicated at 47 and is functionally interconnected with the timing circuit 31 in order to provide means for manually controlling the generation of timing pulses. This permits a police officer, for example, to manually control the energization, or changing, of the signal lights 21.
A synchronizer circuit 49 is optionally included in the controller where it is desired to line-synchronize control of the signal lights 21 with events occurring externally of the system, i.e., with other controllers at other intersections. As previously mentioned, such synchronization is effected by means of a synchronization line carrying an a.c. line voltage synchronizing signal. This signal is provided to circuit 49, as indicated, which operates in response to this signal to alter the timing of changing the logic states provided by the control logic 23. For this purpose, synchronizer 49 is functionally interconnected with the timing circuit 31 as indicated at 51 to control the generation of the timing pulses from the latter circuit. Synchronizer 49 includes a delay means for manually preselecting a time delayed response to the synchronizing signal thereby to adjust this synchronizing function to achieve desired synchronized operation with other intersection signal lights, etc., as dictated by speed of traffic and other considerations.
Another optional feature of the system involves provision of a flasher mode of operation through the use of a conventional clock or time switch 53, which may be of the type conventionally employed for use with prior art controllers. Clock switch 53 is shown functionally interconnected as indicated at 55 and 57 with timing circuit 31 and with control logic 23. The control logic 23 includes control means which is responsive to operation of clock switch 53 for terminating traffic control operation of the system and for initiating flasher operation of predetermined ones (such as RE and RN) of the signal lights at a predetermined time and for causing reversion to normal traffic control operation at a later predetermined time. The frequency of such signal light flashing is under control of the function timing circuit 31.
A further optional feature of the system entails the provision of one or more optional timing group control circuits such as indicated at 59. Optional timing group 59 constitutes auxiliary means for manually varying the timing of generation of the timing pulses from timing circuit 31 and, for that purpose, is functionally interconnected as indicated at 61 with timing circuit 31. Timing circuit 31 includes switching means responsive to operation of clock switch 53 for causing timing group 59 to take priority over timing adjustment circuit 33 so as to provide a varied or different set of signal light operating periods at predetermined times established by clock switch 53. There may be more than one such optional timing group 59.
The various controls of the system, as well as the circuitry of the system, may conventiently be enclosed in a small cabinet-type enclosure of a few inches in each dimension. Timing adjustment knobs or the like which adjust timing components of circuits 33, 59, 49, and so forth, are preferably positioned for access on a face panel of the enclosure. In order to facilitate set-up, adjustment of such controls and others, as well as testing, the system includes test or indicator lights 63 which correspond with respective ones of signal lights 21. The test lights 63, which are preferably small indicator-type panel lights, are mounted for all being viewed simultaneously on the face panel of the system enclosure and are designated to correspond with signal lights 21, viz., GE, YE, RE, LE, GN, YN, RN and LN. These indicator lights 63 are interconnected with the power output circuit 29 so as to be energized concomitantly with respective ones of signal lights 21.
In accordance with the present invention, the system includes fault monitoring means 65 which continuously and automatically monitors operation of the system and operates to terminate traffic control operation of the system in response to energization of an unsafe combination of signal lights 21. For this purpose, fault monitor 65 is functionally interconnected as indicated at 67 with a power switching circuit 69 which controls the distribution of ac. power to various circuits of the system. Circuit 69 is caused to disconnect the ac. power to circuits other than the fault monitor 65 whenever such an unsafe combination occurs and to instead energize a conventional external flasher control 71 of the type typically used with prior art controllers. Control 71 then causes flasher operation of predetermined ones of signal lights 21, such as the red lights RE and RN. I
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT a. Overall Circuit Layout Referring to FIG. 2, an overall schematic circuit dia gram of the present system or controller, there are shown various interconnected circuit modules, each of which preferably comprises a slide-in type printed circuit card. These modules include a logic module 73 (FIG. 3), a pair of identical power control modules 75 and 77 (FIG. 4), a power module 79 (FIG. 5), a timing module 81 (FIG. 6), a synchronizer module 83 (FIG. 7), and a fault logic module 85 (FIG. 10). Other circuits or modules, described later, are adapted to be connected to certain jacks shown in FIG. 2.
Leads interconnecting the modules are shown connected at terminals along the edges of the modules which terminals are designated throughout the specification by reference numerals having first numerals corresponding to the number of the figure of the drawings which shows the circuitry of the respective modules, and other numerals separated therefrom by a dash and indicating the terminal number. For example, logic module 73 (shown in FIG. 3), includes terminals 3-1,
3-2, and so forth. However, on the drawings, only the numerals indicating the terminal number are shown as digits encircled by the terminal symbol. Terminals of the modules sometimes simultaneously appear on both sides of the module to simplify illustration of circuit connections.
Circuit components of the several modules are similarly designated, such as 3R1, identifying resistor R1 of FIG. 3, and 6C3, identifying capacitor C3 of FIG. 6. Components of FIG. 2 are designated in the same way, such as 2R3, and so forth. However, terminals of jacks and plugs throughout the drawings are designated by. characters such as J2 (identifying jack J2) and numerals separated therefrom by a dash and representing the terminal number. For example, jack J2 includes terminals J2-l, J2-2, and so forth. The jack terminal numbers are encircled by the respective terminal symbols.
Power for the system, e.g., I20 v.a.c,. is supplied via a pair of leads 2L1 and 2L2 (lower left corner of FIG. 2) connected from the ac. hot side and ac. ground side, respectively, to a pair of respective terminals J4-3 and J4-6 ofa jack J4. Jack J4 includes several such terminals and provides the principal means of connecting external circuits to the controller. A noise-filtering capacitor 2C1 is connected externally across leads 2L1 and 2L2. A large (e.g., 30 amperes) main fuse 2F1 is internally connected in lead 2L1. A power connection for the fault logic module 85 is completed from lead 2L1, via terminal J4-3, fuse 2F1, thence to a terminal -20 of fault module 85. Another I20 v.a.c. power connection is made through a much smaller (e.g., l/2 ampere) fuse 2P2 to terminal 10-22. A direct connection is internally completed by module 85 (see FIG. 10) from terminal 10-22 to terminal 10-21. From terminal 10-21, a 120 Vac. power circuit is completed through the primary winding of a step-down transformer 2T1 and thence to lead 2L2 via terminal J4-6. The secondary of transformer 2T1 provides reduced voltage (e.g., 20 v.a.c.) to terminals 6-20 and 6-22 of timing module 81. The 120 v.a.c. power is also supplied to terminals 5-14, 5-15, and 5-16 of power module 79 via a blade 2KBl closed on a contact 2KC1 of a relay 2K1 (whose purpose is explained in connection with fault module 85).
Traffic signal lights are conventionally connected so that one side of the light is grounded and the other side is then adapted to be supplied with conventional 120 v.a.c. power. Thus only one lead is connected to a controller for each light or set of lights which are always to be simultaneously energized (such as lights GE and CW). The signal lights are connected to the present controller by terminals ofjack J4. The following table indicates the signal lights and the terminals to which they are connected:
Signal Light Terminal GE 14-1 YE 14-4 RE J4-l6 LE 14-23 GN 14-13 YN 14-19 RN 14-15 LN J4-8 As noted, there is concurrent operation of signal lights b. Control Logic Referring to FIG. 3, the control logic module 73 includes a plurality of integrated circuits ICl-IC10. Of these, circuits ICl-IC4 are each Quad 2-Input Gate Expander circuits of a commercially available type (Such as Signetics SP63I circuits IC5-IC7 are each JK Binaries, or so-called master-slave flip-flops (such as Signetics SP620). Circuits IC8 and IC10 are each Dual 4- Input NAND gate circuits (such as Signetics SP6l6) and IC9 is a Quad 2-Input NAND gate circit (such as Signetics SP680).
Integrated circuit flip-flops IC5-IC7 are connected together to provide a so-called fall-down binary ripple counter constituting a code generator for generating a repeating coded sequence of logic states. The Q and 6 (or so-called 0 and l) outputs of these flip-flops are provided on pins 3 and 12 of each circuit, with pin 7 constituting the toggle or trigger input for each. These flip-flops are connected in serial fashion, each Q output being used to toggle or trigger the successive flip-flop. Terminal 3-12 constitutes the toggle input for the first flip-flop IC5. Since there are three such flip-flops, the Q and 6 outputs thereof provide a total of (2) or eight logic states or functions FO through F7 each divided by a three-digit binary number. If the respective Q and 6 outputs of the flip-flops are identified alphabetically according to the order of three flip-flops IC5-7, such as A,A; 8,13 and QC, respectively; then the counter output may be identified by three-digit binary numbers ABC, ABC, etc., defining binary counts of 000, 001, and so forth. Such logic states, counter output, and binary count are shown in FIG. 12.
Integrated circuits ICl-IC4 together constitute a decoder providing combinational logic for decoding the binary count of the code generator and defining operating periods for signal lights according to the generated coded sequence of logic states. Each of the circuits IC- l-IC4 includes four 2-input gate expanders. These are connected to provide a decoding function familiar to those skilled in the use of such logic devices for decoding the eight logic states and for delivering eight separate logic signals representative of these logic signals in respective terminals 3-4, 3-5, 3-10, 3-11, 3-16, 3-13, 3-18 and 3-20 as the count of the code generator (flipflops IC5-IC7) is caused to advance successively by timing pulses delivered thereto via terminal 3-12 from timing module 81 in a manner explained below. It is presently sufficient to note that each such timing pulse causes a change in logic state. These pulses are selectively timed to define different signal light operating periods t,-t (and shown in FIG. 12) corresponding to the eight logic STATES. While there are eight logic states defined by the states. it will be apparent that a smaller or larger number of logic states may be desired in a controller of this invention.
Certain logic inputs of circuits IC1-IC4 are also commonly connected together by a bus lead 3L1 in order to inhibit decoder output, for purposes explained later, when an inhibit signal is present on lead 3L1.
c. Power Control and Output Referring for the moment to FIG. 2, the eight logic signals representative of logic states F0-F7 are each adapted to be supplied to one of the two identical power control modules 75 and 77. For example, signals representing states F0-F3 are adapted to be delivered to respective terminals 4-9, 4-6, 4-2, and 4-3 of control module 75, Signals representing states F4-F7 are adapted to be delivered to respective terminals 4-9, 4-6, 4-2 and 4-1 of control module 77. Referring now to FIG. 4, these inputs for the logic state signals are so identified.
Each of modules 75 and 77 includes four PNP transistors 401-404 whose conduction is respectively controlled by four NPN control transistors 405-408, each of the latter transistors having its base connected to a respective one of the four logic state signal input terminals. The emitters of transistors 401-404 of both modules 75 and 77 are each connected to the positive 25 v.d.c. supply via terminal 4-16 and the respective collectors of these transistors 401-404 are connected to terminals 4-12, 4-11, 4-21, and 4-22, respectively, which are in turn connected (see FIG. 2) to corresponding terminals of power module 79 (FIG. 5).
Power module 79 includes eight triacs 501-508 which, as known to those skilled in the electronics arts, are of a family of triggerable semiconductor current switching devices adapted to be triggered and thus rendered conductive by a signal applied to the gate electrode thereof. Each of triacs 501-508 has its gate electrode, or simply gate, connected to one of the two power control modules 75 and 77 for being supplied with triggering current delivered by the collector of one or more of the eight driver transistors 401-404 (there being four such transistors for each power control module). Each of triacs 501-508 is adapted to control the energization of one (or a commonly-connected set) of signal lights 21. The individual signal lights, e.g., GE, YE, etc., controlled by these triacs are identified by reference characters adjacent each triac shown in FIG. 5. Adjacent the terminals of this power module 79 are characters such as RNA, RNG, etc., identifying, according to the signal light color, the triac anodes (to which the signal lights are connected) and the triac gates. l.e., RNA signifies the red-north triac anode, RNG the red-north gate, and so forth.
To understnad the operation of these several power control and power output components, it may first be observed that each of control transistors 405-408 (of each control module 75,77) is adapted to be driven from cut-off to saturation in response to a respective one of the logic state signals delivered by the decoder of logic module 73. Each of the control transistors, when conductive, in turn causes the driver transistors 401-404 to be driven from cut-off to saturation. The relationships between the several logic states and the conduction of transistors 401-408 are shown in the following table:
Logic state F F1 F2 F3 F4 F5 F6 F7 Control transistor:
Mo mp s 4 Q5 4Q6 4Q? 4QB 165156-167 28 Driver transistof:
M0du1e75 4Q1 4Q2 4Q3 4Q4 Module77 4Q1 4Q2 4Q3 40,4
causes triggering of the triac connected thereto, resulting in energization of the corresponding signal light. Diodes 4D1-4D2 of modules 75 and 77 are provided for causing triggering of triacs 508 (RN) and 507 (RE) as a result of theconduction of transistors 401 and 402 and, depending upon the positions of left turn option switches 253 and 254 (see FIG. 2) whose position is explained later, transistors 403 amd 404. Other diodes 4D34D8 of modules and 77 are related to the operation of switches 283 and 284 and are explained later in conjunction with these switches, whose position controls triggering of triacs 503 (LN) and 506 (LE).
d. Function Timing Timing of the functions carried out by the present controller is controlled by timing module 81. Referring to FIG. 2, timing pulses for causing the code generator of logic module 73 to change states are supplied by timing module 81 in accordance with operating periods for the individual signal lights which are preset by potentiometers interconnected with module 81. Such timing potentiometers are designated in accordance with the signal light whose operating period is controlled thereby, viz., RGE, RLN, RGN, RLE, RYE, and RYN. Two of these potentiometers, viz., RLNG and RLEG, are for control of timing gaps which are provided between termination of the respective left-north and lefteast turn signals and the subsequent initiation of the green-north and green-east signals. The gaps are explained in conjunction with the later explanation of system operation. The timing potentiometers RGE, etc., are connected to the power control modules 75 and 77 for causing circuits of timing module 81 to be responsive to selective energization of the signal lights, as is later apparent. As previously noted, control knobs of these potentiometers are preferably positioned on a face panel of the controller enclosure where they may be adjusted. I
Referring now to FIG. 6, a timing circuit for generating the timing pulses includes a unijunction transistor (UJT) 601. A timing capacitor 6C1 is charged at a rate determined by the timing potentiometers, which are effectively connected one-at-a-time to this timing capacitor 6C1 by operation of circuitry of the power control modules 75 and 77. An emitter-follower circuit including transistor 602 having its base connected to timing capacitor 6C1 is connected for causing triggering of transistor 601 when timing capacitor 6C1 is charged to a predetermined voltage dependent upon the firing potential of the UJT. When thispredetermined voltge is attained, the UJT fires, delivering a pulse to the code generator of logic module 73 via terminals 6-18.
The emitter-follower arrangement is highly advantageous in providing timing which is uniformly accurate regardless of variations in the so-called peak-point current of the UJT and regardless of variations in temperature as encountered in typical use. The wiper of a timing calibration potentiometer 6R1 is connected to one base of the UJT. Various isolation diodes 6D 1-6D8 are connected between the timing capacitor and the respective timing potentiometers.
It may be noted that this timing module 81 includes part of the power supply circuitry of the controller, including a full-wave diode rectifier bridge 88 supplied with ac. voltage by transformer 2T1. A filter capacitor 2C2 is connected as shown in FIG. 2 across the output leads of bridge 88. Bridge 88 supplies positive 25 v.d.c. potential for not only the UJT and other circuits of module 81, but for circuits of other modules as well. e. Basic Operation In order to facilitate an understanding of various other features and circuits of a system of this invention,
it is helpful to first understand basic operation of the controller. Referring to FIG. 12, which is a timing diagram, there are illustrated the eight logic states or functions F-F7 which are generated by logic module 73, together with the binary code generator output state and resulting binary counts which define the respective logic states.
Assuming operation of the controller to begin with logic state F0, the decoder of logic module 73 (FIG. 3) will supply to power control module 75 via terminal 3-5 a signal representing logic state F0. Control transistor 405 (FIG. 4) thus becomes conductive, causing driver transistor 401 to become conductive. Triggering current is then delivered via terminal 4-12 to triac 5Q1 (GE). Thus triggered, triac 501 (FIG. 5) energizes signal light GE (and, of course, GW as noted), whose operation is indicated by segment 89 of FIG. 12. At the same time, conduction of transistor 4Q2 supplies current through diode 4D1 and via terminal 4-8 for triggering of triac 5Q8, thus energizing signal light RN, as shown in FIG. 12 by segment 91. Also at the same time, transistor 401 effectively connects timing potentiometer RGE to the positive 25 v.d.c. supply potential for charging the timing capacitor 6C1 (FIG. 6) through diode 6D4. Potentiometer RGE may be preset to provide a timing interval or operating period t to signal light GE of from 5 to 60 seconds, for example. At the end of timing interval t capacitor 6C1 has attained a voltage sufficient to trigger the UJT 601 which delivers a timing pulse to logic module 73 for causing toggling of flip-flop ICS. Thus the counter output changes to ABC, defining a changed logic state F1.
During logic state Fl, a signal is delivered to power module 75 by the decoder for causing transistors 4Q6 and 402 instead to become conductive, thereby triggering triac 502 to energize signal light YE, as indicated in FIG. 12 by segment 93. Triggering current is also supplied through diode 4D2 for causing continued triggering of triac 508. Hence signal light RN remains energized as represented by segment 95. During logic state Fl, timing potentiometer RYE is effectively connected to the supply potential by transistor 402 for charging the timing capacitor 6C1 at a rate determined by the setting of RYE. The latter potentiometer may provide a timing range of 5 to seconds, for example. In this way, the timing interval, or operating period, t, for signal light YE is preset by adjustment of potenti ometer RYE, just as the operating period t for signal light GE is preset by potentiometer RGE. At the end of timing interval n, the voltage on capacitor 6C1 attains a value which causes triggering of the UJT transistor 601. A timing pulse is thus delivered to the code generator (module 73) for causing change to logic state F2.
Assuming switches 283 and 284 (FIG. 2) to be in the position shown, during logic state F2 transistors 407 and 403 of module 75 become conductive, triggering triac 503 and thereby energizing signal light LN as depicted by segment 97 of the timing diagram. At the same time, triggering current is supplied through respective diodes 4D7 and 4D4 for triggering of triac 508 (RN) and triac 507 (RE) as indicated by respective timing diagram segments 99 and 101. During logic state F2, the timing capacitor 6C1 is charged through timing potentiometer RLN to provide a preset timing interval t constituting an operating period for the concurrently energized signal lights LN, RN and RE of from a few seconds to ten or more seconds, for example. Timing interval 1 is terminated by triggering of UJT 6Ql and change is thus made from logic state F2 to F3.
Logic state F3 defines a timing gap or interval 1 of a short duration, such as a few seconds, following termination of the left turn signal light (LN) during which gap the red signal lights RN and RE remain energized. This permits traffic to completely clear the intersection prior to initiating the next green traffic signal, as is usually desired. During logic state F3, transistor 404 is driven conductive by conduction of transistor 408 (both of module to effectively connect the leftnorth gap timing potentiometer RLNG for charging the timing capacitor 6C1. This pot is preset to provide the desired gap interval. Triacs 5Q8 (RN) and 507 (RE) are triggered to energize signal lights RN and RE (segments 103 and 105, respectively) during the gap interval 1, by triggering current supplied by transistor 404 through diodes 4D3 and 4D8. After capacitor 6C1 times out, the UJT generates another timing pulse to initiate logic state F4.
Operation of the controller during logic states F4-F 7 is analogous to operation during logic states F0-F3, with the decoder of logic module 73 now supplying respective logic signals representative of logic states F4-F7 to control module 77 rather than to control module 75. These two identical modules are identically wired and the controller accordingly energizes signal lights of the opposite traffic phase during logic states F4-F7 in a manner making the timing diagram effectively symmetrical. However, the operating periods I 1 are not necessarily respectively identical with operating periods t -t Thus, during logic state F4, signal lights GN (segment 107) and RE (segment 109) are energized for an operating period, or timing interval, t determined by the setting of potentiometer RGN. During logic state F5, signal light Y'N is instead energized (segment 111) while signal light RE remains operative (segment 113) during this timing interval t, of duration preset by potentiometer RYN. During the succeeding logic state F6, signal lights LE (segment 115) and RN (segment 117) are energized for a timing interval determined by potentiometer RLE, while signal light RE (segment 119) remains energized throughout this interval. Finally, during logic state F7, a timing gap, viz., interval 1 is provided for clearing of traffic, as signal lights RE and RN remain energized (segments 121 and 123, respectively). The timing pulse generated by the UJT to terminate logic state F7 begins the timing cycle once more as it initiates state F0 to repeat the sequence of changing logic states.
f. Special Control Features I. Left Turn Option Control The controller includes certain special control features, one of which is the turn signal option circuitry 39 noted previously. Referring to FIG. 2, turn signal option control involves the provision of switches 253 and 284. When switch 283 is up (as depicted in FIG. 2) the left turn signal light LE is normally operative. When moved down, switch 283 prevents energization of signal light LE. Switch 2S4 similarly functions to control left turn signal light LN. Thus, through operation of these manually actuated switches 283 and 284 (which are preferably positioned on the controller face panel), system operation may be preselected to provide left turn signal operation for both traffic phases, either phase, or neither phase, as desired.
The interconnection of switches 283 and 254 with modules 75 and 77 is shown in FIG. 4 where, by dashed line representation, switch 284 is shown connected to the left of the module terminals and with timing potentiometers RLN and RLNG. When switch 254 is up (as shown), potentiometers RLN and RLNG supply the timing capacitor with charging current from the positive 25 v.d.c. supply as transistors 4Q3 and 404 become respectively conductive. Accordingly, timing of the logic states F2 and F3 defining the left-north signal and left-north gap periods 1 and I is controlled by these two potentiometers.
However, when switch 284 is instead moved to the lower position, the triggering connection for triac 5Q3 (LN) is broken and thus there can be no energization of signal light LN when transistor 403 becomes conductive. In addition, the lower position of switch 254 completes a connection to terminal 4-20 from both terminals 4-21 and 4-22. As a result, as transistors 4Q3 and 404 successively become conductive, current is delivered through 4D5 and through terminal 4-17 as a fast pass signal out to the timing circuit and then in on terminal 6-17 of timing module 81 for charging of the timing capacitor 6C 1 at a relatively rapid rate. This causes accelerated generation of timing pulses for accelerated changing of the logic state defining an operating period for the turn signallight and also for the logic state defining the subsequent timin g gap. Hence, the controller passes quickly through these two logic states (as in a second or two) to prevent an abnormal or erroneous long energization of the red signal lights which would otherwise be normally energized during the left turn and gap periods.
FIG. 12 illustrates the altered timing diagram in response to operation of switches 284 and 283. If switch 254 is operated to preclude energization of the leftnorth signal light, i.e., light LN, the segments designated 97, 99, and 103 are no longer present and a segment 124 traced by arrows instead represents the signal light energization during logic states F2 and F3. Similarly, a segment 124' represents signal light energization during states F6 and F7 should switch 283 be actuated to prevent energization of signal light LE.
2. Police Control Another special control feature is the previously noted so-called police (or manual) control circuitry 47 (FIG. 1). Referring to FIG. 6,'the police control comprises a DPST swtich 681 and normally-open pushbutton 652 which are preferably enclosed in a small enclosure which can be hand-held and connected by cable to terminals J4-11, -2, -5, and -7 (upper left corner of FIG. 2). These two switches are shown in FIG; 6 to the left of the module terminals as they are connected to terminals 6-1, -l9, -2l, and -7 of this module. Switch 681, which may be a toggle switch, is moved from the position shown to enable police, or manual, operation of the controller. When thus closed, switch 651 prevents the timing capacitor 6Cl from charging. Accordingly, the controller remains in the logic state entered prior to closing switch 651. When now depressed, pushbutton switch 682, in conjunction with a capacitor 6C2 and a resistor 6R2, effectively causes a timing pulse to be delivered from this module via terminal 6-18 to the code generator of module 73. The logic state is thereby changed to effect energization of the next set of signal lights. In this way, a policeman or other person may exercise manual control over operation of the signal lights.
3. Synchronizer Referring again to FIG. 2, the synchronizer module 83 is an optional part of the present system but constitutes an important further special control feature of this invention which is adapted to alter the timing of changing of the logic states in response to the presence of an externally generated synchronizing signal for the purpose of synchronizing control of the signal lights with operation of controllers at other intersections or with other events occurring externally of the system. In this way, the controller can be slaved to a master controller.
Referring now to FIG. 7, the synchronizer module 83 is provided with the synchronizing (or so-called sync) signal via terminal 7-9 connected with jack terminal J4- 14, to which the synchronization, or sync, line is connected. The sync signal is, as noted, conventionally ac. line voltage which is usually on" but which is switched off for a few seconds during the controllers cycle of operation.
Terminal 7-9 is interconnected with the gate of an SCR (silicon controlled rectifier) 701 provided for translating, or effectively stepping down, the ac. sync signal to.a low level d.c. voltage compatible with semi conductor circuitry. Similar SCRs are used to advantage elsewhere throughout the controller circuitry for such voltage translation. The anode of this SCR is connected to a pulse-forming circuit including diodes 7D1 and 7D2 and capacitors 7C1 and7C2. This circuit includes a silicon unilateral switch, or so-called trigger diode, 7D3 adapted to trigger and deliver a pulse through capacitor 7C2 when the sync signal drops, i.e., is switched off by the master controller to which the present controller is slaved.
The latter pulse is delivered through a diode 7D4 for setting a flip-flop 125. Flip-flop includes a pair of cross-coupled transistors 702 and 703 which, when the flip-flop is set, become respectively conductive and nonconductive. When transistor 7Q3 becomes cut off, its collector goes high to remove base drive from a transistor 704 which is thereby cutoff, permitting a timing capacitor 7C3 to charge via resistors 7R1 and 7R2 and a potentiometer 7R3 at a rate determined by the setting of this potentiometer. The purpose of potentiometer 7R3 is to provide means for manually preselecting a time delayed response to the sync signal, as will later be apparent.
To one side of capacitor 7C3 is connected the base of a transistor 7Q5 providing an emitter-follower circuit whose purpose is to improve timing accuracy of a UJT timing circuit over a wide range of ambient temperature analogously to operation of the emitterfollower arrangement of timing module 81. Its emitter is interconnected with the emitter of a UJT 7Q6 adapted to trigger after a time delay interval at a predetermined threshold voltage on capacitor 7C3. The UJT delivers a pulse upon triggering for momentarily causing another transistor 7Q7 to become conductive. When transistor 7Q7 becomes conductive, two things occur: first, flip-flop 125 is reset by current flow through a diode 7D5 causing loss of gate drive for transistor 702; and, second, a further flip-flop 127, comprising cross-coupled transistors 708 and 7G9, is set by removal of base drive for 708 through a diode 7D6.
As a result of transistor 7Q8 thereby becoming nonconductive (and transistor 7Q9 conductive), the collector of transistor 708 goes high, causing a diode 7D7 to become reverse biased.
Terminal 7-4 is adapted to provide an acceleration gate signal input to the synchronizer moudule. Preferably, for this purpose, the anode of the yellow-east triac 502 is interconnected with this terminal (as can be seen in FIG. 2). When triac 502 is triggered, an ac. line voltage signal is thus delivered via terminal 7-4 to another voltage-translating SCR 7Ql0 for causing a dc. voltage to be delivered by a voltage divider (resistors 7R4 and 7R5) to ajunction 129. Consequently, the above-described reverse biasing of diode 7D7 permits this voltage to produce an acceleration signal via terminal 7-5 for causing rapid charging of the timing capacitor 6C1 of timing module 81, with which junction 129 is connected via a diode 7D8. This acceleration-signal therefore has the effect of causing the UJT 6Q1 to trigger, producing a timing pulse for changing the logic state.
In essence, the operation of this circuitry is such as to speed up or accelerate the completion of the logic state which is then present when the acceleration signal is delivered by the synchronizer module. The latter logic state is determined by which triac to which is connected terminal 7-4. As noted, this is preferably the green-east triac, i.e., controlling -main street green, since it usually is desired to synchronize controllers along the main thoroughfare. In use, potentiometer 7R3 is set to cause accelerated termination of the green-east signal (occurring during logic state F0) at a time determined by a delay interval following the dropping of the sync signal which will cause traffic to flow smoothly through the intersection. A voltmeter VM (see FIG. 2) or panel light may be interconnected with the sync line, by being plugged into jack J1, to facilitate adjustment of delay potentiometer 7R3 for achieving desired synchronization. Potentiometer 7R3 is also shown connected at jack .II.
It is important to note that the synchronization circuitry is reset, following the acceleration function described above, because of the connection of terminal 7-3 to a triac, (such as 502 controlling yellow-east) which is triggered subsequent to that triac providing the acceleration gate. Triggering of the triac whose anode is interconnected with terminal 7-3 causes a signal to be delivered through a diode 7D9 to the base of transistor 70? which thereby becomes conductive to reset flip-flop 127. The synchronizer circuit is then in readiness for another acceleration function.
The synchronization circuitry of this invention is highly advantageous because normal operation of the controller is not prevented shouldthe sync signal disappear entirely (as through breakage ofthe sync line), fail to be interrupted (as through malfunction of the master controller), become intermittent (as from an intermittent connection), or otherwise become irregular.
If, for example, the sync line should break resulting in total disappearance of the sync singal, the synchronization circuit is normally reset following its usual acceleration function as described above. Since the circuitry is responsive only to periodic dropping of the sync signal, it continues to wait for the reappearance of the sync signal and simply permits the signal light operating period which would normally be shortened (to effect synchronization) to continue for its full preset duration. Thus the controller continues to operate in its pretimed mode, the only difference being that the operating period during which acceleration would normally occur is slightly longer than desired for synchronized flow of traffic.
If, as another example, the master controller fails to periodically drop or interrupt the sync signal, the last drop in the sync signal will have resulted in one trigger pulse from trigger diode 7D3, causing one setting of flip-flop 125, one delayed triggering of UJT 707, one setting of flip-flop 127, one resulting acceleration signal during the operating period (green-est) in which acceleration normally takes place, and then one normal resetting of the sync circuitry. Thereafter, however, the circuitry will continue to wait for dropping of the sync signal. In the absence of that dropping because of the master controller failure, normal pretimed operation of the controller continues.
If the sync signal becomes random or intermittent, flip-flop 127 may be set as described by a disappearance of the sync signal, but could result only in a possible shortening of the operating period (green-east) during which acceleration would normally occur. Thus, while not achieving synchronized traffic control, opera tion of the controller is not substantially affected.
Moreover, total failure of the synchronization circuitry will permit normal pre-timed operation of the controller. Accordingly, whether the sync signal or the synchronizer module be at fault, safe operation of the controller continues, thereby providing fail-safe operation.
The controller may be used as a master controller to which other controllers are slaved for synchronizing operation of the latter. Since the triacs of power module 79 (FIG. 5) supply v.a.c. power to the signal lights, one such triac, such as one of those for energizing red signal lights RN or RE, may be used to supply the 120 v.a.c. synchronizing signal. Thus, the sync signal will be present when the signal lights controlled thereby are deenergized.
g. Flasher Mode Control A conventional clock switch as depicted schematically at 53 in FIG. 2 may be connected with the system for causing ordinary traffic control operation of the controller to be terminated and a flasher mode of operation to instead be initiated. During this flasher mode of operation, the red signal lights RN of the northsouth'traffic phase are periodically energized to provide flashing operation and either the red or the yellow signal lights (RE or YE) of the opposite east-west traffic phase are similarly energized for flashing operation, according to the position of a switch 282 (center of FIG. 2).
Switch 282, preferably positioned on the controller face panel, is moved to the right as shown to select RE flasher operation and to the left to select YE flasher operation. Since the north-south phase is defined as the side street and the east-west phase as the main street, it is seen that, during flasher operation, the side street traffic is always provided with red flasher operation while the main street signal lights may be manually preselected to provide either red or yellow flasher operation. This is advantageous since, by this means, concurrent yellow flasher operation of opposite or intersecting traffic phases, a dangerous control possibility, is precluded. This internal flasher flashes both on the main and side streets simultaneously while an external"
|Cited Patent
|Filing date
|Publication date
|May 24, 1963
|May 10, 1966
|Gen Signal Corp
|Traffic signal controller
|Jun 28, 1965
|Apr 2, 1968
|Tamar Electronics Ind Inc
|Traffic control system
|Oct 22, 1965
|May 21, 1968
|John V. Selzer
|Solid state auxiliary controllers
|Dec 17, 1965
|Dec 3, 1968
|Gen Signal Corp
|Traffic signal lamp control circuit
|Nov 7, 1966
|Mar 18, 1969
|Crouse Hinds Co
|Traffic signal system
|Feb 21, 1966
|Dec 2, 1969
|Gen Signal Corp
|Traffic signal control system
|Aug 16, 1966
|Aug 25, 1970
|Tamar Electronics Ind Inc
|Fixed timing traffic control system
|Jan 31, 1968
|Jul 20, 1971
|Marbelite Co
|Solid-state traffic controller
|Oct 2, 1969
|Sep 14, 1971
|Remote Controls Corp
|Apparatus for digital control of traffic control timers
|May 20, 1969
|Feb 22, 1972
|Remote Controls Corp
|Modular timer for use in traffic control systems
|Citing Patent
|Filing date
|Publication date
|Feb 20, 1974
|May 27, 1975
|Gulf & Western Industries
|Traffic controller employing a digital computer
|Jan 21, 1983
|Jul 24, 1984
|Econolite Control Products, Inc.
|Traffic synchronization device
|Jul 1, 1981
|Jul 31, 1984
|Ralph E. Frick
|State/interval redundant controller system for traffic signals
|Oct 11, 1988
|Mar 13, 1990
|Walker Jonothan P
|Traffic control system
|Nov 22, 1999
|Feb 13, 2001
|Nestor, Inc.
|Integrated traffic light violation citation generation and court date scheduling system
|Nov 22, 1999
|Aug 28, 2001
|Nestor, Inc.
|Traffic light collision avoidance system
|Nov 22, 1999
|Jun 3, 2003
|Nestor, Inc.
|Traffic light violation prediction and recording system
|Jun 6, 2001
|Sep 9, 2003
|John Basinger
|Traffic control method for multiple intersections
|Nov 22, 1999
|Nov 11, 2003
|Nestor, Inc.
|Non-violation event filtering for a traffic light violation detection system
|Nov 22, 1999
|Jun 22, 2004
|Nestor, Inc.
|Video-file based citation generation system for traffic light violations
|Apr 13, 1998
|Jul 6, 2004
|Nestor Traffic Systems, Inc.
|Traffic sensor
|Sep 12, 2003
|Sep 27, 2005
|Nestor, Inc.
|Traffic violation detection at an intersection employing a virtual violation line
|Aug 18, 2004
|Oct 26, 2010
|Light Vision Systems, Inc.
|Traffic light signal system using radar-based target detection and tracking
|Mar 17, 2014
|Oct 4, 2016
|Eberle Design, Inc.
|Systems and methods for detecting yellow trap sequences
|Sep 12, 2003
|Mar 18, 2004
|Nestor, Inc.
|Traffic violation detection at an intersection employing a virtual violation line
|Aug 18, 2004
|Mar 3, 2005
|Hutchison Michael C.
|Traffic light signal system using radar-based target detection and tracking
|Dec 8, 2010
|Jun 14, 2012
|Mark Simpson
|Dynamic Transitioning Between Intersection Controller Traffic Engines
|Mar 17, 2014
|Sep 18, 2014
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|U.S. Classification
|340/931, 340/926, 340/916
|International Classification
|Cooperative Classification
|European Classification


text:
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subset: commoncrawl


text:
Mr. SANTORUM. Mr. President, I congratulate the Senator from Texas, Senator Hutchison, for her tremendous effort in organizing Members to come to the floor to tell the other side of story in Iraq.
It started with a series of e-mails that I received from different people, from constituents to folks who weren't constituents, who complained to me--these are soldiers in-country--that they were becoming frustrated because every day they would be out there on the frontlines in-country, serving, sacrificing for our country and accomplishing great deeds and then would have to turn on CNN and other news shows and read the clips from the American newspapers and see a war being described which they were not seeing. They were not seeing the war as being an IED every day but seeing, every day, hundreds of thousands of Iraqis working with our American military forces to make Iraq a more stable and safe place.
I, along with Senator Hutchison and my colleagues, have decided it is time to start going around the mainstream media and telling the other side of the story.
I came from a press conference downstairs where I had four civilian independent military bloggers. These are people who have been in-country--one is going to be in-country in the next couple of weeks, one who is the wife of someone who is heading to Iraq--talking about the military blog, talking about all of the information that is now populating the Internet, of people who are actually there in-country, telling their stories, people who are making a difference every single day in the lives of Iraqis.
One such person is Captain Jim Bentzley, who is from suburban Philadelphia, who wrote to me a month and a half ago. He said:
The reason I'm writing to you about this mission is because I do not believe that the American public realizes how well we are working with the new Iraqi military. In my own shop, the mission could not be accomplished without the help and, cooperation of my Iraqi troop-employees. Likewise, I help them by guiding them through the U.S. military's logistics system. I'm also trying to educate them past the military logistics by introducing them to some of my civilian-experience and U.S. business logistics practices: lean logistics and six sigma. Efficiency is a new concept for them ..... but I believe I can get through to them so that when we, Americans, leave this place, the Iraqis will pick up the mission seamlessly.
I would like you to visit my operation so that you can see the way we work with the Iraqis and so that the American people can also see. There are a lot of good things going on over here and most of them deal with people and the close relationships that are being formed--this is definitely not seen by America; America only seems to see the darker side of Iraq. Friendships that will last a lifetime are starting here, and they are friendships between former enemies. I realize I've only been here, in Iraq, for a couple of weeks, but already I consider my Iraqi counterparts close friends.
Corporal Mindo Estrella, from Erie, PA said:
I like working with the [Iraqi Army] and teaching them our tactics. I think that they've learned what we are teaching them and one day will be able to take over operations.
Corporal Estrella reenlisted. in the Marine Corps this past October, shortly after his battalion arrived: in Iraq. He said:
I like what I do, It gets rough at times, but nobody made me come out here. I signed the contract knowing what I was getting myself into.
He reenlisted last month. He said he likes what he does. He feels he is making a difference in transforming the country of Iraq.
LCpl Dan Williams said the same thing. He arrived in mid-March and has worked in-country, in Fallujah, to identify lots of insurgents and is working with the people now. He says he is getting the intelligence from the people in the community, where originally they were hesitant to work with them. Now most of the intelligence they are gathering is from Iraqi civilians who realize that it is now in their best interests for their country that they want to fight for to cooperate not with the American military but also with the Iraqi military in rooting out insurgents in their country.
We are making tremendous, positive steps.
I am going to be working, over the next several months, to make sure that the stories of the people who are on the frontline, who are fighting the war in the trenches, have their stories told to the American public and not people sitting in editorial rooms in New York City trying to spin what is going on in the mainstream of Iraq.
For example,
news comes that America has suffered the loss of 2,048 brave servicemen and women in Operation Iraqi Freedom. The loss of any soldier in the cause of freedom grieves us all; especially the parents, wives, husbands and children of each deceased loved one. As elected officials, we don't know these soldiers as numbers, but as people, with hopes and dreams, family and friends. Knowing them as we do, it is hard to imagine the loss of any of them.
As great as the loss is, it can only compound a family's sadness to hear some say that the loss of their loved one was neither for the protection of America or the freedom of man. Yet we hear it regularly. Critics say Iraq posed no threat, as there was no link in Iraq to the war on terror. Or that securing freedom in the Middle East is impossible or isn't worth one American life.
To those who have lost their loved ones, don't believe these critics. Don't let those poisoned words take root in your heart.
As you hear of the 2,048th soldier lost, there is another number that demonstrates the protection of Americans here, and the preservation of freedom around the world. And that number, as best we can ascertain, stood at 450 last month.
Over 450 suicide bombers have attacked in Iraq. That is over 450 suicide bombers who did not strike at America's homeland, did not strike at our embassies, our ships, our civilians around the globe. It is your sons and daughters who have protected America from these 450 plus suicide bombers.
The suicide bomber represents that greatest threat to America, to democracies, to civilized society, and to peace. Stopping suicide bombers from attacking America and our allies is the foremost goal of the War on Terror. Without terrorists, planes, trains, boats, cars, and buses are moving gifts to society. Add a single terrorist, and they are transformed into weapons of mass death and destruction.
With one suicide bomber, a stolen van filled with explosives cost the U.S. Embassy in Beirut 63 lives, including 17 Americans. With one suicide bomber, a delivery truck took out the Marine Barracks in Beirut, costing the lives of 241 U.S. Marines. With just two suicide bombers, a small boat hit the U.S.S. Cole, killing 17 sailors. With just four suicide bombers, the London subway and buses became the final destination for 52 civilians. With just 19 suicide bombers, four airliners made for one of America's darkest days by killing nearly 3,000 innocent people.
The suicide bomber is the foremost weapon of terrorism today. So how can anyone say that 450 ex-suicide bombers in Iraq has not protected American lives?
Critics of this war insist that it is America's presence in Iraq that has created the 450 plus suicide bombers in Iraq. Did America's presence in Iraq cause the attack on the World Trade Center in 1993? Did our presence in Iraq compel terrorist to attack us on 9/11? The answer is no. It was our existence in the world that compelled the terrorists to attack us, time and again. These suicide bombers existed and attacked America before, on, and after 9/11, and well before Operation Iraqi Freedom.
Frankly, I am stunned that after 9/11 that anyone in a position of power would assume the peaceful intentions of one suicide bomber, much less each and every one of the 450 ex-suicide bombers in Iraq.
So I believe that 450 fewer suicide bombers does make America safer, and our brave men and women in uniform serving in Iraq have protected America from these cowards.
On the Marine Corps website is a story about Lance Corporal Dan Williams, a 22-year-old intelligence analyst from Murrysville, PA with the 1st Battalion, 6th Marine Regiment currently conducting security and stability operations in and around Fallujah. Part of Lance Corporal Williams' mission is to piece together fragments of data on terrorist identities, connections, and locations. This information is used to determine where and when to apprehend these individuals, and what type of threat they may face upon arrival. Since his unit arrived in Iraq in mid-March 2005, Lance Corporal Williams and his fellow Marines have helped to apprehend dozens of insurgent supporters and to unearth several weapons caches in the area.
As for this fight for freedom, we now have a democratically-elected constitution in place in Iraq. Will freedom and democracy take root and flourish in Iraq?
We cannot say right now. But, when we laid to rest the 1,500 American soldiers that perished on D-Day in the grave at Normandy, no one could say whether freedom would take in post-Nazi Germany. When we laid to rest those 6,891 fallen soldiers at Iwo Jima, no one could say that militaristic Japan would become a democratic nation. None of those tens of thousands who fought and died in the hot chapter of the Cold War knew that freedom would ever arise behind the Iron Curtain, much less survive. And even here in America, as we buried the 4,435 lost in total at Concord, Lexington, Bunker Hill, Trenton, Princeton, Bennington, Cowpens, and Yorktown, no one could say for certain that a government of, for, and by the people would take. But it did.
Each of those who died in all these battles never knew if freedom and liberty would result from their sacrifice. Rather, they died for the hope and dream that it might exist and flourish, both here and elsewhere for our fellow man.
It is so unfortunate that so often critics of this war fail to tell the stories of success coming out of Iraq; the stories which prove that our U.S. servicemembers are working with the Iraqis to help them to sustain this newfound freedom by helping the strengthen their armies.
The stories of success from our soldiers and sailors in Iraq need to be told. Our soldiers need to know that their bravery and hard work in Iraq is not in vain.
This new chance for freedom in this part of the world is due entirely to the sacrifice of our soldiers and sailors, and their families.
I say to our servicemen and women and your families--Our nation owes you our gratitude, and we honor you for bestowing the immeasurable gift of freedom. We thank each and every one of you.


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24 Dec 2015
The Latest On Aspects In Espresso Machine Reviews
We were researching to cut back on spending, and one way ended up being purchase an espresso machine like the Gaggia 14101. When you purchase a coffee drink each day, it actually starts to add up, so we began researching other options. Obviously, there would be an upfront cost, however the Gaggia 14101 provides professional quality with exceptional tools.
During the cold season he and his friends are regular daily customers of your small caffe,serving kinds of coffee, most known are espresso (short strong coffee), caffe macchiato ( expresso with milk),latte macchiato (big cup of milk with espresso), caffe correttto (coffee with strong grappa),Caffe con panna, caffe freddo and caffe macchiato freddo. Espresso and espresso ristretto would be the most popular drinks.
If you have not looked online or even in major home stores lately, then you may not have seen each of the coffee espresso machines you will find available. Yes indeed; you'll be able to acquire coffee espresso machines and make use of them in the home to make your individual java beverages when you please. However, initially you have to get a much better idea of precisely what is available. Just so you realize, you can find a number of brands which manufacture coffee espresso machines of different sizes and grades. These can range anywhere from $100 to 1000s of dollars. The question is, what re you happy to spend, and which machine should be used in your home?
These machines can be found in various forms. Some will take beans, grind them, measure the correct quantity of coffee grinds and create a cup of coffee. All they need is clean water, electrical energy and, naturally, a reliable supply of pinto beans. They then produce coffee in the press of your mouse. Semi-automatic machines require more human intervention because operator needs to grind the beans separately and measure them right into a receptacle which is then put into the machine. These sorts of machines are commonly seen in many big coffeehouse chains.
What Espresso Machines can perform is to make brewed coffee fresher plus more delicious to you personally. You can get the cappuccino, mocha, latte as well as frapuccino when you like without actually leaving the house. You will also be able to experiment on other flavors for coffeeandchat.com/ coffee and who know you could as well make business as a result. You can build-up your own cafe and serve the freshest and tastiest coffee in a home-made style what exactly ordinary working or non-working people like. However, for now pamper yourself and take this opportunity that having one of these machine will help you to celebrate everyday of your life with the coffee you want.


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Cassidy Davis, a young maiden in the 17th century, was being courted by an older man who went by the name of Wilson Mitchel. He was rich, handsome, and kind. The perfect gentleman. After a brief courtship, they were married in a small church ceremony.
The next night, Cassidy was knitting by the warm fireplace when she was attacked by an unknown and half-starved vampire.
Waking up on her bed the next night, the young wife remembered her death and couldn't understand her resurection. Her husband saw the fangs, and left her.
Newly devorced and almost out of money, the young vampire ran away to the far away town of New Roanoke, where she met Peter, a young and strong man. They fell in love and married.
After Peter was turned into a vampire, Cassidy gave birth to a son, and named him Jeremy. Soon after, a daughter was born. They named her Rose.
Jeremy aged into a child, the exact copy of his father, and Rose turned into a beautiful toddler with long red hair and glowing blue eyes.
They were good years. Sadly, no interesting story stays happy for very long.
Cassidy gave birth to another son, and Peter gave him his name. Around the same time, a newcomer came to New Roanoke.
He went by the name of William, but his first name was Wilson. And he was looking for his wife, and a fast way to reclaim the youth he had lost over the years.
While they slept, Wilson crept onto the Davis property, which was a sprawling Victorian estate with a large green lawn for the children to play on. His sounds woke Peter, and Wilson was caught entering the door.
Before Peter ripped out the intruder's throat, Cassidy recognized her first husband. She begged Peter to let him live, and after some debate, let Wilson move into a guest room.
After a week, Wilson begged Cassidy to change him into a vampire. She declined, and Wilson became enraged. He left the home, and searched his mind for a way of revenge.
He found it by taking Rose.


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When Customer Service Backfires
posted in: Core Happiness Skills, Customer Service, Resilience at Work, Resiliency | 1
Harvard Business Review posted a video about customer service, called "When to disappoint your customers." It is really about strategic trade-offs. It isn't about my theme, customer service from the heart. Here's the link: http://blogs.hbr.org/video/2012/07/when-to-disappoint-your-custom.html Frances Frei argues that you … Read More


text: Definition Edit Software configuration management is " [c]onfiguration control of the software used in the system; e.g., keeping versions updated and maintaining older versions.[1] " References Edit ↑ DOE Manual 470.4-7, at 56. Retrieved from "http://itlaw.wikia.com/wiki/Software_configuration_management?oldid=125506" Ad blocker interference detected! Wikia is a free-to-use site that makes money from advertising. We have a modified experience for viewers using ad blockers Wikia is not accessible if you've made further modifications. Remove the custom ad blocker rule(s) and the page will load as expected. Categories: Definition Software Security Add category Cancel Save


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MSI 890GXM-G65 Motherboard - AMD 890GX, Socket AM3, ATX, DDR3, RAID, SATA 6.0GB/s, USB 3.0Item#: YYI1-CT1999 | Model#: 890GXM-G65
Currently Out Of Stock!
MSI 890GXM-G65 Motherboard Product Details
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( Length:0, Width:0, Depth:0)
Shipping Weight: 2.6500 pound(s)
Click here for full warranty and support information
- MSI logos are registered trademarks of MSI. All others trademarks and copyrights mentioned herein are the property of their respective owners.


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What is JotForm?
JotForm is a free online form builder which helps you create online forms without writing a single line of code. No sign-up required.
At JotForm, we want to make sure that you're getting the online form builder help that you need. Our friendly customer support team is available 24/7.
We believe that if one user has a question, there could be more users who may have the same question. This is why many of our support forum threads are public and available to be searched and viewed. If you'd like help immediately, feel free to search for a similar question, or submit your question or concern.
Removing "Submissions" with large filesAsked by LW on April 29, 2015 at 02:00 PM
In order to clear up space, I am wanting to remove old form submissions with larger file attachments. I don't see anyway to sort by "largest file size". Is there some way to do this so I can go through and remove old form submission which have the largest files attached?
JotForm Support
Unfortunately there is no way to sort your submissions or view them based on the size of files uploads attached to the submission. My recommendation would be to check your forms to see which ones allowed the largest files. Then go through those submissions first.
If you have any further questions, let us know and we will be happy to help.


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|2009-03-27, 08:35
|Link #1
Senior Member
Join Date: Mar 2009
Location: Ohio
Age: 30
[Manga] The Future of Arrancar That Turned Good
So, throughout most of the series, we were pretty much informed that "Hollows are bad". Simply because they are driven by hate and sadness, usually. That, and they also eat the souls of humans. There have been incidents in which "humanity" seems to take back over and they gain a slight bit of control (such as Orihime's brother), but usually, the point of their existence in this universe is to be the antagonist ...
... Until we get into the Arrancar arc. That being said, we meet Nel, Pesche, and Dondochakka. All three of them definitely lean more towards the "good" side of the scale as compared to well ... all other arrancar. Not only these three, but we also have Gantenbainne. Granted, he did fight Chad, he also seems to respect him, and he was kept alive for some reason. Whether he turns out to be good or bad in the end, is up to speculation, but, he was kept alive and healed by Unohana, and something just makes him seem like he might "go good".
However, we run into a problem ere. All of these "people" are still Hollows. They didn't get to their levels of power by just existing. They did it like all other Hollow. First eating the souls of humans, and then eventually eating fellow hollow. Whether they are "good" or not now matters not when you think about their pasts and what they still are. Hollow. They have to eat souls to survive. It's in their nature. So does that mean these "Good" Arrancar can actually stay for long in the story? Can they really grow and develope like the rest of the characters? Or must their fate come to an end like the rest of the Hollow encountered?
I would like to hear what people think regarding this. Please post your thoughts on what you believe the future of these characters are. Or if there could be any others like them in the future. Do you think they will be killed? Are they going to stay for good? Will they be "cured" by Kisuke? What are your thoughts on this?
|2009-03-27, 08:57
|Link #2
floating away...
Join Date: Oct 2007
Location: Beyond World's End
Rukia stated that the "universe" needs a balance, that's why if Quincys destroyed every hollow, it will be the end of the world because the unbalance.
Humanity will generate hollows forever, because hate and sadness will be always in the nature of some humans, then, the issue here is a balance and that Hollows don't mess with humans (that's the reason for Shinigamis to be).
|2009-03-27, 09:04
|Link #3
Transdimensional phoenix
Join Date: Feb 2009
Location: Trash Can
She said it herself. She said "We used to be beasts, but now we've regained parts of our human sides." It might have something to do with the fact that she's a masochist, or maybe she wouldn't let go of something and paid for it with her existence. Perhaps she was eaten by a Gillian and took it over due to her incredible spiritual power.
Or maybe she's just from the Sonozaki family like my WMG on TV Tropes says.
|2009-03-27, 10:39
|Link #5
Senior Member
Join Date: Mar 2009
Location: Ohio
Age: 30
Well, it's true that all hollow can't be destroyed because there would be no balance. Good doesn't exist without evil, and vice versa. So I do agree that hollows will be around for ever, and simply need to be kept "in check", but what about the good ones? Is it possible for them to "join" in the fight with Soul Society? Do their zanpaktou help souls move over in the same way that a shinigami's do? Or is it simply for power?
As for what Arrancar eat ... We haven't exactly seen their true lifestyles, but do know that they CAN still eat souls, simply from observing Yammy. (Or is it Yami?) Whether or not this is necessary or not, is yet to be determined, however, if it is the case that they need souls to survive on, would Shinigami simply let the good ones live then?
|2009-03-27, 10:45
|Link #6
Senior Guest
Join Date: Jan 2009
Location: Athens (GMT+2)
Age: 28
Based on the last episode, c46 quote " execute them as if they were normal hollows". As for the rest of SS, I don't really think there would be a problem with the coexistence of shinigami and arrancar, as long as their swords have the ability to cleanse souls-otherwise they would be just as threatening as the Quincy (speaking of which, Ishida should have tipped the balance and destroyed the world till now, he's killed bagillions of hollows all over the world and everyone's ok with it...)
|2009-03-27, 10:49
|Link #7
Join Date: Jun 2006
Location: Montreal
i think it will turn out to be similar to the vizard. atm the only acknowledged one is berry-tan and the rest are in hiding. if anything the good arrancar might hide like the older vizard. i dont think the whole of SS will accept them BC the history but then again history can evlove to accomodate new changes. the vizard will probablybe left alone for the most part depending on what the vizard will do during the HC invasion.
|2009-03-27, 11:02
|Link #8
~Rock ☆~
Graphic Designer
Join Date: Apr 2007
Location: In The Farplane
yeh i was thinkin taht the good arrancar can start a group like the vizards but exactly how many good ones are there i mean Nell and her two,potentially grimjow iff hes still alive...so who else does that leave
|2009-03-27, 12:26
|Link #9
✖ ǝʇ ɯıqnɾl ☆
Join Date: Feb 2006
Location: Mortuary : D
Well once arrancarized IMHO there is no necessity to consume souls or menos .
As the evolution stops up the ladder and down the ladder . Gillian or Adjucas need to constantly consume souls to maintain there evolution and sanity . The reason why I say this is, if further evolution could be achieved by Hybrid menos Noitora would be the likely candidate . As he is devoid of moral issues and a bit of narcissist he would have continued consumption to evolve further or maintain form . Also Aizen's Arrancar army is a hunting ground for high reatsu souls which can further evolution. In the past 'some' Espada have shown no concern or sense belonging to there espada brethren .
The Future of Arrancar That Turned Good most likely they will turn into lone wolves helping Ichigo .But neither being on Ichigo or SS side.
|2009-03-27, 16:08
|Link #12
Tastes Cloudy
Join Date: Jul 2006
Location: Snake Way
Age: 28
|2009-03-27, 16:29
|Link #13
Hiyori Fanboy
|2009-03-27, 16:30
|Link #14
Senior Member
Join Date: Mar 2009
Location: Ohio
Age: 30
There are a couple characters I would like to see turn good. Stark being one of them. Simply because he's so laid back and doesn't seem to have a truly "evil" side. Just follows orders.
Almost makes you wonder if maybe the Vizard will get together with the Arrancar and teach other things. How to control Hollow/Shingami powers better. Or something.
|2009-03-27, 16:54
|Link #16
Member of DOLLARS
Join Date: Sep 2008
Location: In the magical land of Moonswell pass
Age: 22
I think the arrancar that seem good just are not with SS but against AIzen, they do not like to be controlled so I won't be surprised if they rebel against Aizen after all is said and done, as they might feel that Hollows are treated as nothing as if they have no say in the matter.
|2009-03-29, 15:05
|Link #17
Junior Member
Join Date: Mar 2009
Assuming they get to stick around long enough, they have a few choices.
The most viable of these, it seems to me, is joining up with another faction, such as the Vizard.
While the Vizard are a fairly closed group, they did try to recruit Ichigo, making it plausible that they would accept other allies as well.
I very much doubt that they will have any kind of alliance with soul society, though. But that's probably connected with my suspision of what'll happen after Aizen is dealt with. (Hint: zero squad and the king)
|2009-03-30, 16:52
|Link #19
Member of DOLLARS
Join Date: Sep 2008
Location: In the magical land of Moonswell pass
Age: 22
|2009-03-31, 04:13
|Link #20
King of Beasts
i just hope ulquiorra isn't dead and he turns good...hopefully. It'd be pointless if pretty much all the top espada turned good though. Halibel doesn't look like she'll be turning good for some reason. I agree with Endrance's view on what will happen to her. Barragan seems as if he would sooner eat his own balls rather than turn good. Stark...i guess whichever side provides him with a comfy bed will do.
I still want to see the resureccsion of every espada regardless of what side they turn to.
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SPiD-UP® is primarily a peak performance awareness project created by CSD-Africa to develop high performance consciousness and behavior in Africa. To achieve the objective, there are four main vehicles through which the mission will be delivered.
Training (The SPiD-UP® Mini-College),
Recognition (The SPiD-UP® Recognition program),
Books (The SPiD-UP® Book series),
Web Portal (The ww.SPiD-UP®.com)
A Rationale
It is no secret that the African continent is performing far below its true capacity. This is because its micro components; people are not functioning at full capacity. Driven by the keys of performance (occupational and life performance), SPiD-UP will develop awareness and engender peak performance thinking among individuals who will then influence groups. It will in the end improve human capital cause an overall shift in the output of the continent. High performing individuals make successful individuals that make successful organizations and successful nations.
To accomplish the mission, the project is partnering with individuals and organization who are equally excited about contributing towards a better continent. Join us on this exciting journey.


text:
New Reviewer Rank: 460,873 (Learn More) - Total Helpful Votes: 48 of 59
Classic Reviewer Rank: 82,145
Bodies of Thought: Embodiment, Identity and Modernity by Ian Burkitt
3 of 4 people found the following review helpful:
Think of the Body, October 22, 2005
Growing interest in the consciousness studies is forcing the skeptics to look at it afresh, for it no longer belongs to the New-Ager's domain, alone. This book is a commendable compendium of path-breaking ideas reconstituting our conception of subjectivity. While post-modern sentiments amply spice the text, what should not be missed is the emphasis on body-mind continuum, which runs as an undercurrent, throughout the work.
Justice, Nature and the Geography of Differenceby David Harvey
3 of 10 people found the following review helpful:
An Eye-opener, October 22, 2005
This book is a spectacular down-to-earth attempt to trasnscend positivism as well as Marxism. The very logic of the erudite author's argument alights in a blind alley, where the Heideggerian ambivalence remains the only saviour. This daring milestone in the history of thought would always be an inspiring read.
Savitri: A Legend & A Symbol - New U.S.Editionby Aurobindo Ghose
6 of 6 people found the following review helpful:
Adventure of consciousness, October 15, 2005
Yes, it was originally written in English, it's not a translation from some Indian language. The whole book is one poem, a long poem, one of the longest, they call it an epic. A poem is not meant for the poets only, it can be read by anyone. But it is so difficult to understand? OK, a poem or a song is primarily meant for the ears, so reading aloud is the key. Can it be one page a day? Yes, and then the power and music of the words play magic. The message seeps in by and by.
SAVITRI is the finest substitute for those who can't access the VEDA because of the difficult sanskrit language. As a modern scripture it synthesizes the wisdom of all cultures. So, go for the pure gold;… Read more


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|Jan Lehnardt <...@apache.org>
|Re: Comparison of MongoDB & CouchDB: MongoDB seems better on insert
|Mon, 20 Dec 2010 22:19:35 GMT
Hi Brian, On 20 Dec 2010, at 23:08, Jan Lehnardt wrote: > On 20 Dec 2010, at 23:05, Brian Mitchell wrote: > >> I have verified that CouchDB users love URLs but don't tend to read them because their database is too slow. >> >> (Joking aside, I find it annoying that people can't ever manage to answer things without storming off and writing long blog posts on methods of measurement or simply never actually answering things with any more substance than the things they seem to attack as poor evidence. I do realize there is a large gap here and apples vs. oranges isn't productive, but neither is this.) > > +1 Paul on IRC reminds me that this might have been target at me, funny :) The blog posts are for background which is generally lacking as these benchmarks keep coming up. I did point out why this is a bad scenario for CouchDB and offered an explanation of better scenarios, but I can't go and define your scenario because, well, it's yours. That is the whole point of my stupid benchmarks are stupid argument. I also did offer more information if requested and I am happy to go into the details of why CouchDB performs better under concurrent load if requested. If you are requesting that, can you formulate a question? :) Thanks for your feedback. Cheers Jan --
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text: RT Video/DVD DB /z-wcorg/ DS http://worldcat.org ID 20395780 LA English T1 Legend of rhythm and blues ; Sitdown and listen : the Max Roach story A1 Haydon, Geoffrey., Roach, Max,, Third Eye Films (Firm), Channel Four (Great Britain), Home Video., PB Home Vision PP Chicago, Ill. YR 1984 AB Legend of rhythm and blues (60 min.) talks about the generation of blues in the West Coast. Sit down and listen (60 min.) focuses on Max Roach, one of the performers who emerged from the movement known as bebop.


text:
Choose from Four Options
- $45 for a choice of one spa service ($90 value)
- $85 for a choice of two spa services ($180 value)
- $119 for a package with all of the listed spa services for one person ($270 value)
- $225 for a package with all of the listed spa services, redeemable for two people or one person on two visits ($540 value)

Spa services:
- Gel manicure and standard pedicure with aromatherapy
- 50-minute massage
- Signature facial

Tommi Salon and Spa
The staff at Tommi Salon and Spa pamper clients in an airy space with third-floor views of the center city. Stylists trim tresses beneath broad windows in the salon, which also offers services from coloring and straightening to ornate wedding-day updos. The spa swathes clients in a luxurious, but minimalist aesthetic. Footbaths glow blue, purple, and green along a sleek white banquette with six pedicure stations. Other services, such as facials, massages, and waxing, take place in four private treatment rooms; aestheticians also create custom-blended treatments inside a dedicated Spa Lab.


text: Okay so recently after lurking for quite some time and reading up on HTC Hero 2.1 on this forum as well as various others I decided to slap 2.1 on my Hero. Now half of the complaints that I did read about didn't seem to happen for me, in fact it all seemed to be quite the opposite. Everything was working quite fast and it was just a pleasure to actually use my phone again. Everything just looked so nice. Then came the ultimate test of Mp3 functionality. Which my HTC has become my main MP3 player [yes weak of me but I can't find the charger for my other one ]. In any event I first downloaded last.fm which I used quite often and when I tested it out, it seemed okay at first. Then about halfway through a song it suddenly stopped. I checked my advanced task killer and saw three copies of Last.fm going, so I closed two of them and tried to play again. When I started last.fm again two more instances started up again. This isn't the only problem I noticed with media/music though. When I uninstalled last.fm [after trying it with the standard media player]. I also tried the standard media player after uninstalling last.fm. The same thing happened again, played through some of the song and stopped this time it wasn't halfway. Everything else in 2.1 has been going so awesome, save for this throwback. I was wondering is there anyway to fix this so I could get my music back? Just to make note I don't know much about rooting or all that stuff, so simple words and guides will be helpful. I am not that stupid, but it will make the learning process and actual doing that much easier. P.S sorry about any mistakes, this is my first thread.


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This article is a stub, an article too short to provide more than rudimentary information about a subject. You can help Pro Wrestling Wiki by expanding it.
Darius Carter is an American professional wrestler.
In wrestling
- Signature moves
- Foreclosure
- Welcome To Welfare
Championships and accomplishments
- Tier 1 Championship (1-time, current)
- WOW No Limits Championship (2-times)