text:
|Publication number
|Publication type
|Application number
|Publication date
|Apr 1, 2003
|Filing date
|Jul 27, 2001
|Priority date
|Jul 27, 2001
|Fee status
|Also published as
|Publication number
|Kurt P. Wachtler
|Original Assignee
|Texas Instruments Incorporated
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (6), Referenced by (20), Classifications (34), Legal Events (4)
|External Links: USPTO, USPTO Assignment, Espacenet
The present invention relates generally to the art of semiconductor device manufacturing and more particularly to methods for fabricating semiconductor devices having contoured bottom surfaces.
In the manufacture of semiconductor devices, such as integrated circuits (ICs), multiple devices and interconnections (e.g., circuits) are formed on a semiconductor wafer and then separated or singulated into individual parts or dies. This allows cost savings and reduced handling compared to forming the devices individually. The individual devices are located within corresponding die areas on the wafer with sufficient spacing provided between adjacent devices for subsequent separation operations and the manufacturing tolerances associated therewith. Typically, the devices are oriented in grid style on the wafer, with rows and columns of devices located on the top or front side of the wafer, wherein the devices are formed by multi-step processing involving selective deposition, removal, and/or doping of areas on the wafer surface to build electrical devices (e.g., transistors, diodes, resistors, capacitors, etc.) and connections therebetween.
Such devices may include integrated circuits, micro electro-mechanical structure (MEMS) devices, optical, opto-electronic, and other types of circuits. Photo-lithographic techniques are commonly employed in order to produce high density devices having hundreds, thousands, or millions of components with very small device feature sizes. Once the devices are created, the individual circuits on the wafer may be tested, after which the individual device dies are separated.
The wafers are typically back-ground through chemical mechanical planarization (CMP) or other material removal techniques, prior to die separation, wherein material is removed from the bottom or back side of the wafer, leaving a smooth bottom surface. The back-grinding is employed to provide dies having a desired final thickness, depending on the target application for which the dies are being produced. Separation of the individual tested dies from the wafer assembly is conventionally done by sawing or otherwise mechanically creating scribe lines such as channels or trenches extending completely through the wafer from the top side, which are located in the spacing or gaps between adjacent devices or die areas. In order to maintain the die in the row and column grid configuration, as well as to mechanically support the die during separation, a tape is applied to the bottom surface (and sometimes also to the top surface) of the wafer prior to the final separation step.
Once the individual dies are physically separated from one another, the dies can be removed from the tape, or alternatively, rows of taped components can be packaged for later provision to pick and place machinery. The semiconductor dies may then be assembled into integrated circuit chips, or may alternatively be secured directly onto printed circuit boards (PCBs), substrates, carriers, suspensions, or other mountings, wherein electrical connections are made to one or more electrically conductive bonding pads on the dies.
When employed in an integrated circuit chip, the semiconductor die is mounted onto a lead frame and wires are connected between lead frame leads and corresponding bonding pads on the die using a technique known as wire bonding. Wire bonding uses fine aluminum or gold wires (e.g., 25 μm in diameter), which are bound to the bonding pads through thermocompression bonding or ultrasonic bonding. Thermocompression bonding involves heating the die and the wire to a high temperature (e.g., about 250 degrees C.), and heating the tip of the wire to form a ball. A holding tool then forces the wire into contact with the bonding pad on the die. The wire adheres to the pad due to the combination of heat and pressure from the tool. The tool is then lifted up and moved in an arc to the appropriate position on the lead frame, while dispensing wire as required, where the process is repeated to bond the wire to the appropriate lead on the lead frame, except that a ball is not formed.
Ultrasonic bonding is sometimes used when the device cannot or should not be heated. The wire and bonding surface (e.g., a bonding pad on the die or a lead on the lead frame) are brought together by the tool, and ultrasonic vibration is used to compress the surfaces together to achieve the desired bond. Once the pads are appropriately connected to the lead frame leads, the lead frame is encapsulated in a ceramic or plastic integrated circuit package (e.g., with portions of the leads externally exposed), which may then be assembled onto a PCB by soldering the exposed leads onto corresponding conductive pads on the board.
Recently, Flip-Chip technology has become popular, wherein an individual semiconductor die is mounted directly to a substrate, PCB, suspension, flex-circuit or the like. Bumps (e.g., solder bumps, plated bumps, gold stud bumps, adhesive bumps, or the like) are added to the bonding pads of the die using a process known as bumping. For example, gold stud bumps are formed through a modified wire bonding technique. This technique makes a gold ball for wire bonding by melting the end of a gold wire to form a sphere. The gold ball is attached to the chip bond pad as the first part of a wire bond. To form gold bumps instead of wire bonds, wire bonders are modified to break off the wire after attaching the ball to the chip bond pad. The resulting gold ball, or "stud bump" remains on the bond pad and provides a permanent connection through the aluminum oxide to the underlying metal.
The bumping step is usually performed during wafer processing prior to separation of the individual die from the wafer. However, the gold stud bump process is applicable to individual single dies or to wafers. With stud bumps attached, the die or chip is then "flipped" over, with the bonding pads facing downward, and the bumps are attached to corresponding pads on the board using ultrasonic bonding techniques (hence the name "Flip-Chip"). This is typically done by locating the die face-down on the circuit board, and engaging the backside of the chip with an ultrasonic tool. Ultrasonic energy is then applied to the die, whereby an electrical and mechanical bond is formed between the bumps on the die, and the corresponding pads on the circuit board.
Such Flip-Chip applications have numerous advantages, including shorter circuit connections, lower noise susceptibility, and higher component density. Accordingly, Flip-Chip technology (sometimes referred to as direct chip attach (DCA) or chip-on-board) has been successfully employed in a variety of applications, including electronic watches, wireless telephones, pagers, high-speed microprocessors, hand-held and lap-top computers. Another important application where chips or semiconductor dies are mounted directly onto a circuit is in hard disk drives, wherein all or part of a pre-amp circuit associated with a read-write head is mounted onto a flexible circuit or suspension located just above the rotating disk media using chip-on-suspension (COS) techniques. Such a pre-amp circuit may be formed in a small, ultra-thin die (e.g., the die may need to be thin, in order to clear the rotating disk), which is mounted directly onto the suspension for electrically conditioning signals to or from the read-write head. The physical size of the suspension circuit calls for die profiles on the order of 1000 to 2000 μm, and thickness on the order of about 125 μm.
However, several problems arise in this and other applications, which conventional die fabrication and separation techniques either fail to adequately address, or may even exacerbate. One problem with existing saw cutting and other mechanical die separation techniques is wasted wafer space. Conventional spacing between adjacent die areas in a wafer is about 100 μm or more, to accommodate saw blade widths (e.g., about 25 μm or more), and the alignment inaccuracies associated with such mechanical cutting operations. Where small die are being manufactured (e.g., such as disk drive pre-amp die for a COS application), the relatively large spacing required for saw cut separation results in a large portion of the overall wafer space being unusable. In addition, many applications, such as disk drives, are susceptible to particles generated by the conventional back-grinding and saw cut separation operations. The saw cut and back-ground dies may be coated conformally in order to capture such particulate matter. However, this adds further processing steps and cost to the manufacturing process.
Additional particles may result from friction and slippage of ultrasonic tools engaging with the smooth bottom or back-side of the semiconductor dies, for example, during thermal-mechanical (e.g., ultrasonic) attachment of the die stud bumps to the corresponding pads on the suspension circuit. This tool slippage can create particles of silicon, which may break free and cause defects in the disk drive system. Moreover, the smooth bottom surface of conventional semiconductor dies provides minimal surface area to the ambient air flow around the die, resulting in less than optimal convection cooling capability for the part. Finally, conventional dies having bumps added to the input/output bonding pads, are susceptible to handling damage to the bumps. Consequently, there is a need for improved wafers, dies, and associated manufacturing and fabrication techniques, by which the above mentioned and other problems and shortcomings can be mitigated or avoided.
The following presents a simplified summary in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended neither to identify key or critical elements of the invention nor to delineate the scope of the invention. Rather, the primary purpose of this summary is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later. The invention relates to semiconductor apparatus and methodologies, which advantageously provide for improved device fabrication, separation, assembly, and operation, which finds utility in association with hard disk drives and other applications.
One aspect of the invention provides for creating slim channels or trenches between die areas in a semiconductor wafer, using a directional etch technique, such as reactive ion etching (RIE). The etched channels may be created lithographically, thereby freeing up the extra spacing between adjacent die areas previously wasted to account for mechanical alignment inaccuracy in saw-cut separating the dies. The etched channels, moreover, may be made much narrower than was possible using a saw blade. For instance, whereas conventional saw blades are about 25 μm wide or more, the etched channels can be made about 15 μm wide or less. Thus, whereas conventional spacing between adjacent wafer dies is typically 100 μm or more, the present invention allows die spacings as low as about 15 μm. This, in turn, reduces the wasted wafer space. For instance, in hard disk drive pre-amp circuit applications where small dies (e.g., with lengths and widths on the order of about 1000 to 2000 μm) are created, wafer utilization can be improved as much as about 10% through the reduced spacing between adjacent dies. Moreover, the use of chemical etching to create the channels between dies reduces or mitigates particulate matter previously associated with saw-cutting techniques.
Another aspect of the invention involves providing a contoured surface on the back or bottom side of the wafer, which may be employed alone, in combination with the etched top side channels above, or with conventional sawcut top side trenching techniques. The bottom side contoured surface may be accomplished by any suitable technique such as grinding or etching. Where a dry chemical etch technique is employed, the particles generated by conventional back-grinding can be avoided, and the removal of the bottom side material can be used to expose the etched or saw-cut top-side channels to achieve die separation or singulation. Furthermore, the provision of the contoured surface on the die bottom provides for exposure of greater die surface area to the ambient operating environment, thus facilitating improved convection cooling of the part. In addition, the contoured bottom surface may aid in reducing or avoiding particles generated during ultrasonic attachment of the die to the suspension or other circuit board. For instance, a contoured interface may be provided in an ultrasonic attachment tool, which cooperatively engages the contoured bottom surface of the die to reduce or mitigate slippage during application of ultrasonic energy.
To the accomplishment of the foregoing and related ends, the following description and annexed drawings set forth in detail certain illustrative aspects and implementations of the invention. These are indicative of but a few of the various ways in which the principles of the invention may be employed. Other aspects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
FIG. 1 is a top plan view illustrating a semiconductor wafer with a plurality of die areas in which separate electrical circuits may be formed;
FIG. 2 is a top plan view of a portion of the wafer of FIG. 1 further illustrating several of the die areas and spacings therebetween, together with scribe lines cut into the spacings using conventional die separation techniques;
FIG. 3 is a top plan view of another wafer portion illustrating improved wafer space utilization achieved in accordance with an aspect of the present invention;
FIG. 4 is a sectional side elevation view illustrating a portion of an exemplary semiconductor wafer having individual die areas separated by a small distance according to an aspect of the invention, wherein the wafer is undergoing an initial operation to remove material from the wafer bottom side;
FIG. 5 is another sectional side elevation view illustrating the wafer of FIG. 4 undergoing an etch operation to provide channels on the top side thereof in accordance with an aspect of the invention;
FIG. 6 is a sectional side elevation view illustrating the wafer of FIGS. 4 and 5, having etched channels extending downward from the top side and separating the die areas;
FIG. 7 is a sectional side elevation view illustrating the wafer of FIGS. 4-6, having etched channels and stud bumps extending upwardly from the die areas;
FIG. 8 is a sectional side elevation view illustrating the wafer of FIGS. 4-7, with tape covering the top side and undergoing an etch operation to remove material from the bottom side thereof;
FIG. 9 is a sectional side elevation view illustrating the wafer of FIGS. 4-8, with material removed from the bottom side thereof so as to expose the channels and to separate individual dies;
FIG. 10 is an inverted sectional side elevation view illustrating the wafer of FIGS. 4-8 undergoing an intermediate bottom side material removal operation;
FIG. 11 is a sectional side elevation view illustrating the wafer of FIG. 10 after material has been removed from the bottom side thereof;
FIG. 12 is a sectional side elevation view illustrating the wafer of FIGS. 10 and 11 with a dot pattern of polymer droplets disposed on the bottom side in accordance with another aspect of the invention;
FIG. 13 is a sectional side elevation view illustrating the wafer of FIGS. 10-12 undergoing a selective sacrificial bottom-side etch operation according to the dot pattern for removing material from the bottom side and creating a contoured bottom surface in accordance with another aspect of the invention;
FIG. 14 is a sectional side elevation view illustrating the wafer of FIGS. 10-13 undergoing further sacrificial bottom-side etching for creating a contoured bottom surface associated therewith;
FIG. 15 is a sectional side elevation view illustrating the wafer of FIGS. 10-14 undergoing further sacrificial bottom-side etching for creating a contoured bottom surface and exposing the channels to separate the individual dies;
FIG. 16 is a sectional side elevation view illustrating the wafer of FIGS. 10-15 with a contoured bottom surface on the singulated semiconductor dies;
FIG. 17 is a sectional side elevation view illustrating the wafer of FIGS. 10-16 with a singulated die being removed from the tape;
FIG. 18 is a sectional side elevation view illustrating the singulated semiconductor die of FIG. 17 located on a circuit board or suspension;
FIG. 19 is a sectional side elevation view illustrating the singulated semiconductor die of FIGS. 17 and 18 and an ultrasonic tool with a contoured interface providing energy to attach the stud bumps of the die to the circuit board;
FIG. 20 is a side elevation view illustrating a portion of a semiconductor die with another exemplary contoured bottom surface in accordance with an aspect of the invention;
FIG. 21 is a side elevation view illustrating a portion of another semiconductor die with another exemplary contoured bottom surface;
FIG. 22 is a side elevation view illustrating a portion of another semiconductor die with another exemplary contoured bottom surface;
FIGS. 23a and 23 b are bottom plan views illustrating an exemplary dot pattern for providing a contoured bottom surface in accordance with the invention;
FIG. 24 is a flow diagram illustrating an exemplary method of separating wafer dies in accordance with another aspect of the invention;
FIG. 25 is a flow diagram illustrating an exemplary method of removing material from the bottom side of a wafer to provide a contoured bottom surface according to another aspect of the invention; and
FIG. 26 is a flow diagram illustrating an exemplary method of assembling a semiconductor die to a circuit board in accordance with another aspect of the invention.
The present invention will now be described with reference to the attached drawings, wherein like reference numerals are used to refer to like elements throughout. The invention relates to semiconductor apparatus and methodologies, which advantageously provide for improved device fabrication, separation, assembly, and operation, and which find utility in association with hard disk drives and other applications. Although illustrated and described hereinafter in association with dies for directly mounting on a suspension in chip-on-suspension (COS) fashion, it will be appreciated by those skilled in the art that one or more aspects and features of the invention find application in other situations. For instance, the invention may be applied to integrated circuit manufacturing generally, including but not limited to fabricating dies for direct mounting on boards, suspensions, substrates, carriers, flex circuits, and the like, as well as dies for assembly into integrated circuit chip packages.
Among other features, the invention provides for etching slim channels (e.g., about 15 μm wide) between die areas in a wafer, allowing die spacings as low as about 15 μm, and mitigating particulate problems found in the conventional separation methodologies. The invention also advantageously provides a contoured surface on the bottom side of the wafer to enhance thermal cooling of the die in operation. The contour may be created through patterned or selective etching, whereby particles typical of conventional back-grinding can be avoided or mitigated. The contour further provides for mitigation of particulates resulting from slippage during ultrasonic attachment of dies to circuit boards by facilitating engagement of the contour with a contoured interface on an ultrasonic attachment tool, as well as for improved convection cooling of the die.
Referring initially to FIGS. 1 and 2, a semiconductor wafer 2 is illustrated comprising a substrate 3 with a plurality of die areas 4 located in rows and columns in the top side 6 of the wafer 2. The die areas 4 are illustrated having generally rectangular boundaries 8 within which individual electrical components and circuits are formed on the top side and within the wafer 2 according to known practices, wherein the die areas are spaced vertically and horizontally by spacings 10 and 12, which are typically around 100 μm or more. Scribe lines or channels 14 are saw cut into the spacings 10 and 12 to separate the individual dies 4 from the wafer 2. The scribe lines 14 commonly have a width 16 of 25 μm or more due to the width of conventional saw blades (not shown). In the illustrated wafer 2, the die areas 4 are employed for fabricating small COS circuits, such as hard disk drive pre-amp circuits having, for example, a length 18 of about 2000 μm and a width 20 of about 1000 μm. It will be appreciated that where devices of this size are being fabricated using wafer processing techniques for subsequent die separation, the relatively large spacings 10 and 12 between the die areas 4 result in less than optimal wafer space utilization.
Referring now to FIG. 3, a portion of another wafer 52 is illustrated in accordance with the present invention, wherein die areas 54 illustrated by boundaries 58 have a length 68 of about 2000 μm and a width 70 of about 1000 μm, similar to the die areas 4 of FIGS. 1 and 2. Unlike the wafer 2 of FIGS. 1 and 2, however, the present invention facilitates improved wafer space utilization by the provision of narrow channels 64 having widths 56 as small as about 15 μm. The narrow channels 64 facilitate improved wafer utilization in the wafer 52 by allowing smaller spacings 60 and 62 between adjacent die areas 54 than was possible using conventional saw cut or other mechanical die separation techniques. For instance, the spacings 60 and 62 can be about 50 μm or less and in one implementation as small as about 15 μm.
In accordance with an aspect of the present invention, the channels 54 extend into the wafer 52 from a top side 56 toward a bottom side (not shown) between the die areas 54, and are formed using dry chemical etching. For instance, one implementation of the invention provides for removing material from the top side 56 to create the channels 64 using a directional plasma etch, such as reactive ion etching (RIE) to create channels having a width of about 15 μm or more with an aspect ratio (e.g., depth to width) of up to about 15:1. In the illustrated wafer 52, the channels 64 have a depth of about 130 μm or more and about 200 μm or less. RIE techniques comprise ion assisted etching which is anisotropic, where the etching is directional. The RIE involves chemical absorption of reactive molecules on the etched surface, impacting of ions on the surface, and physical disassociation of reaction by-products from the surface, which result in an anisotropic directional etch.
The etching process can employ photo-lithographic techniques, whereby the alignment inaccuracies inherent in the conventional mechanical saw cut scribe line approaches are avoided or mitigated, thereby allowing the spacings 60 and/or 62 to approach the channel widths 56. Also, the etching of channels 64 can provide channel widths 56 narrower than previously possible through mechanical sawing. For example, contemporary saw widths are 25 μm or more, whereas etching has been found to achieve channel widths as low as about 15 μm or less. Moreover, channel etching according to the invention advantageously mitigates or avoids particle generation, crack initiation sites and other associated problems inherent in saw cutting.
Referring now to FIGS. 4-9, one implementation of channel etching is illustrated in accordance with the present invention. In FIGS. 4-9, an exemplary wafer 102 comprises die areas 104 spaced from one another by spacings 110, which are about 50 μm or less in the wafer 102, and which can be as low as about 15 μm in accordance with the invention. Thus, as opposed to conventional spacings (e.g., 10 and 12 of FIG. 2) of 100 μm or more, the invention can thus be used to allow die spacings of 90 μm or less. As illustrated in FIG. 4, the wafer 102 comprises a top side 106 and a bottom side 108 with an initial thickness 112 of about 450 to 550 μm. The die areas 104 include electrical circuits or devices (not shown) formed in the areas 104 by known semiconductor processing techniques, and which may be tested prior to the operations illustrated and described hereinafter. The bottom side 108 of the wafer 102 is then subjected to an initial back-grind process 120, which may comprise mechanical grinding, etching or a chemical mechanical polish (CMP) process.
Referring now to FIGS. 5 and 6, the back-grind operation 120 yields an intermediate wafer thickness 112 a of about 150-250 μm. Thereafter, the wafer 102 is subjected to a directional dry etch process 122, such as a reactive ion etch (RIE) to remove material from the top side 106 in the spacings 110 between the die areas 104. The reactive ion etch 122 yields channels 114 having widths 116 as small as about 15 μm, where the channels 114 extend downward from the top side 116 toward the bottom side 108 to reach a depth 124 of about 130 μm, for example. The channels 114 are thus created in the wafer 102 between the individual die areas 104 without generating particles typical with the use of saw cutting. Moreover, the etching process 122 suffers from significantly less alignment accuracy problems than do mechanical (e.g., sawing) techniques. It will be appreciated that the initial back-grind process 120 of FIG. 4 can alternatively be performed subsequent to the formation of the channels 114 via the etch process 122, for example, where the material removal of the process 120 does not cause significant wafer breakage.
As illustrated in FIG. 7, one or more bumps 130, such as gold stud bumps, are next applied to the top side 106 in the die areas 104 using known wafer bumping techniques, in order to provide for electrical connection between the circuits of the die areas 104 and other circuitry, such as circuit boards, suspensions, flex circuits, and the like. A tape 132 is then added to the top side 106 of the wafer 102 in FIG. 8, where the tape 132 comprises a carrier 134 layer 7 and an adhesive layer 136. The tape 132 fixes the relative location of the individual die areas 104 in subsequent die separation operations, as illustrated and described in greater detail hereinafter.
The wafer 102 is then subjected to a back-grind operation 140 to remove further material from the bottom side 108, resulting in a final wafer thickness 112 b of about 125 μm as illustrated in FIG. 9. The process 140 can be any type of material removal operation suitable for semiconductor devices, such as grinding or etching, whereby the channels 114 are exposed through the bottom side 108 (e.g., the final wafer thickness 112 b is less than the original channel depth 124), thus separating or singulating the individual dies. Thereafter, the individual dies may be assembled into integrated circuit (IC) chip packages using wire bonding, or installed directly onto a circuit board, suspension, or the like using ultrasonic attachment techniques.
Referring now to FIGS. 10-23, another aspect of the invention involves creating a contoured bottom or back surface on a semiconductor die or wafer, which may be done using mechanical material removal techniques (e.g., grinding, cutting, etc.) or through etching operations. In particular, the use of selective etching provides such a contoured bottom surface while mitigating particle generation and the problems associated with mechanical techniques. The contoured bottom wafer surface provides better convection cooling than a smooth surface, which improves circuit performance in such applications as hard disk drive pre-amp booster pumps where the die is mounted directly on a suspension (COS), and other Flip-Chip type assemblies.
The etching of the contoured bottom surface may also be used to separate individual dies from a wafer, for instance, where the bottom-side etch exposes the top side channels between adjacent die areas. In addition, a mating contoured surface can be provided in ultrasonic die attachment tooling for mounting the die on the suspension (e.g., or other circuit board), wherein the engagement of the contoured surfaces mitigates slipping between the tooling and the die, and the associated particle generation. The provision of the contoured bottom surface, moreover, can be employed in association with the above mentioned etched channels, in order to provide die creation and separation substantially free of troublesome particles.
In FIG. 10, a portion of an exemplary wafer 202 is illustrated, which is similar in structure to the wafer 102 of FIGS. 7 and 8. The wafer 202 comprises a plurality of die areas 204 having electrical circuits and/or components (not shown) formed therein at a top or front side 206. Channels 214 are provided, which extend from the top side 206 toward a bottom or back side 208 in between the adjacent die areas 204, wherein the channels 214 have a depth 224 (e.g., about 130 to 150 μm) which is less than an initial thickness 212 a of the wafer 202. The channels 214 may be etched as described above using a directional dry etch process, such as reactive ion etching (RIE), or may be provided by any appropriate techniques.
However, as discussed above, it will be appreciated that etching the channels 214 advantageously provides for mitigation of particle generation in the fabrication process compared to conventional saw cutting methodologies. Bumps, such as gold stud bumps 230 are provided on the top side 206 of the die areas 204, in order to provide for electrical interconnection to the circuits in the die areas 204. A tape 232 is mounted on the top side 206 covering the stud bumps 230 and the die areas 204 with a carrier layer 234 and an adhesive layer 236, in order to secure the individual dies in spatial relation to one another after die separation.
As illustrated in FIG. 10, an initial bottom-side etch operation 240 is performed on the bottom side 208 to provide a wafer thickness 212 b as illustrated in FIG. 11. Thereafter, as shown in FIG. 12, a pattern of dots 250 is applied to the bottom side 208, wherein the dots 250 comprise a material typically having an etch rate compatible with (e.g., which may be lower than) that of the wafer 202. For example, the dots may be a polymer material jetted onto the bottom surface 208 in any appropriate pattern and shape according to the desired contoured bottom surface. It will be noted at this point that any appropriate etch resistant material can be used, having an etch rate which may, but need not, be lower than that of the wafer 202, wherein the contoured surface resulting from the selective etching results from the combination of the etch rate and the thickness thereof. For instance, where the dot material 250 is very thick relative to the desired etching on the silicon wafer 202, a material with a faster etch rate may be employed for the dots 250. Referring also to FIGS. 23a and 23 b, the dots 250 may be circular, and disposed in a row and column pattern on the bottom surface 208 with a spacing or pitch 252 of about 25 μm in the illustrated implementation. Any appropriate pattern and shape can be employed in accordance with the invention, whereby selective etching of the bottom side 208 may yield a contoured bottom surface 280, including patterns, spacings, dot sizes and shapes apart from those illustrated and described herein.
Once the pattern of dots 250 is applied (e.g., through jetting or photo-lithographic techniques), an etch operation 260 is performed on the bottom side 208 as illustrated in FIGS. 13-15, wherein the wafer thickness is gradually reduced from 212 b (FIG. 12) to 212 c, 212 d, and finally to 212 e, as shown in FIGS. 13-15, respectively. The combination of the etch rate of the substrate material (e.g., silicon) of wafer 202, and the, etch rate and shape of the dots 250 provides for contouring of the bottom side 208 through sacrificial etching via the operation 260, where the dots 250 are completely etched away when the final wafer thickness 212 e is reached, and wherein the final thickness 212 e is less than the original channel depths 224. In this manner, the selective etch process 260 provides a contoured surface 280 having contoured convex shapes 282 of height 284 and spacings 252 on the bottom side 208, at the same time as exposing the channels 214 to separate individual dies 270, 272, and 274 from one another, as illustrated in FIGS. 15 and 16.
The pattern (e.g., size, shape, spacings, pattern, thickness, profile, etc.) of the dots 250 can thus be selected, as well as the etch rate of dots 250, and the process parameters associated with the selective etching 260, in order to provide a variety of different contoured surfaces 280 on the bottom side 208. Referring briefly to FIGS. 20-22, many different contoured surfaces 280 may be provided in accordance with the invention, including but not limited to surfaces 280 a, 280 b, and 280 c of FIGS. 20-22, respectively, having convex contour features or shapes 282 a, 282 b, and 282 c. For instance, the shapes 284 can comprise conical shapes, semispherical shapes, or any other convex shape.
It will be further appreciated that the contoured surface 280 may include contoured shapes 282 in a variety of patterns, spacings, pitches, etc., whereby interface with assembly tooling and convection cooling may be achieved according to specific design goals for a given semiconductor die product. In this regard, the contoured convex shapes and patterning can be selected, for example, according to one or more design criteria, such as to maximize surface area with respect to convection cooling, and/or to minimize airflow resistance and associated vibration effects (e.g., such as in a hard disk drive application where air flow proximate a rotating disk media can cause vibration of one or more system components, which can be reduced using the contoured surface 280 of the pre-amp booster pump circuit die).
The etch process 260 can be any commercially available chemical dry etch process, whereby the pattern of dots 250 and the etch process 260 can be controlled in order to effectuate the desired final contour. Moreover, the process 260 can be continued after initial exposure of the channels 214, so as to provide for a radius or bevel on the edges of the exposed channels 214, in order to mitigate stress points and reduce cracks in the dies 270, 272, and 274. Furthermore, the etch process 260 can be a non-directional etch operation, whereby contouring of the bottom side 208 may be facilitated by the sacrificial removal of the material of wafer 202 and the droplets or dots 250. It will be noted at this point, that although the wafer 202 is illustrated being contoured via selective etching of the bottom side 208 via dots 250 and the etch operation 260, that a contoured surface 280 can be provided on the bottom side 208 through other means in accordance with the invention. For example, a contoured surface 280 may be ground into the bottom side 208 to provide for advantageous convection cooling improvement, and interfacing with ultrasonic tooling in accordance with the present invention.
As illustrated in FIG. 16, once the final desired die thickness 212 e has been achieved, and the channels 114 have been appropriately exposed from the back or bottom side 208 of the wafer 202, an individual semiconductor die 272 can be removed from the tape 232 by a pick and place tool (not shown) in the direction of arrow 290 in FIG. 17 for assembly into an integrated circuit package with a lead frame (not shown) or directly onto a circuit board, carrier, suspension, or other circuit. As illustrated in FIG. 18, the die 272 is located on a circuit board 300 with the stud bumps 230 aligned with corresponding bonding pads 302 on the board 300.
Referring also to FIG. 19, an ultrasonic assembly tool 310 is then brought into engagement with the bottom side 208 of the die 272 using a contoured interface 312 having a contoured interface surface 314, wherein the surface 314 cooperatively interengages with the contoured bottom surface 280 of the die 272. Ultrasonic energy may then be transferred from the tool 310 to the die 272 to effect a mechanical and electrical connection of the stud bumps 230 of the die 272 with the pads 302 of the board 300. It will be appreciated that the engagement of the contoured surfaces 314 and 280 advantageously mitigates particle generation during attachment of the die 272 to the board 300 according to this aspect of the invention, and further that the contoured bottom surface 280 of the die 272 provides for improved convection cooling capability for the die 272 once assembled onto the board 300.
Another aspect of the invention provides methods for producing and separating wafer dies. One exemplary die separation method 400 is illustrated in FIG. 24 in accordance with the present invention. While the exemplary method 400, and other methods of the invention are hereinafter illustrated and described as a series of acts or events, it will be appreciated that the present invention is not limited by the illustrated ordering of such acts or events, as some acts may occur in different orders and/or concurrently with other acts or events apart from those illustrated and/or described herein, in accordance with the invention. In addition, not all illustrated steps may be required to implement a methodology in accordance with the present invention. Moreover, it will be appreciated that the method 400 and other methods of the invention may be implemented in association with the apparatus and systems illustrated and described herein as well as in association with other systems not illustrated.
At 402, a wafer is provided with top and bottom sides, and electrical circuits are created in individual die areas of the wafer at 404. The circuits can be created using known semiconductor wafer processing fabrication techniques, such as photo-lithography, deposition, etching, ion implantation, or the like, by which electrical devices (e.g., transistors, resistors, capacitors, and connections) can be formed in the wafer. At 406, channels are etched in the top side of the wafer between adjacent die areas. The channels etched at 406 extend into the wafer from the top side toward the bottom side, through removal of material from the top side of the wafer using a dry chemical etch process. For example, a directional plasma etch process, such as reactive ion etching (RIE) can be employed at 406 to create channels having a width of about 15 μm or more, and a depth of about 130 μm or more and about 200 μm or less in one implementation.
A carrier tape is then mounted onto the channeled top side of the wafer at 408. The tape fixes the relative location of individual dies in the wafer with respect to one another during subsequent die separation. In addition, where the die areas have bumps (e.g., gold stud bumps or other types of bumps) on the top side, the tape provides mechanical support and protection of the bumps during subsequent handling. Thereafter at 410, material is removed from the bottom or back side of the wafer so as to separate or singulate individual dies. For instance, the removal of material at 410 can comprise exposing the top side channels to separate adjacent dies from one another. The dies can then be removed from the tape for assembly into circuits or integrated circuit packages. The removal of bottom side material at 410, moreover, can be accomplished by any appropriate techniques, such as etching, grinding, or the like. It will be appreciated that the etching of channels at 406 provides for avoidance or mitigation of the particulate matter generated by conventional saw cut channels, and that the material removal at 410 can advantageously be performed using etching techniques in order to avoid or mitigate the same problems.
Another aspect of the invention involves creation of a contoured bottom surface on a die or wafer. The contoured surface provides for effective or improved heat convection away from the die in operation, and may further advantageously provide a low slippage interface for ultrasonic and other assembly tooling, so as to mitigate particle generation. Referring now to FIG. 25, another exemplary method 500 for separating wafer dies is illustrated, wherein a wafer is provided at 502 having channels extending from a top side toward a bottom side thereof and between adjacent die portions. The channels can be formed in any appropriate manner, including using the above mentioned directional etching techniques, saw cutting, or other methodologies. At 504, a pattern is applied to the bottom side of the wafer using etch resistance material. Any material may be employed, such as a polymer which can be jetted onto the bottom surface, wherein the etch rate of the polymer is lower than that of the semiconductor wafer. Moreover, the polymer can be applied according to any desired pattern, and the material can be applied in droplets of any size and/or shape.
At 506, the bottom side is selectively etched according to the pattern to provide a contoured bottom surface on all or a portion of the bottom side of the wafer. The bottom-side etch at 506 may further expose the channels so as to separate wafer dies from one another. The selective etching of the bottom side of the wafer at 506 can be performed using a plasma to create the contoured surface, for example, wherein a non-directional plasma etch sacrificially removes material from the wafer bottom side as well as from the pattern of polymer droplets in order to created contoured convex features or shapes on the wafer bottom. For instance, a grid pattern of circular polymer droplets can be employed together with a non-directional plasma etch, in order to provide semi-spherical convex shapes on the bottom side of the wafer. These shapes can then be used to interface with ultrasonic tooling during assembly, as well as to provide improved convection cooling during operation of the die circuitry. Any shapes and patterns can be used in accordance with the invention, whereby such advantages can be achieved. A further advantage of the various aspects of the present invention is that bumped, front-side etched, contoured back die can be packaged and shipped while still on the film carrier, thus protecting the gold stud bumps from handling damage.
Referring now to FIG. 26, another aspect of the invention provides techniques for assembling semiconductor dies into electrical circuits, such as circuit boards, suspensions (e.g., using COS techniques), substrates, flex circuits, or the like. An exemplary method 600 is illustrated in FIG. 26, in which a die is provided at 602 having bumps (e.g., gold stud bumps) on a top side and a first contoured surface on a bottom side. For example, the die 272 of FIGS. 18 and 19 includes stud bumps 230 on top side 206 and the contoured surface 280 on the bottom side 208. At 604, a suspension (e.g., or other circuit board) is provided having pads for connection to the stud bumps. In accordance with the invention, an assembly tool, such as the ultrasonic assembly tool 310 of FIG. 19, is provided having a die interface with a second contoured surface. For instance, the interface 312 of FIG. 19 comprises contoured surface 314.
At 608, the die stud bumps are engaged with the suspension pads, and at 610 the first and second contoured surfaces are engaged. Energy is then transferred from the ultrasonic tool to the die at 612 using the contoured interface, whereby the stud bumps are secured to the suspension pads. The first contoured surface on the die can be provided by any appropriate methodologies, including those illustrated and described above wherein patterned etching is employed. The method 600 provides for assembly of the die to the suspension or circuit while avoiding or mitigating slippage between the ultrasonic tool and the die through the cooperative engagement of the first and second contoured surfaces. The reduction in slipping, in turn, reduces or eliminates particle generation typical in conventional ultrasonic die attachment. The various aspects of the invention, such as channel etching, bottom-side etching to separate dies and to create contoured bottom surfaces, as well as the use of a contoured ultrasonic assembly tool interface may advantageously be combined to provide for substantially particle free fabrication and assembly of semiconductor dies, by which the above mentioned problems associated with such particulate matter can be mitigated or avoided.
Although the invention has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art upon the reading and understanding of this specification and the annexed drawings. In particular regard to the various functions performed by the above described components (assemblies, devices, circuits, etc.), the terms (including a reference to a "means") used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (i.e., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the invention. In addition, while a particular feature of the invention may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application. Furthermore, to the extent that the terms "includes", "having", "has", "with", or variants thereof are used in either the detailed description and the claims, such terms are intended to be inclusive in a manner similar to the term "comprising."
|Cited Patent
|Filing date
|Publication date
|May 16, 1967
|Feb 9, 1971
|Texas Instruments Inc
|Method for separating substrates
|Apr 8, 1991
|Apr 14, 1992
|Sumitomo Electric Industries, Ltd.
|Apparatus for fabrication semiconductor device
|Nov 20, 1997
|Feb 6, 2001
|Texas Instruments Incorporated
|Method and apparatus for breaking and separating a wafer into die using a multi-radii dome
|Jan 12, 2000
|Feb 6, 2001
|Micron Technology, Inc.
|Semiconductor die back side surface and method of fabrication
|Aug 20, 1998
|Apr 10, 2001
|Micron Technology, Inc.
|Grinding technique for integrated circuits
|Mar 29, 1999
|Jun 19, 2001
|Texas Instruments Incorporated
|Method of breaking and separating a wafer into die using a multi-radii dome
|Citing Patent
|Filing date
|Publication date
|Nov 1, 2002
|Aug 17, 2004
|Agilent Technologies, Inc.
|Die singulation using deep silicon etching
|Nov 5, 2003
|Feb 14, 2006
|Irvine Sensors Corp.
|Method for creating neo-wafers from singulated integrated circuit die and a device made according to the method
|Jan 10, 2006
|Nov 13, 2007
|Advanced Semiconductor Engineering, Inc.
|Wafer dicing process for optical electronic packing
|Nov 28, 2005
|Oct 13, 2009
|Robert Bosch Gmbh
|Method for producing an electronic circuit
|Jan 29, 2010
|Aug 5, 2014
|Hitachi Automotive Systems, Ltd.
|Connection structure, power module and method of manufacturing the same
|Apr 24, 2014
|Feb 9, 2016
|Infineon Technologies Ag
|Methods of singulating substrates to form semiconductor devices using dummy material
|Nov 21, 2013
|Aug 2, 2016
|Infineon Technologies Ag
|Singulation through a masking structure surrounding expitaxial regions
|May 4, 2010
|Aug 30, 2016
|STATS ChipPAC Pte. Ltd.
|Semiconductor device and method of forming channels in back surface of FO-WLCSP for heat dissipation
|Apr 27, 2001
|Jan 10, 2002
|Kazuo Nishiyama
|Chip-like electronic components, a method of manufacturing the same, a pseudo wafer therefor and a method of manufacturing thereof
|Apr 24, 2001
|Jan 31, 2002
|Kazuo Nishiyama
|Chip-like electronic components, a method of manufacturing the same, a pseudo wafer therefor and a method of manufacturing thereof
|Nov 1, 2002
|May 6, 2004
|Ruby Richard C.
|Die singulation using deep silicon etching
|Nov 5, 2003
|Jul 22, 2004
|Stern Jonathan Michael
|Method for creating neo-wafers from singulated integrated circuit die and a device made according to the method
|Sep 14, 2004
|Mar 16, 2006
|Howell William C
|Separating die on a substrate to reduce backside chipping
|Dec 12, 2005
|May 4, 2006
|Stern Jonathan
|Neo-wafer device comprised of multiple singulated integrated circuit die
|Jan 10, 2006
|Dec 21, 2006
|Advanced Semiconductor Engineering, Inc.
|Wafer dicing process for optical electronic packing
|Nov 28, 2005
|Oct 4, 2007
|Wolfgang Jacob
|Method for Producing an Electronic Circuit
|Jan 29, 2010
|Aug 19, 2010
|Hitachi Automotive Systems, Ltd.
|Connection Structure, Power Module and Method of Manufacturing the Same
|May 4, 2010
|Nov 10, 2011
|Stats Chippac, Ltd.
|Semiconductor Device and Method of Forming Channels in Back Surface of FO-WLCSP for Heat Dissipation
|Mar 15, 2013
|Jan 16, 2014
|Samsung Electronics Co., Ltd.
|Semiconductor chip including heat radiation portion and method of fabricating the semiconductor chip
|Apr 24, 2014
|Aug 21, 2014
|Infineon Technologies Ag
|Methods of Forming Semiconductor Devices
|U.S. Classification
|International Classification
|Cooperative Classification
|European Classification
|Jul 27, 2001
Owner name: TEXAS INSTRUMENTS INCORPORATED, TEXAS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:WACHTLER, KURT P.;REEL/FRAME:012040/0075
Effective date: 20010726
|Sep 26, 2006
|Fee payment
Year of fee payment: 4
|Sep 22, 2010
|Fee payment
Year of fee payment: 8
|Sep 24, 2014
|Fee payment
Year of fee payment: 12


text: food safety What the listeria outbreak in Colorado cantaloupes reveals about our food system By David Hill Mar 7, 2014 CPR News Two reporters who covered the deadliest food-borne illness outbreak in modern American history share their food safety tips in a new book. Read more Hide Take CPR With You Wherever You Go Stay connected to CPR while you're on the go, with the free Colorado Public Radio app for smartphones and tablets. Get details CPR Explores Colorado News and Stories Thanks to Member Support Join Today

subset: commoncrawl


text:
Adoption requests → Uberstrike Wiki
What is your username?
Please link to the wiki here: uberstrike.wikia.com
How many edits have you made on that wiki?
How many days/months have you been editing there?
9 to 10 Months
On the Special Pages -> Special:ListUsers when was the last time an admin edited, and who was it? Last update by an admin was July 13 2011 at 19:23 and the admin's name was Dr Snake
Any other information:
I am number 1 on the leaderboard for the Uberstrike wiki, I have made the most edits to the wiki out of everyone plus I'm at the wiki everyday constantly adding things.


text:
The following post was written by Alex Sebuliba. Enjoy!
There is no doubt that London is a fantastic city to visit, regardless of whether you're visiting from a different country or a Brit from a different part of the UK. Tower Bridge, the Shard, Hyde Park, Piccadilly Circus and Covent Garden are just a few of the numerous tourist attractions that draw millions of people to London each year.
And while all capital cities are known for and expected to have higher prices, with shopkeepers and business owners looking to take advantage of the tourist trade, wouldn't it be fantastic if you could have a holiday in London on the cheap?
Well, it's not impossible! Follow our tips below and you can visit one of the greatest cities on earth for a lot cheaper than you probably thought possible.
Where to sleep
The first consideration that most holidaymakers make about visiting a new place is how they're going to get there, when really it's accommodation that can be the most expensive segment. While many holidaymakers still choose to stay in a hotel, did you know that you can make considerable savings by staying in a self catering apartment?
If you're travelling in a group, an apartment can be a fun, inexpensive place from which to base your trip, as instead of being confined to hotel rooms you can enjoy a communal living space, while saving a great deal by cooking most of your meals in the kitchen.
Where to shop
Shopping in London, even for the basics, can be very expensive. But if you're just looking for a snack, a drink or some food that you plan to cook in your apartment, then you can save a small fortune by opting to shop at the national supermarkets such as Tesco, Sainsbury's or Morrisons. As these are national chains they set prices on a national level, meaning you don't pay a mark up just for choosing to buy in central London or from the shop owners who are fully aware that they can take full advantage of tourists with their ridiculously high prices.
How to get around
The London Underground is the oldest underground railway in the world, and this year it celebrated its 150th birthday. You'd think, with it being so old and, at busy times, uncomfortable, that it might be fairly cheap. Wrong. As a general rule, taking a bus is a much cheaper option for getting around London.
The city's bus network is extensive, and some buses run all the way through the night. The TFL website allows you to find which bus you'll need and, what's more, the top deck of a red London bus can be a fantastic vantage point from which to view the sites and do some people watching.
If you do have to take the tube, then consider investing in an Oyster Card – for a £2 charge you'll be able to top up your card and enjoy cheaper fares every time you're in the city.
Don't get caught in the trap
Every big city in the world has its share of tourist traps, and London is no different. If you know you're heading to a trap, such as Piccadilly Circus, take a bottle of water with you – don't choose to buy one when you're there as the likelihood is that you'll be ripped off.
Additionally, consider alternative ways to see things. The Shard, which opened earlier this year, charges £25 for an adult to enjoy its viewing platform. But you don't need to go that high to enjoy great views – the view from Primrose Hill, or Greenwich Park, can be just as breathtaking if you're there at the right time of day – and they won't cost you a penny.
How about you all? Have you ever been to London? If so, did you find that it cost more money than you expected?
How did you save money?
Share your experiences by commenting below!
***Photo courtesy of http://www.flickr.com/photos/timmorris/3103896345/sizes/m/in/photolist-5Jhhfe-61cFWM-61cG1F-62aLAf-62zuBt-62zzu


text:
Prices, specials, features and availability subject to change.
Contact for details
At Hawthorne Midtown (formerly Arden Woods), you will find the perfect blend of convenience, style and value. Our unique loft-style town homes blend the privacy of single family living with the convenience of multifamily access and amenities. Though you're in the heart of Raleigh, NC, nature is right outside your front door. Take your dog around our pet-friendly grounds. Relax and enjoy the peaceful views on your roomy patio or balcony.
Pets Accepted. Weight Restriction. Breed Restriction. Call for service animal policy.
184 units
Check Availabilityor call
Nice place to live; very unique floor plan layouts. Peaceful and reasonably priced for the location. The staff Read More is very friendly, too!
February 05, 2016
We appreciate your feedback and are glad you enjoy living here!
The apartments are very roomy and the Arden Woods staff very supportive. A friendly and family oriented commun Read Moreity.
January 23, 2016
Thanks for taking the time to review our community! We're glad you enjoy living here!
Great place to call home with friendly staff and the perfect location. I really enjoy their floor plans as we Read Morehave no upstairs neighbors!
June 27, 2017
Quiet,neighborhood feel, residents and staff are respectful
July 21, 2016
The apartments are smoking apartments, so those of us who do not smoke, have apartments bumped up to those who Read More do. We all share the same vent. Therefore all of our clothes and belongings smell like old cigarette smoke. If there is more than one car in your family or if there are roommates, then someone will be driving around looking for a parking spot, or parking on the street. Neighbors are always nice!! Management changed in the last year, and things have gone down hill.
July 17, 2016
Monday: 9:00am-6:00pm
Tuesday: 9:00am-7:00pm
Wednesday: 9:00am-6:00pm
Thursday: 9:00am-7:00pm
Friday-Saturday: 9:00am-6:00pm
Hawthorne Residential Partners, Inc.
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text:
May 30th, 2017 — DIY
Got a row of hidden text on your Miata's KGW cluster? This will fix it.
April 2nd, 2017 — DIY, Stormtrooper (06 MX-5)
Stormy's faded orange soft top gets a bit of attention.
February 6th, 2017 — DIY, Stormtrooper (06 MX-5), Wrench Turning
Got an oily fluid in your 3rd generation Miata that needs changing? This guide will help you.
September 13th, 2016 — DIY, Interior
This is one part of the bikini top that I've never taken pix of. And in… what, 5 years? I've never fixed it. I am ashamed. When you cut off the end off the soft top, you're left with this jagged metal edge. There's nothing to cover it. No caps or anything. Actually… I think […]
May 13th, 2016 — DIY
Far too many words and pictures about gluing some mesh into Sharka's extractor hood vent.
October 26th, 2015 — DIY, Wheels
revlimiter learns to work on wood. A bunch of shift knobs and a steering wheel get restored over a short six weeks.
September 22nd, 2015 — DIY, Engine
Sharka's Garage Vary hood has both an extractor vent and cowl induction. That's no good. Something needed to be done.
August 9th, 2015 — DIY, Elise seats in a Miata
Another post on Elise seats? Yeah. They just keep coming.
Sharka is complete and back home! I wasted no time tearing body panels off again and doing a new project.
June 8th, 2015 — Bucky (01 MX-5), DIY, Repaint
Bucky gets some attention and modification.


text:
common - The Bitch In Yoo (Original De - Cool Common Collect MP3
Download this track for free - http://DIRECTDOWNLOADNOW.INFO common - The Bitch In Yoo (Original Dem - Cool Common Collected Bootleg.
This is the Havoc (of Mobb Deep) remixed version of Common's incredible diss of Ice Cube and Westside Connection. Havoc on the hook as well.. according to ...
common sense - the bitch in yoo (full demo version 1996) MP3
Stretch & Bobbito Show WKCR 89.9.
Ice Cube and Common Talk Squashing Their Beef and Barbershop: The Next Cut MP3
Back before the days of Twitter fingers and memes, rap beef was fought on wax. When Common released his instant-classic 1994 track "I Used to Love H.E.R.," ...
Common - The Bitch In Yoo (Screwed) MP3
Jedediah Bila.
Dj rock raida ft common bitch in yoo MP3
Ice Cube vs Common | West Side Connection vs Common | East vs West | Rap BEEF |Full MP3
In Common's song "I Used to Love H.E.R.", the rapper partially blamed hip hop's change from pro-black music to street music on its domination by West Coast ...
Common-the bitch in yoo {mixed with diamond d intro MP3
common the bitch in yoo mixed with the the intro off diamond ds stunts blunts and hip hop. made and recorded with virtual dj.
Common- Bitch In Yoo[NAPISY PL] MP3
Tłumaczenie wykonane przeze mnie . Zapraszam do oceniania, komentowania czy subskrybowania mojego kanału. Pozdro ;)
Common Sense- Bitch In Yoo [Ice Cube Diss][Screwed] MP3
The Bitch in Yoo! c 1996 lol cube got owned on this fuck u if u dont like it kill ya self also if u aint a screw up click fan exit the fukin; page real talk peace stop ...
Common Sense - I Used To Love H.E.R. (Instrumental) [Track 2] MP3
The Instrumental Version of Common's album "Resurrection". (Doesn't have "Book Of Life" or "Pop's Rap") I couldn't find the cover for it so I just added "The ...
Jeru Tha Damaja's Ya Playin' Yaself (Common Sense Mix) MP3
Jeru Tha Damaja's Ya Playin' Yaself over Common's The Bitch in Yoo. NO COPYRIGHT INFRINGEMENT INTENDED!
Common - Come Close (ft. Mary J. Blige) MP3
Mellowbeat Seeker https://facebook.com/mellowbeatseeker https://instagram.com/mellowbeatseeker □ Common https://www.thinkcommon.com ...
UNDERGROUND CLASSICS NU MIX ( 30mns ) MP3
30mns Made in a middle of night during summer 99. Recording on MD, 2 MK2, Vestax PMC03A. - INTRO - Da Youngsta's / If i had a milion - Special ED / Freaky ...
Jet Fly JoshuaGibson-Freestyle off Common Beat MP3
DJ Nu-Mark's Vinyl Collection - Crate Diggers MP3
Subscribe to Fuse for all our music coverage: http://bit.ly/fuseSub See all of the Crate Diggers: http://www.fuse.tv/shows/crate-diggers DJ Nu-Mark's collection of ...
Common - Invocation - Bohemia After Dark MP3
NEW Channel! Come Subscribe to Bohemia After Dark's NEW Channel! We will be unlocking more of the music vault!


text:
View more products from this designer >
Anatomie's Italian-fabric is easy to pack, light-weight yet durable. Fabric: 100% polyester (bubbles) Vuelta Italian fabric : 85% polyamide 15% elasthane
Designer Description
The brainchild of Kate and Shawn Boyer, Anatomie, is a designer fashion brand. The collection was created with today's travel women in mind and encompasses the areas of high-performance wear to modern designer travel wear, as well as sportswear. Kate describes her creations as sophisticated and sexy, just like the women who wear them. Anatomie's collection draws inspiration from the most highly-regarded European fashion houses, and is designed to flatter the female form in a way that bespeaks class, elegance and style.


text: Package: wnpp Severity: wishlist Owner: Alastair McKinstry <email@example.com> * Package name : cmor Version : 2.0 Upstream Author : Charles Doutriaux <firstname.lastname@example.com> * URL : http://www2-pcmdi.llnl.gov/cmor * License : "Unrestricted" (BSD-like ?) Programming Lang: C, python, fortran Description : Climate Model Ouput Rewriter The "Climate Model Output Rewriter" (CMOR, pronounced "Seymour") comprises a set of C-based functions, with bindings to both Python and FORTRAN 90, that can be used to produce CF-compliant netCDF files that fulfill the requirements of many of the climate community's standard model experiments. These experiments are collectively referred to as MIP's and include, for example, AMIP, CMIP, CFMIP, PMIP, APE, and IPCC scenario runs. The output resulting from CMOR is "self-describing" and facilitates analysis of results across models. Much of the metadata written to the output files is defined in MIP-specific tables, typically made available from each MIP's web site. CMOR relies on these tables to provide much of the metadata that is needed in the MIP context, thereby reducing the programming effort required of the individual MIP contributors. -- System Information: Debian Release: 5.0.4 APT prefers stable APT policy: (500, 'stable') Architecture: powerpc (ppc)


text:
9th place in Reception
Arezzo, Italy
Andrea CorsiView Profile
This photograph, taken by Andrea Corsi, was awarded 9th place in the Reception category for the WPJA's 2015 Q3 Photography Contest.
Judges Comments
- Just a great scene and strong moment – this felt like a scene from an opera. The photographer picked the right composition – stepping back and allowing them to be small in the picture – made for great impact in color and in light.
- This photo is almost too perfect. The moment itself is undeniably on target as Champagne flies upward against the bride's recoil, beneath a chandelier that seemingly drips from the ceiling. The light, color, setting and composition bring it all together for the viewer's pleasure.


text:
Site Navigation
- Home
- Courses
- Applying to ACU
- Alumni
- Giving
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- International
- Library
- About ACU
- Current Students
- ACU Staff
Student Administration
Issue 5
15 February 2013
Summer B Timetables
Visit Class Timetables for more information.
Semester 1 2013 Timetable
Click here to access the Semester 1 2013 Timetable for all campuses
Change request spreadsheets have been forwarded to all Schools. Timetabling Policy and Procedures states that changes to the Published Timetable can only be made in response to exceptional circumstances.
Should any change requests be made, they must include the reason for the change as well as HOS endorsement. This endorsement should appear in the appropriate column of the Change Request Spreadsheet.
NOTE Where the reason for the change is not in accordance with the circumstances listed above, the change request must also include:
- an explanation of why the change was not identified in the Draft/Provisional timetable phase and
- accompanying written (email) approval from the Head of School, otherwise Timetabling staff will be unable to consider actioning these changes.
Where change is approved:
- the change will be factored into vacant slots in the timetable
- consequential changes to classes already scheduled will not be made in order to accommodate such changes.
Tutorial Direct
Should Schools make any timetable changes that de-allocate students from their classes (eg time, day, type of class) it is the responsibility of the School to advise affected students via email and/or other notification.
Activity Utilisation Reports
These reports show the comparison between predicted and actual enrolments in each unit being offered by a Faculty. Timetabling will begin to forward these to Schools in the coming weeks and Schools are asked to respond accordingly to the issues raised in the reports so that appropriate action can be taken.
Web Data Collector
Please remember to refer to the User Guides available on the Web Data Collector website for assistance with submitting data for Semester 2 2013. Should you experience any difficulties, do not hesitate to contact Timetabling.
15 February
Tutorial Direct Forced Sort
18 February
Web Data Collector Stage 1 opens to TLOs
22 February
Autumn and Winter Timetables published
25 February
Semester 1 2013 commences
11 March
Web Data Collector Stage 1 closes
13 March
Web Data Collector Stage 2 opens to TLOs
15 March
No further changes to Semester 1 Timetable
22 March 2013
Stage 1 check spreadsheets due
25 March 2013
Web Data Collector Stage 2 closes
3 April 2013
Allocate Staff and Check Details spreadsheets sent to TLOs
17 April 2013
Allocate Staff and Check Details spreadsheets due
Web Room Booker (WRB) and Ad Hoc Room Bookings
Web Room Booker is now available for 2013 bookings into non-teaching spaces. Please refer to the WRB user guide Staff/Tools & Services/Room Bookings Online (How to Book a Room) for more information and advice. Assistance is available from TE&R and Campus Operations staff. WRB is available to all staff with an ACU log in.


text:
A Centre for Contemplative Spirituality, the Quiet View is rooted in Christianity but welcomes people of all faiths or none. In an area of outstanding natural beauty, the garden is approximately 2 acres in east Kent, surrounded by rolling countryside.
It has been designed to provide secluded quiet 'rooms' for stillness and reflection and people in need of spiritual refreshment are invited to book a retreat individually or as a group. There is a variety of indoor spaces too, including a large yurt that boasts a log-burning stove that provides warmth and cosiness on cold or wet days.
Book a space to follow your own programme or join in our Programme of Events.
Taiji Qigong is taught by Melanie French who writes 'The practice of Qigong essentially combines graceful movement, meditation and regulation of the breath to enhance the flow of Qi. Qi is the vital life force energy within the body, which aids the immune system and boosts the blood circulation. Qigong is a component of Traditional Chinese - Energetic Medicine that promotes the powerful healing energies of Heaven Qi (Yang) and Earth Qi (Yin), to naturally harmonize the mind, body & spirit.' If standing is difficult for you it is possible to practice sitting down.
Brother Martin is an Indian Benedictine monk from Shantivanam, Father Bede Griffith's Ashram in South India. Br Martin will speak of his mission to further Father Bede's vision of Christian/Hindu dialogue and to 'search for the truth at the heart of all religions.' The day is will include opportunities for questions, discussion and silence. Donations are invited for Br Martin's social projects in India and the work of the Quiet View. Vegetarian lunch and refreshments are provided. Please book with Lizzie.
Our Quiet Yoga class continues on Wednesdays mornings. They take place in the Yurt and are led by qualified teacher, Sue Hodgkins. These classes are gentle, mindful and essentially spiritual. Please book with Sue - email@example.com There is a 9.30 class starting back on 4th January 2017 and some places free in the 11am class beginning n 25th January.


text:
Mercedes-Benz S500 4MATIC Questions
Get answers to questions about your Mercedes-Benz S500 4MATIC at RepairPal. Find solutions, diagnose problems and get back on the road.Refine by vehicle
on dash wont work.the headrest and other buttons wont work either
Bought 2003 s500 4matic
Car was very low on all 4 wheels, owner said it needed back air shocks. Dash says "car too low"
Took it to a mechanic, they said suspension compressor and suspension relay don't work. They also said it could be something else, since computer scan doesn't let them go past that point.
Should I change the relay first? Could it be something else?
Where are the suspension compressor and relay located on the car?
What do you advise I do first?
there was a recall in 06, can I still get it replaced?
tail light seems to have a loose wire or something
Everyday i have issues either starting the car or turning the key. Sometimes i unlock the car and put the key in the ignition and it wont turn or just takes a while before it can and then sometimes it will turn but does not start up. What could be the problem?
I tried 2 new batteries and no power to car at all.
It takes a few attempts to start on occasion. The battery and alternator are good. Most times it starts and runs fine. Also, the car once died while waiting for a stop light. Then it started fine right after that. Could it be the grounding cable or some other connection? Suggestions on potential problems. Thanks.
I brought it to delray automall to fix and they said that they replaced the resistor blower motor. The same problem is still happening and now won't come on at all. Could you please advise me on how to tell if they even changed the part and the location of it. I think that it's under the pass. front dash but I want to make sure before I start to take the thing apart. Thank you,
when I use my automatic key to lock the doors fog lights flash, alarms are going off not sure what's happening.
At oil change, what type and viscosity should be used?
lights, music, horn and heat works but it wont start
it wont turn on or crank over but everything works
Now all I see is "check engine" on the dash.
when i start blower then compressor is on.and ac switch(on off)is off.what reasons.pls help me.
Heat stays on and become very hot.
cant shift out from parking. can not drive at all
please describe how to replace a faulty elements
all my electrical is going haywire and screen flashing display not good. lights,door locks, ignition,
I am trying to retract the calipers to replace front rotors, brake pads and sensor. I wanted to make sure no errors comeup when I do this and I dont want to lose my fingers due to the caliper crushing my hand. Can someone help?
Recently I reloaded my CD changer which is housed in the trunk and when I turned on the audio device, it did not recognize the CD Changer. What are my options to this dilemma?
it is a4matic s 500 automatic and i see no warrning on the instrument and only tyre pressurer monitor indicats and indicator light is on i need un idea
i dont see any warrnig only i see tyre presser monitor and indicator light i need help
How much for a 52000 mile checkup?
The manual indicates to remove the screw securing the battery and remove the battery support and bracket. Where are these two items located as there is no apparent screw / bracket on the top side of the battery. However, the battery cannot be moved and is obviously locked in place. There is also no obvious screw or bracket looking from underneath the car as well.
the car won't start some times, the code showed bad CPS


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In today's episode of the iOS Pulse, Jared brings you his review of Space Frontier. a take on the Sim City genre in space. Enjoy!
We are still hoping for a lot of feedback on the show. Tell us what you like, or dislike about the iOS Pulse! Stay tunes for a Touch of Gaming podcast on Tuesday, then 2 more iOS Pulses on Wednesday and Friday! Podcast overload! 🙂
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WordPress adds a number after my post name in Permalink
When I save a post wordpress adds a number at the end of postname in the slug or permalink.
For example I have setup my site to use
after saving or updating a post my URL becomes
This number could be any digit from 1 2 3 4 I dont have many posts yet so I am not sure and all my post slugs have one common last word in the permalink xyz-OneCommonWord abc-OneCommonWord or def-OneCommonWord. These become xyz-OneCommonWord abc-OneCommonWord-2 or def-OneCommonWord-3
I read that there is some problem using category and postname together so I choose Month and Name format but the problem is persistent. I update the posts and its the same URL with a digit again.
How I can stop this behavior? Is this a well known issue?
- The topic 'WordPress adds a number after my post name in Permalink' is closed to new replies.


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If you are going to buy their sunglasses on chi flat iron, I advise you not to. Ebay is very picky with these items and they all are fake from china, Heres how I know. I sell these on ebay and get then at a very low price. I get them from Flordia not China. There other products maybe ok because they aren't on ebays list for counterfiets. If you sell these on ebay they will suspend your account. trust me it took me two years to find a decent wholesale site and have gotten suspended on ebay. Hope I helped you.
Honestly dont care if you believe me or not...my point is I'm trying to tell him they are fakes. The merchandise I have has nothing to do with his post, I was stating a point.
We prefer OEM orders and we are actually an OEM supplier, many of famous brands actually comes from the producer of our country but we do not provide the brand, we produce orders only.
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5th Ballarat Cubs Melbourne Cup Night
5th Ballarat Cubs ran their very own "Melbourne Cup" challenge night. The cubs applied their creative skills by making Hobby Horses and then used their athletic skills in racing their 'nags' around the outside of the hall. The Cubs had to decorate their horse heads, nail them to their horse and screw on the wheels. All sorts of show ponies, race horses, draft horses and even a Robot Horse were created.
At the Races there was a couple of horses that needed to visit the vet to have their heads re attached. This just added to the fun of the evening!
Special thanks to our parent helpers for the evening.
Janine and Shane


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Designing and Building Practical Household Water Supply in the Mountains of Southwest China
Harrell, Stevan
Morgan, Geoff
MetadataShow full item record
Harrell and Morgan will discuss bringing household water supply to poor areas of China. They will highlight a case study from Southwest China, beginning with local conditions, and then moving on to consider the specifics of the effort: how the project was organized, what was accomplished, the problems they encountered and how they solved those problems. Finally, they will conclude the talk by discussing the factors of success and failure they encountered when building small-scale household water systems.
- The Water Center [316]
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Showing items related by title, author, creator and subject.
Developing a Consensus on the Impacts of Climate Change on Water Resources: a Puget Sound, Tri-County Perspective Palmer, Richard (University of Washington Water Center, 2007-02-14)Palmer will lay out the goals of this talk: 1. Provide accurate estimates of regional water supply and demand for planning. 2. Establish the need to include climate change in regional water supply planning. 3. Shift a ...
Challenges in Water Management: Science, Engineering, and Policy Steinemann, Anne (University of Washington Water Center, 2004-04-20)Steinemann will discuss the challenges of water management. She will describe four case studies, each in three parts (problem, project, lessons): 1. Interstate/State (ACT-ACF "Tri-State" Water Wars). 2. State/Regional ...
Water Security in the Euphrates-Tigris Basin Lorenz, Frederick Michael (University of Washington Water Center, 2009-04-07)In a time of international tension and insecurity, water will become increasingly important, particularly in the arid lands of the Euphrates-Tigris. One of the security challenges, not often discussed, is the long range ...


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The Rocket Into Scouting program is designed to take our recruiting efforts to new heights. With a focus on fun, this program invites families in our community to experience the adventures that only Scouting can offer. The program leverages an activity that kids love (building and launching rockets) while showing parents that Scouting will foster their child's creativity, initiative, and sense of wonder.
Sign up for Scouting by finding the pack/troop/unit nearest you! https://beascout.scouting.org
This Fall, each of the four District's in Five Rivers Council will host an event where families will have a great time designing, building, and launching their model rocket TOGETHER. Keep an eye on the events calendar for the event in your District and then mark your calendar!
Call your unit leader, District Executive or Commissioner or call the Scout Shop and Service Center for more information: (607) 796-0699 - Happy Scouting!
Website sponsor
Five Rivers Council is supported by


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One owner since 1991 away garage kept never winter driven. Many up dates. 5.7L V8 with HP cam, aluminum trick flow heads with 202 valves and 1.6 roller rockers ,Lingenfilter intake with dual cat converters,3 inch exhaust with SLP stainless mufflers. Stall torque converter and transmission has been built. Aluminum drive shaft , ILE 12inch rotors on front disc on rear, 3.7 ratio possie 9 bolt diff. Be cool all aluminum radiator. Convertible top like new.
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Bob SchmidtPhiladelphia, Pennsylvania, US
Warm, friendly, believable, mature, textured, wry, gritty, authoritative, political, announcer, sophisticated, precise diction, hard-sell retail, senior, everyman, narrator.
English (North American), English
North American, US General American (GenAm)
Middle Aged, Senior
Special Skills
Business, Documentaries, Educational, Internet, Podcasting, Radio, Television
I specialize in narrations for business and non-profit organizations. My work has been used by the American Red Cross of Southeastern PA, Policyviz, and the Mercer Museum to name a few. I have also done telephone system work for the American Red Cross and Red Paw Emergency Relief as well as other clients.
American University, Washington, DC (Broadcast journalism). Voiceover training with New York-based coach Peter Rofe and Edge Studio.
KEL HD-2 condenser. Rode NTG-3 shotgun.
Computer & Software
Special Equipment
Sound Forge editing software, Adobe Audition. Twisted Wave. Phone patch.
Delivery Methods
Dropbox, CD, FTP, email, access to ISDN.
Turnaround Time
Usually under 24 hours depending on size of job.
Service Description
I am a full-time voice artist offering my clients quality work. I am able to do production. Customer service is my number one priority, whether it's fast turnaround time or working within tight budgets. Let me be your problem solver.
Voice Over Clients
American Red Cross, Fonthill Museum, Mercer Museum, Red Paw Emergency Relief Team, Policyviz.
Payment Terms
Hire Bob as a voice actor. Payment is made through Voices.com SurePay, an escrow service that guarantees your work is done to your satisfaction. Send payment securely by Visa, Mastercard or PayPal through Voices.com then download your files from the website.
Watch a video to see how to make a payment
Next Steps
To contact Bob Schmidt about your project, request a quote today. We'll walk you through the process step-by-step. It's fast and easy.
Hire Bob Schmidt as a voice actor. Working with Bob Schmidt is fast and easy. We'll walk you through the process step-by-step.
Request a quote for your project today.


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Regular price: $997.18
Sale price: $738.65
Estimated Shipping Cost: $18.95
Add item to cart to check stock levels.
Blanco America manufactures high-quality sinks, faucets and counters for residential and commercial purposes. They have been a world leader, since 1925, with more than 30 million sinks produced in three factories world-wide. Blanco pioneered the use of stainless steel for kitchen sinks in 1952 and later Silgranit which is manufactured of 80% rock hard granite. Blanco products include sinks, faucets, counters, countertops, made of granite, stainless steel and composite for both the kitchen and bathroom.
Blanco PERFORMA Cascade super single bowl includes a stainless steel mesh colander, allowing for hands-free rinsing of fruit and produce.


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Saturday, May 16, 2009
Heckuvaday, Part II
In Which We Make Unexpected Connections
After I got home from the hospital, I ate lunch, decompressed a bit, and headed off to the NAMI walk here in town. I've been intending to join NAMI, or at least get more information about it, for ages now, but this is the first time I've actually done something, thanks to a woman I met at church -- actually, at our visiting Lutheran congregation -- who announced the walk.
Because I got there late, I didn't get to do the actual walk or hear the speakers. But I did get to meet the keynote speaker, Patrick O'Bryan, a local police officer who helped start the Mobile Outreach Safety Team to serve the homeless mentally ill and addicted. O'Bryan is also the head of the Reno Crisis Intervention Team, a police unit specially trained in mental-health issues. He's a huge force for compassion in Reno, and it was an honor to talk to him.
It turns out that O'Bryan's wife is a lecturer in my department; I'd heard her name a million times, but never met her, so he called her over. She'd heard my name a million times, too: small world! We had a nice chat, and have many interests in common.
O'Bryan was also featured in an article in the February 13, 2006 New Yorker. Among other things, the article discusses the social costs of homelessless; a very small number of chronically homeless people account for most of that cost. (In other words, 10% or less of the homeless account for 90% of the ER and other costs in any given city.) To save money, a few cities -- including Denver, Washington D.C. and Seattle -- have started programs where the hardcore homeless are given free housing, no strings attached.
The hardcore homeless are those who've flunked social services, been washed out of every available treatment and recovery program, and keep showing up in emergency rooms. To get the housing, these clients don't need to be straight, sober, or medicated; in fact, they need to have proven unable to maintain consistent recovery. A social worker is attached to the building, and I think some basic healthcare is provided too, but the clients do nothing to "earn" any of this. Nonetheless, once they're in safe, stable housing, the hospital visits decrease dramatically. Society saves money: a lot of money.
Although these programs are successful from an economic standpoint, they're also very controversial. Critics object to "rewarding" people for being a social burden, and think it's wrong to help people who've repeatedly proven unable to help themselves.
As you can probably guess, I'm a huge fan of this program. The minute I read the New Yorker article, I started talking it up in the ER, which gets its share of hardcore homeless. I intensified my efforts after the infamous scapegoat episode, and even got one of our more conservative physicians to admit that it sounded like a good idea. I hadn't heard anything about a program like that in this area, though.
So today I asked O'Bryan about it. He's a huge fan of the program too, and -- yay! -- he's trying to start it here. He thinks it's possible. He's been talking to the legislature. I asked what I could do to help, and he said, "Write about it. You blog? Blog about it."
So here I am, blogging. When I get more information, I'll let you know!
Posted by Susan Palwick at 4:39 PM
1 comment:
You might really enjoy Kevin Barbieux's blog. It's homeless issues from a homeless guy's perspective. Very, very interesting stuff.ReplyDelete
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This restaurant was a delight with views over looking he Dordogne valley . If you could tear your eyes away from the view to look at the menu this was almost equally enticing. This home run restaurant caters for all , with families with young...More
Getting you more information on this room
Getting you more information on this room
"Rear-facing rooms are good value; but worth paying more for the view at the front."
"I would request a room on the lower floors with windows facing the Dordogne Valley."


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Over the years visiting Disneyland we have stayed at multiple hotels both in and out of the Disney resort area. In general I have disliked every single hotel. Of the Disney resort hotels--IMO the Disneyland Hotel is by far the best especially when you take into account value for money spent. The Grand Californian is a total ripoff and the rooms aren't nearly as nice as the Disneyland Hotel and pool is not remotely as nice. The Paradise Pier Hotel is basically a 2 star rat hole. We've also stayed at the Animal Kingdom Lodge at Disney World which was really really disappointing.
So we finally decide to try the Disneyland Hotel and I had very low expectations going in having been so jaded by bad Disney hotel experiences. It was refurbished not too long ago, and when we got to our room I really couldn't believe I was at a Disney hotel. It was nice! We were in the tower closest to Downtown Disney which was convenient, and we had a pool facing view which was nice. The room had comfortable beds with fitted sheets! Don't take that for granted even if you are shelling out $300+ per night at Disney. The towels weren't old and ratty, and the room was spacious! The wall above the beds had a built-in decorative light display which lights up and plays Disney music and turns different colors--awesome! The kids loved it--great to fall asleep or slowly wake up to. The bathroom was actually spacious and had a good working shower head. The toiletries were grapefruit flavored. I was amazed.
We stayed there for three days and enjoyed the convenient access to the theme parks. This hotel is more conveniently located than the Paradise Pier but less conveniently located than the Grand Californian (really the only real redeeming quality of that place). The quickest way to each park is to walk through the Grand if going to California Adventure and via the Downtown Disney monorail station to Tomorrowland if going to Disneyland. Great location overall.
The pool area of the Disneyland Hotel is awesome. It's like a mini water park with two bigger slides and a couple smaller slides. Not sure when they built this, but it is so much better than the dinky little waterslide at the Grand Californian. Our older kids 10 and 12 really enjoyed it. They provide life jackets of all sizes poolside which was awesome because we forgot to bring our two year old's. There was no height or age restriction to go down the water slides! Sweet! The lines get crowded midday, but in the mornings and evenings not bad at all. Lastly, the hotel has a character buffet--Goofy's kitchen. Like all other Disney Buffets it's just rotten value, but they have characters running around so the little ones enjoy it. We liked breakfast at Ralph Brennan's Jazz Kitchen in Downtown Disney much better!
Overall, I think this hotel is not only EASILY the best value of all the Disneyland resort hotels, it is also the best Disney hotel outright. By far the best we've ever stayed at. It'll be our go to hotel for all future Disneyland trips for sure.
- Official Description (provided by the hotel):
- Stay and see all that is new! Now with more luxurious rooms, new pools and waterslides, themed dining and more, the transformed Disneyland Hotel is a vacation destination in and of itself. This transformation has earned the hotel the prestigious AAA Four Diamond Hotel rating. ... more less
- Reservation Options:
- TripAdvisor is proud to partner with Hotels.com, Expedia, Cheap Tickets, Orbitz, Travelocity, TripOnline SA, Hotwire, Cancelon, HotelQuickly, getaroom.com and Evoline ltd so you can book your Disneyland Hotel reservations with confidence. We help millions of travelers each month to find the perfect hotel for both vacation and business trips, always with the best discounts and special offers.
- Also Known As:
- Anaheim Disneyland Hotel
- Disneyland Hotel Ca
- Disneyland Hotel Anaheim


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