text:
|Publication number
|Publication type
|Application number
|Publication date
|Nov 25, 2008
|Filing date
|Mar 29, 2006
|Priority date
|Oct 19, 1999
|Fee status
|Also published as
|Publication number
|Carl Werner, Mark Horowitz, Pak Chau, Scott Best, Stefanos Sidiropoulos
|Original Assignee
|Rambus Inc.
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (106), Non-Patent Citations (61), Referenced by (22), Classifications (45), Legal Events (3)
|External Links: USPTO, USPTO Assignment, Espacenet
This application is a continuation of U.S. patent application Ser. No. 10/903,572, filed Jul. 30, 2004, now U.S. Pat. No. 7,093,145, which is continuation of U.S. patent application Ser. No. 09/655,010, filed Sep. 5, 2000, now U.S. Pat. No. 6,772,351, issued Aug. 3, 2004, which is a continuation-in-part of U.S. patent application Ser. No. 09/478,916, filed on Jan. 6, 2000, now U.S. Pat. No. 7,124,221, which claims priority to U.S. Provisional Patent Application Ser. No. 60/158,189, entitled, filed on Oct. 19, 1999, the contents of each of which are incorporated herein by reference in their entirety.
The present invention relates generally to the field of electrical buses. More particularly, the present invention relates to a current driver for a high speed bus.
Computer systems and other electronic systems typically use buses for interconnecting integrated circuit components so that the components may communicate with one another. The buses frequently connect a master, such as a microprocessor or controller, to slaves, such as memories and bus transceivers. Generally, a master may send data to and receive data from one or more slaves. A slave may send data to and receive data from a master, but not another slave.
Each master and slave coupled to a prior bus typically includes output driver circuitry for driving signals onto the bus. Some prior bus systems have output drivers that use transistor-transistor logic ("TTL") circuitry. Other prior bus systems have output drivers that include emitter-coupled logic ("ECL") circuitry. Other output drivers use complementary metal-oxide-semiconductor ("CMOS") circuitry or N-channel metal-oxide-semiconductor ("NMOS") circuitry.
While many prior buses were driven by voltage level signals, it has become advantageous to provide buses that are driven by a current mode output driver. A benefit associated with a current mode driver is a reduction of peak switching current. In particular, the current mode driver draws a known current regardless of load and operating conditions. A further benefit is that the current mode driver typically suppresses noise coupled form power and ground supplies.
A known current mode driver is shown in U.S. Pat. No. 5,254,883 (the "'883 patent"), which is assigned to the assignee of the present invention and incorporated herein by reference. The '883 patent discusses an apparatus and method for setting and maintaining the operating current of a current mode driver. The driver in the '883 patent includes an output transistor array, output logic circuitry coupled to the transistor array and a current controller coupled to the output logic circuitry.
For one embodiment, the current controller in the '883 patent is a resistor reference current controller. The current controller receives two input voltages, VTERM and VREF, the latter of which is applied to an input of a comparator. VTERM coupled by a resistor to a node, which is in turn coupled to a second input of the comparator. The voltage at the node is controlled by a transistor array, which is in turn controlled in accordance with an output of the comparator.
When the transistor array is placed in the "off" state, i.e. there is no current flowing through the transistors of the array to ground, the voltage at the node is equal to VTERM. In addition, by using the output of the comparator to adjustably activate the transistor array, the '883 patent shows that the voltage at the node may be driven to be approximately equal to the reference voltage, VREF.
Knowing the value of VREF and VTERM, the current mode driver of the '883 patent therefore provides a binary signaling scheme utilizing a symmetrical voltage swing about VREF. Specifically, in a first current state (the "off" state), the current mode driver is not sinking current and the signal line (or bus line) is at a voltage, Vo=VTERM, representing a logical "0." In a second current state (the "on" state), the current mode driver is sinking current to drive the voltage on the signal line (or bus line) to be:
V o =V TERM−2(V TERM −V REF).
The second state therefore representing a logical "1."
While the above techniques have met with substantial success, end users of data processing systems, such as computers, continue to demand increased throughput. Whether throughput is expressed in terms of bandwidth, processing speed or any other measure, the bottom line is the desire to get a block of data from point A to point B faster. At the same time, however, it is desirable to achieve such increases without requiring deviation from known semiconductor fabrication techniques.
A multi-level driver uses multiple pulse amplitude modulation (multi-PAM) output drivers to send multi-PAM signals. A multi-PAM signal has more than two voltage levels, with each data interval now transmitting a "symbol" at one of the valid voltage levels. In one embodiment, a symbol represents two or more bits. The multi-PAM output driver drives an output symbol into a signal line. The output symbol represents at least two bits that include a most significant bit (MSB) and a least significant bit (LSB). A multi-PAM receiver receives the output symbol from the signal line and determines the MSB and the LSB.
In accordance with a first aspect of the invention, a current controller for a multi-level current mode driver is provided. The current controller includes a multi-level voltage reference and at least one source calibration signal. A comparator is coupled by a coupling network to the multi-level voltage reference and the at least one source calibration signal. The current controller further includes a circuit for applying a selected voltage from the multi-level voltage reference and a selected source calibration signal from the at least one source calibration signal to the comparator.
In accordance with a second aspect of the invention, a method of calibrating a multi-level current mode driver is provided. The method includes two current sinks, each capable of sinking current from a termination voltage though a resistor. The first current sink drives a known amount of current through a resistor producing a first input signal. The second current sink is turned on to produce a second input signal. An average value of the first input signal and the second input signal is calculated. The average value of the first input signal and the second input signal is compared to a first known reference voltage. And, the second current sink, and thereby the second input signal, is adjusted until the average value equals the known reference voltage.
At least a subset of the signal lines connect to pull-up resistors Zo that connect to a termination voltage VTERM. In some systems, all signal lines connect to pull-up resistors Zo that connect to the termination voltage VTERM. The termination voltage VTERM can be different from the supply voltage VDD. In one embodiment, the supply voltage VDD is equal to 2.5 volts, the termination voltage VTERM is equal to 1.8 volts, the bus voltage for a signal at low levels VOL is equal to 1.0 volts, and the voltage swing is 0.8 volts. The resistance of the terminating resistors Zo is equal to twenty-eight ohms.
The output drivers 323 are designed to drive the bus 320 with a predetermined amount of current; and the bus receivers 324 are designed to receive the signals sent by the bus drivers 323 on the bus 320. In a device, each bus receiver 324 receives signals from one signal line of the bus 320. The bus receivers 324 are integrating receivers according to the present invention.
In one embodiment, the memories are random access memories (RAMS). In an alternative embodiment, the memories are read-only memories (ROMs). Alternatively, the bus output drivers 323 and bus receivers 324 of the present invention are implemented in other semiconductor devices that use a bus to interconnect various types of integrated circuits such as microprocessors and disk controllers.
In yet another alternative embodiment, the output drivers are implemented in a point-to-point system. Although a bus that uses current mode signaling has been described with respect to
Multi-Level Signaling
Referring back to
As used herein, the term multi-level signaling refers to signaling schemes utilizing two or more signal levels. Multi-level signaling may also be referred to herein as multiple level pulse amplitude modulation, or multi-PAM, signaling, because the preferred coding methods are based upon the amplitude of the voltage signal. Although the multi-level signaling of the preferred embodiments will be described with respect to a current mode bus, multi-level signaling can also be used with a voltage mode bus. In various embodiments of the present invention, the data rate on a bus is increased without increasing either the system clock frequency or the number of signal lines. Output drivers generate, and receivers detect, multi-PAM signals that allow multiple (k) bits to be transmitted or received as one of 2k possible voltages or data symbols at each clock edge or once per clock cycle. For example, one preferred embodiment is a 4-PAM system in which two bits are represented by 22 or four voltage levels, or data symbols, and the two bits are transferred at every clock edge by transferring an appropriate one of the four voltage levels. Therefore, the data rate of a 4-PAM system is twice that of a binary or 2-PAM system.
Multi-PAM is not traditionally used in multi-drop bus systems due, at least in part, to the lower signal-to-noise ratio that is realized when the voltage range is divided into multiple levels. Prior art memory systems have been implemented as only binary systems. A preferred embodiment allows such systems to be implemented using more than two signal levels.
The y-axis of the graph in
A 4-PAM receiver identifies a received symbol based on a voltage range or range of voltages associated with that symbol. A set of reference voltages VREFLO, VREFM and VREFHI function as thresholds to define ranges of voltages associated with each 4-PAM symbol. In accordance with a preferred embodiment, the reference voltages VREFLO, VREFM and VREFHI are set at the midpoint voltage between neighboring symbols. For example, the symbol "00" is associated with voltages greater than VREFHI. The symbol "01" is associated with voltages falling within the range between VREFHI and VREFM. The symbol "11" is associated with a range of voltages from VREFM to VREFLO. The symbol "10" is associated with a range of voltages less than VREFLO. The reference voltages VREFHI, VREFM and VREFLO are threshold voltages from which a multi-PAM data symbol is determined to be one of the four possible data symbols.
4-PAM symbols or signals also allow for direct compatibility with 2-PAM or binary signaling. When operating in 4-PAM mode, the received data bits are compared to the three reference voltages, VREFHI, VREFM and VREFLO to determine the 4-PAM symbol and the associated two bits. Because the most significant bit (MSB) is determined by comparing the received data bit to VREFM, i.e. the MSB is zero for voltages greater than VREFM and the MSB is one for voltages less than VREFM, the multi-PAM system can be used as a 2-PAM system by ignoring the least significant bit (LSB) and using the MSB. Alternatively, to transmit 2-PAM symbols using the gray code of
Multi-PAM signaling increases the data rate with a small increase in power consumption because the number of input/output (I/O) pins and the system clock frequency may be the same as that used for binary signaling. The major factor in the power consumption of CMOS circuits, for example, is the CV2F power, which depends directly on the system clock frequency. Therefore, increasing the system clock frequency to increase the data rate directly increases the power consumption. Although some additional power is used for the additional circuitry of the multi-PAM interface, described below, this increase in power is much less than the increase in power that would occur if either the number of I/O pins or the system clock frequency were increased to increase the data rate.
Multi-PAM signaling also increases the data rate without a corresponding increase in the electromagnetic interference (EMI). If the data rate were increased by increasing the number of I/O pins or by increasing frequency, the EMI would increase proportionally. Because multi-PAM signaling does not increase the number of I/O pins, the EMI does not increase if the total voltage amplitude of the multi-PAM I/O pins remains the same as that used in binary signaling. The total voltage amplitude may be increased to provide greater voltage margin to improve system reliability. Although the EMI would increase correspondingly, the increase would be small than that incurred by increasing the number of I/O pins with binary signaling.
Although the circuits described below use 4-PAM signaling, the embodiments described can be expanded for use in 8-PAM, 16-PAM and, more generally, N-PAM signaling. Accordingly, it is to be understood that the preferred embodiments are not limited to 4-PAM signaling, but rather may be applied to the general, N-PAM signaling, case.
In driver block 958, odd and even data bits are multiplexed onto the driver transistors via passgates 962 and an inverter 964. In this embodiment, odd data is transmitted at the rising edge of the clock, while even data is transmitted at the falling edge of the clock. NAND gates 966,968 connect to current control bit zero <0>, and the LSB Odd Data bit and LSB Even Data bit, respectively. When the respective current control bit zero <0> is high, the NAND gates 966, 968 are responsive to the odd and even data. When the respective control bit is low, the output of the NAND gates 966,968 is low and driver block 958 does not respond to the data bit. The current control bits provide the specified amount of current to cause the desired voltage swing regardless of the PVT conditions. The circuit of
The passgates 962 include two transistor pairs, each pair including a PMOS transistor 972, 974 connected in parallel with an NMOS transistor 976, 958. The clock and clock_b signals connect in an opposite manner to the gates of the transistors of the transistor pair.
Table 1 below shows two 4-PAM encoding schemes that may be implemented using the output driver 950 of
Encoding Schemes
Data Bits
(Symbol) to be
MSB Input
LSB Input
Output Voltage
VTERM − ⅓ (I � Zo)
VTERM − ⅔ (I � Zo)
VTERM − (I � Zo)
VTERM − ⅓ (I � Zo)
VTERM − ⅔ (I � Zo)
VTERM − (I � Zo)
In another embodiment shown in
The circuit for even data is not shown, but a separate set of current control NMOS transistors connects in series with a set of driver transistors that respond to the logical "AND" of the respective data bit and the complement of the clock signal clock_b for even data.
The output voltages of the circuits of
The gds distortion is eliminated by adjusting the width to length (W/L) ratio of transistors 1004 and 1006 by factors α and β, such that β>α>1 and the incremental voltage difference between adjacent 4-PAM levels is constant. Transistors 1002, 1004 and 1006 have a width to length ratio of W/L, α(W/L), and β(W/L) respectively.
Examples of encoding schemes that may be implemented using the output driver of
TABLE 2 Mapping of Data Bits to ABC Inputs and Encoding Schemes Data Bits Coding (Symbol) to be Scheme Transmitted A B C Output Voltage Binary 00 0 0 0 VTERM 01 1 0 0 VTERM − ⅓(I � Zo) 10 1 1 0 VTERM − ⅔(I � Zo) 11 1 1 1 VTERM − (I � Zo) Gray 00 0 0 0 VTERM 01 1 0 0 VTERM − ⅓(I � Zo) 10 1 1 0 VTERM − ⅔(I � Zo) 11 1 1 1 VTERM − (I � Zo)
A binary encoder 1007 is illustrated in
On-chip, single-ended output drivers, as shown in
To reduce sensitivity to switching noise, output drivers can provide a constant or semi-constant current to ground regardless of the output current being driven. As shown in
When the output driver sinks output current from the I/O pin 956, current is steered through transistor N1 1012 to ground. When transistor N1 1012 is inactive, transistor N2 1014 becomes active to allow the same or substantially the same amount of current to flow to ground. In this way, a substantially constant amount of current continuously flows to ground to eliminate a large portion of the output driver switching noise and provide a quieter on-chip ground, thereby improving the performance of the 4-PAM signaling. The signal VI, is the signal that drives transistor N1 1012. Alternatively, the signal VR that drives transistor N2 1014 is a reference voltage between ground and VI. In response to an input voltage VCNTRL, the current source 1016 sinks a predetermined current Io to ground.
There may be different relationships between N, n1 and n2 in alternative embodiments.
Each of the A, B and C signals is associated with a current drive block 1040 to drive a predetermined amount of current associated with the symbol. Each current drive block 1040 includes one or more sets of stacked resistor pairs 1042 that are associated with each set of current control bits for that current driver block 1040. For example, the current drive block 1040-1 that drives the A signal receives current control bits CC. The current drive block 1040-2 that drives the B signal receives current control bits CC and CCB. The amount of current supplied by current drive block 1040-2 is adjusted for gds distortion using the CCB bits. The current drive block 1040-3 that drives the C signal receives current control bits CC and CCC. The amount of current supplied by current drive block 1040-3 is adjusted for gds distortion using the CCC bits.
Referring also to
The transistors of the stacked transistor pairs are binary weighted with respect to minimum width of W1 for the upper transistors and W2 for the lower transistors. The widths W1 and W2 may be chosen to determine output characteristics such as output resistance and capacitance. Generally the widths W1 and W2 are chosen such that W1 is less than W2.
Although drawn to illustrate the circuit for the CC current control bits, the circuit diagram of
As shown in
A multiplexor 1052 receives the three 4-PAM reference voltages VREFHI, VREFM and VREFLO. A select reference voltage signal, SelRef, selects one of the referenced voltages as the selected current control reference voltage, VREF. A comparator 1054 compares the selected current control reference voltage VREF to a mid-point voltage VX and generates a comparison signal.
To generate the mid-point VX, output driver 1 (1056) sinks a first amount of current to provide the first output voltage VOUT-1 and output diver 2 (1058) sinks a second amount of current to provide the second output voltage VOUT-2. Two passgate pairs 1060, 1062, in response to a current control enable and its complementary signal, act as a resistor divider to provide the midpoint voltage, VX, between the first output voltage, VOUT-1, and the second output voltage, VOUT-2.
A state machine 1064 includes first, second and third counters, 1066-1, 1066-2 and 1066-3 that provide the first, second and third sets of current control bits, CC, CCB and CCC, respectively. If the comparison signal indicates that the midpoint signal VX is greater than the reference voltage VREF, the state machine 1064 increments an associated set of current control bits by one to increase the amount of current that is sunk by the output driver, thereby decreasing the midpoint voltage. If the midpoint voltage signal VX is less than the current control reference voltage, VREF, the state machine 1064 decrements the associated current control bits by one, thereby increasing the midpoint voltage.
In one embodiment, the current control bits are calibrated during a power-up sequence. The theory of operation for calibrating the current control bits is as follows. The first set of current control bits CC provide the primary amount of current control for each current control block 1040. To compensate for gds distortion, the CCB and CCC current control bits fine tune the amount of current associated with the Gray-coded "11" and "10" signals, respectively. The current control bits are calibrated in the following order: CC, CCB, then CCC.
In alternative embodiments, the current control bits may be calibrated after power-up in response to triggering events, e.g., lapse of a period of time, a change in ambient temperature, a change in power supply voltage, or in response to a threshold number of errors.
Referring also to
Finally, the third set of current control bits CCC is adjusted such that the midpoint voltage between output voltage for the "11" and "10" is equal to VREFLO.
Referring to
Three major blocks of steps 1072, 1074 and 1076 set the current control bits, CC, CCB and CCC, respectively.
In block 1072, step 1078 sets the initial conditions for determining the settings for the first set of current control bits CC. The state machine 1064 outputs the select reference voltage signal (SelRef) which causes the multiplexor 1054 to output the reference voltage VREFHI to the comparator 1054. A "00" symbol is supplied to output driver 1 (1056) by outputting multi-PAM bit selection signals A1, B1 and C1 with values of zero. A "01" symbol is supplied to output driver 2 (1058) by outputting multi-PAM bit selection signals A2 with a value of one, and B2 and C2 with a value of zero. The initial state of the first, second and third current control bits is as follows:
CCB={1 0 0 . . . 0}; and
The current control bits are initially set such that the stacked transistor pair sinking the most current will be activated.
In step 1080, the output drivers 1 and 2 output the voltages corresponding to the symbols "00" (the VTERM reference) and "01" (the drive level under calibration) and the midpoint voltage VX is generated. In step 1082, the comparator 1054 compares the midpoint voltage VX to the selected reference voltage VREFHI. When the midpoint voltage is within one least significant bit of the reference voltage VREFHI, the first set of current control bits have the proper setting. The state machine 1058 determines that the midpoint voltage VX is within one least significant bit of the reference voltage VREFHI when the current control bits begin to dither between two settings. In other words, the output of the comparator will alternate between a zero and a one.
In step 1084, when the midpoint voltage VX is not within one least significant bit of the reference voltage VREFHI the state machine 1064 augments the first set of current control bits depending on the result of the comparison. The term "augment" is used to indicate either incrementing or decrementing the current control bits. The process proceeds to step 1080.
If, in step 1082, the state machine 1064 determines that the midpoint voltage VX is within one least significant bit of the reference voltage, the process proceeds to step 1086 to calibrate the second set of current control bits, CCB.
In step 1086, the initial conditions for calibrating the second set of current control bits CCB are set. The state machine 1064 outputs the select reference voltage signal (SelRef) which causes the multiplexor 1054 to output the reference voltage VREFM to the comparator 1054. A "01" symbol is supplied to output driver 1 (1056) by outputting multi-PAM bit selection signals A1 with a value of one, and B1 and C1 with values of zero. An "11" symbol is supplied to output driver 2 (1058) by outputting multi-PAM bit selection signals A2 and B2 with a value of one, and C2 with a value of zero. The state of the first set of current control signals CC remains unchanged. The initial state of the second and third sets of current control bits, CCB and CCC, respectively, is as follows:
In step 1088, the output drivers 1 (1056) and 2 (1058) output the voltages corresponding to the symbols "01" (the level calibrated in step 1072) and "11" (the level now under calibration), and the passgate pairs 1060, 1062 output the midpoint voltage VX. In step 1090, the comparator 1054 compares the midpoint voltage VX to the selected reference voltage VREFM. When the midpoint voltage is not within one least significant bit of the reference voltage VREFM as described above with respect to VREFHI, in step 1092, the state machine 1064 augments the second set of current control bits CCB by one and the process repeats at steps 1086.
When the midpoint voltage is within one least significant bit of the reference voltage VREFM as described above with respect to VREFHI, the second set of current control bits CCB have the proper setting and the process proceed to step 1094 to calibrate the third set of current control bits, CCC.
In step 1094, the initial conditions for calibrating the third set of current control bits CCC are set. The state machine 1064 outputs the select reference voltage signal (SelRef), which causes the multiplexor 1054 to output the reference voltage VREFLO to comparator 1054. A "11" symbol (calibrated in step 1074) is supplied to output driver 1 (1056) by outputting multi-PAM bit selection signals A1 and B1 with a value of one, and C1 with a value of zero. A "10" symbol (the level now under calibration) is supplied to output driver 2 (1058) by outputting multi-PAM bit selection signals A2, B2 and C2 with a value of one. The state of the first and second sets of current control signals CC and CCB, respectively, remains unchanged. The initial state of the third sets of current control bits CCC is as follows:
In step 1096, the output drivers 1 (1056) and 2 (1058) output the voltages corresponding to the symbols "11" and "10" and the passgate pairs 1060, 1062 output the midpoint voltage VX. In step 1098, the comparator 1054 compares the midpoint voltage VX to the selected reference voltage VREFLO. When the midpoint voltage is not within one least significant bit of the reference voltage VREFLO, as described above with respect to VREFHI in step 1100, the state machine 1064 augments the third set of current control bits CCC by one and the process repeats at step 1094.
In step 1098, when the midpoint voltage is within one least significant bit of the reference voltage VREFLO, the appropriate settings for the first, second and third sets of current control bits, CC, CCB and CCC respectively are determined and the calibration is complete.
For the foregoing embodiment, a sequential search is described: starting at an initial value and augmenting. It should be emphasized, however, that alternative search techniques known to those skilled in the art may be used. For example, without limiting the foregoing, successive approximation using a binary search may be used. As a further, although less desirable because it is hardware intensive, alternative, a direct flash conversion may be used.
In one embodiment, the resistor values are selected such that resistors R2 and R3 have twice the resistance of resistor R1, and VREF, which is supplied externally, is equal to the desired VREFLO voltage.
An electrical schematic of a first preferred alternative to the current control calibration circuit of
As illustrated in
The comparator 1500 of
Referring again to
At the end of the auto-zero phase, switches 1522 are opened, placing the amplifier 1516 into a high gain mode, and then there is a momentary delay followed by a compare phase. At the start of the compare phase, the state of the switches 1510 is changed to sample the reference voltage supplied by the multiplexor 1502 and the unknown output driver voltage 1508 onto the coupling capacitors 1512. Because the charge stored from the auto-zero phase is trapped on the coupling capacitors 1512, any change in the input voltages, such as the change to the unknown output driver voltage 1508, produces a voltage across the input nodes 1514 a and 514 b of the transistor comparator 1516. This in turn produces an output voltage across the nodes 1518 and 1520 that is preferably latched into a latching stage 1524.
The control logic enables strobing of the latching stage 1524. In accordance with a preferred embodiment, the latch 1524 may be strobed multiple times during a single compare phase. Alternatively, the latch 1524 may be strobed only once during a single compare phase.
In accordance with a preferred embodiment, a current control transistor in the current mode driver is adjusted, for example as described above with respect to
The current control calibration circuit shown in
The known voltage, VTERM is applied to line 1506 of the comparator 1500 and an unknown voltage generated by turning "on" the transistor 1002 (from
At this point, the voltage corresponding to the 4-PAM symbol "01" is applied to line 1506, and an unknown voltage generated by turning "on" the transistors 1002 and 1004 is applied to line 1508. The multiplexor 1502 is activated to cause the reference voltage, VREFM, to be applied to the comparator 1500. Using feedback from the output of the comparator 1500, a current control transistor (not shown) coupled in series with the transistor 1004 is adjusted until the average of the voltages on lines 1506 and 1508 is equal to the reference voltage, VREFM. The voltage on line 1508 is now calibrated to correspond with the 4-PAM symbol "11".
Next, the voltage corresponding to the 4-PAM symbol "11" is applied to line 1506, and an unknown voltage generated by turning "on" the transistors 1002, 1004 and 1006 is applied to line 1508. The multiplexor 1502 is activated to cause the reference voltage, VREFLO to be applied to the comparator 1500. Using feedback from the output of the comparator 1500, a current control transistor (not shown) coupled in series with the transistor 1006 is adjusted until the average of the voltages on lines 1506 and 1508 is equal to the reference voltage, VREFLO. The voltage on line 1508 is now calibrated to correspond with the 4-PAM symbol "10".
Those skilled in the art of circuit design will appreciate that the comparator 1500 may take other forms.
Referring again to
An electrical schematic of another preferred alternative to the current control calibration circuit of
As shown in
The operation of the embodiment shown in
During the cancellation phase, the feedback amplifier 1538 senses the offset voltage associated with the differential amplifier 1540 as follows. When timing signal evb2 goes low, the inputs 1542 and 1544 of the amplifier 1540 are shorted together by a switch 1546. At the same time, a switch pair 1548 couples the outputs of the amplifier 1540 to the inputs of the feedback amplifier 1538. With the inputs 1542 and 1544 of the amplifier 1540 being shorted together, any voltage appearing at the output of the amplifier 1540 may be characterized as an output offset voltage. The feedback amplifier 1538 produces output current in the drains of transistors 1550 and 1552 in an amount that is proportional to the output offset voltage. The current supplied by the feedback amplifier 1538 works to drive the output offset voltage to zero, thereby balancing the amplifier 1540 when its inputs 1542 and 1544 are shorted. The resultant voltage required to produce the balancing current in the feedback amplifier 1538 is stored on the capacitors 1554 and 1556 at the end of the cancellation phase when the switches 1548 are opened.
As shown in
The current control calibration circuit shown in
In accordance with yet another alternative embodiment, therefore, the comparator comprises a transconductor stage, as shown in
While the invention has been described in connection with a number of preferred embodiments, the foregoing is not intended to limit the scope of the invention to a particular form, circuit arrangement, or semiconductor topology. To the contrary, the invention is intended to be defined by the appended claims and to include such alternatives, modifications and variations as may be apparent to those skilled in the art upon reading the foregoing detailed description.
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|Dec 8, 2009
|Denso Corporation
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|U.S. Classification
|341/899, 713/300
|International Classification
|Cooperative Classification
|European Classification
|Feb 10, 2009
|Certificate of correction
|May 25, 2012
|Fee payment
Year of fee payment: 4
|May 25, 2016
|Fee payment
Year of fee payment: 8


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Twenty-one-year-old Melissa Laribee, who lost both legs after being struck by a hit-and-run driver in Norwich in October 2012, told a Superior Court judge Friday that the crash destroyed her dreams.
Laribee rolled up to the court bench in a wheelchair to address Judge Kevin P. McMahon as Amalia Rivera, 37, who had pleaded guilty to evading responsibility, a felony, was sentenced to one year in prison.
"I was an independent 20-year-old woman who had my own apartment and future plans to become a police officer," she said. "My dreams were destroyed that night when I became a double, above-the-knee amputee."
Rivera was driving home from Foxwoods Resort Casino when she swerved off the right side of Hamilton Avenue and struck Laribee and her then-boyfriend, Joseph Patch, as they were retrieving items from a parked car, according to police. Patch suffered a collapsed lung.
Though Rivera admitted she had been drinking while gambling at Foxwoods, police did not arrest her for more than three hours after the incident and did not charge her with driving under the influence.
Rivera, who came to court with family members and wore a gray sweatsuit in anticipation of her imprisonment, stood with her attorney, Theodore Kowar, and declined to make a statement.
At Laribee's request, the two women had met in prosecutor Thomas DeLillo's office while the court case was pending.
"I wanted to have a sit-down meeting with her," Laribee said. "I wanted to see her on my own. She was crying and said she has to live with this every day. I said, 'How do you think I feel?'"
Laribee, once a competitive hip-hop dancer, has prosthetic devices but says it is painful to use them. She works at Smith Insurance in Niantic and is hoping to get a car with hand controls as she strives to become independent again.
"I don't want people's help," she said. "I want to do it on my own."
Laribee has bad days like everyone else, but is remarkably strong and cheerful, according to her friend and co-worker, Monica Garrity.
"She gets up every morning," Garrity said. "She gets dressed. She puts her makeup on."
Rivera's car insurance policy had lapsed for nonpayment, so she was uninsured when the crash occurred. Laribee said she is infuriated that there is no system in place in Connecticut, where insurance is mandatory, to punish people who are driving without insurance. Her attorney, Peter J. Bartinik Jr., said Laribee will receive a $250,000 settlement, the most available under Foxwoods' dram shop act, but that most of it will be paid directly to the state for medical bills. Bartinik said the Mashantucket Pequots, owners of Foxwoods, agreed to the settlement even though Rivera was not charged with drunken driving.
Judge McMahon said Laribee had suffered one of the most life-altering injuries he has ever seen. He agreed that there should be a stiffer penalty for uninsured drivers and that insurance could perhaps be made more affordable for people who have no means to pay. Uninsured drivers are subject to court fines of at least $100 and may also be subjected to a $200 fee from the Department of Motor Vehicles.
"Her failure to call 911 or provide any assistance to me whatsoever after hearing my cries for help as I lay broken and mangled on the side of the road shows me that she lacks a substantial amount of personal responsibility," Laribee said in her statement to the court.
Following the Oct. 12, 2012, crash, police recovered a headlight assembly, which had the Chrysler logo. Police checked the area and found a Chrysler 300 with what appeared to be fresh front-end damage at Rivera's home at 40 Donohue Drive.
Rivera told the police she thought she had struck an animal but could not remember the accident and had left the scene because she wanted to go home. She said she didn't drink often and that even small amounts of alcohol affect her.
The Melissa Laribee Fund has been established at Rockville Bank. Donations can be sent to: 99 Linwood Ave., Colchester, CT 06415.
After doctors saved his father, Groton senior plans to study medicine
At Conn College, Green Dot program changing culture around sexual violence
Jay Leno loves vintage cars, and now he's selling products to make them shine
Connecticut Audubon's Chaney preserve looking to attract shrubland species
R.J. Evans goes to Louisville and Roger Bidwell goes to the Hall of Fame
Coast Guard Academy graduation brings together families, Trump supporters and protestors
8th graders from New Jersey refuse to be photographed with Paul Ryan
Trump calls trip 'home run' as Kushner questions left unanswered
What if U.S. quits climate deal? Scientists say it doesn't look good for Earth


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It is finally that time again! Although a mishap occurred in which I didn't receive all of the figures by this week, I did promise that I would be making a post this week and I intend to keep that promise. So, first the news, then the photos:
Since the last photoshoot in July I have acquired: Konata Nendoroid, Lelouch figma, Kyon figma, Konata figma, and Fate Harlaown figma. The thing is, Konata was supposed to ship with Mikuru from Hobby Search but instead arrived with the Fate figma (and an invoice showing I had indeed paid for and ordered Mikuru). The Fate figma is beautiful and even though I don't even know the character I was willing to ship it back or at least pay for a new Mikuru. I e-mailed Hobby Search and told them that I had received the wrong figure and by today they'll have shipped a new Mikuru to me free of charge! Therefore, this Fate figma I got (worth $10 more than Mikuru), I get to keep!
I don't mean to kill the mood completely, but on Monday I ended the 3 and a half year relationship with my girlfriend. It hurts more than I want it to but I'm taking it surprisingly well. I don't fully understand the reasons why it had to turn out this way (considering it wasn't my decision), and I don't know how long it will take me to adjust to not having someone in my life. The only way for me to move on without being concerned for her is to cut myself off from her completely, and as of last night, tying up some loose ends, I believe I've done that. I fully trust in God that this was for the best.
On a lighter and more positive note, I'm in all of my fall courses and THEN some. I got into all of the core design and media arts courses I need to take this semester (and another one I'm holding off on taking until next year). I'm taking a 6th course online that I intend to drop if things get too busy for me; however, I do at the moment get Wednesdays and most likely Fridays off. I'll be very very busy come September.
So, without further delay:
These photos are also available in slideshow format on my portfolio.
This one, as I mentioned, I get to keep for free! Even though I don't exactly know anything from the show this one is from it's still pretty darn beautiful.
This one actually caused the most trouble of them all. It's a counterfeit Konata Nendoroid from Hong Kong. When I bought it on ebay I knew it would probably be a fake but I bought it anyways. When I paid through paypal a server error caused me to pay twice and the seller did absolutely nothing to respond to me to try and fix it (basically, "I have your money now I'll ignore you"). I had to bring it up to paypal to get my money back. The seller didn't even ship until 2 weeks after I had paid. I'm never buying figures from Hong Kong again. Contrast this incident with the Japanese seller Hobby Search who is sending me a free figure after a mishap (and they take exactly 7 days to arrive after order).
This one is a little bonus. I found this Miku shirt at Sakura Media of all places (Metrotown, Burnaby, BC). They had her under "Leek girl" until I complained about it, haha. I got this shirt after a friend told me the very same morning that he had found one there. I bought it then showed my friend the next day and then he went that same morning to go get it too. So, I wouldn't be surprised if this cycle continued until they run out of stock. Funny thing is, I wore it to work the next day (work at a video store), and the first customer I got (25 year old girl), knew who it was. That made my day...I didn't think people in Ocean Park were cool that way.
So, that was a long one. Signing off.


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United Nations Development Programme (UNDP) has issued a recruitment notification for the recruitment of National Consultant through recruitment notification. Candidates who have completed Graduate can apply for the new recruitment notification from United Nations Development Programme (UNDP)
Eligible candidates can apply online for the Job National Consultant on or before 18/01/2016. Find More information about the vacancy like Age limit, Selection Process, Qualification, Application fee, How to apply etc can be found below.
Company Name : United Nations Development Programme (UNDP)
Vacancy Name : National Consultant
Educational Qualification : Any Graduate
Total No Of Vacancy : 01 Posts
Salary : NA
Job Location :Delhi
Last Date To Apply For This Job : 18/01/2016
Address For The Job Vacancy : United Nations Development Programme (UNDP),Delhi
Detail Of United Nations Development Programme (UNDP) National Consultant Recruitment:
Location : New Delhi, INDIA
Application Deadline : 18-Jan-16
Type of Contract : Individual Contract
Post Level : National Consultant
Languages Required : English
Starting Date : (date when the selected candidate is expected to start) 25-Jan-2016
Duration of Initial Contract : 35 working days over a two month period
Education: Advanced degree in Public Health Communications or other related fields.
Experience: Minimum of 10 years' of experience in program reviews / evaluations / assessments in public health communication, nationally and multi state, in special relation to immunization will be an asset; Clear knowledge of the India's public health structure and service delivery and demand generation mechanisms in the public health sector; Clear knowledge and understanding of India's Universal Immunization Programme (UIP) and implementation mechanism at National and State levels; Understanding issues of public health on issues availability, accessibility and other nuances; Previous experience of working for/partnering with Government of India, Ministry of Health and Family Welfare and other ministries at the national and state level; Demonstrated and proven experience managing a team of experts to address the various needs of this assessment. Travel: The position will require nearly 10 days of travel to the designated states.
Language: Written and oral proficiency in English is required.
Duty Station: The Consultant is required to be based at New Delhi and report regularly to the GAVI Secretariat based at MoHFW; Relocation expenses, if any, would be borne by the successful Consultant.
Financial Matters: Payments will be made at the end of the consultancy for the actual days worked, on satisfactory completion of activities, as agreed with the GAVI Secretariat; UNDP will cover the cost of consultancy as per the per day consultancy rates; UNDP will organize the preapproved official travel; Any other travel related claims will be reimbursed as per actuals; Any kind of miscellaneous charges i.e. internet, phone etc. would not be reimbursed.
Selection Procedure For United Nations Development Programme (UNDP) – National Consultant Post:
Candidates can apply on or before 18/01/2016
No Detailed information about the selection process is mentioned in the recruitment notification
How To Apply For National Consultant Vacancy in United Nations Development Programme (UNDP):
UNDP is committed to achieving workforce diversity in terms of gender, nationality and culture. Individuals from minority groups, indigenous groups and persons with disabilities are equally encouraged to apply. All applications will be treated with the strictest confidence.
Important Dates To Remember:
Last Date to Apply for this job 18/01/2016


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Monarch Room - 5700 sq ft
Bevel Room - 2000 sq ft
Fully renovated hotel on 10 acres of land backing on to a wetland. Ask about our outdoor spaces as well.
ALSO have Bevel Room - 2000 sq ft. A/V integrated with 2 screens.
The Monarch Room is a perfect banquet facility including an in-room bar, dance floor, stage and modern, tasteful decor. There is a fully integrated audio/visual system with 4 screens on 3 walls.
Full catering available.
Fully integrated A/V system with 2 screens on 2 walls. Windows open to play atrium with block out blinds.
Full Catering available.


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from $79 / night help Price for guests, Nights
Villa Patricija - Studio (3 Adults) – Home 8145257 Studio
- no bedrooms
- 3 sleeps
- min stay varies
Villa Patricija - Studio (3 Adults) – Home 8145257
- Studio
- no bedrooms
- sleeps 3
- min stay varies
Top Review
Studio / No Bedrooms / 1 bathroom / sleeps 3
Key Info
- Swimming pool
- Child friendly
- Air conditioning
- No pets allowed
Description from manager
Located in lovely place Zaton, Villa Patricija features free WiFi, air-condition and SAT LCD TV. Studio apartment for three persons is located in the attic. It consists of a double bed and single bed. It has kitchenette with a stove, refrigerator; coffee maker, water kettle. There is a dinning table with four chairs. Private bathroom with a shower. Studio has SAT TV and air condition.
In front of the villa is a spacious furnished terrace and an outdoor pool. By the pool are sunbeds and sun umbrellas at guests disposal.
The property offers free parking and outdoor summer kitchen with fireplace for BBQ specialties.
- Great for children of all ages
- No pets allowed
Bed & bathroom
- Beds in other rooms: Queen Bed Twin bed
- 1 Wet room
- Wi-Fi available
- Air conditioning
- Shared outdoor pool (heated)
- Internet access
- Satellite TV
More Less
- Parking
- Secure parking
- Not suitable for wheelchair users
- Check in time:14:00, Check out time:10:00
- If you have any questions about check-in or check-out times, please contact the owner/manager.
- Payment
- This rental can only be paid for online through Holiday Lettings using your credit/debit card or PayPal (never by bank or wire transfer).
- Smoking
- No smoking at this property
- Cancellation policy
View Policy
House rules
2. Extinguish all electricity consumers when you are going out of the apartment (air conditioning, heating, TV, light...)
3. Produce no noise after midnight (12.p.m.)
4. Take care and keep inventory of the apartment, especially floor and furniture
5. Any damage caused by negligence will have to be compensated
About the manager
Partner Travel Doo
- Calendar last updated::
- 23 May 2017
- Years listed:
- 6
- Based in:
- Croatia
Languages spoken: English
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text:
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The integrated early childhood and special education major offers engaging academic courses and hands-on experiences that will prepare you to be an effective teacher.
Integrated Early Childhood & Special Education Major
Why Earn a Bachelor's Degree in Integrated Early Childhood and Special Education (ECSE)?
The field of special education is rapidly changing. There is a critical need for teachers who can meet the cognitive, behavioral, social, emotional, linguistic and cultural needs of each student in the classroom.
This specially designed, integrated major gives you the opportunity to become certified to teach both early childhood (pre-K through grade 3) and special education (birth through grade 3). This comprehensive program offers:
- innovative and dynamic course work that helps you develop successful instruction and classroom management strategies
- transformative, real-world experiences through internship placements, offered in multiple school districts throughout the state of Maryland
- experienced faculty-mentors committed to your success
- a supportive cohort of fellow Towson University students studying early childhood-special education
- collaborative partnerships with families, communities and agencies
The Center for Professional Practice connects students to clinical internships. The major will prepare you for a career as an early childhood classroom teacher or as an infant/primary special education teacher.
Admission and Degree Requirements
Admission to the integrated early childhood and special education major is selective. Students must meet the university's requirements for admission to the professional education program and to internships. View admission requirements for the major.
You can view degree requirements for the integrated early childhood and special education major in the Undergraduate Catalog.
- Integrated Early Childhood/Special Education Application (DOCX)
- Early Childhood - Special Education Checklist (DOCX)
|Elizabeth Radebaugh
Hawkins Hall, 403A
why towson University?
Program Advantages
- Towson University's long history and reputation as an excellent teacher training institution
- programs accredited by the Council for the Accreditation of Educator Preparation (CAEP) and the Maryland State Department of Education
- professional development and networking opportunities with alumni in the field through social media and on-campus programs
- interaction with diverse populations during service-learning activities with students and families
- technology-rich coursework and internships
Earn Your Degree at Towson University in Northeastern Maryland
Students in northeastern Maryland can obtain a bachelor's degree in integrated early childhood-special education at Towson University in Northeastern Maryland (TUNE), located on the Harford Community College campus. Earn your bachelor's degree without leaving Harford County. Read more about undergraduate programs at TUNE, or email program coordinator Toni Guidi, tguidi AT_TOWSON.


text:
Eileen's Diary... continued
I began posting monthly excepts from Eileen's 1940 diary a couple of weeks ago, on Saturdays:
Happy Reading!
Dr. Bill ;-)
This is a surname blog for the surname KINNICK (also, KENNICK in early Maryland and North Carolina). If you have a KINNICK/KENNICK in your background,please leave a comment! This is a companion blog to my main blog Dr. Bill Tells Ancestor Stories.


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Bucks County Covered Bridge Society
- 1622 Ridge Road
- Perkasie, PA 18944
- (215) 257-9156 Ext. 33
The mission of the Bucks County Covered Bridge Society is to preserve, protect and promote the care of Bucks County's Historic covered bridges as a significant part of our area's history, culture and development."
- Credit Cards Accepted:
- Days & Hours of Operation: Join us at one of our meetings, held on the first Wednesday of each month beginning 7:30pm at the East Rockhill Township Municipal Building.
- Handicap Accessible:
- Merchandise sold in Bensalem Visitors Center: You can help raise awareness for the need to preserve the historic covered bridges of Bucks County by purchasing wooden ornament, cookie cutters, books and official merchandise.
- Payment Policy: For donations we accept Visa Mastercard, American Express, Discover and PayPal. For Membership pay online through PayPal or by printing application from website and sending check.


text:
Latest Weather Blog
What really happened on I-10?
Related Story
BATON ROUGE - Friends claim it was no prank that made a man jump off the I-10 overpass at Siegen Lane early Friday morning.
State Troopers responded to the scene and found an 18-year-old severely hurt after falling more than 30 feet.
Troopers said the man who jumped had been asleep in the car while he and two others drove to Baton Rouge from New Orleans. When the car broke down, investigators said the two others started screaming the car was on fire as a joke.
But, the driver of the car, Thomas Poche, responded Monday by saying it was no prank at all.
"It was a real fire. It was not no prank," Poche told WBRZ News 2 in an exclusive interview.
"Stop saying stuff that ain't true. That's all I can say," Tyrone Tim said, who was also in the car when the incident happened.
The man who jumped over the overpass is still recovering at Baton Rouge General from a broken thigh bone and knee surgery, according to Tim and Poche.
"i'm sorry that happened to him. I can't say no more than that," Tim said.
A tow company brought the car to Tim's home. It has a piston popped out, wires scorched and parts burned to a crisp.
Tim and Poche said they told police the same story as they told News 2.
"We gave you guys the correct information when you came out there state trooper," Poche said in a message to troopers via the TV interview.
State Police are still investigating the incident as a prank but are looking into the situation further.
Desktop NewsClick to open Continuous News in a sidebar that updates in real-time.
News Video
Flood victims could qualify for new bathroom, kitchen
New details on Vice President Mike Pence's visit to Baton Rouge Wednesday
Cop's alleged racist messages on gay chat app under investigation
Scotlandville High honors 17-year-old cancer victim at graduation ceremony
2 escape house fire on Woodglynn Drive


text:
Item: BLU129
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2,000 IU 180 Vcaps
Serving Size 1 Capsule
|Amount Per Serving
|% Daily Value
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Daily Value based on a 2,000 calorie diet.
Other ingredients: Kosher vegetable capsules, vegetable cellulose, vegetable magnesium stearate.
Directions: As a dietary supplement, take one capsule daily or as directed by a healthcare practitioner.
.70 lbs
Vital mineral for bone development, skin health and more
Natural lanolin source
Kosher and gluten free
Support bone health with Vitamin D3 2,000 IU from Bluebonnet. Vitamin D3 promotes strong bones and aids in calcium absorption. This formula delivers 100% natural vitamin D3 (cholecalciferol) from lanolin in easy-to-swallow vegetable capsules for maximum assimilation and absorption. Free of milk, egg, fish, crustacean shellfish, tree nuts, peanuts, wheat and soybeans. Also free of yeast, gluten, barley, rice, sodium and sugar.
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text:
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text:
Nothing more than the music.Mature
"F-forgive me F-father, for I have sinned," Lazarus stuttered on his knees in the confession box, "my last confession was last Sunday."
"And what is your sin, child?"
"I-I-" he swallowed, biting back his tears, "I loved another man, Father. I want to ask God to forgive me and cure me. I was weak, Father..." he sniffed and wiped his eyes as tears threatened to spill over, "I beg you to make me strong."
As Lazarus stumbled out of the church, his head spinning, he saw James walking toward the church. He gritted his teeth and stared at the floor, trying to avoid the piercing green eyes. James didn't let him slip by, though. He caught Lazarus by the arm and turned him to look up at him.
"Don't avoid me, Lazarus," he said firmly and Lazarus shook his head, looking away, trying to pull out of his grip.
"You've damned us both. Get out of my way," Lazarus growled, pulling harder to try and loosen the grasp on his arm.
"Did Annabelle say anything?"
"No, she won't speak to me. Get off me."
"I ain't sorry, Lazarus."
"You should be fucking sorry!" He shouted, punching James' nose. He recoiled, his hand flying up to his face as Lazarus ran away from him.
He ran blindly, speeding through the village to the other side, where the Emerson estate sat like an ugly, rich scar on the land. He shot into the woodland, racing past their tree, further into the woods. He wasn't paying attention to the trees thinning until he was sprinting across the vast grounds. Looking around, his eyes widened, but he didn't stop, hoping he could make it to the other side before he was noticed.
No such luck. There was a shout and as he glanced over his shoulder, he saw two of the servants chasing him. They were faster than him and caught up quickly, grabbing his arms and holding him back. He shouted wordlessly, kicking and trying to free himself, but they held on stubbornly, dragging him back to the house.
"Let go! Fucking let go of me!" he yelled as they pulled him closer to the house. They said nothing to him, instead telling another servant to fetch Mr. Emerson. Lazarus wasn't expecting Gabriel to walk out of the house. He was still screaming and struggling as Gabriel moved closer. He cursed and spat and barely noticed as his loose shirt tore in their attempt to keep him there.
"Lazarus?" Gabriel asked, cautiously. The writhing, cussing pauper boy he saw before him now was a completely different person to the boy who had sat at the piano with the music teacher.
"Lemme go!" he shouted, his voice turning hoarse and breaking.
"Calm down, Lazarus!" Gabriel cried, shocked by the boy's behavior.
"No! Let go of me ya shit-head," he snarled at the servant, ignoring Gabriel's alarmed expression.
"What do you want us to do with him, sir?"
"I-I don't know," he stuttered, torn between having him thrown off the premises and waiting for him to calm down.
"Get off me," Lazarus' voice turned into a less aggressive whine as his heart slowed and he realized just who he was making a fool of himself in front of. The servants looked at Gabriel questioningly and he nodded. They let go of Lazarus and watched uncertainly as he sat heavily on the ground, his head on his knees.
"Why are you sitting down there?" Gabriel asked, perplexed. The floor was meant for standing on, not sitting on, after all.
"I feel sick," Lazarus muttered into his legs, his hand reaching up to the tear in his sleeve, pinching the material together as he tried to hide how close he was to tears again.
"Get him a drink," Gabriel ordered and one of the servants nodded, disappearing back into the house. "Lazarus, why were you running through my grounds?" Lazarus' jaw clenched; he was in no mood for Gabriel to highlight how much richer he was, whether he meant to or not.
"I was running through the woods, I didn't mean to leave them. It was an accident."
"The woodland is private property as well," Gabriel pointed out and Lazarus closed his eyes, willing himself to stay where he was on the floor and to avoid punching the rich boy.
"Yeh, but you wouldn'ta noticed me in there would ya?"
"You were still breaking the law."
"Who gives a shit about the law?" he growled, looking up. Gabriel took half a step back, surprised by the anger and upset in Lazarus' eyes.
"Clearly not you," Gabriel muttered, looking away, glad the servant had returned with the drink. Gabriel indicated for the drink to be placed next to Lazarus on the ground and the servant obliged, before walking away again. Lazarus looked down at the drink, fruit juice in one of the servant's plain metal cups. He looked at it in dismay for a moment.
"Even your servant's get fancy shit!" he wailed, putting his head back on his knees, inwardly cursing his parents for not being wealthier, himself for being weak, and Gabriel for his awkward attempt to help him. Gabriel looked at the cup, bemused. It wasn't in the slightest bit elaborate or aesthetically pleasing to him. He couldn't work out why Lazarus was so upset, but he wasn't sure if asking would be a wise idea.
"Why- why don't you take your drink and sit in the garden...? on a bench, not the floor."
"Y'know, I was kinda expecting to be shot for trespassing, not being invited to sit in your garden," Lazarus mumbled, half lifting his head, before resting his chin on his knees, looking up at Gabriel.
"Yes, well, you might be rough, and from the village, but I don't think I could have someone so talented shot..." Lazarus rolled his eyes and looked back at the juice. Of course Gabriel wouldn't have saved him from being punished out of the goodness of his heart; it was always about the talent. People didn't seem to see anything more than good music.


text:
Nimotop 30mg and/or Equivalents
Nimotop 30mg
Product of Canada
Manufactured by: Bayer
This product is offered for sale by Canada Drugs LP of Canada
From $14.54 USD/capsule
CAN NOT BE SPLIT Must be taken in existing form.
No Generic Alternative Available
No generic alternative is available for this drug.
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Nimotop 30mg
Product of Canada — Manufactured by: Bayer
|$14.54 USD/capsule
No generic alternatives are available for this drug.
Nimotop and/or Equivalents warnings, side-effects and general information


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hi,i am pretty muck new to knitting. i recently shopped for baby pattern book online and turns out most of the item fits only up to 12m. i was looking to knit for 12-18m. it's only one size up, but i am not very good at improvising and worried that the shoulders and hips might be too tight even if i can elongate the sleeves and the hems. is there a certain calculation to enlarge patterns for bigger kids? can i use slightly heavier yarn and fatter needles to bring it one size up? i want to knit jackets, sweaters, and rompers.
Yes you can use larger needles, and even larger needles and heavier yarn, though if the pattern is worsted weight, just use bigger needles. Bulky yarn doesn't seem to go well with baby patterns. If it's the Debbie Bliss book you're looking at, I've heard her patterns run quite large.
yes! it is debbie bliss. well, i got carried away and bought 2 other ones, too. do you think i can some how make 6m romper pattern (not debbie bliss) into 12-18m size?
Yes, you could. If the pattern is for thin yarn and small needles, use heavier yarn and bigger needles. Knit up a sample and see what you get.
Hi,I am just finishing up the cowel neck baby sweater of Debbie Bliss and made the 6-12 month size and I saw my nephew last week and he is 5 months old and is a good 5 month old size....this sweater will not fit him till he is ready for college! Just kidding, but really this is a LARGE 12 month size.I have knit alot of Debbie Bliss and everyone runs like one size up.
thanks both of you for the advise!i've done one of the sweater from debbie bliss and it is big. i guess if i knit in time, 9-12m should be good fit for my daughter for this winter. and hopefully by the end of the new jacket, i'll have mastered some skill to be confident enough to impov on the romper....


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|Jan 13
|Gottfried Heinrich Stölzel a prolific German baroque composer.
|Jan 22
|Nicolas Lancret born in Paris, and became a brilliant depicter of light comedy which reflected the tastes and manners of French society under the regent Orleans.
|Feb 1
|Francesco Maria Veracini an Italian composer and violinist, perhaps best known for his sets of violin sonatas. As a composer, according to Manfred Bukofzer, "His individual, if not subjective, style has no precedent in baroque music and clearly heralds the end of the entire era" , while Luigi Torchi maintained that "he rescued the imperiled music of the eighteenth century". His contemporary, Charles Burney, held that "he had certainly a great share of whim and caprice, but he built his freaks on a good foundation, being an excellent contrapuntist". The asteroid 10875 Veracini was named after him
|Feb 3
|Richard Rawlinson an English clergyman and antiquarian collector of books and manuscripts, which he bequeathed to the Bodleian Library, Oxford.
|Feb 5
|Johann Daniel Schumacher the secretary of the Russian Academy of Sciences and director of the Library of the Russian Academy of Sciences, during the Russian Empire.
|Feb 9
|Maria Vittoria of Savoy a legitimated daughter of Victor Amadeus II of Sardinia, first king of the House of Savoy. Married to the head of a cadet branch of the House of Savoy, she is an ancestor of the kings of Sardinia and of the Savoy kings of Italy
|Mar 1
|Silvio Valenti Gonzaga an Italian nobleman and Catholic priest.
|Mar 18
|Christian Goldbach a German mathematician who also studied law. He is remembered today for Goldbach's conjecture
|Mar 23
|Casimir William of Hesse-Homburg a prince of Hesse-Homburg.
|Apr 20
|Gabriel of Belostok a child saint in the Russian Orthodox Church. The legend of his death describes a ritual murder which has been described as a blood libel. His feast day is held on April 20 / May 3
|Apr 22
|John Carteret 2nd Earl Granville a British statesman and Lord President of the Council from 1751 to 1763; effectively leader of the country when Spencer Compton was Prime Minister.
|May 25
|Joseph Johann Adam Prince of Liechtenstein the Prince of Liechtenstein from 1721 to his death.
|Jun 9
|Michel-Étienne Turgot prévôt des marchands de Paris from 1729 to 1740. His name is associated to one of the most famous maps of Paris, the "Plan de Turgot" , a detailed bird-eye view of Paris realized by Louis Bretez from 1734 to 1739
|Jun 11
|Giovanni Antonio Giay an Italian composer. His compositional output includes 15 operas, 5 symphonies, and a significant amount of sacred music
|Jul 7
|Johann Tobias Krebs a German organist and composer.
|Sep 12
|Peter Dens a Flemish Roman Catholic theologian.
|Sep 15
|Ignazio Prota an Italian composer and music educator. He was the father of composer Tommaso Prota and the grandfather of composer Gabriele Prota
|Sep 18
|Charles Louis Duke of Schleswig-Holstein-Sonderburg-Beck a Lieutenant General in the Prussian Army and Governor of Reval in the Governorate of Estonia.
|Oct 28
|Peter Tordenskjold a Norwegian nobleman and an eminent naval flag officer in the service of the Royal Dano-Norwegian Navy. He rose to the rank of Vice-Admiral for his services in the Great Northern War. Born in Trondheim, Peter Wessel travelled to Copenhagen in 1704, and was employed in the navy. He won a name for himself through audacity and courage, and was ennobled as Peter Tordenskiold by King Frederick IV in 1716. His greatest exploit came later that year, as he destroyed the supply fleet of Charles XII of Sweden at the Battle of Dynekilen. In 1720, he was killed in a duel. In Denmark and Norway he is among the most famous national naval heroes. He experienced an unusually rapid rise in rank and died when he was only 30 years old
|Oct 29
|Martin Folkes PRS , English antiquary, numismatist mathematician, and astronomer.
|Nov 17
|Noël-Nicolas Coypel a popular French artist.
|Nov 22
|François Colin de Blamont a French composer of the Baroque era.
|Nov 23
|Ernst Johann von Biron a Duke of Courland and Semigallia and regent of the Russian Empire.
|Nov 29
|Christian August Prince of Anhalt-Zerbst a German prince of the House of Ascania. He was a ruler of the Principality of Anhalt-Dornburg, then, from 1742, a ruler of the entire Principality of Anhalt-Zerbst. He was also a Prussian Generalfeldmarschall, but is best known for being the father of Catherine the Great of Russia
|Dec 1
|Philip Yorke 1st Earl of Hardwicke an English lawyer and politician who served as Lord Chancellor. He was a close confidant of the Duke of Newcastle, Prime Minister between 1754 and 1756 and 1757 until 1762