text:
|Publication number
|Publication type
|Application number
|Publication date
|Sep 6, 1994
|Filing date
|Oct 31, 1991
|Priority date
|Oct 31, 1991
|Fee status
|Also published as
|Publication number
|Peter A. Franaszek, Christos J. Georgiou
|Original Assignee
|International Business Machines Corporation
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (7), Referenced by (20), Classifications (8), Legal Events (5)
|External Links: USPTO, USPTO Assignment, Espacenet
1. Field of the Invention
This invention relates generally to crosspoint switches and more specifically to arrays of single-sided crosspoint switching elements with distributed control, particularly such arrays which can be modularly increased in size and are fault tolerant.
2. Prior Art
There is a need for very large switching systems, i.e., systems with hundreds or even thousands or ports, that can be used, for example, to interconnect processors to memories in highly parallel machines or processors to their peripheral devices in computer system I/O configurations.
Various high-performance switching fabrics have been described in the prior art for use as switching systems for computer applications. Distributed control of a crosspoint switch is described by L. D. Amdahl et al. in U.S. Pat. No. 3,226,688, entitled "MODULAR COMPUTER SYSTEM". It is also described by P. A. Franaszek in U.S. Pat. No. 4,752,777, entitled "DELTA NETWORK OF A CROSS-POINT SWITCH", and in U.S. Pat. No. 4,814,762, entitled "DELTA NETWORK CONTROL OF A CROSS-POINT SWITCH." However, all these patents describe two-sided crosspoint switches. One-sided crosspoint switches are inherently more complicated to control, since they have twice the number of crosspoint elements for a particular number of ports and also have internal busses (unlike two-sided crosspoint switches). Each interconnection of two ports through a one-sided crosspoint switch requires the setting of two crosspoint elements and there are numerous possibilities for each interconnection (one for each internal bus). All this makes one-sided crosspoint switches inherently much more flexible, but at the same time makes one-sided crosspoint switches more expensive and more difficult and unobvious how best to control, especially if distributed control is desired.
An important consideration for the design of very large switching systems is the performance of the controller. A switch with a single controller can service a large number of requests by using parallel pipeline techniques, as described by C. J. Georgiou in U.S. Pat. No. 4,630,045, entitled "CONTROLLER FOR A CROSS-POINT SWITCHING MATRIX." But as the size of the switching matrix grows, the worst-case waiting time for servicing requests also grows linearly with the number of ports, and may become unacceptably long.
For example, in a 60-port switch with a single controller, such as the IBM ESCON Director switching system described in the paper "The ESCON Director: A Dynamic Switch for 200 Mb/s Fiber-Optic Links," by C. J. Georgiou, et al, IBM Journal of Research and Development (October 1991), the worst-case waiting time is of the order of 12 microseconds. This is not significant in the current I/O environment that assumes a network with a 3 kilometer radius, because the signal propagation delay in the optical fibers (5 microseconds/kilometer) would dominate the network delay (i.e., 30 microseconds for a 3 kilometer round-trip transmission). But if the size of the switching system were to grow to 1000 ports, the worst-case waiting delay could become 220 microseconds, which would seriously affect system performance.
In U.S. Pat. No. 4,605,928, entitled "FAULT-TOLERANT ARRAY OF CROSS-POINT SWITCHING MATRICES", C. J. Georgiou describes a one-sided crosspoint matrix switch that is used to provide fault-tolerance and expandability to the switching system, but only one controller is used. In U.S. Pat. No. 4,929,940, entitled "COLLISION CROSSBAR SWITCH", Franaszek et al. describe a self-routing crosspoint matrix switch which avoids the need for determining in advance whether the desired output port is available for connection or is already connected to another port. This facilitates distribution of crosspoint control throughout the switching system, but what is specifically described is a two-sided crosspoint switch rather than a one-sided crosspoint switch. Furthermore, if too many collisions occur, performance of the switch suffers. It is not clear that in a situation where controller performance is a limiting factor (and especially in the case of a one-sided crosspoint switch) that collision frequency will not be unacceptable.
In a co-pending patent application, Ser. No. 429,674, U.S. Pat. No. 5,072,217, entitled "ONE-SIDED CROSSPOINT SWITCH WITH DISTRIBUTED CONTROL", by C. J. Georgiou and A. Varma, a switching system is described that uses multiple controllers to reduce the worst-case waiting time. A distinct group of internal busses is associated with each controller, which also controls all of the crosspoint switching elements connected to the group of busses associated with that controller. However, port status information is shared and commonly accessed, which may become a bottleneck point in large switching configurations, even if the port status information is distributed in some way among the controllers, which may significantly affect the overall system performance. Furthermore, interconnection possibilities are distributed among the controllers for handling responsibility. As a consequence, each controller must monitor all of the connection requests in order to determine which ones are to be handled by that controller. As the size of the switch gets ever larger, this monitoring task becomes impractical to implement with efficiency and turns into a bottleneck function.
Another major consideration in computer input/output (I/O) switch design is upgradability. For example, a user may initially want to install a 250-port switching system which, later, may need to be upgraded to 1000 ports. It would be advantageous to have a switch that could be readily field-upgraded to higher capacity. Similarly, it would be very advantageous for the switch manufacturer to have a design that could be easily mapped to switches of various sizes. In the aforementioned co-pending patent application, some modularity is apparent, but it is not clear that an additional column of crosspoint chips could be added easily, for example, without adding an additional controller or doing some rewiring, or that the failure of a controller will not also result in the loss of all of the internal busses controlled entirely by that failed controller.
It is an object of this invention to provide an improved large scale single-sided crosspoint matrix switch having a distributed control function which is completely modular and easily increased in capacity without stressing the performance of any of its components.
It is also an object of this invention to provide such a switch in which the number of switch ports can be increased without requiring each controller to have increased function (i.e., capability to serve an increased number of ports).
A further object of this invention is to provide such a switch in which the number of switch ports can be increased without requiring each controller to monitor all connection requests in the system.
Still another object of this invention is to provide such a switch in which the number of switch ports can be increased without requiring additional status requests to some central table.
Another object of this invention is provide such a large scale crosspoint switch which is fault tolerant.
These and further objects and features are provided by this invention by making each of the switch resources (i.e., switch ports, internal busses and controllers) modular in design and by: (1) assigning each switch port uniquely to one of the controllers; (2) making each controller handle only the crosspoints connected to the switch ports assigned to it; (3) assigning each internal bus uniquely to one of the controllers; and (4) providing a means for the controllers to communicate with each other.
Modular growth of any of the switch resources (i.e., switch ports, internal busses and/or controllers) is accommodated by effectively reallocating (i.e., modifying the assignment of) some or all of the resources. Failure of a switch resource is accommodated also by effectively reallocating (i.e., modifying the assignment of) some or all of the remaining usable resources. It is contemplated that modification of resource allocation can be done in various alternative ways, either physically or electronically, including automatically and even dynamically.
FIG. 1 is a partially functional and partially physical representation of a preferred embodiment of a crosspoint switch in accordance with this invention.
FIG. 2 is a more detailed representation of a portion of FIG. 1 illustrating interconnections made with a particular protocol.
FIG. 3 is another detailed representation of the same portion shown in FIG. 2 and illustrates interconnections made with another protocol.
FIG. 4 illustrates a preferred implementation of the crosspoints using transfer gates.
The preferred embodiment is a structure that provides a highly modular switching architecture which is especially suited, but not limited, to backend, serial-I/O-type networks. This architecture eliminates the performance and expandability limitations of prior art approaches. It establishes a full-duplex connection between two ports in a large switching system.
Switch ports are viewed as shared resources for which conflicts may arise when two or more source ports need to connect to the same destination port simultaneously. Such a conflict is not resolved by means of a centralized controller or a commonly accessed table that serializes all requests as has been done in the prior art. Instead, if multiple ports receive connection requests for the same destination port, the resulting conflict is resolved by the destination port. To do so, each source port sends a connection request to the destination port, and receives either a positive response, indicating that the connection can be made, or a negative response. To avoid data-transmission conflicts, in the event that the destination port is already connected, two separate networks are used. A control transmission network is used for the exchange of connection-request messages, and a transport network is used For the transmission of data messages. Controllers assigned to each port or to groups of ports resolve destination conflicts, and carry out the interport communication function. Switch resources, such as ports, connection-status tables, and data-transport network busses (i.e., internal busses) are partitioned among the controllers. A method For establishing connections is also provided, that can be implemented in one of the following two ways:
1. The source-port controller sends a request for the desired port, while reserving the source port and the forward and return paths to the destination port. An acknowledgement (ACK) from the destination-port controller means that the connection to the destination port can be established. This approach makes the return portion of the control network particularly simple.
2. The source-port controller sends a request for the desired port while reserving the source port and the Forward path to the destination port. A response message from the destination-port controller allocates the destination port and return path. This approach offers higher flexibility in allocating the internal connection paths of the data-transport network.
A preferred switch implementation based on these principles is shown in FIG. 1. I/O ports 10 carry out interface functions such as optoelectronic conversions, buffering, and command decoding (e.g., commands for connection/disconnection). A data-stream received over fiber-optic links (not shown) is routed from a source port (e.g., port 10A-1) to a destination port (e.g., port 10C-3) via a data-transport network 12. The data-transport network 12 operates at the same bandwidth as the bandwidth of the fiber-optic links. It is organized as a one-sided matrix switch implemented as an array of modular units 12A-12D and can operate either in a non-blocking or blocking configuration. U.S. Pat. No. 4,635,250, entitled "FULL-DUPLEX, ONE-SIDED CROSS-POINT SWITCH", by C. J. Georgiou describes the structure of one-sided matrix switches, and is hereby fully incorporated by reference.
The switch is partitioned in groups of ports, each such group 10A-10D being serviced by the corresponding one of the controllers 14A-14D. The data-transport crossbar 12 is partitioned horizontally also, so that a particular controller can set only the crosspoints that correspond (i.e., are directly connected) to its group of ports. If a connection request is made for an interconnection between two ports serviced by the same controller (i.e., ports in the same port group), the controller proceeds to establish the connection. If, on the other hand, the requested connection is to a destination port in another port group serviced by another controller, the controller servicing the source port must communicate with the controller servicing the destination port to determine if the connection can be made (i.e., determine if the destination port is Free). The number of ports in a group may vary depending on system performance requirements (e.g., the allowable worst-case queueing delay).
Communication between controllers is done over a communication or control network 16 via port adapters 18. Communication network 16 may be a contention crossbar as shown in FIG. 1. Other types of interconnection networks could also be used as the control or communication network, such as banyan, banyan with backward threads, etc. The choice of interconnection network may depend on various design parameters, such as switching system performance, minimization of part numbers, etc.
The data-transport network 12 is a one-sided crosspoint matrix switch. Therefore, two crosspoints must be specified for making a connection. A controller must provide three addresses to the crosspoint chips: 1) The address of the crosspoint row that corresponds to the source port; 2) the address of the crosspoint row that corresponds to the destination port; and 3) the address of the crossbar column (i.e., internal vertical bus) on which the connection is to be made. Column addresses (i.e., internal busses) are allocated to (i.e., partitioned among) the controllers at initialization time. The internal busses assigned to a controller are reserved for use by that controller. The internal busses (i.e., column addresses) can be reallocated at a later time, in order to bypass failed matrix chips or controllers.
Allocation of internal busses to controllers is preferably done by another controller 14Z that supervises the operation of the system. Such a supervisory controller (i.e., control processor) is equivalent in function to the Control Processor in the IBM ESCON Director described in the article cited earlier, which is hereby incorporated by reference. Control processor 14Z can (but does not necessarily) monitor the system and can (but does not necessarily) dynamically assign internal busses. Since modification of internal bus assignments is not needed very frequently, there is no need for a protocol which will allow internal bus assignments to be changed without interrupting existing interconnections.
Control processor 14Z communicates with the other processors via the control network 16. Updated bus assignments are communicated by the control processor to the other controllers over the communication lnetwork 16.
Control processor 14Z may keep an assignment table for storing the current internal bus assignments or this information could be distributed among the other controllers. The assignment table function for the internal busses in this invention is very much like the connection status table function found in the IBM ESCON Director. The controller in the ESCON Director also is described in U.S. Pat. No. 4,630,045, which is hereby incorporated by reference. A connection status table (or port status table) may be found as well in the co-pending patent application cited earlier, which is hereby incorporated by reference as well. This co-pending patent application also describes a port address lookup table which stores interconnection request possibilites assigned to a controller. Internal busses are assigned and managed in this invention in the same fashion that interconnection request possibilities are assigned and managed in that co-pending application. Control Processor 14Z in this application and the System Support Processor 22 in that co-pending application have analogous function, the main difference lying in what is being managed.
No elaborate algorithm is needed to make internal bus assignments. A policy that equally divides the columns (i.e., internal busses) among the controllers is a simple and generally acceptable approach.
If a connection is to be made between two different switch partitions A-D, the controllers of those partitions must communicate with each other before establishing the connection. As previously discussed, there are two different methods that can be followed.
In the first method, the source-port controller allocates both the forward and return paths in the data-transport network. The source-port controller forms a message consisting of the source-port forward/return column pair, a control-bit indicating a request for connection, and CRC (Cyclic-Redundancy-Check) bits, and transmits it to the destination-port controller via the control network. The destination controller receives this information, finds out if the connection is possible and transmits back to the source controller an acknowledgment message.
FIG. 2 shows an example of a switching system with 8 ports (ports 10A-1 through 10D-2) divided into 4 partitions (port groups 10A through 10D), so that each controller 14A-14D services 2 ports. The columns in the data-transport crossbar are pairs of unidirectional internal busses 20A-20D. Each controller is assigned a column pair, so that controller 10A is assigned column-pair (i.e., internal busses) 20A, controller 10B is assigned column-pair 20B, and so on. Assume, for example, that port 10A-1 needs to be connected with port 10C-1. Controller 10A forms a message containing the address of source-port 10A-1, the address of destination-port 10C-1, the address of column-pair 20A, and a control bit requesting connection, and sends it to controller 10C via the control network 16. At the same time controller 10A sets two crosspoints in the data-transport crossbar to connect the horizontal bus-lines attached to port 10A-1 to the internal busses 20A.
Upon receiving the connection-request message, controller 10C examines whether port 10C-1 is already connected and, if not, it sends an acknowledgment message to controller 10A via the control network. At the same time, it sets two crosspoints in the data-transport crossbar to connect the horizontal bus-lines attached to port 10C-1 to the internal busses 20A. This concludes the establishment of the connection and data-frames can be transmitted between the two ports. This interconnection is shown in FIG. 2 as a heavy hi-directional path 30. FIG. 2 also shows an interconnection between ports 10B-1 and 14D-2 as path 32. It should be apparent that this interconnection 32 was formed by controller 14D because it utilizes the internal-busses 20D which have been assigned for use by controller 14D.
Both source and destination ports monitor the transmitted data-frames for disconnect delimiters. Upon detection of such a delimiter, they request from their corresponding controller a disconnection. The controllers disconnect (i.e., unset) the crosspoints associated with this connection and update their activity tables (not shown), so that the ports become available for other connections.
In the second method, the source-port controller allocates the forward path and the destination-port controller the return path. The source-port controller forms a message consisting of the source-port address, the destination-port address, the address of the forward column, a control-bit indicating a request for connection, and CRC bits, and transmits it to the destination-port controller via the control network. The destination controller receives this information, finds out if the connection is possible and transmits back to the source controller the address of the return column.
FIG. 3 shows another example of a switching system with 8 ports (ports 10A-1 through 10D-2) partitioned again into 4 groups 10A-10D, so that each controller 14A-14D services 2 ports. The columns in the data-transport crossbar are bidirectional internal busses. Each controller is assigned two internal busses (i.e., columns), so that controller 10A is assigned columns 20A-1 and 20A-2, controller 10B is assigned columns 20B-1 and 20B-2, and so on. Assume, for example, that port 10A-1 needs to be connected with port 10C-1. Controller 10A forms a message containing the address of source-port 10A-1, the address of destination-port 10C-1, the address of column 20A-1, and a control bit requesting connection, and sends it to controller 10C via the control network. At the same time controller 10A sets one crosspoint in the data-transport crossbar to connect the horizontal bus-lines attached to port 10A-1 to column 20A-1.
Upon receiving the connection-request message, controller 10C examines whether port 10C-1 is already connected and, if not, it sends an acknowledgement message back to controller 10A via the control network, containing the address for column 20C-1. At the same time, it sets two crosspoints in the data-transport crossbar to connect the horizontal bus-lines attached to port 10C-1 to the columns 20A-1 and 20C-1. Upon receiving the acknowledgment message, the source-port controller sets the crosspoint which connects the receiving line of port 10A-1 to the return column 20C-1. This concludes the establishment of the connection and data-frames can be transmitted between the two ports. This interconnection is shown in FIG. 3 as paths 30a and 30b, which correspond with the interconnection 30 made in FIG. 2. FIG. 3 also shows an interconnection 32a and 32b, which correspond with the interconnection 32 made in FIG. 2. Disconnection takes place as described in the first method.
If the number of bidirectional columns equals the number of ports in each partition, a non-blocking switch can be configured with only N columns. Thus, the second method requires only the minimum number columns, for non-blocking operation, but at the expense of additional protocol steps, and potential connection set-up delays.
FIG. 4 shows the interconnection 30a and 30b made in FIG. 3 and illustrates a preferred implementation of the crosspoints using transfer gates. Control lines 34A originate from controller 10A (not shown) and are used to set or switch the crosspoints under the control of controller 10A. Control lines 34C originate from controller 10C and are used to set or switch the crosspoints under the control of controller 10C. Internal bus amplifiers are also shown.
|Cited Patent
|Filing date
|Publication date
|Jan 10, 1975
|Aug 10, 1976
|North Electric Company
|Small modular communications switching system with distributed programmable control
|Aug 27, 1981
|Dec 20, 1983
|Kokusai Denshin Denwa Kabushiki Kaisha
|Distributed switching system
|Oct 24, 1983
|Dec 16, 1986
|International Business Machines Corporation
|Controller for a cross-point switching matrix
|Apr 13, 1984
|Jan 6, 1987
|International Business Machines Corporation
|Full-duplex one-sided cross-point switch
|Jun 12, 1985
|Aug 4, 1987
|Compagnie Industrielle Des Telecommunications Cit-Alcatel
|Digital trunk adapter terminal unit
|May 12, 1987
|Jun 21, 1988
|International Business Machines Corporation
|Delta network of a cross-point switch
|Oct 31, 1989
|Dec 10, 1991
|International Business Machines Corporation
|One-sided crosspoint switch with distributed control
|Citing Patent
|Filing date
|Publication date
|Apr 14, 1995
|Mar 12, 1996
|Northern Telecom Limited
|Large capacity modular ATM switch
|Mar 6, 1995
|May 12, 1998
|Nvision, Inc.
|Switcher for flexibly interconnecting communication ports
|Jul 3, 1996
|Sep 8, 1998
|General Signal Corporation
|Fault tolerant switch fabric with control and data correction by hamming codes
|Jul 3, 1996
|Sep 22, 1998
|General Signal Corporation
|Fault tolerant switch fabric with control and data correction by hamming codes and error inducing check register
|Feb 22, 1996
|Nov 23, 1999
|Fujitsu, Ltd.
|Crossbar switch and method with reduced voltage swing and no internal blocking data path
|Sep 30, 1997
|May 9, 2000
|Electronics And Telecommunications Research Institute
|Crossbar routing switch for a hierarchical crossbar interconnection network
|Mar 21, 1997
|Dec 12, 2000
|Brocade Communications Systems, Inc.
|Fibre channel switching system and method
|Jul 12, 1994
|Apr 17, 2001
|Texas Instruments Incorporated
|Architecture of a chip having multiple processors and multiple memories
|Jan 26, 1998
|Oct 16, 2001
|Samsung Electronics Co., Ltd.
|Interconnection network extendable bandwidth and method of transferring data therein
|Oct 29, 1999
|Sep 30, 2003
|Cisco Technology, Inc.
|Apparatus and methods providing redundant routing in a switched network device
|Sep 22, 2000
|Mar 30, 2004
|Altera Corporation
|PCI bus switch architecture
|Oct 13, 2000
|May 4, 2004
|Brocade Communications System Inc
|Fibre channel switching system and method
|Dec 20, 2001
|Jul 13, 2004
|Computer Network Technology Corporation
|Fibre channel port adapter
|Feb 25, 2011
|Oct 1, 2013
|Fuji Xerox Co., Ltd.
|Communication device, communication system, and computer readable medium
|Jul 16, 2014
|Jul 28, 2015
|Brocade Communications Systems, Inc.
|Topology for large port count switch
|Nov 18, 2004
|May 19, 2005
|Michael Kagan
|Method and switch system for optimizing the use of a given bandwidth in different network connections
|Nov 3, 2004
|May 4, 2006
|Fenwick David M
|Optical bus system
|Feb 25, 2011
|Mar 1, 2012
|Fuji Xerox Co., Ltd.
|Communication device, communication system, and computer readable medium
|Jan 26, 1998
|May 14, 2003
|Bandwidth extendable interconnection network and method for transferring data in the same
|Nov 15, 2012
|May 22, 2014
|Empire Technology Development Llc
|A multi-channel storage system supporting a multi-command protocol
|U.S. Classification
|340/2.25, 370/384, 370/380
|International Classification
|Cooperative Classification
|European Classification
|Oct 31, 1991
Owner name: INTERNATIONAL BUSINESS MACHINES CORPORATION A COR
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNORS:FRANASZEK, PETER A.;GEORGIOU, CHRISTOS J.;REEL/FRAME:005904/0797
Effective date: 19911031
|Nov 12, 1997
|Fee payment
Year of fee payment: 4
|Mar 26, 2002
|Maintenance fee reminder mailed
|Sep 6, 2002
|Lapse for failure to pay maintenance fees
|Nov 5, 2002
|Expired due to failure to pay maintenance fee
Effective date: 20020906


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This review is from: Corsair Carbide Series 300R Windowed Black ATX Mid Tower Case
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Last week, we held the first of three Westword Music Showcase social hours. Times were had. I've spent the week listening to new music I discovered there, and I hope to find a bunch more at round two, which we'll hold tonight. You're welcome to join us from 5 p.m. to 7 p.m., again at Stoney's on 11th.
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Archives for Abnormality
Psychological Abnormality Defined
Sometimes we ask ourselves, "Am I normal?" I usually double-check whether I've closed and locked the door or not, which seems like I may have the so-called Obsessive-Compulsive Disorder. I'm also considered "arrogant" by Asian standards as I always speak my mind, thus some people consider me "narcissistic." From time to time, I wonder whether I'm "normal." What's normal enough? The question is: by whose standards are you "normal" or "abnormal" ? Depending on the society we live in, a behavior can be considered either normal or abnormal. In Japanese culture, honor is taken seriously, thus any incident that hurts one's pride is worthy of self-killing or suicide. In the United States, however, the first thought that comes to mind whenever someone kills himself is: clinical depression. Thus, culture determines whether one's behavior or suspected "psychological pathology" is abnormal or not. "Milder" and "somewhat accepted" bizarre behaviors, for instance, may be called "eccentric" instead of "abnormal." An artist who paints with his own saliva, for instance, may be considered "eccentric" instead of "abnormal."


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positioning of block elements in columns
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Hello, I need to display some data in a content pane. The data fields all have the same fixed size, but the number of fields is variable and it could become necessary to make the content pane resizeable.
My html could look like this:
I want the inner div's to align vertical up to the bottom of the outer div and then start a new column. This shows how it should look:
Can this be done without absolute positioning?
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Looks like a table to me.
It looks like a table, but it's not tabular data. The data is more or less an unordered list. I could use a table to realize the tabular design, but that would mess up the separation of content and design.
I could use absolute positioning and generate the layout with js, but if it would be somehow possible to realize this without js that would be really great. Using a table wouldn't help, because then I would have to generate the whole table with js.
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In that case you could try playing about with a ul and maximum heights but this looks to be exactly what you need http://codeasily.com/jquery/multi-column-list-with-jquery
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Early detection and prevention of eye conditions and blindness is the goal of this eye hospital located in Barrackpore in the Eastern Indian state of West Bengal. Services provided by the hospital include cataract operations, all kinds of cornea related treatments and emergency treatments using advanced equipment, an in house eye bank to assist cornea grafting, Lasik laser based surgery to correct refractive errors, retina and vitreous surgery and treatments, glaucoma treatments and paediatric ophthalmology services.
Eye Care
Laser Eye Surgery
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Should you fail to speak on behalf of a vulnerable group, do understand that you are a kind of coward.
Nova Nation Riots: When White Privilege Turns Crimes Into Celebration
"When it's black people, crime is like this one size fits all … crime is crime. When it's white people, we're required to have a nuanced understanding of crime."
Hey NRA, Changing Debate on Gun Control Requires Historical Perspective
When their argument doesn't make sense, show them why.
White Riots VS Black Protests
Ever notice how the racist media treats black protesters & white rioters differently?
A Patriotic Citizen of Baltimore Responds to Critics
What fear mongering in the media doesn't show us about protests and unrest in Baltimore City
Finding the Courage to Talk About Violence
In the wake of Baltimore's riots, Raoul Wieland explores the nature and implications of violence and the social disconnection that inflames it.
Riot Hypocrisy?
James Rigdon has lived in "riot zones", and he has a question for all the mainstream media outlets.
Ferguson, the Murder of Michael Brown, and the St. Louis Cardinals
Native St. Louisan Ted Lewis was appalled by the way some Cardinals fans reacted to protestors. Baseball should unite us all.
Protest of Questionable Police Shooting Turns Violent in Brooklyn
Another black teenage boy shot dead, but this time, the vigil gives way to violence.
Diary of a Gay Skinhead
Brotherhood means answering when your friend has the courage to ask. A excerpt from Pedro Serrano's book, Pride—Diary of a Gay Skinhead, in the Men and Suicide series.
Anger of Muslims
Brandon Ferdig is incredulous that the extended trailer for 'Innocence of Muslims' is responsible for riots in the Middle East.
Where Do Pride Parades Come From?
Heather N. takes us back to Stonewall, birthplace of the modern Gay Pride movement.
Is #OccupyWallStreet the First Online Riot?
Megan Rosker visited Liberty Plaza and found the protests surprisingly subdued.
Social Media Plays Reverse Roles in First and Third World
Could social media lead to an uprising, like the London riots, in the United States?


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Located in Porto Seguro (Coroa Vermelha), Pousada Lua de Tomate is minutes from Muta Beach and Discovery of Brazil Memorial. This pousada is within close proximity of Coroa Vermelha Beach and Indigenous Museum.
Make yourself at home in one of the 28 air-conditioned rooms featuring minibars and flat-screen televisions. Complimentary wireless Internet access keeps you connected, and satellite programming is available for your entertainment. Bathrooms with showers are provided. Conveniences include ceiling fans and blackout drapes/curtains, and housekeeping is provided daily.
Enjoy recreation amenities such as an outdoor pool or take in the view from a garden. Additional amenities at this pousada include complimentary wireless Internet access, a television in a common area, and tour/ticket assistance.
While enjoying a refreshing dip in the pousada pool, you can order your favorite drink at the poolside bar. A complimentary buffet breakfast is served daily.
Business, Other Amenities
Featured amenities include dry cleaning/laundry services and luggage storage. Guests may use a roundtrip airport shuttle for a surcharge, and free self parking is available onsite.


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House hunters looking to move into a property that has all the living areas on one level should consider visiting Bath's leading new property development.
Local regeneration development Arborfield Green has welcomed its first residents following the first property completions on site. Families moved into the newly completed two, three and four bedroom homes towards the end of 2016 and are looking forward to a 2017 spent in the flourishing Garden Village community. The new Residents were welcomed to their homes by the on-site Crest Nicholson sales team and Mark Ashwell, Wokingham Borough Council's Executive Member for Planning and Regeneration.
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Now it begins...
Michael Bay In Negotiations To Return For A Fourth TRANSFORMERS Movie
Michael Bay In Negotiations To Return For A Fourth TRANSFORMERS Movie
Vulture is reporting that director MichaelBay is in final negotiations for his fourth 'Transformers' movie. Filming could begin as soon as the winter of 2012.
Vulture is reporting that the king of orange/blue lighting and sunsets is about seal up a deal that would bring him back for a fourth Transformers. The director is currently working on a much smaller project, Pain and Gain. It is believe that Pain and Gain isn't very complex and he'll be able to work on pre-production for his fourth rock'em sock'em robots extravaganza while filming Pain.
According to the insiders over at Vulture, director Michael Bay has wanted to adapt Pain and Gain almost since its publication in 1999. The sources says, "Without Pain, there's no tit for tat. That's Paramount's leverage."
Paramount "does not have a closed deal" with Bay yet, but an official announcement could come as early as next week. Details on the next part of the Transformers chapter are still a secret. The site goes to say that it will go deeper into the Transformers mythos, and that it will not be a prequel.
"Regular people might not care about bringing out a character like Sentinel Prime," says one of our insiders, referring to the little-known character who played a major part in last summer's Transformers: Dark of the Moon, "But believe me, fans of the series cared."
If both projects come to a deal, Bay may start shooting Pain and Gain as early as next spring. After that, he would start filming the new Transformers movie by winter of 2012.
"Spielberg does this all the time," says our insider, "where you're doing art development and visual effects tests on your next movie while you're still shooting the current one. The beauty of Michael doing Pain and Gain is that there's no [technical] complexity to it compared to Transformers."


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Andrew Vann
Royal Far West
We need your help to reach disadvantaged and vulnerable Australian children with developmental, behavioural, learning, emotional and mental health disorders.
Help us care for kids in Manly and their local communities by delivering the care they need, faster.
* $55 assesses a child for speech pathology
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Every child deserves access to specialist health and development care. Your support will transform the life of a child in need.
Thank you.
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Since its establishment in 1989, Charles Sturt University (CSU) has grown to become Australia's largest regional university and the country's leading provider of distance education. The University's origins date back to the establishment of Experimental Farms in Bathurst in 1895 and Wagga Wagga in 1896, and its history includes the development of Teachers Colleges on those sites in Wagga Wagga in 1947 and Bathurst in 1951.The growth and evolution of these institutions led to the formation in 1989 of CSU, which incorporated what had by then become the Mitchell College of Advanced Education at Bathurst and the Riverina-Murray Institute of Higher Education at Wagga Wagga. Today CSU is prides itself on providing quality education to rural communities and connecting with and contributing to those communities. We have a new campus in Port Macquarie as well as Sydney, Wagga Wagga, Bathurst, Goulburn, Canberra and Albury.
- Andrew Vann: $1,060.00
- Shirley Alexander: $265.00


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Check in from 14h / Check out prior to 10h
Bansko Castle Lodge Apartments: Find photos, reviews, information, amenities and compare prices for 3 stars hotels in Bansko, Bulgaria.
Bansko Castle Lodge Apartments is situated in Bansko and features outdoor tennis courts. The property offers a sauna, as well as apartments with private terraces.
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Guests of Castle Lodge have access to its wide variety of outdoor activities, such as hiking, fishing and horse riding. Family facilities include a playground.
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|Publication number
|Publication type
|Application number
|Publication date
|Sep 15, 1992
|Filing date
|Mar 19, 1990
|Priority date
|Mar 19, 1990
|Fee status
|Also published as
|Publication number
|Scott C. Knauer, Arun N. Netravali, Eric D. Petajan, Peter H. Westerink
|Original Assignee
|At&T Bell Laboratories
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (9), Referenced by (5), Classifications (16), Legal Events (4)
|External Links: USPTO, USPTO Assignment, Espacenet
This invention relates to high definition television. More particularly, this invention relates to a method and apparatus for efficiently encoding and decoding video signals for HDTV.
This application is related to a number of applications filed on even date heredity, titled: "A High Definition Television Arrangement Employing Motion Compensated Prediction Error Signals", "A High Definition Television Arrangement With Signal Selections Adapted to the Available Transmission Capacity", "A High Definition Television Arrangement Including Noise Immunity Means", and "A Television Signal Arrangement Where Selected Signals are Encoded Digitally".
Video signals typically originate from video cameras. The bandwidth of video signals is quite substantial and, consequently, practitioners in the art have tried to reduce the bandwidth of these signals without unduly degrading the images. Typically, to reduce bandwidth, the video signals are encoded, and redundancies in the encoded signals are extracted and deleted. Different techniques are used in the art. Some are better suited for still images, while others are better suited for moving images. One of the techniques for reducing the bandwidth of moving images is generally referred to as motion compensated predictive coding.
In conventional motion compensated predictive coding, each video frame is first partitioned into square block of picture elements (pels): such as blocks of 8 pels by 8 pels. Each block is coded, in turn, and the developed encoded sequence is transmitted over a communications channel to a decoder. The communications channel may be, or may include, a storage element. Following the partitioning step in the encoding process, a determination is made as to whether or not the pels of the block have changed significantly compared with the previous frame. If not, an indicator signal is sent which signifies to the decoder that it needs to merely repeat the pels of that block from the previous frame to obtain the pels for the current block. The step is known as "Conditional Replenishment". If the pels have changed since the previous frame, an attempt is made to determine the best estimate of motion that is occurring in the block. This is frequently done by a "Block Matching Motion Estimation" technique wherein the pels of the current block are successively compared with various small shifts of the corresponding block in the previous frame. The shift that gives the best match is deemed to be the "best estimate" of the displacement in the block's image between frames, and the amount of this shift, called the "Motion Vector", is selected and sent to the decoder.
The "best estimate" is, of course, the estimate the yields the smallest difference signal between the image in the current block and the image in the shifted block of the previous frame. This difference signal forms the error signal. When the error signal is sufficiently small, an indicator signal is sent to the decoder, which merely causes the pels of the shifted block from the previous frame to be repeated for the pels for the current shifted block. Such blocks are said to have been successfully "Motion Compensated". However, if there is a significant difference between the two blocks the difference is encoded and sent to the decoder so that the pels of the current block may be more accurately recovered. Coding of this difference is typically performed by means of the "Discrete Cosine Transform" (DCT). It is a measure of energy.
The amount of coded information that is generated by the above procedure is variable. It can be appreciated, for example, that image changes that do not correspond to a uniform translation, or motion, of the image may require substantial encoding to described the deviation of a block from its best translated replica. On the other hand, when the image does not change between successive frames, then there is a minimal amount of information that needs to be encoded. To accommodate these potentially wide variations in the amount of code that needs to be transmitted, typical encoders include a memory at the output, to serve as a buffer.
The buffer is not a panacea, however. For a given transmission rate, when an excessive volume of data is generated, there is always a danger that the FIFO would overflow. When it does, coding must stop until the transmission channel can empty the FIFO sufficiently to permit new data to be inserted.
All of the above teachings in the art deal with the coding and decoding aspects of reducing the bandwidth of the TB signal, but none deal explicitly with the formatting of the signal in preparation for transmission. When it comes to high definition television, both the bandwidth and the formatting problems must be solved and the difficulties are even greater than in connection with conventional TV signals because the desired signal compression is even greater, and because the requirement for a more authentic representation of the original image are more stringent.
A high definition television system that is characterized by low transmission bandwidth is achieved by removing much of the redundancies in the signal, efficiently encoding the remaining signals, and transmitting the encoded signal in a manner that is most compatible with the applicable standards. Whatever specific encoding method is employed, it is certain that some samples will have a low amplitude while other samples will have a high amplitude. Both contribute to a widening of the dynamic range of the encoded signal. In accordance with this invention, the dynamic range is reduced by combining groups of adjacent samples that are smaller than a "floor" threshold to form larger samples, and by splitting samples that are larger than a "ceiling" threshold to form a plurality of smaller samples. Encoding of the combined samples is carried out in a conforming manner to minimize deleterious effects of transmission noise.
FIG. 1 depicts the conventional television scan arrangement;
FIG. 2 presents a block diagram of a signal encoder embodying the principles of this invention;
FIG. 3 presents a block diagram of the signal encoder portion of a video transmitter;
FIG. 4 is a detailed block diagram of the motion compensator circuit in the FIG. 2 transmitter;
FIG. 5 illustrates the concept of motion compensation;
FIG. 6 develop one structure of the two-dimensional transformation circuit in the FIG. 2 arrangement;
FIG. 7 presents a pictorial view of the subbands developed in the transmitter and the vectors that define the subband signals;
FIG. 8 depicts a PAM signal and its utilization of the available transmission capacity;
FIG. 9 presents a portion of an encoding look-up table that is useful in encoding two samples into one;
FIG. 10 presents the block diagram of one arrangement of the encoder within the FIG. 2 transmitter;
FIG. 11 presents the block diagram of another arrangement of the encoder within the FIG. 2 transmitter;
FIG. 12 is a block diagram of a transmitter which includes leak and a controllable gain feature; and
FIG. 13 is a block diagram of a receiver that comports with a transmitter of FIG. 12.
FIG. 1 depicts a conventional TV raster. The picture is developed by scanning the image one line at a time. Each scan line (21) is followed by a horizontal retrace 22 and the last line of the frame is followed by a vertical retrace 23 which includes a vertical sync pulse embedded in the retract interval. Conventional TV includes an "interlace" concept, but for the purposes of this description it is of no significance. It may be noted, however, that the aspect ratio of HDTV, which is expected to be 16 to 9, is different from that of conventional TV. This face also has very little significance to this description.
FIG. 2 depicts a general block diagram of a video transmitter. Block 110 is responsive to an incoming frame and to a frame within buffer 160. It develops low frequency coefficients (LL coefficients) and motion vectors which are applied to formatter 170 and translation circuit 150, and motion-compensated prediction error signals which are applied to transformer block 120. Block 120 performs a transformation on the applied signals (basically a time domain to frequency domain transformation and applies the results to encoder block 130. Encoder 130 develops a greatly reduced set of signals, in the form of discrete amplitude error signals and vector index signals, which, in combination, represent the signals created in block 120, and forwards the signals streams to formatter 170 and combiner 159. The signals developed in encoder 130 are selected and arranged to fill the available transmission capacity with the information that is most important for an authentic recreation of the original image.
In the feedback portion of the transmitter, combiner 159 is responsive to the error signals and the vector index signals of encoder 130. Its function is to recover the frequency coefficients that were selected and encoded in block 130. Its output is applied to transform circuit 161, and its function is to reconstitute, as best it can, the input signals of transformation block 120. The output of block 161 is added in element 180 to a motion compensated estimate of the frame and the sum is placed in buffer 160. The motion compensated estimate is developed in translation circuit 150 which is responsive to buffer 160 and to the motion vectors.
Formatter 170 combines the information supplied by blocks 130 and 110 with audio information associated with the frame, and creates a signal in a format that is suitable for whatever transmission medium is employed by the user. In accordance with one aspect of this invention, the error signals developed by encoder 130 are organized to fit within, and a formatted to be in, the line scan interval of the frame. All of the other signals applied to formatter 170 are encoded into the retract interval of the frame.
The receiver that corresponds to the transmitter of FIG. 2 is shown in FIG. 3. It includes a separation block 190 which recovers the audio signals, the LL and motion vectors signals of block 110 and the output signals of encoder 130. The signals corresponding to the output signals of encoder 130 are applied to combiner block 163. Like combiner block 159, block 163 recovers the frequency coefficients selected and encoded in block 130. The output is applied to transform circuit 155 which reconstitutes, as best it can, the input signal of transformation of block 120. Concurrently, the motion vectorsw developed in block 110 are applied to translation circuit 164 which modifies the output of buffer 165 in accordance with those vectors. The result is applied to adder 185 which sums the output signals of blocks 155 and 164 and applies the results to buffer 165. Buffer 165 contains the LL video frame information of the receiver (which is the image, minus the portion represented by the LL coefficients). Concurrently with the processing in element 155 and 185, the LL coefficients of block 290 are applied to transform block 188 which develops the LL image of the receiver. The LL image is added the LL image in element 186, to form the final receiver frame. The frame is processed and displayed, and the associated audio is processed and converted to sound.
The details of motion compensation block 110 are shown in FIG. 4. Therein, the incoming frame is connected to buffer 102 and to two-dimensional low pass filter 103 coupled to sub-sampler 115. Filter 103 contains a conventional low pass filter 104, a buffer 105 for rearranging the data, a conventional low pass filter 106 responsive to buffer 105, and a buffer 107 for a second rearranging of the data. Filter 103 thus develops two-dimensional low frequency coefficients (LL coefficients) which are subsampled in 115 and applied to formatter 170. The subsampled output of filter 103 is also applied to transform block 108 which develops an LL image corresponding to the LL coefficients. While the LL coefficients the LL image are developed, the applied image frame is delayed in buffer 102. The delayed image and the LL image are applied to subtracter 109, which subtracts the LL image from the applied image to yield an image where the low spatial frequencies are missing (i.e., the LL image). The LL frame output of subtractor 109 is applied to frame buffer 111, to motion vectors generator block 112 and to adder 114. As the LL frame is stored in buffer 111, the previously stored LL frame is extracted from buffer 111 and applied to motion vectors generator block 112. Motion vectors generator 112 operates on non-overlapping blocks of the image. These blocks can be of any size, but the size that we employ in connection with the HDTV embodiment described therein is 36 by 32 pixels (36 pixels in a row, 32 rows). For each selected block, a selected neighborhood of the block is searched in the previous frame (found in buffer 111) for a block of pixels that most approximates the block in question. In this manner, a motion vector is obtained that points to an area of the image in buffer 111 that best approximates the block in question.
The search process, to a single pixel accuracy, is perfectly conventional. To improve performance, our motion vectors are computed to 1/2 pixel accuracy. This is accomplished by first developing a motion vector to 1 pixel accuracy and then interpolating in the neighborhood pointed to by the motion vector between rows and between pixels in the rows of the previous block to determine whether a subpixel motion vector specification is called for.
To illustrate, a FIG. 5 depicts a region 31 in frame K and a block of pixels 30 in frame K+1. As can be seen from a review of the two, block 30 of frame K+1 may be described quite accurately by stating that it corresponds to the region in frame K that is shifted with respect to the position of block K by two pixels upwards and three pixels to the right.
The motion vectors of generator block 112 are applied in FIG. 4 to translator 113. The other input of translator 113 is the output signal of buffer 160. As mentioned above, the output of buffer 160 represents the previous LL frame as it is known to the receiver. The motion vectors are compared in translator 113 with the image of buffer 160 to form a predicted motion-compensated LL frame. Typically, this predicted frame does not faithfully represent LL frame. Almost always there are errors in the predicted frame. To ascertain the position and intensity of those errors, the motion-compensated LL frame of translator 113 is applied to subtracter 114, wherein it is compared to the LL frame signal itself. The output of subtracter 114 is a frame of motion-compensated prediction error signals. Those signals are applied to transformer block 120.
Transformer block 120 maps the information to the frequency domain. Although there are many approaches for such a mapping, the approach chosen here involves 16 FIR filters, as depicted in FIG. 6. Specifically, the input of block 120 is applied 8 "horizontal" filters 121. Each filter spans 64 pixels and develops a coefficient that represents the intensity of signals in a chosen frequency band. The filters are termed "horizontal" because the input pixels to a filter are taken from successive pixels on the same line scan of the frame, and because successive coefficients are obtained by sliding the filter horizontally. The horizontal shift is by 8 pixels. Each developed coefficient is associated with the pixel that is at the center of the neighborhood defined by the 64 pixels, and thus, each line scan of M pixels produces M/8 coefficients in each of the 8 FIR filters (assuming that something is done at the edges of the scan lines--such as creating pixels to satisfy for the filter needs). The frequency bands that are evaluated by the 8 filters are chosen, or controlled, by the coefficients that are incorporated within the FIR filters. The outputs of the "horizontal" filters are appropriately rearranged with the aid of buffer 122 and applied to 8 "vertical" filters 123, which may be identical to the "horizontal" filters and which process the signals in the identical fashion. The overall effect that is created is that of two-dimensional filtering. Description of block oriented two-dimensional filtering can be found, for example, in U.S. Pat. No. 4,829,465 issued May 9, 1989.
The outputs of transformer block 120 can be viewed as a collection of 64 subband frames, as depicted in FIG. 7. Each subband frame defines a subband with N/8 rows of coefficients and M/8 coefficients per row, where N and M are the numbers of rows and pixels per row in the image frame. As can also be observed in FIG. 7, corresponding coefficients in the subbands can be grouped to form vectors, such as vector 35. The elements of such vectors all stem from a common set of motion-compensated prediction error signals (of block 110). Alternatively, groups of coefficients in each subband (such as block comprising 2 rows of 4 coefficients) can be combined with this invention, when vectors such as vector 36 are employed, the 64 subband frames may be represented by MN/512 vectors.
It is recognized that there are more efficient and less efficient ways of communicating the information in the 64 subband frames. The challenge, of course, is to select a more efficient approach rather than a less efficient one. It is also recognized that some granularity may be introduced, and some information in the frequency domain may be ignored without undully damaging the image quality. Based on these recognitions, the function of encoder block 130 is to identify the most important image information contained in the 64 subband frames and to pack this information in the available transmission capacity. This may be accomplished in three steps. In the first step of such a three step approach, a selection is made to transmit some information and to simply ignore some information. In the second step, the information to be transmitted is approximated by choosing to transmit from a restricted lexicon of signals. The lexicon restriction results in lower demands on the digital transmission capacity. In the third step, the information is packed within the available transmission capacity.
Having mentioned "transmission capacity", it makes sense at this point to describe what the available transmission capacity is.
Referring to FIG. 1, the line scans, the horizontal retrace and the vertical retrace periods are all directly related to the operation of the TV screen. They need not relate necessarily to the transmission of information to the TV receiver, as long as some means are provided to synchronize the screen to the received frame information. Hence, subject to the synchronization requirement, the time interval corresponding to the sum of those periods can be devoted entirely to the transmission of frame information.
In a terrestrial transmission environment, each TV channel is allocated a specific bandwidth. Typically, at the transmitter's end the TV signal is band limited and modulated (AM) onto a carrier. To minimize interference between TV channels, a "taboo" guard band separates adjacent TV channels, where no signals should be present. The "taboo" bands are needed because the conventional TV signal has a number of very strong components, and any nonlinearities that the signal encounters create harmonic spillover. Even low levels of interference are often objectionable because they create "ghosts" in the interfered channel. The human eye is quite adept at detecting these patterns.
The need for reducing interference is greatest during the line scan. During the retrace periods, in contradistinction, much greater interference can be tolerated. At such intervals whatever interference is introduced needs to be limited only to the point of insuring that the interfering signal does not cause a loss of synchronization. In accordance with one aspect of this invention, interference is maintained at an acceptably low level by limiting the bandwidth of the information sent during the line scan intervals to the assigned channel's frequency band. During retrace, the bandwidth of the transmitted information may be allowed to expand into the "taboo" channel. More specifically, in accordance with the principles of this invention, during the line scan intervals we send motion-compensated prediction error coefficients that are selected to fit within the allocated signal bandwidth. All other information is sent during the retract intervals.
Since the energy in the error signals represent the deviation of the predicted image from the true image, it is desirable to transmit as much of the energy represented by the motion-compensation prediction error coefficients as is possible. The largest amount of energy that the transmitter can impart to a receiver corresponds to the largest swings in the carrier's amplitude. Such "largest" carrier amplitude results in high positive and negative voltage level swings at the receiver. The product represented by the maximum RMS level of the receiver's voltage, times the interval during which that level is maintained, shown in FIG. 8 by area 99.
When signal power is not considered, the objective is to pack as many of the motion-compensated prediction error coefficients in the time interval of area 99. The motion-compensated prediction error coefficients, which are analog in value, can be represented by analog valued samples and the samples can be concatenated to form a step-like analog signal. The number of samples that can be packed within the line scan interval is limited by the permissible bandwidth of the modulating analog signal and by the ability of the receiver to resolve the signals in the time domain. The utilization of area 99, under such circumstances, may be as depicted by curve 98 in FIG. 8. More specifically, the utilization is depicted by the area below area 98, which represents the RMS values of the analog samples.
From the above it appears that a more efficient utilization of the transmission medium can be achieved by increasing the area under curve 98 and reducing the area above it. This can be accomplished by encoding the error signals appropriately. The resulting digitized signal may then be like the one depicted by curve 97 in FIG. 8. Each level in the signal of curve 97 represents either one or more signal pulses. The process of combining a number of signals to form one signal is a "many to one" mapping.
The combining of digitized signals can, for example, be quite straight forward. When a pair of like-signed signals have amplitude values lower than a selected value, such as the square root of the highest permissible amplitude, then the pair of signals may be combined to form a single digitized signal. The value of the resulting single signal may be dictated by a lookup table like the one depicted in FIG. 9. For example, when a first signal has the value 11 and a second signal has the value 3, the combined signal developed in accordance with the FIG. 9 table has the value 41. When converted to PAM format, a pulse of height 41 is sent to the receiver together with an indication that the pulse represents the combination of two signals. Upon receipt of such an indication and the value 41, the receiver accesses a similar look-up table and derives therefrom the two PAM pulses.
When a "one to many" mapping results in a signal with a specific analog level, as in the case above, great care must be taken in the encoding algorithm because transmission noise is always a factor. Specifically, the encoding algorithm must be such that a received signal that includes a small deviation from the transmitted level should not decode to signals that are markedly different from the signals that formed the transmitted level. We call this "conforming encoding". It may be noted that the coding in the FIG. 9 table is so arranged. For example, a reception of level 10 when level 11 was transmitted does not cause an error in the decoded level of the second PAM pulse and changes the level of the first decoded PAM pulse by only one. The reception of level 16 when level 16 was transmitted causes no errors in the decoded level of the first PAM pulse and only an error of one level in the decoded level of the second PAM pulse.
The above describes a "many to one" mapping that aims to make the overall PAM signal out of the transmitter as large as possible. Actually, a similar benefit results from a "one to many" mapping where large digitized signals are encoded into two or more smaller signals. The encoding algorithm in such a mapping may be quite trivial because the decoding process may simply be a combining of the constituent pulses. The "one to many" mapping improves utilization of area 99 (as does the "many to one" mapping) because it reduces the dynamic range of the signal and permits a more effective gain control mechanism.
Whereas the FIG. 9 arrangement depicts an approach for combining two digitized signals, it should be clear that three (or more) digitized signals can be combined in a similar manner with a table (of corresponding dimensionality) that follows the concepts of FIG. 9.
When combining and splitting of the prediction error signals is not employed, the maximum number of PAM pulses that can be transmitted in region 99 is fixed (by the transmission bandwidth). When combining and splitting is employed, the maximum number of pulses that can be transmitted is no longer fixed. Rather, it depends on the signal characteristics. Still, experience with the transmission of various images gives some indication as to the percentage of digitized signals that can be combined, and that percentage provides an indication of the maximum number signals that can be combined and transmitted to the receiver.
Returning to the detailed description of the FIG. 2 transmitter, FIG. 10 presents a detailed block diagram of encoder 130 for the aforementioned three step approach. For the selection step, we chose to evaluate the subband frames of FIG. 7 through vectors 36. Specifically, it was chosen to combine the energies in the 8 coefficients of each element of a vector (the 8 coefficients in the 2 by 4 array of coefficients in a subband) and to compare the combined value to a threshold, thereby developing binary values that reflect the comparison results. Stepping through the subband frames in a non-overlapping fashion yields a set of vectors with 1 and 0 element values. In FIG. 10, buffer 131 stores the 64 subband coefficients, outputs groups of 8 coefficients and stores them in register 132. Combiner 133 develops a measure of the energy in the 8 coefficients and applies the results to subtractor 134. Subtractor 134 develops a 1 output when the combiner signal is greater than the threshold, and a 0 output otherwise. This binary output is stored in buffer 135. Buffer 135 stores 64 bit vectors. Each vector relates to a block of 8 coefficients in the 64 subbands. A 1 in buffer 135 of the subbands suggests that the coefficients that produced the 1 should be transmitted, and a 0 suggests that the coefficients that produced the 0 need not be transmitted.
The threshold value applied to element 134 can be fixed or variable. It should not be set to a value that is so high that an insufficient number of coefficients are chosen to be transmitted. That would cause some transmission capacity to be unused. It should also not be so low that many more coefficients are selected for transmission than the available transmission capacity could handle. Such a selection would unnecessarily burden the processing equipment. FIG. 8 provides means for allowing the threshold to be set adaptively. Processor 138 has access to the coefficients in buffer 131. Knowing the transmission capacity, it sorts the coefficients (based on the energy of the coefficients) and counts from the sorted list the number of PAM pulses that would be transmitted. When the transmission capacity is exhausted, the energy level of the last-accepted coefficient becomes the applied threshold.
The assumption implied in deciding that savings will accrue when selected coefficients are not transmitted is that it takes more transmission capacity to transmit information which can be ignored, than to transmit the additional information necessary for identifying the information that is being transmitted. The assumption holds true only if the number K of such identifying information packets (that number being effectively controlled by the threshold level) and the capacity C required for identifying each such packet is such that the product KC (which is the capacity needed to identify what is transmitted) is less than the capacity saved by not transmitting the ignored information. This suggests that it is important to reduce C as much as possible.
The simplest way to identify the coefficients that are being transmitted and the coefficients that are not being transmitted is to transmit the 64 bit vector of 1s and 0s in buffer 135. Keeping the admonition to reduce C in mind, we discovered that image quality may be maintained while reducing the number of possible combinations from 264 to 28, or 256. A reduced set of possible combinations permits one to define each possible combination of 64 bits with only 8 bits. This mapping of 64 bits to 8 bits is achieved by creating a codebook table with 256 entries. Each entry maintains one of the 64 bit combinations (one codebook vector) and the codebook vector is identified by the address (index of the codebook vector) of the combination in the table. When such a codebook is employed, it becomes necessary to judiciously replace each of the combinations contained in buffer 135 with a codebook vector that best represents the replaced combination. This is the second step of encoder 130.
It is clear that, when considering a particular combination of 1s and 0s in buffer 135, selecting any codebook vector that specifies a different combination of 1s and 0s would result in the transmission of at least some coefficients with lower values than the threshold. That is, some high level coefficients that produced a 1 in buffer 135 may not be sent, and some low level coefficients that produced a 0 might be sent. Still, having decided to replace the full set of possible vectors with vectors from a limited set, it appears beneficial, at this level of optimization, to send the vector from the codebook that is a) most like the vector it replaces and b) transmits the most combined prediction error coefficients energy.
In FIG. 10, block 136 contains a codebook of 256 vectors of 64 bits each. Processor 137 is responsive to the codebook, to buffer 135, and to buffer 131. In accordance with one approach of this invention and the above-described beneficial choices, processor 137 identifies the information in buffer 131 that corresponds to a vector of 1s and 0s in buffer 135, determines the number of 1s in that buffer 135 vector, and tentatively selects from codebook 136, one at a time, those vectors with an equal number of 1s. It then evaluates the combined energy of all coefficients that would be transmitted if the tentatively selected vector were finally selected, and does finally select that tentatively selected vector that would transmit the set of coefficients with the largest combined energy. The selected codebook vector and the selected coefficients from buffer 131 are applied to packing block 140.
The function of block 140 is to sort the information by the degree of importance that the sorted information has for the development of a high quality reproduction of the video frame, and to transmit as much of the important information as is possible within the constraints of the channel capacity. This packing function is achieved in block 140 by creating a table that contains four columns: a codebook vector identifier column, a number of selected coefficients column, a block number identifier column, and an importance measure column (e.g. total energy in the subbands selected for transmission in accordance with the 1's in the vector). As an aside, the second column, which indicates a number of selected coefficients, is strictly a function of the codebook. For example, for a codebook of 16 codebook vectors, the vector identifier can be a 4-bit number in the range 0000 to 1111. Vector identifier 0000 may correspond, for example, to vector 0100110001110000. That means that whenever vector identifier 0000 is found in the first column of the table, the second column of the table contains the number 48 (which is the number of 1's in vector 0100110001110000 times 8--8 being the number of pixels in the subband group).
The packing process proceeds in block 140 by sorting on the "importance" column. As illustrated in the table below, the first entry belongs to codebook vector 1001, with 56 selected error coefficients. This entry is for block 23, which has an energy level of 731. The second entry belongs to codebook vector 1100, with 24 selected error coefficients. This entry is for block 511, which has an energy level of 623. The third entry belongs to codebook vector 0001, with 3 (different) selected subbands. This entry is for block 127, which has an energy level of 190. Subsequent entries (which are not shown) have lower energy levels.
______________________________________vector ID # of coeff. block ID importance______________________________________1001 56 23 7311100 24 511 5110001 24 127 1900101 8 1023 102 . . .______________________________________
In addition to the above sorting and selection from the top of the sorted list, block 140, performs the above described signal combining function signals when the magnitudes of the error signals so suggest (per FIG. 9). By selecting from the sorted table, keeping track of the number of selected coefficients (column 2), performing the "many to one" and "one to many" mappings and augmenting the selections information in accordance with these mappings, block 140 is able to keep track of channel capacity that is taken up by the entries selected from the sorted table. When the allotted capacity (i.e., number of PAM pulses) is exhausted, selections from the table are terminated. The mappings can also be carried out in processor 137 in combination with the codebook. In such and embodiment, the codebook identifiers themselves carry the information about the samples that re mapped. For example, codebook identifier 10110 may represents a vector 0100010000000000 where none of the two sets of 8 signals are encoded. On the other hand, identifier 10111 may represent the same vector, except that it carries one set of 8 signals that are unencoded, and one set of 4 signals that were created from a "many to one" encoding process.
The above-described encoding, selecting, and packing approach of encoder 130 is merely illustrative, of course, FIG. 11 presents another approach.
In FIG. 11, the input to encoder 130 is applied (as in FIG. 10) to buffer 131. The groups of 8 pixels from each of the 64 subbands (vector 36) are accessed from buffer 131 and applied to block 141, which develops a measure of the energy in each of the elements of the 64-element vector. This information is applied to 256 codebook vector switching circuits 142. Each circuit 142 merely passes the energies of the elements that correspond to a 1 in the codebook vector. Thus, the output of a circuit 142 that pertains to codebook vector P provides a measure of the energy that would be sent if that codebook vector were used. On first blush, one might believe that sending the most energy is best, and that would suggest selecting a codebook vector with a large number of 1s. However, an unadulterated measure of the energy may be counter indicated. Since the total number of 1s in the selected codebook vectors is fixed, a better approach would be to maximize the benefit that each 1 in the selected vectors provides. Selecting the latter measure, each switch 142 in FIG. 11 is followed by a benefit measuring circuit 143. The benefit measure may be the average energy per 1 in the codebook vector, or some other measure.
To optimize the selection, the outputs of the 256 benefit measuring circuits are applied to selector block 144. It selects the codebook that offers the greatest benefit per 1 in the codebook; which is also the greatest benefit per transmitted set of 8 prediction error coefficients. The output of selector 144 is applied to packing block 149, which is very similar to packing block 140. To wit, block 149 sorts the chosen codebook vectors by their benefit measures selects from the top of the sorted list performs the "many to one" and "many to one" mappings as appropriate, and accumulates signals to be transmitted until the transmission capacity is exhausted.
The above-described concept of packing more than one PAM pulse in a single slot improves performance via a better utilization of the available capacity as it is reflected by area 99 of FIG. 8. There is another aspect of area 99 that may be addressed, and that is noise immunity. Since noise that is introduced by the transmission medium (between the transmitter and the receiver) is independent of the level of the transmitted signal, it is clearly advisable to transmit as large a signal as possible. This can be achieved in the system of our invention by introducing a controllable gain feature (CGF) into the transmitter and receiver.
As suggested above, the "one to many" signal mapping process interacts well with the CGF process because large signals are broken up into intermediate signals, and that reduces the overall "spikiness" of the signal. The lack of very large signals permits a larger CGF signal to be applied to element 154, and that results in a greater portion of area 98 to be encompassed by the signal energy.
Because of the noise that inevitably is introduced in the course of transmitting information to the receiver, one has to expect that, in spite of the CGF action, the information within buffer 165 will eventually differ from the information in buffer 160. This problem is overcome by the well known technique of inserting in the transmitted error signal a fraction of the true image, and by discarding in the receiver a corresponding fraction of the image stored in buffer 165. This is known as "signal leak".
FIGS. 12 and 13 present block diagrams of a transmitter and a receiver that include signal leak and CGF. The CGF capability is achieved by applying the PAM pulses delivered by block 140 (within block 130) to a buffer 152, which basically is a delay line. Processor 153, which is also responsive to the output of block 140 determines, at fixed intervals, the largest PAM pulse within the delay line buffer. Based on that information, a multiplicative factor is selected and applied to multiplication element 154, which receives its second input from buffer 152. The result is sent to formatter 170. The multiplicative factor, which is the CGF control signal, is also sent to formatter 170, for transmission to the receiver. The CGF action is accounted for in divider 151 which is responsive to the multiplication factors of processor 153 and to the output of element 154. The result is sent to combiner 159 which, with the vector information of encoder 130 recreates the frequency components of transform circuit 120 (as best it can). Those frequency components are transformed in block 161, to reverse the transformation effected in block 120, and the results are applied to adder 180. Concurrently, the motion vectors of block 110 are applied to translator 150. With the aid of these vectors, translator 150 modifies the information of frame buffer 160, and applies the results to adder 180. The sum signals developed in adder 180 are stored in buffer 160.
Actually, translator 150 is not connected to buffer 160 directly. Interposed between the two is a divider 189. The function of divider 189 is to account for the signal leak of block 156. Block 156 is responsive to the frame information applied to block 110. It transmits to its output a fraction of the signal applied to its input. That fraction is added by adder 157 to the motion compensated signal that is delivered by block 110 to block 120. Adder 157 is interposed between blocks 110 and 120. The fraction that we use in block 156 is 1/32. Divider 189, which accounts for the signal leak, also transmits to its output a fraction of its input. When the fraction in block 156 is 1/32, the fraction in block 1879 is 31/32.
The receiver of FIG. 13 comports with the transmitter of FIG. 12. Separator 190 includes means for culling out the LL coefficients, the motion vectors developed in block 110 of the transmitter, the prediction error vectors of codebook 146 (which may include the mappings information), and the CGF multiplication factors. The CGF multiplication factors are applied to a divider circuit 158 which complements the actions of circuit 154 in FIG. 12. The output of divider 158 is applied to combiner circuit 163 and the output of circuit 163 is applied to transform circuit 155. The output of circuit is applied to adder 185 which feeds buffer 165. The output of buffer 165 is applied to divider block 166, and it supplies signals to translator circuit 164. Translator 164 is also responsive to the motion vector of block 190 and its output forms the second input of adder 185. The functions of blocks 158, 163, 155, 185, 165, 166, and 164 are identical to the functions of blocks 151, 159, 161, 180, 160, 189 and 150, respectively. As in the receiver of FIG. 3, output of buffer 165, which is the received LL frame, is applied to adder 186 where it is added to the LL frame developed in transform circuit 188. It may be noted in passing that divider circuit 158 affects only the amplitude of the prediction error signals. Skilled artisans would surely realize that divider 158 could follow combiner 163, rather than precede it, if so desired.
Although the above-described approach sends the motion-compensated prediction error signals in PAM format, the principles of this invention are applicable with equal efficacy to other modes of transmission. Specifically, experimental results suggest that extremely good results can be obtained by sending only 200,000 error signals. Clearly, these error signals can be coded digitally and transmitted in that fashion over whatever transmission medium can handle the resulting bandwidth. Sending this information digitally over cable, for example, would obviate the need for the entire RF section of the transmitter (which is not shown in FIG. 1 anyway) and for the RF receiver section. Also, organization of the signals which puts the prediction error signals in the line scans period and the vector information in the retrace period need not be adhered to.
The above description presents the principles of the invention in the course of describing a transmitter and receiver arrangement that is suitable for HDTV. The details of construction of the illustrative embodiments that were presented are not delved into for the sake of brevity. All of the block that make up the designs presented in the figures can be created with conventional designs without undue experimentation. Indeed, many of the blocks in the transmitter and the receiver perform identical functions and can be constructed in an identical manner with conventional components.
It should be noted that other embodiments can be created that are encompassed within the spirit and scope of this invention. For example, it has been concluded through experimentation that a better performance is obtained (subjectively) by transforming the error signal developed in block 110 (in block 120) and by discarding some of the resulting frequency coefficients (in block 130). Actually, even in the time domain the error signal is generally small. When the available bandwidth is large and/or when the encoding process is efficient enough, it is possible to consider encoding the error signals themselves. The really small errors would be ignored, the large errors would be encoded, and some averaging can even be included. For example, the pixel that is ignored (because it error level is too low) but which is next to a pixel that is selected and encoded can be assumed to have a value just under the threshold level. Eliminating the need to transform into the frequency domain and back to the time domain clearly has a positive effect on the cost of the transmitter and the receiver.
|Cited Patent
|Filing date
|Publication date
|Jan 7, 1977
|May 23, 1978
|Victor Company Of Japan, Limited
|Video amplifier
|Apr 14, 1986
|Sep 15, 1987
|Telefunken Fernseh Und Rundfunk Gmbh
|Digital data transmission method
|Jan 6, 1984
|Jun 21, 1988
|Matra, Societe Anonyme
|Method and device for the numerical coding of an image, more particularly a television image
|Apr 27, 1988
|Aug 15, 1989
|Universal Video Communications Corp.
|Method and system for decompressing digital color video statistically encoded data
|Jun 29, 1988
|Nov 6, 1990
|Prs Corporation
|Broadcast receiver capable of selecting stations based upon geographical location and program format
|May 6, 1988
|Jan 1, 1991
|General Electric Company
|Line-sequential pyramid processing of a plurality of raster-scanned image variables
|Mar 19, 1990
|Aug 13, 1991
|At&T Bell Laboratories
|Television signal arrangement where selected signals are encoded digitally
|Mar 19, 1990
|Aug 27, 1991
|At&T Bell Laboratories
|High definition television arrangement employing motion compensated prediction error signals
|Mar 19, 1990
|Jan 21, 1992
|At&T Bell Laboratories
|High definition television arrangement including noise immunity means
|Citing Patent
|Filing date
|Publication date
|Jan 8, 1993
|Aug 2, 1994
|Scott C. Harris
|Method for encoding transmitting and receiving high definition television signals using single variable independent equations representing each pixel over time
|Jan 6, 1992
|Dec 27, 1994
|At&T Corp.
|Apparatus and method for displaying recorded compressed digital high definition video information
|Nov 16, 1992
|Jun 4, 1996
|At&T Corp.
|Coding for digital transmission
|Oct 11, 2006
|Jan 10, 2012
|Realtek Semiconductor Corp.
|Signal separation apparatus applied in image transmission system and related method
|Oct 11, 2006
|Jun 7, 2007
|Chia-Hao Hsiung
|Signal separation apparatus applied in image transmittion system and related method
|U.S. Classification
|International Classification
|Cooperative Classification
|European Classification
|Mar 19, 1990
Owner name: AMERICAN TELEPHONE AND TELEGRAPH COMPANY, 550 MADI
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|Feb 26, 1996
|Fee payment
Year of fee payment: 4
|Feb 28, 2000
|Fee payment
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|Jan 9, 2004
|Fee payment
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