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Featured in this HVS EMEA Hospitality Newsletter – Week Ending 23 September 2011
- London's W Hotel Welcomes A New Owner
- Ferré Goes Shopping In Paris
- A Top Sale In More Ways Than One
- Starman Rockets Into Warsaw
- Travelodge Acquires Eight Hotels In London
- A Hall In Salford And Four English Roses
- Meet Up With HVS In Munich
- Après Ski And Swissôtel
- Interstate Intertwines With TVHG
- The Jewel In The Crowne Of Southeast England
- London Is A Premier City For Hotel Development
- Best Western Divided By Three = ?
- Changes At De Vere
- E-Books At Bedtime A Good Idea? The Jury's Out
- Gladen's Tidings
London's W Hotel Welcomes A New Owner
The 192-room W hotel on London's Leicester Square has been acquired by Al Rayan Tourism & Investment Company, a subsidiary of Al Faisal Holding (a conglomerate owned by the Qatari royal family), for almost £200 million. Previous owners, Northern Ireland-based property firm McAleer & Rushe put the ten-storey hotel on the market at the beginning of this year. The sale also includes 11 penthouse W Residences and 35,000 ft² of retail space, which houses Europe's first M&M's World shop. Eamonn Laverty, McAleer and Rushe's managing director, has said that the funds raised by the sale are to be reinvested in the business. "This has very much been a flagship, showcase development for McAleer & Rushe. We built a hotel that is instilled with the highest levels of design and exclusivity that one would expect of such a glamorous brand as W and on such a prominent site, on one of London's most famous squares," he added.
Ferré Goes Shopping In Paris
US-based private equity firm Starwood Capital Group recently sold the Hotel Concorde Montparnasse on rue du Commandant Mouchotte in Paris, France, to Rennes-based group Ferré Hotels for a reported €87 million. The seven-storey, 354-room hotel, which was built in 2004, is being operated by Starwood Captial's subsidiary Louvre Hôtels Group.
A Top Sale In More Ways Than One
Earlier in September, we reported that the Royal Bank of Scotland (RBS) had sold number ten of its 11 Hilton hotels on the market – this week, RBS said goodbye to number 11. Gibraltar-based Topland Group has purchased the 319-room Hilton Glasgow, in Scotland, for £35.7 million in cash, and the privately owned investment company completed the transaction within four days. Clive Bush, Topland's managing director of operations said, "The property offers a long-term secure income stream and is typical of the type of investments which we are seeking. This is the second time in recent months we have completed a major transaction in four days." Hilton Worldwide's lease on the property runs for a further 20 years and the hotel produces a turnover-based rent which has consistently exceeded the base rent. Rising above the city's skyline with 20 storeys, the five-star property is Glasgow's tallest hotel.
Starman Rockets Into Warsaw
London-based Starman Hotels has acquired full ownership of the 205-room Le Méridien Bristol, Warsaw in Poland. Starman previously held the leasehold interest in the building, and it has now purchased the Perpetual Usufruct title from Polish group Orbis SA. Our very own HVS Hodges Ward Elliott advised Starman on the acquisition. Edward Nixon, Starman's finance director, said, "This is a value-accretive purchase for Starman and we look forward to working with our partners to further cement the hotel's pre-eminent position in Warsaw." Starman now plans to renovate the hotel, which is operated by Starwood Hotels & Resorts under a management agreement.
Travelodge Acquires Eight Hotels In London
Travelodge has exchanged contracts on eight hotels in the suburbs of London, adding 801 rooms to its portfolio in the UK. Commenting on the new acquisitions, Paul Harvey, Travelodge's managing director for development, said, "The London hotel market is well served in Zone 1, but has significant gaps across the rest of the capital." The budget chain has invested £63.5 million in the hotels, four of which are in south London, three in the north and one in the east of the city. "With London's excellent public transport network you can stay as far out as Zone 6 but still be in the centre of London within half an hour. This makes London's suburbs very attractive for tourists and business people looking to avoid paying the high prices in the heart of the capital," added Mr Harvey.
A Hall In Salford And Four English Roses
Other transactions in the UK this week include the freehold sale of the 36-room Best Western Salford Hall Hotel in the town of Stratford-upon-Avon, central England, to hotel, wedding and conference group Skylane Hotel. The Grade I-listed hotel was put on the market with a guide price of £2.25 million after its previous owner, midlands-based Cube Hotels, went into administration in February. Additionally, four hotels from UK-based chain English Rose Hotels' six-strong portfolio have been put on the market by administrators. The 110-room Royal Hotel, the 70-room Clifton Hotel, the 20-room Wrea Head Country House Hotel and the 33-room Hackness Grange Country House Hotel are all located in the seaside resort of Scarborough, northeast England.
Meet Up With HVS In Munich
Autumn is a busy time of the year for conferences and one of the major commercial real estate exhibitions is fast approaching: Expo Real in Munich. From 4-6 October, 1,645 exhibitors will gather across the 64,000 m² site in the New Munich Trade Fair Centre to present their real estate product portfolios. Hotels, retail, office and residential property – these are the topics of the event's Special Real Estate Forum. Industry experts will be presenting their property projects, explaining expansion strategies, answering questions and engaging in debates. As part of this forum, the first day of the conference will be dedicated to the Hospitality Industry Dialogue, a mix of panel sessions, discussions and networking events specifically for the hotel investment industry. HVS will be represented by Arlett Oehmichen, an associate director at HVS London. Please contact Arlett on +44 207 8787 753 (firstname.lastname@example.com) if you would like to arrange a meeting. Arlett will also be part of the panel launching IPD's new European hotel index, which HVS proudly sponsors. This event will be held on Tuesday 4 October at 2:15pm in Room B13. For more information on Expo Real 2011, visit www.exporeal.net.
Après Ski And Swissôtel
It looks like Swissôtel Hotels & Resorts may need to book some skiing lessons as the luxury chain has signed a management agreement with Russian developer NBB-Development for its third hotel in Russia and its first ever ski-resort property. The 158-room hotel is currently under construction and will be part of the Gorky-Gorod complex in the Krasnaya Polyana ski resort near Sochi, in southwest Russia. The complex is expected to be completed in time for the 2014 Winter Olympic Games. The luxury chain already operates the 233-room Swissôtel Krasnye Holmy in Moscow, and the Swissôtel Sochi Kamelia is due to open in 2014.
Interstate Intertwines With TVHG
Interstate Hotels & Resorts has formed a joint venture with Netherlands-based TVHG Budget Group Beheer BV (TVHG), which will see the US hotel management company invest in and manage a portfolio of nine hotels across the Netherlands. One of the hotels, the 112-room Holiday Inn Express Schiphol Airport, recently opened in Amsterdam and the remaining eight are expected to open by the end of 2012. The hotels, which will comprise 1,800 rooms, are all conversions from existing buildings, and will be managed by Interstate under long-term agreements as Holiday Inn, Holiday Inn Express or Hampton Inn hotels. "This joint venture marks our entry into the Netherlands and significantly increases our European presence to more than 25 hotels open or in the pipeline," said Thomas F Hewitt, Interstate's chairman and chief executive officer.
The Jewel In The Crowne Of Southeast England
After a multimillion pound upgrade, the four-star Five Lakes Resort near the town of Maldon, on the southeast coast of England, has now been rebranded, and it officially reopened this week as the UK's first Crowne Plaza resort. The 194-room Crowne Plaza Resort Colchester – Five Lakes is owned by AB Hotels and managed by BDL Management under a franchise agreement with InterContinental Hotels Group (IHG). BDL is no stranger to IHG as the Glasgow-based management company currently operates a further eight hotels across the UK under the Crowne Plaza, Holiday Inn and Holiday Inn Express brands.
London Is A Premier City For Hotel Development
Premier Inn is planning to open 20 new hotels in the UK capital over the next two years, in areas such as Leicester Square, Blackfriars, Old Street, Holborn and Islington. And it doesn't plan on stopping there! Whitbread's budget hotel chain intends to double its portfolio in the city by 2016. The company's latest offering, the 267-room Premier Inn London Stratford, officially opened this week. Patrick Dempsey, managing director of Whitbread Hotels and Restaurants, said, "Our exciting growth in London means that we can offer even more people a great night's sleep in the best locations when visiting the capital. We are also delighted to be bringing investment to London whilst creating 1,000 new jobs."
Best Western Divided By Three = ?
Best Western has split its portfolio into three brands: Best Western, Best Western Plus and Best Western Premier. The hotel company said that this change came about from customer feedback and is designed to give its customers more choice and to make the decision-making process easier. The brands are differentiated by the standard of key areas in the hotels, including customer service, food and drink, and entertainment. Out of the group's existing portfolio, there will initially be ten Best Western Plus hotels and nine Best Western Premier hotels; the other 257 properties will remain Best Western. The company plans to have more than 20 Best Western Plus hotels by the end of the year as well as continuing to introduce new Best Western Premier properties to the brand.
Changes At De Vere
De Vere Group's chief executive, Richard Balfour-Lynn, and chief financial officer, Jag Singh, are stepping down from their posts. Mr Balfour-Lynn, who created De Vere Group (formerly the Alternative Hotel Group) in 2005 with the £325 million acquisition of Initial Style Conferences and the £1.1 billion takeover of De Vere Hotels, is reported to have said that he and Mr Singh are leaving to concentrate on their other business interests, which include MWB Group, owner of the Malmaison and Hotel du Vin chains. UK-based De Vere's current executive chairman, Andrew Coppel, will be taking over Mr Balfour-Lynn's role, and the group's finance director, Gareth Caldecott, will become the new chief financial officer.
E-Books At Bedtime A Good Idea? The Jury's Out
Jurys Inn has launched 'e-books at bedtime', an e-reader loan service. It will initially be trialled in five UK hotels in Newcastle, Birmingham, Liverpool, Manchester and Derby. Guests staying at one of these hotels can borrow an e-reader pre-loaded with a selection of short stories to help them relax before bedtime. If it is successful, the Dublin-based group plans to make the service available in all 32 of its hotels across the UK, Ireland and the Czech Republic. Guests will also have the option to download any novels they may have started at home but did not bring with them to the hotel. For using the service, guests will be asked to make a donation to the National Literacy Trust. John Brennan, chief executive officer of Jurys Inn, said, "Our city centre locations naturally attract a lot of business guests who find it difficult to unwind after a busy day at work. We also find many of our guests travel light because they are often here for a short stay, which is why our new service, e-Books at Bedtime, offers a hassle-free way to unwind."
Gladen's Tidings
The news from Spain by Esther Gladen, Business & Market Intelligence Analyst, HVS Madrid. The Meliá Valencia is no longer with Meliá Hotels International: as of 1 October 2011, the hotel's owner, URBEM, will be responsible for its management. The 262-room hotel, which is close to the Ciudad de las Sciencias in Valencia, is to be renamed Primus Valencia. The Grand Hotel Mencey in Santa Cruz Tenerife to reopen after a refurbishment: the Iberostar hotel, owned by the local government, underwent a 20-month refurbishment, which required an investment of €43 million. The reopening is scheduled for 11 November 2011. Plans for a new development in the Murcia region: the project, which has been recently announced by local authorities, is to be environmentally friendly and in harmony with the landscape. The total capacity of the several four- and five-star hotels could be around 2,000 beds. The idea of the project is to increase the relatively low offer of hotel accommodation in the region and to attract a more exclusive clientele.
Absolute Share Price Performance Over the Past Week – 15-22 September 2011
NH Hoteles – Natixis downgraded NH Hoteles to "reduce" from "add".
Meliá Hotels International – Natixis cut Meliá to "add" from "buy".
Accor – Accor weakened below its Exponential Moving Average Price.
For the latest in the hospitality industry, please visit: http://www.hvs.com. You are also welcome to contact the following personnel.
|Russell Kett, Managing Director – HVS London (@russellkett)
|Charles Human, Managing Director – HVS Hodges Ward Elliott
|Tim Smith, Director – HVS London
|Chris Martin, Director – HVS Hodges Ward Elliott
|Demetris Spanos, Managing Director – HVS Athens
|Hala Matar Choufany, Managing Director – HVS Dubai
|Christopher Mumford, Managing Director – HVS Executive Search (@ChrisMumford)
|Philip Bacon, Managing Director – HVS Madrid and Managing Director, EMEA & Asia – HVS Shared Ownership Services
|Saurabh Chawla, Director – HVS Asset Management and Strategic Advisory
|Louise Fury, Senior Editor and EMEA Hospitality Newsletter Author – HVS London
|Lesley Parrott, Junior Editor and EMEA Hospitality Newsletter Author – HVS London


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All quotes tagged Inspirational
(18788 quotes found)
"It is better to believe than to disbelieve, in so doing you bring everything to the realm of possibility."
Contributed by: Anna Williams
"People have two feet because they are not alone. If we were made to stand alone, we would have only one foot."
"Math is not a creation of man; it's a creation of nature. Numbers are simply a translation of that language."
"There is nothing like 'too late' exist. Just make your mind, keep aim straight an strong, work hard on it an you will find out that 'too late' became 'I made it'."
"I was on the edge, I was confused and disoriented. As I was about to fall, I was saved, by that bond we had made. Now, I will not faultier. I will only pick myself up and keep walking. I overcame this gash in my life, and I only accept it. That's what makes me, me. I become stronger through my experiences, and I keep on walking."
"Shame is internal never external. Shame internalizes then it seeks an external place to lay rest. Shame doesn't exist in places and things. No one can shame you, for it already exists within yourself."
"When life throws its curve ball it is our job to step up to the plate and hit that ball the other direction twice as fast"

subset: commoncrawl


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December 8, 2011: Outsourcing is a favorite word for most of the companies, but with a bad reputation. It is considered as a sign of corporate irresponsibility, characterized by ruthless hunger for cheap labor, resulting from corporate greed. But still many organizations are coming up with a new method of outsourcing a significant portion of their business, while trying not to cause any discomfort. Similar to outsourcing, "Crowdsourcing", cuts cost by making use of feedbacks and ideas from the one who is best aware of the products; the customers, without making the employees useless.
The term Crowdsourcing was coined by Jeff Howe in an article that appeared in 'Wired' in 2006. This term is gaining wide acceptance in the current year with many of the organizations employing click workers to work on behalf of the company for less or no reward. For instance, Lego, a leading toy manufacture encourages its devoted customers to redesign its famous toys. In another example, Oxfam, an organization working to come up solutions for poverty and to fight injustice has asked its members to come up with slogans rather than employing an advertising agency for the task.
In an attempt to chart roads in India, Google is employing volunteers in India, equipping them with GPS units that it is sending to the country. Leading computer manufacturer Dell has transformed customer complaints into revenue by listening to the customers. They have successfully converted what used to be called as "Dell hell" to huge bottom line.
Recently Starbucks have turned towards its customer for valuable feedbacks and ideas to improve their quality of service and offerings, in order to delight the customers. Starbucks has developed a website in partnership with Salesforce.com, and the visitors of the site are encouraged to give suggestions that might improve their experience or to vote on suggestions that other have posted. It was found that most of the suggestions and ideas were insignificant. A valuable suggestion was a request to Starbucks to provide incentives to customers to recycle plastic.
The idea of Crowdsourcing emerged during the 19th century, in the compilation of the Oxford English Dictionary. Words and usages were written down on papers by volunteers and were posted to the editor. The idea gained prominence with the publishing of the book, Wisdom of Crowds. The wide popularity and penetration of internet has made the idea more clear.
It is evident that big companies such as Starbucks and P&G can successfully engage a crowd. But in the case of small companies, it is often difficult to attract crowd. They need to put in more effort to attract users, in most cases involves rewards.
The gaining acceptance of Crowdsourcing has transformed the way in which a business operates. Now organizations are trying to build long term relations with employees and customers who will help them in product trials and business development.
Advantages of Crowdsourcing
- Can exploit the popularity of internet
- Allows organizations to get customer suggestions and expert opinions
- Enable organizations to integrate technologies, ideas with their assets.
- Companies need to pay less or nothing at all to customers or volunteers.
- Helps organizations in building closer and stronger relationships with employees and customers


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Midnight Club 3: DUB Edition
- Released on Apr 12, 2005
- By Rockstar San Diego for PS2, Xbox
Midnight Club 3: DUB Edition User Reviews
Midnight Club 3 DUB EditionSummary:
This 3rd installment of the MidnightClub series, is the greatest arcade racer, and "underground" racer, to date. With over 65 customizable, real-world licensed vehicles, ranging from cars to motor-cycles.
In career mode, the game's an open city racer that has you free roaming around 3 different City's, looking for different challenges, races and tournaments to compete in. As you complete key races, you earn cash and the game slowly progresses unlocking new vehicles classes, and upgrades/modifications, and new challenges and city tournaments become available as well. (a new addition to the ...
Awesome Game, Best Racer YetThe good:
-Intelligent A.I.
-Load Speed is Awesome for PS2
-Online Mode is Better than NFSU2
-Mostly Better than NFSU2 in Every Which Way, the Customization, the Cars, the... EVERYTHING!
-And at Least there's Cops, Although Very Annoying
-Controls, Very Easy to Handle the Car
-Cops very annoying
-Nothing else is bad
This game is by far the best racer I've played on PlayStation 2, it's just like the originals, with customization and the variety of cars that are actually LICENSED, YAY!(Instead of cheap clones like before) You should really get it, if you have NFSU2, trade it in for DUB Edition, I did and look at me, I've never been happier. A must-have for any gamer, even those who don't like racing will like this one, my friend hates racing games tried a race in career mode and didn't give it back for 2 weeks until he beat it. LoL.
Midnight Club 3: DUB EditionThe good:
-Over 60 Cars/Trucks/SUVs/Motorcycles
-Indepth Car Customizations
-Three Cities, Atlanta, San Diego, and Detriot
-Special DUB Edition cars
-Different sized rims ranging from 16 inches to 28 inches.
-Arcade Mode
-Weather Changes
-Loading time is a little too long at some points
-Some cars can be very expensive
Overall Midnight Club 3: DUB Edition is a great game. Loading time could be improved, but it's not too long. Definitely better than NFSU2. When you're not racing you can just ride around the city and search for the 12 Rockstar logo's. This game gives you the freedom to do just about anything you want in-game. You have six cars to choose from in the beginning, Dodge Neon SRT4, Mitsubishi Eclipse, VolksWagon Jetta and Golf, '64 Chevrolet Impala, and '78 Chevrolet Monte Carlo. All are great starting cars and get you interested in the game.
Get the 28-Inch Rims, foo!The good:
I am an avid Midnight Club Series fan, and have played and beaten the other two, recently finishing up this one as well. I can honestly say that Midnight Club has rightfully YANKED control of the Street Racing Genre from Need for Speed Underground and re-established itself as the KING of the mountain once again. Midnight Club 3: DUB Edition needs to be played to be believed, to put it bluntly. Rockstar San Diego really need to give themsleves a pat on the back on such a well-done game. Where shall I begin? - My entire career should do.
I started in San Diego, got a message from the garage ow...
Best in the seriesThe good:
-Car Damage
-Special Skills
-Cops a pain sometimesSummary:
Midnight Club 3 DUB Edition, is by far one of the best in the series. Unlike other Midnight Club's you are able to customize your car,take car damage, unlock special skill's for you car, participate in race's on your vehicle type, & you get to escape the fed's in some races. Apart from the new features the graphics have been greatly improved, & Midnight Club 3 DUB Edition has a huge soundtrack including some good rap music. Also you can choose what you want do in your career, such as race other racer's or participate in optional race's to make money so you can customize your car. But overal...
Midnight Club 3: DUB EditionThe good:
The intencity of the races is enormous.The way you can trick out your paint job is way cool.The power ups are a blast.And you should probably have a pilots liscense for all the air time you can get.It`s freakin awsome.There are so many races where you`ll either win or lose by a few hundreths of a second it has to be experianced to totaly appreciate the level of intencity this game will bring to you.There are so many oh my god moments that it`s hard to believe. If you love power sliding around corners mile high jumps,cool as hell cars you`ll absolutly love this game.Oh yea there are some cool Jesse James West coast choopers in there that are a blast to drive.This game will take over your life for quit awhile I imagine.Dammit I`m jonesing all ready gotta go play the game.The bad:
Great cars but maybe a little more variety.Well I wish there was a couple more cities. But hey I think they pretty much squeezed all they could out of the PS2.Summary:
Muscle cars,tunners,SUV`s,choppers,sports bikes and trucks are all in the game. enjoy!
Recent Threads
- Favourite In-Game Song 51
- Midnight Club Wiki 0
- Drift Tuning 0
- What to do whit cop cars 13
- Wheelie 9
- cop cars??? 2
- which do you prefer? 53
- Your Top 5 Cars 2
- 100 % Club! 50
- everybody if you have a cheat that works pleez let me know. 6
- how much money did you spend? 2
Midnight Club Series
- Midnight Club II2003


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text:
|Publication number
|Publication type
|Application number
|Publication date
|Oct 20, 1998
|Filing date
|Dec 19, 1996
|Priority date
|Dec 19, 1996
|Fee status
|Also published as
|Publication number
|Ara Patapoutian, Kevin D. Fisher, Bruce D. Buch
|Original Assignee
|Quantum Corporation
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (7), Referenced by (45), Classifications (31), Legal Events (9)
|External Links: USPTO, USPTO Assignment, Espacenet
The present invention relates to apparatus and methods for sampling an analog signal including user data and embedded head position information within a magnetic data storage device. More particularly, the present invention provides an analog-to-digital converter with increased resolution during servo fine position sampling.
Magnetic data storage devices, such as disk drives and tape drives, are called upon to hold an ever-increasing amount of user information per unit storage area of the storage medium. Some portion of the increase has come about by increasing the flux transition density within each data track. Another portion of the increase has been to make the data tracks narrower, and to record the information tracks closer together on the storage medium.
In the case of magnetic disk drives, increased flux transition densities have caused flux transition peaks to overlap. This overlap is known as "inter-symbol interference" or "ISI". Unless accounted for in read channel designs, ISI can result in data bit errors.
One known method for reducing ISI-induced data bit errors is to employ a signaling technique known as "partial response, maximum likelihood detection" or "PRML". Unlike analog peak detection techniques previously used for detecting digital information, PRML handles a predetermined amount of ISI by signal shaping, synchronous sampling and by use of a digital path memory array detector implementing e.g. the Viterbi algorithm. With this detection technique, digital samples are obtained from the playback signal by being passed through the digital path memory array detector. Based on predetermined transition density and zero run length coding constraints imposed during the data writing operation, and on extensive filtering and shaping of synchronous digital samples, the path memory detector determines a most likely data value. This determination is based on sample sequences including the sample or samples of interest at the most-likely data-decision time. The data-decision time is reached after the sample has traversed various possible states of the path memory detector and has survived as a most likely correct data value. Thus, the process of deciding upon the most likely data value does not occur immediately following reading of the analog data from the magnetic disk as was the case with the prior peak-detection technique. Rather, the data decision occurs at the end of a process sequence following a number of detection process steps.
The required bit resolution of each sample provided by an analog-to-digital converter within a digital detector of the read channel can be determined by the robustness of the channel in relation to noise and other factors. The presence of powerful error correction code processes also serves to enhance accuracy of data reproduction. Presently, a high speed analog-to-digital converter having six-bit resolution has generally proven adequate for synchronous sample quantization of user data at the predetermined channel data rate. PRML synchronous data detection channels frequently employ six-bit flash analog-to-digital converters for providing synchronous samples of the analog signal read from the storage medium. One example of a PRML synchronous data detection channel is found in commonly assigned U.S. Pat. No. 5,341,249, entitled: "Disk Drive Using PRML Class IV Sampling Data Detection with Digital Adaptive Equalization", the disclosure thereof being incorporated herein by reference.
While accurate user data retrieval from a PRML-based magnetic data storage device is a principal design consideration, another consideration is accurate head positioning. The read/write data transducer head must be accurately positioned over the data track, so that the desired information is passed into the detection channel. As tracks become narrower and are written closer together, accurate head positioning during track following operations becomes more challenging and more important within the disk drive.
Read transducers, particularly inductive transducers, are well suited for service as position detectors, as flux magnitude of a servo burst is roughly proportional to the portion of the magnetic gap passing over the recorded burst. Magneto-resistive ("MR") read elements tend to have output signals which are far less proportional to burst amplitude than inductive read elements, and head calibration routines are frequently employed when MR heads are used within embedded sector head position servo loops.
A head positioning servo loop is used to control e.g. a rotary voice coil motor of an actuator for rapidly repositioning the head from track to track during track seeking operations, and for accurately positioning and maintaining the head at the desired track location during track following operations. In the case of magnetic disk drives, head positioning information is typically provided in servo sectors interspersed among data tracks at regular circumferential intervals around the disk surface. In one preferred example, commonly assigned U.S. patent application Ser. No. 08/724,977 filed on Oct. 3, 1996 and entitled: "Disk Drive Digital Servo Information, Detection and Estimation", the disclosure thereof being incorporated herein by reference, a wide-biphase servo arrangement was described in which the servo information is recorded at a rate lower than the data transfer rate, but in a format compatible for detection within the synchronous sampling data detection channel. In this example, the servo information is recorded at a constant data rate across the radius of the disk, the rate being associated with a user data rate at the inside diameter storage area of the disk. On the other hand, the user data is recorded, e.g. in radial bands or zones wherein each zone has a data rate adjusted to disk radius. The outer radius zone has a highest data rate, typically twice the data rate of the radially innermost data zone. The channel analog-to-digital converter must have a speed capable of providing synchronous digital samples at the highest data rate.
Frequently, although not necessarily, the servo fine position information is provided within each servo spoke as a series of fields of circumferentially sequential, radially offset constant frequency bursts. The burst waves are induced into the head, amplified and peak detected. Each wave peak may be sampled and quantized, or, frequently, the peak is stored on an integrating capacitor and a resultant average peak value is quantized and used by the servo control loop. Phase-coherent, concurrent servo bursts may also be used for head fine position control. One example of this alternative is provided in co-inventor Fisher's commonly assigned U.S. Pat. No. 5,576,906, entitled: "Synchronous Detection of Concurrent Servo Bursts for Fine Head Position in Disk Drive", the disclosure thereof being incorporated herein by reference.
Ideally, the same data head that will be reading the user data also reads the servo information recorded for the track being followed by the head positioning servo. In this way there should be little to no offset between the servo position information and the user data information, both being recorded as patterns of magnetic flux transitions. However, unlike the data channel which preferably has a certain process latency to provide maximum-likelihood data detection, the servo loop needs to obtain and to provide a head correction based upon the sensed head position as soon as possible, without waiting for a full revolution of the disk. The requirement for accurate head position information is more stringent than is required for user data samples, in at least the sense that the information must be processed immediately following availability, and in the sense that error correction code, and memory path detection techniques (which typically require a number of processing steps) are not usually used to protect the accuracy of the servo fine head position information.
In peak detection channels of the prior art, it was usual practice to include a separate analog servo peak detection circuit, followed by a servo analog-to-digital converter for providing fine position error information to the head positioner servo loop. With the prior approach, exemplified for example in commonly assigned U.S. Pat. No. 5,255,136, entitled: "High Capacity Submicro-Winchester Fixed Disk Drive", the disclosure thereof being incorporated herein by reference, the analog-to-digital converter was provided with sufficient resolution and speed to supply accurate and timely head fine position error information to the head position digital servo process.
However, since a synchronous data detection channel, such as PRML, already has at least one high speed analog-to-digital converter within the read channel, it would be desirable to use the same converter for both user data and servo position estimation, thereby eliminating additional and/or complex hardware which would add to storage device cost. Conventionally, the channel analog-to-digital converter has six bits conversion resolution which is satisfactory for data signal quantization within the PRML synchronous sampling data detection scheme. However, six bit resolution may prove marginal for servo fine position information quantization (i.e. servo burst demodulation), and a higher level of quantization, such as e.g. eight bits, would provide a more accurate head fine position error signal.
Some level of noise is present within the data detection channel. This noise is typically Gaussian or white noise. The noise is experienced at quantization and in a sense provides a form of dithering such that the noise may cause the read back signal, in this case the servo position error signal at the moment of sampling and digital conversion, to vary while the actual noiseless servo signal remains constant, for example. Digitally, when an entire servo burst is demodulated, a number of amplitude samples are obtained, and each sample carries some amount of quantization noise. These noisy samples are passed through a correlation filter and averaged by an integration function to provide an absolute average value. Since each sample will have different noise, a dithering effect is thus created with some potential cancellation of the noise. However, the noise modulation may not have sufficient amplitude to cause the analog-to-digital converter to use different comparators in quantizing the servo signal burst, and differential non-linearity may introduce further error into the servo amplitude average value.
FIG. 1 illustrates "differential non-linearity". To begin with, an analog-to digital conversion process theoretically has an infinite conversion accuracy, and the digital output would have sufficient precision to exactly correlate to the signal's analog amplitude at the sampling moment. Infinite linearity is shown by the line graph L of FIG. 1, which varies linearly as a function of sample amplitude. In practice, analog-to-digital converters are not infinitely accurate. Most commonly, analog-to-digital converters are composed of an array of voltage comparators having commonly connected differential inputs, and having stepped reference level inputs derived from a voltage divider network. This results in a stair-step granularity pattern SS which is superimposed on the line graph L in FIG. 1. The left-most levels represent nominal stair-step increments in an ideal granular analog-to-digital converter. In practice, however, the step intervals are not equal. Each voltage comparator within the analog-to-digital converter must be considered to be an independent random variable. The uneven stair-step levels are known as "differential non-linearity" and are shown as the second vertical column of levels in the FIG. 1 graph.
While differential non-linearity is a problem with all analog-to-digital converters, it has become increasingly exacerbated by the present trends in making integrated circuit processes more dense, and by reducing supply voltage potentials to e.g. 3.3 volts, or less. These constraints have tended to amplify the differential non-linearity problem confronted by the designer. When channel noise is added to the differential non-linearity quantization problems shown in e.g. FIG. 1, the result may be a less-than-accurate, less-than-satisfactory servo burst demodulation process when the read channel electronics are used.
It is known to provide a high speed analog-to-digital converter formed of two conversion circuits, such as ADC1 and ADC2 shown in FIG. 2, which alternatively quantize even and odd samples at a quantization rate which is e.g. one half of an effective data rate of the information carried in the analog signal. While this approach is generally satisfactory, the resultant samples are limited in resolution to the resolution of each conversion circuit. In the FIG. 2 example ADC1 and ADC 2 are 6 bit analog-to-digital converters. An example of sampling of data by the FIG. 2 dual ADC approach is presented in the FIG. 2A graph. While ADC1 and ADC 2 may be necessary to quantize the highest channel rate user data (outer radial data zone data), the servo information may be at a much slower data rate, such as onehalf the highest channel rate user data. This half-data-rate for servo quantization suggests that only one analog-to-digital converter is needed for servo quantization, and the other analog-to-digital converter is available for other useful work.
A hitherto unsolved need has arisen for a synchronous data detection channel analog-to-digital converter and conversion method which can be adapted to provide higher resolution for fine head position servo sampling during disk drive operations in which the head is settling toward, or following, a particular circular data track locus on the disk storage surface.
One object of the present invention is to provide a single analog-to-digital converter for servo as well as user data synchronous sampling within a hard disk drive in a manner which increases output resolution for the servo information, in a manner overcoming limitations and drawbacks of the prior art.
Another object of the present invention is to inject a predetermined offset signal into an analog servo signal stream in order to increase quantization accuracy of a bit-resolution-limited high speed analog-to-digital converter employed within a synchronously sampled data detection channel during a servo position error quantization interval.
A further object of the present invention is to inject a controlled offset signal into an analog servo signal stream prior to synchronous digital demodulation and to average synchronous digital samples over an averaging interval in order to increase servo burst quantization accuracy.
An improved analog-to-digital converter circuit is provided for a sampling data detection channel of a disk drive. The disk drive includes a rotating disk having data track areas divided by spoke areas containing header and servo head position information. The improved analog-to-digital converter circuit synchronously samples user data in the data track areas at a first quantization resolution and synchronously samples servo data from the spoke areas at a second quantization resolution effectively greater than said first quantization resolution. The converter circuit comprises an input for receiving an analog signal to be quantized from analog circuitry of the disk drive; an offset signal producing circuit for providing a predetermined analog offset signal; a combining circuit for combining the analog signal with the offset signal to provide a composite signal during a spoke servo sampling interval; an analog-to-digital conversion circuit for synchronously sampling the composite signal during the servo spoke sampling interval, and for synchronously sampling the analog signal during a user data sampling interval, for producing sequences of spoke servo samples and user data samples; and, a digital averaging circuit connected to average the servo spoke samples over a predetermined averaging interval to provide servo spoke average samples having increased quantization resolution.
In one preferred embodiment, an ADC having features of the present invention includes first and second analog summing circuits for receiving an analog signal from a source. The first analog summing circuit adds a first predetermined offset value to the analog input signal to provide a first analog sum and the second analog summing circuit adds a second predetermined offset value to the analog input signal to provide a second analog sum. Additionally, first and second ADCs are each individually connected to the first and the second analog summing circuits respectively. Thus, the first ADC receives the first analog sum from the first analog summing circuit and the second ADC receives the second analog sum from the second analog summing circuit. Both the first and the second ADCs are commonly connected to an analog front end circuit. The analog front end circuitry essentially provides a plurality of analog reference signals to the ADCs. The ADC further includes a digital summing and averaging circuit, such as an "n" bit adder, for calculating the sum and average of the first and second digitized samples provided by the first and second ADCs for providing an improved resolution digitized output with minimal quantization errors. Preferably, the ADCs are synchronized to a common clock and thus have a common sampling rate, thereby providing an output with a higher resolution digitized sample, e.g., an "n+1" bit digitized samples.
These and other objects, advantages, aspects and features of the present invention will be more fully understood and appreciated upon consideration of the following detailed description of a preferred embodiment, presented in conjunction with the accompanying drawings.
In the drawings:
FIG. 1 is a graph illustrating differential non-linearity within an analog-to-digital converter.
FIG. 2 is a block diagram of a conventional analog-to-digital converter.
FIG. 2A is a graph showing exemplary user data quantization levels in the FIG. 2 dual analog-to-digital converter.
FIG. 3 is a diagrammatic plan view of a disk format layout for a storage surface of a disk drive, showing constant data rate servo spokes embedded within zoned user data recording areas.
FIG. 4 is an enlarged, diagrammatic view of a head traversing a servo burst pattern recorded in one of the servo spokes of the FIG. 3 format.
FIG. 5 is a simplified model of a servo burst demodulation channel in accordance with principles of the present invention.
FIG. 6 is a block diagram of a disk drive having a synchronous sampling data detection channel with servo demodulation in accordance with principles of the present invention.
FIG. 7 is a block diagram of an analog-to-digital converter consistent with a first embodiment of the present invention.
FIG. 7A is graph showing quantization of servo burst information by the FIG. 7 analog-to-digital converter.
FIG. 8 is a block diagram of an analog-to-digital converter consistent with a second embodiment of the present invention.
FIG. 9 is a block diagram of an analog-to-digital converter consistent with a third embodiment of the present invention.
FIG. 10 is a graph of burst demodulation error (s) plotted as a function of signal-to-noise ratio within a synchronous sampling data detection channel.
FIG. 3 illustrates a data format for a storage disk 12. The disk 12 is preferably, although not necessarily, a magnetic hard disk, but it could represent an optical or magneto-optical disk. The disk includes a series of user data storage areas 14. The data storage 14 are arranged as a series of radial bands or zones, respectively labeled from outer zone to inner zone as 14A, 14B, 14C, 14D, 14E, 14F, 14G, 14H and 14i. In the present example, the disk 12 is rotated at a constant velocity, and relative velocity between the disk 12 and a magnetic head 40 increases as the head moves from an innermost landing zone LZ to the outermost data recording zone 14A. Thus, the data transfer rate may be adjusted upwardly in relation to relative velocity between the disk 12 and the head 40. The effective data transfer rate at the outer zone 14A is approximately twice the data transfer rate at the inner zone 14i. The landing zone LZ is conventionally provided for contact start-stop recording, which is frequently used in Winchester hard disk drives in which the head is formed on an air-bearing slider which glides very closely over the disk on an air bearing effect.
The data storage areas 14 are interrupted by a series of spaced apart, narrow radial servo spokes 16. In the present example each servo spoke 16 is recorded at a data rate roughly one half of a data rate at an innermost radial data zone 14i of the user data storage areas 14. The servo spoke may typically include synchronization information, track number and sector information, error detection overhead information, and a series of spaced apart, radially offset servo bursts, shown in FIG. 4 as 16A, 16B, 16C and 16D. The bursts are typically recorded as sine waves at a predetermined burst frequency. The relative placement and number of servo bursts per data track are selected in relation to an effective head width of the read element of head 40 (which most frequently is a magneto-resistive element), and a skew angle between a write element and the read element across the radial stroke of e.g. a rotary head positioner structure 18 (coarsely diagrammed in FIG. 6).
FIG. 4 shows the head 40 traversing across a track TKn and about to encounter a first servo burst 16A. The present invention is concerned with sequentially generating and averaging synchronous samples representing absolute relative amplitude of e.g. two servo bursts of interest, in order to develop a fine position error value for processing by a head positioner servo loop including a servo control process 140 (FIG. 6). Since each servo burst 16A, 16B, 16C, 16D is separated by an erase gap, intersymbol interference effects are present at burst boundary regions. Accordingly, FIG. 4 also graphs an underlapping sampling interval window which enables synchronous sampling and quantization of servo samples corresponding to burst 16A from an interval excluding boundary regions adjacent to the erase gaps on each side of the burst.
FIG. 5 represents an outline model of the present invention, and FIGS. 7, 8 and 9 provide more structural details concerning practical implementations. In FIG. 5, a noiseless channel signal 11 representing an ideal playback at some relative amplitude of the servo burst 16A is combined with noise 13 at a combining function to provide a noisy burst signal. The noisy burst signal is combined with a dither signal 17 by a second summing function 19. The dither signal sequence is designed with several properties in mind. First, the dither signal should be a DC-free signal; if a non-DC free dither signal is used, an unwanted net offset bias is imposed on samples taken from the servo burst. Second, the dither signal has to be unbiased relative to a correlation function which is imposed by a signal correlation filter function 35 downstream of the analog-to-digital conversion of synchronous samples. For example, if four samples are synchronously drawn from each sine wave period of the burst 16A, two of the samples may be positive and approximately equal, followed by two samples which are negative and approximately equal. The correlation function simply removes the sign of the negative samples, so that absolute digital amplitude values may be accumulated by an accumulation function provided by accumulator 37 and sample delay 39 connected in a recursive arrangement via feedback path 41. Path 43 provides a burst amplitude output value at the end of the burst sampling and processing interval.
Following introduction of the dither signal 17, and providing that the channel has two analog-to-digital converters 25 and 33, positive and negative half least-significant-bit offsets 23 and 31 are added to the dithered burst signal respectively by summing functions 21 and 29, before the burst signals reach converters 25 and 33. The positive and negative half least-significant-bit offsets effectively provide synchronous samples with half least-significant-bit resolution. For example, if the converters 25 and 33 are six-bit converters, the offsets provide a seven bit result upon averaging over the burst window. The dithering signal increases the resolution from six bits to e.g. eight bits for the averaged burst signal by adding additional noise to the burst signal before sampling. This additional noise added to the sequence of bursts assures that any differential non-linearity within converters 25 and 33 do not preclude multiple comparators from being used during quantizing the samples taken from the burst signal. Thus, the effects of differential non-linearity are effectively moderated by use of multiple comparators and by averaging the filtered samples over the burst sampling interval. In this example, 32 samples are taken from eight sine wave periods of each burst, and the 32 samples are then averaged to produce an average burst amplitude value on path 43.
FIG. 10 shows that, unexpectedly, as the channel signal-to-noise ratio improves (right hand direction, the burst demodulation error (s) improves for a while, but as the signal-to-noise ratio continues to improve, the burst demodulation error tends to increase, due to differential non-linearity and quantization error within the analog to digital converter. By employing the techniques described herein, this effect is overcome.
As shown in FIG. 6 an exemplary hard disk drive 10 includes the rotating data storage disk 12 coated with a suitable magnetic data storage medium. The data transducer 40 is positioned in close proximity to the data storage surface of the disk by e.g. a rotary voice coil actuator structure 18, and in conventional fashion includes e.g. a thin film inductive write element, and a magneto-resistive (MR) read element. As already explained in connection with FIGS. 3 and 4, the data storage surface of the disk 12 includes user data areas 14 which are separated by a series of radially extending, circumferentially spaced apart and embedded servo sectors or spokes 16. The spokes 16 are preferably, although not necessarily, encoded in accordance with the referenced copending U.S. patent. application Ser. No. 08/724,977. While only one data transducer structure 40 is shown in FIG. 1, it will be appreciated that multiple disk surfaces and heads are provided within commercially useful hard disk drives and that the drive 10 is by way of explanation and example of principles of the present invention, rather than as a commercial embodiment.
As shown in FIG. 6, a sampling data detection channel 22 employing an ADC 20 according to principles of the present invention comprises a preamplifier 30 for receiving analog information signals from a magnetic transducer 40 via a read channel data path including the preamplifier 30, a variable gain amplifier (VGA) 50, and equalizer/filter circuit 60 connected as shown in FIG. 6. The variable gain amplifier 50 may act independently, or in cooperation with a gain control loop 92, to receive the analog signals from the preamplifier 30 and adaptively adjust the gain of the signals. The gain-normalized signals are then filtered and equalized by the equalizer circuit 60. Thereafter, an ADC circuit 20 connected to the equalizer circuit 60 receives the gain-normalized and equalized analog signals and synchronously samples the analog signals to provide digitized samples. The present invention resides within improvements to the ADC circuit 20, so that during servo sampling intervals, the ADC circuit provides accurate digital head position error values, while during user data sampling the ADC circuit provides somewhat less accurate user data digital samples.
Following quantization within the ADC circuit 20, the digitized samples are selectively processed by the remainder of the sampling data detection electronics 10 which includes in the FIG. 6 example: an adaptive FIR filter 70 (e.g. PR4 target spectrum), target filter 110 (e.g. EPR4 target spectrum) and target detector 120, such as a Viterbi detector forming a user data digital channel, and a burst detector 80, chunk synchronization detection circuit 90, and servo fields decoder within a head position servo loop, and a gain control 92, a timing control 94, and error circuit 96 within gain and timing loops which operate during both user data sequence detection from the data areas 14 of the disk, and header/servo sequence detection from the spoke areas 16 of the disk. A servo control process 140 and a servo driver 150 provide driving signals to the actuator voice coil motor 18 thereby to move the head 40 from track to track during track seeking operations, and to maintain and correct head position during track following operations.
The invention set forth herein is directed to an improved common servo/user data path ADC 20 for use within the disk drive synchronous data detection channel 22 shown in FIGS. 5 and 6, for example. As shown in FIG. 7, a first embodiment of the improved ADC 20 comprises first and second analog summing circuits 160 and 170 connected in parallel to the equalizer 60 of the sampling data detection channel 22. The first and second analog summing circuits 160 and 170 may each follow a conventional implementation such as a pair of input resistors, each having a first end for receiving signals to be summed, and each having a second end connected to a first input of an operational amplifier (op-amp) with a feedback resistor also connected from an output to the first input. Each op-amp further includes a second input tied to ground such that the output of the op-amp will equal the sum of the signals connected to the input resistors.
In this embodiment 20 of FIG. 7, the summing circuits 160 and 170 sum respectively predetermined offset signals with the incoming equalized analog signal from the equalizer 60 of the channel 22. The first analog summing circuit 160 adds a first predetermined value to the analog signal to provide a first analog sum, and the second analog summing circuit 170 adds a second predetermined value to the signal to provide a second analog sum.
The predetermined values added by each of the first and second analog summing circuits 160 and 170 to the incoming equalized analog signal provide predetermined complementary amplitude offsets for the first and second analog sums. The amplitude offsets substantially contribute to minimizing quantization or rounding errors during subsequent signal processing operations. One preferred set of amplitude offsets includes offsets with equal magnitude and opposite signs. More preferably, the magnitudes of the offsets may be calculated by dividing the least significant bit of the analog-to-digital converter incoming voltage quantization resolution by four, e.g. Offset=�l.s.b./4.
The first analog summing circuit 160 output is further connected to an input of a first ADC 180 and the second analog summing circuit 170 output is further connected to an input of a second ADC 190. In addition, an analog reference level circuit 200 is connected to a voltage supply bus and provides reference quantization levels to the ADCs 180 and 190. The reference level circuit 200 is typically implemented as a resistive voltage divider network, or any functionally equivalent circuitry, having a plurality of taps that provide a like number of nominally equal step level analog reference voltages.
Both the first ADC 180 and the second ADC 190 are preferably comprised of an array of digital comparators for comparing the incoming analog signals received from the first and second analog summing circuits 160 and 170, respectively, with analog reference levels provided by the analog reference level circuit 200. This part of each digitizer circuit 180, 190, is conventional and well understood to those skilled in the art.
A digital averaging circuit 210 is connected to average digital samples from the first ADC 180 and the second ADC 190. The circuit 210 sums and averages the digitized samples provided by the first and second ADCs 180 and 190 over an averaging interval established by internal circuitry clocked by a common clock circuit 220. The digital summing and averaging circuitry may be constructed of an n-bit adder. Moreover, the first and second ADCs 180, 190 are clocked in synchronism by a common clock provided by the common clock circuit 220 and thereby maintain a synchronized sampling rate.
In operation, the first ADC 180 quantizes the first analog sum from the first analog summing circuit 160 in reference to the analog reference signals from the reference level circuitry 200 to provide a sequence of first digitized samples. Similarly, a second ADC 190 quantizes the second analog sum from the second analog summing circuit 170 in reference to the analog reference signal from the reference level circuitry 200 to provide a sequence of second digitized samples. Moreover, the first 180 and second 190 ADCs are synchronized to a common clock 220 and thus have a common sampling rate during sampling of servo burst data as shown in FIG. 7A.
The digital summing and averaging circuit 210 calculates the sum and average of the first and second digitized samples to provide a digital average output. Since the first and second ADCs 180, 190, are synchronized to provide "n" bit digitized samples, the process of summing the samples by the summing/averaging circuit 210 provides an output with a higher resolution digitized sample, e.g., an "n+1" bit digitized sample.
By way of example, an ADC 20 as previously described may have a resolution value with a least significant bit (l.s.b.) equal to 1 and may receive an analog input signal having a peak-to-peak amplitude of 2.5 volts. Both the first 160 and second 170 summing circuits receive the 2.5 volts and then add a �l.s.b./4, or approximately 10 millivolt amplitude offset (preferably, each sum circuit receives an amplitude offset with opposite polarization, e.g., "+" or "-") . Thus, the first ADC 180 receives a 2.51 volts (2.5 v+0.01 v) analog signal from the first summing circuit 160. And similarly, the second ADC 190 receives a 2.49 volt (2.5 v-0.01 v) analog signal from the second summing circuit 170. Consequently, the first 180 and second 190 ADCs will round or quantize the analog signals received from the first 160 and second 170 summing circuits to provide digitized samples having peak to peak voltages of 2.51 volts and 2.49 volts respectively. Finally, the digital summing and averaging circuit 210 receives the 2.51 volt digitized sample from the first ADC 180 and the 2.49 volt digitized sample from the second ADC 190 and averages the samples to provide a 2.50-volt digitized average sample with increased bit resolution.
Most importantly, by adding amplitude offsets to the analog signals, converting the signals to digitized samples, and summing/averaging the digitized samples as explained hereinabove, an output is realized having minimal quantization errors and an increased bit resolution. This operation is most preferably carried out during servo spoke sampling intervals when the head 40 is passing over a prerecorded servo spoke 16 and reading i.e. head position burst values from a fine position field within the spoke. Increased resolution is thereupon advantageously utilized by the servo burst detector 80 in deriving a head position error value for insertion into the servo control process 140 shown in FIG. 1. During intervals when user data is being read from the data areas 14 of the disk 12, the ADC 20 is operating conventionally, e.g. synchronously at one half of the effective user data rate, with the ADC 180 quantifying even interleave samples, and the ADC 190 quantifying odd interleave samples, within a PR4ML channel target spectrum, for example. A control signal SERVO-- SPOKE/DATA may be applied externally to the common clocking circuit 220 to switch the ADC 20 from servo spoke mode to user data mode, depending upon location of the head 40 as over user a data area 14 or.a servo spoke 16.
In a second embodiment of the present invention, as shown in FIG. 8, an ADC function 20A providing improved servo burst resolution comprises an analog summing circuit 230 connected between the equalizer 60 of the data detection channel 22 and a conventional (e.g. 6 bit) flash analog-to-digital circuit (ADC) 250. The summing circuit 230 receives an analog signal input from the equalizer 60 and an analog dithering signal input from the output of a digital to analog converter (DAC) 240. The DAC circuit 240 includes conventional circuitry for converting a predetermined sequence of digital values into the analog dithering signal. Improved resolution within the ADC function 20A is realized by calculating or feeding a predetermined pattern of digital values, as from a table 242, to the DAC 240. The dither values are converted into the analog dithering signal by the DAC 240 and supplied to the analog summing circuit 230. The analog summing circuit 230 puts out a sum of the incoming equalized signal from equalizer 60 and the dithering signal from DAC 240 to the ADC 250. The ADC 250 then quantizes the incoming sum from summing circuit 230 into a sequence of synchronous digital samples at a sampling rate established by a common clocking control circuit 244. The analog summing circuit 230 and the ADC 250 may be constructed of circuitry similar to that shown in FIG. 8 and discussed in connection therewith. An output from the first ADC 250 is selectively connected to the digital burst processing circuit 80, which includes in this example an accumulation and averaging function for accumulating and averaging the samples over a predetermined sampling interval established e.g. by the clock circuit 244.
A presently preferred dithering sequence is:
lsb/8 3333 1111 -1-1-1-1 -3-3-3-3!
In general, adjacent dithering values are spaced in accordance with Isb/m increments. For example, if m=4, the adjacent dithering values would be lsb/4 apart.
During operation of the ADC 20a shown in FIG. 8, the analog summing circuit 230 receives from the equalizer 60 the first analog signal read from a spoke 16 by the magnetic transducer 40. Additionally, the analog summing circuit 230 receives an analog dithering signal from the DAC circuit 240 in synchronism with ADC 250 as established by clock control circuit 244. The analog dithering signal received from the DAC circuit 240 and the analog signal received from the read channel data path are summed by the analog summing circuit 230 to provide a summed analog signal, which is subsequently quantized by the first ADC 250 and put out to the burst detector 80 for the averaging function. The analog signal sum including the dither component will result in quantization by the first ADC 250 with increased least significant bit (l.s.b.) resolution, similar to the improved resolution previously described in conjunction with the ADC 20 of FIG. 7 The improved resolution n-bit digitized samples, provided by the ADC 250, are subsequently averaged by the burst processor 80 and result in improved resolution digital servo burst samples.
More precisely, during the reading of servo spoke data from a spoke 16, the analog summing circuit 230 adds the predetermined analog dithering signal to the gain-normalized and equalized analog signal received from the magnetic transducer 40 (via the analog read channel data path). The analog dithering signal provided by the DAC circuit 240 provides an offset to the analog signal for providing an analog summed signal. The offset values added to the analog signal result in quantization values, which are biased by the dithering component, to unit values above and below the nominal level of the unbiased equalized analog signal. Over an averaging interval within the burst processor 80, the samples are averaged and result in a burst amplitude value having an increased l.s.b. resolution. The increased bit resolution is consistent with the equation: "log2 m", where "m" is the number of different predetermined dithering values provided to the DAC circuit 240, which are subsequently converted to the analog dithering signal by the DAC circuit 240, and then added to the analog signal by the analog summing circuit 230 to provide the summed analog signal synchronously quantized by ADC 250.
The process of adding the analog dithering signal to the analog signal received from the disk data path is synchronized to the sampling rate of the first ADC 250 by the clock control circuit 244. Thus, the dithering values added to the analog signal have an effect of conditioning the analog signal such that subsequent sampling by the ADC 250 will occur with minimal errors. Moreover, the analog summed signal received by the ADC 250 will be more accurately sampled and averaged due to an increase in the effective resolution of the least significant bit (l.s.b.) burst value after averaging. A predetermined number of dithering values provided to the DAC circuit 240 will produce a predetermined number of analog dithering signals at the output of the DAC circuit 240. In one preferred implementation, four dithering values, i.e., m=4, may be used to increase the l.s.b. resolution of the ADC 250 by two bits, i.e., log 4=2 bits. The two-bit sampling point resolution improvement of ADC 250 provides an increase in the resolution of the digital sample realized at the output of the burst processor 80.
While reading the user data areas 14, however, the dithering value provided to the DAC circuit 240 is simply set to zero, since a higher resolution demodulated digital data sample is not required for the digital user data processing elements 110 and 120 of the channel 22. Thus, during user data mode, the analog summing circuit essentially passes the analog signal derived from the analog data path directly to the first ADC 250 without adding an analog dithering signal. Hence, an ADC function 20A with a common data path for demodulating user data as well as a high resolution servo spoke information mode for demodulating servo spoke data is realized.
In a third embodiment of the present invention as shown in FIG. 9, the elements, circuitry, and functionality of the embodiments shown in FIG. 7 and FIG. 8 are effectively combined. The third embodiment 20B of the ADC incorporating principles of the present invention comprises a first analog summing circuit 270 that receives an analog signal from a source, such as the equalizer 60 of the sampling data detection channel 22 of disk drive 10, and an analog dithering signal from a DAC circuit 280. The DAC circuit 280 produces a predetermined number of analog dithering signals based on a predetermined number dithering values provided thereto from e.g. a table register array 282. In this manner, "m" different dithering offset values may be introduced to the DAC circuit 280 to produce a like number of analog dithering signals which are subsequently summed with the channel analog signal by the first analog summing circuit 270 to provide a first summed analog signal. Additionally, a subsequent analog-to-digital conversion operation of the first summed analog signal realizes minimal quantization errors and a "log m" increased bit resolution as per the ADC 20a set forth in FIG. 4.
Second and third analog summing circuits 290 and 300 have inputs individually connected to the first analog summing circuit 270. Both the second and third analog summing circuits receive the first summed analog signal from the first analog summing circuit 270. The second analog summing circuit 290 adds a first predetermined offset value to the first analog summed signal to provide a second analog sum, and the third analog summing circuit 300 adds a second predetermined offset value to the first analog summed signal to provide a third analog sum. As with the FIG. 7 embodiment 20, preferred first and second offset values are �l.s.b./4m where m is the number of dithering levels, usually 2 or 4.
A first ADC 310 is connected to the second analog summing circuit 290 as well as to an analog reference level circuit 330. The first ADC 310 transforms the second analog sum received from the second summing circuit 290 and an analog reference signal received from the analog reference level circuitry 330 to a sequence of first digitized samples.
Similarly, a second ADC 320 is connected to the third analog summing circuit 300 as well as to the analog reference level circuit 330. The second ADC 320 transforms the third analog sum received from the third summing circuit 300 and the analog reference signal received from the analog front end circuit 330 to a sequence of second digitized samples.
Thereafter, a digital summing and averaging circuit 340, such as an n-bit adder, averages the sequences of first and second digitized samples respectively from the ADCs 310 and 320 over an averaging interval established by a common clock control circuit 284 and provides an output representative of the calculation. The clock 284 synchronizes quantization operations of the ADCs 310 and 320 with the averaging function provided by the circuit 340 and with the dithering function provided by DAC 280 via table 282. Those skilled in the art will appreciate that the FIG. 9 embodiment 20B effectively implements the FIG. 5 model and results in a superior servo burst synchronous demodulator for synchronously demodulating and providing a digital burst amplitude value in which unwanted noise and differential non-linearity are reduced.
The above described embodiments of the present invention have many advantages, including an improved synchronous data detection channel ADC and conversion method which can be adapted to provide a higher bit resolution with minimal quantization errors for fine head position servo sampling during data tracking operations in a disk drive. While a magnetic hard disk drive is described, the principles of the present invention may find useful application to other mass storage devices and the like.
Having thus described an embodiment of the invention, it will now be appreciated that the objects of the invention have been fully achieved, and it will be understood by those skilled in the art that many changes in construction and widely differing embodiments and applications of the invention will suggest themselves without departing from the spirit and scope of the invention. The disclosure and the description herein are purely illustrative and are not intended to be in any sense limiting.
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|U.S. Classification
|International Classification
|Cooperative Classification
|European Classification
|Dec 19, 1996
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118 Brookside St Louis, MO Apartments
St Louis, MO
Balcony, Deck, Patio
3 Bedroom
2 Bathroom
2 Baths
1,218 ft2 1218 ft2
Listing Description
118 brookside court, st louis mo 63146. Located in willow brook subdivision, 3 plus bedroom, 3 bath, ranch style home on a quiet cul-de-sac in a wonderful neighborhood. 1218 square feet of living space upstairs plus a walkout finished basement. Kitchen. Living room. Dining room. Family room downstairs. 2 car carport. Central air. Kitchen has new stove, new cabinets, new counter top, new sink, new faucet, new dishwasher, new range hood and new ceramic tile back splash! Fridge and stove included. Short walk to willow brook elementary and health club at the jcca. Available for occupancy immediately. $1195 first month rent and $1195 security deposit, both due upon acceptance. One year lease minimum. All utilities are at tenant expense including sewer, water and trash. Pets are negotiable with possible pet deposit, depending on number and size. This home is strictly for rent and is not available for lease purchase or option to buy.
Balcony, Deck, Patio


text:
Santas Gift PackagingFree
Kids, boys, and girls are waiting for the presents. Now this is your responsibility to help Santa package all packets in sequence and deliver to kids as per order. This game contains addictive features for packaging number of gifts in specified amount of time. You have to look at packaging sequence. If you miss any sequence and tap on other gifts, your packaging starts from beginning. From the first level, you will be getting normal speed and time limit. When you progress further, levels become advance and tricky to arrange gift packaging in sequence and so fast. Refer your target for packaging in each level, make time slice for each packaging and maintain speed for wrapping every gifts package.
Downloads: 3+Report app for spam or abuse!
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Mega Power Star Ram Charan's 'Yevadu' will hit the screens in October. The movie's production team have confirmed the news and announced that the film will release on October 10th worldwide.
Vamsi Paidipally is the director of this movie and Dil Raju is the producer. The movie has Shruti Haasan and Amy Jackson as the female leads. Allu Arjun and Kajal Aggarwal will be making cameo appearances in the film. Devi Sri Prasad composed the music for this film.


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home > Advice
What Does the Holy Spirit Do?
A closer look at the third person of the Trinity.
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I have a problem making friends because I'm too scared to open up to others.
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It's natural to be attracted to older people. But you have to keep that attraction in perspective.
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I'm scared to death. What do I do?
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We've all heard 'em—the myths, the rumors, the "Are you serious?" stories. Before you start buying the big lies about sex, take a look at these.
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I'm 19 and I've never been on a date. Is God holding back a man for me until I do something?
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I feel as if I need something I can see, touch and understand—how can I get rid of these doubts?
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It seems like nobody will miss what I'm taking. What does God say about this?
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Development is one of the issues on which the Organization for Economic Co-operation and Development (OECD) work more intensely. The EU is a full member of the Development Assistance Committee (DAC). According to the DAC mandate, "the Committee" develops "[...] the methods for making national resources available for assisting countries and areas in the process of economic development and for expanding and improving the flow of long term funds and other development assistance to them".
In the DAC, particular emphasis is dedicated to aid effectiveness, as shown by the adoption of the Paris Declaration and the Accra Agenda for Action. The Paris Declaration was signed during the Paris High Level Forum in 2005 between aid recipients (partner countries) and donors. The Declaration objective is improving the way aid is provided so as to achieve the Millennium Development Goals (MDGs) by 2015. The Accra Agenda for Action builds upon Paris Declaration on Aid Effectiveness. The text was written on the base of consultations with more than 80 developing countries, all OECD donors and a large number of civil society organizations from around the world.
The EU is the largest donor in the world, providing more than 60% of worldwide contributions. It is committed to increasing external assistance by 50% over the next five years and to implementing the Paris Declaration.


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Lord, everywhere we look, we see so much unbelief.
Sermon • Submitted
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Lord, everywhere we look, we see so much unbelief. So few people have any real interest in listening to what Your Word has to say to them. This isn't just a problem for other people. It's a problem for us. We're shaped by the world far more than we admit to ourselves. We say, 'Of course, we're sinners, every one of us' - but do we realize how true this is? Lord, we thank You that, at every stage of our life of faith, You speak to us Your Gospel of love: "Christ Jesus came into the world to save sinners" (1 Timothy 1:15).
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