text:
|Publication number
|Publication type
|Application number
|Publication date
|Feb 7, 2012
|Filing date
|Jul 29, 2009
|Priority date
|Jul 29, 2008
|Fee status
|Also published as
|Publication number
|Gary L. Swoboda
|Original Assignee
|Texas Instruments Incorporated
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (4), Classifications (20), Legal Events (2)
|External Links: USPTO, USPTO Assignment, Espacenet
The present application claims priority to and incorporates by reference U.S. Provisional Application No. 61/084,474 filed Jul. 29, 2008, entitled "Topology Discovery Training." The present application also claims priority to and incorporates by reference U.S. Provisional Application No. 61/084,471 filed Jul. 29, 2008, entitled "Series Equivalent Scans Across Multiple Scan Topologies." The present application also claims priority to and incorporates by reference U.S. Provisional Application No. 61/084,463 filed Jul. 29, 2008, entitled "Selecting a Scan Topology." The present application also claims priority to and incorporates by reference U.S. Provisional Application No. 61/084,458 filed Jul. 29, 2008, entitled "Automatic Scan Format Selection Based on Scan Topology Selection." The present application also claims priority to and incorporates by reference U.S. Provisional Application No. 61/084,453 filed Jul. 29, 2008, entitled "Dynamic Broadcast of Configuration Loads Supporting Multiple Transfer Formats." The present application also claims priority to and incorporates by reference U.S. Provisional Application No. 61/084,439 filed Jul. 29, 2008, entitled "Timing Protected Detection of Alternate Signaling Mechanism Using Clock and Data."
This invention generally relates to the field of testing integrated circuits and systems containing integrated circuits.
The IEEE 1149.1 standard was adopted in 1990. Built upon the work of the Joint Test Action Group (JTAG), it provided a pins-out view from one IC pad to another to help test engineers locate and discover faulty PC boards. A description of the boundary scan description language was added in 1994.
Complications arose as chips increased functionality and designs shifted away from PC boards to multichip modules and stacked die packages. These difficulties included handling the pin count requirements and multiple Test Access Port (TAP) controllers for System-on-Chip (SoC) devices, testing multichip modules and stacked die configurations, enhancing debug performance, and improving test and debug logic power-down in low-power conditions.
Organizations like the Mobile Industry Processor Interface Alliance and the NEXUS 5001 Forum took up the challenge to solve the problems specific to their industries.
Particular embodiments in accordance with the invention will now be described, by way of example only, and with reference to the accompanying drawings:
As chips add new functionality and system designs evolve away from boards and toward multi-chip system-on-chip (SoC) architectures, developers of handheld and consumer electronics are faced with stricter pin and package constraints. The IEEE 1149.7 standard is a new two-pin test and debug interface standard that supports half the number of pins of the IEEE 1149.1 technology, allowing developers to easily test and debug products with complex digital circuitry, multiple CPUs and applications software in products such as mobile and handheld communication devices.
Systems and integrated circuits that utilize IEEE 1149.7 may be designed to include a complex scan topology. Circuits and methods for selecting the scan topology during a test session will be described in more detail below.
The IEEE 1149.7 is a complementary superset of the widely adopted IEEE 1149.1 (JTAG) standard that has been in use for more than two decades. This standard defines a port into embedded systems for device manufacturing, testing and software development during system development. In addition to maintaining compatibility with IEEE 1149.1, the new standard improves debug capabilities and reduces SoC pin-count requirements. It also standardizes power-saving conditions, simplifies manufacturing of multi-chip modules and stacked die devices, and provides the ability to transport instrumentation data. Concepts and terminology used in IEEE 1149.1 and in IEEE 1149.7 are used in a similar manner herein and are therefore not described in detail herein.
Rather than replacing IEEE 1149.1, the new IEEE 1149.7 standard expands its functionality while reducing the number of pins used in some configurations. It supports new scan topologies that are favorable to stacked die and multichip module configurations and offers advanced capabilities to aid in software debug. It describes circuitry that may be added to an integrated circuit to provide access to on-chip IEEE standard test access ports (TAPs) specified by IEEE Std 1149.1-2001. It provides complete backward compatibility with the 1149.1 standard while aggressively adding features to supporting applications test and debug. The circuitry uses IEEE Standard 1149.1-2001 as its foundation.
The 1149.7 Standard delivers these capabilities with six classes of test access ports (T0-T5), with each class providing incremental capability. The IEEE 1149.7 standard has two groups of capabilities: Classes T0 through T3, which extend IEEE 1149.1 and enable new operations using the IEEE 1149.1 protocol, and Classes T4 and T5, which are focused on advanced two-pin operation using an Advanced Protocol.
Class T0 ensures compliance with the industry's test infrastructure by setting up IEEE 1149.7 devices to make them act compatibly with IEEE 1149.1. These techniques include the use of N-bit IR, 1-bit DR for bypass instruction, mandatory IDCODE (32-bit path), and mandatory instructions behaving as specified in the IEEE 1149.1 specification. After a test logic reset is initiated, all multi-TAP devices must conform to the mandatory IEEE 1149.1 instruction behavior and implement a 1-bit DR scan for the bypass instruction.
Class T1 instantiates a control system for the IEEE 1149.7 standard that is transparent to IEEE 1149.1 devices, providing a foundation for the advanced functionality implemented in Classes T1 through T5 without changing the IEEE 1149.1 state machine. It supports standardized test and functional resets along with power management of the TAP controller and test logic.
Class T2 offers a chip-level bypass mechanism that shortens scan paths and another mechanism that provides hot connect capability to achieve higher performance for testing high chip count applications,
Class T3 provides for boundary scan testing using a four signal star topology (Star-4), with TAP selection built into the TAP.7 controller, unlike the use of a Star-4 Scan Topology described by the IEEE 1149.1 Standard. A T3 TAP may be deployed in either a series or star scan topology. A star topology is preferable for testing stacked die configurations. Whereas
Class T4 provides a reduction of number of test and debug pins in SoC devices. It supports scan transactions with two pins instead of four, resulting in fewer total pins required on chip packages. This also helps with stacked die configurations because it is highly desirable to have debug pins connected in parallel when dies are stacked. Two-pin operation is provided by eliminating the original data lines and sending bidirectional serialized data over the Test Mode Select (TMS) line, which is renamed TMS Counter (TMSC). To implement this capability, the glueless star configuration from Class T3 is utilized, this time without Test Data In (TDI) and Test Data Out (TDO). This is the Star-2 configuration shown in
To address the rising number of pins in SoC devices, Class T4 adds scan formats to support transactions with two pins instead of four, resulting in fewer total pins required on chip packages. This also helps with stacked die configurations because it is highly desirable to have the fewest number of connectors possible when die are stacked. The key to two-pin operation is eliminating the original data lines and sending bidirectional serialized data over the Test Mode Select (TMS) line, which is renamed TMS Counter (TMSC). To implement this capability, the glueless star configuration from Class T3 is utilized, this time without Test Data In (TDI) and Test Data Out (TDO). This is the Star-2 configuration shown in
Besides reducing pin count, Class T4 defines optimized download-specific scan modes in which only useful information is downloaded. To improve pin operation performance, the clock rate also can be doubled. These features combined with the optimized transactions do not cause performance loss, instead improving performance in some cases.
Class T5 functionality is beneficial primarily to software designers utilizing a Test Access Port for debugging. This class gives the test port the ability to perform debug and instrumentation operations concurrently (data is transferred during idle time), which reduces the number of pins dedicated to instrumentation, and enables custom protocols to use the pins, a feature many vendors offer in nonstandard ways. Class T5 standardizes the process used to access the pins and provides both scan and data transport transactions using the two wire interface.
T0-T3, and T4/T5 four pin TAP.7s may be deployed in a Series Scan topology. T3 and T4/T5 four pin TAP.7s may be deployed in a Star-4 Scan topology. T4-T5 TAP.7s may be deployed in a Star-2 Scan Topology. When deployed in these scan topologies, all classes can traverse the state diagram using a common protocol (Standard—the legacy IEEE 1149.1 protocol). In the Series Scan Topologies data transfers to conventional 1149.1 instruction and data registers are performed with the Standard Protocol. In the Star-4 scan topology data transfers are performed with the Standard Protocol modified to prevent drive conflicts, with the ability to select the scan paths of only one TAP.7 controller in the topology at a time. This provides for sequential access to the paths of each TAP.7 controller in the branch. In the Star-2 scan topology, data transfers are performed only with the Advanced Protocol. The selection mechanisms for scan paths and TAPCs available with Star-4 operation are also available with Star-2 operation. Classes T0-T2 allow the use only the Standard Protocol, Class T3 allows the use of the Standard Protocol to traverse the TAPC state diagram and a modified Standard Protocol to either traverse the state diagram or perform data transfers in the Shift-IR and Shift-DR states. Classes T4 and T5 allow the use of the Standard Protocol to traverse the TAPC state diagram, a modified Standard Protocol to either traverse the state diagram or perform data transfers in the Shift-IR and Shift-DR states, when operated in a Star-4 Scan Topology, and Advanced Protocols to either traverse the state diagram or perform data transfers in the Shift-IR and Shift-DR states when operated in a Star-2 Scan Topology. It is important to note that with deployment in Star-4 and Star-2 topologies, TAP.7 controllers perform data transfers in these scan topologies using protocols unique to the topology in which they are deployed.
With Series Equivalent Scans, the selection of a single branch initiates the use of the protocol required to transfer data, while the selection of all branches initiates the use of the Standard Protocol since only traversing the state diagram is needed.
The operation of each of these Scan Topology Branches supports the selection of individual TAPCs and the scan paths associated with them during their independent operation. This is covered in the 1149.7 standard and not in this description.
TAP.7 architecture provides for the operation of Series, Star-4, and Star-2, Scan Topologies and other technologies sharing the TCK(C), TMS(C), TDI(C), and TDO(C) connections to a Debug Test System directing scan activity. These Scan Topologies are called branches of the system scan topology. With this architecture, an Adapter Test Access Port Controller (ADTAPC) is the gateway to scan facilities of a chip implementing an 1149.7 Test Access Port. The ADTAPC controls access to a Chip-Level Test Access Port Controller (CLTAPC) that provides access to chip-level scan paths
Since a typical boundary scan operation requires scanning the instruction registers and boundary scan cells of one or more devices between the Select-xR and Update-xR states, a method is needed to duplicate the scan transaction available with a Series Scan topology when more than one scan topology is involved. With this description, states such as the Capture-xR and Update-xR TAP are to be interpreted as follows: the "x" refers to either "D" for data or "I" for instruction. Embodiments of the invention provide this equivalent function, a series equivalent scan.
Series equivalent scans of a complex scan topology, i.e., a scan topology with two or more branches in which at least two of the branches are of differing technologies (see Table 1), sharing the same control and data signaling create the equivalent of an 1149.1 series scan that begins with the Select-xR state and ends with the Update-xR state. With a series Scan Topology, all scan paths of interest are scanned at the same time between these states. With a complex scan topology, this is not possible as methods used to transfer data to and from scan paths presented by Series, Star-2, and Star-4 Scan Topologies and other technologies is different.
With series equivalent scans, a scan is broken into sections consisting of one or more scan sections. With an 1149.7 Test Access Port, the scan section is one or more sequences of the Exit2-xR, one or more Shift-xR states, Exit1-xR, and one or more Pause-xR states. With another technology, scan data is delivered as defined by the technology. These scan sections are sandwiched between a preamble (Select-xR, Capture-xR, Exit1-xR, and one or more Pause-DR states) and a postamble (Exit2-xR and Update-DR states). A single branch is selected between the preamble and the first scan section and between scan sections. All branches are selected between the last scan section and the postamble. With the sequence described above, all or some CLTAPCs in all branches progress from either the Test-Logic-Reset or Pause-xR state to the Pause-xR state without encountering an Shift-xR state. The TAPCs of all branches of interest operate in lockstep during the preamble and postamble state sequences, with only the TAPCs within branches that are selected during scan sections.
Protocol usage by Technology
Operation of Branches
Modified Std
Modified Std
Modified Std
Modified Std
Modified Std
Modified Std
Select - Other
Tech. Defined
Tech. Defined
Tech. Defined
Tech. Defined
Tech. Defined
Tech. Defined
Table 1 lists various protocols that may be used with a Series Equivalent Scan. A protocol understood by the TAPCs of a selected branch is used to drive the state progression of a scan section. It is not necessary that the TAPCs forming a deselected branch understand the protocol used during this state progression. Scan operations are performed on the selected branch while the other branches remain dormant. Branches that are not selected remain dormant and ignore the protocol being used until they are selected. Once all branches are selected following the last scan section, the TAP controllers forming all branches move through the Update-xR and Capture-xR states in lock step. This provides the function of a series scan.
In summary, a scan of the paths with a branch move the state of the TAPCs forming the branch to Pause-xR, sequentially selecting and scanning the scan paths of interest within each branch beginning and ending the scans in the Pause-xR state. Once these scans are complete, the update/capture operation is performed simultaneously in all TAPCs of all branches of interest The TAPC state may be moved from the Update-xR state to either the Run-Test/Idle state or Select-DR state on to the Pause-xR state where the sequential scans can again be performed. This process preserves the timing between the Update-xR and Capture-DR states when portion of the operation that does not include the Shift-xR state is performed using the Standard Protocol.
The Run-Test-Idle state may also be used to select branches. This capability can be used to select a branch and park the state of one or more of the TAPCs forming the branch. This may be sequentially done for all branches. Only those TAPCs within a branch that are not parked may leave the Run-Test-Idle state. When all branches are selected and the TAPC state moved to the Pause-DR state via the Select-DR state. The TAPCs whose state is parked in Run-Test-Idle state do not participate in the scans.
A Selection Escape Sequence is used to initiate a selection sequence. This sequence can select all ADTAPCs within a branch while deselection all ADTAPCs within other branches or select all ADTAPCs within all branches. A deselection escape sequence deselects all ADTAPCs of all branches. Although selection and deselection escapes can be associated with any ADTAPC state, they are expected to be used while in the Pause-xR and Run-Test-Idle states. This process will be described in more detail below.
DTS/TS Connectivity
The TAP.7 architecture supports both simple and complex system connectivity with a graduated set of capability. A system may deploy any mix of TAP.1s, TAP.7s, and potentially other legacy technologies as shown in
Most systems will implement only one branch of the connectivity shown in this figure. In most cases, the target system (TS) will only have a limited number of TAPs. Other architectures, represented by branches 406, 407, can also be included as additional branches that are separate from those shown in
Technology Branches
Other embodiments may have various combinations of branch operation. Other embodiments may use different sets of commands, protocols, events, etc. The list of protocols in Table 1 is not intended to be limiting to embodiments of the invention in any manner.
The TAP.7 branches 403-405 have one or more TAP.7s connected in Series, Star-4, and Star-2 Scan Topologies. These branches contain logic to select or deselect an ADTAPC, indicated generally at 410. This logic provides for the selection and deselection of these branches with Selection and Deselection Escape Sequences. ADTAPC selection logic is optional for T0-T2 TAP.7s and mandatory for T3 and above TAP.7s. Including this logic in T0-T2 TAP.7s supports their deployment in systems where T4(N) and T5(N) TAP.7s may be deployed.
The TAP.1 branch 402 includes a TAP.1 or a T0-T2 TAP.7 without technology selection logic connected in series with other TAP.1s or TAP.7s. It operates with the standard protocol and TAPs with the four 1149.1 signals. This branch is selected using the TCK1 signal shown in this figure as it has no built-in selection mechanism. T0-T2 TAP.7s without selection must be included in a branch that is this type. The ADTAPC selection logic may be added to the current 1149.1 technology to make it selectable using common connectivity.
Proprietary technologies 406, 407 may be connected in parallel with the TAP.7 branches provided: the technology has a dedicated clock and at least one control/data input; the technology implements the technology selection mechanisms and protocols defined by the 1149.7 standard; and the clock pin of the technology is connected to the TCK(C) signal and the control/data pin is connected to the TMS(C) signal.
As noted previously, a TAP.1 branch is selected by keeping its TCK or TMS signal separated from the signal of like name of branches and gating one of the separate signals to deselect the branch. The gating of the TCK signal of this type of branch is used for selecting these types of branches. TAP.1s and T0-T2 TAP.7s without the Technology Selection Logic (TSL) are selected using this method. Any branch may be selected using this method if desired.
TAP.1s and TAP.7s can be deployed in topology branches as shown in Table 2. Each of these topologies is considered a technology within this document.
TABLE 2 Branch/technology deployment permissibility T0-T2 w/o w/ Branch Proprietary TAP.1 TSL TSL T3 T4(W) T5(W) T4(N) T5(N) TAP.1 No Yes Yes Yes Yes Yes Yes No No Series TAP.7 No No No Yes Yes Yes Yes No No Series TAP.7 No No No No Yes Yes Yes No No Star-4 TAP.7 No No No No No Yes Yes Yes Yes Star-2 Proprietary Yes No No No No No No No No
Chips, Components, and Boards
With the TAP.7 architecture, any part of the connectivity shown in
The IEEE 1149.1 test view allows only one TAPC per component. The 1149.7 test view is a superset that allows multiple TAPCs per component. With the 1149.7 test view a component: is either a package containing one or more chips, or a direct mount chip; provides access to one or more TAP.1 or TAP.7 controllers through the same or separate pins; and provides access to proprietary TAPCs or other technologies through the same or separate pins.
This superset blurs the boundary between board, component, and chip. This blurring allows operation across those boundaries as shown in
TAP.7 Deployment Scenarios
Series branches may be constructed from TAP.1s and four pin TAP.7s as shown in
In most cases, one or more TAP.7s is connected in one of the Scan Topologies shown in
The Star-2 Scan Topology illustrated in
Chip TAPC Hierarchy
A hierarchical view of TAPCs within a chip is needed to maintain IEEE 1149.1 compliance and provide solutions to the compatibility requirements identified earlier. For a given chip, three or more levels of TAPC hierarchy are accommodated as follows:
While all levels of the TAPC hierarchy need not be present in all chips, the TAP.7 architecture accommodates them when they occur. The TAPC hierarchy is shown in
A chip with IEEE 1149.7-compliant behavior always has a Chip-Level TAPC 702. It may also include one or more Embedded TAPCs 704, all of which are considered subordinate to the chip-level TAPC (CLTAPC). The CLTAPC is considered the parent of the Embedded TAPC(s). The addition of the Enhanced Protocol Unit (EPU) to a T1 or above TAP.7 controller adds the ADTAPC but does not add an instruction or data registers in series or parallel with those associated with the CLTAPC and the EMTAPCs. The ADTAPC is considered the parent of the CLTAPC. The addition of the Advanced Protocol Unit (APU) in a T4 or T5 TAP.7 does not add an additional TAPC or level of TAP.7 TAPC hierarchy.
The ADTAPC 702 is connected to the CLTAPC 704. The CLTAPC may provide access to EMTAPCs. The EMTAPCs are hidden following a Test Reset to present the test view of a component specified by the 1149.1 Standard. The "other TAPCs" portion of the hierarchy can have additional levels of hierarchy. The TAPC hierarchy may vary dramatically by chip, with the TAPs accessed varying by application. In one or more embodiments of the invention, the DTS dynamically manages the TAPC hierarchy to: accommodate a Star Scan Topology, minimize the length of the scan path, and avoid non-functional parts of the hierarchy.
Combined View of TAP Connectivity and TAPC Hierarchy
The combination of the system shown in
Selection Concepts
Additional selection concepts beyond those supported by the IEEE 1149.1 standard are provided to access to the CLTAPCs and EMTAPCs shown in
Hierarchical Selection and Deselection TAPCs
These concepts provide the DTS the means to interact with all or a subset of the technology connected to it. They provide a means to select the various levels of the hierarchy shown in
Determining the Scan Topology
In order for the Debug and Test System to select a particular scan topology, the TAP.7 controller's associated with a scan topology must be able to determine this association. The Debug and Test System can inform a TAP.7 controller as to the scan topology in which it resides in simple Scan Topologies. This is not the case with complex scan topologies.
Since T0-T2 TAP.7s can only be used with a Series Scan Topology, these TAP.7 controllers are presumed to be always operating in a Series Scan Topology. Since a T3 and above TAP.7 controller can be operated in either a Series or a Star-4 Scan Topology, T4(W) and T5(W) TAP.7s can be operated in Series, Star-4, and Star-2 Scan Topologies, and T4(N) and T5(N) TAP.7s can be operated in Star-2 Scan Topologies, a TAP.7 controller's association one of these scan topologies must be determined at run-time. This is accomplished using a process called Scan Topology Training.
With T3 and above TAP.7s, a TAP.7 controller determines the scan topology in which it resides with Scan Topology Training as follows. The Debug and Test System informs the TAP.7 controllers that Scan Topology Training is underway. It then stimulates the Scan Topology connected to it with TDI(C) and TDO(C) signal values and DR-Scans in a manner that produce differences in the TDI(C) and TDO(C) signal values and scan data observed by TAP.7 controllers in Series, Star-4, and Star-2 Scan Topologies. The TAP.7 controller records the TDI(C) and TDO(C) signal values along with scan data during Scan Topology Training in the Topology (TOPOL) Register. At the conclusion of the training, the TOPOL Register value identifies the scan topology in which the TAP.7 controller resides as the value of the TOPOL Register is are different for TAP.7 controllers deployed in Series, Star-4, and Star-2 Scan Topologies. Each T3 and above TAP.7 includes a TOPOL register, as indicated generally at 920 in
Topology Register Function
The Topology Register values specify the topology as listed in Table 3.
Topology Register Values
TOPOL value
TDOC behavior
TDOC remains HI-Z
TDOC may be driven
Star-4 with TDO drive allowed
TDOC may be driven
TDOC may be driven
As shown in Table 3 The Topology (TOPOL) Register value affects two operating characteristics as shown in: it defines the TAP.7 topology that must be specified during selection sequences for the TAP.7 to be placed Online; and it provides a means to HI-Z the TDO signal to prevent drive conflicts that could occur when the scan topology involves both Series and Star-4 Scan technology branches in certain cases (not described herein).
Scan-Path Characteristics Used to Determine the Scan Topology
Referring again to
A two step process, scan connectivity and scan continuity testing, that is orchestrated by the DTS exposes characteristics of a TAP.7 controller's connectivity used to determine the Scan Topology.
The scan connectivity test records the TDIC and TDOC signal values when both of these signals are driven by the DTS. This test determines whether a TAP.7 controller is deployed in a Star-4 Scan Topology. A logic 0 created by the DTS at the TDIC and TDOC signals can only be observed as such by TAP.7 controllers deployed in a Star-4 Scan Topology. TAP.7 controllers that are deployed in a Series or Star-2 Scan Topology observe either one or both of these signals as a logic 1. When the connectivity test determines the TAP.7 controller is deployed in a Star-4 Scan Topology, this determination survives the connectivity test that follows.
The connectivity test determines whether TAP.7 controllers that are not determined to be deployed in a Star-4 Scan Topology are deployed in a Series or Star-2 Scan Topology. This determination is made based on the scan data values observed during an all zeroes DR-Scan whose length is greater than the longest series scan path. A TAP.7 controller that observes logic 0 scan data is determined to be deployed in a Series Scan Topology while a TAP.7 controller that observes logic 1 scan data is determined to be deployed in a Star-2 Scan Topology. The connectivity and continuity tests are sufficient to determine the scan topology as shown in Table 4.
TABLE 4 Scan topology connectivity and continuity tests results Continuity test Scan data value Connectivity test observations along with TDIC and TDOC signal no Star-4 determination value observations by connectivity test Scan topology Data Scan topology TOPOL TDIC TDOC determination observed determination Series 0b 1b No 0b Yes Series 1b 0b No 0b Yes Series 1b 1b No 0b Yes Star-4 0b 0b Yes 0b — Star-2 1b 1b No 1b Yes
Scan Topology Training Command Sequence
Scan Topology Training utilizes the following sequence of commands to perform the connectivity and continuity tests: 1) CMD (STC2, APFC=Standard function), which configures the TDIC and TDOC pins of T4 and above TAP.7s as the T3 TAP.7 pin functions unless inhibited by the Chip-Level logic; 2) CMD (STC2, TOPOL=Star-4-HI-Z, unconditional), which sets the Topology Register for all T3 and higher TAP.7s to Star-4-HI-Z; 3) CMD (STMC, Test for Star-4 Scan Topology), which tests for a Star-4 Scan Topology while the DTS drives both TDI(C) and TDO(C) to a logic 0 during the Update-DR state of CP2 of the command; and 4) CMD (SCNB, Test for Series Scan Topology), which tests for a Series Scan Topology with a CR Scan of all zeros whose length is longer than the longest possible scan path.
The TOPOL Register records the results of connectivity and continuity tests performed by the STMC and SCNB Commands. The values of this register and their meaning are shown in Table 3. A Type-0—Type-3 Reset initializes this register value to 00b indicating Star-4-HI-Z when the startup option is Offline-at-Start-up-and to 01b indicating Series. Note that the Test-Logic-Reset state (a Type-4 Reset) does not change this register value. Subsequent to this, Scan Topology Training or commands may alter this value.
Connectivity Test
The STMC Command is used to perform the connectivity test. This command determines whether the scan topology is Star-4. The DTS drives the TDI(C) and TDO(C) signal values to a logic 0 value prior to the Update-DR state of Command Part 2 (CP2) of this command. The logic 0 TDI(C) and TDO(C) values can be easily accomplished using the following TAPC state machine state sequence to end CP2 of the STMC Command:
The DTS may drive both TDI(C) and TDO(C) signals to a logic 0 beginning at a point within the first Pause-DR state and release the drive of the TDO(C) signal (or both signals) at a point within the second Pause-DR state of this series of states. TAP.7 controllers deployed in a Star-4 Scan Topology see both the TDI(C) and TDO(C) signals as a logic 0. TAP.7 controllers that are deployed in either a Star-2 or Series Scan Topology see at least one of these signals as a logic 1. The Update-DR state of this sequence samples the TDI(C) and TDO(C) values and sets the Scan Topology Register to 00b when TDI(C) and TDO(C) values are both a logic 0 and 01b otherwise. A logic 0 value is sufficient to determine that the TAP.7 controller is deployed in a Star-4 Scan Topology.
Continuity Test
When the TOPOL Register value is 00b, the drive of TDO(C) is inhibited. This allows both the use of commands to deselect the CLTAPC when the ADTAPC is placed online following being placed Online following Offline-at-Start-up and the use of an SCNB Command to perform the continuity test without a drive conflict. With this TOPOL Register value, the TDO(C) drive is inhibited until the SCNB part of the test is completed. This prevents TDO(C) drive conflicts that would otherwise be possible during the CR Scan of the SCNB Command. A Series Branch will drive TDO while Star-4 and Star-2 Branches will not. Only one TAP.7 controller may drive the DTS TDO(C) connection.
The SCNB Command determines whether the scan topology is Star-2 or Series with TAP.7 controllers that have not already determined they are deployed in a Star-4 Scan Topology. The CR Scan of this command uses all zeroes data with a length greater than or equal to the series scan-path length of the Series Scan Topology. The EPU Bypass Bit of a TAP.7 controller in a Star-2 Scan Topology is a logic 1 at the end of this CR Scan while the EPU Bypass Bit of a TAP.7 controller in a Series Scan Topology is a logic 0 at the end of this CR Scan. This difference defines the scan topology when the Update-DR state of the CR Scan occurs. The Update-DR state of the SCNB CR Scan also converts the 00b TOPOL Register value to 10b.
Topology Tests/TOPOL register relationships
TDIC or TDOC
Scan data
as a ==
Resulting TOPOL
as a logic 1?
Register value:
00b - Star-4 HI-Z
01b - Series
10b - Star-4
01b - Series
11b - Star-2
TOPOL register initialization
Type-0-Type-3 Reset?
Resulting TOPOL value:
00b - Star-4 HI-Z
01b - Series
It should be noted that in the case where there are two scan topologies the topology may be completely determined by a single test, depending on the two scan topologies involved. Should there be more than the above scan topologies involved, other technologies may also be detected with these tests or by adding additional tests. Topologies could also be made to learn about other Technologies sharing the DTS connection if desired.
TAP.7 Controller Selection/Deselection
TAP.7 controller selection is applicable to T0-T2 TAP.7s when they implement the Technology Selection Function (TSL) function. It is applicable to T3 and T5 TAP.7s.
Control events provide a means for the DTS to select, deselect, and reset the TAP.7 controller and other technologies sharing the TCK(C) and TMS(C) DTS connectivity. Control events are context sensitive when the technology is selected. A technology may ignore an improperly placed control events when they do not meet the qualification criteria defined by the technology when the technology is selected. Control events are not context sensitive when the technology is selected. A deselected technology unconditionally responds to control events as there is no qualification criterion when the technology is deselected. As a result, the improper placement of a control event that is to initiate selection when at least one TAP.7 controller is deselected will in most cases cause erroneous operation and is considered a programming error. A technology that is not operating, such as one that is being held in reset by chip level logic or one that is not powered, are not required to respond to a deselection and selection events. There are two control events, selection events and deselection events.
With a TAP.7 controller, the qualification criterion is determined by the use of the Standard or the Advanced Protocol. With the Standard Protocol, the selection and deselection events are always qualified. With the Advanced Protocol, these events are initiate their intended actions provided that they are coincident with the first bit of a Scan Packet (SP) when this bit of information is being sent from the Debug and Test System (DTS) to the Target System (TS). They are ignored otherwise.
Two deselection and selection event sequences are shown in
The deselection and selection event sequences shown in
Escape Sequences signaled via TMS(C) and TCK(C)
2 or 3
Performs a technology specific function.
4 or 5
Initiates the deselection of an online technology.
6 or 7
Initiates the selection of a technology via a
subsequent selection test.
Resets all technologies (generates a Type-3
TAP.7 TAPC reset)
The DTS creates an escape sequence by generating one or more TMS(C) edge pairs while the TCK(C) signal is a logic 1 value. Even and odd TMS(C) edge counts beginning with two are given the same meaning. This accommodates the case where a change of state of the TMS(C) signal related to data occurs while the TCK(C) is a logic 1. This can occur because of propagation delays when a change in state of the TMS(C) signal is initiated by a falling edge of TCK(C) or by a change in state of the TMS(C) signal initiated by a rising edge of TCK(C).
General Selection Behavior with Selection/Deselection Events
The state diagram shown in
TAP.7 Selection/Deselection Sequences
As illustrated in
Online Activation Code
OAP - Online Activation Code
Technology selection:
xx == 0: yy: == 0:TAP.7 Series, Star-4, or Star-2
yy = 1: TAP.7 Series Topology,
yy = 2: TAP.7 Star-4 Topology,
yy = 3: TAP.7 Star-2 Topology,
1: TAP.7 technology, reserved,
2-3: May be used to select other technologies
Extension Code
Extension Code
STATE - Resynchronization State
Resynchronizing State - state required for placement
online and resynchronization:
yy == 0: Run-Test/Idle,
1: Select-DR-Scan,
2: Pause-IR,
3: Pause-DR
PROTECTED-Protected Drive Policy
Restrict drive policy:
y == 0: No change in drive policy
1: Set CGM Selection Count, Scan Group Candidate
Count, and Potential Scan Group Membership Counts to
indicate more than one member, candidate, or
potential selection
NGRLD - No Global Register State Load
The information following the Extension Code is:
y == 0: The Global Register State (a long
form selection sequence)
1: A Check Packet (a short form selection
TABLE 10 Global Register State Field Value Global Register State 12:09 yyyyy Reserved - send as a logic 0. 14:13 yy TPREV—Transport Protocol Revision value 19:15 yyyyy TPST—Data Channel State Enables value 22:20 yyy TPDEL—Transport Data Element Length value 24:23 yy RDYC—Ready Control value 26:25 yy DLYC—Delay Control value 31:27 yyyyy SCNFMT—Scan Format value
TAP.7 Control State Machine
The TAP.7 controller implements the technology selection state diagram function shown in
The OLS state indicates the TAP.7 controller is offline at start-up and remains in offline operation until selected. The TEST state indicates the controller is processing an online activation code and extension code. If a valid activation code is not detected, the controller transitions to the OFF state and remains in offline operation. If a correct activation code is detected, the controller transitions to the LOAD state and loads global registers. It then transitions to the CPRE state and evaluates the preamble CP bit. It then transitions to the CBDY0 state and evaluates the first CP directive bit and then in CBDY1 evaluates the second CP directive bit. It then transitions to the CDIRP state and processes the received directive. Depending on the directive, it then transitions to the ADV state and uses an advanced protocol for operation or it transitions to the STD state and uses the standard protocol for operation. Once operation is complete, it transitions back to the OFF state and waits for reception of the next event.
General/TAP.7 controller state mapping
Control State Machine
Selection State
equivalent collection of sub states
The models used for T0-T3 and T4 and above TAP.7s used different high level state names (ON and WAIT vs. BPA, CCA, SPA, and TPA). This change of names emphasizes that the selection state functions of the T4-T5 is a superset of the very similar T0-T3 selection state functions. The function of ON and WAIT T0-T3 TAP.7 operating states and the T4-T5 BPA, CPA, SPA, and TPA operating states with the Control State Machine states shown in Table 11.
Table 12 identifies the Control State Machine states that are mandatory and optional in some embodiments with T0-T2 TAP.7 that do not support TAP.7 controller selection and deselection, T0-T3 TAP.7 supporting TAP.7 controller selection and deselection, and T4 and above TAP.7 controllers.
With T4-T5 TAP.7s, the CPRE state is added to the WAIT function and the ADV state represents the SPA and TPA operating states.
TABLE 12 Mandatory and optional control state machine states Control Mandatory/Optional (M/O) Operating State State T0-T2 T0-T3 T4 and Machine Always Dynamically T4 and TAP.7 above TAP.7 State Selected Selectable T3 above ON BPA STD M M M M WAIT CCA OFF — M M M TEST, — M M M LOAD, — M M M CPRE — — — M CBDY0 — M M M CBDY1 — M M M CDIRP — M M M OLS — O O M — SPA ADV — — — M — TPA ADV — — — M
Control Event Qualification
A technology may place restrictions on the use of events other than the reset event when it is selected. This is called event qualification. With the TAP.7 controller, the criteria used to qualify events other than the reset event are defined by the Control State Machine state. An event can only affect the Control State Machine state behavior when it is qualified. It is ignored otherwise. It is the DTS's responsibility to use these events in a manner that meets a TAP.7 controller's qualification criteria as a failure to do so may cause erroneous operation.
Standard State (STD)
The behavior of the STD state is governed by Table 12. The Standard Protocol is used in this state with TAP.7 TAPC state machine state advancing every TCK(C). With the STD state selection and deselection events are always qualified. A deselection event places the controller offline with the TAPC state machine state parked in the state created by the TMS value coincident with the deselection event. A selection event initiates a selection test. The test results place the TAP.7 controller either online or offline.
Parking State Considerations
The parking state created by placing a TAP.7 controller offline must be considered when using selection and deselection events. A qualified selection or deselection event may park the TAP.7 controller in any TAPC state machine state. The resynchronization of the TAPC requires its TAPC state machine state be one of the following parking states or pair of states: Pause-DR, Pause-IR, Select-DR, Run-Test/Idle or Test-Logic-Reset.
There is no need to utilize a parking state other than one of the states listed above. If the TAP.7 TAPC state machine state is parked in a state other than one of the TAPC states listed above it will remain offline at least until a Type-0 through Type-3 reset occurs changing the TAPC state to the Test-Logic-Reset state.
With the Standard Protocol, selection and deselection events must be coincident with a TMS value associated with TAPC state machine where the combination of these produces one of the states listed above if subsequent re-synchronization is required. The state and TMS combinations producing parking states allowing resynchronization are shown in Table 13.
Offline placement that allows subsequent placement online
Deselection event
concurrent with:
State machine state
Parking State
selection possible
Update-DR, Update-IR,
Update-DR, Update-IR
Exit1-IR, Pause-IR
Exit1-DR, Pause-DR
Select-IR, Test-Logic
Test-Logic Reset
Other combinations
None of the above
TABLE 14 TAP.7 controller behavior in the STD state Type-0- Qualified Qualified Type-3 Offline-at- Selection Deselection Test-Logic- CP Next Reset? Startup? Event? Event? Reset? needed? State Next Behavior Yes No X x x x STD Operation with the Std. Protocol Yes Yes X x x x OLS Offline at Start-up No x Yes x x x TEST Initiating Selection Test No x No Yes x x OFF Offline No x No No Yes x STD Operation with Std. Protocol No x No No No Yes CPRE Input CP preamble bit No x No No No No STD Operation with the Std. Protocol
Advanced State (ADV)
When the advanced Protocol is being used with the TAP.7 controller, it advances its TAPC state machine state once for every scan packet (SP) that is not followed by a CP. Its behavior is governed by Table 15. A qualified deselection event places the TAP.7 controller offline. A qualified selection event initiates a selection sequence that places the TAP.7 controller either online or offline. The qualification of selection and deselection events is described in the following paragraphs.
Qualified selection and deselection events initiate Control State Machine state changes while in the ADV state. In this state, these events are qualified when they follow the last bit of one of the following: an SP that is not followed by a CP or transport packet (TP), a TP that follows an SP, or a CP. These events are ignored when these conditions are not met as shown in Table 15.
The DTS is responsible for using these events in a manner where they are not ignored. Selection events that are ignored are problematic. If a TAP.7 controller in the ADV state utilizes the information following the selection event erroneously, it may lose synchronization with the DTS. It is therefore the DTS's responsibility to use deselection and selection events in a manner in which they are not ignored.
A qualified deselection parks the TAPC state machine state in the TAPC state created by the last SP as shown in Table 15.
Event coincidence relationships with the advanced protocol
Deselection event
concurrent with 1st bit
Subsequent selection is
of SP associated with:
Resulting Parking State
Other combinations
None of the above
Selection and event qualification in the ADV state
Event is
Event is
Following the last bit of a:
SP that is not followed by a CP or TP.
A TP that follows an SP
Other conditions
TABLE 17 TAP.7 controller behavior while using the advanced protocol Type-0- Qualified Qualified Type-3 Offline-at- Selection Deselection Test-Logic- CP Next Reset? Startup? Event? Event? Reset? needed? State Next Behavior Yes No x x x x STD Operation with the Std. Protocol Yes Yes x x x x OLS Offline at Start-up No x Yes x x x TEST Initiating Selection Test No x No Yes x x OFF Offline No x No No Yes x STD Operation with Std. Protocol No x No No No Yes CPRE Input CP preamble bit No x No No No No ADV Operation with the Adv. Protocol
Offline State (OFF)
When a technology is offline, it does not operate. It ignores custom and deselection events. It processes the selection and reset events. A selection event causes a state change to the SELT state where it may be placed either offline or online. With a TAP.7 controller this state transition is to the TEST state. An offline TAP.7 controller begins a selection test when a selection control event is detected provided a T0-T3 reset is not active.
Test State (TEST)
A conceptual view of the function that is provided by the TEST state is shown in
A three part selection test is performed in this state. These parts determine whether the TAP.7 controller's technology is being selected, whether either All or the scan topology defined by TOPOL Register is being selected, and whether the TAP.7 controller state machine state is compatible with resynchronization to the DTS. Failing any of these tests places the TAP.7 controller offline.
When the TAP.7 technology is selected, the second test stores the SCNFMT Register with one of the following values base on the scan topology defined as the test criteria as shown in Table 15: All—JScan2; Series—JScan2; Star-4—JScan3; or Star-2—OScan1.
The TAP.7 controller develops the drive TDO and TMSC drive policy by monitoring command and scan selection directives (SSD) activity. Since the monitoring ceases when the controller is placed offline, its drive policy may not be current when it is placed online. A means to arbitrarily force the drive policy to a state where it provides drive protection is provided to deal with this case. Drive conflict prevention is invoked when the PROTECTED bit of the Extension Code (bit[2]) is a logic 1. This register bit leaves the drive policy unchanged when a logic 0. The drive policy description includes the effects of this action. When the LONG bit in the Extension Code (bit[3]) is a logic 1, a load of the TAP.7 controller registers follows the Extension Code. A CP follows the Extension code otherwise.
Referring still to
TEST operation
A TAP.7 controller performing a selection test is placed on offline when the selection test
determines any of the following are true:
1 - The Online Activation Code governed
A reserved TAP.7 technology
by Table 8 specifies:
A technology other than TAP.7 technology.
2 - The Online Activation Code value
The TAP.7 Class is T0-T2.
governed by Table 8 specifies the TAP.7
The Topology Register value indicates deployment in a
Star-2 topology and any of the bullets to
Star-4 or Series Scan Topology
the right are true:
3 - The Online Activation Code value
The TAP.7 Class is T0-T2.
governed by Table 8 specifies the TAP.7
The Topology Register value indicates deployment in a
Star-4 topology and any of the bullets to
Star-2 Scan Topology
the right are true:
The Topology Register value indicates deployment in a
Series Scan Topology.
The Online Activation Code value
The Topology Register value indicates deployment in a
governed by Table 8 specifies the TAP.7
Star-4 Scan Topology
Series topology and any of the bullets to
The Topology Register value indicates deployment in a
the right are true:
Star-2 Scan Topology
The Extension Code value governed by
Table 9 specifies a TAPC state machine
state that is different than the TAP.7
controller state machine state
The CPA state is exited using a CP_END
The SCN_FMT Register value specifies an
directive and bullets to the right are true:
unsupported scan format.
The TPST Register is non-zero and TAP.7 class is T0-T4.
The TPST Register is non-zero and the TPREV
Register is non-zero.
and be placed online otherwise.
A TAP.7 controller performing a selection test sets the Coupling Count (CC), Next Coupling Count (NCC), and CAPE Selection Count (CSC) to indicate More-Than-One-Selection provided all of the following are true: the TAP.7 controller has not been place offline, and the value of the PROTECT Bit in the Extension Code is a logic 1 with drive policy remaining unchanged otherwise.
A TAP.7 controller that has not been placed offline processes the bit of information following the Extension Code as one of the following: the BDY0 bit of a CP provided the LONG bit of the Extension Code is a logic 0, or the LSB of the Global Register State provided the LONG bit of the Extension Code is a logic 1. A TAP.7 controller that has not been placed offline sets the scan format to a value based on the TAP.7 topology specified by the Online Activation Code[3:2] as shown in Table 19.
TABLE 19 SCNFMT Register value resulting from the Topology Selection Test Online Activation Selection Criteria Resulting Scan Code[3:2] Topology Format Value 0 All JScan2 1 Series JScan2 2 Star-4 JScan3 3 Star-2 OScan1
Load Global Registers (LOAD)
A global register is a copy of configuration information required for the joint operation of the TAP.7 controllers sharing the DTS connection. These registers manage TAP.7 controller functions that affect the synchronized operation of a TAP.7 controller. An example of a global register is the Scan Format (SCNFMT) Register used to define the DTS/TS signaling protocol for scan transfers.
Global registers are stored using TAP.7 controller commands dedicated for this purpose. They are stored simultaneously in all Online TAP.7 controllers using TAP.7 controller commands dedicated to managing global registers. Their value changes synchronously in all Online TAP.7 controllers. A second means of storing global registers is provided with TAP.7 controller selection via the Control Protocol following a Selection Escape Sequence. The operation of commands and attributes of the Control Protocol assure Global Registers have the same value in all TAP.7 controllers whose ADTAPC state is not parked (an Online TAP.7 controller).
Global registers are loaded with the global register state information serially as shown in
With the long form of the selection sequence, the TAP.7 controller's Global Registers are configured as a shift register as shown in
The DTS transmits the Global Register State information defined in Table 10 with the register values supporting the T5 TAP.7 being transmitted first. With this approach, all Global Register information that is associated with the TAP.7 Classes above the class implemented is merely discarded.
The ZBS Inhibit (ZBSINH), Suspend (SUSPEND), and Exit Control Level (ECL) Registers are set to a logic 0 by the LOAD state and are not part of the shift register. Note that the load of Global Register State overwrites the Scan Format Value.
The loading of global registers is useful to re-establish context after a simple device has been placed in offline mode, for example. For example, a component that has an 1149.1 may be upgraded with a wrapper that performs at least the minimal 1149.7 functionality. The component may not permit access to the internals of its core, so that it may not be feasible to do scan topology training, for example. In this case, loading its global registers under control of the DTS can be used to configure the TAPC.
Directive Processing Within a CP (CBDY0, CBDY1, DIRP)
CP Format
The CHK (check) state is used to determine whether the attributes of the TAP.7 protocol required for Online Operation are supported by the TAP.7 controller when this state ends with the CP_END directive. It may also create a TAP.7 controller reset. Its use is invoked when operating by one of the following: 1) Standard Protocol and a value requiring the use of the Advanced Protocol is stored in the Scan Format Register; 2) Advanced Protocol and Command Part Two completes; or 3) Control Protocol and both parts of the selection test within the selection sequence pass. In each of these cases, the CP verifies the TAP.7 controller supports the capability required to operate Online without loss of synchronization.
The Check Packet (CP) format is shown in
The CP Preamble Element provides a period of time where the transition from the use of the Standard Protocol to the Advanced Protocol may occur. This is helpful to some DTS implementations. The DTS may use this time period to change the TMSC pin drive source or drive characteristics as the TAP.7 controller ignores the value of the Preamble Element. It may be beneficial to set the value the same as the first bit of the body.
The CP Postamble Element provides a period of time where the transition from the use of the Advanced Protocol to the Standard Protocol may occur. The DTS may use this time period to change its drive characteristics or the TMSC pin drive source as the TAP.7 controller ignores the value of the Preamble Element. It may be beneficial for this bit to have the same value as the last bit of the body.
From a conceptual standpoint, the TAP.7 controller detects CP directives by registering the TMSC input for TCKC periods k and k+1. Directive processing begins once two bits of the Body Element are registered. The most recent two bits of the Body Element form a CP directive as shown in
A CP directive may initiate one of the following actions: CP_EN—end the CP with a transition to BPA; end the CP with a transition to SPA; or continue the CPA state by placing the TAP.7 controller offline; CP_NOP—extend the CP Body by one bit when the TAP.7 controller is offline; and CP_RES—initiate a Type-3 TAP.7 controller reset.
A CP_END directive verifies that the TAP.7 global registers specify the Standard or Advanced Protocol that is supported. A global register is changed by either a command or the LOAD state the CP_END directive checks whether a CPA to SPA state transition would expose the TAP.7 controller to Advanced Protocol traffic that it does not support. If this is the case, the TAP.7 controller is placed offline. The WAIT and CPA states are exited otherwise.
A TAP.7 controller begins processing the CP Preamble Element immediately after any of the following: 1) a selection test that is not followed by a serial load of global registers; 2) a serial load of the global registers; 3) the TMS value associated with the Update-DR TAPC state associated with command part two provided all of the following are true: a) the TAP.7 class is T4 and above, b) the TAP.7 controller command is STFMT, the value to be stored in the SCNFMT register specifies the use of the Advanced Protocol; 4) the last bit of the SP associated with either a Select-DR-Scan or Run-Test/Idle state provided these states immediately follow the Update-DR TAPC state associated with command part two
The TAP.7 controller ignores the value of the Preamble and Postamble bits of a CP. Beginning with the second bit of the CP body, the last two bits of the body are be used as a CP directive causing the action shown in Table 16. The most recently received bit of the bit of the CP body is considered the MSB of the CP directives shown in Table 20.
TABLE 20 CP directives CP body last two bits Mnemonic MSB LSB Action CP_END 00b The CP body element is complete, Postamble Element follows CP_NOP 01b, 10b The CP body element is extended one bit period. CP_RES 11b The CP body element is complete, Postamble Element follows, a Type-3 TAP.7 controller reset occurs coincident with the Postamble Element.
Offline at Start-Up State (OLS)
The OLS state is activated by Type-0, Type1, Type-2, and Type-3 resets when the start-up option is Offline-at-Start-up. The OLS state presumes that the CLTAPC and embedded TAPCs within the STL have an unknown TAPC state machine state even though the TAP.7 controller's TAPC state is Test-Logic-Reset. This state couples the CLTAPC and moves its TAPC state machine state to Run-Test/Idle via the Test-Logic-Reset State using SYS_TCK and SYS_TMS. The process occurs concurrently with the resynchronization process. It begins when the Reset State Machine reaches the NO_RES state and proceeds at one half the TCKC frequency. This allows the actual TCKC frequency to be higher than the maximum operating frequency of the STL while in the OLS state.
While in the OLS state, selection events are qualified to initiate a selection test when they are preceded by TCK(C) and TMS(C) behavior meeting following criteria (i.e., a qualification sequence): 1) a selection event occurs coincident with bit [n]; 2) each TMS(C) value in the series of 28 values [n−2:n−28] is the inverse of value of the bit preceding it; and 3) an escape sequence event is not detected coincident with bits [n−1: n−27]. Therefore, equal bit values in bit periods [n−2] and [n−1] create a zero count value in bit period [n+1] and a control event in bit period [n] creates a zero count value in bit period [n+1]. A sequence of TMS(C) bits satisfying the criteria is called the OLS Selection Event Qualification Sequence and is shown in
The CLTAPC state can be initialized to the Run-Test/Idle state coincident with selection event qualification. While in the OLS state, a 5-bit counter illustrated in
As shown in
TAP.7 controller Offline-at-Start-up operation moves the CLTAPC and TAP.7 TAPC state machine states to the Run-Test/Idle state using a clock frequency that is a sub-multiple of TCKC frequency. A TAP.7 controller Offline-at-Start-up operation begins a selection test provided that all of the following are true: 1) a selection control event occurs in coincident with bit [n]; 2) a bit value in bits [n−2:n−28] of each bit of the series is the inverse of value of the bit preceding it; and 3) a control event is not detected coincident with bits [n−1: n−27].
As described in more detail with regard to
As described above with regard to
While the TAPC is online, it may perform various tests 2612 using associated system test logic as directed by the DTC and described in more detail above.
When the selection criteria specified by the activation code does not match 2608 the saved topology 2604, then the TAPC is placed offline 2614.
As described in more detail above, the selection event is transmitted on the TMSC signal line as a series of edge transitions while the TCK(C) line is held steady. The TMSC signal line connects to all of the TAPCs in a hierarchical layer in a parallel manner so that all of the TAPCs see the selection event in parallel.
As described in more detail above with regard to
While the invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various other embodiments of the invention will be apparent to persons skilled in the art upon reference to this description.
Although the embodiments of the invention find particular application to systems using Digital Signal Processors (DSPs), implemented, for example, in an Application Specific Integrated Circuit (ASIC), other embodiment may find application to other types of systems, which may have another type of processors. Another embodiment may also be a system that does not include a processor. An ASIC that embodies the invention may contain one or more megacells which each include custom designed functional circuits combined with pre-designed functional circuits provided by a design library, wherein some or all of the megacells include a test access port.
An embodiment of the invention may be a substrate to which is attached multiple chips that have individual test access ports, commonly referred to multi-chip modules. An embodiment may include stacked die devices that have individual test access ports. Another embodiment may be a substrate, such as a printed circuit board, to which is attached multiple chips that have individual test access ports.
While specific examples and illustrations have been presented herein for illustrative purposes, other embodiments may implement only portions of what is illustrated herein. Other embodiments may concepts discussed herein in various manners, such as state machine logic control flow logic, synchronous logic, asynchronous logic, various types of logic and transistor implementations, etc.
An embodiment of the invention may include a system with a processor coupled to a computer readable medium in which a software program is stored that contains instructions that when executed by the processor perform the functions of modules and circuits described herein. The computer readable medium may be memory storage such as dynamic random access memory (DRAM), static RAM (SRAM), read only memory (ROM), Programmable ROM (PROM), erasable PROM (EPROM) or other similar types of memory. The computer readable media may also be in the form of magnetic, optical, semiconductor or other types of discs or other portable memory devices that can be used to distribute the software for downloading to a system for execution by a processor. The computer readable media may also be in the form of magnetic, optical, semiconductor or other types of disc unit coupled to a system that can store the software for downloading or for direct execution by a processor.
While embodiments of the invention have been described in an IEEE 1149.7 environment, other embodiments of the invention may be used in test or control applications that are not 1EEE 1149.x compliant.
As used herein, the terms "applied," "connected," and "connection" mean electrically connected, including where additional elements may be in the electrical connection path. "Associated" means a controlling relationship, such as a memory resource that is controlled by an associated port. The terms assert, assertion, de-assert, de-assertion, negate and negation are used to avoid confusion when dealing with a mixture of active high and active low signals. Assert and assertion are used to indicate that a signal is rendered active, or logically true. De-assert, de-assertion, negate, and negation are used to indicate that a signal is rendered inactive, or logically false.
It is therefore contemplated that the appended claims will cover any such modifications of the embodiments as fall within the true scope and spirit of the invention.
|Cited Patent
|Filing date
|Publication date
|Nov 23, 2005
|Aug 11, 2009
|Intellitech Corporation
|Method and apparatus for optimized parallel testing and access of electronic circuits
|Jul 29, 2009
|Aug 2, 2011
|Texas Instruments Incorporated
|Selecting a scan topology
|Aug 2, 2011
|Texas Instruments Incorporated
|Automatic scan format selection based on scan topology selection
|Jan 28, 2010
|Industrial Technology Research Institute
|Test device and method for the soc test architecture
|U.S. Classification
|714/30, 714/731, 714/726, 714/727
|International Classification
|Cooperative Classification
|European Classification
|Jul 31, 2009
Owner name: TEXAS INSTRUMENTS INCORPORATED,TEXAS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SWOBODA, GARY L.;REEL/FRAME:023037/0099
Effective date: 20090729
Owner name: TEXAS INSTRUMENTS INCORPORATED, TEXAS
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SWOBODA, GARY L.;REEL/FRAME:023037/0099
Effective date: 20090729
|Jul 28, 2015
|Fee payment
Year of fee payment: 4


text:
It isn't time to go "all in" just yet, but five poker players busted for gambling in Mount Pleasant three years ago apparently have scored an early appeals win.
The judge overseeing their case wrote this week he is reversing the outcome of their February trial, essentially tossing out their convictions.
In a one-page letter, Circuit Judge R. Markley Dennis Jr. said it was likely that the players' chosen game of "Texas Hold 'em" -- which relies on bluff, bet and card know-how to be successful -- would withstand the legal test of being a game of skill versus an illegal game of chance.
"When faced with the issue, it is my opinion that the S.C. Supreme Court will likely adopt the 'dominate factor test,' " Dennis wrote attorneys from both sides of the case. "Under the dominate factor test, Texas Hold 'em is not gaming or gambling," he said.
Additionally, the judge said a section of the state's anti-gambling laws, as applied to this case, is ambiguous and "unconstitutionally vague and overbroad." The municipal court decision "must be reversed," he said.
Greenville attorney Jeff Phillips, who represents the five players, said he wanted to limit his comments until Dennis' signed order is published. But most observers agree the case is far from over and that Dennis' ruling would have been appealed up the chain, either way.
The case began in April 2006 when Mount Pleasant police raided a home on Glencoe Street. An estimated two dozen people were cited after authorities discovered two poker tables operating in the home they said was both a for-profit gambling operation and a community nuisance.
About 20 players opted not to fight the charges, pleading guilty. The others chose to confront the charges in court, eventually being convicted of gambling charges in front of Municipal Court Judge Larry Duffy. After the conviction, they paid misdemeanor ticket fines up to $262.
Ira Grossman, prosecutor for the town of Mount Pleasant, declined to talk strategy Friday but said Dennis' ruling is another step in what has become a widely followed case. "Everyone involved in this case assumed that it would reach the highest courts in the state," he said. "I would say that an appeal is likely."
The decision does not affect Mount Pleasant's ability to investigate other poker operations or make arrests, Grossman said, because it applies only to the present case. It also does not immediately affect other gambling challenges elsewhere in South Carolina.
The Mount Pleasant case joins a multi-tiered debate over gambling in South Carolina. One of the more visible fights is expected to come during the upcoming term of the state Legislature in January when a bill legalizing "social gambling" is expected to surface again. The bill, from state Sen. Glenn McConnell, R-Charleston, creates "an affirmative defense" from prosecution when the gambling is done in a private home, as long as "no house player, house bank or house odds exist, and where there is no house income from the operation of the game."
Reach Schuyler Kropf at 937-5551, or email@example.com.
Previous stories
Poker players: skill, not chance, is fundamental, published 12/14/08Judge to hear Texas Hold 'em case, published 02/08/09

subset: commoncrawl


text:
Craig Williams: Libya actually has a special relationship to Californians and played an important role in our growth spurt during the 60's and 70's.
The science community is certain that global climate change is linked to human behavior particularly to our energy demands and our sources of energy. These articles discuss the problems and potential solutions.
Netroots at Crossroads in Minneapolis This Weekend
Paul Hogarth: I look forward to this Conference as a way of re-engaging in the national struggle, and harnessing the energy everyone with a Wi-Fi connection can take to fight for progressive change.
The Oil Company Gusher
Robert Reich: This gusher is an embarrassment for an industry seeking to keep its $4 billion annual tax subsidy from the U.S. government, at a time when we're cutting social programs to reduce the budget deficit.
Reconsidering the Nuclear Power Industry Bailout
Tracy Emblem: the United States should consider phasing out its nuclear power plants over the next generation and begin investing in other safer renewable energy sources. We can lead the world in clean energy technology.
Safety on the Cheap
Robert Reich: G.E. marketed the Mark 1 boiling water reactors, used in TEPCO's Fukushima Daiichi plant, as cheaper to build than other reactors because they used a comparatively smaller and less expensive containment structure.
Solar Peace, or Blood for Oil: The Need to Broaden the Peace Movement
Tom Hayden: In his State of the Union address, President Obama opened a door through which the peace, labor and environmental movements should march, towards an energy future not dependent on resource wars.
Transition Initiative: Feeding Ourselves Tomorrow
Robert Haw: Climate change is fact. It will bring us great misery if fossil fuel use continues unabated. Perhaps a better name for the phenomena unfolding around us is climate chaos, because "a climate" (as we define it) will no longer exist.
The BP Oil Spill Saga: Where Things Stand Now
Marian Wang: Many questions remain unanswered about the long-term health and environmental effects of the crude oil and the unprecedented amount of dispersant, chemicals BP used to break down the thick crude. Both BP and the government have committed funding for continued study of these issues.
So What Happened to Global Warming?
Patrick Henningsen: Britain and Europe have been hit hard for the third straight record-breaking winter season. Labeled by experts as the coldest winter in 100 years and set to blow well into 2011, it is already raising some very interesting questions about the new ideological split we are witnessing throughout society in the much celebrated green debate.
Public Mobilization for a Nuclear-Free World
Lawrence S. Wittner: One of the ironies of the current international situation is that, although some government leaders now talk of building a nuclear weapons-free world, there has been limited public mobilization around that goal—at least compared to the action-packed 1980s.
On 10-10-10 Fight Big Oil and Big Coal
Lauren Steiner: Stand up and be counted at rallies and public hearings. Make telephone calls, sign petitions and write letters to public officials and newspapers and get your friends to do the same. Like Gandhi said, "Be the change you want to see in the world." There is so much you can do. Learn more here.
DREAM Act Delayed in the Senate, But DREAMers Continue
Seth Hoy: Maybe Congressional promises to keep fighting for the DREAM Act are enough; maybe they aren't. But what the DREAMers can take heart in is the energy and enthusiasm they reverberated through the Senate this week.
Fatal Pipeline Accident Turns Attention to Nation's Aging Pipelines
Marian Wang: More than 60 percent of the nation's gas pipelines are 40 years or older, AP reports. And age isn't the only issue. Older pipelines are often configured in such a way that they're unable to accommodate the latest pipeline safety technology.


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Electronic Submission of Tobacco Product Applications and Other Information; Public Workshop; Request for Comments
This Notice document was issued by the Food and Drug Administration (FDA)
For related information, Open Docket Folder
Food and Drug Administration
[Docket No. FDA-2013-N-0602]
Electronic Submission of Tobacco Product Applications and Other Information; Public Workshop; Request for Comments
Food and Drug Administration, HHS.
Notice of public workshop; request for comments.
The Food and Drug Administration (FDA), Center for Tobacco Products (CTP), is announcing a 1-day workshop to obtain public input on topics related to the potential electronic submission of tobacco product applications and other information. This workshop will focus on the technical aspects of electronic submissions, including potential standards for content, format, and structure. The input from the public workshop may assist the Agency in the potential development and implementation of an electronic submission standard for CTP. FDA is also opening a public docket to receive comments on this topic.
Date and Time: The public workshop will be held on July 18, 2013, from 9 a.m. to 3 p.m. Individuals who wish to attend, participate in, or view the free Webcast of the public workshop must register by 5 p.m. EDT on June 21, 2013. Submit either electronic or written comments to the docket by August 19, 2013.
Location: The public workshop will be held at 9200 Corporate Blvd., Rockville, MD 20850, 1-877-287-1373.
Contact Person: Karen M. Templeton-Somers, Office of Science, Center for Tobacco Products, Food and Drug Administration, 9200 Corporate Blvd., Rockville, MD, 20850, 1-877-287-1373, FAX: 240-276-3655, email: .
Registration to Attend the Workshop: If you wish to attend the workshop, make an oral presentation at the workshop, or view the free Webcast, you must register by submitting an electronic or written request by 5 p.m. EDT on June 21, 2013. Submit electronic requests to . A confirmation email will be sent to your registered email address at least 2 weeks prior to the workshop date. Those without email access may register by contacting Karen M. Templeton-Somers (see Contact Person). Registration is free, but early registration is recommended because seating is limited. FDA may limit the number of participants from each organization as well as the total number of participants based on space limitations. Onsite registration on the day of the workshop will be based on space availability. CTP plans to provide a free-of-charge, live Webcast of the workshop. Please note that the Webcast link will not be live until the meeting begins at approximately 9 a.m. EDT on July 18, 2013. If registration reaches maximum capacity, FDA will post a notice closing registration for the workshop at .
Requests for Oral Presentations: If you wish to make an oral presentation, please state your intention on your registration submission and submit your name, title, company or organization (if applicable), address, telephone number, and email address. FDA has included specific topics for discussion in section II of this document. You should identify by number each discussion topic(s) you wish to address in your presentation, and the approximate desired length of your presentation. FDA is interested in obtaining input from a range of stakeholders and interested parties, including, but not limited to, large and small pharmaceutical manufacturers experienced with electronic Common Technical Document (eCTD); vendors of software used to support electronic submissions; and large and small tobacco product manufacturers. Individuals and organizations with common interests are urged to coordinate their presentations or request time for a joint presentation. All requests to make oral presentations must be received by the close of registration at 5 p.m. EDT on June 21, 2013. Following the close of registration, FDA will determine the amount of time allotted to each presenter and the approximate time each oral presentation is to begin, and will select and notify participants by June 28, 2013. Presenters must submit any presentation materials to Karen M. Templeton-Somers (see Contact Person) via email no later than July 10, 2013. FDA will do its best to accommodate questions during the workshop, although questions from the audience may be limited. In addition, we strongly encourage submitting comments to the docket (see Comments).
If you need special accommodations because of disability, please contact Karen M. Templeton-Somers (see Contact Person) at least 7 days before the workshop.
Comments: Regardless of attendance at the public workshop, interested persons may submit comments on any of the topics for discussion in section II of this document by August 19, 2013. Submit electronic comments to . Submit written comments to the Division of Dockets Management (HFA-305), Food and Drug Administration, 5630 Fishers Lane, rm. 1061, Rockville, MD 20852. It is only necessary to send one set of comments. Identify comments with the docket number found in brackets in the heading of this document. Received comments may be seen in the Division of Dockets Management between 9 a.m. and 4 p.m., Monday through Friday, and will be posted to the docket at .
Supplementary Information
I. Background and Workshop Topics
The purpose of this workshop is to obtain public input from regulated industry and other stakeholders and interested parties on the potential development and implementation of a standardized structure for electronic submission of tobacco product applications and other information. Stakeholders and interested parties could include, but are not limited to, large and small pharmaceutical manufacturers with experience in electronic submissions; vendors of software used to support electronic submissions; and large and small tobacco product manufacturers. The workshop will focus on technical aspects related to electronic submissions and standards currently used in other FDA centers. The types of submissions potentially subject to any future electronic submission standard may include, but are not limited to, applications for premarket review of new tobacco products (section 910(b)(1) of the Federal Food, Drug, and Cosmetic Act) (the FD&C Act) (21 U.S.C. 387j(b)(1)), modified risk tobacco product applications (section 911(d) of the FD&C Act (21 U.S.C. 387k(d)), and reports submitted under section 905(j) of the FD&C Act (21 U.S.C. 387e(j)). In particular, FDA would like to discuss how available standardized submission structure and technologies facilitate preparation, submission, retrieval, processing, review, and archiving of submissions. For more information on study data standards resources, please see .
The electronic submission workshop will include discussion on eCTD, which is an International Conference on Harmonization (ICH) specification developed by ICH and its member parties. The eCTD provides an organizational structure for regulatory submissions utilizing comprehensive table of contents headings and hierarchy. Other FDA centers have been receiving submissions in the eCTD format since 2003. For more information on eCTD, please see .
CTP is interested in receiving input at the workshop and in the docket on the potential standardization of electronic tobacco product submissions. The input from the workshop may assist the Agency in developing and implementing a harmonized electronic submission standard at CTP.
II. Workshop Topics for Discussion
FDA is seeking public input on the following topics:
Dated: June 4, 2013.
Leslie Kux,
Assistant Commissioner for Policy.
[FR Doc. 2013-13532 Filed 6-6-13; 8:45 am]
No documents available.
Comment Period Closed
Aug 19 2013, at 11:59 PM ET
Tracking Number:
Document Information
Show More Details
Date Posted: Jun 7, 2013
Federal Register Number: 2013-13532
Comments Received*
See attached file(s)
See attached file(s)
The FDA Center for Tobacco Products should select and pilot eCTD.
Docket Information
This document is contained in
Related Dockets:
Related RINs: None
Related Documents:
Related Comments:
* This count refers to the total comment/submissions received on this document, as of 11:59 PM yesterday. Note: Agencies review all submissions, however some agencies may choose to redact, or withhold, certain submissions (or portions thereof) such as those containing private or proprietary information, inappropriate language, or duplicate/near duplicate examples of a mass-mail campaign. This can result in discrepancies between this count and those displayed when conducting searches on the Public Submission document type. For specific information about an agency's public submission policy, refer to its website or the Federal Register document.
Document text and images courtesy of the
Federal Register


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Shropshire Three Peaks
Posted January 9, 2016 / By richard / 0 Comments
I decided for my 42nd Birthday I'd do the whole Shropshire Three Peaks Challenge, a route I had set for an event in June, as well as any anytime challenge. I'm a long time out of running, with a spinal injury, so this would be a hike. I'd shoot for 14 hours or 3 miles …
Daniel Rowland Wins the Atacama Crossing 2013
Posted March 11, 2013 / By richard / 0 Comments
[10 March 2013, San Pedro de Atacama, Chile] The Atacama Crossing 2013 concluded with 132 competitors crossing the finish line, including a cancer survivor, two blind men, and two women living with diabetes. Daniel Rowland of Zimbabwe vied with Australia's Vlad Ixel to snag first place. The two men sprinted to the finish line within …
Jez Bragg completes 1900 mile New Zealand's Te Araroa Trail
Posted February 4, 2013 / By richard / 0 Comments
Jez Bragg from the UK, has completed the fastest traverse of the 1,898mile North-to-South Te Araroa Trail in a Record-Breaking 53 days. You can read all about it and find plenty of links to articles on Jez's own blog. http://jezbragg.blogspot.co.uk/
Ultramarathon Calendar – updated for Spain
Posted March 30, 2012 / By admin / 0 Comments
Our Ultramarathon Calendar has been updated for 2012, and now includes around 50 Spanish ultras. There are over 650 worldwide ultra running events now featured. Use the calendar to find events for your ultramarathon schedule. http://www.beyondmarathon.com/raceCalendar.php You can filter the calendar by country, as well as month and year. If you spot that any race …


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Welcome to the home page for the Town of Dickinson, a pristine people-based community set in the heart of Upstate New York. We're a community that prides itself on family, friends and traditions. We're the home to Otsiningo Park, The Spiedie Fest and SUNY Broome. Please use our website to learn more about our community and what we represent.
Certificate of Highway Closure
Local Law 6-2016
Garbage District Dissolution Letter
(view article)
Estoppel Notice
Public Hearing Garbage District Dissolution and Garbage District Map
Public Hearing June 6, 2016 5:30 pm
The 2016 Tentative Assessment Roll is now available to view online.
The Town of Dickinson Clerk's Office is no longer issuing Hunting/Fishing Licenses. You may obtain licenses at these area locations:
Municipal Cleanup Day will be held on Saturday May 21, 2016 from 8 am to 3 pm at the Town of Dickinson Highway Garage, 531 Old Front Street, Binghamton, NY.
New Yard
Sale Policy
Permits are now required for
garage and yard sales, and sales are limited to two per year for each
premises. The two sale limit does not include participation in
neighborhood sales, for which a single permit must be obtained to cover all of
the participants. Permits can be obtained from the Town Clerk's office at
no charge.
Watch for future announcements for the 125th Anniversary of the Town of Dickinson. A great event is being planned by our Town Anniversary Committee. The event will take place in September of 2016 and is planned to take place at the Port Dickinson Jeanne & John Wilfley Community Park.
WBNG TV Town of Dickinson Shared Services
Visit our Historian page to read about the history of Sunrise Terrace.
CAP_IMP Capital Improvement Water Department(view article)
...more news
...more events


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South West Builders
Our team can offer you a comprehensive building service covering most aspects of construction, decorating, plumbing heating and electrical work for home, garden or office. We have been in business over 12 years and have completed a number of both large and small jobs successfully, mainly with the London area. Our workers are experienced in their specialist areas, are very motivated, honest and reliable, and work hard to provide the client with exactly what they want.
We would like to invite you to take a look at our photo gallery which showcases a variety of our recent building projects, including loft conversions, house extensions, decorating etc.
Our service includes an initial meeting with the client to discuss requirements followed by the preparation of a free 'no obligation' quotation for the work.


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BBB Accredited Business since
Legend Plumbing CompanyAdditional Locations
Phone: (210) 340-8700 Fax: (210) 582-2708 View Additional Phone Numbers 542 N WW White Rd, San Antonio, TX 78219 http://www.asklegend.com
BBB Business Reviews may not be reproduced for sales or promotional purposes.
Request a Quote
BBB Accreditation
A BBB Accredited Business since
BBB has determined that Legend Plumbing Company meets BBB accreditation standards, which include a commitment to make a good faith effort to resolve any consumer complaints. BBB Accredited Businesses pay a fee for accreditation review/monitoring and for support of BBB services to the public.
BBB accreditation does not mean that the business' products or services have been evaluated or endorsed by BBB, or that BBB has made a determination as to the business' product quality or competency in performing services.
Reason for Rating
BBB rating is based on 13 factors. Get the details about the factors considered.
Factors that affect the rating for Legend Plumbing Company include:
- Length of time business has been operating
- Complaint volume filed with BBB for business of this size
- Response to 6 complaint(s) filed against business
- Resolution of complaint(s) filed against business
Customer Complaints Summary Read complaint details
|Complaint Type
|Total Closed Complaints
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See Trends in Complaints on Legend Plumbing Company | View Complaints Summary by Resolution Pie Chart on Legend Plumbing Company Complaint Type Pie Chart: Overview
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Additional Information
Licensing, Bonding or Registration
This business is in an industry that may require professional licensing, bonding or registration. BBB encourages you to check with the appropriate agency to be certain any requirements are currently being met.
These agencies may include:
Texas Commission on Environmental Quality
12100 Park 35 Circle, Austin TX 78711
Phone Number: (512) 239-1000
Texas State Board of Plumbing Examiners
929 E 41st St, Austin TX 78751
Phone Number: (800) 845-6584
Type of Entity
Business ManagementMr. Bret G Brown, President Renee M Brown, Vice-President
Contact Information
Business Category
Plumbers Plumbers - Commercial Plumbing - Renovation & Repair Plumbing Drains & Sewer Cleaning Septic Tanks & Systems Contractors & Dealers Sewer Contractors Propane Gas Plumbing Water Softening & Conditioning Equipment Service & Supplies Kitchen & Bath - Design & Remodeling Excavating Contractors


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Notice Of Annual General Meeting 2016Submitted by Barry Hilliard on Mon, 22/08/2016 - 11:16pm
All Members are invited to attend the Annual General Meeting (AGM) of the Saints City Trust. This will be held at The Saints Bar, Clarence Park, St. Albans on Monday 26th September 2016 at 7.30pm.
The main purpose of this meeting will be to:
- Consider the activities of the Trust over the previous period.
- To receive the Trust's Accounts for the financial year ended 31st May 2016.
- To ratify the appointment of up to 5 Trustees to the Trust Board.
- To ask questions to the Board and comment on the running of the Trust.


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In Brief: Senators agree on plan to replace Fannie and Freddie
Congressional efforts to shut down bailed-out Fannie Mae and Freddie Mac took a significant step forward with bipartisan agreement from key senators on a plan to overhaul the housing finance system.
The proposal released this week would slowly shrink the companies and replace them with a scaled-back government guarantee for mortgages. Details are expected to be disclosed in the coming days.
Fannie Mae and Freddie Mac, which own or guarantee about 60 percent of existing mortgages, were seized by the federal government in 2008 as they neared bankruptcy from bad loans they guaranteed during the subprime boom.
Chairman Tim Johnson, D-S.D., and the panel's top Republican, Michael Crapo of Idaho, said agreement was reached after hearings.
1936 Nobel Peace Prize to be auctioned
A 1936 Nobel Peace Prize discovered at a South American pawnshop is heading to the auction block.
It's only the second Nobel Prize to come to auction. The medal will be sold March 29 in Baltimore by Stack's Bowers Galleries.
In today's market, the gold alone is worth more than $9,000. As an object to collectors and world history, its value is much greater.
The 1936 Nobel Peace Prize recipient was Argentina's foreign minister, Carlos Saavedra Lamas.
Book of Winfrey columns set for print
Oprah Winfrey's latest book project is a collection of magazine columns by a writer she knows quite well: Oprah Winfrey.
"What I Know for Sure" features the monthly essays Winfrey has written for O, the Oprah Magazine, over the past 14 years. Flatiron Books, a new nonfiction imprint of Macmillan, announced Wednesday that "What I Know for Sure" will come out Sept. 2.
-- from wire reports


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Travel to Athens with this Athens Greece Parthenon Standee!
Our Athens Greece Parthenon Standee will give your venue the look of the Mediterranean. Each free-standing Athens Greece Parthenon Standee measures 6 1/2 feet high x 7 1/2 feet side and is printed on sturdy cardboard. The one-sided Parthenon standee requires some easy assembly.
Please allow ample time for delivery. Our ship date for this product is noted in your shopping cart. Many items are shipped separately, so please allow extra time for these items to arrive. Shipping charges are based on the value of the merchandise and not the number of shipments. For additional shipping information, contact our Customer Service Department at (firstname.lastname@example.com or 1-800-227-2789).


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When a Fort Fairfield, Maine man reported that he had found a chicken in his car that wouldn't let him in, police captured the plucky offender. They booked the chicken as C. Little and charged her with trespass, criminal mischief, public indecency, assault (with a deadly beak?) and littering.
Picks and Pans Review: Send Her to the Big House and Let Her Fry
updated 12/24/1984 AT 01:00 AM EST
•originally published 12/24/1984 AT 01:00 AM EST


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Planetary Radio
Each week, Planetary Radio visits with a scientist, engineer, project manager, astronaut, advocate or writer who provides a unique and exciting perspective on the exploration of our solar system and beyond. We also showcase regular features that raise your space IQ while they put a smile on your face. Host Mat Kaplan is joined by Planetary Society colleagues Bill Nye the Science Guy, Bruce Betts, and Emily Lakdawalla. We hit the road now and then to produce a Planetary Radio Live show in front of an audience. Drop us a line or enter the weekly space trivia contest at email@example.com.
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11/17/2015 | 28:50
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Emily Lakdawalla returns from the annual Division for Planetary Sciences meeting with big news from around the solar system. Then we talk with science journalist Traci Watson about the departure of the great Arecibo radio telescope's Director and the funding challenge that could shut down the observatory.
A Conversation with Andy Weir of "The Martian"
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- Andy Weir, Writer, Author of "The Martian"
"The Martian" has won universal acclaim from scientists, astronauts, NASA, science fiction fans, and people who thought they weren't science fiction fans. Mat Kaplan talks with the author about his harrowing, uplifting, amazingly detailed and realistic tale.
OSIRIS-REx Readies for Asteroid Bennu
09/15/2015 | 28:50
- Dante Lauretta, OSIRIS-REx Principal Investigator, University of Arizona
Dante Lauretta heads the most ambitious mission to an asteroid ever mounted. With one year left till launch, he returns to Planetary Radio with an update.
05/26/2015 | 28:50
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This special edition takes you behind the scenes on May 20, 2015 as LightSail is lifted into orbit. You'll hear the thrilling launch, meet key team members as they prepare for the big moment, and hear a special status report from Planetary Society CEO Bill Nye.
Spiraling Closer to Ceres With the Dawn Mission's Marc Rayman
05/19/2015 | 33:59
- Marc Rayman, Dawn Chief Engineer and Mission Director, Jet Propulsion Laboratory
It's the biggest dwarf planet between here and Pluto, and it has a new permanent resident. The Dawn spacecraft is orbiting Ceres in the asteroid belt, revealing it as never before. What are those bright spots anyway? We spend time with Dawn's Chief Engineer and Director, Marc Rayman.
03/24/2015 | 28:50
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Senior Editor Emily Lakdawalla has returned from the Lunar and Planetary Science Conference in Texas with the latest revelations about our solar system. She shares them in an extended report.
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03/10/2015 | 28:50
- George Whitesides, President and CEO, Virgin Galactic
6,000 job-seekers came to the new Long Beach, California home of Virgin Galactic's LauncherOne rocket on a recent morning. We sit down with CEO George Whitesides for a conversation about this new effort and the return of SpaceShipTwo.
Jim Bell Welcomes "The Interstellar Age"
03/03/2015 | 46:07
- Jim Bell, President of the Board of Directors, The Planetary Society
Planetary scientist and author Jim Bell has just written "The Interstellar Age—Inside the Forty-Year Voyager Mission." He talks with Mat Kaplan about the magnificent grand tour of the outer solar system that is now headed toward the stars.
Jonathan Goff Says Let's Redirect an Asteroid
02/24/2015 | 28:50
- Jonathan Goff, President and CEO, Altius Space Machines
ARM is the Asteroid Redirect Mission, and sometimes it seems that it doesn't have a friend in the world. But it does, and Jonathan Goff of Altius Space Machines is one.
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France's state of emergency in place since attacks in January claimed by the Islamic State group will be lifted July 26, the president said Thursday, but he stressed that the threat continues.
Francois Hollande spoke after presiding over the traditional Bastille Day parade with thousands of members of the military marching in meticulous formation, fighting machines rumbling down the Champs-Elysees and fighter jets overhead.
"We cannot prolong the state of emergency eternally ... Is the threat there? Yes," Hollande said.
He also said France will send military advisers to Iraq to help Iraqi troops retake Mosul, the Islamic State stronghold in the north. He...


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|Dining at the Inn is Continental, with an elegant yet casual atmosphere. There are three intimate dining rooms; the Oak Room with its rich golden oak tables, the more traditional Colonial Room with hand stenciled walls and fireplace, and the most recent addition the Veranda Room, a year round, glass enclosed porch, with its view of the fountain garden and the Yarmouthport town green.
|Our menu is ala carte and offers a wide selection of entrees prepared to order. Cape Cod's freshest seafood forms the basis of our salt air selections, in addition to our beef, poultry, and veal dinners. Our menu is also complimented by daily specials chosen by our chef. We feature an extensive wine cellar, and for your added pleasure, a lounge with full bar where you can enjoy a cocktail and conversation in front of an inviting fireplace.