text:
|Publication number
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|Application number
|Publication date
|Sep 1, 1998
|Filing date
|Nov 23, 1994
|Priority date
|Nov 23, 1994
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|Viet N. Ngo, Wei-Tek Tsai
|Original Assignee
|Cray Research, Inc.
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|Patent Citations (14), Non-Patent Citations (14), Referenced by (81), Classifications (7), Legal Events (15)
|External Links: USPTO, USPTO Assignment, Espacenet
Ol =(VLO+(Tl /VL)*(ML+MS)/Tl
1. Field of the Invention
The present invention pertains to the field of compilers for computer programs and, more particularly, to a method of vectorizing nested loops.
2. Background Information
Vectorization is one of the most fundamental and effective techniques for exploiting parallelism. Vector computers such as those described in U.S. Pat. No. 4,128,880, issued Dec. 5, 1978 to Cray and U.S. Pat. No. 4,636,942, issued Jan. 13, 1987 to Chen et al., the disclosures of which are hereby incorporated by reference, have been used to obtain large increases in processor bandwidth through the use of sets of pipelines which can operate in parallel to speed processing of data. Vector processors will usually operate most effectively on arrays of data. In some situations, however, performance enhancements can be obtained by transforming scalar operations into vector computations. For example, the loop
can be vectorized by fetching 64 different A(I) values to a vector register, adding 5 to each element of the vector register and storing the resulting vector back into A(I). In contrast, serial execution will perform 64 fetching, 64 addition and 64 storing operations. The total vector operations for the above loop are {fetch, add, store} while serial execution requires sixty four iterations of the fetch, add, and store scalar operations. Vectorization is typically performed during code compilation. A wide range of vectorizer designs have been proposed.
The fundamental transformations involved in vectorizing a loop include statement re-ordering, loop distribution, strip-mining and vector statement generation. These are summarily described as follows.
Statement re-ordering interchanges the textual positions of two statements within a loop body. Loop distribution splits a loop with more than one statement into a sequence of loops by distributing the control over single of less-sized group of statements. Strip-mining blocks the iteration space into strips, where each strip's length is equal to or smaller than the vector length of the underlying vector register. Vector statement generation is essentially mapping the input source code into machine vector code. It involves code generation for vector load and store operations.
In terms of legality, i.e., whether or not a particular loop transformation can be carried out, two statements can be re-ordered if there is no loop-independent dependence between the two statements. Loop distribution is legal if there is no loop-carried dependence pointing backward. Strip-mining a loop is always legal.
Nested loops are those iterative sequences in which a loop is placed within another loop. For instance, the instruction sequence
is a nested loop in which the innermost loop is the DO J loop while the outer loop is the DO I loop. Vectorization of a nested loop can be complicated. The simplest approach to nested loop vectorization is to vectorize the innermost loop. In some cases, however, as in the example shown above, the innermost loop may not be vectorizable due to a command or data dependency. (In the example above the inner DO J loop is not vectorizable due to the recurrence/cycle of T at line 5.) In other cases, even where the innermost loop is vectorizable the program may operate most efficiently if a non-innermost loop is the loop that is vectorized. (For instance, even if the inner DO J loop could be vectorized, the inner loop has a trip count of only 12 and cannot yield much performance improvement. On the other hand, the DO I loop has a trip count of 64.)
The potential benefits of non-innermost loop vectorization (also termed "outer loop vectorization" or "OLV") have been recognized. One of the most powerful OLV restructuring transformations presented to date is loop interchange (see, e.g., Banerjee, Loop Transformations for Restructuring Compilers, The Foundations, Kluwer Academic Publishers, 1993; Wolf, "Advanced Analysis and Optimizing for Parallelism", WORKSHOP, Oregon Graduate Institute, 1993; and Zima et al., Supercompilers for Parallel and Vector Computers, ACM Press Frontier Series, Addison-Wesley, Menlo Park, Calif., 1991). Under loop interchange the positions of the innermost loop and the target non-innermost loop are swapped, resulting in the innermost placement of the target loop. Loop interchange has been used to achieve such different optimization objectives as vectorization, parallelization and locality. In vectorizing, loop interchange has been used to move loops with cyclic dependencies outward and to move those loops without dependencies inward. The innermost loop or loops can then be vectorized to improve performance.
For instance, Wolf suggests the vectorization of an outer loop via loop interchange followed by inner loop vectorization. Wolf also describes "super vector" performance, a technique in which an innermost vectorizable loop is moved outward in order to enhance memory reuse. Finally, Wolf discusses nested loop vectorization but limits it to situations where one or more vectorizable loops can be moved to become the most deeply nested loops.
Zima et al. and in Allen et al. describe a framework which can be used to generate vector code for a statement S at all levels. (See Allen et al., "Automatic Translation of Fortran Programs to Vector Form," ACM Transactions on Programming Languages and Systems, 9(4):491-542, October 1987.) The framework operates to breaks dependence cycles by determining the smallest number co such that the serial execution of the co outermost loops suffices to break the dependence cycle; the remaining innermost loops, if any, can then be executed in vector mode. Under the framework, an outer loop is not vectorized if there is a recurrence on any of its inner loops. Loop interchange is used to move the recurrence outward.
Bose, "Heuristic Rule-Based Program Transformations for Enhanced Vectorization," Proceedings of the International Conference on Parallel Processing, 1988, proposes a knowledge-base approach under which a vectorization program works with the user interactively to come up with the best possible form of source code to be submitted to the compiler. Bose teaches that outer-loop vectorization can be used to improve register reuse. This framework also uses loop interchange to `innermost` an outer vector candidate loop.
In some situations, however, loop interchange may not be legal. Furthermore, even when interchange is legal, interchanging can potentially destroy vector reuse opportunities, resulting in a net performance degradation.
For instance, in order to carry out the loop interchange operation in a nested loop, it is necessary to convert the nested loop into a perfect nest. Lines 2, 3 and 7 in the nested loop example above hinder the formation of a perfect nest. Line 2 (i.e., the IF-conditional) can be pushed inside the J-loop. But lines 3 and 7, since they have been generated by scalarization techniques, cannot be eliminated so easily. (For more information on scalarization techniques see S. Carr, Memory-Hierarchy Management, PhD thesis, Rice University, October 1992, which is hereby incorporated by reference.) In fact, there is no known compiler technique which can reverse-scalarize; forward scalarization is popular since it yields several advantages, but reverse scalarization has not yet been developed. Thus, the above loop example cannot be transformed into a perfect nest. This implies that the I-loop cannot be made innermost and hence that the I-loop cannot be vectorized. In other words, the traditional approach fails to vectorize the outer loop.
Furthermore, even if the loop-interchange were to be successful, e.g., if lines 3 and 7 were absent, there may be more than one choice of loop for vectorization. Suppose the above nested loop, instead of being a 2-level nested loop, was a 3-level nested formed by adding, for instance, an additional loop DO K=1,64 at the outermost level. Now, both the I-loop and the K-loop are vectorization targets and a decision must be made as to which loop to vectorize. This decision cannot always be answered by the techniques of loop interchange followed by innermost loop vectorization. Instead, a framework is needed for guiding the vectorization of non-innermost loops without loop interchange and for optimally selecting the non-innermost loop having the largest return from vectorization. In addition, a composite performance metric is needed for capturing the most significant cost parameters of vector computer operation and for predicting the performance improvement that can be expected if a particular loop is vectorized.
The present invention is a method of vectorizing a non-innermost loop of a nested loop which does not rely on loop interchange. According to the method, the iterative loops of a nested loop are analyzed to determine if they can be vectorized (vector legality). If more than one iterative loop can be vectorized, a selection criteria is applied to select the iterative loop which would provide the most return from vectorization (vector selection).
FIG. 1 is a functional block diagram of vectorizing compiler which can be used to vectorize loops in source code according to the present invention;
FIG. 2 is a flow diagram of the steps taken by a computer in compiling source code into executable code;
FIG. 3 is a flow diagram of the steps taken by a computer in determining whether vectorization of a particular loop within a nested loop is legal and whether it is optimal;
FIG. 4 illustrates an n-level nested loop;
FIGS. 5a and 5b illustrate statement execution orderings;
FIG. 6 shows an example of a data dependence constraint;
FIG. 7 is a more detailed flow diagram of the steps taken by a computer in FIG. 3 when determining whether vectorization of a particular loop within a nested loop is legal; and
FIG. 8 is a more detailed flow diagram of the steps taken by a computer in FIG. 3 to select the optimal loop to be vectorized.
In the following detailed description of the Drawings, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration a specific embodiment in which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
FIG. 1 shows a computer system 10 having a vectorizing compiler 12 connected to a storage unit 14. In a sequence such as is shown in FIG. 2, source code stored in storage unit 14 (such as C or FORTRAN code) is read by compiler 12, is analyzed, a check is made for vectorizable code and the code is then compiled. The compiled code is then stored back to storage unit 14. In the preferred embodiment, vectorizing compiler 12 is implemented as a software program running on a computing platform such as a mainframe or a workstation.
One embodiment of the sequence of steps performed by vectorizing compiler 12 is shown generally in FIG. 2. In FIG. 2, at step 20 compiler 12 reads source code from storage unit 14 and performs syntax and semantic analyses. If the analyses complete in a normal manner, intermediate code 22 is produced and stored either within compiler 12 or back in storage unit 14. Control then moves to step 24.
At step 24, compiler 12 reviews intermediate code 22 for vectorizable loops. This review includes both control and data dependence analysis. In particular, vectorizing compiler searches for nested loops in order to determine whether one or more of the iterative loops can be vectorized. If more than one loop of a nested series of loops can be vectorized, compiler 12 assesses the relative value of vectorization of each of the vectorizable loops and selects one of the loops as the optimal loop to be vectorized. In addition to nested loop vectorization, other classical optimization techniques may be applied to further improve the performance of the generated code. Step 24 produces intermediate code 26 from intermediate code 22 and stores intermediate code 26 either within compiler 12 or back in storage unit 14. Control then moves to step 28.
At step 28, compiler 12 reads intermediate code 26 into memory, generates executable code based on intermediate code 26 and assigns registers or schedules instructions as applicable. Compiler 12 stores the resulting executable code either within compiler 12 or back in storage unit 14.
The problems associated with vectorization of nested loops through loop interchange described above can be alleviated to some extent by maintaining each loop's position within the nested loop. One problem with such a direct vectorization OLV approach is that for any non-innermost loop the contents of loops internal to that loop may be varying. Therefore, any method used to vectorize a non-innermost loop must determine not only the data and control dependencies of the loop in question but also the execution constraints imposed by the loops internal to that loop. One method of doing so is described next.
In one embodiment of the present invention, when compiler 12 determines the presence of a nested loop within the source code being compiled it enters a special routine which analyzes each iterative loop within the nested loop to determine if it is vectorizable (vector legality). If more than one iterative loop is vectorizable, compiler 12 then applies a selection criteria to select an optimal iterative loop from the plurality of iterative loops (vector selection).
A representative sequence of steps performed by compiler 12 in determining optimal direct vectorization of loops within a nested loop is shown generally in FIG. 3. In FIG. 3, compiler 12 begins by moving to step 30 where control and data dependencies inherent to the nested loop are determined. Control and data dependency analysis is well known in the art (see, e.g., Ferrante et al., The Program Dependence Graph and Its Use in Optimization, ACM Transactions on Programming Languages and Systems, pp. 319-349, Vol. 9, No. 3, July 1987 and Ballance et al., Program Dependence Graphs for the Rest of Us, Technical Report 92-10, The University of New Mexico, Department of Computer Science, August 1992, which are hereby incorporated by reference.). In one such embodiment, the control and data dependency analysis is performed by constructing a program dependence graph for the nested loop. (The advantage of the program dependence graph is that it explicitly represents both control and data dependencies. Since both dependencies are present in a single form, transformations like vectorization can treat control and data dependence uniformly as will be detailed below.)
Control dependency analysis looks at whether execution of one of the vertices in the graph conditionally depends upon the execution of another vertex. Data dependence analysis captures the dependence relationship between successive iteration instances of an iterative loop. A data dependence relation is a read-write ordering (i.e. a constraint) with respect to a particular data element which must be followed to preserve the semantic intent of the original code. Details on data dependence can be found in the Zima et al. reference cited in the Background of the Invention.
In the following discussion, the term data dependence encompasses three classes of data dependence: flow, anti, and output. Therefore we have defined a symbol δ* which denotes the class of data dependencies including flow, anti and output dependencies. Let S and T denote statements in a loop body. Then a dependence T δ* S is termed backward iff S lexically precedes T. Otherwise, the dependence is a forward dependence.
Once the control and data dependencies are known, compiler 12 moves to step 32 and enters an iterative loop to determine the vectorizable loops. In the example shown in FIG. 3, the nested loop is an N-level nested loop. At step 34, a check is made on the kth level loop to determine if it is vectorizable. If not, control moves to step 38. If, however, the kth-level loop is vectorizable, control move to step 36 and a designation for that loop is added to the list of vectorizable loops. Control then moves to step 38.
At 38, a check is made to see whether k=N. If so, the loop is exited and control moves to step 40. If not, control moves to 34, k is incremented and the next higher level loop is examined.
At 40, compiler 12 applies selection criteria to the loops contained in the list of vectorizable loops compiled above and determines the loop which provided an optimal return on vectorization. At 42, that optimal loop is vectorized.
A program model for direct vectorization will be described next. That program model will then be used to further develop the concept of vector legality for direct vectorization.
In the following discussion the lexicographic ordering is defined as follows. Let I=(i1, i2, . . . im) and J=(j1, j2, . . . jm) denote vectors of m integers, I, J εZm. We make the following definitions involving I:
I is a zero vector if all its elements are zero.
The leading element of I is the first nonzero element.
lev(I) is the position of the leading element. For example, if il is the leading element of I then lev(I)=l. If I is a zero vector then lev(I)=∞.
The leading negative element of I is the first negative element.
The leading positive element of I is the first positive element.
I is lexicographically positive (negative) if its leading element is positive (negative).
The sign of an integer i is denoted by sign(i) and is one (1) if i is positive, minus one (-1) if i is negative and zero if i=0.
I is a direction vector if each of its components is one of the integers 1, 0, -1.
The distance vector d of I, J, is denoted by dist(I,J) and is defined by dist(I,J)=J-I.
The direction vector θ of I, J, denoted by dir(I,J), is the sign of the distance vector d=dist(I,J). Thus for all loop levels, k (1≦k≦m), θ is defined as follows: ##EQU1## The partial order relation I<l J is defined as follows:
i1 =j1, i2 =j2, . . . , i1-l -j1-l, and il >jl.
An n-level nested loop is shown in FIG. 4. In FIG. 4, for any given value of k (where (1≦k≦n)), loop Lk at level k contains two instruction sequences Bk,l (where (1≦l≦2)). Each Bk,l consists of a combination of sequences of assignment and conditional statements. Therefore, there are (N1 �N2 � . . . �Nn) instances of the innermost loop body Bn,l.
Gamma (Γ) will be used as a generic term to denote the iteration space of Lk, (1≦k≦n). Let S and T be two assignment statements in the loop body. Then we write S<T if S lexically precedes T. The lexicographical ordering of statements is total. Let << denote serial execution order. The serial execution order of the instances of S εBn,1 is defined by S(I)<<l S(J) iff I<l J; this can be written as S(I)<<.sub.θ S(J) iff θ=dir(I, J). A similar notation is used to express dependencies. We say that S(I) δ.sub.θ T(J) iff S(I)<<.sub.θ S(J).
Let G=<V,E,T> be the associated program dependence graph for the loop model where
V is the set of all nodes in FIG. 4. In addition, V includes the requisite START, STOP, MULTI and LOOP nodes.
E is the set of all dependence edges. E is a subset of V�V�Zn �L where L is the set of dependence types: L={control, anti, flow, output},
T is a node type mapping. Given a node m εV, T(m) identifies the type of node m as one of the following: START, STOP, IF, MULTI, LOOP.
Let e εE, then e is a dependence edge of the form e=(S,T,θ,α), where S,T εV, with θεZn and αε {control, anti, flow, output}. We use e=(S,T,θ) as a shorthand to denote a data dependence edge.
Let G'=<V,E'> denote the data dependence subgraph of G where
E'={e=(S,T,θ,α) εE: αε {anti, flow, output}}
We augment G' to form a level k data dependence graph. The data dependence graph for a loop at level k is represented by Gk =<Vk,Ek >, a k-th level dependence graph of G', where
Vk ={μεV:μεBh,1 where h≧k and 1≧l≧2} and
Ek ={e=(S,T,θ) εE' and S,T εVk :lev(θ)=k or lev(θ)=∞}.
A level k program dependence graph is a graph formed by layering the control and Gk subgraphs. Let Gpk =<Vpk,Epk > denote a program dependence graph for some loop at level k where
Epk ={e=(S,T,θ,α) εE: e εEk or α={control}} and
Vpk ={μ,νεV:∃θ, α (μ,ν,θ,α) εEpk }.
A dependence path in Gpk is a path π=P(Gpk) of the form π=S1,S2, . . . ,St where Sr (1≦r≦t) are assignment statements and for every q (1≦q≦t) the dependence Sq δ*Sq+1, where * ε {control, anti, flow, output}, holds.
Let C(S,Gpk) denote the set of all cyclic paths from S to S in Gpk, where S is a statement in Vk. We have C(S,Gpk)={π:π=P(Gpk)=S1,S2, . . . ,St is a path in Gpk, where t≧1 and S1 =St =S}.
Two forms of loop structure are popular: the serial loop and the fully parallel loop (i.e., DOALL). Neither structure can adequately express the execution order of statements within a vectorized loop. Consider, for instance, a loop
where S and T represent assignment statements and where the execution constraints include a forward loop-independent dependence between S(I) and T(I) but where S(I) and T(I) are separately vectorizable.
If this is declared as a serial loop then the execution order is
which does not allow any opportunity for vectorization. On the contrary if this is declared as a DOALL loop, then the two threads (S1→T1) and (S2→T2) can be executed in parallel. Yet, neither of these two lexical structures permit the user to specify a vectorization of the form:
Step 1: Vector execution of S(1) and S(2)
Step 2: Vector execution of T(1) and T(2)
which is needed to vectorize within the above execution constraints. Note that Step 1 must be totally completed before Step 2 can begin execution. In other words, there ought to be four execution orderings: S(1)→T(1), S(1)→T(2), S(2)→T(1), and S(2)→T(2). The serial loop syntax does not implement the S(2)→T(1) part, despite implementing such unwanted orderings as S(1)→S(2) and T(1)→T(2). The DOALL loop misses the S(1)→T(2) and S(2)→T(1) constraints.
In light of these shortcomings, we propose the DOVEC construct which precisely implements the above four (and only four) execution orderings. Syntactically, the DOVEC construct uses the word `DOVEC` instead of `DO` in the loop header. DOVEC emulates the effect of vectorization of a loop at a particular level in the nested loop.
First, we consider a single DOVEC loop without any inner nesting depth, i.e., a single level loop, with I as the iteration count and two statements S and T constituting the loop body. Assume S lexically precedes T. Let i1 and j1 be two instances of the I trip count. Thus, I, J εΓ. Let νl denote the degree of parallelism in a hardware vectorizer (e.g., with a 64-element vectorizer, νl would be 64). The vector execution ordering constraints (νvl) of this single loop is given as follows: ##EQU2## where a νl of one corresponds to a serial execution order and where, when νl is very large (i.e., approaching infinity), then the condition (1) above is trivially implied while the condition (2) cannot be satisfied. Thus, with the generic DOVEC construct, in situations where νl can be arbitrarily large, the condition (2) can never be met.
This is not true, however, for a mixed loop nest. A mixed loop nest is a nest of loops consisting of one or more DO loops and a single DOVEC loop. This is the situation that arises when one loop out of the nested loop is vectorized. Let (L1,L2, . . . ,L1-I,Ll,Ll+1, . . . ,Lm) denote a mixed loop nest where the lth loop L1 is a DOVEC loop. Every other loop in the mixed nest is a DO loop. Let B(I) denote an instantiation of the loop body of L1.
Definition 1 (Vector Execution Order: νk)
The vector execution order at level l for Ll, denoted by νl vl, is defined by the following rules (vl is a short hand for the vector execution order constraints at level l when νl is infinitely large):
1. If I and J are index values such that I<k J where k≠1, then all iterations of B(I) shall be executed before the iteration instance B(J).
2. If I=J; S and T are statements in B; and S<T, then instance S(I) of S shall be executed before the instance T(I) of T.
3. Let I and J be index values such that I<l J. Let I'=(i1,i2, . . . ,il-1,0, il+1, . . . ,im), J'=(j1,j2,jl-1,0,jl+1, . . . ,jm) and statement S<T in B.
3.1 If I'=J', then S(I) shall be executed before T(J).
3.2 If I'<k J' where l<k≦m, then the iteration B(I) shall be executed before the iteration B(J).
3.3 If J'<k I' where l<k≦m, then the iteration B(J) shall be executed before the iteration B(I).
For example, consider the mixed loop nest below: ##EQU3## The mixed loop nest is of three levels, of which the innermost and outermost level loops are DO-loops and the middle loop is a DOVEC. This would be equivalent to direct vectorization of the middle loop. FIG. 5a shows the execution order for serial execution of the above loop nest without vectorization (treating DOVEC as a simple DO loop). FIG. 5b shows the execution order after direct vectorization of the middle loop. It should be noted that FIG. 5b shows two serial ordering edges that are no longer in the vector execution order. It is the detection of these missing edges and the determination of whether they are critical to existing data dependencies which drives direct vectorization.
The transformations necessary to perform innermost loop vectorization have been well studied (see, e.g., either of the Wolf or the Zima et al. references cited in the Background of the Invention). However, the feasibility of vectorizing a non-innermost loop has not been addressed and is the focus of this section. This section will develop a framework to determine when it is feasible to vectorize an outer loop. Vectorization of a loop at level k, Lk, requires ensuring that:
1. The data dependence relation (generated by the loop) is not violated by the constraints of νk.
2. There is no dependence cycle within the statements in the loop and all dependencies are forward.
If so, we can rewrite the loop body with a sequence of vector statements.
We focus on condition (1) and derive a condition for which νk of all statement instances at Lk is semantically valid. Lk being non-innermost doesn't change the applicability of statement reordering and loop distribution to satisfy condition (2). The following theorem ensures Gk contains the necessary data dependence edges to verify whether or not vk violates a program semantic.
Theorem 1
The execution order constraints imposed by E'-Ek are satisfied by νk.
Choose an arbitrary e εE'-Ek. Let e=(S,T,θ). Then choose any I, J εΓ such that sign (J-I)=θ. We will show that ((S, I), (T, J)) ενk. That is, that S(I)<T(J) is in the vector execution order νk. Let h=lev(θ). Since e .epsilon slash.Ek, h<k or h>k (and h≠∞). But by rule 1 of the definition of νk in Definition 1 above, h .epsilon slash. {∞,k}→>S(I)<T(J).
In essence Theorem 1 argues that if a data dependence edge, e, is carried by an outer loop, Llev(e) where (lev(e)<k), the dependence will be satisfied by serial execution of that outer loop. If, however, e is carried by an inner loop (lev(e)>k), νk will not disturb the serial execution order of its inner loops. In either case, e can be ignored. For example, consider the following nest: ##EQU4## The nest has a recurrence generated by the inner do-j loop. However, since E1 =φ, the recurrence/edge can be ignored.
Given that we know some of the data edges to include for legality test of νk, let us now characterize some of the data dependence constraints that will be violated by νk.
Definition 2
A dependence S1 δ* S2 is k-vectorization preventing iff νk violates the data dependence.
Theorem 2
Let θ be the direction vector associated with a dependence S δ* T in loop Lk. Let ih, i εθ, denote repetition of i a total of h times. If h is zero then i .epsilon slash.θ. θ is k-vectorization preventing if θ=(0k-1, 1, 0h, -1, . . . ) where h≧0.
Let I=(i1) . . . ,ik, . . . ,ih, . . . ) and J=(J1, . . . ,jk, . . ., jh, . . . ) be two arbitrary iteration vectors in Γ such that sign (J-1)=θ. Thus ik <jk and ih >jh. Hence I<k J and S(I)<T(J). We will show that νk will execute T(J) before S(I). Let I'=(i1, . . . ,ik-1,0,ik+1, . . . ) and J'=(j1, . . .,jk-1,0,jk+1, . . . ). Since il =jl where 1≦l<h and jh >ih, we have I'<k J' and by rule 3.3 of the definition of νk in Definition 1 above, T(J) will be executed before S(I).
Theorem 2 identifies the set of constraints in the iteration space which will be violated by νk. These constraints effectively inhibit vectorization along the k-th dimension. Suppose a data dependence constraint imposes an ordering in the iteration space as shown in FIG. 6, ν1 will violate the constraint I<1 J (with i1 <j1 and i2 >j2) by executing J before I.
Lemma 1
Ek contains all the potential k-vectorization preventing dependencies for νk.
For any arbitrary edge e=(S,T,θ), we have lev(θ)=k. By definition of Ek, e εEk.
Let Ek.sup.
denote a set of k-vectorization preventing dependence edges in Ek, where Ek p ={e εEk :e=(S,T,θ) and θ is k-vectorization preventing}. The following theorem establishes that a loop Lk is vectorizable if Gpk contains no cycle and there exists no k-vectorization preventing dependence in Gpk.
Theorem 3
Given (1) there are no cycles in Gpk and (2) Ek p =0, it follows that for any σ compatible with Ek, νk (σ) satisfies all data dependencies and will not violate the program semantic (i.e. after statements are reordered according to σ, vectorization of Lk is legal).
Since control dependencies can be converted to data dependencies without loss of generality, we will assume that Epk =Ek. Suppose Ek p =0 and νk violates the program semantic; we will show that there exists a cycle in Gpk. The idea that νk violates the program semantic implies that there is a serial ordering S(I)<<.sub.θ T(J) for some I, J εΓ and S,T εVk and that this order must be retained because of the presence of dependencies. νk, however, does not retain this order, i.e. ((S,I),(T,J)) .epsilon slash.νk. By theorem 1 above, e=(S,T,θ) εEk. If S=T then (S,S,θ) is a cycle in Gpk and the proof is done. Suppose that S≠T. Then lev(θ)≠∞ since S<T implies ((S,I), (T,J)) ενk (rule 2 of the definition of νk given above), contradicting the hypothesis; and T<S is inherently impossible. Therefore, lev(θ) must be k. Given that e .epsilon slash.Ek p, suppose
case S<T: this is not possible since ((S,I), (T,J)) ενk by rule 3.1 and 3.2 of the definition of νk above (and e .epsilon slash.Ek p).
case T<S: for some π in Gpk where e επ. If π.epsilon slash.C(S,Gpk) then T and S can be reordered since lev(θ)=k. This contradicts the hypothesis. Therefore π must be in C(S,Gpk). We conclude that there exists a cycle in G.
Therefore, through Theorem 3 we know that when the ordering imposed by the vector execution order at a particular level is a superset of the ordering imposed by the program dependencies, the loop at that level can be vectorized.
One embodiment of the sequence of steps 30 through 38 taken to determine vector legality in FIG. 3 is shown in FIG. 7. In FIG. 7, at 50 compiler 12 prepares a program dependence graph (PDG) for the nested loop. As detailed above, the PDG provides a picture of both the data and control dependencies in one graph. Once the control and data dependencies are known, compiler 12 moves to step 52 and enters an iterative loop to determine the vectorizable loops. As in the example shown in FIG. 3, the nested loop is an N-level nested loop. At step 54, a level dependence graph for level k is extracted from the program dependence graph. (The level dependence graph Gpk is described at the top of page 12. Each level dependence graph includes dependence edges relevant to vectorization of the nested loop at that level.) Once Gpk is extracted from the program dependence graph, Theorem 1 guarantees that Gpk captures all the control and data dependence edges that the compiler must consider to safely vectorize the kth loop.
At step 56, the level k dependence graph is examined for k-vectorization preventing edges. For example, in FIG. 5b if you are going to vectorize the outer loop you must make sure that there are no dependence edges indicated at the the crossed-out edges. If there are such edges (termed k-vectorization preventing edges), then according to Theorem 2 the nested loop cannot be vectorized at level k; control then moves to step 62. If, however, there are no k-vectorization preventing edges, the nested loop may still be able to be vectorized at level k and control moves to step 58 for a dependence cycle check.
At step 58, the level dependence graph for a level k is examined for dependence cycles. For instance, the graph can be fed to a cycle detection algorithm such as that described in Tarjan, "Depth First Search and Linear Graph Algorithms", SIAM Computing, 1, pp. 146-60. If there are any level k dependence cycles, the nested loop cannot be vectorized at level k and control moves to step 62. If, however, there are no level k dependence cycles, the nested loop can be vectorized at level k and control moves to step 60. At 60, a designation for the kth level loop is added to the list of vectorizable loops and control moves to step 62.
At 62, a check is made to see whether k=N. If so, the loop is exited.
Direct vectorization therefore provides a mechanism for vectorization of non-innermost loops without the overhead, including the tracking of data dependencies, imposed by the loop interchange schemes described above.
The previous section developed a framework for legality of outer loop vectorization. Since there can be only one loop in the nest that can be vectorized, we now focus on the question which loop to vectorize when there is more than one loop choice. Vectorizing a loop implies that a vector sequence of vector instructions is generated for that loop. Different loops require different vector sequences and the performance of the loop depends on the selected vector sequence.
There are many parameters in each loop contributing to the differences among the loops. We call these parameters vector variants and they include:
Trip count(T): T is the length of the loop.
Gather/Scatter(GS): GS is indirect load or store, e.g., in A(INDX(I)).
Conditional(C): C indicates whether or not the vector sequence is conditional.
Stride-1(V): V is the physical stride between consecutive memory locations.
Reduction(R): R is a vector code sequence which re-associates the computation; refer to Table 1 for an example of vectorization of a vector reduction loop.
TABLE 1______________________________________DO i = 1, 512 tmp(0) = ss = s + a(i) DO i = 1, 512, 64ENDDO tmp(i:i+63) = tmp(i:i+63) + a(i:i+63) ENDDO s = tree-- height-- reduction(tmp(1:64))______________________________________
Let A={T, GS, C, V, R}. With two loops to choose from, there are |A|�|A| combinations that need to be considered in order to select which loop to vectorize. We will show a few combinations using small code fragments. ##EQU5##
Assume the array element's layout is column-major. Vectorizing the i loop is a better choice because "i" has V (stride one access).
The trip count of the loop, T, is also another important parameter. Suppose that Tj is much larger than Ti, ##EQU6## then the cost trade off between V and T must be determined.
Cost trade-off must also be made between a vector loop, i, and a reduction loop, j. For example, in the nested loop ##EQU7## vectorizing loop-i is more profitable. However, if Tj is much larger than Ti, for example, in the following nested loop ##EQU8## then vectorizing loop-j would be more profitable.
Gather/scatter and conditional operations could also have different impacts on loop choice. For example, in ##EQU9## a decision to vectorize loop-i results in vector accesses which are strider but are conditional. A decision to vectorize loop-j avoids the condition problem (c(i) is invariant with respect to loop-j) but the access to b(i,indx(j)) requires an additional vector load.
From the discussion above it is apparent that, in selecting a loop to be vectorized from a set of n loops, there are |A|n combinations of cost trade-offs that must be considered. We propose a metric which is computationally less intensive than the exhaustive computations of all combinations. This metric computes the overhead cost associated with each loop if it were to be executed as vector. The overhead of each loop is then compared to decide which loop should be vectorized. There are three different sources of vector overhead in this metric: vector loop overhead (VLO), vector start up (VSC) for each vector operation, and memory access overhead (MO). VLO is the cost needed to strip-mine the loop when its trip count is larger than the vector length (VL) of the vector register. VSC is overhead needed to initiate the vector instruction. MO is overhead for non-unit stride access.
The vector variants defined in A above can be equated to overhead. T and V have a direct relation to VLO and MO, respectively. Others need to be converted. C implies the memory operations it controls are being converted to GS. GS is treated as two MO's. R translates to an MO plus initial set up cost plus final reduction cost. Table 2 below shows the summary of the various costs. Unit stride is used as a base unit for memory operation.
TABLE 2______________________________________Overhead Value When Comment______________________________________VLO 0 trip < VL no loop structure c1 trip ≧ VL remaining vector and branch backVSC c2 always vector startup costML VSC unit stride memory load VSC+c3+c4 reduction c3: setup c4: final reduction VSC+c5 non-unit stride unit stride used as baseMS VSC non-unit stride memory store______________________________________
We now define the metric as
Ol =(VLO+(Tl /VL)*(ML+MS))/Tl
where (Tl /VL) is the number of vector trips. The metric computes the overhead associated with each loop of interest. Since the metric is measured in term of overhead, preference will be given to loops with lower overhead.
Let us apply the metric to the previous examples. Assume that VLO=20 and VSC=5. ##EQU10## then,
Oi =(0+1*(VSC+VSC))/10
Oj =(0+1*(VSC+c5+VSC))/10
and, since c5>0, loop-i is a better choice.
On the other hand, for the nested loop ##EQU11## and loop-j is the better choice as long as the non-unit stride latency is less than 30. In the nested loop ##EQU12## and, therefore, loop-i is better. In the nested loop ##EQU13## and, therefore, loop-j is the better candidate if the overhead of reduction and non-unit stride for a(i,j) is less than 77.5.
Finally, in the nested loop ##EQU14## and loop-j is a better choice.
One embodiment of the above selection metric as applied to steps 40 and 42 in FIG. 3 is shown in FIG. 8. In FIG. 8, at steps 70 and 72 compiler 12 calculates a value for each of the vectorizable loops using the above metric. This continues until the list of vectorizable loops is exhausted. The vectorizable loop having the highest value metric is then selected as the loop to be vectorized. The loop to be vectorized is examined at 74 to determine if statements within the loop should be reordered. Statement reordering is crucial in vectorizing loops which may otherwise not be vectorizable. For instance, in the code fragment produced below the outer loop DO-i is not vectorizable because there is a flow backward induced by B. ##EQU15## The loop is, however, vectorizable with statement reordering.
If the statements do not have to be reordered, control moves to 78. If, however, a determination is made at 74 that statements within the loop should be reordered, control moves to 76, statement reordering occurs in a manner known in the art and control moves to 78. At 78 vectorized code for the nested loop is generated and the routine is exited.
This section presents experimental results of outer loop vectorization opportunity and performance using Perfect Benchmark code.
Our environment is a Cray Y-MP8 (shared-memory multiprocessor with eight PEs). Each PE has 64-element vector capability. Total system memory size is 256 MB arranged in 256 banks. The CPU clock cycle is 6.0 nanosecond. The Unicos operating system runs on this eight-processor platform, which supports autotasking. The Cray Fortran-90 environment was used. That environment includes state-of-the-art dependency analysis, loop restructuring techniques and can detect many DOALL loops thereby generating parallel SPMD programs. The OLV framework is implemented in the restructuring phase of CF90.
The restructuring phase of CF90 consists of many transformations. Among the transformations, two relevant transformations which impact the data being collect for OLV are perfect-nest-creation and loop-collapse. Perfect-nest-creation uses loop distribution to create a perfect nest out of non-tightly nested loops. A non-tightly nested loop will be made into a perfect nested loop if distribution does not require any scalar expansion. Loop-collapse reduces the nesting depth of a loop nest by making the trip count of a particular loop, L', longer. This transformation always improves the performance of the nest since the resulting collapse nest has less loop control overhead. Furthermore, a longer trip count is desirable if L' is vectorized. Perfect-nest-creation impacts the frequency of the number of imperfect nests and loop-collapse reduces the number of outer loop candidates available for vectorization.
For comparison purposes, we instrumented two compilers CF90-I and CF90-O. CF90-I vectorized only the innermost loop, while CF90-O included the outer loop vectorization framework. Performance of the generated code by the two compilers was compared using different input samples. The input samples included selected subroutines from the Perfect Club benchmark and the benchmark itself. Speedup is computed as (time of code generated by CF90-I)/(time of code generated by CF90-O).
To demonstrate the applicability of OLV at the subroutine level, we selected 3 subroutine samples with the following properties:
The nature of the computation of each routine is unique
Each routine has at least one outer loop was vectorized
The nest involving OLV was non-tightly nested
The first example tested was the Perfect Club Code 1 benchmark shown below. For Perfect Club Code 1, a speedup of 2.04 was calculated. CF90-O vectorized DO-2 loop, while CF90-I vectorized DO-1 loop. Both loops have the same trip count. In this case, vectorizing the outer loop is better since the inner loop has to perform vector reduction while the outer loop does not.
The second example tested was the Perfect Club Code 2 benchmark shown below. For Perfect Club Code 2, a speedup of 1.2 was calculated. CF90-O vectorized DO-3 loop, while CF90-I vectorized the DO-1 and DO-2 loops. Speedup can mainly be attributed to longer vector length with no additional vector overhead.
The last example tested was the Perfect Club Code 3 benchmark shown below. For Perfect Club Code 3, a speedup of 15.24 was calculated. CF90-O vectorized DO-4 and DO-8 loops, while CF90-I vectorized DO-3, DO-7 and DO-6 loops. Speedup can be attributed to much longer vector length and to the fact that the variable SUM is treated as a vector invariant. This results in significant vector load and store savings.
As noted above, our framework was implemented in CF90, the Cray Fortran 90 compiler. Experiments were performed on a Cray YMP-8 using a modified version of CF90 to allow compilation with or without OLV. OLV opportunity was found in 305 of 1168 vectorizable nests in the Perfect Club Code benchmark, with OLV actually selected for 66 nests. Significant (up to 15�) speedup at the subroutine level of some routines were also observed. Similar results can be expected from implementation of the OLV framework in vector computing systems running Fortran or other programming languages.
It is clear that direct vectorization of non-innermost loops provides an advantageous increase in the efficiency of loop execution. This application is intended to cover any adaptations or variations of the present invention and is therefore limited only by the claims or equivalents thereof.
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|Feb 2, 1995
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Researchers Wrestle with When to Make...
MDxHealth joined forces with Ghent University in Belgium to establish NXTGNT, a new center in Pharmaco (Epi)genomics. The center will bring together disease centered basic researchers, corresponding clinical validation teams, bioinformaticians, and (epi)genomic technology focused on the discovery of effective individualized epigenetic-based diagnostic and personalized therapeutic products.
As a result of several years of collaboration between the Laboratory of Bioinformatics and Computational Genomics, NXTGNT, the biomarked valorization consortium teams, and MDxHealth, the new center is located at Ghent University within the laboratory of pharmaceutical biotechnology. The facility will house MDxHealth's research team and lab equipment for development of epigenetic tests together with a Ghent University team. The facility works in close collaboration with the Laboratory of Bioinformatics and Computational Genomics, located at the Faculty of BioEngeneering, providing experience in epigenetic characterization and computing and visualization of (epi)genomic datasets. The center is fully operational as of December 1.
The focuses of research are on the development of innovative and more efficient applications for personalized medicine, such as the identification of new potential targets for therapy, identification of new or more accurate biomarkers for risk stratification, and accelerate innovation through development and preclinical validation of new diagnostic and therapeutic products.
"There is a history of successful collaboration between MDxHealth and the University of Ghent, where much of the early epigenetics sequencing work on our biomarkers was conducted," said Dr. Jan Groen CEO of MDxHealth. "As more drugs are being developed alongside companion tests, there is a growing need for novel technologies, biomarkers, and assays. We believe our experience in successfully developing personalized cancer epigenetic tests combined with the sequencing, bioinformatics, and methylome analysis expertise contained in the new center will prove extremely attractive to the pharmaceutical industry."
MDxHealth is a molecular diagnostics company that develops and commercializes epigenetics test to support cancer treatment.
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subset: commoncrawl


text:
Wildlife Diseases
- Facts about Wildlife Diseases: Leprosy
- Facts about Wildlife Diseases: Pseudorabies
- If Foot-and-Mouth Disease Came to Florida: Potential Impact on White-tailed Deer in Florida
What is EDIS?
EDIS is the Electronic Data Information Source of UF/IFAS Extension, a collection of information on topics relevant to you. More...


text:
Hi there,
I am a VERY beginner in creating websites (having about half an hour experience by now). Please could you give me a hint (very detailed one please! :-) ) how to get rid of all posting abilities in twenty eleven theme? I want to create a website presenting a company, not a blog. Only hint I found was this: http://wordpress.org/support/topic/remove-posting-ability , unfortunately I don't know where/how to edit core files... Getting rid of comments was no problem.
Thanks for replay


text:
This plug in was easy to set up and is delivering results for me.
Beats using a "free" petition site that just takes all the contacts you make to sell to their paid promoters.
It is nice to have total control of your work.
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text:
Category Archives: Milwaukee Rising
December 15, 2015
Your chance to see these beautiful homes close up! Click HERE for a printable listing. Sunday, December 20th 1:00 – 3:00 PM Transportation & Light Snack Provided Must RSVP by Wednesday 12/16 to firstname.lastname@example.com • (608) 630-3041 More Dates! Sundays 1:00 … Continue reading
Common Ground 2015 Annual Report
June 9, 2015
What are the rights and responsibilities of citizens in a democracy? Many people would say voting on Election Day. We at Common Ground believe that's just the beginning. We have a right and an obligation to engage more … Continue reading
BizTimes Blog from Common Ground Leader: Require Nationstar to Work in Good Faith with the City and its Citizens
April 11, 2015
The following blog from Common Ground leader, Margaret Crowley, was published on BizTimes.com on April 9, 2015: Dear Mayor Tom Barrett and Common Council President Michael Murphy: I am writing to ask you to be bold. In the coming weeks, … Continue reading
IN THE NEWS: Common Ground Urges City Leaders to Be Bold for Milwaukee in Meeting with Nationstar
April 2, 2015
"Our mayor and Common Council president won't sign some token agreement with Nationstar. We know they love this city as much as we do. We've got a major problem here and we believe our mayor and Common Council president … Continue reading
IN THE NEWS: "We need to hold Nationstar accountable!"
March 6, 2015
See what Don Walker of the Milwaukee Journal Sentinel had to say about the action Common Ground is taking to hold Nationstar accountable and read our demands. Continue reading
Mke Rising Site Launches!
May 30, 2014
We are proud to announce that we have just launched our newest website MilwaukeeRising.org Continue reading
Milwaukee Rising Leader Receives Prestigious Award
April 11, 2014
Inspire by Example Award goes to Toni Wagner. Words such as "tenacious," "direct," and "positive" were used frequently to describe Toni Wagner at the Volunteer Center of Greater Milwaukee's 32nd annual award luncheon on April 3. Toni, a Sherman Park leader since Common Ground's Foreclosure Campaign began, was awarded the 2014 adult exemplar award. Continue reading
MILWAUKEE RISING: Things keep looking up for Sherman Park
November 30, 2013
It's been a great year for MKE RISING and Common Ground in general. Check out the progress in rehabbed houses sold between March and November alone – from 18 sold to 27 – and of course, that number continues to … Continue reading
MILWAUKEE RISING Progress: An infographic to cheer about!
April 11, 2013
We've told you about all of the fantastic progress our MKE Rising team has been making in Milwaukee, but sometimes visual speaks louder than words. Check out this at a glance info-graphic of the progress. Continue reading
MILWAUKEE RISING: 2013 MANDI Trail Blazer Award Finalist
April 1, 2013
MKE Rising is thrilled to be nominated a 2013 MANDI Trail Blazer Award Finalist – for an innovative approach to a community problem. More about Milwaukee Rising here.


text:
Holden, MAUSA
Hometown: Holden, MA
December 28, 2010
I specialize in ballroom dance pictures. I love buildings! I like nature and people, but find buildings most interesting.
I sometimes go a week or 2 without taking a picture, and sometimes I am constantly taking pictures. Depends on how busy I am, the weather and several other factors. I always have my iPod with me and a small P&S, so I am never without a camera.
No introduction yet
Excellent! Nice people and everyone willing to help and share.
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text: Note that in the latter, I was able to use several hard spaces (& n b s p ; spaced so you can see the code) to get the "indent" for the song verses. But when I did my copy/paste into the blog format, the hard spaces disappeared. How do I get the hard spaces in the blog?


text:
- Report: #803553
Report - Rebuttal - Arbitrate
Complaint Review: Franklin Debt Solutions, Inc.
Franklin Debt Solutions, Inc.11 North Washington Street, Suite 210 Rockville, Maryland United States of America
Franklin Debt Solutions, Inc. Wrong Name - False Claim Rockville, Maryland
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After I reviewed the case number on the court's website, I discovered that the Defendant's address was the same as my address but his name had a middle initial and my name does not have a middle initial.
The Court records listed the Claim Type as Contract but I have never enter into a contract agreement with anyone with the Plaintiff's name.
I have planned and scheduled an out-of-state vacation over the Christmas holidays but a trial date has been scheduled for Dec. 27, 2011. Do I have to appear in court to prove that I am not the Defendant name in the court's records? Shouldn't I have been notified by the court to appear on Dec. 27th?
This report was posted on Ripoff Report on 11/30/2011 10:29 PM and is a permanent record located here: http://www.ripoffreport.com/r/Franklin-Debt-Solutions-Inc/Rockville-Maryland-20850/Franklin-Debt-Solutions-Inc-Wrong-Name-False-Claim-Rockville-Maryland-803553. The posting time indicated is Arizona local time. Arizona does not observe daylight savings so the post time may be Mountain or Pacific depending on the time of year.
Ripoff Report has an exclusive license to this report. It may not be copied without the written permission of Ripoff Report.
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The browser version you are using is not recommended for this site.Please consider upgrading to the latest version of your browser by clicking one of the following links.
Ayasdi helps customers uncover the insights hidden in their complex data.
Explore technology trends and datacenter changes that drive the transition to 10 gigabit Intel® Ethernet.
Andrea Nelson and Charles Fan discuss the collaborative efforts of Intel and VMware to create a 32 node virtual SAN array.
Intel® Cache Acceleration Software solves I/O latency issues for Intel® SSD-based storage.
Intel designs technology that addresses the complex needs of the future for endless possibilities.
Intel® Solid-State Drives: An Introduction


text:
When it comes to guitar straps, no-one compares to jeridesigns™!
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There is a lot to look at here, so quit messing around, click the guitar strap page links above, and get your on!


text:
Bournemouth chairman Eddie Mitchell has sought out manager Paul Groves' opinion ahead of a possible move to offer Harry Redknapp a more hands-on role at the Goldsands Stadium.
Former Tottenham manager Redknapp joined the south coast outfit in an unpaid advisory position earlier this month, but a poor run of form, which came to a head when the Cherries lost 4-0 to Swindon on Saturday, has led to Mitchell contemplating increasing the 65-year-old's presence at the club.
"I have said in the past we have got on our doorstep one of the best managers in the country. I have spoken to Paul about bringing Harry closer and need to discuss it with Harry," he told the Bournemouth Echo.
"It would be one of many steps we would need to take to change and improve. We have got to re-examine everything. We are all trying to gain knowledge from Harry and, hopefully, we will.
"It would be great to be able to have that knowledge around the club and I would like to be able to bring it closer and that is what I am going to try to do."
Redknapp, who took charge of Bournemouth between 1972-76, has previously stated he has no intentions of managing the club for a second spell.
- Harry Redknapp


text:
Glenn McCoy by Glenn McCoy
- May 07, 2013
- From Beginning
- Previous feature
- Next feature
- Current
Comments (25) (Please sign in to comment)
Bushie's lies cost over 4,000 American lives and uncounted thousands of Iraqi lives. Where's the cartoon on that?
Every time Hillary lies, her cankles get a little tighter in the pant suit.
OK, let's say that we all agree that Bush was a scumbag. What's that got to do with Benghazi? Citing somebody else's faults doesn't excuse yours!
Cartoon is misleading. I will give Mr. McCoy credit for not being able to distinguish between an embassy, which has a full complement of security forces, and a consulate, which traditionally does not. Not to minimize any mistakes made, but we need to start with facts.
"Citing somebody else's faults doesn't excuse yours!"
I think the point is not so much trying to find an excuse. I think the point is more that no one seemed to mind when Bush made mistake after mistake, costing trillions of dollars and thousands of American lives (not to mention other damage to Iraqis, Afghanis, and what's left of their civilizations).
That would be my point, anyway.
Glenn lives in a fact free universe.
Even Faux Fabricated News has finally given up on the Benghazi mock conspiracy. Glenn just hasn't read his memo from Rove and Chaffetz yet.
Hey, ……there goes the point. Re-read until you find it. It's there, and it's not hidden.
Not sure what the Obamabots are disputing in regards to this cartoon. Do they deny that Obama and his minions repeatedly lied about the embassy attack, blaming it on a video when they knew from day one that it was pre-planned Islamic terrorism? Do they deny that Hillary's State Dept. ignored warnings about rising terrorist activity and reduced security rather than beefing it up as our embassy requested and then changed the CIA talking points to bolster their lie? Obama and Clinton were both directly involved in a cover-up that resulted in four deaths and a burned out embassy. They are both culpable at the front end of the Benghazi disaster when they ignored requests for enhanced security and at the back end when they engineered an attempted cover-up. The cartoon is factual. Deal with it.
How much lying can the Obama Lapdog Media eat up, vomit in a hole, and bury?
They have discredited themselves in front of the Public. The next time they complain about Conservative wrong-doing-
Everyone should shout at them 'What Does It Matter?'.
The reactionaries cannot let this go. The little fact that there is no there there is a minor detail that they gloss over in their headlong rush to prove something, anything. They clearly do not care if they waste millions of taxpayer dollars in the process. They are just hoping that if they scream coverup loud enough, long enough someone beyond their faux news/go comics fanboys will actually believe it.
If you wish to hold anyone to account it should be the very members of Congress who cut 400 million from the security budget of the US State Dept. But the fanboys mentioned above are the same ones who overwhelmingly support those same members of Congress.
Repeat the lie…repeat the lie….repeat the lie…and repeat!
I agree, Ahab. I'm sure that's exactly what Obama plans to do.
@Play-TV, there are differences in "consulates" and "embassies" for some issues, but I think that any U.S. property in any foreign country is supposed to be protected by the host nation's government, as if it is American Property.
What difference does it make for the issue of terror attacks??
It was an American diplomatic post, and 4 Americans were murdered, and the property was arsoned.
Why was no immediate rescue done by Obama, Hillary Clinton or Defense Panetta?? I think Fox TV News had a former Special Ops serviceman give testimony for the news media that there would have been time for 2 separate teams to get there after the news of the first attack, and the time the 2nd fatal attack took place. Nine (9) Hours! Obama-Hillary did ZERO, Nothing, NaDa! That is what has been covered up and needs to have the Sunshine on the non-response show the American public and the world what actually happened. Then let the consequences fall where needed…but then there are the Democrats and the MSM planning to "protect" O and H "at all costs"….
The only traction happening is on the conservative channels. The rest of the world has better things to worry about.
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text:
- Report: #221604
Report - Rebuttal - Arbitrate
Complaint Review: Freedom Gold - Distinct America Advantage
Freedom Gold - Distinct America Advantage10500 Ulmerton Rd Ste.726-302 Largo, Florida U.S.A.
Freedom Gold - Distinct America Advantage fraudulent billing ripoff Largo Florida
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they take money out of your account when you do not know when it is coming out sometimes leaving you in a hole but that is no big deal to a company that takes you for evey dime with nothing in retun.
this company is bad and needs to be shut down!!
ellettsville, Indiana
This report was posted on Ripoff Report on 11/21/2006 07:33 AM and is a permanent record located here: http://www.ripoffreport.com/r/Freedom-Gold-Distinct-America-Advantage/Largo-Florida-33771/Freedom-Gold-Distinct-America-Advantage-fraudulent-billing-ripoff-Largo-Florida-221604. The posting time indicated is Arizona local time. Arizona does not observe daylight savings so the post time may be Mountain or Pacific depending on the time of year.
Ripoff Report has an exclusive license to this report. It may not be copied without the written permission of Ripoff Report.
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text:
I am probably just a worry wart but...im 34 weeks and babies head measures 4-5 weeks big. i have had several ultrasounds and dr says he is fine with no water on the brain. I went to the peri at 27 weeks and his ventricles were perfect. i guess the only explanation i come up with from the internet is hydro and now im stuck on it, any thoughts?
p.s. i have read a lot of your stories. you are all very strong with beautiful babies!


text:
How would I insert a small logo (.jpg) beside the title Can't seem to either find an option or I could be missing something...
How would I insert a small logo (.jpg) beside the title Can't seem to either find an option or I could be missing something...
Put this in Custom CSS section of Jetpack plugin. Change image url to yours.
#blog-info h1 a:before {
content: "";
display: block; width: 48px; height: 48px;
position: absolute; top: -2px; left: -60px;
background-image: url("http://dummyimage.com/48x48/ff0000/ffffff.png");
background-size: cover;
#blog-info h1, #descr { position: relative; margin-left: 60px; }
Thanks will let know if It was uploaded properly.
That displays it thanks but I'm getting an invisible box... Does it have to be a particular size?
Use a valid image url, a link ending with
.jpg, and yes 48x48 size.
(This is a separate issue)
There is a letter
v in the markup just under
<body> which is something obviously wrong, did you edit
header.php ?
Got that 'v' text sorted, thanks :)
48x48 makes the logo look very small and cramped :\ I have a good sized one at 178x111 (although it still might be a bit too small) - is there anyway I could insert this logo and have it on the right side of the text that says 'Hard Rock Horror'?
This topic has been closed to new replies.


text:
Hi, im assisting somebody in editing their website and we can't find out how to edit the information on a specific page.
Here's a link to the site : http://www.christianfoundationgrants.com/foundationfaqs/
The problem is, whenever we go into the editor none of the numbered information shows up (only the plain text underneath the links).
So, I need help figuring out how to edit the information under the numbered links (for example, "Private Foundations - What They Are" or "Private Foundations - How They Works".
The title and the content doesn't show up in the editor.
Any help would be appreciated, thank you so much!


text:
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text:
September 20, 2013
I am working at MarvinBot, a french startup, which has developed a complexe adaptive system that can transform in real time unstructured data into structured data without any supervision. I am in San Francisco to share this technology with engineers.
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text:
While I was staying with my bestie in Marin this past weekend, she happened to get a package with this curious flour inside that I had heard of a couple times before but never had the chance to try. Tigernuts What is a tigernut? First, it's not actually a nut - it's the small, underground tuber of the Cyperus esculentus plant, traditionally cultivated in ancient Egypt. It's nutrient profile is rich in fiber, protein, natural sugars, minerals (potassium, calcium, and phosphorus), and … [Read more...]
Home-made Tomato Basil Chicken Soup
How does some hearty and healthy tomato basil soup with shredded chicken and rice sound on a cold winter day? Sounded pretty awesome to me, so I made some :) This is an original recipe from my first 30-day meal plan and nutrition blueprint The Body Fuel System, and it's a staple in my kitchen because it's so easy to make, keeps well and is packed with healthy nutrients. Did you know that a single tomato can provide 40% of the daily recommended amount of Vitamin C? Vitamin C is an … [Read more...]
Edamame Burgers (vegetarian, gluten and dairy free)
What do you think about green burgers? This vegetarian recipe is just delicious and packed with healthy plant protein! To make the "burger buns" I used sweet potatoes sliced thin and baked. I do this with my sweet potatoes often and use them as "crackers," buns or simply a yummy side. You can stack these burgers up with just about anything, but I like using baby spinach or any mixed green, a juicy ripe tomato slice, some spicy mustard and a jalepeno slice as a garnish. I was lucky … [Read more...]
Baked Haddock with Fresh Herb and Vegetable Medley
Baked Haddock with Fresh Herb and Vegetable Medley Tonight's dinner was super simple, fresh, flavorful and filled me up with healthy protein, complex carbs and fiber - really a perfect meal to end my day after my super tough morning workout! If you're like me and live inland it's sometimes hard to get great quality fish - and when you do, it's not always conveniently packaged for quick and easy prep! I found this amazing company recently called Sizzle Fish Fit that delivers my fish to me, … [Read more...]
Healthy Chicken Nuggets and "Cream" of Broccoli Soup
Try this delicious new recipe! Welcome to my kitchen! I'm getting ready to do some food prep for the week, and I wanted to share one of my favorite new recipes. I started making these healthy chicken nuggets last year, and I've been getting creative with dishes that they go well with. You'll love the slightly spicy and sweet flavor of the nugget batter - feel free to experiment with other spices. You could add chili flakes to make them spicier or go an entirely different direction with … [Read more...]


text:
13.00 ct. t.w. Pink Topaz and .12 ct. t.w. Diamond Earrings in Sterling Silver
★ ★ ★ ★ ★ ★ ★ ★ ★ ★
5 stars/
Item#: 786986
Hot pops of color. Coated pink topaz and diamonds in simple settings. Earrings with 13.00 ct. t.w. pink topaz and .12 ct. t.w. diamonds. Hanging length is 1 1/4". Hinged posts, sterling silver earrings.
Due to the incredible value on your selection, no additional discounts apply.
Product Details (for 13.00 ct. t.w. Pink Topaz and .12 ct. t.w. Diamond Earrings in Sterling Silver)
1/2 inch
Sterling close STERLING SILVER: Also known as "Standard Silver," sterling silver is silver alloyed with other metals to increase the hardness and durability. Generally, sterling is 92.5% silver and 7.5% other metals. Some sterling silver jewelry is plated with 14kt-18kt gold and referred to as "vermeil," or "gold over sterling." Silver
Polished close POLISHED: A buffed-out finish used to produce a mirror-like shine.
Hinged close HINGED: A bale with a hinge. The hinge allows the pendant to be placed on and taken off a chain easily and without sliding. Ideal for putting pendants on chains that have large clasps. Post close HINGED POST: An earring with a straight post insert and a hinged backing to hold it in place.
Hanging Length:
1 1/4 inches
Gemstone 1:
Diamond close Diamond: The hardest and most brilliant of all gemstones, a diamond can make the heart race with its pure and fiery spark. An ancient symbol of love, a diamond is the preferred gemstone for tokens of affection, such as rings, earrings, necklaces and bracelets. Diamond is the birthstone for April. (Quantity: 28, Shape & Cutting Style: Round, Color Grade: I-J close Color Grade I-J: Near-colorless , Clarity: I2-I3, Weight: 0.12 ct. t.w.)
Gemstone 2:
Topaz close TOPAZ: Available in a stunning selection of shades, the topaz's sky blue hue is one of the most popular colors for jewelry designs. Once thought to offer protection, today topaz is favored for its durability and affordability. Yellow topaz is the birthstone for November while blue topaz is for December. (Color: Pink, Quantity: 2, Shape & Cutting Style: Pear close PEAR: Similar to the outline of a pear fruit, this is a round shape that comes to a point on one side. Fancy, Weight: 13.00 ct. t.w., Size: 15X10 mm)
All weights and measures are approximate.
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Learn More About Sterling Silver Hinged Bale Diamond Topaz
Customer Ratings and Reviews
February 6, 2013
hot pink
fabulous style and color for the price! At any price! LOVE
leopard, Alabama
Bottom Line: I would recommend this to a friend!
January 16, 2013
These are pretty earings which I am enjoying. The picture on the model helped to determine size to jaw line which was helpful. They are worth the price.
Joyce Soto, Eustis, Fl
Bottom Line: I would recommend this to a friend!
January 13, 2016
hinged post
Although the earrings are very pretty the hinged post does not close properly and I've had to add a backing. Never had one close like this and it's not well made


text:
Melissa Flores, owner of the newly opened Remedy boutique in Lincoln Center, uses accessories to add glamour to casual outfits. Remedy is at 260 Lincoln Center. It is open from 10 a.m. to 6 p.m. Monday through Saturday, and noon to 5 p.m. Sunday.
Q: You've just opened Remedy (as of Sept. 20). Has it always been a goal of yours to have your own shop?
A: Yes. Ever since college - high school even - I would think, "In 10 years, I will ..." I started at Campbell's in 1999 (the Lincoln Center clothing store closed this summer after 59 years in business). I've always loved fashion. I love clothes. I love shopping, so I thought, "Why not work at a shop?" Then I earned my B.A. in apparel merchandising and design.
Q: To what extent does the clothing in your shop reflect your own personal style?
A: It's half and half, I guess. As a buyer, you learn to buy what your customers want. I've been buying for a long time, and that's the first thing you learn. It's not always the case that what you like is what customers will like.
Q: What do you think will be popular as we head into the fall and winter seasons?
A: Right now, scarves are a huge trend. I love scarves because it's such an affordable accessory. It can add so much drama to an outfit. Colored denim and patterned denim are also still really popular.
Q: What do you look for in clothing for yourself?
A: I guess my personal style is "bling." I like anything sparkly or glittery. As I've gotten older, unfortunately, comfort has become a bigger factor. Maybe that's why jewelry is so important to me. Accessories are affordable, and with accessories you can look put together and dressed up, but still be comfortable.
Q: What can you tell us about your necklace?
A: Oh, I love this necklace. It's Stella & Dot. I love fringe. I guess I'm kind of a hippie, too. I love fringe and tie-dye. I liked that this carries the fringe trend over to jewelry.
Contact Jennifer Torres at email@example.com.
Location, ST | website.com


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What originally started off as a Japanese release has made it ways across the seas to the U.S. The Bodega x Saucony Elite Grid 9000 is set to hit shelves this weekend in four amazing color options. Obviously Bodega will be stocking them as well as Premier, which has two of the four colorways on their online store right now — all four should be available by 11 a.m. tomorrow.
Release Reminder: Bodega x Saucony Elite Grid 9000
Watch Now


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I've recentlly noticed that my blog page is loading very slow and even editing posts takes an unusual ammount of time to complete, what can be? I'm using photos on my posts and I've set up couple of pages as well.
My blog is hosted on my web hosting package and I've installed in http://www.mywebsite.com/blog
Should I clean my database or what to get it working properly?