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Williamstown teacher arrested
December 12, 2013
PARKERSBURG - A Williamstown High School teacher has been charged with filing a false police report after claiming a student threatened to shoot her with a gun. Cheryl C....
Im sure there is more to this story that we are not hearing. I;m sure this teacher didn't out of the blue make up a story on a great student. Like always, junior does no wrong.
1 Agrees | 1 Disagrees | Report Abuse »
And yes, kids are more out of control these days, but that blame lays solely on the parents. Kids aren't meant to be coddled and handed everything they want, and they*****sure aren't taught respect anymore. So asknot, before you condemn these kids that you despise so much (even though you supposedly work with them) maybe you should step back and look at the real problem...the baby boomer generation that has made them this way.
4 Agrees | 1 Disagrees | Report Abuse »
Asknot: Hey genius, she admitted to doing it, therefore, guilty.
5 Agrees | 1 Disagrees | Report Abuse »
This teacher was not very smart to embellish comments this boy made. She had to know she was taking a big risk . Teaching is much hardet now , they put up with a lot more than ten or twenty years ago . But if you would risk your job to make up comments about an unruly student , then she should gave been looking for a different type if work even if she does not lose her job over this ,her standing in the school will go way down . Ask nit us right ? There are nasty bratty kids in the school system who get away with too much rotten behavior in the classroom . However this teacher was wrong to try and get back at the kid by making up and embellishing what happened .
4 Agrees | 2 Disagrees | Report Abuse »
My guess is this will never be solved, and if it is the teach will be found guilty of whatever, and get a slap on the wrist, while looking for a new profession! The world is going mad!
2 Agrees | 2 Disagrees | Report Abuse »
I like to finally see the idea of arresting for false report since that almost never happens. However, it doesn't look to me like she would be the kind to make something like that up and could have just misunderstood what she heard.
3 Agrees | 3 Disagrees | Report Abuse »
In this day it seems people want attention so much that they will do almost anything to get it. Sad.
5 Agrees | 2 Disagrees | Report Abuse »
Teachers are really starting to set a low example for the community.
5 Agrees | 4 Disagrees | Report Abuse »
I'm glad what appears to be a thorough investigation was completed and I hope the boy's parents pursue whatever legal means are available as well.
9 Agrees | 0 Disagrees | Report Abuse »
PAID LEAVE?!?! Are you kidding me?! This woman could have tarnished this kid's reputation for life, caused emotional stress to the other students, and many other indirect repercussions because she apparently had a grudge...and she's on PAID administrative leave?! Prime example of poor educators that need to be removed from our education system. At the very least, she should be fired, but with all the shootings and threats in recent years, I'd say the max sentence is appropriate. Use her as an example to some of these other deadbeat teachers that are milking the state teet. Teachers are supposed to be role models for our youth, and they need to be held to a higher standard when it comes to stuff like this.
8 Agrees | 5 Disagrees | Report Abuse »
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... According to gossip gurus TMZ, Charlie Sheen is already in talks to begin his network television comeback. Citing "sources," the site claims Sheen is in "deep negotiations" with a TV network to star in a comedy that would skip the pilot process, go straight to series, and be on the air as early as January. Anyone want to take a guess which network it might be? [TMZ]
... Americans aren't the only people who want to see bad guys get caught. For the second year in a row, CBS' CSI has been named the most-watched television show in the world at the Monte Carlo TV Festival, despite a decrease in viewership domestically. [Deadline Hollywood]
... South Park creators Trey Parker and Matt Stone cleaned house at the Tony Awards on Sunday, earning nine prizes including Best Musical for their opus The Book of Mormon. This is another coup for the awards show, which has embraced less straight-laced productions in recent years; The Book of Mormon is filled with four-letter words and profane humor, and The Producers and Spamalot have also won Best Musical. [Washington Post]
... Hey guys, Jessica Simpson is still alive. The blonde will participate in NBC's upcoming Project Runway ripoff Fashion Star, where she'll serve as a mentor to would-be fashionistas. No date for the show has been released, but my guess is it will happen right about the time the real apocalypse begins. [Associated Press]
... Utah NBC affiliate KSL has announced that it won't be airing NBC's upcoming program The Playboy Club, because the show promotes the Playboy brand, a brand that KSL "does not support." "We would be helping to build a brand that stands for pornography. For us, that's just untenable," said the station's boss. Note to self: Do not move to Utah. [Salt Lake Tribune]
... ABC has announced the cast of Bachelor Pad's upcoming season, and it's just as I predicted: a bunch of idiots I've never heard of before. [EW]
... QVC pitchwoman Jeanne Bice, a mainstay on E!'s The Soup, has passed away at the age of 71. Bice was known for donning matching sweaters and headbands to hawk all sorts of sequined and otherwise-bedazzled apparel. [CNN]

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Definition of Korean War in English:
Korean War
UN troops, dominated by US forces, countered the invasion of South Korea by North Korean forces by invading North Korea, while China intervened on the side of the North. Peace negotiations were begun in 1951, and the war ended two years later with the restoration of previous boundaries
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Cat ladies and cool cats alike are all about the recent cat cafe trend that's been sweeping the nation. For the uninitiated, most American cat cafes are places where cat lovers and coffee enthusiasts can relax and enjoy a cup of joe in the company of a...
Despite the appealing fast pace and some solid performances, CBS� new drama �Code Black� is a medical procedural that sacrifices a complex look at the overburdened health-care system for simplistic emotional ploys.
Weight Watchers shares are going bonkers.The stock is up 117 percent following news that Oprah Winfrey just made a big bet on the company.
Ever gotten creeped out by someone who just seemed, well, creepy?
I have always been fascinated with people who have worn the tag of �genius.� Most know about physicist Albert Einstein and his Theory of Relativity and medical researcher Jonas Salk and his polio vaccine. Inventors Thomas Edison, Alexander Graham...
Vermont Sen. Bernie Sanders says we need a revolution.Former Secretary of State Hillary Clinton says we all want to change the world.
Dave Granlund cartoon on snow.
Love Ranch prostitutes are being offered big money to talk about Lamar Odom's $75,000 brothel visit that nearly ended in a fatal drug overdose, but Odom had "all of them" sign confidentiality agreements, according to...
Put down the witch hat.There has been no shortage of fresh inspiration (scary or otherwise) for Halloween this year.
When you get caught red-handed, the best thing to do is just admit the truth. This kid has yet to learn that.
Oprah Winfrey will buy 10 percent of Weight Watchers International and join its board, giving the struggling provider of weight-loss programs a jolt of star power as it works to fend off cheaper digital rivals.
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'My Ride/My Road' Referendum Will Help Businesses, not Citizens
Published: Monday, March 31, 2014 at 12:01 a.m.
Last Modified: Sunday, March 30, 2014 at 11:44 p.m.
When first you hear the politicians propose something to help us taxpayers, a very large, bright neon sign should turn on in our brains, "warning, warning!"
I refer to the "My Ride/My Road" referendum our County Commission has proposed to fund countywide transportation and road building. They would like us to believe it is going to help us homeowners by reducing property-taxpayers' cost for road building and have everyone pay their fair share to ride on the county roads.
What they are not telling us is this is really a way to keep the developers from paying impact fees, and lowering property taxes on Mosaic, TECO, Duke Energy, Publix, Clear Springs, Coca-Cola, and all the large corporations and land owners in Polk County.
For road-building funds, put back the impact fees at the actual cost for the development, not some lowball figure to satisfy the developer.
Increase the fee on the actual user of the roads by increasing the fee on fuel and vehicle parts. And, because all property owners benefit from roads, continue a portion of our property tax for maintenance and new construction of roads.
A sales tax hurts the low-income family while letting those large corporations and land owners get the benefits of the tax, with little effect on their bottom line, and in some cases even get a tax deduction.
Reader comments posted to this article may be published in our print edition. All rights reserved. This copyrighted material may not be re-published without permission. Links are encouraged.


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a1 School of Mechanical and Materials Engineering, Washington State University, Pullman, Washington 99164-2920
a2 Department of Physics, University of Idaho, Moscow, Idaho 83844-0903
Production of gold nanoparticles with the specific goal of particle size control has been investigated by systematic variation of chamber pressure and substrate temperature. Gold nanoparticles have been synthesized on SiO2 nanowires by plasma-enhanced chemical vapor deposition. Determination of particle size and particle size distribution was done using transmission electron microscopy. Average nanoparticle diameters were between 4 and 12 nm, with particle size increasing as substrate temperature increased from 573 to 873 K. A bimodal size distribution was observed at temperatures ≥723 K indicating Ostwald ripening dominated by surface diffusion. The activation energy for surface diffusion of gold on SiO2 was determined to be 10.4 kJ/mol. Particle sizes were found to go through a maximum with increases in chamber pressure. Competition between diffusion within the vapor and dissociation of the precursor caused the pressure effect.
(Received March 28 2005)
(Accepted August 02 2005)
Key Words:
c1 Address all correspondence to this author. e-mail: email@example.com


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Just installed ver 2.0.2 and uploaded some images to test in a post. Polaroids not appearing in post but post template stretches like they should be visible. I tried IE & firefox - same thing. I am using the RedBel theme by Belouga. I am also using plugins > the Custom Contact Forms & SexyBookmarks (by Shareaholic).
Any thoughts why not working?


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A New London jury found two New York City men not guilty Tuesday of conspiracy and larceny in a case involving marked cards in the game of mini-baccarat at Mohegan Sun.
The jury of four men and two women deliberated just over two hours before announcing they had reached a verdict in the case of Leonard Hu, 53, and Hung Lit Leung, 60. Both men left the courthouse, smiling, a short time later.
"What a fascinating insight into the world of casino gambling," said Hu's attorney, Jeremiah Donovan. "That the casino has a formula that can predict how much of your money they can take away was revealing."
Leung's attorney, Conrad Seifert, said, "I'm just real happy with a full acquittal."
Prosecutor Stephen M. Carney had alleged the two men conspired with Mohegan Sun dealers to cheat the casino out of hundreds of thousands of dollars in late 2010 and early 2011.
"The jury has spoken, and we respect their verdict," Carney said. "Mr. Seifert and Mr. Donovan did a wonderful job on behalf of their clients."
The trial had begun with a casino official demonstrating the game of mini-baccarat using equipment provided by the casino. It also featured discussions of the alleged percentage advantages the men had gained by betting big when a marked card was about to be played.
The two dealers, Jeian Ng and Bong Gate Louie, had admitted from the witness stand that they used their thumbs to mark the faces of the 7, 8 and 9 cards. They testified with the hope of gaining leniency in their own criminal cases, which are pending in the same court.
Hu and Leung had initially been charged with cheating, conspiracy and larceny, but Judge Arthur C. Hadden on Friday granted the defense attorneys' motion for judgment of acquittal with respect to the cheating charge, because the state law on cheating prohibits anyone from knowingly marking cards but does not clearly prohibit someone from participating in a game with marked cards. None of the evidence showed that Hu or Leung marked the cards.
Ng, a dealer, had testified that he started marking cards after he was approached by a man named "Lee" and that he received payments anonymously in his mailbox. Nobody named Lee was identified through the evidence or called to testify at the trial.
The jurors, who were out of the courtroom when the judge dismissed the cheating charges, only learned they had been dismissed as they prepared to deliberate in the case. Shortly before reaching their verdict, they sent out a note asking, "If the charges of cheating were dismissed, can we find out how to connect conspiracy/larceny without the cheating charge?"
The prosecution had attempted to convince the jury it was not necessary to commit the underlying charge to be involved in the conspiracy. Carney said the men could be linked to the conspiracy through circumstantial evidence, including the amounts of money the two men won as a result of the marked cards.
Mohegan Sun's director of operational accounting, David Thomlinson, testified Friday that based on the casino's "theoretical hold" calculation, Hu was expected to lose $150,000 at mini-baccarat between October 2010 and February 2011 but instead won $468,500. Leung was expected to lose $51,297 during the same period but won $165,370.
Once acquitted, the two men immediately asked that the state return their cellphones, which were seized when they were arrested at the casino in February 2011. The men also are expected to make a claim at an Aug. 1 hearing to the $20,000 in chips that were seized from them.
Miami trio charged in East Lyme with producing fake credit cards
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A/Z Corporation has grown from humble beginnings to industry leader
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Waterford church continues tradition of Middle Eastern festival
Driver flees accident scene, crashes into police car on I-95
Waterford soldier's remains come home after more than 60 years
Electric Boat delivers submarine Illinois early, below budget
Region still lagging in job gains, but future seen as 'bright'


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The Buddies boss convened a squad meeting to decide a plan of action when the Clydesdale Bank Premier League fixture was looming.
"We had a collective decision about the game. Everyone is wanting to spend quality time with their loved ones and to leave young families early in the evening is not enjoyable," said Lennon.
"We spoke about it collectively and we will come in tomorrow morning (Christmas day) for a good hour then they can get away sharp to spend quality time with their families because for me, that is what Christmas is all about. We will leave early in the morning for Inverness.
"We went up to Ross County not too long ago and it was fine, so we don't envisage a problem with that."
Lennon's side travel with confidence after their 2-1 home win over Motherwell on Friday night but the former Cowdenbeath manager has some selection problems against the SPL's top scorers, who moved into second place behind Celtic with a 4-1 win over Dundee on Saturday.
Skipper Jim Goodwin and defender Marc McAusland, who both played in central defence against the Steelmen and against Celtic the previous game, are suspended and there are doubts over Kenny McLean (knock), Gary Teale (abductor) and Paul Dummett (muscle complaint).
Lennon said: "We have one or two wee worries. Kenny McLean won't train today (Monday), he picked a knock up the other night and is being assessed.
"Gary Teale came off with a tightening of the abductors, although he was feeling better, and there is Paul Dummett and of course we are missing Jim Goodwin and Marc McAusland which is a big blow for us, especially the way we have defended the last two games.
"Jim has been very disciplined, very strong and been able to build from the back. I thought he handled Michael Higdon very well on Friday and Marc has had a tremendous season, continuing on from where he left off last season."
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10 comments
For those that are missing this one, the image is of a compact (female make up) embedded in a bear trap (the kind of device that hunters leave in the woods, waiting for a bear to step on and get his leg caught).
They are considered the cruelest kind of trap since they cause severe pain to the animal and are indiscriminate as to who they target.
The fact that this needs any kind of explanation says it all. Bzzzt
For those who know about the cruelty posed by poachers and trappers this ad will make a lot of sense. Others can be made curious enough to ask relevant questions. Eyot above has given a clearcut picture.For the kind of wide subject it is dealing with, this is a good ad.


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Email Stefania Lovo
Stefania Lovo
Research Officer
Stefania joined the Grantham Research Institute on Climate Change and the Environment in October 2012, where she contributes to the Green Growth research programme. Her research focuses on environmental issues in developing countries.
Stefania worked previously at the Legatum Institute and as external consultant for the World Bank and the Italian Development Cooperation in the West Bank.
She holds a PhD in Economics from the University of Sussex and a PhD in Economics and Finance from the University of Verona.
Research interests
- Environmental policies in developing countries;
- Development economics;


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Reform of quangos by politicians just not happening
And the new water authority is the most serious example of Government backtracking on change, writes Colm McCarthy
Published 08/12/2013 | 02:30
In the Budget for 2009, delivered in October 2008, more than five years ago, the then government committed itself to a programme of reforming how the Irish State operates. There were simply too many State agencies at national, regional and local level. Aside from cost, the duplication of effort and competition between agencies was a hindrance to orderly public administration.
The current Government entered office after the February 2011 election and committed itself to an intensified spring-cleaning of the administrative structures. It has now become clear that the commitment of the Irish political system to structural reform is uneven at best and singularly absent in numerous areas. There has been no cull of the quangos.
The report of An Bord Snip, released in July 2009, listed a total of 870 Exchequer-funded quangos at local level. The list may have been incomplete, but included 42 Citizen Information Centres, 59 Money Advice and Budgeting Centres, 182 Community Development Projects, 107 Family Resources Centres, 60 Local Partnership and LEADER companies, 41 Community Training Centres, 330 Community Service Projects, 16 Volunteer Centres and 33 County Childcare Committees. The cost was €350m per annum at the time. No doubt many of these bodies do valuable work but it is simply impossible to identify which ones, in the absence of any coherent governance structure. The report recommended the wholesale rationalisation of these activities into a far smaller number of operating units which would enable proper supervision and oversight.
The report also recommended a rationalisation of the plethora of State agencies charged with providing support to business enterprises. Nationally the two key agencies are the IDA, which is focused on bringing foreign firms into this country, and Enterprise Ireland, which concentrates on domestic firms and export promotion. But in addition there are 35 city and county enterprise boards, business innovation centres, a western Development Commission as well as Udaras na Gealtachta, local Leader programmes, Shannon Development and special quangos for specific sectors, including Bord Iascaigh Mhara for the seafood sector, Bord Bia for agri-business, the Film Board, the Digital Hub Development Agency and numerous other bodies with enterprise support as part of their mandate. There are so many bodies that they sometimes compete for clients.
The same report also recommended a sharp reduction in the number of local authorities and fewer third-level educational institutions (there are over 40, believe it or not).
It would be unfair to deny that some progress has been made in cleaning up the State's organisation chart. Environment Minister Phil Hogan has done much of what was recommended in regard to streamlining local government, including the reunification of Tipperary. There have been amalgamations of some agencies belonging to other government departments and a reduction in the extraordinary number of vocational education committees, absorbed into a new local education structure. But overall the results are meagre: the Government remains vulnerable to the charge of austerity without reform.
The most serious example of backtracking on reform has come just recently, as the fine print of the new water system has become available. There is to be a new national water body, Irish Water, intended to become a commercial State company along the lines of the ESB. There are currently 34 water authorities in Ireland, corresponding to the city and county councils. It has long been acknowledged that this was far too many and the Government put through a new Water Act earlier this year creating a single semi-state body to charge water users, including those households for whom water supplies have hitherto been free. It was also to take over the assets and staff of the local authorities. But along comes the Water Services (No 2) Bill of 2013, introduced in the Oireachtas last week. It now transpires that a deal was done with the trade unions during the summer which will, for all practical purposes, see the reorganisation of the water industry deferred until the year 2025, believe it or not. The charges for water will come immediately.
The explanatory memorandum accompanying this bill includes the following: "The bill provides for the making of agreements between Irish Water and each local authority for the delivery of water services." This makes perfect sense. During the transition period, the water system must continue to operate. But how long do you think the transition period ought to be? The explanatory memorandum continues: "An agreement has been reached between the Department of the Environment, Community and Local Government, Irish Water and the local authorities that the first service level agreements will cover a period of 12 years". Twelve years, not 12 months.
No such provision appears in the actual bill, only in the explanatory memorandum. It is most unusual for an explanatory memorandum to stray beyond a summary of what is actually contained in the proposed legislation. The Government has apparently committed itself, outside the actual legislation as proposed, to setting up a brand-new super-quango (Irish Water has already recruited 300 staff) while leaving the pre-existing, and inefficient, structures fully in place for a minimum of 12 years. The local authority staff in this €1.2bn per annum industry will remain in place and will transfer, with all pay and conditions intact, into the new quango 12 years hence. What is going on here?
It would appear that, below the radar, our long-lost friends the Social Partners are back in business. The explanatory memorandum (but not the actual legislation) refers to an 'agreement', hitherto undisclosed, contained in an intriguing document dated June 27 last, from the Labour Relations Commission, a quango. Something called the Irish Water Forum, chaired by Kevin Foley and apparently including public officials and trade unions, had been meeting and its report included the following: ". . . work is progressing on the development of an overarching framework to reflect the proposed collaborative arrangement between Irish Water and local authorities. This framework will encompass a . . . period of 12 years, with a review after the first two years and again after the first seven years, neither of which would involve a break clause." The language ('overarching framework', 'collaborative arrangement') will thrill fans of the Department of the Taoiseach in its Bertie-era pomp.
The legislation includes a power for the minister to compel local authorities to sign up for these 12-year service level agreements. The bill also includes a cost-recovery formula for Irish Water and, in the absence of proper regulation, the new quango will simply recover the costs of the existing (and supposedly inefficient) system from customers for 12 years, and will then become an Irish semi-State with all pre-existing cost structures preserved by statute. After a 12-year apprenticeship, Irish Water will be free to achieve the glittering efficiency levels and industrial relations practices visible in, for example, the ESB. Game, set and match to the trade unions. It would make perfect sense, in the light of this agreement, to defer the establishment of Irish Water until 2024 and fire all staff already engaged. This is another HSE in the making.
The 'arrangement' requires some involuntary patsy to pick up the bill, and this is provided for in the draft legislation. The patsy, dear reader, is your good self. The bill identifies the existing energy regulator as the body to patrol the allowable charges to be collected from the general public, and then states, in section 30, that regulation will be on a cost-recovery basis. There is no point to regulatory oversight if all that regulators are empowered to do is to pass on monopoly costs to the public.
It is now almost six years since the realisation dawned in 2008 that Ireland needed reform as well as austerity. The austerity is still not completed and there will be several more tough budgets. The prospect of eventual emergence into the sunny uplands of a well-functioning modern economy is entirely dependent on reform, not on austerity which is unavoidable as every adult knows. The political and administrative classes lack a real commitment to reform, appearing to make changes slowly, under protest, or because outsiders have made reform a condition of lending the State more money. The system of public administration remains bloated, largely unaccountable, costly and inefficient.
The reorganisation of the water industry is the biggest single test of the Government's reform commitment. There has been modest progress in small things, but when it came to water, they bottled it.
Sunday Independent


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Baseball commissioner Bud Selig, center, sits with San Diego Padres CEO Ron Fowler and former Padres pitcher Trevor Hoffman, left, at a ceremony announcing that part of the Padres' Petco Park is being named Selig Hall of Fame Plaza in honor of the commissioner, who is retiring, Tuesday, Aug. 26, 2014, in San Diego. The ceremony took place prior to a baseball game between the Padres and the Milwaukee Brewers.
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Mesa State College is selling eight houses near campus to the highest bidders. There is a catch, however, after you buy the house, you need to move it to your own property.
Mesa State's Purchasing Department will accept sealed bids until March 27th at 11 AM.
The houses for sale are;
916 Texas Ave., 1949 Ranch w/Bsmt, 3 bed/1.5 bath
910 Texas Ave., 1947 Ranch w/Bsmt, 2 bed/1.5 bath
938 Elm Ave., 1948 Ranch w/ Bsmt, 4 bed/1.75 bath
940 Elm Ave., 1936 Ranch w/ Bsmt, 2 bed/1 bath
1325 Houston Ave., 1955 Ranch w/Bsmt, 2 bed/1.5 bath
1335 Houston Ave., 1940 Ranch w/Bsmt, 3 bed/1.5 bath
1415 Houston Ave., 1947 Ranch w/ Bsmt, 2 bed/1.5 bath
1340 Cannell Ave., 1948 Ranch w/ Bsmt 4 bed/2.5 bath


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This plugin looks like it will save me a ton of time, but I'm having a problem with the htaccess redirects.
No matter how I set the permalink structure, the redirects always show the page ID - ?page_id=435 [R=301,NC,L] which is equal to the "New Path" rather than the permalink.
I'm trying to get the page title in the redirect by setting permalinks to /%postname%/
If it has any bearing, I'm also getting a lot of "Warning: strrpos() expects parameter 3 to be long, string given in ...html-importer.php on line 837" for all the images I'm bringing in.
I'm using a Catalyst theme and all other plugins are deactivated.
Any ideas?


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SUNY Maritime College has been named one of the best colleges for its price by Washington Monthly.
SUNY Maritime placed in the top 30 schools in the Northeast.
The Coast Guard Foundation, a non-profit organization committed to the education and welfare of all Coast Guard members and their families, announced today that
The Danish Maritime Authority's buoy tender 'POUL LØWENØRN' will be alongside in Korsør in connection with the Maritime Cultural Days. The vessel will be open to visitors throughout Saturday,


text:
I'm setting up a Podcast. I've installed Seriously Simple Podcasting. My listeners are going to be quite touchy about the audio formats available. I will need to offer each episode in .mp3 and .ogg to keep them happy. I have no problem producing the content in both formats. What I'm not sure how to do is upload two formats of the same show and offer them to the audience?
Can you help?
Thanks in advance.


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Scatec Solar has signed an agreement with CDIL, a Canadian renewable energy development company focused on Africa; and BPS, a Nigerian strategic consulting firm, securing the 100 MW (DC) Nova Scotia Power plant located in Jigawa State, Nigeria.
12 hours ago
The Kenyan Film Classification Board (KFCB) has concluded a two week reciprocal study tour, hosted by the Film and Publication Board (FPB) of South Africa, to identify mutually beneficial activities for both countries, develop mechanisms and programs for content classification and regulation, and promote best practice.
1 day ago
During Seedstars Lagos, Kangpe won the Nigeria round of Seedstars World and will represent the country at the Seedstars Summit in Switzerland to compete for up to USD$1 million in equity investment.
1 day ago
ADDIS ABABA, Ethiopia - Preparations are underway for the 10th African Development Forum (ADF) to be convened by the Economic Commission for Africa, the African Union and the African Development Bank.
1 day ago
NEW YORK, USA - The Nigerian military should cease threatening freelance journalist Ahmad Salkida with prosecution for not acting as an informer, the Committee to Protect Journalists (CPJ) said last week. The military has said the journalist could face terrorism charges if he does not provide it with information he gained in the course of his reporting on the militant group Boko Haram.
2 days ago
The Federal Ministry of Agriculture and Rural Development in Nigeria has launched a smartphone application, which has been dubbed 'Wetin App' for flood forecasting, especially along the Niger and Benue rivers, according to a report via agricnation.com.
2 days ago
The African Union Commission (AUC) has announced Lagos State as the official Host City of the third edition of The All Africa Music Awards.
19 Aug 2016
By 6:30 am on 24 June, less than 12 hours after a successful referendum on Brexit (Britain's exit from the European Union), South Africa's currency, the rand, took the first blow. It plunged by almost 8% from R14.33 to R15.45 against the US dollar, its steepest single-day decline since the 2008 financial crisis. Brexit sent shock waves through the global markets, including those in Africa.
Amelia Tan 17 Aug 2016
RABAT, Morocco - Applications for Chevening Scholarships, the prestigious global scholarship programme of the UK government, are now open. The scholarship is open to students worldwide.
17 Aug 2016


text:
- Report: #384154
Report - Rebuttal - Arbitrate
Complaint Review: LATO, LA Weight Loss
LATO, LA Weight Lossla-weightloss.com Nationwide U.S.A.
LATO ,LA WEIGHT LOSS AZ & UT stores are latest to close -refunds will not be processed! Phoenix, Arizona & Salt Lake City, Utah Nationwide
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The supervisor in the Phoenix and Salt Lake markets has directed the employees to inform clients that refunds will be processed during the centers' final week of business. This will not happen! She has advised the staff to respond this way to avoid having to deal with client complaints and to avoid chargebacks on her commission.
Also, if you are owed product and are told that it is being ordered: Beware! If the center closes and you have not received everything that you are owed, you will never get it by communicating with the company 800 number.
Know that the center managers are the only employees left in the store and while they are the "front-line," they are powerless to help you. The Supervisor in the Phoenix and Utah markets is Patty Wynne; the District Manager is Mary Robertson; their objective is $0 paid out even though thousands of people are owed refunds, future rebates, and product.
Phoenix, Arizona
This report was posted on Ripoff Report on 10/23/2008 12:23 PM and is a permanent record located here: http://www.ripoffreport.com/r/LATO-LA-Weight-Loss/nationwide/LATO-LA-WEIGHT-LOSS-AZ-UT-stores-are-latest-to-close-refunds-will-not-be-processed-Ph-384154. The posting time indicated is Arizona local time. Arizona does not observe daylight savings so the post time may be Mountain or Pacific depending on the time of year.
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text:
- Report: #514887
Report - Rebuttal - Arbitrate
Complaint Review: So Tan
So Tan2025 W. SUNSHINE SUITE #120 Springfield, Missouri United States of America
So Tan Abby and Mike Flavin Cancellation Fraud Springfield, Missouri
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If you cancel your account here, take a picture, get the girls name you filled it out with, and make sure to bring someone with you.
Practices like this are unlawful and something should be done to stop poor business owners such as Mike and Abby Flavin.
This report was posted on Ripoff Report on 10/26/2009 08:24 AM and is a permanent record located here: http://www.ripoffreport.com/r/So-Tan/Springfield-Missouri-65806/So-Tan-Abby-and-Mike-Flavin-Cancellation-Fraud-Springfield-Missouri-514887. The posting time indicated is Arizona local time. Arizona does not observe daylight savings so the post time may be Mountain or Pacific depending on the time of year.
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text:
Reunions: Aug. 28, 2011
Published: Sunday, August 28, 2011 at 6:01 a.m.
Last Modified: Friday, August 26, 2011 at 6:01 a.m.
The Central Lafourche High School Class of 1991 is planning its 20-year reunion. All classmates are asked to send their contact information to Shannon Dauzat Arceneaux at firstname.lastname@example.com.
The Ellender Memorial High School Class of 1991 is planning its 20-year reunion. All classmates are asked to send their contact information and photos for a slide show to Michelle Luke, Courtney Arceneaux, Dana Coleman or Mike Dryden at email@example.com.
The Ellender Memorial High School Class of 1996 is planning its 15-year reunion. Classmates should contact Michael Jordan at 637-6704 or firstname.lastname@example.com.
The Ellender Memorial High School Class of 2001 is planning its 10-year reunion scheduled from 8 p.m. to midnight Saturday at the East Houma Lions Club. For information, visit the class's Facebook page, "EMHS Class of 2001," or email email@example.com.
The Golden Meadow High School Class of 1966's 45-year reunion is scheduled for 10 a.m. Sept. 17 at the site of the former high school, followed by a party at the home of David and Elaine Duet. For information, call 475-7090.
The South Lafourche High School Class of 1971 is planning its 40-year reunion scheduled for Oct. 21. A reception is scheduled for 4:30 p.m. in the high school's commons area, followed by a party at St. Joseph Center after the school's homecoming game. Admission costs $50 per couple. The event is BYOL. Food and music will be provided. For information, call 632-6457 or 325-8180 or email firstname.lastname@example.com.
The Terrebonne High School Class of 1953 is planning a Dutch-treat supper for 5:30 p.m. Sept. 29 at Ryan's Family Steak House, 1520 Martin Luther King Blvd., Houma. For information, call Sybil Roddy McCann at 879-2836 or Barbara Schober at 876-5041.
The Terrebonne High School Class of 1991 is planning its 20-year reunion. All classmates are asked to send their contact information to Mark King at firstname.lastname@example.com or on Facebook. All classmates are asked to send photos for a slide show to firstname.lastname@example.com.
The 34th Arcement family reunion is scheduled from 11 a.m. to 3 p.m. Sept. 4 at the South Thibodaux Fire Station, 102 Lafaye Ave. All descendants of Victorin Arcement of Raceland and those married into the family are welcome to attend. The reunion includes a covered dish luncheon. For information, call Frank Pasqua at 447-3126 or 435-4611, Pat Busselle at 447-6076 or Della Blanchard at 872-9627.
A Guédry-Labine and Petitpas family reunion is scheduled from 8 a.m. to 4 p.m. Oct. 8 at the Cut Off Youth Center, 205 W. 79th St. The Guédry, or Guidry, family has members throughout the United States and Canada. For information, email Martin Guidry at email@example.com or call 225-755-1915 or 225-202-2478.
A reunion of Doucet/Doucett/Doucette descendants is scheduled for Oct. 15 in Lafayette. The reunion will occur during the Grand Réveil Acadien/Great Acadian Awakening and the Festivals Acadiens. This will give people the opportunity to take advantage of being in the center of historical sites such as Acadian Village, Vermilionville and the Acadian Cultural Center. For information, visit www.doucetfamily.org.
Send information on reunions
before noon on Wednesdays to the
Courier to Reunion News, P.O. Box
2717, Houma, LA 70361 or email firstname.lastname@example.com.
Reader comments posted to this article may be published in our print edition. All rights reserved. This copyrighted material may not be re-published without permission. Links are encouraged.


text:
|Publication number
|Publication type
|Application number
|Publication date
|Jun 20, 2006
|Filing date
|Mar 24, 2003
|Priority date
|May 9, 2002
|Fee status
|Also published as
|Publication number
|John Alderson
|Original Assignee
|Sun Microsystems, Inc.
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (6), Non-Patent Citations (2), Referenced by (5), Classifications (17), Legal Events (5)
|External Links: USPTO, USPTO Assignment, Espacenet
The present invention relates to a computer system, and in particular to a method for performing a data access from low-level code, such as a trap routine, running on the computer system.
Many modem operating systems are built around a kernel, which provides a core set of functionality and services to allow programs to run on the computer hardware. The kernel includes code routines for handling traps. The operating system invokes such a routine (known as a trap routine) if an event occurs that is in some way unexpected or unanticipated.
There are a relatively wide variety of circumstances that can lead to a trap routine being called. One example is a page fault, when a process attempts to access a virtual address, and the memory management unit (MMU) does not currently contain a mapping from this virtual address to a real physical memory location. This can occur if there is not enough room within the MMU, more particularly the translation lookaside buffer (TLB), to store the relevant mapping. In this case, the correct mapping must be retrieved into the TLB, in order to provide the desired association between the requested virtual address and the corresponding physical memory location. Alternatively, a page fault may arise when a requested virtual address does not lie within any mapped region (this of course will normally lead to program error).
Another circumstance in which a trap can be generated is where there is some instruction error detected by a processor. Examples of this situation would be an attempt to divide by zero, or to execute an instruction requiring a higher privilege level than possessed by the relevant process.
The above two classes of traps can be regarded as synchronous, in that they occur in the course of normal program flow. On the other hand, many traps can also be generated asynchronously. Typically these are initiated by some form of hardware interrupt. For example, such an interrupt may be used to indicate that the user has hit a key on a computer terminal; that a disk unit has successfully retrieved some requested data; or that another processor in a multi-processing system has made some form of request. A further form of asynchronous event that can invoke trap code is the receipt of a data communication from an external source, such as a packet over a network.
A computing system often has to handle a very high rate of traps, given the wide range of situations in which they can arise. For example, a processor in a typical server may receive thousands of trap events per second. It will be recognised therefore that the performance of trap code can be highly significant for the overall performance of the machine. Note that this impact is both direct, as programs have to wait for trap routines to complete, and also indirect, as trap routines consume machine resources that could otherwise be employed by other programs.
Trap routines are therefore normally written in assembly code for the machine on which they are to be run in order to maximise speed. In addition, this allows low-level operations to be performed directly with the hardware, which can be necessary given the purpose of a trap routine, for example to process interrupts.
It is also very important that trap routines behave correctly. This is not only because, as low level code, trap routines bypass many of the safeguards that are provided for normal programs, but also because they run in kernel space, and so have relatively high privileges. It will be appreciated therefore that a misbehaving trap routine can easily cause the complete system to crash, and potentially result in the loss of data as well.
In view of the above, understanding the operation of a trap routine is very important, both to ensure correct behaviour, and also for performance reasons (to see if there is any way in which the overall speed of the trap routine can be improved). A typical way to do this is to instrument the code. Such instrumentation enables the recording of various state values within the code for subsequent analysis, in order to get a clearer understanding of the operation of the code. This can then assist with both defect correction and also performance analysis and optimisation (these activities will be collectively referred to herein as debugging).
For programs in a higher level language, a common way to instrument code is simply to include output statements in various locations. These can then be used to print or save to disk the values of selected variables during the running of a program. However, the instrumentation of trap code is a rather more challenging proposition. Thus there are normally significant constraints imposed on trap code regarding the nature of operations that can be performed within a trap routine. This helps to reduce the likelihood of problems arising from execution of the trap routine itself. Thus should an attempt to write data lead inadvertently to another trap routine being called, this may only further exacerbate the situation.
(Note that it is not normally possible to avoid entirely nested trap routines, i.e. where one trap routine triggers another. Nevertheless, it is generally desirable to try to minimise the occurrence of such nesting in order to avoid certain problems, such will be described in more detail below).
Many systems therefore do not support the instrumentation of trap code via simple write statements. Rather, it is known to provide a special-purpose macro that can be used instead to output data from trap code. However, a complication can arise here, in that many processors require the output address for a write operation to be stored in a register. This restriction is particularly true in reduced instruction set computing (RISC) system, since RISC processors tend to have relatively short-length instructions. In such circumstances, there is no room to incorporate the output address for a write or store instruction into the instruction itself, hence the need for this to be available to the processor in a register instead. (In contrast, in some complex instruction set computing (CISC) processors, the instructions can be much longer, and so are able to directly incorporate the address for a particular write operation). Thus for a RISC environment, or other system in which output addresses must be stored within a register, it is necessary to find a free register to store an output address before a write operation can be performed.
It is known to provide a processor with registers for use by trap code. The primary reason for this is that when trap code is initiated, the previous processing state must be saved, since the invocation of the trap routine necessitates a change of processing direction compared with the immediately preceding instructions. In general therefore, the processor has to save the state of the process that was executing immediately prior to receipt of the trapped event. This then allows the process to be safely restored after the trap routine has completed.
It will be appreciated that this is analogous to a function call, where the state of the calling function is saved on the program stack when the function is invoked. Thus the program stack maintains state information when dropping from a first program function into a second program function. This ensures that when the second program function has completed, the first function can be revived in its correct state (as of the time the second function was initiated). A program stack can typically save a whole series of states, thereby allowing function calls to be nested one within the other.
In theory the main program stack could also be used for saving state on entry into trap routines. However, this turns out to be rather unattractive for performance reasons. This is because a conventional stack facility may save more context than is needed for the execution of a simpler trap routine. Moreover, use of the stack may trigger further traps, for instance when the expansion of a stack across a page-boundary itself causes a page-fault trap. Consequently, trap routines typically try to use the registers mentioned above for storing state information to allow the previous program state to be restored at the end of the trap code. The use of such registers rather than the program stack by the processor helps to ensure that the trap-code executes quickly.
However, the situation becomes more complicated where one trap gets called from within another trap (i.e. trap nesting). An example of this is where a trap routine needs to access a particular virtual address that is not currently mapped in the TLB, since this then results in another trap. Thus a hierarchical set of trap routines can be invoked, in analogous fashion to the stacked function calls mentioned above. This can lead to a situation where the nesting or processing involved is too complex to be accommodated by the registers available to the processor. In such circumstances, the use of the program stack to store state data becomes inevitable.
Returning now to the instrumentation of trap code, it will be recalled that in a RISC environment and on certain other machines, a write operation requires the relevant output address to be stored in a register. In fact, the instrumentation macro for a trap routine typically utilises a circular buffer in memory for outputting data, and this then needs two free registers in order to operate properly: one for storing the base location of the buffer, and one for storing the current write location within the buffer (i.e. corresponding to its fill level).
In theory, the registers available to the processor for storing state information during trap routines might serve such a purpose (i.e. storing one or more output addresses). However, this is problematic, because it is difficult to know with certainty whether or not a particular register is free. Rather, a register accessible to a trap routine may already be being used to store state information for nested trap routines or from the previously executing program. Thus any attempt to store an output address in a register may inadvertently overwrite important state information for preceding code, and thereby prevent proper operation of the system once the trap routine has completed.
Of course, the instrumentation code could try to force the trap routines to utilise the program stack for saving their state information, since this would then free up the registers to store output addresses. However, it is highly undesirable for instrumentation to have such a major impact on code under investigation, since this can easily lead to a significant divergence between the behaviour of the instrumented code and of the non-instrumented code. This in turn can prevent proper understanding and analysis of the non-instrumented code, and so undermine the very purpose of the instrumentation itself.
Accordingly, in one embodiment of the invention there is provided a method for operating a computer system. The computer system has a memory divided into pages, with an address space starting at zero, and also has a register configured to contain a zero value. The method commences with allocating a region of memory at the top of the address space, and then locking this allocation for the page or pages corresponding to this region in a translation lookaside buffer. Subsequently, a data access is performed from within low-level code running on the computer system to an address in the allocated region of memory. This address is specified as a negative offset from the zero value stored in the register.
A typical situation where such an approach can be applied arises where the low-level code comprises a trap routine, and it is desired to instrument this routine. This would normally require at least one free register to function as a pointer to an area where the instrumentation output is to be stored. This has previously prevented insertion of instrumentation at arbitrary points in the trap routine code, without the need for extra (and risky) effort to make available the desired register. Indeed, standard trap instrumentation typically requires two registers to operate a circular buffer for output, thereby exacerbating the problem.
In contrast, the approach described herein allows such a RISC processor to reliably and efficiently address a region of memory without altering the contents of any program-visible register. This is particularly valuable for RISC processors that have very limited facilities for addressing via immediate data (i.e. they generally require that the write address for a store operation is made available to a processor in a register). It is also of great benefit for contexts such as trap handling, where very few assumptions can be made about register and memory availability.
Thus the allocated memory region provides an area where data from trap instrumentation or any other appropriate source can be directed. No general register is required to achieve this, only a single register that is configured to store a zero value. Note that such a register, restricted to zero, is already typically provided in RISC systems. Addresses within the allocation region can then be accessed by using a negative offset from this zero register, since this offset in effect results in a wraparound of the address to the top portion of memory. Typically this can be expressed as X′=M+X, where X is the offset (a negative value), M is the total size of the address space, and X′ is the address in the top portion of memory that corresponds to X.
Note that if a positive offset were used from the zero register instead of a negative offset, then the corresponding region of memory would include page zero. This would be undesirable, since many systems prevent access to page zero as a way of detecting uninitialised pointers, typically by having page zero explicitly unmapped (indeed, many of the traps that may need to be investigated or instrumented originate from page zero accesses).
The allocation of the page or pages in the memory region are locked in a translation lookaside buffer (TLB) in order to ensure that their mappings to the corresponding physical memory locations are always available. This helps to ensure that accessing the allocated region does not result in any (secondary) traps.
In one embodiment, the size of the allocated region of memory is determined by the maximum allowable offset supported by the system for a data access instruction. Normally this a property of a processor instruction set, and so will generally be the same for all processors in a given multiprocessor system. In one particular implementation, the offset is limited to 12 bits, corresponding to 4 kbytes, which in turn represents half a page in the most common configuration of this implementation. Such a region provides ample space for most purposes, while at the same time tying down only a single entry in the TLB.
In one embodiment, the allocated region of memory is used for directly storing output from trap instrumentation and other low-level code as and when required, thereby avoiding any risk of altering register state. In another embodiment, further flexibility may be obtained by using the allocated region to save initial values from at least two registers. This then allows these registers to be used to define a circular buffer or any other desired memory structure for use by the low-level code (it will be appreciated that such a memory structure does not have to be within the allocated region, but could be at any other suitably available location in the address space). Once the low-level code has completed, the initial values of the registers can be then restored from the saved values in the allocated memory region to allow the system to continue processing as before. In this context, the allocated region has served in effect as a fast register stash, without the complexity or overhead of having to generate a stack frame.
The allocated region of memory can also be used for other purposes, by other forms of low-level code. For example, in a multiple CPU system it is common to store status information about the CPUs in a series of records, one record per CPU. A given CPU can then perform a special-purpose hardware lookup to find out which CPU in the system it is, and can then determine the address of the relevant record containing its own status information.
In one embodiment of the present invention, the allocated region for each CPU is used for storing information particular to that CPU, such as the address of the record having status data for that CPU. This then allows the status information to be accessed directly and quickly, avoiding the need for any hardware lookup and subsequent conversion of the CPU identity into the address of the relevant record. Such a performance benefit can potentially more than compensate for a single locked entry in the TLB.
Typically there is one allocated region of memory for each CPU. The low-level code in performing a data access therefore runs on just one of the CPUs, in order to ensure that the same allocated region is consistently accessed by that particular portion of low-level code.
In accordance with another embodiment of the invention, there is provided a computer system having a memory divided into pages and with an address space starting at zero. The computer system also has a register configured to contain a zero value. The computer system further comprises a region of memory at the top of the address space, and a translation lookaside buffer that supports a lock on the allocation of the page or pages corresponding to this region. Low-level code running on the computer system is operable to perform a data access to an address in the allocated region of memory. This address is specified as a negative offset from the zero value stored in the register.
In accordance with another embodiment of the invention, there is provided a computer program product comprising a medium containing machine readable program instructions for loading into a computer system. The computer system has a memory divided into pages and an address space starting at zero. The computer system further includes a register configured to contain a zero value. The program instructions cause the computer to perform the steps of: allocating a region of memory at the top of the address space; locking the page or pages corresponding to the allocated region in a translation lookaside buffer; and performing a data access from within low-level code running on the computer system to an address in the allocated region of memory. In performing this data access, the address is specified as a negative offset from the zero value stored in the register.
In such a computer program product, the computer program instructions may be recorded or embedded on a storage medium, such as a CD ROM, tape, DVD and so on.
It will be appreciated that the system and computer program product embodiments of the invention will generally benefit from the same particular features as the method embodiment of the invention.
Various embodiments of the invention will now be described in detail by way of example only with reference to the following drawings in which like reference numerals pertain to like elements and in which:
Note that a wide variety of configurations are possible for CPUs 10, bus 12, and memory 14. For example, a certain portion of RAM may be more closely associated with a particular CPU in order to provide faster access for this CPU to that portion of memory than to the rest of memory. This is known as a non-uniform memory architecture (NUMA). In addition, in many systems bus 12 is implemented as a hierarchy of buses, with the fastest links between CPUs 10 and RAM 14, and somewhat slower links to other components, including external storage 18 and network interface 24. Alternatively, bus 12 may be replaced partially or completely by a switching network. Furthermore, system 20 will typically include many other components not shown in
In one particular embodiment, operating system 105 comprises the Solaris platform, available from Sun Microsystems Inc. Further details about this operating system can be found in: "Solaris Internals: Core Kernel Components" by Jim Mauro and Richard McDougall, Prentice Hall 2001 (ISBN 0-13-022496-0), which is hereby incorporated by reference into the present application.
The processor further contains translation lookaside buffer (TLB) 220. This is used to store mappings from virtual (logical) addresses into real (physical) addresses for that CPU. The TLB only has space for mappings for a relatively small proportion of memory. For example, the TLB is limited to 64 entries in one embodiment (although other systems have other sizes). TLB entries corresponding to memory pages that have not been recently used are therefore susceptible to being discarded from the TLB to make way for new entries. It is however possible to lock an entry into the TLB to ensure that it is not discarded in this manner, although this reduces the remaining available capacity of the TLB.
It will be appreciated of course that in practice a processor generally has many more components than shown in
Register G0 is different from the remaining registers G1–G3 in that it is arranged that register G0 always stores the value of 0 (zero). Thus any load from G0 necessarily retrieves the value of 0. Conversely, any attempt to store data into G0, although regarded as a perfectly permissible operation, results, in effect, in the loss of the relevant data, in that the value of G0 remains as zero, irrespective of the value of the data that is (in theory only) being stored into the register.
Note that certain known systems already include a register having the functionality of G0. This is particularly the case for RISC systems, since providing a register such as G0 can be used to mimic certain instructions, which therefore do not need to be specifically supported (thereby reducing the size of the formal instruction set). For example, consider an operation ADD (a, b; c), where this is interpreted as an instruction to add together the values a and b, and to store the result in c. If we take register G0 as being the source of value b, then the overall effect of this operation is simply to copy the value of a into c. Accordingly, there is no need to provide a separate specific "copy" instruction.
As another example, consider an operation ORDER (a, b; c, d). Let us assume that this instruction compares the values a and b, and writes the smaller of the two out as c, and the larger of the two out as d. If, for some reason, we are only interested in the smaller value, then we can associate output d with register G0, which will therefore, in effect, discard this larger value.
Because register G0 is not used to store data per se, this opens up the possibility of using it as an output address for write operations during a trap routine. This is feasible because some systems allow a slight offset from the register value to be specified in the write command itself. In other words, the write command specifies both the register storing a base address, and then also a (small) offset to be applied to this address.
Note that in one embodiment the size of the offset supported by the processor is limited to 12 bits. Such a restriction in the offset available from the address stored in the register implies that any output address using G0 as the base address must lie at the very bottom of the memory address space. For example, in a system having an 8 kbyte page size, the offset region would be completely contained within the lowest 4 kbytes of page 0. This is problematic because many systems prevent output to this location, or more accurately, they fail to provide a valid mapping for address zero. (The primary reason for such a constraint is that it prevents access to a location specified by an uninitialised pointer—a relatively common source of programmer error).
However, rather than using a conventional positive offset from G0 in the write command, it is in fact possible to use a negative offset from G0 instead. This leads to a negative memory address. Superficially such a negative address is meaningless (for a normal address space commencing at zero). However, it turns out that due to a wraparound effect, a small negative address can be regarded as equivalent to a large positive address.
This situation is illustrated in
We can map the negative memory address space onto positive memory address space by simply shifting address space 301 up by the total size of the memory address space (i.e. eight complete page units for the example shown in
If M is the total size of the address space 300, X the (negative) offset, and X′ the location of X mapped into the main address space 300, then we can relate X′ to X using the wraparound as: For −M≦X<0; X′=X+M. Alternatively, we can write this as: X′=X Modulo(M).
It will be seen therefore that by using a small negative offset from address zero, rather than a small positive offset, the relevant memory region is shifted from the bottom of the address space all the way up to the top of the address space. An important consequence of this is that write operations are now enabled, since access to the top of the address space is not subject to the previously described limitations that apply to the bottom of the address space.
Accordingly, it is now feasible to use an output location determined by a negative offset from the G0 register as a location for storing the output of instrumented trap code. Since only register G0 is utilised, this approach avoids the risk of overwriting any important data that is stored in other registers and may be needed for correct operation of the trap routines.
As an example, in one embodiment based on a 64-bit system having an 8 kbyte page size, the topmost virtual page will have an address range from:
Next, the mapping to the physical location allocated in step 410 is locked into the translation lookaside buffer (TLB) (step 420). Consequently, the system is always able to convert an address in page minus-one into the appropriate physical address. This avoids the risk that this mapping or allocation is dropped from the TLB, and so won't be available when a trap routine is run.
It will be appreciated that tying up one TLB entry in this manner will have a (small) negative performance impact, since it will slightly reduce the capacity of the TLB available for mainstream program use. It might in theory be possible to avoid such degradation by not locking the address of page minus-one into the TLB, but the consequence of this would be that a TLB miss to page minus-one from a trap routine would then have to invoke the relevant trap routine to reload the mapping into the TLB. The increased complexity caused by such trap routine nesting can make debugging or program analysis more difficult, and increase the risk of errors (or lead the trap routine to fail altogether). Given that trap instrumentation is normally utilised in a debug situation or environment, reliability can be expected to take precedence over performance—hence the presence of locking step 420 in
Steps 410 and 420 are generally performed at system start-up in order to determine and lock the mapping between page minus-one and physical memory. The method of
The approach of
The processing of
The processing of
Once the trap routine has completed its processing, the register values stored in page minus-one can be restored back into the relevant registers (step 546). It will be appreciated that this will then allow processing to continue normally after termination of the trap routine (step 550).
The method of
In one implementation, the circular buffer itself is located in the page minus-one scratchpad (although this does not necessarily have to be so). Thus at CPU start-up, the circular buffer is allocated within the scratchpad, and its "start" and "current" pointer addresses stored at a known location within the scratchpad. (Note that the trap output macro typically uses physical addresses in order to access the circular buffer in order to avoid any traps generated by the physical memory system).
The start macro can then load a free register with the address of the circular buffer using a command such as: 1dx [% G0−8], % G1, where G1 is the free register, and the address of the circular buffer is located at "−8" in the address space (corresponding to 0x ffff ffff ffff fff8 in 64-bit space). This corresponds to step 538 in
Note that although the methods of
The description has so far concentrated on data output for the purposes of trap code instrumentation. However, it will be appreciated that the present invention is not limited just to this context. For example, in a multiprocessor system such as shown in
A different approach is based on having a scratchpad at virtual page minus-one for each CPU. Note that since the size of the scratchpad is controlled by the offset permitted in the relevant processor instruction, this will be constant for all processors in the system (although as previously mentioned, page minus-one will correspond to a different actual physical portion of memory for each CPU). The scratchpad at page minus-one provides an alternative mechanism for accessing the CPU-specific data, in that the address of the relevant record can now be stored at a predetermined location within page minus-one. The retrieved address can then be used to directly access the particular status record for that CPU. Note that this record access is achieved with a single instruction, in contrast to the more normal approach that involves a hardware operation followed by a calculation to determine the relevant record. A performance advantage can therefore be expected, although it will be appreciated that this is likely to depend on the particular hardware implementation. In some situations, the performance advantage may more than compensate for the loss of one entry in the TLB (due to locking the mapping of page minus-one). In this case, it is desirable to incorporate the page minus-one scratchpad facility into standard trap processing, rather than just as a form of instrumentation in a debug environment. This is especially likely to be so if the status information is heavily accessed, for example by kernel routines that are called very frequently.
It will be appreciated that in some embodiments the scratchpad may be used to store CPU status information itself (rather than simply a pointer to a record containing this status information). Furthermore, there may be other contexts in which the scratchpad facility may be employed, generally because more normal I/O facilities are not available. These will typically include any situation in which kernel or other low-level code is being processed with a need to output data, but without a free register on which to store the desired address. One qualification on this is that multiprocessing systems often actively re-locate code processing from one CPU onto another in order to try to maximise overall system throughput. Since different CPUs use different scratchpads, there is a possibility that this will lead to unanticipated results, where code on one CPU stores data into the scratchpad, and then is unable to retrieve it while running on another CPU. Note that trap routines avoid this problem, since by their very nature they are fixed, in effect, to a single CPU. (Naturally the problem does not arise on a system with only a single CPU).
Although in the embodiments specifically described above the scratchpad is limited to a single page or less, it will be appreciated that this is not necessarily the case. Rather, the scratchpad may instead span more than one page. This situation can arise because the scratchpad size is controlled by the maximum offset permitted by the processor instruction set, for example, 12 bits in the embodiments described above, but this may of course vary from one processor to another. In contrast, the page size is normally governed by the MMU, and in fact may be configurable (at least to some extent) by the user, potentially across different processors within the same multiprocessor system. Consequently, the situation may arise where the offset allowed by the processor is greater than the page size, thereby allowing the scratchpad to span multiple pages.
Nevertheless, it is desirable in general to minimise the number of TLB entries locked by the scratchpad (normally to just one). Thus even if the processor permits larger offsets, the scratchpad may correspond to only a subset of this offset address range, rather than the full offset address range. This subset may potentially be chosen to fall outside page minus-one (in page minus-two, for example), although the adoption of page minus-one for the scratchpad (i.e. starting from a negative offset of zero) is generally the most straightforward.
In conclusion, a variety of particular embodiments have been described in detail herein, but it will be appreciated that this is by way of exemplification only. The skilled person will be aware of many further potential modifications and adaptations that fall within the scope of the claimed invention and its equivalents.
|Cited Patent
|Filing date
|Publication date
|Jun 23, 1993
|Jul 16, 1996
|Dsp Semiconductors Ltd.
|Expandable memory for a digital signal processor including mapped first and second memory banks forming a continuous and contiguous address space
|Jun 26, 1997
|May 4, 1999
|Sun Microsystems, Inc.
|Flexible translation storage buffers for virtual address translation
|Jun 28, 1999
|Sep 4, 2001
|Hewlett-Packard Company
|Memory management system and method for relocating memory
|Feb 6, 1997
|Feb 19, 2002
|Microsoft Corporation
|Sharing executable modules between user and kernel threads
|Dec 23, 1999
|Sep 3, 2002
|Bull Sa
|Method for a memory organization by physical zones in a computerized or data processing machine or arrangement and the computerized or data processing machine or arrangement for using the method
|Nov 6, 2000
|Apr 22, 2003
|Fujitsu Limited
|Microprocessor and address translation method for microprocessor
|International search report application No. GB0220661.5 mailed Nov. 28, 2002.
|Solaris(TM) Internals-Core Kernel Architecture, Mauro, et al, Prentice Hall, Sun Microsystems, Inc., Palo Alta, CA, 2001, pp. 31-37, ISBN 0-13-022496-0.
|Citing Patent
|Filing date
|Publication date
|Aug 23, 2005
|Sep 16, 2008
|Qualcomm Incorporated
|TLB lock indicator
|Dec 28, 2006
|Jun 15, 2010
|Scientific Components Corporation
|Database search system using interpolated data with defined resolution
|Mar 29, 2007
|Jul 20, 2010
|Scientific Components Corporation
|Database search system for high frequency electronic components
|Apr 9, 2013
|Scientific Components Corporation
|Mixer harmonics calculator
|Aug 23, 2005
|Mar 1, 2007
|Augsburg Victor R
|TLB lock indicator
|U.S. Classification
|International Classification
|Cooperative Classification
|European Classification
|Mar 24, 2003
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I'm a VERY new user of WP and when I was logged in and on the General Settings, I changed the WordPress address (URL) and the other URL
I guess I thought this would make the new WP-based site go "live" under the new URL(and I was following instructions on how to move my site from exampleURL.com/home to exampleURL.com). Instead, I was immediately logged me out of the control panel and now every time I try log back in to my WP dashboard, I get a nice 404 Page Not Found
I am using ipage as my host.
Now that I cannot access the dashboard, I cannot make modifications to my WP site. Help! ...and thanks for your help!
Any answers please dumb them down just in case ;).


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text: Home > News and Events > Competitions Competitions Welcome to the Club's competitions page, where we celebrate all things camping, by bringing you some truly great prizes! Don't forget, Club members also have access to a variety of exclusive competitions and discounts. Please remember to read the terms and conditions for each competition. Good luck! Chase the sun Enter our exclusive competition for your chance to win a holiday in Spain or Portugal, courtesy of Brittany Ferries and the Club's Travel Service Win an inflatable Standup Paddleboard and paddles Enter our exclusive online competition to win an inflatable standup paddleboard and paddles courtesy of Red Paddle Company Win tickets to the Treasure Houses of England Win admission tickets to the Treasure Houses of England plus tickets to special events No B&E Licence, No Problem WIN A CARAVAN AND CAR COMBINATION WORTH £35,000! Previous Competitions Expired Competitions, Terms and Conditions for reference.


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I have actually been on modified, part-time bedrest for about 2 weeks, but after a lousy appointment yesterday that has been bumped up to almost full-time. I am only allowed to walk when absolutely necessary, though I can still make small meals & work in the office a few hours a day. This is my first baby, and my cervical length has been progressively shortening, down from 2.1cm to 1.7cm with funneling at yesterday's appointment. The doctor is still hopeful as the cervical muscles seem to be holding up well, and with a .4mm margin of error says I may still be at the same point that I was 2 weeks ago. I am supposed to closely watch for symptoms and am having bi-weekly checks & Ffn tests. So stressful!
I have been reading through the board and it sounds like there have been a lot of success stories from strong ladies dealing with bedrest, so I am trying to keep my hopes up. I am 25 weeks, so 12 weeks to go until full term, seems like forever! Thanks for listening. :)


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My wordpress login wont work anymore because i lost my password.
I try to login like usual, by going to marjoleinpeters.com/wp-login.php
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Week 8 standingsPosted Monday, October 15, 2012, at 7:35 AM
MSHSAA District Standings
Class 5
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Note that standings only determine seeds for the district tournaments which start next week. The top two teams in Class 5 get a first-round bye. First-round games can be played Thursday, Oct. 25 or Friday, Oct. 26 with the semifinal game Wednesday, Oct. 31 and the district championship Monday, Nov. 5. The champion advances to the state quarterfinal set for Saturday, Nov. 10.
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Brian Rosener is the keeper of the Semoball Cup which is presented to the school with the most successful season. It is based on a formula that takes into account the combined winning percentage of all sports teams plus bonus points for advancement in postseason play for both teams and individuals. The bonus points are divided by the number of teams a school fields. Rosener has been the sports editor for the Daily American Republic in Poplar Bluff, Mo. since December 2001. He was born and raised in St. Louis, where he attended Lindbergh High School and Webster University. He is married to Jennifer, a Poplar Bluff native, has a son Jack, 15, and a dog named Satchel who stands in for his @semoballBrian photo.
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text:
Stono Ferry
Jun. 28, 2009, 09:15 AM
I made the comment at the NCHJA show this weekend that I would love to see a Derby class for ponies. Imagine my surprise when I looked at a prize list for the Old Dominion show mid July and saw that they are having one! I so wish that show fit into our show schedule this year. Has this been done anywhere before does anyone know? Who else likes the idea? If you don't, why not?


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I wanted this version to be a little more aggressive. So I have included two trades:
No. 30 and No. 77 for No. 21
No. 56 and No. 94 for No. 34
No. 21 - O'dell Beckham, WR, LS, 5'11'', 198, 4.43
We move up to secure Beckham, who will immediately become our top returner and will be a great deep threat at WR.
No. 30 - Traded to Green Bay for No. 21
No. 34 - Jason Verrett, CB, TCU, 5'10'', 189, 4.38
We move up to grab Jason Verrett, who falls out of the first round due to his size. However, his film shows that he is arguably the best corner in the draft and can come in and compete right away as a slot cornerback.
No. 56 - Traded to Washington for No. 34
No. 61 - Cody Latimer, WR, Indiana, 6'3'', 215, 4.45
With our second 2nd round pick, we select Cody Latimer, who our staff seems to really like. He has the size and speed to stretch the field, similar to Josh Gordon
No. 77 - Traded to Green Bay for No. 21
No. 94 - Traded to Washington for No. 34
No. 100 - Keith McGill, CB, Utah, 6'3'', 211, 4.47
With our 3rd round comp pick, we select Keith McGill, who fits the new mold of cornerbacks in the NFL.
No. 129 - David Fales, QB, San Jose St., 6'2'', 212, 4.99
In the 5th round, we select Fales, who Harbaugh really likes, and can come in and compete for the backup QB spot.
No. 242 - Brandon Thomas, G, Clemson, 6'3'', 317, 5.09
Here we select Thomas, who serves as this year's Baalke special. He is a solid guard, who can redshirt for year, and then come in and compete for a backup guard spot and potentially a starting guard spot depending on what happens with Iupati.
No. 243 - Jonathan Dowling, S, Western Kentucky, 6'3'', 190, 4.52
His measurables are too much to pass on at this point. He has great potential and could potential.
No. 245 - Gator Hoskins, FB/TE, Marshall , 6'2'', 253, 4.73
Will be a solid backup to Bruce Miller and can also fill some of the role that Delanie Walker played.


text:
i am using version 2.5.1 well today i wanted a new theme for my site, so i searched "wordpress theme's" then i found one that i wanted,it's real cool! i tried to use it but i couldn't figure out how to use it so i asked a question on wordpress.com saying i found a theme i want to use how do i install it. and someone said to come here and download the wordpress 2.5.1
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and you heckled the families of Newtow and think Newtown is some kind of hoax
i would like to kick you in the balls
Marcy have you learn nothing? Violence is never the answer. No if only you could bring the same rage to the tablewhen it cones to vagina odor maybe you could make progress
Sentiment: Strong Buy


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Email addressVerified
Phone number(▒▒▒) ▒▒▒- ▒▒ 05
Reviewed1 Review
Offline IDDriver License
- School
- Full Sail University (MBA) -- Susquehanna University (Bachelors)
- Work
- Digital Marketing
- Languages
- English, Español
- James's Airbnb Symbol
Hey, I'm James!
Professional in digital marketing and analysis doing independent contracting presently. Just finished up my MBA and decided it was time to brighten my horizon along with a friend of mine. Wanted to travel the world to see what there is to offer in the form of new relations, new experiences, new friends, and possibly even a new career or job. Interests include working out regularly in various aspects including cardio (prefer running outside), free weights, cross fit, etc. Enjoy doing the challenges and cross fit events like mud runs and tough mudder courses. Enjoy many sports but basketball is my favorite to participate in and love to watch a good futbol match. Also have a great love for entertainment and the arts in all aspects especially music, movies, and art exhibitions. My friend and I that are traveling together are very outgoing and easy to get along with both being conversationalists but enjoy getting to know many different types of people. Also enjoy going out to pubs and bars the occasional club but can also just chill at a private party and still have a good time.
We are hoping to find like minded easy going individuals to stay with since we are on a limited budget and want to travel and experience as much as humanly possible and get to hopefully make new friendships overseas. Understanding many people have careers or work we would still appreciate the opportunity to have a guide if possible to show us the "non-tourist" off the map places that may be a once in a lifetime experience. We are both very respectable, trustworthy, trusting, and clean individuals.
Open to any and all inquiries or questions that you may have, so far the people on here have been extremely helpful and open so we can get to know one another and be less of strangers when we show up over there so I encourage you to ask and learn more about me and us than what I may have listed.
Thank you to any and all people looking at my profile and I also encourage anyone looking for a place to stay in Philadelphia to reach out to me as well. Of course I would need to verify with my roommates but as I will be traveling for 6 months there will be an open room in a house in Philadelphia. Have full use of a house with your own loft but a private loft on the first floor with the bedrooms on the 3rd floor and living area on 2nd. Public transportation accessible within walking distance to center city Philadelphia and other suburban areas and walking distance or short cab ride to Main St with many small locally owned pubs, restaurants, shops, and clubs.


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