text:
|Publication number
|Publication type
|Publication date
|Apr 21, 1970
|Filing date
|Mar 28, 1967
|Priority date
|Mar 28, 1967
|Also published as
|Publication number
|Bishop Joseph E
|Original Assignee
|Gen Electric
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (1), Referenced by (18), Classifications (6)
|External Links: USPTO, USPTO Assignment, Espacenet
April 21, 1970 J. E. BISHOP 3,508,228
DIGITAL CODING SCHEME PROVIDING INDICIUM AT CELL BOUNDARIES UNDER PRESCRIBED CIRCUMSTANCES TO FACILITATE SELF-CLOCKING Filed March 28, .1967 4 Sheets-Sheet 1 5 YA/CHEU/V/Z/l 7' 0/1/ 2514 2546 mvzmon. (/dSEPH 6 fi/swop f/mw/ ATTORNEY April 1, 1970 J. E. BISHOP DIGITAL CODING SCHEME PROVIDING INDICIUM AT CELL BOUNDARIES UNDER PRESCRIBED CIRCUMSTANCES T0 FACILITATE SELF-CLOCKING Filed March 28. 1967 4 Sheets-Sheet 2 Aprll 21, 1970 J. E. BISHOP 3,503,228
DIGITAL CODING SCHEME PROVIDING INDICIUM AT CELL BOUNDARIES UNDER PRESCRIBED CIRCUMSTANCES TO FACILITATE SELF-CLOCKING Filed March 28. 1967 4 Sheets-Sheet 3 QRMN 1 k L FIL K P J NR3 LSRSQ wmx wmm L F 4 l| .mKbK
NQLNLH NSSQL h fifil x351 mx i NSQL \kbsu 3mm MMQEQ bk United States Patent O M DIGITAL CODING SCHEME PROVIDING INDICIUM AT CELL BOUNDARIES UNDER PRESCRIBED CIRCUMSTANCES TO FACILI- TATE SELF-CLOCKING Joseph E. Bishop, Scottsdale, Ariz., assignor to General Electric Company, a corporation of New York Filed Mar. 28, 1967, Ser. No. 626,553 Int. Cl. Gllb 5/00, 5/06 US. Cl. 340-174.1 3 Claims ABSTRACT OF THE DISCLOSURE Described herein is a system for recording digital information onto and for reading digital information from a storage medium by the placing of an indicia on a storage medium at particular points within designated areas on the storage medium. By its relative positioning within the specific area, the indicia is representative of specified increments of information.
BACKGROUND OF THE INVENTION The present invention relates generally to the storage and retrieval of information and more particularly to the storage of and retrieval of information in binary form.
The present information is particularly applicable, although it is not so limited, to the storage of information in digital form onto a magnetic storage medium such as those which find common usage in electronic data processing systems.
In any storage and retrieval system, the primary objective is, of course, to accurately record and retrieve the desired information. In modern day electronic data processing systems, however, it is becoming increasingly important to increase the rate at which data may be brought from or sent to an external storage device from the processor of the system which actually performs the computations and manipulations of the data. Additionally, because of the ever increasing volume of data which is required, it is becoming increasingly important to increase the amount of data which can be stored on a given area of storage medium. This latter feature is commonly referred to as the packing density and is normally expressed in bits per inch, that is, the number of binary bits which can be stored with respect to a given length of storage medium.
It is known in the art that digital information can be stored on a medium having a magnetizable surface and that information thus stored may be recovered by providing relative movement between the medium and a transducer which detects polarity changes of discrete areas of the medium surface. The detected pattern of magnetic polarization, or flux reversals as they are commonlv called. taken in conjunction with an additional parameter. for example, time is indicative of the information storcu and retrieved and this pattern is commonly referred to as a code.
Inasmuch as any given storage medium has, taken in conjunction with the equipment used to record thereon and read therefrom, a given packing density factor (i.e., flux transitions can only be placed so close to one another before it becomes impossible to distinguish between the transitions) and inasmuch as these same basic conditions are prevalent with respect to the relative speeds which can be permitted between the storage medium and the transducer, the sole remaining manner in which the amount of data which can be recorded in a given length of storage medium is limited by the pattern of flux reversals or, more simply, the code utilized. Stated in an- 3,598,228 Patented Apr. 21, 1970 other way, the code which provides the least amount of flux reversals for a given amount of information is that which will produce the highest amount of information storage.
OBJECTS It is, therefore, an object of the present invention to provide an improved data information storage and retrieval system.
Another object is to provide means for increasing the amount of information which can be stored and recovered from a storage medium without decreasing the distance between the flux reversals on the storage medium.
Still another object is to provide a method and means for increasing the amount of digital information which can be placed upon a storage medium by providing that the number of recorded indicia is less than the number of units of information desired to be stored.
SUMMARY OF THE INVENTION Briefly stated, the present invention provides the foregoing and other objects by providing a method and apparatus for recording binary data in a manner such that the representation of two binary bits is recorded within a unit of storage media or within what will be hereinafter referred to as a cell. This is accomplished in the illustrated embodiment of the present invention by dividing each cell into four equal parts and by recording a flux transition or reversal at one or more of the division points within the cell in accordance with a two binary bit combination to be recorded. The actual combination of binary bits represented by the fiux transition(s) indicated by the relative position of the transition(s) within the individual cell. The present invention also provides, when desired and under specified conditions, for the insertion of a flux reversal at a particular point within the cell which is not representative of data but which is utilized for synchronization purposes. This reversal may be required under certain circumstances and its availability alleviates the necessity of extremely precise equipment for the practical utilization of applicants invention.
BRIEF DESCRIPTION OF THE DRAWING Further objects and advantages of the invention will become apparent as the following description proceeds and features of novelty which characterize the invention will be pointed out in particularity in the claims annexed to and forming a part of this specification. For a better understanding of the present invention, reference is made to the accompanying drawing in which:
FIG. 1 is a diagram illustrating the manner in which various binary bit configurations are recorded within a cell area of storage medium in accordance with the present invention;
FIG. 2 illustrates the recording of an eight binary bit configuration in four successive storage cells;
FIG. 3 is a schematic logic diagram illustrating a preferred means for implementing the present invention;
FIG. 4 is a timing diagram useful in the understanding of the representation of FIG. 3;
FIG. 5 is a chart illustrating the contents of a register shown in FIG. 3 during the time in which data is being written onto the storage medium; and,
FIG. 6 is a chart illustrating the contents of a register shown in FIG. 3 during the time in which data is being read from the storage medium.
DESCRIPTION OF THE PREFERRED EMBODIMENT The manner in which information is stored as a pattern or is coded onto a recording medium may best be seen with reference to FIG. 1. In that figure, there is shown the representation of a single data cell which corresponds to a specified area of storage medium onto which the pattern is to be stored. It is seen that the cell is divided into four equal parts by the lines T T T T and T collectively referred to as T times. These T times designate the subdivisions of the data cell and it is at these times that, in the case of a magnetic recording, the flux reversals are placed onto the storage medium to represent the various binary bit configurations. In accordance with the provisions of the present code, and as is illustrated in FIG. 1, if a 01 binary =bit configuration is to be written, a transition or flux reversal is placed at the T time, at the M1 point of the cell. A 00 bit configuration is written at T time (mid-point) while a binary bit combination is written as a flux reversal at T point) time. The fourth possible combination of a two bit binary designation is the 11 configuration and it is seen in FIG. 1 that this is designated by a flux reversal at both the T and T times. The remaining depiction of FIG. 1 is a reversal at T time designated synchronization reversal. This transition does not actually represent data in the present code but is instead used for synchronization or clocking purposes.
As will become more apparent as this description proceeds, the present code adapts itself well to self-synchronization or self-clocking in reading data from the storage medium. (By self-clocking it is meant that the flux reversals used to designate data are also used to maintain synchronization within the system.) It will be seen that, in certain bit configurations, the distance between successive flux reversals exceeds a maximum which is, essentially, established by the self-clocking capability of the particular system. As such, in the to be described embodiment, provision is made under these particular circumstances for inserting the flux reversal at the boundary of the cell (T time) in order to properly maintain synchronism and to preclude the necessity of providing extremely stable and hence extremely expensive clocking means. There are three situations in which the synchronization reversal is supplied. These are:
01 followed by 10 01 followed by 00 00 followed by 10 These three situations represent those binary bit configuration combinations which would result in a time greater than that corresponding one cell time without a flux revcrsal. It is to be expressly understood, however, that the synchronization reversal does not form a portion of the recorded data. It should also be mentioned at this time, and as will be more fully explained hereinafter, that in the strictest sense of the word the flux reversal which occurs at T time and which represents the binary bit configuration 00 is also unnecessary. It is, however, utilized in the present implementation in order that if, for example, a long series of zeros were to be written there would be some flux reversals to maintain synchronism within the system Referencing now FIG. 2, there is shown the reversal pattern which would be written onto a magnetic recording surface for the eight binary bit configuration shown which is, reading left to right, 10 01 O0 11. These eight binary bits are respectively allocated one to each of four cells 1 through 4. As is shown in FIG. 2 the 10 binary bit configuration is recorded as a reversal at T time of cell 1 and the 01 binary bit configuration is recorded as a flux reversal at T time of cell 2. The 00 binary bit configuration is written at T time of cell 3 while the 11 bit configuration is written as flux reversals at both T and T time of cell 4.
It will be remembered that previous mention was made of a synchronization reversal. This is illustrated at the boundary (T time) between cell 2 and cell 3. It may be seen from FIG. 2 that were this reversal not present there would exist five T times or cell subdivisions between reversals in recording the four bit combination ()1 00. Inasmuch as this would, in the normal system, represent too great a time to maintain proper synchronization, the synchronization reversal is inserted at the common cell boundary. It is noted that this combination of 01 00 is one of the three situations set forth above.
For a more complete understanding of the invention, reference is made to the logic schematic of FIG. 3 and its accompanying timing diagram, FIG. 4. Before beginning the explanation of these figures, however, it is believed beneficial to briefly explain the terminology to be used. The signals to be described will be referred to as high level or binary l signals and low level or binary 0 signals. The logic illustrated is of conventional nature. That is, an AND-gate is a logic element which provides at its output a high level or binary 1 signal when each of its inputs is a binary 1. An OR-gate is a multiple input logic element which provides a binary 1 or high level output when one or more of its inputs is a binary 1. The small circle which is present at the input side of several of the depicted elements of FIG. 3 indicates the inversion feature. By inversion is meant simply that a binary 1 signal applied thereto appears as a binary 0 signal to the element and conversely a binary 0 signal appears as a binary 1 signal to the element. The term flip-flop as is used in the present description designates a bistable multivibrator with its two stable states being a set state in which there is a binary 1 at its 1 output terminal and a reset state in which there is a binary 0 at its 1 output terminal. Two types of flip-flops are utilized in the present description. The first type of flip-flop has two input terminals, an S (set) terminal, and an R (reset) terminal. In this device, a binary 1 applied to the S terminal will place the flipflop into its set state and a binary I placed at its R terminal will place the flip-flop into its reset state. The other type of flip-flop differs from that just described only with respect to the inclusion of a third input terminal designated T. Flip-flops thus designated are trigger flip-flops and their operation differs from that previously described in that the flip-flop will change its state only upon the application of a binary 1 at the T terminal simultaneously with a binary l to either of the S or R input terminals.
TIMING Specifically referencing now FIG. 3 and its associated timing diagram, FIG. 4, there is shown a storage medium 10 which in the illustrated embodiment is in the form of a disc having a magnetizable coating. The disc is mounted for rotation by a suitable means, not shown, in the counterclockwise direction about a central axis 12. On the disc are a timing track 14 and a data track 16 which are operative to store intelligence in the form of discrete magnetically polarized areas. Associated with the timing track 14 is a suitable transducer 18 which serves to generate electrical signals in response to the motion of the disc 10 and the changing polarity of the discrete areas. The signals thus generated are amplified by an amplifier 20 and applied as one input to an OR- gate 22. Similarly, a transducer 24 associated with the data track 16 provides suitable electrical signals which are amplified by means of an amplifier 26, the output of which is also applied to the OR-gate 22. OR-gate 22, although it is illustrated as a simple OR-gate, will in reality perform a somewhat more complex function, namely that of selectively gating either the signals from the timing track or from the data track, or from both tracks to a pulse shaper 28. However, inasmuch as this function does not forma part of the present invention, it is believed suflicient for the present description to illustrate this operation purely as an OR function.
The output of the pulse shaper 28 which, as its name implies, modifies the signals from the OR-gate 22 to a more desirable square wave shape, is amplified by means of an amplifier 30 whose output is applied to a phase detector 32. The output of the phase detector 32, whose function will be described shortly hereinafter, is supplied to a voltage controlled oscillator 34, the output of which is a signal designated QVFO. The QVFO signal is a square wave signal having a frequency, in the present example, of four times the repetition rate of data cell occurrence (see FIG. 4). The output of the voltage controlled oscillator 34 is supplied via a feedback loop to the phase detector 32. The purpose of the phase detector 32 is to compare the frequency of its input from the amplifier with that from the voltage controlled oscillator 34 and to provide a voltage signal, either positive or negative, representative of the difference in phase between these two signals. This voltage to the voltage controlled oscillator 34 causes the oscillator 34 to vary its output frequency such that the output signal QVFO is in synchronism with the basic frequency of the signals being derived from either the timing or data tracks of the disc 10.
The QVFO signal from the oscillator 34 is applied as an input to a frequency divider 36 whose output is a signal designated QBCK which, as may be seen in FIG. 4, is a positive going pulse which occurs at onehalf the frequency of the QVFO signal. The QBCK Signal from the frequency divider 36 is applied, inter alia, to the first stage of a three stage counter designated hit counter 38. The hit counter 38, which may be of conventional design, furnishes three outputs. The first output from the hit counter 38 is a signal FBCO (FIG. 4) which is a square wave signal having a frequency onequarter of that of the QVFO signal. Further examination of the FBCO signal as shown in FIG. 4 shows that the FBCO signal is designated at various portions by the designations DBCl through DBC6. The other two signals 'which are shown derived from the hit counter 38 and are two signals designated bit count=1 and bit count=6, respectively corresponding to the DBCl and DBC6 portions of the FBCO signal. By way of explanation of the bit counter 38, it was stated that this is a three stage counter and as such in the binary system would normally possess the capability of providing eight distinct counts. However, in the presently being described example, the size of the data character being utilized is a six bit character and therefore the hit counter, along with other components of the system, is designed to accommodate a six binary bit character. As such, the bit counter 38 counts up through six and then resets to the count of one.
The QVFO signal is also supplied to a pulse shaper 40 the output of which is designated as QFUL which, as may be seen in FIG. 4, is a train of narrow positive going pulses occurring at the frequency of the QVFO signal. The QFUL signal is supplied as an input to a two stage counter 44 which is essentially two flip-flops in a counter configuration designed to step through the binary designations of 0 through 3. The one output of the first stage of the counter 44 is a signal designated FCTS which, as may be seen in FIG. 4, is a square wave signal of one-half the frequency of QFUL. The four output terminals of the two stage counter 44 are applied as inputs to four AND-gates 45 through 48 in a manner such that the outputs of these four AND-gates, DCTO, DCTI, DCTZ, and DCT3 (FIG. 4), divide the cell times into four equal parts. The signals thus far described provide the necessary timing for the Writing of information onto or reading the information from the storage medium, in the present example the disc 10.
WRITE OPERATION In the operation of the write cycle of the present invention, information is brought into the system of the present invention to a sequencer and data supply unit 50 via an information bus 52. This information enters the unit 50 prior to the beginning of a write cycle and contains a six binary bit character and a designation that is to be a write operation (a write command). This information would normally come from another component within the total of the data processing system, for example, the data processor. In response to the information brought in via bus 52, the unit 50 supplies the six bit data character via a bus 54 to a six bit A- Register 56 which acts as a temporary holding register. Because this is to be a write operation, the unit 50 supplies three additional signals, a write signal which is supplied to a three input AND-gate 58, a signal designated FSBR which indicates that a shift to the B-Register is necessary (also serving as one input to the AND-gate 58), and a signal QXAB. The QXAB signal effects the transferring of the contents of the A-Register 56 to a B-Register 64. The other input to the AND-gate 58 is the inversion of the DBC6 signal. The output of the AND- gate 58 forms one input to an OR-gate 60 which in turn serves as one of two inputs to an AND-gate 62. The other input to the AND-gate 62 is the QBCK signal. The output of AND-gate 62, QSBR, is applied to the T terminal of the first stage (B of the B-Register 64.
The B-Register 64 is a six bit register comprised of six flip-flops designated respectively, reading right to left, B through B B-Register 64 is the main data register of the system and is a register into which data is shifted serially during the read operation and from which data is shifted serially during the write operation.
Continuing now with the description of the writing operation, the six binary data bits in the A-Register 56 are transferred in parallel to the B-Register 64 via lines 55 with the occurrence of that QSBR signal from AND-gate 62 effected by the QBCK pulse designated count 1 in FIG. 4. At the same time, the previous content of the B flip-flop of the B-Register is transferred to an FWDl flip-flop 66. Flip-fiop 66 is a trigger flip-flop and its T terminal is connected to the output of an AND-gate 68 whose two inputs are the QBCK and the inversion of FBCO. Thus it is seen that each time FBCO is at the low level and there occurs a QBCK signal, AND-gate 68 is enabled thus enabling flip-flop 66. Also at this same time, the content of another flip-flop 70 (FBRP) is transferred to an FWDt) flip-flop 72. The flip-flops 7t) and 72 are each triggered flip-flops with the T terminal of FBRP being connected to the QSBR signal and the T terminal FWDO connected to the output of the AND-gate 68. At the time of this transfer FBRP 70 contained the last binary bit of the character immediately preceding the one which is presently to be written.
FIGURE 5 illustrates the contents of the B-Register as well as the flip-flops FBRP, FWDt) and FWD1 during this and each of the succeeding periods of time. Referencing that figure it is seen that at count 1 of the QBCK signal there occurs a parallel shift of the data in the A- Register to the B-Register to provide the contents therein. (In further explanation of FIG. 5, and additionally FIG. 6 which is to be utilized in the description of the reading operation, the left-hand column specifies that actual flip-flop involved while the several additional columns indicate the contents of the actual flip-flop with respect to the original contents of the B-Register or in the case of FIG. 6, the final contents of the B-Register. The 1s and Os within the parentheses specify the binary value contained in accordance with the specific example being utilized for purposes of explanation. For example, referencing FIG. 5, at DBC3 time of FBCO the B flip-flop will contain the original contents of the B flip-flop, in the present example, a binary 0.)
Carrying through with the first six binary bits of the example initiated with respect to FIG. 2, that of writing a 10 01 00, it is seen (FIG. 5) that at this time the flipflops B B B and B will contain binary Os while flipflops B and B will contain binary ls. The state of the FBRP flip-flop is at this time immaterial while the FWDO' and FWDl flip-flops contain respectively the original B and B designations of the character preceding the one now to be recorded. Upon the assumption that the FWDO and FDWl flip-flops 72 and 66 each contain binary Os, the last binary digits of the preceding character, it is seen that during the occurrence of DCT1 a three input AND- gate 74 will be enabled, inasmuch as the 1 outputs of the two flip-flops 66 and 72 are s, to thus provide a signal to a two input OR-gate 76 the output of which is designated DD13. The DD13 signal forms one input to each of two 2 input OR-gates 78 and 94. The outputs of these two OR-gates form respectively an input to each of two AND-gates 80 and 96. AND-gates 80 and 96 each additionally include an input which is the QFUL signal and also the one and zero outputs, respectively, of a FWDC flip-flop 82. Thus it is seen that each time the DD13 signal is a binary 1 the FWDC flip-flop 82 will, upon the concurrence of the QFUL signal, be caused to change its state or to toggle.
The output of the FWDC flip-flop 82 is supplied to a two input AND-gate 84, the other input of which is the write signal from the sequencer and data supply unit 50. With the enabling of this gate a signal is provided which is supplied to an amplifier 86, the output of which is supplied to the transducer 24 to thereby write a flux transition on the data track 16 of the disc 10. This transition is written at the center of a data cell and represents the binary bit configuration ()0.
Also at this same time, count 2 of the QBCK signal (FIG. 4), the AND-gate 62 was enabled to provide the QSBR signal which was supplied to the B-Register 64 to serially shift that register to the right such that the original content of B is supplied to the FBRP flip-flop 70 and the original content of B is now located in B Similarly, each of the other portions of the B-Register has been shifted to the right by one, such that at this time the contents of the B-Register and the FBRP, FWDO and FWD1 flip-flops are as is illustrated in the DBC2 column of FIG. 5. (The prime designation in this figure indicates the original contents of B and B of the word immediately preceding the word being written.)
Continuing with the example, at this time the FWDO flip-flop 72 and the FWD1 flip-flop 76 contain binary Os to designate the last two digits of the previous character while the B portion of the B-Register and the FBRP flipfiop 70 contain a combination, the first two digits of the new character. This, it will be remembered from the preceding description, is one of the combinations which in the present system requires the writing of a synchronization bit. Referencing again FIG. 3, it is seen that the 1 output terminal of B forms one input of a two input AND-gate 84 the other input of which is the inversion of the 1 output of the FWDO flip-flop 72. Inasmuch as B and FWDO contain a binary 1 and a binary 0 respectively, the output of the AND-gate 84 will be a binary 1. The output of AND gate 84 is applied to an OR-gate 86 the output of which forms one input to a four input OR-gate 88. A second input to AND-gate 88 is the inversion of the 1 output terminal signal of FWD1 flip-flop 66 and, inasmuch as this'flip-flop has been previously stated to contain a binary 0, this is eifectivelya binary 1 supplied to AND- gate 88. The third input to AND-gate 88 is from the 1 output terminal of the FBRP flip-flop 70 which, as has been stated, now contains the original contents of the B portion of the B-Register 64 and is a binary 0. This input to AND-gate 88 when inverted as indicated appears as a binary 1. The fourth input to AND-gate 88 is the WCT3 signal. Thus, at the occurrence of this latter signal AND- gate 88 will be enabled to provide an output to OR-gate 76 which in turn provides the DD13 signal which, as was previously discussed, will upon the occurrence of the QFUL signal occurring at the end of the DCT3 time, toggle the FWDC flip-flop 82 to again write a flux reversal onto the data track of the disc 10. This reversal will occur at a boundary of a cell, as is illustrated in FIG. 4, and is a flux reversal to be utilized for synchronization purposes and not as data.
At the occurrence of the QBCK signal designated count 3 in FIG. 4, the QSBR signal is again generated to serially shift the B-register and to vary the contents of the FBRP,
FWDO, and FWD1 registers 70, 72 and 66 respectively. With this transfer the content of the several flip-flops is as indicated in the DBC3 column of FIG. 5. More specifically, with respect to the pertinent registers for writing, it is seen that the FWD1 flip-flop contains the original content of the B (a binary 1 in the present example) and the FWDO flip-flop contains the original content of B (binary O). The FBRP flip-flop contains the original content of B (a binary 1) and B contains the original content of the B portion of the B-Register (a binary 1). It is noted that the FWDO and FWD1 flip-flops 72 and 66 now contain respectively a binary 0 and a binary 1, the first two bits of the new character to be written. This in the present example is a 10 bit configuration which will be written during DBC4 time at the occurrence of the DCT2 signal. This may be seen in FIG. 3 in that inasmuch as the FWD1 flip-flop 66 contains a binary 1 in its 1 output terminal is high and forms one input to a two input AND- gate 90, the other input of which is the DCT2 signal. The output of the AND-gate 90 is supplied as one input to an OR-gate 92 whose output is designated DD02. The DD02 signal forms one input to each of the two OR-gates 78 and 94 whose outputs effect, as has been previously explained, the changing of state or toggling of the FWDC flip-flop 82. With the toggling of the FWDC flip-flop 82 there is written via gate 84, amplifier 8'6 and transducer 24 a flux transition onto the data track 16, a transition corresponding to the end of DCT2, or, as is shown in FIG. 4, at point within cell 2.
At that QBCK signal designated as count 4 (FIG. 4), the B-Register is again serially shifted and the content of B as it existed prior to the shift is transferred to FBRP (QSBR is also present) and the content of B as it existed prior to the shift is transferred to B However, inasmuch as at this time the PBCO signal is at a high level, AND- gate 68 is not enabled and the contents of FWD1 flipflop 66 and FWD1) flip-flop 72 are not changed. The contents of the several flip-flops as they exist at this time are illustrated in that column of FIG. 5 listed under the DBC4 time. With respect to the binary configuration of the present example, FWD1 contains a binary 1, FWDO a binary 0, FBRP a binary 1, and B a binary 0.
With the occurrence of that QBCK signal designated count 5, the QSBR signal is again generated to serially shift the B-Register 64 and, because the FBCO signal is now a low level signal, the output of AND-gate 68 is a binary 1, as is the' QSBR signal, to thereby allow the modification of the FBRP, FWDO and FWD1 flipflops. The B- Register and the latter three flip-flops now contain that illustrated in FIG. 5, column DBCS. Insofar as their binary content is concerned, it is seen that B B FBRP and FWD1 all contain binary 0s and FWDO contains a binary 1. The FWDO and FWD1 flip-flops 72 and 66 respectively now contain the next two bit configuration 01 which is to be written. Inasmuch as the 1 output of the FWDO flip-flop 72 is a high level and AND-gate 95 will be enabled with the occurrence of the DCTO signal. The output of AND-gate 95 is supplied to the OR-gate 92 to form the DD02 signal which is effective to toggle, at the QFUL pulse occurring at the end of the DCTO pulse during DBCS time, the FWDC flip-flop 82. As before the changing of state of the flip-flop 82 causes a flux transition to be recorded onto the data track 16. Thus, the second two bits of the six bit character which is desired to be written has been accomplished.
With the occurrence now of the QBCK pulse designated count 6, the QSBR signal will again be generated to serially shift the B-Register but once again because of the level of the FBCO signal, the contents of the FWDO and FWD1 flip-flops 72 and 66 are not changed.
Referencing FIG. 5, column DBC6, it is seen that a 01 combination exists in the FWD1 and FWD!) flip-flops and a 00 combination is present in the B and FBRP flip-flops. This is a second of the specified combinations which require the writing of a synchronization flux reversal. A binary 1 is now being maintained in the FDWO flip-flop 72 and a binary is being maintained in the FWDl flip-flop 66. Binary US are being maintained in B and the FBRP flip-flop 70. This situation will, with the occurrence of the DCT3 signal, enable AND-gate -88 to thus enable OR- gate 76 the output of which is the DD13 signal. At the occurrence of the QFUL signal at the end of the DCT3 signal the FWDC flip-flop 82 will again change state to thus write a synchronization flux reversal at the cell boundary on the data track 16.
At the same time this synchronization flux reversal is Written, the second count 1 shown in FIG. 4, the last two bit binary configuration (00) of the character being written, is parallel shifted at the occurrence of the QBCK signal into the FWDO flip-flop 72 and the FWDl flip-flop 66. The present contents of flip-flops are shown in FIG. under that column designated DBC1. Once again, as was previously explained, with binary 0s in FWDO and FWDl flip-flops, AND-gate 74 is enabled with the occurrence of the DCTl signal to generate the DD13 signal and toggle the FWDC flip-flop 82 with the occurrence of that QFUL signal appearing at the end of DCTZ time.
Also at the second count 1, a new six bit character which was brought in via bus 52 to the sequence and data supply unit 50 and placed into the A-Register 56 at a time prior thereto, is parallel shifted from the A-Register 56 to the B-Register 64 in the manner previously described.
The only bit configuration which is possible with two binary bits and which was not considered in our previous example is the 11 combination. Very briefly, it is seen that if this combination exists in the FWDO and FWDl flip-fio-ps, AND-gate 95 will be enabled to provide a DD02 signal to toggle the FWDC flip-flop 82 when the QFUI signal occurs at the end of DCTO time. AND-gate 00 will be enabled to provide the DD02 signal from OR-gate 92 to toggle the FWDC flip-flop 82 when the QFUL signal occurs at the end of DCT2 time. Thus, two flux reversals, one at the Mt and one at the ll points of the cell period will be written for an 11. While only two of the three examples of providing the synchronization flux reversal for various bit combinations of characters have been explained, it is readily ascertainable from FIG. 3 a 01 bit configuration followed by a bit configuration will result in the writing of a synchronization reversal.
While the foregoing description of the write operation has been explained with respect to timing initially derived from a timing track on the storage medium, in this case a disc, it is to be expressly understood that this is an expediency inasmuch as such a track is normally available on a data recording disc. It is not, however, a requirement, of the present invention. If desired, the output of a precision oscillator could be utilized to initiate the generation of the several timing pulses and timing marks.
READ OPERATION The timing signals in the read operation of the present invention are generated in the manner previously described with the exception that, inasmuch as this is a selfclocking system, the signals which initiate the various timing signals are derived from the data track itself through amplifier 26. The use of data signals as opposed to the timing track as was previously described is a function of the OR-gate 22 as was heretofore explained. It should also be explained, before proceeding with the read operation, that because of the logic used in the present illustration the data cell divisions do not fall exactly as is indicated in FIG. 4 which are those for the write operation. Instead, with respect to the DCT times, the data cell divisions are displaced to the left by one time. That is, a 00 bit combination occurs during DCTO and a 10 bit combination is read during DCTl. Similarly, a synchronization reversal occurs during DCT2 time and a 01 bit combination is read during DCT3 time.
With the initiation of a read operation, a read command is brought in via bus 52 to the sequencer and data supply unit 50 which, in response thereto, generates two signals, the FSBR signal and a read signal. These two signals form the two inputs to an AND-gate the output of which forms one input of the OR-gate 60. As before, the output of OR-gate 60 allows AND-gate 62 to be enabled with each occurrence of the QBCK signal to generate the QSBR signal. The read and QBCK signals also form two inputs of a three input AND-gate 102 the output of which is designated QXBA. This signal effects the parallel transfer of the B-Register to the A-Register via lines 55. The third input to the AND-gate 102 is from the 1 output terminal of a BFUL flip-flop 104. The BFUL flip-flop 104 is placed into its set state by the QBCK signal at the end of the signal, bit count=6, from the bit counter 38. The bit count=6 signal corresponds to the DBC6 period of the FBCO signal (FIG. 4). Flip-flop 104 is placed into a reset state :by the QBCK signal at the end of the bit count=1 signal from the bit counter 38. The bit count=l signal corresponds to the DBCI time of the FBCO signal of FIG. 4. Inasmuch as the BFUL flip-flop 104 is a trigger flip-flop having the QBCK signal applied to its trigger terminal, it can only change its state with the concurrence of one of the two above specified signals and the QBCK signal.
Electrical signals indicative of the data recorded on the data track 16 of the disc 10 are supplied from the pulse shaper 28 through a suitable delay means 106 to form one input to each of two AND-gates 108 and 110. These signals are also delivered to the sequencer and data supply unit 50 for purposes of synchronizing that unit. Data from the output of the delay means 106 is designated QONE and will appear as a positive going pulse with each flux reversal which was recorded on the data track 16. The second input to the AND-gate 108 is the DCT3 signal such that upon the concurrence of the DCT3 signal and a pulse on QONE, AND-gate 108 is enabled to place an FRDO flip-flop 112 into its set state. The FRDO flip-flop is placed into its reset state by the logical conjunctive combination of the signals DCTl and QBCK. The second input to the AND-gate is the signal DCT 1. Upon the concurrence of this signal with a positive pulse QONE, AND-gate 110 will be enabled to place into its set state an FlQDl flip-flop 114. The FRDl flip-flop 114 is placed into its reset state by the application to its reset terminal of the conjunctive combination of the DCT3 signal with the QBCK signal.
The 1 output terminal of the FRDO flip-flop 112 is connected to one input of an AND-gate 116 whose output forms one input of an OR-gate 118 the output of which is a signal DRDB. The second input to AND-gate 116 is the signal FBCO such that the output of AND- gate 116 is at a high level when the FRDO flip-flop 112 is in its set state and the FBCO signal is a high level. The 1 output terminal of the FRDI flip-flop 114 forms one input to a two input AND-gate 120, the other input of WhlCh is the inversion of the FBCO signal such that the output of AND-gate 120 is a binary 1 when the FRDI flip-flop is set and the FBCO signal is at a low level. The output of AND-gate 120 forms the second input to OR- gate 118 which, as was previously stated, is the DRDB signal. The DRDB signal is applied to the set terminal of the B flip-flop of the B-Register and its inversion is connected to the reset terminal of that same flip-flop. Thus, when DRDB is a high level signal, and with the occurrence of the QSBR signal, the B flip-flop of the B-Register will be set or will contain a binary 1. Conversely, when the DRDB signal is at a low level and the QSBR pulse occurs, the B flip-flop of the B-Register will be placed lnto its reset state, i.e., containing a binary 0.
The read operation is substantially as follows and will be explained with respect to the character previously recorded which was a 10 01 00 binary configuration. Referencing once again FIGS. 3 and 4, at the occurrence of the QBCK signal designated count 1, the BFUL flipflop 104 is set (the bit count=6 signal being a binary 1 at that time). Also at the count 1 signal, the last bit of the previous character was shifted into B of the B-Register from the DRDB line with the occurrence of QSBR. This, as will be remembered, was a binary and therefore the signal DRDB was a low level signal.
The first positive pulse on QONE occurs, as may be seen in FIG. 4, during DCTl time. The combination of these two signals enables AND-gate 110 to place the FRDI flip-flop 114 into its set state. During this time neither of the AND-gates 116 nor 120 is enabled such that the DRDB signal is at a low level. With the appearance of the count 2 QBCK signal, several events occur. Because the BFUL flip-flop 104 is in the set state at this time, the QXBA signal is generated to transfer the contents of the B-Register 64 to the A-Register 56. The BFUL flip-flop is not reset. Also with the occurrence of the count 2 signal, the QSBR signal is generated and the binary 0 of the DRDB signal is stored into B of the B-Register 64. During the DBC2 when the signal PBCO becomes a binary 0 and with FRDl still set, AND-gate 120 is enabled thus causing the DRDB signal to become a binary 1.
The next QONE pulse occurs during DCT3 time thus enabling AND-gate 108 and placing the FRDO flip-flop 112 into its set state. At this time, however, AND-gate 116 is disabled because of the low value of the FBCO signal. At the count 3 QBCK signal, the B-Register is serially shifted transferring the contents of B into B Because the FBCO signal is now a binary 1. AND-gate 116 is enabled resulting in a high level DRDB signal at the set terminal of the B flip-flop to place' a binary 1 in position 5 of the B-Register 64. The B-Register contents are now as shown in the DBC3 column of FIG. 6. Referencing that figure, it is seen that B contains a binary 1 and B contains a binary 0. (These, respectively, will be the final B and B bits of the B-Register when the full character has been shifted in.) Also with the occurrence of the count 3 QBCK signal which occurs at the end of DCT3 time, the FRDl flip-flop 114 is reset.
During DBCS time the FRDl) flip-flop 112 is set and the signal FBCO is at a high level. Thus, DRDB is a high level signal. At the count 4 QBCK signal, the 13- Register is againn shifting and the high level signal which is present on the DRDB is recorded or placed as a binary 1 into B of the B-Register 64. The contents of the B- Register are now as shown in the DBC4 column of FIG. 6. Also with the occurrence of the count 4 QBCK and the DCTl signals the FRDO' flip-flop 112 is reset. The next pulse occurring on QONE is during DCT2 time of DEC-4 time. This pulse can set neither the FRDO nor the FRDl flip-flops and it is, therefore, ineffective as a data transfer. It will be remembered that this was the transition which was recorded solely for purposes of synchronization maintenance and not at data.
At the occurrence of the count 5 QBCK signal, neither of the flip-flops 112 nor 114 is set and the DRDB signal is at a low level. Therefore, with the generation of the QSBR pulse the contents of the B-Register are shifted to the right and the low level DRDB signal places the B flip-flop of the B-Register into its reset state. At this point in time the B-Register contains what will be ultimately bits 0 to 3 in the B to B flip-flops of the B-Register 64 (see column DBC5 of FIG. 6).
The next QONE pulse occurs in the period of the DCTO signal during DBC5 time. Inasmuch as a pulse occurring during DCTO time cannot set either of the flip-flops 112 or 114, the line DRDB is at a low level such that with the occurrence of the count 6 QBCK pulse the B-Register 64 is shifted to the right and the low level signal on DRDB (a binary O) is placed into the B flip-flop of the B-Register 64. Again referencing FIG. 6, the present status of the B-Register is indicated in the DBC6 column.
With the occurrence of the second count 1 QBCK pulse, and with the presence of the bit count=6 signal applied to the set terminal of the BFUL flip-flop 164, that flip-flop is placed into its set state. Also with the occurrence of the count 1 pulse the B-Register is again shifted to the right and the DRDB line being at a low level places a binary 0 into the B flip-flop. The B-Register now contains a full six bit character and its contents are as indicated in the DBCl' column of FIG. 6. By the comparison of this to the DBCl column of FIG. 5, it is seen that this is the identical character that was written onto the storage medium during the description of the Write cycle.
At the time of the next count 2 pulse of QBCK the QXBA signal is again generated and the contents of the B-Register are transferred in parallel to the A-Register and hence to the sequence and data supply unit for subsequent utilization. Also at this time the first bit of the next character would be shifted into the B-Register as was previously explained.
From the foregoing explanation of the read operation it is seen that only those pulses which occur during the times DCTl and DCT3 are effective to set either the FRDO flip-flop 112 or the FRDI flip-flop 114. From this the conclusion can be drawn that those flux reversals which were written onto the data track for purposes of synchronization and those which represent the 00 bit configuration are actually superfluous to the read operation except insofar as they are necessary to maintain synchronization of the timing system.
From the foregoing it is seen that there has been shown and described a means and method for recording binary data in a manner which allows a greater amount of data to be recorded with a relative few number of pulses. It should be explained that while the transition and 00 pulses are not necessary to the reading operation, they are not harmful in decreasing the time between fiux reversals in that their occurrence does not reduce the minimum spacing between reversals in recording without these pulses.
While the principles of the invention have now been made clear in an illustrative embodiment, there will be immediately obvious to those skilled in the art many modifications of the structure, arrangement, proportions, the elements, materials, and components, used in the practice of the invention, and otherwise, which are particularly adapted for a specific environment and operating requirements without departing from these principles. The appended claims are therefore intended to cover and embrace any such modifications, within the limits only of the true spirit and scope of the invention.
What is claimed is:
1. An information storage and retrieval system comprising a magnetic storage medium capable of assuming and maintaining magnetically polarized regions within localized areas of said medium; transducer means responsive to a waveform of electrical signals for recording a series of polarization changes on said medium within sequentially occuring time intervals; means for associating a two binary bit configuration with each of said time intervals; and means for generating said waveform including first means for producing a first electrical signal at a first point in time Within one of said time intervals in response to a first two binary bit configuration, second means for producing a second electrical signal at a second point in time within one of said time intervals in response to a second two binary bit configuration, said first and second means producing said first and said second signals at said first and second points in time within one of said time intervals in response to a third two binary bit configuration and third means for producing a third electrical signal at a third point in time within one of said time intervals in response to a fourth two binary bit configuration.
2. An information storage and retrieval system comprising a magnetic storage medium capable of assuming and maintaining magnetically polarized regions within localized areas of said medium; transducer means responsive to a waveform of electrical signals for recording a series of polarization changes on said medium within sequentially occurring time intervals; means for associating a two binary bit configuration with each of said time intervals; and means for generating said wave form including first means for producing a first electrical signal at a first point in time Within one of said time intervals in response to a binary bit configuration of 01, second means for producing a second electrical signal at a second point in time within one of said time intervals in response to a binary bit configuration of 10, said first and second means producing said first and said second signals at said first and second points in time with one of said time intervals in response to a binary bit configuration of 11, and third means for producing a third electrical signal at a third point in time within one of 14 said time intervals in response to a binary bit configuration of 00.
3. An information storage and retrieval system in accordance with claim 2 which further includes additional means responsive to two successive two binary bit configurations for producing a fourth electrical signal at a fourth point in time within one of said time intervals in response to predetermined combinations of two successive two binary bit configurations.
References Cited UNITED STATES PATENTS 3,374,475 3/1968 Gab'or 340-174.1
BERNARD KONICK, Primary Examiner W. F. WHITE, Assistant Examiner U.S. Cl. X.R. 34674
|Cited Patent
|Filing date
|Publication date
|May 24, 1965
|Mar 19, 1968
|Potter Instrument Co Inc
|High density recording system
|Citing Patent
|Filing date
|Publication date
|Aug 6, 1969
|Dec 28, 1971
|Pacific Micronetics Inc
|System for reproducibly storing digital data
|Oct 16, 1970
|Sep 5, 1972
|Honeywell Inc
|Voltage controlled oscillator with constrained period of frequency change
|Dec 1, 1970
|Sep 12, 1972
|Gen Motors Corp
|Method and apparatus for decoding digital information
|Dec 18, 1969
|Jan 23, 1973
|Gen Electric
|High density data recording and error tolerant data reproducing system
|Jan 25, 1971
|Mar 13, 1973
|Redactron Corp
|Speed insensitive reading and writing apparatus for digital information
|Jul 2, 1971
|May 29, 1973
|Honeywell Inc
|High density digital recording
|Jul 14, 1972
|Jul 9, 1974
|Centronics Data Computer
|Serial to parallel converter for binary signals of two different pulse widths
|Jan 2, 1973
|Aug 6, 1974
|Gte Information Syst Inc
|Double density to nrz code converter
|Apr 13, 1972
|Jun 3, 1975
|Century Data Systems Inc A Div
|Tape speed compensation system
|Jan 29, 1975
|Jan 11, 1977
|De Staat Der Nederlanden, Ten Deze Vertegenwoordigd Door De Directeur-Generaal Der Posterijen, Telegrafie En Telefonie
|System for the transfer of two states by multiple scanning
|Jul 23, 1975
|Jun 28, 1977
|Standard Oil Company (Indiana)
|Speed-tolerant digital decoding system
|Dec 27, 1974
|Jun 28, 1977
|Digital Development Corporation
|Method and system for encoding and decoding digital data
|May 15, 1981
|Feb 8, 1983
|Racal Recorders Ltd.
|Data encoding and/or decoding
|Jul 31, 2003
|Nov 14, 2006
|3M Innovative Properties Company
|Tearable elastic composite article and method of manufacture
|Jul 20, 2010
|3M Innovative Properties Company
|Tearable elastic composite article and method of manufacture
|Jul 31, 2003
|Feb 3, 2005
|3M Innovative Properties Company
|Tearable elastic composite article and method of manufacture
|Oct 30, 2006
|Feb 22, 2007
|3M Innovative Properties Company
|Tearable elastic composite article and method of manufacture
|May 17, 2012
|Nov 22, 2012
|3M Innovative Properties Company
|Tearable elastic composite articles
|U.S. Classification
|International Classification
|Cooperative Classification
|European Classification


text:
Secrets of Amazon's Prime Day success
Amazon not only sold $2.5 billion worth of goods, it introduced Prime members to new services. How should rivals compete in 2017?
Secrets of Amazon's Prime Day success
Amazon not only sold $2.5 billion worth of goods, it introduced Prime members to new services. How should rivals compete in 2017?
What PayPal and Visa's partnership means
The deal may boost PayPal's presence in physical stores.
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A Javelin report forecasts the continuing rise of alternative payments.
Posted 12/17/2010Thad Rueter1 comments
The new fees would cap the fees at 12 cents per transaction, representing a big saving for e-retailers.
Posted 12/16/2010Thad RueterPost a comment
Web retail sales increased 11.4% in early November, MasterCard says.
Posted 11/22/2010Don DavisPost a comment
Javelin finds that 54% of consumers have used PayPal and other methods for online purchases.
Posted 10/21/2010Thad RueterPost a comment
Auriemma survey shows the eBay payment service moves past debit cards.
Posted 08/17/2010Thad RueterPost a comment
The platform enables merchants to offer their own branded debit cards.
Posted 08/03/2010
PaySecure service gives consumers the option to use PIN debit on the Internet.
Posted 08/03/2010
U.S. law could lower costs for online retailers that accept debit cards.
Posted 07/08/2010Thad RueterPost a comment
The fees that merchants pay to accept debit cards, including for online retail transactions, could decline under a measure the U.S. Senate passed yesterday as part of a bank-reform bill. That could be important for online retailers, as debit cards are used in more than a quarter of web purchases, according to research and consulting firm Javelin Strategy & Research.
Posted 05/14/2010Zak StamborPost a comment
Leading Low-Cost Airline to add PaySecure to its Suite of Payment Offerings in 2010 ATLANTA, GA, March 31, 2010 – Sun Country Airlines, recently named in the "Top Ten Domestic Airlines" by Travel+Leisure magazine for the fourth year in a row, has partnered with Acculynk to bring the security of PIN debit to its online customers. PaySecure, the first software-only service for PIN debit payments on the Internet, will become a standard payment...
Posted 04/06/2010

subset: commoncrawl


text:
Livingston High School Livingston, TX Alumni
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- Send messages to alumni
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Click on the Yearbooks below to view a copy Online at Classmates.com®. If you don't see your class's yearbook, check out our yearbook page.
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- Class of 1956 June Hardy
- Class of 2004 Craig Wright
- Class of 2007 Charles Cates
- Class of 2008 Jesse McClain
- Class of 2011 Amber Gana
- Class of 1980 James Griffin
- Class of 1965 Carolyn Callahan
- Class of 2008 Rachal Manis
- Eduardo Oliveira
- Class of 1982 Renee Black
- Lula Coyle
- Class of 1983 Lianne Russell
- Class of 1992 Christy Partin
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Even if alumni from Livingston High School have moved away from Livingston, Texas, they can use this site to find and contact high school friends. While you are reminiscing about the times you spent in high school at Livingston High School, you should also check out alumni photos, yearbook listings and share any reunion info if possible. For former Livingston High students from TX, you can view the class reunion information that has been posted by other site visitors. In addition, we encourage you to post your profile in the alumni directory, share information about the school activities you were involved with and reconnect with Livingston High School alumni.


text: Woman Fatally Struck by Subway Train in Brooklyn After Fainting on the PlatformNeetzan Zimmerman2/12/13 12:06pmFiled to: MtaSubwayBrooklynDeathAccident141EditInvite manuallyPromoteDismissUndismissHideShare to KinjaToggle Conversation toolsGo to permalink The MTA is reporting this morning that a female subway patron was struck and killed by a southbound No. 3 train after falling on the tracks.It is believed the woman fainted prior to the incident, which took place this morning at the Crown Heights – Utica Avenue station. No further details have been released. Advertisement According to NBC New York, there were 55 subway-train-related deaths in 2012 — eight more than in the previous year. The MTA has stepped up its efforts to keep people away from the platform's edge, going so far as to consider putting up barriers to prevent people from falling over. Sponsored Other initiatives include testing alarms that sound when something is on the tracks, and reducing station-approach speeds to 10 mph. [photo via Wikipedia]Reply141 repliesLeave a reply


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You are already dreaming of the day your little tike will play ball. Until then, these Baseball Birth Announcements can show off your future slugger. This collection of designs is full of baseball-inspired motifs from balls and bats to the iconic home plate. The perfect choice for a baseball-loving family!


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I have a sprint s3 and I just rooted my phone and it was done correct. my question is do I need to download the roms to my computer first then copy to my phone.I have been trying from my phone. it downloads but can't open. help please. thanks
Installing a custom ROM implies a number of steps:
Note: Please BACKUP your data before doing anything! Better safe than sorry.
This article explains in detail each step. You can also find a lot of info about flashing, custom ROMs and all sort of things on XDA developers forums.
Make sure you have a proper recovery like CWM or TWRP
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Wipe date and do a factory reset
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Flash your ROM
Wipe date and factory reset, reboot and $$profit$$


text:
Hornets hit 10,000 season-ticket mark
Published: Thursday, December 8, 2011 at 10:00 a.m.
Last Modified: Thursday, December 8, 2011 at 10:44 a.m.
NEW ORLEANS — The New Orleans Hornets have sold 10,000 season tickets, a threshold they see as important to luring new ownership that is committed to keeping the NBA club in Louisiana.
Hornets president Hugh Weber said the strong support from fans, which came despite the NBA lockout, should not only inspire confidence in prospective new owners but also in state officials who are discussing a possible extension to the team's New Orleans Arena lease, which expires in 2014.
Weber said Hornets executives now believe the sale of the team by mid-January or February is "very achievable. "
Since December of 2010, the team has been owned by the NBA, which bought it from club founder George Shinn. League commissioner David Stern then appointed New Orleans native and accomplished sports attorney Jac Sperling to prepare the club for sale to a new owner, preferably one who would continue to operate the team in New Orleans.
Sperling and Weber have since set about building the club's ticket and sponsorship base with the aim of making the team more attractive to local buyers.
The Hornets have scheduled an announcement about ticket sales for the upcoming season on Thursday.
"It's really kind of a turning point," Weber said. "It's no longer the Hornets, kind of hat in hand, saying, please can you buy tickets because we want to stay here. It's really about, this is a brand that is on the rise and there's going to be a lot of demand and full houses."
The NBA season is slated to open on Christmas Day, nearly two months later than usual because of a work-stoppage that stemmed from protracted and sometimes contentious negotiations over a new labor agreement between the league and its players.
The Hornets' first game is at Phoenix on Dec. 26, with their home opener two nights later against Boston.
However, the Hornets sold most of their season tickets while doubt persisted over whether there would be a season at all. The club embarked on an ambitious sales campaign that enlisted longtime season-ticket holders and business partners to host social gatherings in their homes with potential season-ticket buyers.
At these gatherings, Hornets representatives emphasized the team's role in the city's recovery from Hurricane Katrina, and how being an NBA city can help New Orleans keep a higher national profile that could help with luring business investment in the region.
"What was unique about our situation is, this wasn't about basketball or specific players or faces of players. It was about kind of a community treasure that everybody felt was important to the path that New Orleans is on. And that saving this asset and being a part of something positive happening, that was why people were agreeing to host these parties. That was why people were agreeing to buy tickets.
"We never talked about pick-and-roll stuff. We talked about what we do in the community and what the team means," Weber continued. "I'm not sure this would have worked in any other market the way it did because our brand is more associated with the community and promoting the city as opposed to just basketball."
Weber said the sale of the team and work on a long-term lease should "dovetail together."
"It's important to the state that we deliver an owner, and it's important to an owner that they understand what the terms of a new lease would look like," Weber said. "In terms of which one is officially announced or consummated, I wouldn't be surprised if they could be simultaneous."
Reader comments posted to this article may be published in our print edition. All rights reserved. This copyrighted material may not be re-published without permission. Links are encouraged.


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Meehan: Area golfers making the most of iffy spring weather
As January turned into February, I pictured area golf pros – area golfers, for that matter – consulting the Farmers' Almanac and scouring the Internet for long-range forecasts.
Spring golf is always iffy in the Inland Northwest given the fickle weather, but Mother Nature seems to be in a little better mood than previous years, even though it's 48 degrees and raining as I tap away on the computer.
"You just come to realize you don't count on a good spring, you don't depend on it," Hangman Valley pro Steve Nelke said. "Most of your revenue is from June 1st on but if you have good springs and it happens to fall on weekend days it's great. You just can't lose the weekends."
Thanks to generally favorable winter and spring weather, most area courses are in excellent early-season condition and pros reported an increase in business. A few sunny weeks in March helped on both counts.
"We got a kick-start with that nice weather and the course is in phenomenal shape," said Patti Marquis, pro at The Links in Post Falls. "It's a little hard to tell, we opened March 1 and sometimes we don't open until the end of March, but our play is way up."
"March was up. April has been a little flat," said Nelke, noting Hangman Valley opened March 15. "It seems to me if it's nice on the weekends people will spend one day recovering their yard back from the wilderness and one day getting out to play (golf)."
Circling Raven in Worley opened later, on April 5, and the weather hasn't been kind.
"Last Saturday we had snow for parts of the day," director of golf Tom Davidson said. "For us, it's a little bit of a drive so it better be really nice for people to come out and play. We're significantly behind where we were last year at this time.
"For a couple weeks in March I'm sure some of the other public courses were killing it, but we weren't open yet."
The plus was that when Circling Raven opened it was in great shape.
"The warm weather through March really helped out a lot," Davidson said. "We didn't have a ton of snow cover through winter."
But they did have a little too much hoof cover as a herd of 100 elk roamed the course.
"We had a little damage but nothing we can't fix. It'll heal up pretty quickly," Davidson said. "They spent at least three weeks in January and February. It's usually a smaller herd of 20 or 30 for a shorter period of time but these guys made a mess. Our crew is always on top of those things."
Hangman Valley opened on all permanent greens, a rarity, and the irrigation system was activated earlier than usual.
"The worst thing you can do is open in mediocre or bad shape and then that kind of stays with you in the spring," Nelke said. "That kind of stays with you by word of mouth (from customers). In talking to some superintendents, we didn't have that normal near zero (degree) stretch with wind that sucks all the moisture out of the course. It seemed to be a little more manageable winter."
At The Links, greens are running 10.5-11.5 on the Stimpmeter, according to Marquis. The course doesn't have to deal with several of the typical spring headaches. Trees are scarce so there are no broken branches to clean up.
The Links is located above the aquifer on the Rathdrum prairie "so it drains like no course I've ever seen," Marquis said. "We have monsoons and can still drive carts anywhere."
But there was no escaping the rugged weather conditions that greeted golfers at the Pro-Am last Monday at The Links, another reminder that spring can still feel a lot like winter.
"It was so cold and windy," Marquis said. "It was like playing golf in Antarctica. We were just missing the penguins."
Sunday Spin: Rock 'n' roll here to stay on campaign trail
I know it's only rock 'n' roll, but I like it when politicians decide to use familiar tunes as a sound track to their events, which might mean different things ...
Complete interview with Gabe Marks
Our most recent story about prolific Washington State wide receiver Gabe Marks tells the story of a particularly insightful interview we had last spring. That story, "Gabe Marks is a ...
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Lexington High School Lexington, TN Alumni
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Alumni from LHS can use this site to get in touch with old friends from their high school in TN. Lexington High School alumni can relive their experiences from high school by sharing memories and pictures, reconnecting with those alumni listed, and more. If you are a former student of Lexington High in Lexington, Tennessee, register now to add your name.
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The LET/LVT Series of compact electronic transformers for low voltage landscape lighting can be installed indoors or outdoors and includes various options, such as a dimming loop, potentiometer, and grounding wire.
Models are available in an operational range from 10W to 300W. The line is cool running for improved efficiency and reliability – an auto heat regulator dims output voltage if the system overheats, which is more dependable than a system that terminates the light completely.
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Hotels near johrei society - Bristol
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Hover above the icons to see hotel photo and details.
Click the hotel to go to the main hotel page.
Clifton Hotel Bristol2 star hotel
The Washington Hotel Bristol2 star hotel
The Regency Bristol Hotel3 star hotel
- Beaufort Road, Clifton, Bristol, ,Bristol Bs8 2Ae, Bristol, United Kingdom (Map)
Channings Hotel By Good Night Inns Bristol3 star hotel
Alderman Apartments Bristol4 star hotel
Homestay Bristol - Hostel2 star hotel
Best Western Victoria Square Hotel Bristol3 star hotel
Cbh Berkeley Square Hotel Bristol3 star hotel
Berkeley Square Classic Hotel . Bristol3 star hotel
Rodney Hotel Bristol3 star hotel
- 1 Dighton Street, Bristol, United Kingdom, BS2 8NY (Map)
Du Vin Bristol Hotel4 star hotel
Hotel Du Vin Bristol4 star hotel
Avon Gorge Hotel Bristol3 star hotel
Travelodge Bristol Central3 star hotel
Radisson Blu Hotel Bristol4 star hotel
Mercure Bristol Grand Hotel4 star hotel
Premier Inn Bristol City Centre4 star hotel
- Central Quay South, Bristol, United Kingdom, BS1 4AW (Map)
Rock N Bowl Hostel Bristol2 star hotel
Marriott Bristol Royal Hotel4 star hotel1.4 km from johrei society
Located in the heart of the city, this fabulous Victorian-style four-star property is few steps away from major cultural landmarks and historic waterfront of the city. Built in Victorian style, the hotel houses superb wellness and spa center and indoor swimming pool. More detailsFrom£132per nightBook Now
Marsh House Serviced Apartments Bristol4 star hotel
- Marsh Street 1, Bristol, United Kingdom, BS1 4AQ (Map)
Holiday Inn City Centre Bristol4 star hotel
Hotels near Bristol
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Top hotels in Bristol
- Mercure Bristol North The Grange Hotel
- Doubletree By Hilton Hotel Bristol City Centre
- Future Inn Bristol
- The Warwick Arms Hotel Bristol
- Doubletree By Hilton Cadbury House Hotel Bristol
- Hilton Bristol Hotel
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- Mercure Bristol Brigstow Hotel
- Mercure Bristol Holland House Hotel And Spa
- Novotel Bristol Centre
- Aztec Hotel Bristol
- Holiday Inn Bristol-Filton
- The Bristol Hotel
- Marriott Bristol City Centre Hotel
- Bridge Inn Yatton Bristol
- Cross Hands Hotel Old Sodbury Bristol
- Best Western Henbury Lodge Hotel Bristol
- Winford Manor Bristol Airport Hotel
- Days Inn Bristol M5
- Hampton By Hilton Bristol City Hotel
- Commodore Hotel Bristol
- Arnos Manor Hotel Bristol
- Holiday Inn Express Bristol City Centre
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Why not sell it and get some cash in your hands? A new site called CoupFlip buys unwanted deals.
"You don't just list it and wait around to see if somebody will take it, because these things expire," said CoupFlip CEO Phil McDonell. "You can go on and in less than 30 seconds upload it, sell it and be done with it."
Payment is made through PayPal in 10 business days. This gives the site time to validate the voucher. So how much can you expect to get?
"If your deal has a pretty good expiration time on it and also was a popular deal to being with, we'll generally pay up to 70 percent," McDonnell told me.
Of course, CoupFlip doesn't make any money unless it resells these vouchers. So it offers deals on these deals.
Most of the coupons are 10 percent less than what they sold for, but as the expiration date gets closer, the discounts get bigger - up to 98 percent off face price.
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More Info:
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Poll director: winter Virginia poll results mirror current partisan divide over felons' rights executive action
The partisan divide over Governor McAuliffe's recent executive action restoring felons' rights comes as no surprise to the Director of Polling at Christopher Newport University. The question now is what do Virginians think of the way it was accomplished. More from WLNI's Evan Jones.
Statewide survey shows teen tobacco, hard drug use declining
A new statewide survey of Virginia middle and high school students shows significant decreases in those practicing risky behaviors — especially smoking. The survey results show smoking among Virginia high school students is down to just about 8%, and student use of harder drugs like heroin cocaine and meth is down significantly. WLNI's Evan Jones has the story.
McAuliffe veto stands; bill designed to keep localities from removing Confederate monuments is killed
Legislation that would have prevented local governments from removing Confederate monuments did not survive Governor McAuliffe's veto. It was one of the many vetoes that were upheld yesterday in Richmond. WFIR's Evan Jones has more:
Arsonists believed responsible for several large wildfires in SW counties
Wildfires are creating some big problems right in parts of southwest Virginia — and fire officials say arrests appear likely for some of them. One fire got close enough to Hurley High School in Buchanan County to keep it closed yesterday as a precaution. WLNI's Evan Jones has more:
Court overturns Virginia school's transgender bathroom rule
RICHMOND, Va. (AP) _ A federal appeals court has overturned a policy barring a transgender student from using the boys' restrooms at his Virginia high school. A three-judge panel of the 4th U.S. Circuit Court of Appeals ruled Tuesday that the Gloucester County School Board policy is discriminatory. A federal judge had rejected Gloucester High School student Gavin Grimm's sex discrimination claim. The appeals court's ruling establishes legal precedent in the five states in the 4th Circuit, including North Carolina, which faces a lawsuit challenging a new state law requiring transgender public school students to use the bathroom that corresponds to the sex on their birth certificate. Grimm was born female but identifies as male. After complaints, the school board adopted a policy requiring students to use public restrooms corresponding with their biological gender.
As SOL testing nears, state expands use of "computer adaptive testing"
SOL testing for Reading, Mathematics and Science, begins later this month, and this year, the Virginia Department of Education has expanded its use of computer adaptive testing. Using this method is less time consuming for students because it allows educators to streamline the tests. More from WLNI's Denise Allen Membreno.
UPDATE: Teen charged in Younger Park shooting; victims in stable condition
UPDATE: Lynchburg Police say a 16-year-old boy is facing charges after two people were shot yesterday at Younger Park in Lynchburg. The victims are 19-year-old Tyrik Barbour and a 16-year-old boy, both of Lynchburg. Officials say they are both in stable condition.
Two people were shot today at Younger Park in Lynchburg, and police tell us they hope to make a quick arrest. Sources tell us one of the victims gave them the shooter's name, but we have no confirmation yet from city police. The shootings rattled some park neighbors like Justin Peters, who lives right across the street from Younger Park and spoke with reporter Andre Whitehead:
Police did not immediately release the victims' names or conditions.
(Continue reading for the initial Lynchburg Police news release.)
Kaine: president needs to propose IS battle plan, Senate needs to debate and vote on it
Senator Tim Kaine is continuing his campaign for a Senate debate and vote on authorizing military action against the Islamic State. Kaine says without a debate and vote on fighting IS, there is no clear message to Americans or anyone else as to what exactly our mission is — or the means intended to carry it out. WLNI's Evan Jones has the story:
Anheuser-Busch to purchase Devils Backbone Brewing
Anheuser-Busch is purchasing Devils Backbone Brewing Company, the fast-growing craft brewer based in Nelson County. Devils Backbone is best known for its Vienna Lager, and officials there say they will retain a high level of autonomy. It is the latest of several such craft brewer purchases for Anheuser–Busch.
(Continue reading to see the full news release.)
Fruit growers face long nights, big worries when April freeze warnings are in effect
Many area fruit growers were expecting little, if any sleep overnight, monitoring temperatures and wind speeds in efforts to protect their crops. More from WLNI's Evan Jones.


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Dr. Susan Weinschenk is a behavioral psychologist with over 30 years of experience applying psychology to the workplace. She is the author of 100 Things Every Presenter Needs To Know About People, 100 Things Every Designer Needs To Know About People, andNeuro Web Design: What makes them click?Susan consults with Fortune 1000 companies and runs a popular blog.
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Inside the world's biggest Maker Faire
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Welcome to Digital Industry Insider, our collaboration with GE to cover the 'Industrial Internet'
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Order with Free Shipping
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Installation coupon will be emailed after order has been confirmed.
This handy little ruler from the Gear Squad has been made available to help you properly identify your drive shaft u-joints.
Simply place the ruler's notched end against the tab end of your yoke, see where the ruler falls against the opposite tab, and that will identify your yoke.
To measure your u-joint, place the tab end against the u-joint cup squarely and view size at opposite cup. Due to age and wear, the caps may not be exactly on the line but very close.
Please refer to the u-joint tech sheet in the Gear Squad Tech Center more information.
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Steering Column Turn Signal Cancel Cam
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Direct OE replacement Jeep parts and accessories built to the original specifications by Omix-ADA. Limited five year manufacturer's warranty.
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Horn contact assembly not sold
By gs12
from Dallas, Texas
Best Uses
Comments about Omix-Ada Steering Column Turn Signal Cancel Cam:
This cam does not accept the standard push and turn horn contact assembly found in auto parts stores and online. The correct assembly is also not sold on this site. If you have an old one that I would assume to be a compression style spring/plunger retainer, then this may work. There are no cutouts for an insert and twist retainer.
Bottom Line No, I would not recommend this to a friend
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Perfect Fit
By John
from SW, Okla.
This unit works great in my column. I don't know where the coulmn came from but it is a GM tilt column. It now resides in my 1975 CJ5.
Bottom Line Yes, I would recommend this to a friend
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text: About ARINC: ARINC Incorporated is a world leader in transportation communications and systems engineering. The company develops and operates communications and information processing systems and provides systems engineering and integration solutions to eight key industries: airports, aviation, aerospace and defense, government, healthcare, networks, – more... security, and transportation. Founded to provide reliable and efficient radio communications for the airlines, ARINC is headquartered in Annapolis, Maryland, and maintains regional offices in London and Singapore, with over 3,200 employees worldwide. ARINCE is ISO 9001:2000 certified. – less–ZoomInfo


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I have stayed here several times and I have always found it to be a very comfortable and convenient hotel within easy short walking distance to everything in Gettysburg. It is run more like a bed & breakfast as opposed to a hotel. That's a good thing. With an awesome breakfast included and free parking, the Inn of 1863 is my first choice for visiting Gettysburg.
- Official Description (provided by the hotel):
- 5 story Colonial style Hotel with exterior entrances.110 rooms equipped with hair dryers,irons and ironing boards,coffee makers,Free wired hi-speed internet service. Free breakfast for registered Hotel guests. Within walking distance to most major attractions. Gettysburg National Military Park Visitors Center-1 mile. Gettysburg Battlefield Bus Tour Center-next door. Ghost Walk Tours near by. Located 5 blocks from downtown. ... more less
- Reservation Options:
- TripAdvisor is proud to partner with Hotels.com, Booking.com, Expedia, Orbitz, TripOnline SA, Hotwire, Priceline, Odigeo and Travelocity so you can book your 1863 Inn of Gettysburg reservations with confidence. We help millions of travelers each month to find the perfect hotel for both vacation and business trips, always with the best discounts and special offers.
- Also Known As:
- 1863 Inn Of Gettysburg Hotel Gettysburg
- Holiday Inn Gettysburg
- Gettysburg Holiday Inn


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Community Ties
Roseville, CA, Leaders Tour Largest Rail Yard in the West
Posted April 19, 2013 10:42 AM CDT
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Liisa Stark discusses Roseville Yard operations inside the terminal.
More than 20 officials from the City of Roseville, Calif., got a special tour of UP's J.R. Davis Yard last week, courtesy of UP Public Affairs Director Liisa Stark.
Working to help Roseville city leadership become more familiar with the 6-mile, 950-acre facility, Stark explained yard operations and how the create value for UP customers. She also outlined the role Davis Yard has played in UP's efforts to test and use new technology to reduce locomotive emissions.
The mayor, city council representatives, Roseville Police, emergency responders and others attended the tour and were surprised to learn 98 percent of all rail traffic in the region flows through J.R. Davis Yard – the largest rail yard west of the Rockies.
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Dec. 23, 2015 11:44 AM CDT
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Dec. 9, 2015 10:21 AM CDT
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Dec. 4, 2015 11:05 AM CDT
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Nov. 23, 2015 03:58 AM CDT
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Nov. 13, 2015 11:00 AM CDT
UP Steam Update: Making Parts for a Living Legend
Nov. 12, 2015 02:38 PM CDT
New Railport in Kinney County, Texas, Delivers Cerveza
Nov. 10, 2015 01:30 PM CDT
The Feel-Good Story that Keeps Giving
Oct. 30, 2015 03:40 PM CDT


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Airstream Jets is a company distinguished by an innovative approach to private jet travel. ASJ was founded by highly experienced corporate jet executives, aircrMore
$1 mil. - $5 mil.in Revenue
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(561) 826-7056(561) 826-7191Fax
Enterprise_Iteration-NT.1545[03] SEIDXWK-31


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Displaying the first of 4 photos of Hyde.
Historic maps of Hyde and the local area, hand-drawn by Ordnance Survey cartographers and Samuel Lewis.
Browse 24 photo books on Hyde and the surrounding area.
I was born in milk street Hyde in the 40's went to Greenfield Street Juniors then onto Leigh street Secondary, I so remember Hetts sweet shop the ABC minors at the Stannies, the market, woolworths, the house that jack built, the May queen and whit walks when we all got dressed up, even with little money, we looked our ...Read full memory
Does anyone remember Cheethams hat works that later became Automaster? Do you know anyone who worked there?
I .have so many happy memories of Meschia's I spent every week there, my sister Pat and I used to take the big wash on a Saturday morning to the launderette opposite, and while waiting for the wash we used to sneak in for milk shake. I also did my courting there with my husband Tom Openshaw we have been together since I was 15 and he was ...Read full memory


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Jamie Oliver's Recipes
De Zolmo
Abra o iTunes para comprar e baixar apps.
Hi guys, I'm really excited to welcome you to the shiny new version of my Recipes App now optimized for all the latest devices. We've taken all your feedback on our previous version on board, and put loads of work into making the app as beautiful, slick and easy to navigate as possible.
A massive thank you to the millions of you who've downloaded and used my app for a while now – we've pulled the same great recipes and videos through into the new app, but we've added a cleverer, more powerful search tool, useful dietary tags and cooking times for each recipe to make it even easier to find exactly what you're looking for. We'll also be updating the app more regularly, with new, beautiful recipes every week, plus super-useful how-to guides to help you master those trickier skills and become a real kitchen ninja.
I really hope you like it, and please let us know what you think!
Big love,
Jamie O xxx
► Subscription to Jamie's Recipes
Subscribe to access the largest ever collection of exclusive step-by-step Jamie Oliver recipes created exclusively for the iPhone and iPad. Updated every Monday with new recipe content and seasonal recipe collections.
Users of the free app will have access to 15 free taster recipes, rotated every Monday, to give you a flavour of the recipes available in the collection.
You will need an active subscription in order to access the whole collection.
► Renewing and Cancellation
Payment will be charged to your iTunes Account at confirmation of purchase. This subscription will automatically renew unless auto-renew is turned off at least 24 hours before the end of the current period. Your account will be charged for renewal within 24 hours prior to the end of the current period. The cost of the renewal will match the initial subscription price. Your auto-renew subscription can be managed or turned off by going to your Account Settings after purchase. No cancellation of the current subscription is allowed during your active subscription period. If your subscription expires, you will only be able to access the free taster pack – you will need to purchase a new subscription to access all other content.
Novidades da versão 3.2.2
3.2.2 - Reinstated missing yellow icon.
3.2.1 - Fixed issues with German language displaying incorrectly for some users.
Opiniões de clientes
Bom aplicativo
É um bom aplicativo pessoal. Me ajudou a organizar as compras e o trabalho na cozinha, fora que quando passo no mercado tenho um bom livro de receitas para consultar, escolher o jantar e fazer as compras.
Love having all those great recipes literally handy!
- Grátis
- Categoria: Gastronomia e bebidas
- Atualizado: 24/01/2016
- Versão: 3.2.2
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- © 2010-2014 Zolmo Limited. All rights reserved.
Compatibilidade: Requer o iOS 7.1 ou posterior. Compatível com iPhone, iPad e iPod touch.
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- Jamie's Recipes SubscriptionUSD 1.99