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TOP500 Supercomputer Siteshttp://www.top500.org/blog/2014-08-14T09:30:43+00:00The Top500 List: Twenty Years of Insight into HPC PerformanceFROM DATA TO KNOWLEDGE2014-08-14T09:30:43+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/from-data-to-knowledge/

Last year we organized the first ISC Big Data Conference and the acceptance of the conference across the high performance and enterprise computing communities has encouraged us to bring you this event once more. This year's theme, From Data to Knowledge, reflects the fundamental value of all big data applications, encapsulating the challenges as well as the solutions.

ISC Big Data 2014 will present the latest developments in data-centric computing from industry players and researchers, exploring all aspects of that data-to-knowledge path. The conference will feature multiple sessions on Hadoop, a rapidly evolving parallel framework for digesting some of the largest datasets in the world, as well as alternative software frameworks from a growing array of companies. This surge of solutions reflects not only the relative youth of the big data market, but also its application diversity.

The ISC Cloud Conference will take place a couple of days before the big data event at the same venue. A combined passport for both conferences enables a small savings on registration fees. To find out more about ISC Cloud, please visit the website.
CLOUD MEETS HPC2014-08-14T09:16:20+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/cloud-meets-hpc/

We launched the ISC Cloud Conference series five years ago when cloud computing was still an unfamiliar concept to a large portion of high performance computing (HPC) practitioners. As many as 250 members of the HPC community attended our first cloud meeting in 2010. These early adopters continue to support the ISC Cloud Conference with their attendance as well as sponsorships.

Once again this forward-looking group of researchers, engineers, consultants, as well as hardware and software providers, will meet this fall in Heidelberg to discuss the timeliest HPC cloud topics and trends. The focus of ISC Cloud in 2014 is the use of HPC clouds for scientific and engineering applications in research and industry.

Our invited speakers are experts with firsthand experience in cloud usage. They will report on the latest achievements in the HPC cloud technologies, provide perspective on their benefits and challenges, and offer practical recommendations about how to best utilize cloud-based computing. They will also lay out a roadmap for cloud computing beyond 2014.

We invite you to stay for our second ISC Big Data Conference on October 1 – 2 immediately following ISC Cloud, which will be held at the same venue. We offer a combined passport for both events. To find out more about ISC Big Data, please visit the website.
AMD Refreshes Vision for HPC Future2014-02-17T13:57:48+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/amd-refreshes-vision-for-hpc-future/
Although they've been rather quiet compared to their competitors in the general server, GPU and of course, overall HPC market, it might be too early to write off AMD just yet. If we're to look at their silence as the "calm before the storm" consider it typhoon season, at least according Suresh Gopalakrishnan, corporate vice president and general manager of the AMD server business unit, whom we spoke with this week.

The last time we checked in with AMD, we were told that HPC represented a small share of the overall business focus. At the time, they had a dwindling share of the Top 500 (which hasn't recovered—AMD claims less than 45 systems across processor generations on the list) and their focus seemed to be targeting anything but high performance computing workloads. But with stiff competition in the mainstream server market from the largely-dominant Intel, the drawn-out death of the PC, and a struggling presence in high-end computing, AMD did the smart thing—they branched out to tackle key segments of the market where they still have a chance. Among those areas is still the ARM server ecosystem—one that they'll be aggressively attacking with their "Seattle" approach this year. Add to that their APU, which has an HSA shine for developers and a rather powerful GPU to exploit, and they might reclaim their status in an HPC ecosystem that's moved on with rising shares of discrete GPUs and increasingly, coprocessors like the Xeon Phi.

Continue reading on HPCwire...
NERSC Flips Switch on New Flagship Supercomputer, Edison2014-02-03T16:24:28+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/nersc-flips-switch-on-new-flagship-supercomputer-edison/
The National Energy Research Scientific Computing (NERSC) Center recently accepted "Edison," a new flagship supercomputer designed for scientific productivity. Named in honor of American inventor Thomas Alva Edison, the Cray XC30 will be dedicated in a ceremony held at the Department of Energy's Lawrence Berkeley National Laboratory (Berkeley Lab) on February 5, 2014, and scientists are already reporting results.

Edison by the Numbers

332 terabytes memory

2.39 petaflop/second peak performance

124,608 processing cores

462 terabytes/second global memory bandwidth

11 terabytes/second network bisection bandwidth

7.56 petabytes disk storage

163 gigabytes/second I/O bandwidth

Continue reading...
How Can Supercomputers Survive a Drought?2014-01-29T09:45:54+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/how-can-supercomputers-survive-a-drought/
Water scarcity has been surfacing as an extremely critical issue worth addressing in the U.S. as well as around the globe nowadays. A McKinsey-led report shows that, by 2030, the global water demand is expected to exceed the supply by 40%. According to another recent report by The Congressional Research Service (CRS), more than 70% of the land area in the U.S. underwent drought condition during August, 2012.

When it comes to 2014, the condition has become even worse in some of the states: following a three-year dry period, California declared state-wide drought emergency. A report by NBC News on this drought quotes California Gov. Jerry Brown as saying, "perhaps the worst drought California has ever seen since records began being kept about 100 years ago". Many such evidences of extended droughts and water scarcity have undoubtedly necessitated concerted approaches to tackling the global crisis and ensuring water sustainability.

Supercomputers are notorious for consuming a significant amount of electricity, but a less-known fact is that supercomputers are also extremely "thirsty" and consume a huge amount of water to cool down servers through cooling towers that are typically located on the roof of supercomputer facilities. While high-density servers packed in a supercomputer center can save space and/or costs, they also generate a large amount of heat which, if not properly removed, could damage the equipment and result in huge economic losses.

The high heat capacity makes water an ideal and energy-efficient medium to reject server heat into the environment through evaporation, an old yet effective cooling mechanism. According to Amazon's James Hamilton, a 15MW data center could guzzle up to 360,000 gallons of water per day. The U.S. National Security Agency's data center in Utah would require up to 1.7 million gallons of water per day, enough to satiate over 10,000 households' water needs.

Although water consumption is related to energy consumption, they also differ from each other: due to time-varying water efficiency resulting from volatile outside temperatures, the same amount of server energy but consumed at different times may also result in different amount of water evaporation in cooling towers. In addition to onsite cooling towers, the enormous appetite for electricity also holds supercomputers accountable for offsite water consumption embedded in electricity production. As a matter of fact, electricity production accounts for the largest water withdrawal among all sectors in the U.S. While not all the water withdrawal is consumed or "lost" via evaporation, the national average water consumption for just one kWh electricity still reaches 1.8L/kWh, even excluding hydropower which itself is a huge water consumer.

Amid concerns over the tremendous amount of water required to run data centers and supercomputers, there have been an increasing interest in mitigating the water consumption. For example, Facebook and eBay have developed dashboard to monitor the water efficiency (Water Usage Efficiency or WUE in short) in run-time, while Google and NCAR-Wyoming Supercomputing Center (NWSC) are developing water-efficient cooling technologies, such as using outside air cooling, using recycled water and so on. These approaches, however, are merely targeting facility or infrastructure improvement, and they require high upfront capital investment and/or suitable climate conditions.

Why should supercomputers really care about water consumption? Well, there are a good number of reasons. Water conservation will not only benefit supercomputers in receiving tax credits and saving a portion of their annual utility bills, but also improve sustainability of supercomputers and help it survive extended droughts which are more and more frequent in water-stressed areas such as California where many large data centers and supercomputers are located. Water conservation will also benefit supercomputers in acquiring green certification, fulfilling their social responsibilities.

Motivated by the dearth of thorough research in supercomputer water efficiency and urgency of water conservation, a group of researchers at Florida International University have recently been targeting the field of data center and supercomputer water conservation. Unlike the current water-saving approaches which primarily focus on improved "engineering" and exhibit several limitations (such as high upfront capital investment and suitable climate), the research group devises software-based approaches to mitigate water consumption in supercomputers by exploiting the inherent spatio-temporal variation of water efficiency. Such spatio-temporal variation of water efficiency comes from our mother nature for free: volatile temperature results in time-varying water efficiency, while heterogeneous supercomputer systems across different locations lead to spatio variation of water efficiency.

The research group finds that the spatio-temporal variation of water efficiency is also a perfect fit for supercomputers' workload flexibility: migrating workloads to locations with higher water efficiency and/or deferring workloads to water-efficient times. Effectiveness of the approach has been demonstrated via extensive experiment studies, reducing water consumption by 20% with almost no compromise in other aspects such as service latency. The promising results mark the first step to make a far-reaching change in the process of achieving supercomputer sustainability through water conservation, yet without upfront capital investment or facility upgrades.

If you operate a supercomputer in water-stressed areas undergoing drought conditions, the software-based approach may help your supercomputer survive droughts without costing you a single cent on facility upgrades.

The original article was published by HPCwire at http://www.hpcwire.com/2014/01/26/can-supercomputers-survive-drought/.
Japan's Manufacturers Cozy Up to Supercomputing2014-01-28T10:33:21+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/japans-manufacturers-cozy-up-to-supercomputing/
Beyond a pure passion for technology and the thrill of turning ideas into reality, there is a hugely practical basis for investment in advanced computing. Supercomputers and other computational technologies bolster economic competitiveness, a notion that nearly all academic, industry and government leaders have embraced. As supercomputers become more powerful, manufacturers can run bigger and more complex models, saving time and money in the process.

In Japan, manufacturers are increasingly turning to the nation's fastest supercomputers – such as the 10-petaflop K supercomputer, installed at Japan's RIKEN research institute – to get a leg up on the competition. As an article in Nikkei Asian Review details, Japanese business and research organizations are exploring how to best leverage the potential of the K computer and similar powerful computing machines. There are several projects in place now, which are expected to yield results within a couple of years.

Software developed for K is being used by carmakers Toyota Motor and Suzuki Motor, and Bridgestone, the tire maker, to help them design their next-generation of products. The hardware-software combination is making it possible for the manufacturers to meet their prototyping needs without having to build full-scale physical designs. Not only is the digital approach less costly and time-consuming, it enables greater innovation as new ideas can be tried out with a few clicks of the keyboard. Testing a large number of design parameters in a physical format just wouldn't be feasible from an economic or time standpoint.

Developed by a team of specialists from 13 companies with the cooperation of Hokkaido University, the software simulates the air resistance created by a car by interpreting the space around a car as a grid of 2.3 billion segments. The computer simulation reflects how the air movement is affected by different driving conditions, for example a passing vehicle of a strong crosswind.

Digital modeling enables engineers to determine the most aerodynamic shapes. Lower wind resistance enables vehicles to be more fuel-efficient and increases steerability. Previously, automakers had to construct large wind tunnels and run tests using full-scale models. The supercomputer helps minimize the need for expensive physical testing. It can even find flaws that would previously have gone undetected in a a physical mockup, according to K engineers.

In addition to the auto industry, Japan is also expanding its supercomputing efforts into the shipbuilding field. Instead of simulating air flow, design software developed by the Shipbuilding Research Center of Japan shows how a ship's movement creates turbulence in water as small as 1mm. By enabling shipbuilders to forego testing of real-life floating models in enormous tanks, the design costs for such vessels can be reduced by up to 50 percent.

The Fujitsu-RIKEN K supercomputer is also being used to enable a faster pace of discovery in materials science and pharmaceutical research. While the main user base for the K system are universities and labs, the Research Organization for Information Science and Technology (RIST), which manages the allocation process, also maintains a number of industry relationships. RIST accepted 42 applications for projects using the K in fiscal 2014, up from 27 in 2012.

Going forward, Japan's science ministry is working to develop an exascale supercomputer, 100 times faster than the K, by 2020.

This article was originally published at http://www.hpcwire.com/2014/01/27/japans-manufacturers-cozy-supercomputing/.
Remembering Hans Meuer2014-01-23T12:53:14+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/remembering-hans-meuer/
By Tom Tabor

Hans Meuer, Wolfgang Gentzch and HPCwire Publisher, Tom Tabor

In the early years of the International Supercomputing Conference (ISC), when the event was topping out at 150 attendees, the beginning of each session commenced with Dr. Hans Meuer ringing a Salvation Army bell that was meant to bring us all together. The memory is a sweet one, but it is with great sadness that I've learned after a battle with cancer, my friend and colleague has left his community behind.

Hans played a preeminent role in uniting the high performance computing (HPC) community from regions far and wide. He was the proverbial father figure of high performance computing in Europe, the quintessential professor – graying beard, German accent, passion for science and discovery and most importantly the desire to use the technology around him to improve humankind's quality of life.

For many of the industry's forerunners, being on the bleeding edge of both technology and scientific research was all that was important, but Hans' passion extended beyond that; he sought to bring together the great minds in Europe who could move high performance computing forward. And it was that same positivity and spirit that he brought to the TOP500 organization and the ISC events.

I met Hans at the first Supercomputing Conference in 1988. We established our friendship at the same time as we laid the foundation for what would become the linchpins of our community: HPCwire and Supercomputing in the United States, and ISC in Europe. This legacy will live on every time HPCers gather to share their vision for the future of high performance computing.

Back then, Hans was a professor in his yearly fifties and an evangelist for supercomputing. And this was well before he marked his claim to fame as one of the founders of the TOP500, which stands as a testament and testimony to Hans' commitment and passion and speaks to how deep-rooted his involvement has been in the HPC community.

When Hans formed the International Supercomputing Conference he initially called it Supercomputing Europe. At one point he referenced it as the SC conference in Europe, but to his credit Hans viewed the SC organizers in the US as collaborators. Rather than creating confusion, he opted to call it the International Supercomputing Conference.

And while ISC and the TOP500 have become staples of HPC today, for Hans it was never about commercial success. He wanted to bring the community together and foster collaboration, and for many in the HPC spotlight today, the ties run even deeper. Hans was a mentor to Wolfgang Gentzsch – who has gone on to lead the HPC Cloud Experiment – teaching him computer science in graduate school. The scope of Hans' lasting impact extends to his colleagues at the TOP500.

"Hans was a great force and had a profound influence on my career and life," said Jack Dongarra, a co-founder of the TOP500, when we discussed the news of Hans' passing. "He made a difference on how we look at our technology, both future and past. He was a leader in our field and will be sorely missed. Hans will continue to be an inspiration and his strong presence will be greatly missed. For me he was a mentor, colleague, and friend."

Still, hardly a successful career is without controversy and Hans was no exception. Passionate about HPC and moving the community forward, Hans was somewhat of a verbose personality, which is always a formula for some controversy, particularly when it came to the directions in which to move the industry and community.

But my dearest memories of Hans will be of the early days of his phenomenal inner-circle dinners hosted in castles, and of him ringing the bell to signal the end of a break during ISC. It would just be so personal whenever Hans was bringing us together – it was as if we were his close friends and family. It meant we were getting together to reaffirm our commitment to HPC – not just gathering for a trade show.

It's likely that without Hans much of what has become his legacy would have made its way to the surface one way or another, but his successes only go to show how essential his contributions are and will continue to be. Would there have been an event in Europe that would have become the preeminent event for HPC in Europe and the Middle East? Probably. A list of the fastest computers in the world? More than likely. But because of his desire for collaboration and bringing like minds and colleagues together, Hans accelerated this process. And he did it selflessly.

The original was posted at http://www.hpcwire.com/2014/01/22/remembering-hans-meuer/.
Adieu Hans Meuer2014-01-21T20:03:03+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/adieu-hans/

We sadly announce that the TOP500 Co-Founder and ISC General Chair, Prof. Dr. Hans Werner Meuer passed away at the age of 77 at his home in Daisbach, Southern Germany, on January 20, 2014, after a brief battle with cancer.

Hans is survived and bereaved by his wife, Ursula, his sons, Andreas, Martin and Thomas, daughter-in-laws, his grandchildren, his twin sister, nephews and nieces, as well as many friends, colleagues and the entire ISC team.

Martin and Thomas Meuer inherit his legacy, and will act as the managing directors of Prometeus, the company behind the ISC conference series. As Hans would often say, "the show must go on." The upcoming International Supercomputing Conference (ISC'14) program is complete and has been finalized. Program advisers and the conference steering committee will continue to design future programs.

Hans' brief biography is available at http://www.top500.org/project/authors/hans-werner-meuer/.
Dongarra to Receive Ken Kennedy Award for Software Technologies that Power Supercomputers2013-10-11T15:07:50+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/dongarra-to-receive-ken-kennedy-award-for-software-technologies-that-power-supercomputers/
Jack Dongarra of the University of Tennessee will receive the ACM-IEEE Computer Society Ken Kennedy Award for his leadership in designing and promoting standards for mathematical software used to solve numerical problems common to high performance computing (HPC). His work has led to the development of major software libraries of algorithms and methods that boost performance and portability in HPC environments, which rely on supercomputers and parallel processing techniques for solving complex computational problems. Dongarra, the Distinguished University Professor at the University of Tennessee, is the founder and director of the Innovative Computing Laboratory at the University, and holds positions at Oak Ridge National Laboratory and the University of Manchester. He will receive the Kennedy Award on November 19, 2013, in Denver at SC13, the International Conference on High Performance Computing.

ACM President Vint Cerf cited Dongarra's role in anticipating the staggering challenges facing the HPC world. "Jack saw the need to keep pace with the evolution in HPC hardware and software in a world that demands higher speeds and performance levels. His innovations have contributed immensely to the steep growth of high performance computing and its ability to illuminate a wide range of scientific questions facing our society."

IEEE Computer Society President David Alan Grier said Dongarra's work remains authoritative. "I'm so pleased to see this award go to Jack Dongarra because he did such foundational work in scientific computing. That work was important in my early career and it remains an influential body of work."

Dongarra is a leader in research on implementing linear algebra algorithms for high performance computing architecture that has defined the mathematical software field. Many supercomputer vendors have adopted these software packages as the basis of their own numerical libraries. The software involves the use of memory hierarchies, performance tuning parameters, and other techniques to achieve performance and portability.

He has also been a major force in developing standards for mathematical software that are widely accepted in computer and computational science for evaluating the performance of supercomputers. They include LINPACK and LAPACK, software packages used since the 1970s for solving systems of linear equations. In 1993, he formed the Top500 table which used his LINPACK benchmark to show the 500 most powerful commercially available computer systems. These benchmarks enable users to exploit their existing computer hardware to solve much larger problems at lower additional cost.

The Kennedy Award cited Dongarra for "influential contributions to mathematical software, performance measurement, and parallel programming, and significant leadership and service within the HPC community."

A Fellow of ACM, IEEE, AAAS, and SIAM, Dongarra is the recipient of the first IEEE Medal of Excellence in Scalable Computing, and the first recipient of the SIAM Special Interest Group on Supercomputing's award for Career Achievement. He was awarded the IEEE Computer Society Sidney Fernbach Award and received the IEEE IPDPS 2011 Charles Babbage Award. He is a member of the National Academy of Engineering.

Dongarra is a Distinguished Research Staff member at Oak Ridge National Laboratory and an adjunct professor of Computer Science at Rice University, and holds the Turing Fellowship at the University of Manchester. He is also director of Tennessee's Center for Information Technology Research. Before joining the University of Tennessee, he was a senior scientist at Argonne National Laboratory. He received a B.S. degree in Mathematics from Chicago State University, an M.S. degree in Computer Science from the Illinois Institute of Technology, and a Ph.D. in Applied Mathematics from the University of New Mexico.

ACM and the Computer Society co-sponsor the Kennedy Award, which was established in 2009 to recognize substantial contributions to programmability and productivity in computing and significant community service or mentoring contributions. It was named for the late Ken Kennedy, founder of Rice University's computer science program and a world expert on high-performance computing. The Kennedy Award carries a US $5,000 honorarium endowed by the ACM Special Interest Group on Computer Architecture (SIGARCH) and the Computer Society.

About ACM

ACM, the Association for Computing Machinery www.acm.org, is the world's largest educational and scientific computing society, uniting computing educators, researchers and professionals to inspire dialogue, share resources and address the field's challenges. ACM strengthens the computing profession's collective voice through strong leadership, promotion of the highest standards, and recognition of technical excellence. ACM supports the professional growth of its members by providing opportunities for life-long learning, career development, and professional networking.

About IEEE Computer Society

IEEE Computer Society, www.computer.org, is one of the world's leading computing membership organizations and a trusted information and career-development source for a global workforce of technology leaders including: professors, researchers, software engineers, IT professionals, employers, and students. IEEE Computer Society provides high-quality, state-of-the-art information on an on-demand basis. The Computer Society provides a wide range of forums for top minds to come together, including technical conferences, publications, a comprehensive digital library, unique training webinars, and professional training. IEEE is the world's largest professional association for advancement of technology and the Computer Society is the largest society within IEEE.
TOP500 Founder Erich Strohmaier on the List's Evolution2013-10-04T16:21:37+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/top500-founder-erich-strohmaier-on-the-lists-evolution/
The TOP500 list of the world's fastest supercomputers first debuted more than two decades ago, in June 1993, the brainchild of Berkeley Lab scientist Erich Strohmaier and Professor Hans Meuer. The much-celebrated list is compiled using the Linpack benchmark, which was developed by Jack Dongarra. Although the continued relevance of the Linpack benchmark as a sole measure of big iron performance has been called into question, the impact of this twice-yearly list as a widely recognized metric and a valuable historical record cannot be denied.

Recently, Dr. Strohmaier, who heads up the Future Technologies Group at Berkeley Lab, shared some of his insight on the evolution of the TOP500 and the future of HPC in a short Q&A for the US Department of Energy website.

At Berkeley, Professor Strohmaier's team explores the design and development of hardware and software systems that enable application scientists to extract the greatest performance gains. The TOP500 list cofounder got his start on the application side as well, studying physics, which provided a natural segue to computers. Strohmaier's PhD work involved using numerical methods in particle physics. The compute-intensive applications could only be done on the largest systems of the day, so the transition to HPC was "a natural progression," according to the scientist.

The TOP500 list was developed to provide the community with a simple but meaningful point of reference. In the 1980s the vector machines were clearly delineated as supercomputers. You could survey the upper bounds of computing with a quick count of such systems. But in the 90s the line between "regular computers" and supercomputers (aka vector computers at the time) began to blur, notes Strohmaier. Furthermore, the appearance of parallel processor supercomputers meant that the "old method" of counting vector computers was no longer valid.

That was the context for the list, but the need runs deeper. "You really can't discuss or improve what you can't measure," remarks Strohmaier. "You need a definition for performance if you want to talk about supercomputing and how it's improving. Benchmark results are essential here as they provide a practical way to define and measure performance."

Strohmaier's next sentiments might be interpreted as a response to allegations that the list has outgrown its usefulness, at least as a sole measure of performance. Some academic leaders, like Blue Waters Project Director Bill Kramer are calling for real-world sustained-performance applications to serve as benchmarks.

Strohmaier acknowledges that "there is no single metric or benchmark that can truly represent the huge variety of programs that we use."

"For different purposes, different users and different situations, you need to define different benchmarks to represent progress," he adds.

The father of the Linpack benchmark, Jack Dongarra, holds a similar perspective.

"The Linpack benchmark is an incredibly successful metric for the high-performance computing community," said Dongarra. "The trends it exposes, the focused optimization efforts it inspires, and the publicity it brings to our community are very important. Yet the relevance of the Linpack as a proxy for real application performance has become very low, creating a need for an alternative."

The "need for an alternative" has prompted Dongarra, a professor of computer science at the University of Tennessee, and colleague Michael Heroux from Sandia National Laboratories in Albuquerque, New Mexico, to develop a new benchmark. It is expected to debut this November in tandem with SC13.

The Strohmaier interview covers other topics as well. The Berkeley scientist discusses some of the historical trends embedded in two decade's worth of TOP500 data, the main roadblocks to achieving exaflop-class supercomputers, as well as the importance of hitting this next 1,000X goal.

For students who are considering a career in advanced computing, Strohmaier extolls the benefits of a strong foundation. "You need to learn about the science discipline, but you also need to understand the computer science," he says. "And you will need to keep learning, changing and adapting to the rapidly changing hardware and software environments of HPC."

The original article was published in HPCwire at http://www.hpcwire.com/hpcwire/2013-10-03/top500_founder_erich_strohmaier_on_the_list_s_evolution.html.
Can Supercomputers Predict the Future?2013-09-14T15:25:44+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/can-supercomputers-predict-the-future/
In this age of big data, would it surprise you to learn that supercomputers are on track to predicting wars, revolutions and other societal disruptions? Data scientist Kalev Leetaru is one of the foremost proponents in the emerging field of predictive supercomputing. His research helped usher in the era of "petascale humanities," where computers can identify useful or interesting patterns if provided with sufficiently large data repositories.

Yahoo Fellow in Residence at Georgetown University in Washington, DC, and formerly affiliated with the Institute for Computing in the Humanities, Arts and Social Science at the University of Illinois, Leetaru amassed a collection of over one hundred million articles from media outlets around the world, spanning 30 years, with each item translated and tagged for geography and tone. Leetaru analyzed the data with a shared memory supercomputer called Nautilus, creating a network with 10 billion items connected by one hundred trillion semantic relationships.

The 30–year worldwide news archive was part of a 2011 study called Culturomics 2.0: Forecasting large–scale human behavior using global news media tone in time and space. The findings were impressive, pointing to a degree of predictive ability, greater than chance would account for. The events the could be predicted include the revolutions in Tunisia, Egypt, and Libya, including the removal of Egyptian President Mubarak. The corpus also correctly anticipated a period of stability for Saudi Arabia.

Leetaru takes this to mean that it's possible to predict major upheavals, like the Arab Spring, with some degree of confidence.

"It's like a weather forecast," he says in a recent Kernel article. "A 70 per cent chance of rain tomorrow means that it might not rain, but it's probably worth bringing an umbrella, because the conditions for rain are there."

So far, all of these "predictions" have taken place after the event has already occurred, but that's exactly how other forecasting models are vetted for accuracy. The real test will be anticipating events that hadn't yet happened.

From the Kernel article: "Leetaru believes we should give supercomputers a chance at predicting global conflicts. Why? Because humans are even worse at predicting major world events than computers. The first people defeated in the uprisings of the Arab world weren't dictators, but political scientists all over the world. None of them had seen it coming."

But even if they had seen it coming, what then? The implications are mind-boggling, not to mention sci-fi movie scary, harkening back to the 2002 Tom Cruise film Minority Report. Two questions come to mind: What if we knew someone was going to commit a crime, what would we do with that knowledge, and what percent of certainty would a prediction require to be actionable?

This article's original source is HPCwire. It was published at http://www.hpcwire.com/hpcwire/2013-09-12/can_supercomputers_predict_the_future_.html on 12.09.2013
An 83,000-Processor Supercomputer Can Only Match 1% of Your Brain2013-08-13T12:35:45+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/an-83000-processor-supercomputer-can-only-match-1-of-your-brain/
You've undoubtedly heard over and over again about what an absurdly complex entity the human brain is. But a new breakthrough by Japanese and German scientists might finally drive the point home. Taking advantage of the almost 83,000 processors of one of the world's most powerful supercomputers, the team was able to mimic just one percent of one second's worth of human brain activity—and even that took 40 minutes.

Japan's K Computer Is the Fastest of Them All, Topping 10 Petaflops
The K supercomputer just got a bit quicker—boosting its computational output to 10.5 quadrillion calculations per second and making it the speediest… Read…

Why is it so hard for computers to reproduce what your grey matter does as a matter of course? Volume. The human brain consists of about 200 billion nerve cells (neurons) that are linked together by trillions of connections called synapses. As the tiny electrical impulses shoot across each neuron, they have to travel through these synapses, each of which contains about 1000 different switches that route that electrical impulse. In total, one human brain could contain hundreds of trillions of these neural pathways. It's like a Choose Your Own Adventure book that stretches from here to Jupiter.

Enter the Fujitsu K computer, which while no longer the world's fastest (it was the top-ranked supercomputer in the world in 2011, and now sits in the four-hole), is still a massively powerful beast. To mimic this relatively minuscule amount of brainpower, researchers used the Fujitsu K to connect a total of 1.73 billion virtual nerve cells by 10.4 trillion virtual synapses (with 24 bytes of memory in each synapse). In total, this added up to around one petabyte of memory, which is the equivalent of about 250,000 standard PCs. And remember, all that's still just one percent of what your brain does every single day, in the time it takes to blink a few times.

Some scientists, however, are hoping that's going to change—and soon. Markus Diesmann of the Institute of Neuroscience and Medicine at Germany's Forschungszentrum Julich believes that, within the next decade, we'll be able to use exascale computers—capable of 1000 times one quadrillion operations per second—to represent the entire of the brain "at the level of the individual nerve cell and its synapses." Whether or not we'll actually be able to reach exascale computing by 2020, though, is still up for debate.

This particular exercise was meant simply to "test the limits of the simulation technology developed in the project and the capabilities of K," according to the Japanese research institute RIKEN. But if it takes this much power to hit just one second of one person of what we can do on our own, at the very least, this should help put any fears about an upcoming Singularity to rest—that is, at least for now.

This article was originally published by Gizmodo at http://gizmodo.com/an-83-000-processor-supercomputer-only-matched-one-perc-1045026757
Raijin Debuts as Fastest Supercomputer in Australia2013-08-01T16:31:39+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/raijin-debuts-as-fastest-supercomputer-in-australia/
Officials at Australian National University (ANU) in Canberra today took the wraps off Raijin, a new 1.2 petaflop supercomputer that is fastest ever in the country. The new cluster is housed at the new National Computational Infrastructure (NCI) facility on the ANU campus, and will be used for climate modeling, among other uses.

Raijin is a Fujitsu Primergy cluster that features 57,472 Intel Sandy Bridge cores running at 2.6 Ghz, 160 TB of memory, 10 PB of storage, and a Mellanox FDR Infiniband interconnect that delivers 9 terabytes per second bandwidth, according to ANU.

The cluster debuted at number 24 on the Top 500 list in November 2012, and dropped to number 27 for the June 2013 list. The tests used in the ranking used only 53,405 cores, and delivered a theoretical peak performance of 1.11 petaflops, according to the Top 500 website.

Raijin cost AUD $50 million to build and will cost AUD $12 million a year to run, according to a story in the Australian Broadcasting Corporation. The cluster, which was named after the Japanese god of rain and thunder, will be used extensively with atmospheric and ocean modeling, in addition to weather forecasting and water resource management.

"You could say that we in the climate science community have a need for speed," the head of the Bureau of Meteorology Rob Vertessy told AFP. "The simple fact is that supercomputer capacity is a major determinant of our success in this field, but it's always been a struggle to secure access to it."

Andy Hogg, an associate professor at ANU and a researcher at NCI, says Raijin will provide a huge performance boost in his research into how currents flow in the Southern Ocean. When Hogg began his research 10 years ago, his HPC resource had just 8 processors. With Raijin, a single program can simultaneously utilize 3,000 to 4,000 cores, he says. "Our work is really underpinning the improvement in climate models that we'll see in the next five years," Hogg says in a video.

Raijin will also a boon to Australia's scientific community. Until now, Australian scientists have had to go elsewhere to gain access to the computational power required to run their models. With the powerful Raijin resource now available, those scientists can stay in the country.

The cluster is the highlight of the new NCI facility, which was also officially unveiled to the public today. In addition to Raijin, the facility will features a new 3,200-core cluster from Dell. That AUD $3.2 million Australian deal was announced last week.

Raijin is funded as part of Australia's infrastructure-building stimulus package in the wake of the global financial crisis, the AFP reports. NCI is funded by the ANU, the Commonwealth Scientific and Industrial Research Organization (CSIRO), the Australian Bureau of Meteorology, Geoscience Australia, and other universities through the Australian Research Council.

This story was published in the HPCwire on July 31.
Secretary Moniz Dedicates New Supercomputer at National Energy Technology Laboratory2013-07-31T13:50:21+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/secretary-moniz-dedicates-new-supercomputer-at-national-energy-technology-laboratory/
MORGANTOWN, WV – U.S. Energy Secretary Moniz dedicated a new supercomputer — one of the world's fastest and most energy efficient—at the National Energy Technology Laboratory (NETL) on July 29, 2013. The high-performance computer for energy and the environment is not only one of the top 100 supercomputers in the world, but it is also one of the most energy efficient for its size.
The supercomputer is a 503 TFlops (trillion floating-point operations per second) computer that enables researchers to apply complex model simulations for advanced energy and environmental technology development. This is a unique tool tailored for engineering calculations in support of fossil energy research.

"This new capacity will give us the computational muscle to accelerate the development and design of large scale chemical looping reactors and carbon capture technologies that will allow us to use fossil fuels more cleanly," said Secretary Moniz. "It will ensure that NETL remains on the forefront of this research, which is critical not only to our economic future but to the environment as well."

Capable of running simulations ranging from the molecular level to modeling entire power plants and natural fuel reservoirs, the new computer provides enhanced visualization, data analysis, and data storage capabilities that will enable researchers to discover new materials, optimize designs, and predict operational characteristics.

All of the computational, visualization, network hardware, and primary storage servers are installed in a state-of-the-art modular datacenter, greatly improving its efficiency. It provides the new computer with one of the lowest power utilization efficiency (PUE) infrastructures available, at times using only 1 percent of total electrical consumption to cool the equipment. The increase in efficiency translates to electrical energy cost savings of approximately $450,000 annually.

NETL's supercomputer's key areas of application include multiphase computational fluid dynamics, computational chemistry, computational geophysics, and computational materials research.

This article was published by Scientific Computing on 07/29/2013. http://www.scientificcomputing.com/news/2013/07/secretary-moniz-dedicates-new-supercomputer-national-energy-technology-laboratory?et_cid=3395833&et_rid=374046042&location=top#.UfkLRY0yaxY.
NVIDIA Takes PGI Under Wing2013-07-30T09:31:44+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/nvidia-takes-pgi-under-wing/
Moments ago NVIDIA unleashed news that it would be acquiring the Portland Group International (PGI), which has been a standby in the HPC market for Fortran and C compiler tools.

PGI spun out of IP acquired from Floating Point Systems in 1989, and managed to carve out an early niche in Fortran and C compilers and tooling. From the early days pushing to the Intel i860 crowd up to the modern core-heavy chips it supports for its HPC-oriented base, PGI has expanded well beyond basic architectures and has become a particularly close partner with NVIDIA in recent years.

The Portland Group has maintained special focus on the needs of HPC markets, including its instrumental role in bringing high performance Fortran (HPF) to bear, which is an extension that opened trusty Fortran to a wider set of architectures. They have also been prominent backers of GPGPU technology from its early days. From the development of their CUDA Fortran in conjunction with NVIDIA and now their push to bring OpenACC to a wider community, it's clear how the GPU company saw them as a prime fit.

According NVIDIA's GM of the Tesla unit, Sumit Gupta, PGI has been an integral part of its strategy in GPU computing. Specifically, this is clear via its CUDA Fortran (which NVIDIA used in favor of rolling its own) and more recently, its ongoing support for OpenACC. Interestingly, during our brief conversation in advance of the news, Gupta stressed OpenACC as the shiny part of the deal, noting that while it has seen significant adoption, more work and emphasis in that area will result in expanded GPU adoption.

NVIDIA has been investing in its software ecosystem significantly, Gupta says, noting that without the developer community on board their technology can't progress. NVIDIA sees OpenACC as the panacea (at least against the Xeon Phi quick-port buzz) since it makes it easier to tap into GPU acceleration.

He told us that with a higher-level approach to taking GPUs for a spin, it's now typically a matter of 2 week to 2.5x speedups (on average) or the fruits of a one-day hands-on workshop with actual code to hit those same results. The problem with OpenACC isn't functionality, he says, it's simply around messaging--getting the word out that OpenACC offers a faster, cleaner way to using a higher-level approach to getting results out of GPUs, which have suffered a bad rap in terms of on-boarding.

We asked Gupta, about what competitive advantage this acquisition lends them over Intel, which has its own suite of x86 tooling and compilers. He downplayed the role of competition in this acquisition, saying that this was more of a long-term investment in the software ecosystem for their GPU. Although it's hard to ignore a future where the all-important software angle (especially once we look toward a more diversified future processor-wise) is not "competitive" at this point, NVIDIA is still building its base to firm up how it delivers its GPU message.

As Michael Feldman, Senior Analyst with Intersect360 Research commented, "As accelerators hit the mainstream, the real challenge will be to make these devices comfortably programmable for the average coder. To do so, I think NVIDIA has realized that they'll need compiler technology beyond their CUDA toolset. This is what PGI gives them: C and Fortran compilers with a high-level programming framework geared to accelerators. And, like their main rival Intel, NVIDIA wants to this technology in-house."

Feldman looked at the competitive ecosystem as well, pointing to the ways that PGI assets can help NVIDIA with its ARM-GPU strategy via Project Denver, which could shake up the workstation and server market beginning late next year. In this case, as with other server business moves, it's less about the metal than the mush.

On that note, all chipmakers are being taken to task when it comes to their software stacks and tooling, both at the general datacenter level and for their HPC user bases. Last week we listened as Intel spelled out its plans to continue pushing new capabilities into their Xeon line and beyond and now, others, including NVIDIA, are taking taking aim at the same target.

Despite the emphasis on OpenACC with this acquisition, NVIDIA says that continued maintenance and updates to CUDA Fortran are key to their strategy. Also, rather interestingly, they are keeping nearly everything status quo at PGI, at least for the time being. And of particular note there is the fact that they are going to continue supporting their x86 line of compilers and tools--the very tooling that serves as a competitive threat.

Gupta doesn't see this as a problem, stressing once again the role that both the CUDA Fortran and OpenACC angles mean for their future growth. In other words, the conversation was about future directives versus any short-term benefit. And they're taking OpenACC very, very seriously.

PGI will continue to operate independently as a unit inside NVIDIA and its staff reporting to Ian Buck, GM of GPU Computing at NVIDIA. One can imagine a day when the x86 products might dwindle, but that's just speculation that's being bandied about.

This article was published by HPCwire on 29.07.2013. http://www.hpcwire.com/hpcwire/2013-07-29/nvidia_takes_pgi_under_wing.html?featured=top.
Intel Hits Refresh on Datacenter Vision2013-07-29T15:40:25+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/httpwwwhpcwirecomhpcwire2013-07-26intel_hits_refresh_on_datacenter_visionhtmlfeaturedtop/
This week we were on hand for Intel's "Rearchitecting the Datacenter" event, which offered a glimpse into how the company imagines its future path along both low power and high performance server routes.

In addition to the announcement of key details around the Atom family and upcoming Avoton and Rangeley, and a general roadmap for the 14nm products expected to roll out in the next few years, the emphasis was on integration between hardware and software. From software defined storage and networks to the role of fabrics in typing together low and super-power cores, the company collected its strategy under a number of nets--one of which was HPC specifically.

While a great deal of the focus was on web-scale and enterprise datacenters, the company's HPC lead, Raj Hazra, gave a detailed presentation about how new trends can push HPC into a greater "knowledge economy" and into more mainstream (beyond the "traditional" academic and government arenas) contexts.

The recorded presentation reflects Hazra's wider view of where Intel stands with its high performance computing strategy on a broad level, which was meant for the room's more mainstream audience. To drill down on specifics, we spent some time chatting with him in more detail about the key concepts he outlined, including power, performance, neo-heterogeneity, integration and the future reach of Xeon Phi into the enterprise.

Hazra emphasized the concept of Intel's focus on "neo-heterogeneity" in his discussion of where HPC fits into Intel's larger datacenter strategy going forward. As he defined, this refers to making a new approach to heterogeneity possibly by taking advantage of hardware that's been designed for different performance (and performance per watt) but which looks unified on the programmer's side.

The ROI here, he explains, is in providing the capability for users to quickly and easily port an application and then contend about the much longer process of optimization. For users waiting on the long port times to discrete GPUs, he says, it's a risk as the speedups may or may not be present.

With Xeon Phi, however, he stresses, there is little risk in porting and "trying out" the approach and the optimization process is usually shorter than with GPUs and users find that in the process their codes are optimized for general Xeon as they go. While we're still on the lookout for a breakdown of some common application types and their GPU to co-processor optimization times (not port--Intel has that time cut down considerably) this does reflect what we've heard from Phi and GPU users at TACC, among other centers.

The real test in the coming years for Phi's reach outside of the government and academic sites is when the ISV community gets behind the co-processor. The initial users in academia and elsewhere generally write their own codes and aren't reliant on the internal processes of ISV approval and tuning. Once a wide range of commercial codes are conditioned to take advantage of any potential performance benefits, the market for Xeon Phi will be quite large, Hazra anticipates.

And certainly, as with the other items on Intel's roadmap, the focus is not on niches--it's on reaching every segment of the server market via ultra-low power approaches fed by developments on the Atom family side all the way up to Phi. The company stressed this week its role in bringing software-defined networking, storage and more integrated compute capabilities to all market segments--and HPC is no exception.

The integration value coming from Intel on this side will be felt when the interconnect assets they've pulled in from QLogic and Cray come to bear. On this topic, Hazra says Intel is focused on having a discrete network solution wherein they integrate the network interface control on the processors. From there, he says, "we'll innovate on what that integrated version is to be able to improve performance, lower power and add features to it so it addresses next-gen programming models."

In terms of the role of QLogic in particular, he notes, "our goal, and we're engaged in building the next gen products with integrated fabric and this has to cover the gamut, from high-end HPC to midrange and to the enterprise."

As one might imagine, the HPC flavor on the Top 500 and academic side was more muted in favor of putting high-end processor technology in greater enterprise context during this general datacenter event. However, the one key topic that tied HPC to the rest of the strategy outline is how the technologies developed in this community can feed a much wider set of general enterprise applications and server approaches. Hazra agreed that big data is indeed a prime way for his HPC group to extend outward, noting that as analytics evolve, the need to blend high performance computing developments (and in general, the role of more robust hardware) with these new algorithms will open up new opportunities.

Big data and, of course, the range of scientific and research applications, are all stoking HPC investments on Intel's side, Hazra side. Unlike AMD's recent statement that HPC is relatively low margin, he stressed Intel's investment in it with a focus on longer-term goals. "The paradigm is that we are going to be continuing to improve compute capacity. Manycore is the way forward. We are investing in it, but the world is still on multicore. Still we're starting to see leading edges of applications and algorithms that are going to manycore and we expect that to be the way applications s of the future are built so we have to move now instead of being reactive."

As the company's senior VP and General Manager of the Datacenter and Connected Systems Group, Diane Bryant, stressed repeatedly, there are converging forces (cloud and big data in particular) that require tighter integration at the storage, network and rack levels. She outlined the company's Rack Scale Architecture (RSA) which pushes utilization and flexibility for cloud datacenters in particular, and played up the role of low-power, ultra-dense servers for a future that doesn't just include cloud datacenters or small devices.

Hazra echoed the value of this move, noting that HPC is also diversifying. He says that while the majority of HPC remains under carefully engineered co-design there is no doubt that certain segments of HPC that share the characteristics of low energy scale-out (life sciences, algorithms and apps that fit that scale-out highly dense, low power pattern) represent a trend of overall diversification of system architecture. "It's the beginning of a curve," he says, "and Intel wants to be responsive and not reactive."

We asked Hazra whether or not this steady march to lower power and higher density marks a death of the server industry as we know it, in part because of the event's emphasis on Open Compute inspired designs and approaches. "I don't know if it's a death or rebirth," he says, but "the open projects bring like minds together and provide a scaffolding to build greater things." He says that questions about sea changes in the server businesses this aren't unfamiliar.."In the HPC space at one point, many said the Beowulf clusters would kill HPC, but look at the tremendous amounts of differentiation."

And that's just what Intel wants to architect into their strategy--a base that extends across it's ultra-low power lines all the way up to Phi--and one that lets the OEMs differentiate to create value and differentiation as the lines between what chipmakers traditionally do (and do not do) are blurred.

This article was originally published by HPCwire on 26.7.2013. http://www.hpcwire.com/hpcwire/2013-07-26/intel_hits_refresh_on_datacenter_vision.html?featured=top
HLRS' Hornet to deliver four petaflops peak performance2013-05-27T14:13:08+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/hlrs-hornet-to-deliver-four-petaflops-peak-performance/
The supercomputing infrastructure of GCS centre HLRS (High Performance Computing Center Stuttgart) at the University of Stuttgart will soon enter the next stage of its HPC systems installation phase. Code-named Hornet, the future HLRS supercomputer will gradually be installed at the Stuttgart HPC facility, so that the vast user community of HLRS has a smooth transition from current supercomputer Hermit to Cray's next generation high-end HPC system. In its final configuration, Hornet will deliver a peak performance of four petaflops, outperforming Hermit's maximum performance by a rough factor of four.

The installation of Hornet, a Cray XC30, is being carried out according to the earlier agreed HPC systems roadmap of HLRS, which defined Hermit as the initial installation step. With Hornet's implementation to be gradually conducted over the coming 18 months, the next installation phase will be completed by second half of 2014. The new supercomputer will provide 500TB of main memory and about 6PB of disc space. It will be equipped with 100,000 computing cores and will feature Intel's next generation of microprocessors which, according to the manufacturer, are specifically designed to optimise power savings and promise significant performance enhancements.

'A large percentage of our user community comes from the field of scientific engineering where highly memory demanding applications are typical,' explained Professor Resch of HLRS. 'Especially in the automotive and aerospace research and industries, HPC users are depending on systems that feature leading-edge supercomputing technology and at the same time high sustained performance. HPC systems are an indispensable tool in the researchers and scientists' pursuit to achieve breakthrough discoveries and innovations, and they ultimately help to strengthen the world-renown reputation of German Engineering as a synonym for innovation and quality of the highest degree.'

As with Hermit, the system expansion at HLRS is funded through project PetaGCS with support of the Federal Ministry of Education and Research and the Ministry of Higher Education, Research and Arts Baden-Württemberg.

This story was published at http://www.scientific-computing.com/news/news_story.php?news_id=2094
NICE! The Brain as a Model for Future Supercomputers2013-05-24T14:28:18+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/nice-the-brain-as-a-model-for-future-supercomputers/
The brain's repute took a big hit in 1997 when an IBM supercomputer defeated world chess champion Gary Kasparov in a match reported around the world. But, in the second round, the brain is back.

A Sandia National Laboratories-supported workshop in Albuquerque called NICE, for Neuro-Inspired Computational Elements workshop, discussed ways to use the brain's superior ability to send electrical signals along massively parallel channels, with multiple intersections at downstream nodes, to handle rapidly changing, high-volume information.

The hope is that rather than using the limited "if this, then that" logic of conventional computer architectures to absorb steadily increasing yet often incomplete data, cognitive systems will be able — like the brain — to learn, adapt, hypothesize, and then suggest answers.

As Julia Phillips, Sandia vice president and chief technology officer, put it in her opening talk, "Neuro-inspired computing is at the intersection of cognitive science and technology, nano devices, microsystems and computer and information sciences. It transcends our traditional approaches."

It also happens to reside at the major crossroads of Sandia research areas, she pointed out.

Of course, conventional computer architectures still predominate and Moore's Law isn't dead yet — just "eroding," as Sandia director of computing research Rob Leland told the workshop. But, when it becomes impossible to shrink circuits any smaller, as it seems will be the case in the next 10 years — what's next? And as the von Neumann/Turing architecture of the last 60 years staggers beneath the weight of uncertainties increasingly inherent in working with huge realms of fuzzy data, what then?

Workshop participants proposed using the configuration of the brain as a model. First, isolate the brain tissues that control aspects of behavior. Then analyze — microscopically and in very small time steps — the shape and behavior of the neurons sending the signals. Then duplicate that arrangement using conventional hardware and software, or most likely, a new solid-state substrate.

"National security challenges — Sandia's main interest — have historically been addressed in the physical domain, which remains vitally important," Leland said. "But these challenges today have intrinsically a cognitive aspect concerning the behavior of the individual and group, so just the physical realm isn't going to be sufficient to address these issues. Our aspiration is to deepen our understanding of cognitive science so we can address these problems in the behavioral realms." He listed possible domain intersections that included tissue-based and in-vivo sensors, optical nanosensors for chemical analysis within cells, regulated nanoassembly of circuits, digital antibodies and virus-sized logic chips.

Jim Olds from the Krasnow Institute at George Mason University went further in not only predicting the end of Moore's Law but denying it ever had the importance the computing world assigned it. He presented what he called "the great stagnation argument: that Moore's Law is not like the industrial revolution or electricity" because it produced few jobs and lately, no real economic growth.

A brain-inspired industrial revolution

"There's been a slowed-down technological revolution, despite our feelings to the contrary," he said. Because Facebook, "for all its enormous market capitalization," and Google have few employees compared with Ford Motor Co., "it's clear that technology from Moore's Law isn't translated into day-to-day lives. For some reason, we're not seeing opportunities for getting ahead by hard work. It's enabled us to enjoy leisure, and load movies onto iPads, but flying cars haven't come to pass."

To the contrary, he said, real median household income, which increased dramatically since the beginning of the 20th century, stopped increasing in the last 10 years. To solve this problem so "researchers are not sitting alone in their silos….we need a new, brain-inspired industrial revolution," Olds said.

That might be found in the Obama administration's recently announced project to map the neurons and network functions of the human brain. The $100 million project, which received a mixed reception from neuroscientists, will launch in 2014 and may continue for 10 years.

"This is a transformation from letting a million flowers bloom — from single PIs [principal investigators] to a major strategic investment," Olds said.

"Brains are highly parallel, can reconfigure themselves dynamically in a few minutes and use molecular signal transduction [to pass messages]," he said. "In message-passing they use little power and finesse around bottlenecks [that would slow silicon] parallel computing systems."

Apparently, though, the brain's advantage isn't speed. The brain uses wet-ware, Olds said, and is therefore slow compared to the speed of silicon chips, though more complex and therefore more powerful in many other ways.

A modest proposal

Slow signal speed didn't faze Christof Koch, chief scientific officer of Allen Institute for Brain Science. "I have a modest proposal," he told the group. "Imagine a one-kilogram, three-dimensional block of silicon, or stacks of chips, all with 10 kilohertz clocks and each consuming microwatts of power. There's much more silicon, and therefore it's very expensive and heavy, like the brain! But, much less cost for heat sinks, much less air conditioning."

The Allen Institute, he said, was founded in 2003 to support basic research in the brain sciences with a staff of 210, including 50 Ph.D.s.

"There are a thousand different cell types in the brain," Koch said. "Every time we look at the brain, we see more and more complexities, like astronomers looking at the universe every 10 years."

The problems include science's inability to simultaneously record more than 0.0001 percent of firing neurons, and, before the Obama proposal, "no central unifying projects. There are 10,000 labs with different questions, methods, protocols and standards, heading off exuberantly in all directions. Universities are not set up for large-scale systematic efforts."

Jacob Vogelstein, a program manager at Johns Hopkins' Applied Physics Laboratory, spoke about moving ideas into practical engineering. He described taking slices of mouse brain 2 to 3 millimeters on a side and 49 nanometers thick. "Line them up on top of each other and extract the [neuronal] network," he said. Inputs and outputs can be simulated with Monte Carlo techniques that allow for randomness.

Is the brain really the right model?

Again, the difficulties could not be minimized. "In a tiny [brain] region, there are 25,000,000 synapses and cell bodies working through dendrites and axons," Vogelstein said about the difficulties of creating a copy that might serve as a computing template.

Of course, there is always the question of whether the brain provides the right model, cautioned Mike Vahle, Sandia's chief information officer. "Computer problems are taking characteristics that the brain seems particularly well-suited to handle," he said. "But is pattern-matching the right paradigm? Is the technology attainable, are the ethical and cultural issues understood? Can we avoid the pitfalls that plague modern computers and networks: viruses, worms, hacking and computer security [problems in general]?"

Murat Okandan, who proposed and helped organize the workshop for Sandia, suggested the brain did indeed show the path for dealing with large, incomplete, noisy data sets. "First we'll work with conventional CMOS devices and tools, with simulations of conventional system and architectures, and we'll cross-pollinate. The ultimate goal would be to learn from the motifs we see in neural computation and instantiate that capability in a massively interconnected, self-reconfigurable substrate that natively does the computation. The question will always be, how much fidelity do you need to get the functionality you want?"

"It's national reinvention: Time to lead again," said Olds. He prophesized that the brain's secrets, morphed into new computers, would "enhance the range of productivity to include retirement years; increase levels of safety and security so that normal decline of physical and mental abilities are lessened; improve method of wealth development leveraging Moore's law. And help develop enhanced modeling of societies to keep life meaningful.

"To do that, we need to prime the pipeline with the right kind of folks: a transdisciplinary scientist that enhances 'team science' approaches," he said.

Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin company, for the U.S. Department of Energy's National Nuclear Security Administration. With main facilities in Albuquerque, N.M., and Livermore, Calif., Sandia has major R&D responsibilities in national security, energy and environmental technologies and economic competitiveness.

This article was originally published by http://www.scientificcomputing.com/. Link: http://www.scientificcomputing.com/news/2013/05/nice-brain-model-future-supercomputers?et_cid=3271933&et_rid=374046042&location=top#.UZ9q6bU3DaU.
The race to understand the human brain2013-05-22T21:17:54+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/the-race-to-understand-the-human-brain/
International Supercomputing Conference (ISC) recently announced that it will be giving the Human Brain project, led by Henry Markram of EPFL, Switzerland, a platform at the annual event for the next 10 years to share their latest research findings . Their first talk, 'Supercomputing & the Human Brain Project – Following Brain Research & ICT on their 10-Year Quest', will be held on Tuesday, June 18.

The Human Brain project made headlines earlier this year as one of two EU flagship projects that won 1 billion euros' worth of funding over the next decade. Nages Sieslack interviews Markram ahead of this year's ISC'13 event in Leipzig, Germany

Question: How did you first become interested in researching the human brain?

I became interested in the brain already at school, triggered by a project on depression. I decided to study medicine and become a psychiatrist. During medical school I realized that there was not enough known about the brain to treat the brain and delved into neuroscience. I have a son with autism, which also frustrated me that neuroscientists could do so little to help people with disease. I also realized that we won't ever collect all the data needed from using only experimental techniques to study and map the brain. I therefore developed a new plan to use what we know and apply biological principles to predictively reconstruct the brain and identify key experiments to enhance these predictions. You can call it predictive neuroscience. Predictively reconstructing and simulating the brain requires data-intensive supercomputing, which was inadequate when we started in 2005, so I became committed to shaping the evolution of supercomputing to meet our needs in neuroscience.

Q: Some people consider you a superstar in the field of life sciences. Some news reports have even compared you with Dr. Frankenstein. Are you comfortable with this celebrity status, infamous or otherwise?

I hardly read any of the stuff that is written about the project and me. I have learned that they are incapable of reporting the real story so they generally are doing an injustice to society. They like to focus on some sensational part of it and most often come to an interview with their own story in mind. It has, however, helped mobilize interest in the brain, which is good for everyone. One of my missions is to spark a brain race so that all countries get serious about understanding the brain. Currently the funding for the brain is a small fraction of the global cost of brain diseases to society.

Q: In an interview you once said that you were an average student until you discovered Latin in school. How did this interest transfer to science?

I was bored at school and liked sports much better. I was a cross-country and marathon runner, I played rugby, cricket, I swam – everything except study. Latin somehow woke up something and I realized that there are large unexplored territories waiting for someone to explore. The brain seemed the biggest frontier, so I started studying the brain.

Q: The Blue Brain Project was your first effort to reverse-engineer the mammalian brain. What insights were revealed by that project?

The most important insight is that we will not need to measure everything and map everything to faithfully reconstruct the brain as it is in biology. Most of the brain's structure and function is an emergent property, so you could be wasting a lot of time and money measuring things in the brain that would anyway emerge if you understand the underlying principles. We are on a hunt for the minimal data and most fundamental principles that allow the most detailed predictive reconstruction of the brain. One of many principles that we discovered is that a neuron in the brain does not project to another neuron in the brain. It simply sends its fibers to a region of the brain and lets the neurons there chose whether it wants to connect with that neuron. This way all the neurons in that region can equally chose which fibers they want to connect with. Even the section of the fibers follows a simple principle that a neuron will choose a fiber if the fiber touches it many times. This principle will make connection of all the neurons with trillions of synapses in a predictive reconstruction much easier than we thought before. There are many such principles we have derived. Another is that the robustness of the structural and functional design of the brain comes from the diversity of its elements (genes, proteins, neurons, etc). This diversity strangely enough makes sure we have many common features across individuals. Functionally, I think it is possible that volumes of tissue in the brain, rather than neurons or synapses, are the computational elements of the brain, but that is just one of many hypotheses that we can now explore.

Q: When do you think you'll be able to simulate a human brain? What is the most technologically challenging aspect to this?

I think we will have most of the key data, biological principles, and predictive algorithms ready by the time exascale supercomputing comes of age. We need exascale to get to a first draft of the human brain. Even then we will have to resort to multi-scale strategies to pragmatically manage the limitations of supercomputing. So, most of the supercomputing manufacturers believe that we will have exascale with the kind of memory we need by 2020 – at the latest by 2023.

Q: How do you plan to spend the research funding of 1 billion over the next 10 years?

We will build six ICT platforms (60% of the budget for neuroinformatics, brain simulation, high-performance computing, medical informatics, neurorobotics and neuromorphic computing) that will allow massive global collaborative research of the brain (CERN style), its diseases and developing of new brain-inspired computing technologies. About 20% of the budget is devoted to strategic mapping of the brain for specific data that is unlikely to be generated by the community in the next decade. The remaining 20% of the budget is devoted to awarding grants to fund research using the platforms.

Q: Do you spend most of your time researching these days or do you have time to teach as well at EPFL?

I spend about a quarter of my time on developing brain reconstruction algorithms, a quarter on working on student projects including experiments, a quarter on overseeing the development of the Blue Brain Project and a quarter on coordinating and launching the Human Brain Project.

Q: What is the nature of the cooperation you have with the other 80 institutions around the world regarding the Human Brain Project?

We have 13 sub-projects to build the six ICT platforms. Each works on a specific part required to build, launch and operate these platforms. In the future there will be more partners that focus on using the platforms to do novel research.

Q: What do you think about the recent announcement of the US 'BRAIN Initiative', America's brain mapping project? How would you compare it to the Human Brain Project?

It is great that countries such as the US have decided to elevate the priority for brain research. It is the single most important challenge for a healthy and productive society and the disease burden will cripple economies if we do not find new solutions. The technology they produce will help get better data on the brain. The Human Brain Project will use this data to validate the brain models we build. We hope other countries will also join the 'brain race'. Everyone will benefit from a brain race.

This interview was published by iSGTW at http://www.isgtw.org/feature/race-understand-human-brain.
"No Exascale for You!" An Interview with Berkeley Lab's Horst Simon2013-05-21T10:56:26+00:00Nages Sieslack/blog/author/nages/http://www.top500.org/blog/no-exascale-for-you-an-interview-with-berkeley-labs-horst-simon/
Although Horst Simon was named Deputy Director of Lawrence Berkeley National Laboratory, he maintains his strong ties to the scientific computing community as an editor of the TOP500 list and as an invited speaker at conferences.

Twice during the week of May 6, Simon gave back-to-back presentations of a new talk on "Why We Need Exascale and Why We Won't Get There by 2020." Not only was the talk a hit with conference attendees, but it also made its way onto Slashdot. In this HPCwire exclusive, Simon talks about his presentation with Jon Bashor of Berkeley Lab.

Simon is well positioned to discuss the path to exascale. An internationally recognized expert in computer science and applied mathematics, he joined Berkeley Lab in 1996 as director of the newly formed National Energy Research Scientific Computing Center (NERSC), and was one of the key architects in establishing NERSC at its new location in Berkeley. Under his leadership NERSC enabled important discoveries for research in fields ranging from global climate modeling to astrophysics. Simon was also the founding director of Berkeley Lab's Computational Research Division, which conducts applied research and development in computer science, computational science, and applied mathematics.

In his prior role as Associate Lab Director for Computing Sciences, Simon helped to establish Berkeley Lab as a world leader in providing supercomputing resources to support research across a wide spectrum of scientific disciplines. Simon's research interests are in the development of sparse matrix algorithms, algorithms for large-scale eigenvalue problems, and domain decomposition algorithms for unstructured domains for parallel processing. His algorithm research efforts were honored with the 1988 and the 2009 Gordon Bell Prize for parallel processing research. He was also member of the NASA team that developed the NAS Parallel Benchmarks, a widely used standard for evaluating the performance of massively parallel systems. He is co-editor of the twice-yearly TOP500 list that tracks the most powerful supercomputers worldwide, as well as related architecture and technology trends.

Question: On two consecutive days in early May, you gave a talk on "Why we need Exascale and why we won't get there by 2020," first at the IEEE Optical Interconnects meeting in Santa Fe and then at the Cray User Group meeting in Napa. What's your thinking that led to the presentation?

Horst Simon: Well, everybody is talking about Exascale these days. Petaflop/s systems are firmly established in the HPC ecosystem and people are looking ahead to when we will see an exaflops/s machine. My position is that the methods we have been using to predict when we cross certain thresholds, like teraflop/s and petaflop/s no longer apply.

Q: Why not?

Simon: The TOP500 List, of which I am one of four editors, is marking its 20th anniversary as the chronicler of HPC performance. When it was started 20 years ago, the technology was transitioning from vector systems to massively parallel processing systems, or MPP. Now, back then "massively parallel" referred to machines with 64, 128 or even 256 CPUs. The TOP500 list was created to help understand this transition and to define what was a "supercomputer."

If you look at the growth curve of performance over those 20 years, it is clearly influenced by Moore's Law and parallelism. It's not a surprising trajectory and if in 1992 someone said the first teraflop/s system would appear by such-and-such a date, they had a good chance of being correct. But we can't say that for the next eight to 10 years. For one thing, it's not clear what architecture will get us to exascale. Many look at the performance growth that is clearly visible over the last 20 years on the TOP500 list, and then just simply extend the straight line from today for another 10 or 12 years. This "straight line" extrapolation thinking is wrong. I think that the computing world faces a fundamental technology transition that will disrupt this simple extrapolation.

Q: How do current architectures fit into the picture?

Simon: We are currently following three different paths, each of which claims one of the top three slots on the latest TOP500 list.

The multicore path is built around high-end CPUs, such at Intel's x86, SPARC and IBM's Power 7. The Manycore/embedded approach uses many simpler, low power cores from embedded systems. Finally, there is the GPU/accelerator path using highly specialized processors from the gaming/graphics market space, such as NVIDIA's Fermi, the Cell processor and Intel's Xeon Phi (MIC).

Titan, the No. 1 system at Oak Ridge, uses the GPU/accelerator approach. The manycore embedded processor path has led to Blue Gene, which is as No. 2. And the K computer, using SPARC CPUs, is at No. 3.

One way to look at the race to exascale is as a swim meet. There are three swim lanes, each heading toward the same goal. But who do you bet on to win the race? If you choose too soon, your users cannot follow you. If you choose too late, you fall behind on the performance curve. And if you choose incorrectly, your users face multiple disruptive changes in the technology they rely on.

For the three swim lanes, the multicore path could hit a dead end, as seen by IBM's cancellation of its contract for Blue Waters. Is this an indication that multicore with complex cores is nearing the end of the line? In the embedded lane, Blue Gene is the last of the line. Will there be any more large-scale embedded multicore machines? And with GPU/accelerators, Intel bought Cray's interconnect technology and WhamCloud. Will Intel develop complete systems?

I'm willing to bet that by 2015, all top 10 systems on the TOP500 list will be GPU/accelerator-based.

Q: So, is there any good news out there in HPC?

Simon: Sure. First, the field is alive and well – there is worldwide interest in HPC as seen by more countries deploying large-scale systems. And if you look at the three swim lanes today, it's an exciting race with all three approaches thriving. IDC is predicting rapid growth over the next three years and many countries have exascale projects in motion.

Q: But back to the theme of your talk, why won't we get to exascale by 2020?

Simon: You could say that the end of the HPC world as we know it began in 2004, when we hit the inflection point of power use and clock speed. That's when we realized that we could not keep increasing clock speed due to power demands (and heat), but needed to move to much greater parallelism.

Exascale has been discussed in numerous workshops, conferences and planning meetings for about six years now. In 2006, I co-organized the first exascale town hall meetings that led to the first exascale report. This was done jointly with Rick Stevens of Argonne and Thomas Zacharia, then of Oak Ridge. The title of the report was "Modeling and Simulation at the Exascale for Energy and the Environment." In that paper, we noted that we were facing many changes in the design of supercomputers, but we didn't originally want to call this an "exascale" initiative. It was clear to us that the challenge was in managing new architectures, programming models, dealing with truly massive parallelism and solving the power problem. But Ray Orbach, then head of the DOE Office of Science, thought "Exascale" would make it easier for Congress to understand and support the concept. Instead of focusing on the technology challenges and the scientific impact, the initiative was packaged as a race to reach a fixed goal.

I think there continues to be a lot of vagueness in the overall discussion of exascale, as well as what it means to reach exascale. So, let me propose a concrete and measurable goal: Build a system before 2020 that will be No. 1 on the TOP500 list with an Rmax greater than 1 exaflop/s.

On a side note, I have a personal bet on this with Thomas Lippert, head of the Jülich supercomputing center in Germany, that we will not reach this goal by November 2019. The bet is for $2,000 or €2000, and I think I will win. But I'd rather lose if it means we would have an exascale system by then.

Q: Ok, so you have personal stake in this. But what are the obstacles to getting there?

Simon: It's not a single big technical issue, but rather a combination of challenges.

The first is just measuring the performance of such a system. Even at petascale, running the LINPACK benchmark is a challenge – you have to turn the whole machine over for 25 to 30 hours. When center managers are under pressure to make as many cycles available as possible, how many 30-hour LINPACK runs can be tolerated? At exascale, it will take five to six days to run the same LINPACK benchmark.

Then there are the total power issues. The K computer uses 12 to 13 megawatts. The machines are scalable, but the buildings, power supplies, etc., are not.

The increasing trend in power efficiency – though it might look like a gradual slope over time, is really a one-time gain that came from switching to accelerator/manycore in 2010. This is not a sustainable trend in the absence of other new technology. There is no more magic – we're maxed out. Right now, the most efficient system needs one to two megawatts per petaflop/s. Multiply that by 1,000 to get to exascale and the power is simply unaffordable.

Also, data movement will cost more than flops (even on the chip). Limited amounts of memory and low memory/flop ratios will make processing virtually free. In fact, the amount of memory is relatively decreasing, scaling far worse than computation. This is a challenge that's not being addressed and it's not going to get less expensive by 2018.

But I do need to point out that there is progress in exascale in the U.S. with many projects now focused and on their way, including DOE's FastForward, Xstack and co-design centers.

I also think calling the system exa-anything is a bad idea. It's become a bad brand, associated with buying big machines for a few national labs. It also sets the community up for a perceived failure if we don't get to exaflops. As an example of avoiding a bad name, the project at CERN was named the Large Hadron Collider, not the "Higgs Boson Finder." The LHC would have been also successful if there would have been no Higgs, because it would have led to new physics. However, an "exascale" initiative that does not produce an exaflop/s system will likely be seen as a failure, no matter how much great science we can do on the systems being developed.

Q: You mentioned "old" HPC in your presentation. Can you elaborate on that? And maybe explain what you think "new" HPC is?

Simon: We are actually changing the whole computational model and current programming systems have the wrong optimization targets. For example, the "old" HPC constraints were peak clock frequency as the primary limiter for performance improvement; flop/s are the biggest cost for systems, so they are optimized for compute; concurrency was modestly increased by adding nodes; for memory scaling we maintain byte-per-flop capacity and bandwidth; we assume uniform system performance; and reliability is seen as the hardware's problem.

In "new" HPC, power is the primary design constraint for future HPC system design; data movement dominates costs, so we need to optimize to minimize data movement; to increase concurrency we look to exponential growth of parallelism within chips. As I mentioned, memory scaling is a big constraint, with compute growing two times faster than capacity or bandwidth. Due to heterogeneity, architectural and performance non-uniformity will increase and when it comes to reliability, we cannot count on hardware protection alone.

This "new" reality fundamentally breaks our current programming paradigm and computing ecosystem.

Q: You also mentioned in your talk that exascale computing, if we can call it that, will usher in a different kind of computational science. Can you give an example?

Simon: I think we really need to think about the new applications that will emerge in the next 10 years. The BRAIN Project, or Brain Research through Advancing Innovative Neurotechnologies, is a $100 million proposal by President Obama in his FY2014 budget. The goal is to create real-time traffic maps to provide new insights into brain disorders. As many people know, using HPC to study, understand and simulate brain functions is an ongoing research area. A straightforward extrapolation of the resources needed to create a real-time human brain scale simulation shows we need about 1 to 10 exaflop/s with 4 petabytes of memory. So in addition to all the existing science challenges that require computational resources, there are clearly exciting new ones that the computing community needs to take on.

As an aside, and I always like to make this point: the most optimistic current predictions for exascale computers in 2020 envision a power consumption of – at best – 20 to 30 megawatts. By contrast, the human brain takes about 20 to 40 watts. So, even under best assumptions in 2020, our brain will still be a million times more power efficient.

Q: You've addressed half the title of your talk – why we won't get to exascale by 2020. Can you conclude by talking about why we need exascale computing?

Simon: To maintain the U.S. competitive advantage, we need exascale resources. For example, digital design and prototyping at exascale will enable rapid delivery of new products by minimizing the need for expensive, dangerous, and/or inaccessible testing. I think exascale could be the potential key differentiator for American competitiveness and that we need strategic partnerships between DOE labs and industrial partners to develop and scale applications to exascale levels.

Exascale computing is also key for our national security. Other countries are making plans for exascale and this could impact our security – former Defense Secretary Robert Gates said in a 2011 interview with the New York Times that one nation with a growing global presence is much farther ahead in aircraft design than our intelligence services had thought, and HPC plays a very important role in aircraft design.

Finally, exascale technologies are the foundation for future leadership in computing. We have the lead and shouldn't declare victory and go home. I recently read Niall Ferguson's book "Civilization – the West and the Rest". In the book, Ferguson recalls the story of Zheng He, a Chinese admiral who sailed from China to Indonesia, , to India and as far as the east coast of Africa in 1416. This was decades before Spanish and Portuguese explorers started their voyages. The potential for trade and economic gain from such trade routes was enormous, but the Chinese emperor decided that such exploration was a waste of money and abruptly canceled any further trips – when China was ahead.

The U.S. is not the only country capable of achieving exascale computing. But just like the Chinese emperor in the 15th century, Congress has stopped us now with insufficient funding to move ahead and explore the new frontiers of computing. If we stop now, the country that is first to exascale will have significant competitive, intellectual, technological and economic advantages. And achieving the power efficiency and reliability goals we need for exascale will have enormous positive impacts on consumer electronics and business information technologies and facilities. As I said, other countries are also in this race, motivated both by the tangible advantages to be gained and the national pride of being first to the finish line.

This article originates from HPCwire (www.hpcwire.com) http://www.hpcwire.com/hpcwire/2013-05-15/no_exascale_for_you_an_interview_with_nersc_s_horst_simon.html


text:
FAIR conference: Secret Mormon codes and Egyptian papers
SANDY, Utah — The applause was loud and sustained when William Schryver finished his presentation at the FAIR conference on Friday. "I guess some people really liked that," one man said after the clapping. "I couldn't understand what he was talking about."
What Schryver was talking about was how he solved part of a mystery that involved ancient Egyptian papyri, secret codes and the Knights Templar. It was nothing less than a paradigm shift in how scholars could approach the 1835 Kirtland Egyptian Papers.
The papers are a puzzling hodgepodge of hieroglyphics, speculative definitions, tables, charts, notebooks and documents that apparently deal with the Book of Abraham, part of the canon of scriptures of The Church of Jesus Christ of Latter-day Saints.
The Kirtland Egyptian Papers date from the same time in Kirtland, Ohio, when LDS Church members purchased a collection of Egyptian papyri from a traveling exhibition. Joseph Smith then claimed to have translated by revelation the ancient record of Abraham.
For the past 40 years, the portion of the papers that garnered the most interest were a set of documents that had Egyptian characters in the left column and the words of the Book of Abraham on the right. The characters were copied off a particular piece of papyrus.
Critics said the Abraham text documents were a record of church founder Joseph Smith attempting a pseudo-academic method of translating the Book of Abraham: He would write down a character from the papyrus and then give the translation.
Some Mormon scholars, on the other hand, said the documents were probably a failed attempt by Smith's associates to use the already revealed text like a Rosetta Stone to decipher the Egyptian language.
At first glance, the characters appeared to be copied in the same order they were on the papyrus. This is exactly what one would expect to find if someone was attempting to translate the papyrus.
But Egyptologist John Gee, senior research fellow at the Neal A. Maxwell Institute for Religious Scholarship at BYU, examined the claim closely. Schryver read Gee's findings at the conference.
The first line of characters on the papyrus was indeed copied in the exact same order on the documents. But then the order is gone. After the first line, the characters were taken willy-nilly from all over the papyrus.
"If the characters in the left hand margin were thought to be translated by the words on the right, they should have been taken in order," Gee wrote, "but they were not. The theory as propounded does not pass the sobriety test: It cannot follow a straight line."
If the Kirtland Egyptian Papers were not an attempt to translate the Egyptian, what were they?
Schryver, a software engineer, expanded his examination of the papers to two other sets of Kirtland Egyptian Papers documents he referred to as the alphabet and the grammar. Like the Abraham text documents, the alphabet and grammar had characters in columns with definitions. Some characters had multiple definitions ranging from basic dictionary-like descriptions to extensive paragraphs.
By breaking the information down in databases, Schryver began to see a connection between the alphabet and grammar and the text of the Book of Abraham. It was like someone took the Book of Abraham text, cut it into pieces and used some of the pieces as definitions in the alphabet and grammar.
Schryver realized this process could only work one way. The alphabet and grammar relied upon a pre-existing text of the Book of Abraham.
He was also surprised to learn that the alphabet and grammar had pieces and allusions to other scriptures like Doctrine and Covenants 76 and 88 among its definitions.
- Faith and fame: Former 'Dancing With the...
- LDS Church outlines how it prevents child...
- One year ago, founding member of SEAL Team...
- Mormon man's rap album hits No. 1 spot on...
- 'One in Charity': Thousands gather for 40th...
- LDS Church hires assistant church historian...
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- Up-close view of angel Moroni statue being...
- BYU will buy Provo High School for... 48
- LDS Church hires assistant church... 40
- Defending the Faith: Taking a 'Leap of... 34
- New poll finds Americans less likely to... 27
- Should your boss know that you keep the... 25
- ... 17
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subset: commoncrawl


text:
6 items found in this collection
At the telephone; Blanche Ring's telephone song; His Majesty
My grandfather's girl; Jane O'Day
In the good old summer time; The defender
Bing! bang! bing 'em on the Rhine
Tell the band to play an Irish tune
I've got rings on my fingers; Mumbo, jumbo, jijjiboo J. O'Shay; Yankee girl
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text:
Shou Zen Japanese Cuisine is the newly opened restaurant under Confiserie Benji Limited. The revenue generated from Shou Zen Japanese Cuisine, La Parole French Restaurant and Leonidas Hong Kong Chocolate Shops, after deducting the necessary expenses, are contributed to Benji's Centre to help children with speech and communication problems from low-income families and enable them to integrate into the community.
Confiserie Benji Limited, founded in 2002, was titled as a Social Enterprise by the Government of HKSAR. Benji's Centre, found in 2004, is the first and only non-profit charitable organization providing specialized professional one-to-one speech therapy to children and teenagers with communication problems from low income families in Hong Kong.
Benji's Centre is providing over 260 children with intensive individual therapies and has helped over 1,200 children since its establishment. 70% of children enjoy fee remission, the remaining 30% pay a fee equal to half


text:
Angelina Jolie's stubborn daughterAngelina Jolie's daughter is "strong-willed".
The 'Salt' actress - who raises six children with partner Brad Pitt - insists that she couldn't deter four-year-old Shiloh from wanting to dress like a boy, even if she wanted to change the youngster.
She said: "I have a verystrong-willed four-year-old girl who tells me what she wants to wear and I let her be who she is.
"I think people think kids should be a certain way, but I feel they should wear what they feel like wearing and they should express themselves. Shiloh cried one night and said, 'Please cut my hair off. I don't want to have long hair.' I'm not going to leave it long just because somebody thinks I should."
The 35-year-old beauty also spoke of how much she enjoys "date nights" with Brad away from their family.
She added: "You have to have date nights if you have children. Sometimes we'll ask a babysitter to spend the night so we can go out, but sometimes we just go to another part of the house."
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