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An integrated circuit memory device is designed for high speed data access and for compatibility with existing memory systems. An address strobe signal is used to latch a first address. During a burst access cycle the address is incremented internal to the device with additional address strobe transitions. A new memory address is only required at the beginning of each burst access. Read/Write commands are issued once per burst access eliminating the need to toggle the Read/Write control line at the device cycle frequency. Transitions of the Read/Write control line during a burst access will terminate the burst access, reset the burst length counter and initialize the device for another burst access. The device is compatible with existing Extended Data Out DRAM device pinouts, Fast Page Mode and Extended Data Out Single In-Line Memory Module pinouts, and other memory circuit designs.
1. A memory device having an output enable pin for enabling data to be driven from the memory device and a data output node for driving data from the memory device, comprising:
means for reading data from the memory device in response to an address strobe signal; and
means for placing the data output node in a high impedance state in response to a transition of an output enable signal on the output enable pin, and for maintaining the data output node in a high impedance state despite additional transitions of the output enable signal prior to an additional transition of the address strobe signal.
2. A Memory Module comprising:
a memory device;
a plurality of address signal lines coupled to the memory device to provide an address to the memory device;
an address generation circuit within the memory device, coupled to an address latch signal line, for receiving and advancing the address, to provide multiple data accesses of the memory device in synchronization with multiple transitions of a signal on the address latch signal line after only one address is received; and
at least one data node for transferring data to and from the memory module, wherein data from a first address received from the plurality of address signal lines is driven from the memory module offset in time from when the first address is received, by a predetermined number of transitions of the signal on the address latch signal line.
This is a continuation of application Ser. No. 08/370,761, filed Dec. 23, 1994 now U.S. Pat. No. 5,526,320.
This invention relates to memory device architectures designed to provide high density data storage with high speed read and write access cycles.
Dynamic Random Access Memory devices (DRAMs) are among the highest volume and most complex integrated circuits manufactured today. Except for their high volume production, the state of the art manufacturing requirements of these devices would cause them to be exorbitantly priced. Yet, due to efficiencies associated with high volume production, the price per bit of these memory devices is continually declining. The low cost of memory has fueled the growth and development of the personal computer. As personal computers have become more advanced, they in turn have required faster and more dense memory devices, but with the same low cost of the standard DRAM. Fast page mode DRAMs are the most popular standard DRAM today. In fast page mode operation, a row address strobe (/RAS) is used to latch a row address portion of a multiplexed DRAM address. Multiple occurrences of the column address strobe (/CAS) are then used to latch multiple column addresses to access data within the selected row. On the falling edge of /CAS an address is latched, and the DRAM outputs are enabled. When /CAS transitions high the DRAM outputs are placed in a high impedance state (tri-state). With advances in the production of integrated circuits, the internal circuitry of the DRAM operates faster than ever. This high speed circuitry has allowed for faster page mode cycle times. A problem exists in the reading of a DRAM when the device is operated with minimum fast page mode cycle times. /CAS may be low for as little as 15 nanoseconds, and the data access time from /CAS to valid output data (tCAC) may be up to 15 nanoseconds; therefore, in a worst case scenario there is no time to latch the output data external to the memory device. For devices that operate faster than the specifications require, the data may still only be valid for a few nanoseconds. On a heavily loaded microprocessor memory bus, trying to latch an asynchronous signal that is valid for only a few nanoseconds is very difficult. Even providing a new address every 35 nanoseconds requires large address drivers which create significant amounts of electrical noise within the system. To increase the data throughput of a memory system, it has been common practice to place multiple devices on a common bus. For example, two fast page mode DRAMs may be connected to common address and data buses. One DRAM stores data for odd addresses, and the other for even addresses. The /CAS signal for the odd addresses is turned off (high) when the /CAS signal for the even addresses is turned on (low). This interleaved memory system provides data access at twice the rate of either device alone. If the first /CAS is low for 20 nanoseconds and then high for 20 nanoseconds while the second /CAS goes low, data can be accessed every 20 nanoseconds or 50 megahertz. If the access time from /CAS to data valid is fifteen nanoseconds, the data will be valid for only five nanoseconds at the end of each 20 nanosecond period when both devices are operating in fast page mode. As cycle times are shortened, the data valid period goes to zero.
There is a demand for faster, higher density, random access memory integrated circuits which provide a strategy for integration into today's personal computer systems. In an effort to meet this demand, numerous alternatives to the standard DRAM architecture have been proposed. One method of providing a longer period of time when data is valid at the outputs of a DRAM without increasing the fast page mode cycle time is called Extended Data Out (EDO) mode. In an EDO DRAM the data lines are not tri-stated between read cycles in a fast page mode operation. Instead, data is held valid after /CAS goes high until sometime after the next /CAS low pulse occurs, or until /RAS or the output enable (/OE) goes high. Determining when valid data will arrive at the outputs of a fast page mode or EDO DRAM can be a complex function of when the column address inputs are valid, when /CAS falls, the state of /OE and when /CAS rose in the previous cycle. The period during which data is valid with respect to the control line signals (especially /CAS) is determined by the specific implementation of the EDO mode, as adopted by the various DRAM manufacturers.
Methods to shorten memory access cycles tend to require additional circuitry, additional control pins and nonstandard device pinouts. The proposed industry standard synchronous DRAM (SDRAM)for example has an additional pin for receiving a system clock signal. Since the system clock is connected to each device in a memory system, it is highly loaded, and it is always toggling circuitry in every device. SDRAMs also have a clock enable pin, a chip select pin and a data mask pin. Other signals which appear to be similar in name to those found on standard DRAMs have dramatically different functionality on a SDRAM. The addition of several control pins has required a deviation in device pinout from standard DRAMs which further complicates design efforts to utilize these new devices. Significant amounts of additional circuitry are required in the SDRAM devices which in turn result in higher device manufacturing costs.
In order for existing computer systems to use an improved device having a nonstandard pinout, those systems must be extensively modified. Additionally, existing computer system memory architectures are designed such that control and address signals may not be able to switch at the frequencies required to operate the new memory device at high speed due to large capacitive loads on the signal lines. The Single In-Line Memory Module (SIMM) provides an example of what has become an industry standard form of packaging memory in a computer system. On a SIMM, all address lines connect to all DRAMs. Further, the row address strobe (/RAS) and the write enable (/WE) are often connected to each DRAM on the SIMM. These lines inherently have high capacitive loads as a result of the number of device inputs driven by them. SIMM devices also typically ground the output enable (/OE) pin making /OE a less attractive candidate for providing extended functionality to the memory devices.
There is a great degree of resistance to any proposed deviations from the standard SIMM design due to the vast number of computers which use SIMMs. Industry's resistance to radical deviations from the standard, and the inability of current systems to accommodate the new memory devices will delay their widespread acceptance. Therefore only limited quantities of devices with radically different architectures will be manufactured initially. This limited manufacture prevents the reduction in cost which typically can be accomplished through the manufacturing improvements and efficiencies associated with a high volume product.
An integrated circuit memory device with a standard DRAM pinout is designed for high speed data access and for compatibility with existing memory systems. A high speed burst mode of operation is provided where multiple sequential accesses occur following a single column address, and read data is output relative to the /CAS control signal. In the burst mode of operation the address is incremented internal to the device eliminating the need for external address lines to switch at high frequencies. Read/Write commands are issued once per burst access eliminating the need to toggle the Read/Write control line at high speeds. Only one control line per memory chip (/CAS) must toggle at the operating frequency in order to clock the internal address counter and the data input/output latches. The load on each /CAS is typically less than the load on the other control signals (/RAS, /WE and /OE) since each /CAS typically controls only a byte width of the data bus. Internal circuitry of the memory device is largely compatible with existing Extended Data Out (EDO) DRAMs. This similarity allows the two part types to be manufactured on one die with a limited amount of additional circuitry. The ability to switch between a standard non-burst mode and a high speed burst mode allows the device to be used to replace standard devices, and eliminates the need to switch to more complex high speed memory devices. Internal address generation provides for faster data access times than is possible with either fast page mode or EDO DRAMs. This high speed operation eliminates the need to interleave memory devices in order to attain a high data throughput. In contrast to the 50 megahertz interleaved memory system described above, the output data from this device will be valid for approximately 15 nanoseconds significantly easing the design of circuitry required to latch the data from the memory. The device is compatible with existing memory module pinouts including Single In-Line Memory Module (SIMM), Multi-Chip Module (MCM) and Dual In-Line Memory Module (DIMM) designs. This combination of features allows for significant system performance improvements with a minimum of design alterations.
The features of the invention as well as objects and advantages will be best understood by reference to the appended claims, detailed description of particular embodiments and accompanying drawings where:
FIG. 1 is an electrical schematic diagram of a memory device in accordance with one embodiment of the invention;
FIG. 2 is a table showing linear versus interleaved addressing formats;
FIG. 3 is a pinout of the memory device of FIG. 1;
FIG. 4 is a timing diagram for a method of accessing the device of FIG. 1;
FIG. 5 is a further timing diagram for accessing the device of FIG. 1;
FIG. 6 is an electrical schematic diagram of a Single In-Line Memory Module in accordance with another embodiment of the invention;
FIG. 7 is a front view of a Single In-Line Memory Module designed in accordance with the teachings of this invention; and
FIG. 8 is a table of the pin numbers and signal names of the Single In-Line Memory Module of FIG. 7.
FIG. 1 is a schematic representation of a sixteen megabit device designed in accordance with the present invention. The device is organized as a 2 Meg×8 burst EDO DRAM having an eight bit data input/output path 10 providing data storage for 2,097,152 bytes of information in the memory array 12. The device of FIG. 1 has an industry standard pinout for eight bit wide EDO DRAMs. An active-low row address strobe (/RAS) signal 14 is used to latch a first portion of a multiplexed memory address, from address inputs A0 through A10 16, in latch 18. The latched row address 20 is decoded in row decoder 22. The decoded row address is used to select a row of the memory array 12. A column address strobe (/CAS) signal 24 is used to latch a second portion of a memory address from address inputs 16 into column address counter 26. The latched column address 28 is decoded in column address decoder 30. The decoded column address is used to select a column of the memory array 12.
In a burst read cycle, data within the memory array located at the row and column address selected by the row and column address decoders is read out of the memory array and sent along data path 32 to output latches 34. Data 10 driven from the burst EDO DRAM may be latched external to the device in synchronization with /CAS after a predetermined number of /CAS cycle delays (latency). For a two cycle latency design, the first /CAS falling edge is used to latch the initial address for the burst access. The first burst data from the memory is driven from the memory after the second /CAS falling edge, and remains valid through the third /CAS falling edge. Once the memory device begins to output data in a burst read cycle, the output drivers 34 will continue to drive the data lines without tri-stating the data outputs during /CAS high intervals dependent on the state of the output enable and write enable (/OE and /WE) control lines, thus allowing additional time for the system to latch the output data. Once a row and a column address are selected, additional transitions of the /CAS signal are used to advance the column address within the column address counter in a predetermined sequence. The time at which data will be valid at the outputs of the burst EDO DRAM is dependent only on the timing of the /CAS signal provided that /OE is maintained low, and /WE remains high. The output data signal levels may be driven in accordance with standard CMOS, TTL, LVTTL, GTL, or HSTL output level specifications.
The address may be advanced linearly, or in an interleaved fashion for maximum compatibility with the overall system requirements. FIG. 2 is a table which shows linear and interleaved addressing sequences for burst lengths of 2,4 and 8 cycles. The "V" for starting addresses A1 and A2 in the table represent address values that remain unaltered through the burst sequence. The column address may be advanced with each /CAS transition, each pulse, or multiple of /CAS pulses in the event that more than one data word is read from the array with each column address. When the address is advanced with each transition of the /CAS signal, data is also driven from the part after each transition following the device latency which is then referenced to each edge of the /CAS signal. This allows for a burst access cycle where the highest switching control line (/CAS) toggles only once (high to low or low to high) for each memory cycle. This is in contrast to standard DRAMs which require /CAS to go low and then high for each cycle, and synchronous DRAMs which require a full clock cycle (high and low transitions) for each memory cycle. For maximum compatibility with existing EDO DRAM devices, the invention will be further described in reference to a device designed to latch and advance a column address on falling edges of the /CAS signal.
It may be desirable to latch and increment the column address after the first /CAS falling edge in order to apply both the latched and incremented addresses to the array at the earliest opportunity in an access cycle. For example, a device may be designed to access two data words per cycle (prefetch architecture). The memory array for a prefetch architecture device may be split into odd and even array halves. The column address least significant bit is then used to select between odd and even halves while the other column address bits select a column within each of the array halves. In an interleaved access mode with column address 1, data from columns 0 and 1 would be read and the data from column 1 would be output followed by the data from column 0 in accordance with standard interleaved addressing as described in SDRAM specifications. In a linear access mode column address 1 would be applied to the odd array half, and incremented to address 2 for accessing the even array half to fulfill the two word access. One method of implementing this type of device architecture is to provide a column address incrementing circuit between the column address counter and the even array half. The incrementing circuit would increment the column address only if the initial column address in a burst access cycle is odd, and the address mode is linear. Otherwise the incrementing circuit would pass the column address unaltered. For a design using a prefetch of two data accesses per cycle, the column address would be advanced once for every two active edges of the /CAS signal. Prefetch architectures where more than two data words are accessed are also possible.
Other memory architectures applicable to the current invention include a pipelined architecture where memory accesses are performed sequentially, but each access may require more than a single cycle to complete. In a pipelined architecture the overall throughput of the memory will approach one access per cycle, but the data out of the memory may be offset by a number of cycles due to the pipeline length and/or the desired latency from /CAS.
In the burst access memory device, each new column address from the column address counter is decoded and is used to access additional data within the memory array without the requirement of additional column addresses being specified on the address inputs 16. This burst sequence of data will continue for each /CAS falling edge until a predetermined number of data accesses equal to the burst length has occurred. A /CAS falling edge received after the last burst address has been generated will latch another column address from the address inputs 16 and a new burst sequence will begin. Read data is latched and output with each falling edge of /CAS after the first /CAS latency.
For a burst write cycle, data 10 is latched in input data latches 34. Data targeted at the first address specified by the row and column addresses is latched with the /CAS signal when the first column address is latched (write cycle data latency is zero). Other write cycle data latency values are possible; however, for today's memory systems, zero is preferred. Additional input data words for storage at incremented column address locations are latched by /CAS on successive /CAS pulses. Input data from the input latches 34 is passed along data path 32 to the memory array where it is stored at the location selected by the row and column address decoders. As in the burst read cycle previously described, a predetermined number of burst access writes will occur without the requirement of additional column addresses being provided on the address lines 16. After the predetermined number of burst writes has occurred, a subsequent /CAS pulse will latch a new beginning column address, and another burst read or write access will begin.
The memory device of FIG. 1 may include the option of switching between burst EDO and standard EDO modes of operation. In this case, the write enable signal /WE 36 may be used at the row address latch time (/RAS falling, /CAS high) to determine whether memory accesses for that row will be burst or page mode cycles. If /WE is low when /RAS falls, burst access cycles are selected. If /WE is high at /RAS falling, standard extended data out (EDO) page mode cycles are selected. Both the burst and EDO page mode cycles allow for increased memory device operating frequencies by not requiring the data output drivers 34 to place the data lines 10 in a high impedance state between data read cycles while /RAS is low. DRAM control circuitry 38, in addition to performing standard DRAM control functions, controls the I/O circuitry 34 and the column address counter/latch 26 in accordance with the mode selected by /WE when /RAS falls. In a burst mode only DRAM, or in a device designed with an alternate method of switching between burst and non-burst access cycles, the state of /WE when /RAS falls may be used to switch between other possible modes of operation such as interleaved versus linear addressing modes.
The write enable signal is used in burst access cycles to select read or write burst accesses when the initial column address for a burst cycle is latched by /CAS. /WE low at the column address latch time selects a burst write access. /WE high at the column address latch time selects a burst read access. The level of the /WE signal must remain high for read and low for write burst accesses throughout the burst access. A low to high transition within a burst write access will terminate the burst access, preventing further writes from occurring. A high to low transition on /WE within a burst read access will likewise terminate the burst read access and will place the data output 10 in a high impedance state. Transitions of the /WE signal may be locked out during critical timing periods within an access cycle in order to reduce the possibility of triggering a false write cycle. After the critical timing period the state of /WE will determine whether a burst access continues, is initiated, or is terminated. Termination of a burst access resets the burst length counter and places the DRAM in a state to receive another burst access command. Both /RAS and /CAS going high during a burst access will also terminate the burst access cycle placing the data drivers in a high impedance output state, and resetting the burst length counter. Read data may remain valid at the device outputs if /RAS alone goes high while /CAS is active for compatibility with hidden refresh cycles, otherwise /RAS high alone may be used to terminate a burst access. A minimum write enable pulse width is only required when it is desired to terminate a burst read and then begin another burst read, or terminate a burst write prior to performing another burst write with a minimum delay between burst accesses. In the case of burst reads, /WE will transition from high to low to terminate a first burst read, and then /WE will transition back high prior to the next falling edge of /CAS in order to specify a new burst read cycle. For burst writes, /WE would transition high to terminate a current burst write access, then back low prior to the next falling edge of /CAS to initiate another burst write access.
A basic implementation of the device of FIG. 1 may include a fixed burst length of 4, a fixed /CAS latency of 2 and a fixed interleaved sequence of burst addresses. This basic implementation requires very little additional circuitry to the standard EDO page mode DRAM, and may be mass produced to provide the functions of both the standard EDO page mode and burst EDO DRAMs. This device also allows for the output enable pin (/OE) to be grounded for compatibility with many SIMM module designs. When not disabled (tied to ground), /OE is an asynchronous control which will prevent data from being driven from the part in a read cycle if it is inactive (high) prior to /CAS falling and remains inactive beyond /CAS rising. If these setup and hold conditions are not met, then the read data may be driven for a portion of the read cycle. It is possible to synchronize the /OE signal with /CAS, however this would typically increase the /CAS to data valid delay time and doesn't allow for the read data to be disabled prior to /RAS high without an additional /CAS low pulse which would otherwise be unnecessary. In a preferred embodiment, if /OE transitions high at any time during a read cycle the outputs will remain in a high impedance state until the next falling edge of /CAS despite further transitions of the /OE signal.
Programmability of the burst length, /CAS latency and address sequences may be accomplished through the use of a mode register 40 which latches the state of one or more of the address input signals 16 or data signals 10 upon receipt of a write-/CAS-before-/RAS (WCBR) programming cycle. In such a device, outputs 44 from the mode register control the required circuits on the DRAM. Burst length options of 2, 4, 8 and full page as well as /CAS latencies of 1, 2 and 3 may be provided. Other burst length and latency options may be provided as the operating speeds of the device increase, and computer architectures evolve. The device of FIG. 1 includes programmability of the address sequence by latching the state of the least significant address bit during a WCBR cycle. The burst length and /CAS latency for this particular embodiment are fixed. Other possible alterations in the feature sets of this DRAM include having a fixed burst mode only, selecting between standard fast page mode (non-EDO) and burst mode, and using the output enable pin (/OE) 42 in combination with /RAS to select between modes of operation. Also, a WCBR refresh cycle could be used to select the mode of operation rather than a control signal in combination with /RAS. A more complex memory device may provide additional modes of operation such as switching between fast page mode, EDO page mode, static column mode and burst operation through the use of various combinations of /WE and /OE at /RAS falling time. One mode from a similar set of modes may be selected through the use of a WCBR cycle using multiple address or data lines to encode the desired mode. Alternately, a device with multiple modes of operation may have wire bond locations, or programmable fuses which may be used to program the mode of operation of the device.
A preferred embodiment of a sixteen bit wide burst EDO mode DRAM designed in accordance with the teachings of this invention has two column address strobe input pins /CASH and /CASL. For read cycles only /CASL needs to toggle. /CASH is may be high or may toggle with /CASL during burst read cycles, all sixteen data bits will be driven out of part during a read cycle even if /CASH remains inactive. In a typical system application, a microprocessor will read all data bits on a data bus in each read cycle, but may only write certain bytes of data in a write cycle. Allowing one of the /CAS control signals to remain static during read cycles helps to reduce overall power consumption and noise within the system. For burst write access cycles, each of the /CAS signals (CASH and /CASL) acts as a write enable for an eight bit width of the data. All sixteen data inputs will be latched when the first of the /CAS signals transitions low. If only one /CAS signal transitions low, then the eight bits of data associated with the /CAS that remained high will not be stored in the memory.
The present invention has been described with reference to several preferred embodiments. Just as fast page mode DRAMs and EDO DRAMs are available in numerous configurations including x1, x4, x8 and x16 data widths, and 1 Megabit, 4 Megabit, 16 Megabit and 64 Megabit densities; the memory device of the present invention may take the form of many different memory organizations. It is believed that one who is skilled in the art of integrated circuit memory design can, with the aide of this specification design a variety of memory devices which do not depart from the spirit of this invention. It is therefore believed that detailed descriptions of the various memory device organizations applicable to this invention are not necessary.
FIG. 3 shows a preferred pinout for the device of FIG. 1. It should be noted that the pinout for this new burst EDO memory device is identical to the pinout for a standard EDO DRAM. The common pinout allows this new device to be used in existing memory designs with minimum design changes. The common pinout also allows for ease of new designs by those of skill in the art who are familiar with the standard EDO DRAM pinout. Variations of the described invention which maintain the standard EDO DRAM pinout include driving the /CAS pin with a system clock signal to synchronize data access of the memory device with the system clock. For this embodiment, it may be desirable to use the first /CAS active edge after /RAS falls to latch the row address, a later edge may be used to latch the first column address of a burst access cycle. After row and column addresses are latched within the device, the address may be incremented internally to provide burst access cycles in synchronization with the system clock. Other pin function alternatives include driving the burst address incrementing signal on the /OE pin since the part does not require a data output disable function on this pin. Other alternate uses of the /OE pin also allow the device to maintain the standard EDO pinout, but provide increased functionality such as burst mode access. The /OE pin may be used to signal the presence of a valid column starting address, or to terminate a burst access. Each of these embodiments provides for a high speed burst access memory device which may be used in current memory systems with a minimum amount of redesign.
FIG. 4 is a timing diagram for performing a burst read followed by a burst write of the device of FIG. 1. In FIG. 4, a row address is latched by the /RAS signal. /WE is low when /RAS falls for an embodiment of the design where the state of the /WE pin is used to specify a burst access cycle at /RAS time. Next, /CAS is driven low with /WE high to initiate a burst read access, and the column address is latched. The data out signals (DQ's) are not driven in the first /CAS cycle. On the second falling edge of the /CAS signal, the internal address generation circuitry advances the column address and begins another access of the array, and the first data out is driven from the device after a /CAS to data access time (tCAC). Additional burst access cycles continue, for a device with a specified burst length of four, until the fifth falling edge of /CAS which latches a new column address for a new burst read access. /WE falling in the fifth /CAS cycle terminates the burst access, and initializes the device for additional burst accesses. The sixth falling edge of /CAS with /WE low is used to latch a new burst address, latch input data and begin a burst write access of the device. Additional data values are latched on successive /CAS falling edges until /RAS rises to terminate the burst access.
FIG. 5 is a timing diagram depicting burst write access cycles followed by burst read cycles. As in FIG. 4, the /RAS signal is used to latch the row address. The first /CAS falling edge in combination with /WE low begins a burst write access with the first data being latched. Additional data values are latched with successive /CAS falling edges, and the memory address is advanced internal to the device in either an interleaved or sequential manner. On the fifth /CAS falling edge a new column address and associated write data are latched. The burst write access cycles continue until the /WE signal goes high in the sixth /CAS cycle. The transition of the /WE signal terminates the burst write access. The seventh /CAS low transition latches a new column address and begins a burst read access (/WE is high). The burst read continues until /RAS rises terminating the burst cycles.
It should be noted from FIGS. 3 and 4, that for burst read cycles the data remains valid on the device outputs as long as the /OE pin is low, except for brief periods of data transition. Also, since the /WE pin is low prior to or when /CAS falls, the data input/output lines are not driven from the part during write cycles, and the /OE pin is a "don't care". Only the /CAS signal and the data signals toggle at relatively high frequency, and no control signals other than /CAS are required to be in an active or inactive state for one /CAS cycle time or less. This is in contrast to SDRAMs which often require row address strobes, column address strobes, data mask, and read/write control signals to be valid for one clock cycle or less for various device functions. Typical DRAMs also allow for the column address to propagate through to the array to begin a data access prior to /CAS falling. This is done to provide fast data access from /CAS falling if the address has been valid for a sufficient period of time prior to /CAS falling for the data to have been accessed from the array. In these designs an address transition detection circuit is used to restart the memory access if the column address changes prior to /CAS falling. This method actually requires additional time for performing a memory access since it must allow for a period of time at the beginning of each memory cycle after the last address transition to prepare for a new column address. Changes in the column address just prior to /CAS falling may increase the access time by approximately five nanoseconds. An embodiment of the present invention will not allow the column address to propagate through to the array until after /CAS has fallen. This eliminates the need for address transition detection circuitry, and allows for a fixed array access relative to /CAS.
FIG. 6 is a schematic representation of a single in-line memory module (SIMM) designed in accordance with the present invention. The SIMM has a standard SIMM module pinout for physical compatibility with existing systems and sockets. Functional compatibility with EDO page mode SIMMs is maintained when each of the 2 Meg×8 memory devices 10, 12, 14 and 16 are operated in an EDO page mode. Each of the /CAS signals 18, 20, 22 and 24 control one byte width of the 32 bit data bus 26, 28, 30 and 32. A /RAS 34 signal is used to latch a row address in each of the memory devices, and is used in combination with /WE 36 to select between page mode and burst mode access cycles. Address signals 38 provide a multiplexed row and column address to each memory device on the SIMM. In burst mode, only active /CAS control lines are required to toggle at the operating frequency of the device, or at half the frequency if each edge of the /CAS signal is used as described above. The data lines are required to be switchable at half of the frequency of the /CAS lines or at the same frequency, and the other control and address signals switch at lower frequencies than /CAS and the data lines. As shown in FIG. 6, each /CAS signal and each data line is connected to a single memory device allowing for higher frequency switching than the other control and address signals. Each of the memory devices 10, 12, 14 and 16 is designed in accordance with the present invention allowing for a burst mode of operation providing internal address generation for sequential or interleaved data access from multiple memory address locations with timing relative to the /CAS control lines after a first row and column address are latched.
FIG. 7 shows a front view of another SIMM designed in accordance with the present invention. Each device on the SIMM is a 4 Megabit DRAM organized as 1 Meg×4. In this configuration, a single /CAS controls two memory devices to provide access to a byte width of the data bus. The eight devices shown form a 4 Megabyte SIMM in a 32 bit width. For an 8 Megabyte SIMM in a 32 bit width, there are eight additional devices on the back side (not shown).
FIG. 8 shows a preferred pinout for a memory module designed in accordance with the device of FIG. 7. This pinout is compatible with pinouts for Fast Page Mode SIMMs and EDO SIMMs. A presence detect pin is provided for indication of EDO operation on pin 66, and in accordance with standard EDO part types, an /OE input is provided on pin 46.
Alternate embodiments of the SIMM modules of FIGS. 5, 6 and 7 include the use of two /RAS signals with each controlling a sixteen bit width of the data bus in accordance with standard SIMM module pinouts. Four more 2M×8 EDO Burst Mode DRAMs may be added to the device of FIG. 6 to provide for a 4M×32 bit SIMM. Sixteen bit wide DRAMs may also be used, these will typically have two /CAS signals each of which controls an eight bit data width. The incorporation of parity bits, or error detection and correction circuitry provide other possible SIMM module configurations. Methods of performing error detection and/or correction are well known to those of skill in the art, and detailed descriptions of such circuits are not provided in this application. Additional SIMM designs using the novel memory device of the present invention may be designed by one of skill in the art with the aid of this specification. The invention has been described with reference to SIMM designs, but is not limited to SIMMs. The invention is equally applicable to other types of memory modules including Dual In-Line Memory Modules (DIMMs) and Multi-Chip Modules (MCMs).
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On Saturday, I drove three and a half hours with Firedoglake editor-in-chief Jane Hamsher from Washington, DC, to the federal correctional institution in Loretto, Pennsylvania, to visit former CIA officer and whistleblower John Kiriakou.
He has been imprisoned for nearly a year and in that time Firedoglake has been publishing "Letters from Loretto," which have provided him a way to share his experiences inside the prison with the world (and also provided the prison with excuses for retaliating against him).
We arrived at the prison about noon. Though we had tried to go in as press, we did not get approved because it is a lengthy bureaucratic process that time did not allow for. The prison had only started processing our request a few days ago when we requested permission to interview Kiriakou. So, we instead went in as visitors, who Kiriakou had put on his visitors list.
The guard at the security station by the entrance to the facility took our personal information and began the process of allowing us to enter the facility. He noticed that Hamsher was wearing camouflage pants and told her she could not enter wearing them, so she went into the bathroom and turned the pants inside out. (Kiriakou had never known or heard of such a rule.)
I looked at the "Visitors Rules." The facility could not have been more clear that they want all visitors to come in "conservative dress." I could not find anywhere that it said specifically no camouflage pants. Visitors are apparently not supposed to wear "utility pants" or "fitness" clothing for whatever reason. It said in one part of the rules "nothing vulger." (Yes, the word was spelled like that.)
The visitors room can probably seat fifty to seventy-five people. An officer seats us in plastic utilitarian chairs. The room is probably a little over half full with visitors and inmates filling rows of chairs, which face each other. The inmates sit on one side and visitors sit on the other.
I sit across from Hamsher while she asks if I have ever been to a federal prison. I answer no. Minutes later, we see Kiriakou come out of a door wearing teal colored inmate attire and hand some kind of a slip to a guard in a station watching over the visitors room. He shakes my hand, gives Hamsher a hug and then tells me a guard is going to ask me to move because I am sitting on the wrong side. I move and Kiriakou sits down.
Kiriakou does not waste a moment getting to the latest on his situation in prison. The Bureau of Prisons (BOP), he reports, has come back with an even worse deal for finishing the last part of his 30-month sentence. He says he is only going to get 86 days in a halfway house. (According to Kiriakou's wife they recently released a guard who had assaulted a prisoner to a halfway house after serving only 6 months of his sentence.)
BOP, on top of that, is not going to allow him to be on house arrest so he can help his wife take care of his five children. He will have to live somewhere away from home and probably work some place like a Subway.
The BOP and Kiriakou had done some dealmaking. He had agreed to stop writing letters from prison that were published in the media (here at Firedoglake), no more interviews with the press and the withdraw of formal complaints against two officers in the prison. In return, he would get nine months in a halfway house. The BOP came back with five to six months. Kiriakou believed the prison had broken its promise to him so he refused to no longer be silent. The letters from prison resumed and so did press interviews.
Recent weeks have been intense for him with officers ordering his roommate Dave come down to talk to Special Investigative Service (SIS) to inform on Kiriakou. They wanted him to tell them how he was getting his letters out of the prison. This was typical stupidity because Kiriakou has broken no rules and mails the letters as inmates are expected to do. An officer also tried to pull his desk out from the wall of his housing unit in order to "stop" him from writing letters from prison. He boorishly struggled with the tools he was using and eventually did not succeed because Kiriakou complained and the prison decided to leave the desk alone.
It has been about a year since I last spoke to Kiriakou. I interviewed him just weeks before he was to report to prison in February. He explains that he never intended to do something like "Letters from Loretto."
His first letter was to go out to the mailing list of supporters who followed updates at his defense website. But a letter was provided to Firedoglake and was published here. It was then picked up by numerous publications. He recalled how surprised he was to see outlets like The Economist, Playboy, the BBC, etc, each post something about the letter. That helped convince him to write regularly from prison.
Kiriakou is writing two books in prison. One is being written with Dave, who is a fellow CIA veteran. The book will detail how they have managed life in the prison and their shared experiences together. (The draft was actually taken by an officer who claimed it "made threats to staff" and then later returned when that could not be confirmed.)
He appears to be healthy. He says he has gained weight in prison. He mentions that the prison is supposed to give inmates 2200 calories a day. The facility will reach that calorie count by giving inmates cake or Pop-Tarts at each meal.
Kiriakou's housing unit has six people in an 8 x 12 cell. He suggests that the prison does suffer from overcrowding. (According to the Open Society Foundations, "Federal prisons currently operate at between 35 to 40 percent above capacity." That is about how overcrowded Kiriakou said FCI Loretto happens to be. Like most US prisons, some of that is a result of sentences for nonviolent drug offenses.)
A sizable percentage of the inmate population at Loretto are pedophiles. His last letter to mention pedophiles explicitly put the focus on BOP and how it fails to handle pedophiles appropriately by getting them the treatment they need. (Kiriakou noted he had suggested 30% of the population are pedophiles. The warden said that was incorrect. He laughably warned him that a pedophile was going to shank him if he didn't watch it. Later, an officer told him the percentage was actually higher—closer to 40%.
Kiriakou has been following what has transpired with National Security Agency whistleblower Edward Snowden and the release of stories based on documents Snowden provided to journalists. What he knows comes from The New York Times and the Wall Street Journal.
When the Times published its editorial in support of Snowden, he cut it out and kept it. He has not disagreed with anything that has come from Snowden so far, however, he did laugh a little when there was outrage over spying on world leaders. As a former CIA agent he says that kind of intelligence gathering activity has always been routine.
It has pleased him to see that the public mostly accepts that Snowden is a whistleblower. As he advised Snowden in a letter from June 2013, he should not return home to the United States. He still contends Snowden would not receive a fair trial or be able to present what could be called a whistleblower defense.
Kiriakou will not turn down any press interviews. Any media can call the main number for FCI Loretto and ask for Jared Rardin, an executive assistant at the prison, and he will begin the weeks-long process of clearing reporters for an interview with him.
Those who gain access can come during normal business hours during the week. There is a small room inside of the visitors room with a table. Kiriakou said he has spoken to reporters for multiple hours, and the prison has even allowed journalists to have their audio recorders while conducting the interview.
BBC News came to interview him at the prison one morning. They were supposed to talk to him at 8:30 am, but they were an hour late. He learned that the woman they had sent to do the interview was told she could not enter the prison in her skirt. She had to drive to the nearest town and buy a pair of pants.
Kiriakou did not necessarily see himself as a political prisoner until recently. The manipulations of his sentence, where the BOP has decreased his time in the halfway house and refused to him give him any time on house arrest, convinced him that he is indeed a political prisoner. The prison is going to intimidate and harass him in many different ways, especially until he silences himself and quits telling the world what it is like in a low-security prison.
From the visit with Kiriakou, I realize how important it is for inmates to maintain contact with the outside world. They will hang on every word and, when they need help, they really need help.
He appreciates the hundreds of calls people are making to the BOP director, Charles Samuels. He also said he reads all the letters he receives each day, and is committed to responding to every one. And, when asked if he would do it all over again, he says he would. Government is dangerously unaccountable today and he has no regrets about speaking out against waterboarding by President George W. Bush's administration in a manner that led him to become a target for the government, which he believes sought to find anything they could to put him in prison and eventually did.


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- Description
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Questions on SlingShot
- From Ang at 12/3/2013 11:52 PM
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- Does the Slingshot put a lot of pressure on the neck? I imagine it would, would it work well if worn lower down the back, say directly under arms and across upper back?
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- From Ang at 12/3/2013 11:52 PM
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5 (1) 4 (2) 3 (0) 2 (1) 1 (0)
3.75 stars 3.75/5 Stars Average score of 4 user reviews spread across 0 releases and 0 DLC
Review a great game day - Persona 4 0
* I wrote some amount of my thoughts on why Persona 4 is great for Review A Great Game Day. It's less of a proper review and written more in the style of 'review a game you love', which feels more in keeping with the aim of the project and the style of other reviews. Get it on my BLOG as well. * Persona 4 is a JRPG: part Twin Peaks murder mystery, part Stephen King's IT tale of youths uncertainty in the face of morbid danger and part Power Rangers high school fantasy.Where so many games overlo...1 out of 1 found this review helpful.
Dead rising returns at a bargain price, warts and all. 1
Dead Rising 2: Case Zero pushes the boundaries of what has been attempted by downloadable content, attempting to bring dead rising 2 in microcosm to its hoards of hungry moaning fans for a bargain price. The price itself is of note, 400 microsoft points is definitely a tempting proposition and while there is plenty to love about Case Zero, there are a number of small quibbles to deal with and the design itself must be overcome. The original dead rising included a leveling system (als...23 out of 24 found this review helpful.
Marginally better than actually being punched in the face. 2
Facebreaker is a boxing themed fighting game, and to call it a boxing game would be absurd as beyond characters fighting in a boxing ring while wearing boxing gloves, all aspirations to the sport are purely cosmetic. Recharging health bars, a throw button and ranged attacks are just some of the features that place this game firmly in the fighting game genre, and while the aim was to create a lighthearted accessible alternative to the realistic, nuanced fight night series the game is mired by poo...2 out of 2 found this review helpful.
Amusing, alarming, strange, perplexing, gnomes. 0
Nelson Tethers is a new IP from Telltale games, a company with a pedigree for developing and reinvigorating adventure game franchises with panache and humor. While Telltale is known as one of the few developers to succeed in producing games episodically, Tethers is a standalone title based upon the unusual comic series Grickle, the brainchild of animator and all around pleasant Canadian Graham Annable.Nelson Tethers is a puzzle game in the vein of the professor Layton series, and features a dyna...3 out of 3 found this review helpful.


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Unlocking the Key to Deep Sleep
By Sarah Fenske
Making the Ferguson Commission Matter
By Danny Wicentowski
My Fake Boyfriend Became a Real-Life Crush
By Lindsay Toler
Rep. Jeffrey Pogue Bill Would Ban Unisex Bathrooms
By Danny Wicentowski
Darren Wilson Gives Speech to Nonprofit
By Danny Wicentowski
Angel Stewart and Other Victims of Violence Ask for Mercy
By Jessica Lussenhop
Obama Praises St. Louis' LaunchCode
By Lindsay Toler
By Lindsay Toler
"It is an apt comparison in that (with cybersex) people crash and burn quicker now," agrees Dr. Helen Friedman, a clinical psychologist in private practice who specializes in sexual trauma and sexual compulsivity. The difference between accessing titillating images before and after the advent of the Internet, says Friedman, who attended the Atlanta conference, is "like night and day." She cites the twin lures of anonymity and convenience. "Think about it: No more having to risk being seen at the adult bookstore. No more buying magazines, and some of them are expensive. And whereas before someone might have thought twice about leaving the house at odd hours to go to a bookstore, now they can get what they want in the comfort of their own home. The problem is that, because people have it all the time, they get hooked quicker. It escalates the whole progression of compulsive behavior."
Friedman is quick to add that the computer, with its myriad doorways to prurience, does not cause sexual addiction. "Even all these sites will not create a sex addict. A person has to be already predisposed -- this is their way to anesthetize pain. And so for the person who already is sexually compulsive, it becomes a terrible problem. It promotes isolation. I've known people who can't get their work done because of it, or people whose spouses aren't available in the bedroom because they're up half the night online."
Friedman brought back some statistics from the Atlanta conference. There are an estimated 72,000 commercial porn sites, and 40 new ones emerge each day. An estimated 15 percent of Internet users have visited online sex chat rooms or porn sites. According to one study, nearly 9 percent of people who use the Internet for sex spend more than 11 hours a week surfing for erotic sites. Moreover, and of great interest to employers, 70 percent of all e-porn traffic occurs during the 9-to-5 workday. Finally, e-porn is a $1 billion-plus industry and the biggest moneymaker on the Internet.
This last information should come as no big surprise. The Internet -- already an addictive instrument to begin with -- is, for some, made virtually irresistible when porn is stirred into the mix. David Delmonico, an assistant professor of counseling at Pittsburgh's Duquesne University, sees the attraction as a triad of inter-related desires: "I see sex addiction being one part of it, cybersex addiction being another part and Internet addiction being a third part. I don't think they're necessarily mutually exclusive, although they can be. This one can be a sex addict and be on the Internet, this one a cybersex addict and be on the Internet, and still another can get into this trancelike state of surfing and be addicted to the Internet itself. These three components can work together and be additive in nature, and when that happens, it really makes the problem much more complex."
Ayres contends he was never at any point hooked on Internet pornography: "No, no, not at all. I can go days or weeks without actually looking at it. It's not even something that I think about all that much. Just sitting around, absolutely bored, thinking about something to do, and like, 'Oh, I can do this for five or 10 minutes,' and then I'll have to go do something else."
Delmonico estimates there are literally millions of curious individuals surfing the Net for sexual content. Some, such as one pal of Ayres', a fellow porn browser who wishes to remain anonymous, even write poetry about the experience. The poem Ayres likes is called "Satyriasis," which, he says, denotes "an unhealthy obsession with pornography," though the dictionary defines it as "a morbid lasciviousness in males": "A world of sickness at your fingers/glowing on a screen/More and more we want and writhe/with squeamish minds diseased."
These lines seem at odds with Ayres' contention that pornography is a healthy outlet for sexual gratification. "It facilitates the orgasmic experience," he says, sounding like a Masters and Johnson protégé. Well, what of the clubs on the East Side -- don't they facilitate the orgasmic experience? "The Internet is more explicit and more private," he says. Explicit indeed -- everything's available, from a woman fellating a horse to a man evacuating his bowels and then smearing the feces on his face. "Use your imagination; it's on there," says Ayres.
The experience with the credit cards and the irate mom has caused him to turn introspective, Ayres says. "I've had a kind of catharsis lately, admitting my faults and weaknesses. This is just another example. Basically, this whole thing's my fault -- though I still say there is a lot of fraud, a lot of traps, on the Internet."
Ayres says he has reconciled with his mom. "We're fine. She's desensitized. She loves me unconditionally. She got those bills taken off her charge -- I don't know how -- all except the biggest one, the one for $159. I'll pay her back."
Meanwhile, Terri Ayres was without a phone over the Mother's Day weekend. Although the credit-card company let her off the hook for the porn-related charges, Ma Bell said nix to waiving the charges for the call to Vanuatu. "I know it wasn't a 900 number, because I had those blocked," she says. "I decided I wasn't going to pay that bill, and when I couldn't reach an agreement with the phone company, they disconnected my phone."
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Ortofon e-Q7 Ear Canal Headphone
" Prior to purchasing these, my primary concern is to have a proper alternative for my ESW9 which have better isolation to be used for listening to my ballad tunes on the road. While I don't have any issues with louder tracks, with more subtle ones, my ESW9 aren't up to the task, and so my search began. Actually, I'm not really keen on the idea of using an IEM since they irritate my ears..." --lotusbloom
Ortofon e-Q5
" This "moving armature" descendant of the Ortofon e-Q7 makes no sacrifices in terms of quality, despite being introduced at a more affordable price point. The introduction of a new cord and strain relief system help tame microphonics and make the model easy to wear both down and over the ear. The all-aluminum housing is large and may not fit all ears, but the design is simple and..." --Dekimasu
Ortofon e-Q8 in-ear earphones
"Released earlier this year, the e-Q8s are a pair of single balanced armature (BA) driver earphones which are the new flagship to Ortofon's long stagnant IEM lineup. I purchased mine not too long after their release in April 2014 for 36930 yen (approx. USD 350) and so at the time of writing have approximately six months of experience with them as my daily driver IEMs. I will be providing..." --fonzler
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La King's Confectionery
"Meet Me At La King's"
Our Background:
In 1927, Jimmy King began making candy in Houston while learning the trade from 'Old World' candy makers.
In 1976, Jimmy's oldest son, Jack, moved his family to the historic Strand, in Galveston, to recreate an old fashioned confectionery. He used the 19th century formulas and methods, handed down to him, using traditional equipment and procedures to make confections.
La King's features a working 1920's soda fountain serving malts, shakes, ice cream sodas, sundaes, splits, floats and your favorite fountain treats.
We proudly make and serve "Purity" ice cream which is Texas' first ice cream manufacturer, founded in 1889 on Galveston Island.
Our Team:
Our master candy maker, Ernest Torres, delights the crowds with his old time specialities like Peanut and Peco Brittle, Divinity, Pecan Pralines, Hand-Dipped Chocolates, Fudge and our famous Salt Water Taffy,made right before your eyes, on antique equipment. More than FIFTY candies are made from 'old time' recipes!
If you have been looking for a specific candy or treat and you don''t find it in our store or online, please let us know as we can't possibly list all the items we carry. However, with nearly 100 years of experience, we certainly know where to find it and would be happy to do so, if requested.


text:
Enhanze SC Approval Status
- FDA approved: No
- Brand name: Enhanze SC
- Company: Halozyme Therapeutics, Inc.
- Treatment for: Drug Delivery
FDA Approval Status for Enhanze SC
|Mar 28, 2005
|Halozyme Therapeutics Files NDA for Enhanze SC
Disclaimer: Every effort has been made to ensure that the information provided here is accurate, up-to-date and complete, but no guarantee is made to that effect. Drug information contained herein may be time sensitive. This information has been compiled for use by healthcare practitioners and consumers in the United States. The absence of a warning for a given drug or combination thereof in no way should be construed to indicate that the drug or combination is safe, effective or appropriate for any given patient. If you have questions about the substances you are taking, check with your doctor, nurse or pharmacist.


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Soaps Boards :: The Young and the Restless Forum :: Lily and Cane Fans (No Bash)
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Wow long time not posting..Had to say I was proud of Lily Ashby, she no longer gonna make anyone walk over her and she just take it, I love that she was giving the heat and the homewrecker could not take it...Good job Lily, i love the writing for her.
Some morning love for my fav couple Mr and Mrs Cane and Lily Ashby.
That best portion of a good man's life; His little, nameless, unremembered acts Of kindness and of love. — William Wordsworth
Good evening, Ashby Family! You are a good bunch of poeple and fun to watch. Just wanted to say hello. Have a great evening and I will catch you again next time.
Good Friday evening, Mr. & Mrs. Ashby! Hopefully something will come up roses for you soon. Looking forward to seeing you on screen soon. Have a great evening. Sleep well tonight and I will catch you next time.
Hello one and all, and to the continued fighting of the best fanbase in all of YR history!
Fear grows out of the things we think; it lives in our minds. Compassion grows out of the things we are, and lives in our hearts. — Barbara Garrison
Have a great Saturday, Ashby Family! I am looking forward to seeing more of you on screen, in your own home, and in your own story ASAP. Enjoy the evening! Will keep the home fires burning and holler at you next time. Have fun!
Hey Restless! Welcome back! Good to see you posting today!
Sat bump for my fav couple the unstoppable Mr and Mrs Cane and Lily Ashby.
: Respectfully, Make Your Voice Heard::::::😘
Call In:
323- 575-2345 (Leave messages on both Y&R and CBS lines)
Support Lane Ashby / Atkinson family
Mail to:
Steve Kent Vice President
10202 West Washington Blvd
Culver City, CA 90232-3195
@SteveKentSony @AngelicaMcd YR
The General Outline below is a combination of ideas taken from tweets by various Lanefans:
Cane and Lily are Ashbys and therefore a GC family in their own right. It is evident that their association with (The Winters) only keeps them from reaching their full potential.
They have potential to become a new dynamic Family in daytime if that potential is nurtured by those who control the creativity of the show.
Cane and Lily Ashby are one of the most popular and beloved couple in daytime if not the most popular and beloved.
Coupled with the talent of Daniel Goddard and Christel Khalil and their likability and their ability to sustain the popularity over a long period of time, there is nothing standing in their way to elevate not only themselves but the show except for show runners who refuse to give them their just dues.
Respectfully Mr. Kent we are still waiting for you to find the ones who know & will do right.
DG/Cane & CK/Lily deliberately kept down, doing everything to debase them while others are elevated.
The life & story we wrote in for Ashbys taken from underneath so they have them serve the one who stole it & have him & the newbie who disgraced them lording over them. Talk about humiliating turn of events for this beautiful couple. What an insult to their fans.
The misogyny & bigotry just refuses to change at Y&R. Where is the one to do right?
When is Lily a beloved legacy character is seen & treated as an equal who can own & run her own cosmetic/fashion empire -that's EXCITING STUFF!
The obvious biases against Lily & Lane could not be spelled out clearer!!!!
CK/Lily's only purpose on this show is to prop Rogans & the other minority characters.
Not only does Hilary always get the last word in Lily interactions but Lane humiliated in servitude to her & Devon; How far the legacy of Lily/Lane has fallen…the disdain for Lily & Lane jumps off written page.
What a blow - the expectations of Lane starting their business only to be turned into lowly servants in GC.
Dru & Neil's daughter, Olivia's niece server to GC & employee of Devon Hamilton;
The joke is on Lane fans.
Lane relegated to servants & workers for them & GC. Lily kept in her place. Cane stuck until they can free him off Lily.
Which meant Lily is viewed ultimately as a lesser thing. It is how these writers write her. How MAB & now JFP see her. Chelsea gets her business & interacts with others. Lily has to be the help to get a chance to say hello
The writers' biases & prejudices are showing. Hilary who has Lily's life & Devon who has Cane's life will be allowed some status since as a couple they know they will never reach the popularity of Lane - even w/ Lane as constant props for them & Lily as the antagonist to give Hilary sympathy.
Backburnered, ill written, filler, Lane is still popular. Investing in them and putting them back on equal footing as the heirs they rightly were/are, makes them viable as leads & the bigoted EP & writers can't have that.
Lane is not allowed to share that status. It was MAB's problem w/ Lane & she saw to it they had nothing & lost everything as she could not end them or kill them off. She did not want this hugely popular couple on show.
Being so popular was a liability b/c Lily was the wrong color. Lily is NOT allowed to be a lead on Y&R. #FACT
Hilary & Devon are no threat so they are given & can have what was taken from Lane.
For years now we have (since the Last regime on YR) been requesting and writing in on behalf of Lane that they be allowed to start their own cosmetic / fashion company.
This will ensure that the Ashbys (Cane and Lily) and by extension their twins Charlie and Mattie Ashby, are cemented in the GC community as power players.
They have the potential and ability to revolutionize the show and will be a great opportunity for the actors who have been held back the past six years, and counting to showcase and hone their talent.
Instead, Lily (and Cane) are waiting & serving people at a hotel.
FAR AWAY from ever becoming a power player & owner in the cosmetic/fashion world of Y&R….
Owning cosmetic/fashion business which YR is based on would not let them interact????
They must serve GC to interact that is NOT what we BEGGED for YEARS!
The current writing team / EP have made them glorified servants to have the privilege to do what they used to do before they were isolated & segregated.
Cane was heir to CI and Lily their spokes model.
But now being a servant in a hotel that is ALL the show can see for Lily? So disgusted w/ the prejudicial biases of these past two racist regimes…
Lane owning their own conglomerate cosmetic or Fashion Empire would not allow them to interact in GC? They must be downgraded to the F list of supporting characters to be allowed to speak to the people they grew up with & were equal to in GC?
Lily as a minority woman is BARRED from aspiring to becoming a power player on Y&R.
Business search opportunity was nothing but a ruse because Lily (Lane/Cane) is still working for others in field far from the characters
Gorgeous glamorous minority woman walking around in a frumpy role seeing to it wealthy patrons are comfortable when Lily should be ONE OF the wealthy patrons! Not be about serving them! Lily has fans.
The majority of the fans want more for her. Would love to see her aspire to what these writers & recent EPs do not think befits the sphere of a minority woman on this show one with talent charisma and popularity such as Lily Ashby.
Again after MAB spitefully took Cane's story, family & fortune away from him so Lane & their kids would have no legacy.
Cane's backstory was re-written so many times in an attempt to strip the core of the character. He went from being the Chancellor heir to nothing.
The fans wrote in and asked for Lane to start their own business & build it into an empire. They have no story now. The business story the fans begged for Lane has been given to Devon.
Cane and Lily are only used to prop Devon the Rogans and Hillary but nothing substantial for Lane.
The writers CAN'T claim they don't know what to write for them. We keep screaming it from the roof tops! We annoy you with telling you what we want. SID (Soaps in Depth) writes a cover story saying Lane dream storyline is coming but the show only gives them filler scenes brainstorming business ideas. Then NOTHING!
It was nothing more than a false lead there was never any intention of writing storylines for Lane.
This business storyline that was promoted on CBS SID the interview given by Ms. Altman, a writer on JFP's team on YR which ran on this issue:
CBS Soaps in Depth Nov 18th 2013
Cover Page Lane: YR Their Dream Storyline
November Sweeps Preview: Display Nov 4-Nov 18
Cover Story: Cane and Lily Next Big Adventure Pg 26 – 27, 28 and 29
This storyline was supposed to begin on December 4th of 2013…you will note it is now a new year January of 2014.
This supposed business storyline, Lane's dream storyline was promoted on Social media most notably twitter but the day it was supposed to begin the fans saw nothing.
Now the fans are mocked with visions of Lane working for Devon in a club (who has been given the storyline that should have been theirs in the first place)
Why is that? After everything Lane has been put through with nary a single storyline in the past six years (except disjointed destructive plot points masquerading as a storyline) they have now been pushed at the back of the bus once more to only play supporting characters for others less deserving.
Why is that?
Cane and Lily both former young executives in Jabot and Chancellor Industries now dream of working at a club owned by Devon…again it doesn't compute.
Now that the fans have once again realised they have been duped by a Lane storyline that never happened Cane and Lily have been demoted to be the hired help at GC where YR insider and others claim it is a good thing that will put them at the "center"
The big business storyline would not have put Lane at the centre? It would have in a big way, it would have elevated them and laid the solid foundation of the Ashbys as a new GC power family but those running the show continue to hold this couple down so as not to rise to the level of a proper dynamic GC family.
Why is that?
How cruel to taunt the fans with a big Lane storyline that will elevate them only to be backhanded.
How cruel to lead the fans on a wild goose chase while knowing there is nothing waiting for them. Is this what YR has become?
Why so much hate for Lane in a powerful positions?
We never saw Lane treated this way before MAB and JFP regimes took helm at YR. Why is that?
Lily a legacy character who's a former Fresh Face of Jabot & marketing executive is now overseeing the wiping of tables at a hotel?
For years we wrote in asking to see Lily learn from scratch & be built up into a mogul business woman because she was so young with so much potential, talent and popularity, we would get to see it transpire from scratch. Have people like Jill mentor her.
Lily whose mom went from nothing to international fashion model then business woman, Lily lived in Paris was groomed by Kay, Nikki, Jill as FOJ before Maria Bell and her writing team took everything from her and yet they every other newbie climb over Lily & start businesses.
The current Jill Phelps regime like the previous one refuses to give Lily (Lane and Cane) anything decent but to prop newbies on her segregated island & add insult to injury
They would now have the fans believe that Lily /Lane/Cane's dream is work FOR Devon at the GCAC? It doesn't compute!
Lily Ashby is not allowed to aspire for bigger things on YR and to become a power player?
Cane as long as he is married to Lily is not allowed to rise above his current status.
MAB and her writing team so to it that Cane was no longer a Chancellor once she took control of the show because he was married to Lily….
The current writing team of JFP and Co refuses to allow Lily and Cane to rise to the level of other power players even though the foundation is there.
Cane and Lily's children are not allowed to have a decent home (with nice cupboards without crooked hinges) etcetera they are not allowed to hold their own in conversation with other characters but are constantly put down, constantly terrorized with no recourse for them, they are not allowed to have the last word nor are they allowed to have friends who are for them?
We are asking you to step in make sure that justice is done. Not just for the fictional couple of Lane that is beloved by the majority of the YR audience but also for the actors in question, who have given their all for years.
They have been used to for years to elevate others it is passed time they are given the same opportunity enjoyed by others (less deserving and who haven't paid their dues no less) to shine.
Give them the opportunity they have afforded others over the years to be front and centre and to be given the material to work, so that not only the great couple that is Lane can benefit but also Christel Khalil can benefit and Daniel Goddard.
YR will be the better for it as well. This is a win-win situation for all.
But justice must prevail in order for that to happen, we must have a regime on YR that is capable of understanding this and putting aside their personal prejudice for the good of the show and we hope that this time around you will listen and take the proper action.
All is not lost there is still an opportunity to make the Ashbys and Atkinsons a dynastic family on YR, first by establishing once and for all that Lane is family in their own right and by righty giving Jill Abbot what is rightfully hers by returning Chancellor Industries to her.
Colin Atkinson is Cane's father, Cane who is Lily's husband and the father of Charlie and Mattie Ashby. Colin and Jill also have a previous connection that needs to be repaired, just as Colin's relationship not only with Cane but with Lily / Charlie and Mattie must be correctly repaired and nurtured.
It is important that both families be repaired before coherently connecting them together to create this dynamic family.
I will presume to say that the one thing we all have in common is the well-being of the show. This outline ensures that the beginning of repairing the trust that has been abused and fractured between the current and previous regime and the audience is restored hopefully with a new regime that cares about these characters and the cast at large as well as the audience.
Thank you.
Hey Peoples suds party Restless Rfan
Start getting your LaneVotes ready for the next round pls
Make 'em Count..Ty
ChristelKhalil DanielGoddard
Lily and Cane; Laneyr
CBS (abc) Readers' Poll
c/o Soaps In Depth
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Hold down Control (PC) or Command (Mac) key + mouseclick to select more than one option
|Avg. Dinner Entrée
|Greater than $25
|$18.01 - $25
|$12.01 - $18
|$7.01 - $12
|Less than $7
Posted by vanessaandjim on 10/07/2008
Hi We have been to the Tick Tock Diner on two seperate visits to New York. The first with our children. The waiter was really friendly and when we went back 2 days later, told the other waiter we were his friends and moved us to his section- Nice man with a moustache? He told us many places to take the kids (he being a father himself) We went back again this year on our own and were pleased to see the same man and sat in his section. We told him we had been there two years ago and he said he remembered us (yeah right!!) The food is good, we have only had breakfast there, but we are going back in february with the kids again, and will pop in and see if he really does remembr us!!!! Might try and have an evening meal in there- great place if noone can decide on what they want as the menu is HUGE!!! So are the pancakes actually!!! See you soon Tick Tock Dinerxx
Posted by foodie on 08/31/2008
You have to be realistic in NYC, especially when eating somewhere near 34th Street. The food at Tick Tock is not super cheap, and it's a diner so the service is bound to go either way, but overall its a good breakfast spot. I travel between NYC and DC a few times a month and my boyfriend and I usually got to Tick Tock for something quick before my bus. Their oatmeal pancakes with apples are delicious, as if their omlette with feta and spinach. My boyfriend has had their french toast (decent, not great), and their arepas which were good. The food comes out quickly and is better than some of the pricier more "upscale" brunch places I have gone to in the city
Posted by need to do better on 08/28/2008
Service is poor! I've lived in New York quite a number of years and know that this is a cultural mecca, however we were placed with a server who new very little english and who apparently was having a hard time understanding our orders. This is an "American" Diner?? I ordered a pasta dish...which comes with a Salad! I requested a Caesar salad with my meal..assuming that would be the "salad" choice to accompany my pasta. This unfortunately confused waiter thought that little old me was ordering an actual Caesar "dinner sized" $9 salad in addition to my pasta. Never once asked if the salad was to accompany the meal or what...come on, you can't be that clueless. When the bill comes around and I notice the charge, not only does he not remove it, which would have been a great customer service thing to do, he says its too late to do anything about it then chuckled that he questioned to himself why I'd want a dinner size, but that question never matriculated into asking me if that is what I wanted. When it was obvious that i only dented the salad, no where consuming a whole dinner sized portion. I could of had the manager involved, but for $9 I just treated that as his tip and left the establishment. But I will say that they've lost me as a client, guys customer service can make or break an establishment, please owners make sure your staff is representing the ideals you've spent time, money and energy trying to enforce!
Posted by Disapponted on 07/21/2008
I work directly across from the Tick Tock Diner. So when my son came up to the city to meet me for a show I decided to take him to the Tick Tock Diner since it was close. The waitress was a little more than visibley annoyed that we needed a few extra minutes to decide what we wanted. The food was OK but not worth the money. The waitress did not come back once to see if we needed anything else. And we had to wait an extremely long time after we were finished to get our check so we could leave. We were very disappointed.
Posted by Crystal C. on 07/04/2008
I've eaten here several times so I can try and have an unbiased view of the place but they prove me right every time. Service is bad, half the time they didn't have what I wanted. Once, I ordered a Belgian waffle and the waiter said they didn't have any. Don't you know the table directly across from mine placed their order after we did and one of them ordered said waffle and got it. The seating is quite cramped and the booths barely even have enough room to sit comfortably, let alone to allow passage of patrons and staff through those narrow paths without bumping into someone.
Posted by Dave and Eve on 03/16/2008
We were recommended tick tock by our hotel and we were not dissapointed. We ate here twice during our weekend stay (6th to 10th March 2008) Food was great, servive quick and friendly. Can't wait for our next trip as we shall know where to head for breakfast.
Posted by 1M4GR8L4Y on 03/15/2008
The food is not bad. But, the price and service is so not worth it. Try placing an order for pickup or delivery over the phone. It's absolutely ridiculous. The atmosphere isn't anything to drool over either, unless being clustered together and being on the receiving end of constant bumps from other patrons and their "service staff" is your thing. Your money is much spent somewhere else.


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DeDe's Bio
DeDe began modeling at age 14, at a scant 5' 2" and 97 pounds, but with a figure of 34-21-33. She graced the cover of Teen magazine twice in 1962, and was soon noticed for television (The Donna Reed Show and Leave It To Beaver).
As her figured filled out, DeDe's hopes were more toward Playboy, and in August 1967, with her girl-next-door looks and a full body, she landed in the centerfold.
After the excited response she received at the 1994 Glamourcon, DeDe began posing for a new series of pinups, including sizzling sessions with photographer Bunny Yeager. This brought her back to Playboy in its March 1996 issue, the article entitled, "Playmate Revisited."
During 1967, after her centerfold, it was reported her blonde, freckle-faced appeal drew in more fan mail than ever received by the magazine, and the only thing that can supersede this is the electronic era - where people can now simply e-mail their responses
DeDe'S Data Sheet
Turn-Ons: Water skiing, horseback riding & roller blading. Swimming in the ocean.
Turn-Offs: Phony people.
What Makes a Woman Sexy? It comes from inside. It is a quality that one was given.
Describe A Typical Day In Your Life: Exercising in the morning, rollerblading. Have lunch on the beach, go for a nice, cool swim in the ocean. Watch the sunset and moon rise on the beach with a glass of wine.
Ideal Romantic Evening: Having dinner for two, that someone else cooked besides myself.
What Is Sexy In A Man: Their voices and how they take care of their bodies by eating and exercising right.
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Shirley Bovshow of GardenWorldReport.com visits a Proven Winners plant breeding facility for a tour that opens her eyes to the fascinating world of plant breeding where plants are developed for improved performance, better pest resistence and beautiful features. Read blog post http://edenmakersblog.com/?p=4753
The Garden World Report is the web's first Garden TV entertainment show featuring the "who's who" of the gardening world as contributors! International focus on exciting garden events & news,interviews with garden celebrities & authors,how-to garden segments,garden tours,new plant and product previews and live events! Host Shirley Bovshow, of Discovery's "Garden Police" makeover show. Watch GardenWorldReport.com


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AMS Strengthens Integrity of Research and Promotion Programs
AMS No. 088-12
Michael T. Jarvis (202) 720-8998
WASHINGTON, March 28, 2012 Today, the Office of the Inspector General (OIG) released its review of the U.S. Department of Agricultures (USDA) Research and Promotion programs, which USDAs Agricultural Marketing Service (AMS) requested in 2010 to help the agency better identify potential oversight improvements. AMS is committed to good stewardship of the producer-funded Research and Promotion programs and has already begun implementing the recommendations of the OIG.
The OIG review was conducted between 2010 and 2011 to assess AMS oversight activities of Research and Promotion programs and focused its review on AMS internal controls and the oversight of Research and Promotion boards activities.
After reviewing current procedures, the OIG made two recommendations that AMS will implement: (1) AMS will strengthen internal controls related to its oversight of board activities and develop Standard Operating Procedures (SOP); and (2) AMS will develop guidance to conduct periodic internal reviews of its progress in strengthening oversight.
In advance of todays final OIG report, AMS began implementing potential recommendations by taking the following decisive actions to strengthen its oversight duties:
Revising its guidelines in November 2010 by reinforcing its management reviews of boards and strengthened policies on various administrative functions;
Finalizing the AMS Standard Operating Procedures to ensure consistency in staff responsibilities in January 2012; and
Implementing periodic internal reviews of the agencys Research and Promotion programs in order to evaluate and ensure consistency in the application of its policies and responsibilities.
In addition to the specific recommendations offered in the OIG report, AMS is also announcing a new policy that will strongly encourage upfront referendums as the preferable process to establishing all future Research and Promotion programs. This will allow more direct engagement from interested stakeholders and the public prior to the establishment of a potential program and conforms to the Departments overall mission to provide additional transparency to the Research and Promotion programs.
Currently, AMS oversees 19 Research and Promotion programs. These industry-funded programs have been in existence since 1966 and empower farmers and ranchers to leverage their own resources to develop new markets, strengthen existing markets and conduct important research and promotion activities. AMS provides an oversight and audit function, paid for by the industry assessments, which ensures fiscal responsibility, program efficiency and fair treatment of participating stakeholders.
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Can this keyboard be used with my mbp in clamshell mode?
I understand that the macbooks require a keyboard to enable operation in clamshell mode. Will this keyboard satisfy that requirement?
- Asked by Charles M from Brick
- Flag as inappropriate (Can this keyboard be used with my mbp in clamshell mode?)
2 Answers from the Community
Best Answer:
Yes, as long as you are connected up to a separate monitor or tv, you should be just fine with it in clamshell mode
- Answered by Chase H from Livermore
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Yes, the bluetooth keyboard works perfectly!
- Answered by Deborah B from Fort Lauderdale
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Italy Yield Double Top Buoys Euro, BofA Says: Technical Analysis
Dec. 5 (Bloomberg) -- Italian bonds began a bullish trend after yields dropped below a key technical level in a move that is poised to spur the euro higher against the dollar, according to Bank of America Merrill Lynch.
Yields on 10-year bonds closed below 6.27 percent today, completing a month-long double top, said MacNeil Curry, head of rates and currencies technical strategy at the Bank of America Corp. unit in New York, in a research note today. The yields failed to rise above 7.47 percent and 7.36 percent in November and may drop to 5.25 percent, which may push the euro higher to $1.3678, according to Curry.
"It should be seen as euro-constructive because it alleviates one of the big concerns about the significant duress that Italy has been under," Curry said in an interview. "As yields start to reverse, it would suggest that their funding crisis is alleviating for the time being."
Italy's 10-year bond yields dropped 73 basis points, or 0.73 percentage point, to 5.95 percent today, closing below 6 percent for the first time since Oct. 27. The euro was little changed at $1.3398 at 2:41 p.m. New York time.
Yields surged above 7 percent on Nov. 9 for the first time since the euro's inception as investors were concerned over European banks' access to dollar funding and Italy's ability to pass austerity measures.
Italy swore in Mario Monti as prime minister on Nov. 16 after Silvio Berlusconi's resignation. The Federal Reserve, the European Central Bank and four other central banks moved last week to make it cheaper to borrow in dollars.
BofA on Euro
Curry said the euro may rise as high as $1.42 even as many investors remain bearish. Futures traders increased euro-short positions, or bets the currency will drop against the dollar, to 104,302 contracts in the week ended Nov. 29. That's the most since June 2010.
In technical analysis, investors and analysts study charts of trading patterns to forecast changes in a security, commodity, currency or index. A double top is formed when a security is unable to rise above a certain level twice in succession.
To contact the reporter on this story: Catarina Saraiva in New York at email@example.com
To contact the editor responsible for this story: Dave Liedtka at firstname.lastname@example.com


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Barrington author Rem Stokes will make a presentation about charitable giving at 11:30 a.m. Monday at the Garlands of Barrington Performing Arts Center.
Stokes, who is also is a member of the retirement community, recently wrote a book on the subject of donating titled "Cultivating Generosity: Giving What's Right, Not What's Left."
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Meet Stokes as he discusses his 12-step exercises and rationale for not-for-profit organizations, especially churches, to stimulate giving by helping move constituents from "self-interest" toward "self-esteem" at a free book signing and discussion.
In addition, there will be a discussion of the book as well as a free book signing.


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This first consultation draft of an IfA Standard and guidance for archaeological advice and procurement of archaeological services has been developed by a working group consisting of IfA staff and consultants from a range of different backgrounds and has benefitted from comments by members of IfA Council and its Professional Development and Practice Committee.
It aims to address issues of ethics, quality and consistency in the provision of archaeological advice on a consultancy basis and in the procurement of archaeological services.
At its meeting on 15 November 2012 Council carefully considered the report of its working party and the responses to IfA's consultation on some options for recommended minimum salaries for April 2013 to March 2014. Taking account of the range of viewpoints in the membership and a very wide variation in recommendations in the consultation responses, Council decided to accelerate its Strategic Plan commitment to a review of its strategic approach to encouraging increases in remuneration for archaeologists.
We are keen to set up an IfA Special Interest Group for International Cultural Heritage Practice. This would provide a forum for archaeologists, historic environment and cultural heritage professionals working on international projects and initiatives (or based outside the UK and the Republic of Ireland), and advise the IfA Council on issues relevant to the international practice of archaeology and cultural heritage management.
GeoSIG AGM
Please note that the GeoSIG AGM due to take place on Friday 16 November at RSK STATS Limited, had to be rescheduled and will now take place on 18 January 2013
Thursday 6 December from 6.30pm
Sekforde Arms Pub(upstairs) 34 Sekforde Street, Clerkenwell, EC1R 0HA
LAG members do join us for a Debate and Christmas Social on Thursday 6th December!
The Debate will be on the topic of "What is the value of ethics in a commercial world?" to cover all aspects of the historic environment that we are involved in. We will have a number of key speakers to stimulate discussion, but it will be very much open to everyone to contribute.
The latest edition of the London Area Group Newsletter is now available to download on the Group's page!
An Annual General Meeting of the Company (Institute of Field Archaeologists trading as Institute for Archaeologists) will be held at
4.30 pm, Monday 8 October 2012,
at the Society of Antiquaries of London, Burlington House, Piccadilly, London W1J 0BE
Further details of the AGM, along with the agenda and related papers, are available via the Members area of the website (see top left menu), or via the following links.
There have been regular discussions over the years about the Institute's subscription structure and the appropriateness of the income bands that is has been based on. In an attempt to streamline and make clearer the current system, the subscription structure will be amended from April 2012. At present subscription rates are linked to a member's income – making it both complicated for members and time-consuming from an administrative perspective.
The Call for Papers for the 2012 Annual Conference is closing on Wednesday 25 January 2012. If you are considering submitting a paper for any of the sessions advertised, please send in details of which session and the title of your paper as soon as you can. The conference has a packed programme with sessions in traditional format, as well as training opportunities with a diverse group of bookable CPD workshops and open training seminars. You can find the provisional timetable on the website along with summary abstracts of all the discussions, seminars and training workshops.