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Defence Industry
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Term of the day
MOWAG has developed the Piranha IV 8x8 family of vehicles as a private venture and builds on the considerable experience obtained in designing, developing and producing the earlier Piranha III, which is now established as the world market leader in its class.
The first prototype of the Piranha IV was completed in 2001; the second prototype followed in 2004. MOWAG is marketing the Piranha IV alongside the Piranha III, now in quantity production in Canada, Switzerland and the US.
Compared with earlier Piranha vehicles, the new IV boasts a number of significant advantages including greater internal volume (12m3), higher payload and improved mobility.
In addition it has a higher level of armour protection because of its modular armour package, which can be tailored to meet specific user requirements.
The baseline Piranha IV fitted with a roof-mounted 12.7mm machine gun is fully air-portable in a C-130 Hercules aircraft with shoring. When fitted with the enhanced armour package and a two-person General Dynamics Land Systems turret, armed with a 30mm cannon, it can weigh up to 25 tonnes.
Standard equipment for the Piranha IV includes digitised vehicle information system, height-adjustable semi-active hydropneumatic suspension, a central tyre-inflation system with run-flat cores, anti-lock braking system and powered steering on the front four wheels. Unlike earlier Piranha vehicles, the latest Piranha IV is not amphibious.
Many options exist for the Piranha IV, including a nuclear, biological and chemical defensive system, air-conditioning system, fire-detection and -suppression system, heater, winch, turning circle-control system and traction control. A range of weapon systems can be fitted and the vehicle can also be adapted for various specialist roles and missions.
The now Alvis Vickers has a licence to market Piranha IV in South Africa and the UK.
KONGSBERG to deliver PROTECTOR RWS to the Irish Defence Forces(11.01.2014)
GDELS signs a teaming agreement with Falck Schmidt Defence Systems for Danish APC-R Program(25.02.2013)
General Dynamics European Land Systems presents the new EAGLE 6X6 at EUROSATORY 2012(24.05.2012)
General Dynamics Awarded 70 Additional DURO Armoured Personnel Carriers for the Swiss Army(30.11.2011)
General Dynamics Proposes PIRANHA 5 for the Close Combat Vehicle Program(30.08.2011)
General Dynamics European Land Systems presents the new Medium Trackway Bridge (MTB), the PIRANHA 3 and the EAGLE at DSEi 2011(20.07.2011)
GDELS presents the latest models of the PIRANHA vehicle and the SIAC 155/52 towed howitzer at LAAD 2011(19.03.2011)
General Dynamics Awarded Contract for 195 additional EAGLE vehicles for Germany(21.12.2010)
General Dynamics European Land Systems presents the new PIRANHA Class 5 and the DONAR at IDEX 2011(21.12.2010)
Successful launch of new PROTECTOR MC RWS at Eurosatory 2010(24.06.2010)
SOE KMDB will supply armored personnel carriers to Iraq(21.12.2009)
Spain to buy 300 new 8x8 armoured vehicles (28.05.2009)
Macedonia Purchasing 200 BTR Armored Vehicles from Ukraine(12.03.2009)
General Dynamics Awarded $217 Million Vehicle Order by Swiss Army(22.12.2008)
General Dynamics awarded Order for 18 PIRANHA IIIC 8x8 Vehicles from Brazilian Marines(21.12.2008)
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La Vergne attractions are listed below. Find things to do in or near La Vergne, TN for your upcoming individual or group travel for La Vergne visitors. We also offer the great discounts on La Vergne Tennessee hotel and motel rooms.
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The Physiology of TasteThe Floating Press 2008; US$ 6.50
Jean Anthelme Brillat-Savarin (1755 – 1826) has been credited with founding the genre of the gastronomic essay, together with Grimod. A French lawyer and politician, Brillat-Savarin believed that all food, no matter how simple, should be prepared and consumed with great artistry. Though prosaic, his meditations on food are still considered important,... more...
The Pleasures of the TablePenguin Books Ltd 2011; US$ 11.18
Epicure and gourmand Brillat-Savarin was one of the most influential food writers of all time. His 1825 book The Physiology of Taste defined our notions of French gastronomy, and his insistence that food be a civilizing pleasure for all has inspired the slow food movement and guided chefs worldwide. From discourses on the erotic properties... more...
The Physiology of Taste Translated by Fayette RobinsonReadHowYouWant 2006; US$ 3.99
The author discusses the chemical components of food and their affects on human brain and physiology. A book that every chef and layman must possess. Even careful dieters will be tempted by the appetizing and mouth-watering treats offered. Delicious! more...
The Physiology of TasteDover Publications 2012; US$ 16.95
A masterpiece on the subject of cooking as an art and eating as a pleasure, this 1825 classic on the joys of food and drink was written by a French politician and man of letters whose true passion centered on gastronomy. Includes recipes for pheasant, Swiss fondue, and other dishes. 41 illustrations. more...
The Physiology of TasteKnopf Doubleday Publishing Group 2009; US$ 16.95
A culinary classic on the joys of the table?written by the gourmand who so famously stated, ?Tell me what you eat, and I will tell you what you are??in a handsome new edition of M. F. K. Fisher?s distinguished translation and with a new introduction by Bill Buford. First published in France in 1825 and continuously in print ever since, The Physiology... more...
The Physiology of TastePenguin Books Ltd 2004; US$ 20.78
Brillat-Savarin's unique, exuberant collection of dishes, experiences, reflections, history and philosophy raised gastronomy to an art form. First published in France in 1825, this remarkable book reflected a new era in French cuisine: the advent of the restaurant, which gave the bourgeoisie the opportunity to select their dishes with precision and... more...
The Physiology of TasteDigireads.com Publishing 2004; US$ 5.99
The most famous book ever written about food. It is a comprehensive treatise on taste. more...
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On-Campus ext. 2222
Off-Campus ext. 516-299-2222
The LIU Post Emergency Medical Service (EMS) provides outstanding emergency medical services to the residents, students, staff and visitors to the campus community. LIU Post EMS provides these services in a professional manner, while maintaining the dignity of those which are served. The EMS staff continuously strives to learn, improve and grow in enhancing the delivery of emergency medical services.
The LIU Post Emergency Medical Technicians are trained New York State EMS providers. When the Fall and Spring semesters are in session the LIU Post EMTs will respond to on-campus medical emergencies.
Upon arrival of the EMTs at the scene, they will assess the medical emergency and begin to aide and stabilize the patient or patients.
The Department of Public Safety can also assist members of the LIU Post Campus community in many non-emergency situations, from battery jump-starts to vehicle lockouts. Please call 516-299-2214 or 516-299-2222 in these situations.
The Department of Public Safety collects and catalogs items that are found and handed in to the department. If you have lost an item, you can call Public Safety at 516-299-2214 to check to see if the item has been handed in.
Other campus Lost and Found areas are at the Pratt Recreation Center Information Desks 516-299-3605 and and Hillwood Commons Information Desk 516-299-2611.
Situated throughout the campus are blue light emergency phones. If a member of the campus community encounters a situation where they require immediate emergency assistance, he/she should contact the Department of Public Safety from any campus phone by dialing extension 2222 or use one of the blue light emergency phones on campus and a Public Safety officer will assist you.


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Integrated circuit components are described that are formed using selective epitaxy such that the integrated circuit components, such as transistors, are vertically oriented. These structures have regions that are doped in situ during selective epitaxial growth of the component body. These components are grown directly in electrical communication lines. Moreover, these components are adapted for use in memory devices and are believed to not require the use of shallow trench isolation.
1. A vertical memory cell, comprising:
a substantially planar surface;
a first insulator adjacent the planar surface,
a second insulator spaced apart from the first insulator, wherein an annular depression is formed in the first insulator and the second insulator;
an access device including a mesa, the mesa formed partly within the annular depression and extending outwardly from the planar surface;
a buried conductive path bounded by the first insulator and the second insulator, the buried conductive path enclosing a section of the mesa, the mesa circumferentially contacting the buried conductive path at a specified radius along a vertical sidewall region of the mesa above the first insulator, wherein a portion of the mesa extending radially inward from the buried conductive path and extending vertically along the buried conductive path between the first insulator and the second insulator consists essentially of dopant atoms of one conductivity type, and wherein the dopant atoms in the portion form with a diffused concentration profile in the radial direction; and
a storage device on the mesa.
2. The memory cell of
3. The memory cell of
4. The memory cell of
5. The memory cell of
6. The memory cell of
7. The memory cell of
8. The memory cell of
9. A vertical memory cell, comprising:
a substantially planar surface;
a first insulator adjacent the planar surface;
a second insulator spaced apart from the first insulator, wherein the first insulator and the second insulator are used to form a portion of the annular recess;
an access device including a mesa, the mesa formed partly within the annular recess and extending outwardly from the planar surface;
a buried conductive path confined by the first insulator and the second insulator, the buried conductive path enclosing a section of the mesa, the mesa circumferentially contacting the buried conductive path at a specified radius along a vertical sidewall region of the mesa above the first insulator, wherein a portion of the mesa extending radially inward from the buried conductive path and extending vertically along the buried conductive path between the first insulator and the second insulator consists essentially of dopant atoms of one conductivity type, and wherein the dopant atoms in the portion arrange in an abrupt concentration profile in the radial direction; and
a storage device on the mesa.
10. The memory cell of
11. The memory cell of
12. The memory cell of
13. The memory cell of
14. The memory cell of
15. The memory cell of
The present invention relates generally to vertical integrated circuits, and in particular to apparatus and methods for vertical transistors or memory cells.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Semiconductor memory devices, such as dynamic random access memory (DRAM) devices, are widely used for storing data in systems such as computer systems. A DRAM memory cell typically includes an access device such as a field effect transistor (FET) coupled to a storage device such as a capacitor. The access device allows the transfer of charges to and from the storage capacitor thereby facilitating read and write operations in the memory device. The memory cells are typically arranged in a number of rows and columns to provide a memory array.
The present invention relates to semiconductor devices, and more particularly to a vertically oriented field effect transistor (FET) which includes a dog-bone structure. The present invention also relates to a method of fabricating the aforementioned vertically oriented FET. A challenge of very large scale integration (VLSI) has been the integration of an ever-increasing number of metal oxide semiconductor field effect transistor (MOSFET) devices with high yield and reliability. This was achieved mainly in the prior art by scaling down the MOSFET channel length without excessive short-channel effects. With the constantly increasing demand for higher data storage capacity, memory arrays are becoming more dense. Memory density is typically limited by current processing technologies used for fabrication of the memory arrays. One technique for providing higher density memory arrays is to incorporate vertical technology in fabricating the access transistors. Among the concerns in fabricating memory devices is to provide memory cells with minimal leakage to prevent the loss of storage cell data. Further, alpha-particle induced soft errors which alter the data stored in the memory cells should also be considered, and simplification in fabrication techniques may also be desirable.
For the reasons stated above, for other reasons stated below, and for other reasons which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for an improved electronic component package and methods of packaging electronic components.
An embodiment of the present invention is directed to forming vertical integrated circuit structures using selective epitaxy and the resulting inventive structures. In an embodiment, a memory cell includes a vertical access device having a selective epitaxy mesa and an electrical energy storage device on the selective epitaxy mesa. The selective epitaxy mesa includes a bottom source/drain and a top source/drain, and wherein the selective epitaxy mesa further includes a conductive body separating the bottom source/drain from the top source/drain. The top source/drain is vertically spaced from the substrate. The bottom source/drain is an in situ doped region in an embodiment. The top source/drain is an in situ doped region in an embodiment. In an embodiment, the bottom source/drain includes a semi-annular ring around a bottom portion of the selective epitaxy mesa. In an embodiment, the height of the bottom source/drain is about equal to a height of the signal line to which it is attached. In an embodiment, the height of the bottom source/drain is less than the height of the signal line. One example of a signal line includes a buried digit line. Another example of a signal line is a wordline. The structures of an embodiment are formed without shallow trench isolation. The selective epitaxy used to fabricate the vertical body of the mesa is adapted for use with a silicon substrate to selectively form a silicon mesa in an embodiment. The use of selective epitaxy further allows the in situ doping of the mesa during fabrication to form the source and drain regions. In an embodiment a source/drain region extends around an outer periphery of the selective epitaxy mesa. The electrical communication lines can extend completely or partly around the source/drain region. The gates of the access device at least partially surround the insulator such that the gate effects electrical conductivity of the body from more than one angle. In an embodiment, an insulator completely surrounds the body of the mesa with the gate completely overlies the insulator. The portion of the mesa body beneath the gate and intermediate the top and bottom source/drain regions forms the channel of a transistor.
The present invention includes embodiments directed to the fabrication of integrated circuit devices having vertical structures formed by selective epitaxy. An embodiment includes patterning a buried conductor line on a substrate, forming recess through the buried conductor line to the substrate, forming, through selective epitaxy, a vertical mesa in the recess. In an embodiment, a bottom source/drain region is doped while forming the mesa. In an embodiment, a top source/drain region is doped while forming the mesa. Further processing steps form a gate oxide on the mesa and form a gate on the gate oxide at least partially surrounding the mesa. Embodiments of the present invention include forming the structures described herein. The buried conductor line is formed so that it completely surrounds and the bottom source/drain. The selective epitaxy of an embodiment includes using chemical vapor deposition processes that are adapted for selective epitaxy. An embodiment of the present invention further uses homoepitaxy of silicon. The selective epitaxy, in an embodiment, includes exposing a silicon surface to a gas mixture including H2 and SiH2Cl2 in a temperature range between 600-800 degrees C. In an embodiment, the selective epitaxy is a molecular beam epitaxy.
Embodiments of the present invention also includes substrates, wafers, integrated circuit packages, electrical devices, memory devices, memory units, memory modules, electrical systems, computers, which are fabricated according to the present invention.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.
In the following detailed description of the embodiments, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in which the inventions may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that process, electrical or mechanical changes may be made without departing from the scope of the present invention. The terms wafer and substrate used in the following description include any base semiconductor structure. Both are to be understood as including silicon-on-sapphire (SOS) technology, silicon-on-insulator (SOI) technology, thin film transistor (TFT) technology, doped and undoped semiconductors, epitaxial layers of a silicon supported by a base semiconductor structure, as well as other semiconductor structures well known to one skilled in the art. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined only by the appended claims and their equivalents.
The present description of the embodiments further make use of terms such as horizontal, vertical, top, bottom, up, down and words of similar import. These terms are meant to refer to orientation of the described element relative to a base substrate such as a wafer.
Each memory cell 12 includes an access device and a storage device as previously discussed. In the present exemplary embodiment, the access device comprises a field-effect transistor (FET) 14 and the storage device comprises a capacitor 16. The access device is implemented to provide controlled access to the storage device. In the exemplary memory cell 12, the FET 14 includes a drain terminal 18 and a source terminal 20, along with a gate terminal 22 for controlling conduction between the drain and source terminals 18, 20. The storage device, such as the capacitor 16, is coupled to one of the source/drain terminals 18, 20. The terminal of the capacitor 16 that is not coupled to the FET 14 may be coupled to a reference plane.
It should be noted that although the above description depicts the terminal of the access device that is coupled to the capacitor 16 as the source 20 and the other non-gate terminal of the access device as the drain 18, during read and write operations, the FET 14 may be operated such that each of the terminals 18 and 20 operates at one time or another as a source or a drain. Accordingly, for purposes of further discussion, it should be recognized that whenever a terminal is identified as a source or a drain, it is only for convenience as the source and drain could be interchanged as understood in the art. During operation of the FET 14 either terminal could be a source or a drain depending on the manner in which the FET 14 is being controlled by the voltages applied to the terminals 18, 20 and 22 of the FET 14.
As previously described, the memory array is arranged in a series of rows and columns. To implement the data storage capabilities in the memory cell 12, an electrical charge is placed on the drain 18 of the FET 14 via a bitline (BL). By controlling the voltage at the gate 22 via the wordline (WL), a voltage potential may be created across the FET 14 such that the electrical charge at the drain 18 can flow to the capacitor 16. As can be appreciated, by storing an electrical charge in the capacitor 16, the charge may be interpreted as a binary data value in the memory cell 12. For instance, for a single-bit storage device, a positive charge above a known threshold voltage may be interpreted as a binary "1." If the charge in the capacitor 16 is below the threshold value, a binary value of "0" is said to be stored in the memory cell 12.
As previously described, the bitlines BL are used to read and write data to and from the memory cells 12. The wordlines WL are used to activate the FET 14 to access a particular row of a memory cell 12. Accordingly, the memory device 10 includes an address buffer 24, row decoder 26, and column decoder 28. As can be appreciated, the address buffer 24 controls each of the row decoder 26 and the column decoder 28. The row decoder 26 and column decoder 28 selectively access the memory cells 12 in response to address signals that are provided on the address bus 29 during read, write, and refresh operations. The address signals are typically provided by an external controller such as a microprocessor or other memory controller. The column decoder 28 may also include sense amplifiers and input/output circuitry to further enable data to be read to and from the memory cell 12 via the bitlines BL.
In one exemplary mode of operation, the memory device 10 receives an address of a particular memory cell 12 at the address buffer 24. The address buffer 24 identifies one of the wordlines WL of the particular memory cell 12 corresponding to the requested address and passes the address to the row decoder 26. The row decoder 26 selectively activates the particular wordline WL to activate the FETs 14 of each memory cell 12 that is connected to the selected wordline WL. The column decoder 28 selects the bitline (or bitlines) BL of the memory cell 12 corresponding to the requested address. For a write operation, data received by input/output circuitry is coupled to the selected bitline (or bitlines) BL and provides for the charge or discharge of the capacitor 16 of the selected memory cell 12 through the FET 14. The charge corresponds to binary data, as previously described. For a read operation, data stored in the selected memory cell 12, represented by the charge stored in the capacitor 16, is coupled to the selected bitline (or bitlines) BL, amplified by the sense amplifier, and a corresponding voltage level is provided to the input/output circuit in the column decoder 28.
As can be appreciated, the memory array described with reference to
A further insulator layer 34 is formed over the conductive layer 33 and the insulator layer 32. In an embodiment, insulator layer 34 includes silicon dioxide. Insulator layer 34 completely covers the patterned conductive layer 33 and the exposed portions of insulator layer 32. Layer 34 is formed to have a top planar surface in an embodiment. In an embodiment, the top surface of the of insulator layer 34 is planarized, for example by chemical mechanical planarization. In an embodiment, the insulator layers 32 and 34 are thicker than the conductor layer 33. In an embodiment, the insulator layers are thicker than the conductor layer 33 by at least a factor of about 10. A recess 35 is formed through an assembly of insulator 34, conductor 33, and insulator 32 (
During the fabrication of the mesa bodies 36, doped regions 37 are formed in contact with the conductor layer 33. In an embodiment, the doped regions 37 are highly doped N+ regions. In an embodiment, the dopant includes at least one of phosphorous or arsenic. It will be recognized by one of skill that certain applications of the present invention may require P-type dopants such as boron. Doping of regions 37 occurs during the selective epitaxy growth of mesa body 36. That is, regions 37 are doped in situ. Regions 37 are formed above the top surface of substrate 31. The outer surface of regions 37 physically contact conductor layer 33. In an embodiment, regions 37 have a height generally equal to the thickness of conductor layer 33. Regions 37 extend around the periphery or circumference of mesa 36 in an embodiment. The regions 37 do not extend above conductor layer 37 so as to not contact insulator layer 34. In an embodiment, the doped regions 37 are formed by ion implantation. In an embodiment doped regions 37 are formed by out diffusion from layer 33. Out diffusion occurs during high temperature processing. The mesa 36 is further fabricated to extend above the insulator layer 34. Doped region 38 is formed at the top of the mesa 36. Doped region 38 is formed using similar techniques as described herein for doped regions 37. As a result of using selective epitaxy and doping at least one region 37 or 38 to form source/drains, the mesas 36 have a substantially continuous orientation of material. That is, there is no boundary between the doped and undoped regions except for the doping material when doping during selective epitaxial growth of mesa 36.
Similarly, the wordline WL, may be patterned to provide a semi-annular ring only partly around the selective epitaxy mesa 36.
As can be appreciated, while the present wordline and bitline structures are described as being fabricated through deposition techniques, other processes, such as a damascene process may implemented to form the wordlines and bitlines in accordance with the present techniques. Further, while the present exemplary embodiments have illustrated the annular gate structures with respect to DRAM memory devices, the present techniques may be implemented in a number of other applications, including but not limited to flash memory cells, SRAM memory cells, anti-fuse devices, image sensors and simple logic gates.
Next, a series of layers are formed over the entire substrate, which in an embodiment is a wafer (
The mesa 36, 36A described herein is adapted for use as a conductor between levels in an integrated circuit. It is recognized that the mesa 36, 36A could form a conductive signal line between levels in addition to forming a transistor as described above. Specifically, the mesa 36, 36A is described as a transistor body with doped source\drain regions 37, 38 and a channel region intermediate the source\drain regions. In an embodiment the mesa is doped such that it is always conductive between to conductive layers instead of being a switch device.
The integrated circuit structures described herein are fabricated according to integrated circuit fabrication techniques such as selective epitaxy, chemical vapor deposition, physical vapor deposition, and other techniques understood by one of skill in the art. Moreover, the structures described herein are adapted to be used as components in a variety of electronic devices, such as memory modules, circuit modules, electronic systems, and computer systems. As shown in
The present disclosure describes a method for fabricating a vertical transistor and a vertical memory cell. Vertical structures extend outwardly from the planar surface of a substrate, i.e., upwardly from a top surface of a wafer. Such vertical structures use less real estate (area) on a substrate than convention planar (horizontal) transistors and memory cells. There is a constant desire in the field of integrated circuits to pack more devices and structures on a substrate or die. There is also a further desire to fabricate smaller dies that have at least the same functionality as prior larger dies. The present invention addresses these desires. Moreover, there is a constant desire to reduce fabrication complexity to achieve fewer defects caused by complex fabrication techniques and to increase fabrication throughput. For example, the present invention may not require shallow trench isolation between devices thereby freeing more area on the substrate for active device fabrication.
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that any arrangement which is calculated to achieve the same purpose may be substituted for the specific embodiments shown. Many adaptations of the invention will be apparent to those of ordinary skill in the art. For example, other integrated circuit processing equipment may be utilized in conjunction with the invention. For another example, other integrated circuit fabrication processes are adapted to produce the dies and chips according to the present invention. Accordingly, this application is intended to cover any adaptations or variations of the invention. It is manifestly intended that this invention be limited only by the following claims and equivalents thereof.
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Welcome to Robert Hunter Landscaping and Joinery. We are a small family run business established in 2004 covering the whole of Perthshire and beyond.
Specialising in fencing, decking, patios and turfing we offer everything from simple garden maintenance to complete garden makeover.
We offer professional, affordable and reliable service dedicated to our customers needs every step of the way. Contact us for an initial visit and free quotation.
Use the navigation menu at the top to find out more about the range of services we provide and to see more of our work.


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MOUNT KISCO, N.Y. — Douglas Kennedy, broadcaster for Fox News and son of the late Robert Kennedy, allegedly got into an altercation with Northern Westchester Hospital staff earlier this year, and was charged with child endangerment after fighting with nurses before trying to leave the hospital with his newborn baby boy, according to reports by WNBC New York and the New York Daily News.
According to the Daily News, the 44-year-old Kennedy "is alleged to have twisted the wrist of one of the nurses and kicked another in the groin when they got in his way at Northern Westchester Hospital" on Jan. 7.
Dr. Timothy Haydock, a doctor at the hospital and has been reported to be a friend of the Kennedy family, was present during the altercation and said the broadcaster did nothing wrong.
"I witnessed the incident and I can state unequivocally that the nurses were the only aggressors," Haydock was quoted saying in the Daily News.
Anna Lane and Cari Luciano of the hospital's maternity ward have acquired personal injury lawyers, the newspaper claimed.
To read the New York Daily News report, click here. To read the WNBC New York report, which was the first to surface, click here.


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Uraguay's parliament has approved a law that threatens the existence of failed national carrier Pluna by allowing the state-guaranteed portion of the fleet - seven Bombardier CRJ900s - to be auctioned to the highest bidder.
The law creates an institution for managing all Pluna assets for six months. Its tasks include the maintenance and sale of the fleet directly owned by the state, job assistance for Pluna workers and negotiating international traffic rights.
Leadgate, formerly Pluna's controlling shareholder, abandoned the carrier in June. The airline then was grounded by the government. That was followed by a search for new investors, with Jazz parent Chorus Aviation and Argentina ferry operator Buquebus among the frontrunners.
However, a 30-day exclusivity period for Jazz expired with no serious offer. The centre-left government then decided to stop the search despite heavy protests from Pluna's union.
Uruguay vice president Tabare Vazquez admitted earlier this week in a public statement the government's share of responsibility in the Pluna disaster, saying that they "committed errors" in its reprivatisation process.
In international surveys, as opposed to its large Argentinean neighbour, Uruguay routinely appears as one of South America's least corrupt and most transparent countries.
Pluna did not operate domestic flights but tried to connect Argentina's with Brazil's regions via Montevideo. The business model ultimately failed because Argentina's protectionism prevented Pluna to access some key markets vital to run a balanced hub structure.
Since Pluna's grounding, airlines such as GOL, Aerolineas Argentinas, Austral, Sol Lineas Aéreas (Argentina) and Sol del Paraguay, have opened new routes and added frequencies to Montevideo, while Argentina has proposed to Uruguay to make Aerolineas Argentinas the country's new national carrier.
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Moodle is an online tool that allows educators to interact with students outside the classroom and manage a course from anywhere. In Moodle Essential Training for Teachers, Chris Mattia shows how this program works for teachers on three levels: disseminating information, creating a forum where ideas are exchanged, and assessing the progress of students. Chris shows how to build course materials with Moodle's HTML editor, post assignments, and save time by using Moodle's grade book to evaluate tests automatically and organize scores. Exercise files accompany the course.
Let's go into the Administration block and click on the link for Settings to look at the other settings that we are able to control inside of our course. If we click on the link for Settings, we have already been to this page once before in an earlier movie. But let's quickly review the settings that we changed there and then look at other settings that are available to us. In the General section, the top part of this course, where it list out the Full name for our course, the Short name for our course and any Course ID. This section is almost always entered in for you already by your institution and should rarely be changed by the instructor. This information is going to be what is showing inside of the main listing of courses for your institution.
Many institutions locked this information from being edited by their instructors at all. In our case, the information is available to be edited but we are going to go ahead and leave it as it is. The next section is for Summary. The Summary is most often used as the course catalog description by your institution and should be either filled in for you or it's a place where you can simply copy and paste the course description that's listed for your course directly into this space. As we scroll down, we get several options that allow us to control the Format.
Earlier in this training we changed from a Topics format to a Weekly format. There are variety of other formats that you can choose from and if any of those formats are ones that work with your kind of layout of a course, you can feel free to select those. In our case, we want to make sure we'll leave this set to a Weekly format. The Weekly format is the most common format that's used by instructors using Moodle. You can then set the Number of weeks or topics that you want to have blocks of content for inside of your course. Because we are teaching a 15-week semester, we have chosen to have 16 weeks or topics that will include a week for the spring break session. We then set the Course start date. This is the first date of the first week of your semester and then any additional weeks will be calculated off of this date.
The next option for Hidden sections are completely invisible, allows us to control how we want hidden sections to be displayed. In previous movies, there is the button on the right hand side of each content block where you can hide all the other content blocks. The setting that we have got here set for Hidden sections are completely invisible, makes all the other sections completely disappear. If you select the top option, Hidden sections shown in collapsed format, you would see blanks listed for each week of your semester and then the week that you have highlighted would be left open. So students would see that additional information there but it wouldn't be displayed to them all the time. This is a personal choice and I encourage you to go in and explore this option. I prefer to have hidden sections completely invisible. That way I'm able to focus on the work for the week that I'm working on and then hide away all the other information.
News items to show, in the upper right hand corner of your course you have a news block. Or if you are coming from other learning management systems, you may know this section is Announcements. The number that you select here in this dropdown menu will control the number of announcements or news items that are showing inside of that content block. The next option allows you to control whether or not you want to have students to have access to the Grade Book inside of your course. Students would only see the grades for themselves and only see the grades that you have told them that they are able to see. Your Grade Book would have access to additional information where you can see all of the grades for all of your students. It's a good idea to allow your students to constantly have updated information to know their exact status inside of the course. To do this, go ahead and leave this option set to Yes.
The next option is for Show activity report. There is a course content block called Activity and if you set this option to Yes then anytime a student logs in to your course and does anything inside of your course or you go into your course and you post any content or materials inside of your course, the Course Activity block will show which user has done which activity. This is a great way for you to be able to monitor what's going on and it gives your students a way to look and see when you have posted new content to know exactly what that new content is.
However, this block can get a little confusing at times because of the information that's coming into it. I'll go ahead and leave this set to No. The next option for Maximum upload size is depended on your particular Moodle server configuration. The Default setting for the installation that we chose on the Mac install was 32MB. The Maximum upload size on a Windows install that we did was 16MB. Your institution may have a very different list of options that's available here for Maximum upload size. If the Maximum upload size is too small for the data that you need to be uploading inside of your course, you will need to contact your IT Department and find out about having the settings and the server adjusted in order to accomplish your learning objectives.
As we scroll down, the next block of content is for Enrolments and in most institutions you should not have to adjust the enrolments section of your course. This should be being managed for you by your institution, but in some situations enrolment is left to be managed by the instructors. If this is the case, you can control that here. The default setting for Enrolment plugins should almost always be left to Site Default, which is the Internal Enrolment. Rarely should you ever need to change this setting. The next option for Default role is the role that is assigned to new users when they enroll into your course. The default is almost always set to Student and it's a really good idea to leave this set to Student. You definitely want to set this option to whatever the lowest level of permissions that you want new users to be at. You can be more specific by simply selecting Student to make sure that if a setting is changed in the server, then any new users who get enrolled will still get enrolled as a Student.
If you are teaching a course where you want to have guest access, you can also set this option to Guest and then users can come in, they can see any material that you have turned on to be available to guest, but they are not able to go in and start working with the materials in your course which you have restricted to your students or higher level users. We'll go ahead and set this option to Student. So we are very specific as to what role new users will get. You can then control whether or not your course is enrollable at all or not. By default most courses are set to be not enrollable because enrolment is taken care of by the IT Department or through the registrar's office. Different institutions have different policies as to who handles enrolment. So this setting may be adjusted differently depending on your specific needs. One thing that you can do is you can always change this option temporarily to Yes to allow someone to enter into your course as a new student and then switch it back to No.
You can also control the Date ranges here by selecting this option and then changing what the Start and End dates of your open enrolment period are going to be, if you want to have students to automatically be able to self enroll into your course. We'll go ahead and leave this option for right now set to Yes with both of the check boxes for Disabled for our Start and End dates. You can also control the Enrolment duration, so that you can say that enrolment is only going to be open for say the next two days or five days.
We are going to go ahead and leave ours set to Unlimited because for this test course if we want to have anyone to just log in and see what our course is all about that is already set up for us now. As we scroll down, the next block of options is for Enrolment expiry notification. This controls what happens if you have users that are set up to have their enrolment to expire at a certain time period throughout your course. So if you are teaching an ongoing course, you may have users that are enrolled only for a specific range of days and then their enrolment gets terminated.
Here you can set whether or not, you want to be notified as the instructor when this is about to happen. You can also control whether or not you want to have a message go out to your students if they are about to be unenrolled from your course. And you can set the number of days in advance that this message will go out to both types of users. In most cases, you are not going to be using these settings. The next section is for Groups and this section here allows us to control whether or not we want to have groups as part of our course. Whether or not we want to have Separate groups where each group of students if we set an assignment to use groups and have materials separated then only members of that group will be able to see that information. The Visible groups means that all students in all groups would be able to read and see all the materials that are available only to the other groups as well. In our case, we are going to leave ours set to Separate groups, as we'll go into the groups in a later movie.
You can also control whether or not you want to Force groups to be enabled on your site. We'll go ahead and say No, because most of our site is set up to be used without groups. As we scroll down to the next section, the next block is for Availability. Here you can set whether or not you want your course to be available to students or not. This means that say you are building your course for the next semester but you don't want all of your students to be able to see the materials that you are building before the semester starts. It's a good idea then to come in and set this to 'This course is not available to students.' Your course will still show up on your listing, because you are the instructor. But it won't be available to any of your students until you log back into these settings and then change this to 'This course is available to students.' We'll go ahead and leave this course available to students so that any student that were to log in would see all the materials that we are working with.
The Enrolment key gives you a place where you can set a secret password that you can then give out to your users to allow them to enroll into your course. This is a nice little security feature that's used at some institutions, so that you can have students that need to come to see to instructor before they enroll into a course to get approval. This is a nice stopgap because when the student comes to see the instructor, you can give them the enrolment key and then they are able to access the online materials inside of the course.
You can also control Guest access for your course. Guest access is a great way for you to provide a kind of advertising for your course to other students at your institution. Other students would be able then log in as a guest to your course and see the material that you are making available to guest. You can control whether every single item inside of your course is available to guest or not. But that option only becomes available once you set up to have guest available. You can also choose whether or not you want to have guest available without any key, meaning anyone can simply come in and view your course as a guest or if you want to restrict access to users by providing this enrolment key to those users and then they are able to access the materials inside of your course. Their status would still be listed as a Guest, so they wouldn't be able to necessarily get in and work with all of the materials but they could get in and see the materials that you have made available to guests.
We'll go ahead and leave Do not allows guests in our course for right now. As we scroll down the next block allows us to control the Language settings for our course. Here the languages that are available on your server, that have been set up inside of your Moodle installation, should be available to you inside of this option. If you are teaching your course at an institution where you are using other languages, you may want to force your course into that particular language. This is incredibly helpful when you are teaching a foreign language course such as Spanish, French, German, Italian or so forth. In those instances you can set up a language that you want your materials to be displayed inside of your Moodle course. In our case, we are going to leave this set to Do not force.
The final section inside of the course settings administration is the renaming of roles. For the most part, you should leave this set alone unless there is a specific need where you want to change, say, instead of referring to your students as students, you are going to refer to them as learners or you want to change the designation of Teacher to something like Instructor. But for the most part, all of these settings should be left alone unless there is a very specific need for them. Go ahead and click the Save changes button and all of the settings changes that we have made will be made available immediately.
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Don't panic this morning if you happen to hear tornado sirens blaring later on.
According to Elbert County EMA Director Chuck Almond, the county will be conducting a test of the tornado warning system.
The test was originally supposed to take place on Wednesday, but due to rainy weather and a few rumbles of thunder, the test was pushed back in favor of having more favorable weather conditions.
So this morning the siren test will begin just a few minutes past 9:00am, and according to Almond will run just one cycle before the test is concluded.


text:
We're racers and we love everything about racing.
After years of participating in this great sport, we thought it was about time someone came out with a line of really cool and unique screen printed T-shirts which reflect the art and culture of much earlier times.
Recognizing a need for some subtle humor in our Vintage Racer Tee designs, we came up with a few fun concepts that have become really popular in addition to honoring some old "ghost" tracks from another time.
C'mon in and check out the shop - it's like time traveling in style - then stick around, look at the racing pics and browse the vintage racing links. Ask questions in the forum, get acquainted. It's not just about the shirts, it's about the sport - it's all about racing.


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2011 traffic fatalities down in Collier, up in Lee compared with 2010
NAPLES - Southwest Florida roads remained about as safe in 2011 as 2010.
Florida Highway Patrol data shows the number of traffic-related deaths in Collier and Lee counties held steady compared to previous years, with a slight uptick in fatalities reported in Lee County and a small decline in Collier County.
Between the two counties, 108 people were killed on roads in the area for various reasons — accidents, drunken driving, texting while driving and negligence. Thirty-six died on Collier roads, down from 42 in 2010, while 72 were killed in Lee County, up from 65 in 2010, FHP reported.
"We've been pretty consistent the last couple of years, and that's down from a few years back when we were at 55 or 60," said Collier County sheriff's Sgt. Robert C. Brown of the Safety and Traffic Enforcement Bureau. "Even when we were up high around the 60s, that might sound like a lot, and it's a tragedy that those people died in our county, but that's substantially far fewer fatalities than a lot of the neighboring counties."
Traffic fatalities generally have been on the decline in the past half-decade — locally, statewide and nationally.
Last year's 2,444 traffic-related deaths in the state were a three-decade low, with figures for 2011 not immediately available. And the U.S. Department of Transportation said the fatality rate per miles driven was the lowest since 1949, the first year data was compiled.
In the past five years, fatalities have fallen by about one-third in both Collier and Lee counties.
Last year's 2,444 traffic-related deaths in the state were a three-decade low, with figures for 2011 not immediately available. And the U.S. Department of Transportation said the fatality rate per miles driven was the lowest since 1949, the first year data was compiled.
Brown said Collier sheriff's officials have used a three-prong approach to reducing traffic crashes — helping engineer roads better, educating the public, and enforcing traffic laws. Mapping systems also have allowed for efficient targeting of more dangerous areas.
"We're going to continue being observant and preventative," Brown said. "If you can address issues in their infancy, then you're going to be much more successful than somebody who doesn't do that."
Still, the figures are subject to chance in some respects.
"You're going to have a variance every year. That's just normal," Brown said. "But you can effect that variance dramatically with a very focused approach to traffic safety."
Efforts to reach Lee sheriff's officials for comment about the traffic fatality figures were unsuccessful.
Traffic safety could once again become a legislative issue when the 2012 session starts next week. A bill proposed in December 2011 would ban texting while driving, making it a secondary offense. While similar bills have failed in recent years, both Collier County Sheriff Kevin Rambosk and Lee County Sheriff Mike Scott have supported bans. Scott has expressed some reservations about a possible precedent.
"I'm all for it," Scott said last month. "It's difficult to enforce, very difficult to enforce, and I think sometimes just throwing a law at the problem may or may not gain the result that we're looking for."
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