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How can I dilate more
Comments (8)
Have sex seriously I was 2 weeks late and that is what I did. Or walk alot
I've tried everything I'm 41 weeks today and have been at 1 cm dilated for the past month. Not sure how far along you are but I've heard in numerous places primrose oil is the best option. It's strange how you use it but everyone that I know who has done it has had their baby within two days of using it. You can get the tablets at Walmart in the vitamin section I believe.
When i went to doc yesterday she said hey did you realize you were having contractions i was like ugh no lol (first time mom here) and oh your dilated to 1 cm and lining is thining already you might go earlier but well see what happens with the contracts....problem is i didnt even realize I was having them before LOL!
Haley (30) married Joe (30) *8-15-2009*
#1 took provera.gonal.follistim.ovidrell.endometrin
3-6-12 Ariana Jo is here!!
The Truth May Set You Free, But First It's Gonna Piss You Off . - someone important


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purplegirl says ...
Get ready to feel like you're being ignored. He'll be tired. He'll be hitting the books. He'll be cleaning his gear and getting ready for the ne...
RESEARCH, RESEARCH and RESEARCH. Did I remember to say RESEARCH?
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about 3 years ago
44582 Comments
Just stopping by. I hope all is well with you and yours. Have a good week and stay safe.
about 3 years ago
43114 Comments
Hi, Saw you were on-line so thought I'd just stop by and say HI.
Have a GREAT day.
God Bless
about 3 years ago
7234 Comments
Hey there Ron! Just wanted to pop in to wish you a wonderful weekend. It is gorgeous here in NC!!! :)
about 3 years ago
870 Comments
Hey you Good morning ! Hope you and your family had a Happy Easter :) I'm finally going to be moving about the 2nd week of May . Life has been busy but really good to me things are starting to shape up I've been dating a great guy for about three months now and it appears promising. Work has been keeping me busy as usual my On call job has bumped up my hours so basically I have been working a full time Job and a part time job . I hope you are well :)
about 3 years ago
43214 Comments
Easter blessings to you and yours Ron, take care
about 3 years ago
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about 3 years ago
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over 3 years ago
23274 Comments
Saw you on line and thought I would drop in to say hi. Things are going well here on the West Coast of Central Florida these days. Hope the weeks been good to you. The Easter weekend will be here before you know it. Be safe and have a great holiday periiod. Carl
over 3 years ago
Most everything is going well here. Just wanted to stop in to wish you and yours a Happy Easter.Take care as you go through the rest of the week.
over 3 years ago
K, standing by.
over 3 years ago
What's up Ron? I took a half day off today! I'm just not in the mood to deal with America's future today! I may just take tomorrow off too! Be safe and watch your 6. Later!
over 3 years ago
43214 Comments
Stopping by to say Hi Ron, and hope you're having a great start to your week, take care and be safe my friend.
over 3 years ago
What's up, Ron? I hope your week was good and your weekend better!
over 3 years ago
7234 Comments
Hello Sir! How are you doing? I am doing pretty good.. I am not moving to FL, by the way... Have a great weekend.
over 3 years ago
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ℑ ℌø℘ε ⑂◎ʊ нαṽε α ω◎ηḓεґḟυʟ ♏øηḓαƴ αᾔḓ @η αღαℨїη❡ ẘℯℯḱ▣ $☂αƴ ṧ@ḟ℮❣❣‼ ~~ ✞▁9

subset: commoncrawl


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MOVIEmeterSEE RANK
Down 2,420 this week
The Stöned Age (1994)
R | | Comedy, Music | 5 December 1994 (USA)
Ratings: 6.2/10 from 3,497 users
Reviews: 73 user | 5 critic
Joe and Hubbs are a pair of rockers who are on a quest for 'chicks'. This is the tale of their adventures over one night.
Director:James Melkonian
Writers:James Melkonian, Rich Wilkes
Stars:Michael Kopelow, Bradford Tatum, China Kantner | See full cast and crew »
Watch Now
From $2.99 on Amazon Instant Video


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NOTE: All briefs are embargoed until the date/time they are presented.
Seattle, WA (Vocus) October 7, 2009 -– Plastic Surgery 2009 News Briefs are designed to keep you up-to-date on embargoed studies and other news being presented at the annual meeting of the American Society of Plastic Surgeons (ASPS) held October 23-27 in Seattle. All briefs are embargoed until the date/time they are presented. To obtain an advance copy of study abstracts, for media registration, or to arrange interviews with presenters, please contact ASPS Public Relations at (847) 228-9900, media (at) plasticsurgery (dot) org or in Seattle, Oct. 24-27 at (206) 219-4726.
Creating the Youthful Eye - Is Less Really More?
Embargo for Release: Monday, October 26, 2009
Take a look at the latest issue of Marie Claire and you're sure to notice the fresh-faced beauty with youthful eyes on the cover. Many try to recapture this look through eyelid rejuvenation. However, when it comes to eyelid surgery, is it better to remove or reposition tissue in the upper eyelid? Plastic surgeons at the American Society of Plastic Surgeons (ASPS) Plastic Surgery 2009 conference, Oct. 23-27, in Seattle, will present differing perspectives on eyelid rejuvenation, comparing tradition, tried and true, versus novel approaches. The common use of fillers and muscle relaxants (botulinum toxins) around the eye has lead to a serious reconsideration on how to best enhance the appearance of the upper eyelid region.
By the Numbers:
More than 220,000 eyelid surgeries were performed in 2008, making it the fourth most popular procedure, reports the ASPS.
In 2008, more eyelid surgeries were performed in the Mountain and Pacific regions of the U.S., than anywhere else in the country.
Panel: "Rejuvenation of the Upper Eyelid - Is Less Really More" is bei
|Source: PRWeb
Copyright©2009 Vocus, Inc.
All rights reserved


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Tag Archives: Fred Shapiro
Research: Blue laws, green cards and other colorful legal terms
Elizabeth Thornburg never imagined that she would be turning to Dr. Seuss, Shakespeare and vaudeville for legal research. But those sources proved invaluable when she joined forces with another law professor, a law librarian and a legal lexicographer for the book … Continue reading
Posted in Research Tagged Dedman School of Law, Denise Gee, Elizabeth Thornburg, faculty books, faculty research, Fred Shapiro, James E. Clapp, Lawtalk, legal history, legal terms, linguistics, Marc Galanter, origins of expressions Comments Off on Research: Blue laws, green cards and other colorful legal terms


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Bloodmyst Isle quests
Category page
Revision as of 00:24, July 6, 2008 by JIM the Inventor (Talk | contribs)
102,794pages on
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Quests associated with Bloodmyst Isle.
- Main article: Bloodmyst Isle quests
"This questing guide for the zone of Bloodmyst Isle details the best method to obtain and...Bloodmyst Isle questing guide
"This is a list of all Bloodmyst Isle quests in table format (arranged by level). For a questing...Bloodmyst Isle quests
Pages in category "Bloodmyst Isle quests"
The following 80 pages are in this category, out of 80 total.


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Extremely sorry for the noob question, but I had never heard of CVDs until a few weeks ago. I have been trying to figure this out but can't.
I need it in noob language... what exactly are MIPs? They are a replacement for the sliding driveshafts, correct? Will getting these solve the problem of pushing down the suspension and not even having it come back up?
In some areas you could call me an expert. This is not one.
X1billion, and thanks for the help.


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TOYOTA: 1973 Celica GTV, Japan spec Toyota TA22 Celica GTV, 2T-G engine, federally, legally imported from Japan using 25-year-old cars import exemption regulation, right... More
~CALL US FOR A DETAILED DESCRIPTION OF THE CAR! WE DO A 150+ POINT CHECK ON EACH VEHICLE AND ARE HAPPY TO SHARE... More
This 1984 Toyota Celica GTS sport coupe, 2.2 RE, 5 spd manual, is in very good to excellent condition. It has pwr door locks,... More
1991 Toyota Celica GT, 5 speed, Red, Hatchback, with only 126k. This car was taken off the road every winter and garaged, absolutely NO rust, new... More


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ZombieMod takes a unique approach on the Zombie Apocalypse by putting it in the perspective of a military commander, not a survivor. Since it is 2 years after the first infections, resistance on the east coast is organized, resulting in battles rather than small groups fighting for survival.
North Korea did say they would not hesitate to nuke us right? Well looks like they finally did it....
Too bad it's a dud :/
They failed horribly with that 60's missile XD
Oh you so silly! =P
Aw shucks, you got me!
I cannot wait until this mod is out, It looks so damn good. Keep up the good work!
Even though this is a April Fools Joke, please keep this in as a Secret Ability or as a Map Prop Hidden in maybe shot into a farm house with a hole in the roof.
We'll find something to do with it haha
This April update, we are showing you some of the new endgame abilities!
In this shot, you can see a North Korean nuclear warhead about to (maybe) rain destruction upon the zombie menace!


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November 22, 2011
October 17, 2011
September 28, 2011
September 27, 2011
(Chris Murphy is a) 27-year-old University of Illinois journalism graduate who currently works as a sports writer for the Fargo-Forum in Fargo, North Dakota. (Chris Murphy was also a) Former sports editor of the Worthington Daily Globe in Worthington, Minnesota, and high school sports writer for the SouthtownStar and the Sun-Times Media Group in the Chicagoland area.
(Chris Murphy) Enjoys writing and discussing sports when (he's) not spellchecking (his) way to the top.
(Chris Murphy) Doesn't understand why people write their profiles in the third person.
(Chris Murphy) Has been published all sorts of places via work on the Bleacher Report, receiving a total of $0, but lots of reassurance in the job career (he's) chosen.
Chris Murphy likes his chicken spicy.
Chris, I'm getting back in the game! You'll start seeing some more Sox articles coming from me.
Hey, would you be able to send your e mail to email@example.com? I want to get the B/R community leaders on a mailing list for a press release on behalf of Sports Media 101.
Thank you for writing your latest article about Jay Cutler.I am a big Bears and Cutler fan from Milwaukee! He is a private person that has a huge heart. Good to know there are still people around who won't trash Cutler every secound of their day! Go Bears!
Hey Chris
Should the White Sox chase Dunn at the cost of losing Konerko?
Hey Chris...I think you need to check the Ihssca 2010 Boys soccer awards with your article in the sun-times today......you got some as honorable mention that are all-sectional and some you didn't even mention??? confused.
Sorry for the accidental double up on the last post!
Still some things to deal with in camp!
Still some things to deal with in camp!
BR Fantasy Football League (Slideshow Version) http://bleacherreport.com/articles/431240-br-fantasy-football-league-slideshow-version
Hey Christopher,
The White Sox should reacquire Scotty Pods!


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Remote administration.
Created: 17 Jan 2013 • Updated: 14 Feb 2013 | 2 comments
This issue has been solved. See solution.
My question is: does Symantec company have or previously has had any system for remote administration of multiple servers?
I'm probable thinking about system which is based on agent-architecture. Agents run inside either physical or virtual machines and are responsible for gathering information and performing necessary actions, like backup, restore, etc.
System with user-friendly graphical interface along with dashboard, logs, alerts and all this staff.
Some kind of management console?
Additionally, what about the tool of conversion physical machine into VM?
It seems that I'm overlooking something.
Best regards, Bernardo Casalvieri.


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Tennessee's 18-game Southeastern Conference men's basketball schedule for the upcoming season was announced Friday on the SEC Network. ONLINE SCHEDULE | PRINTABLE SCHEDULE
Click here for the original story.
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Take Flight
Now that summer's finally here, don't let it slip by. Make a plan and go for it. Become intuitive. Don't think too hard. Turn off… READ MORE
It Doesn't Get More Summery Than Fireworks at Geneva-On-The-Lake @VacationInAshCo
Sat 7/4 @ 10pm Want the quintessential summer experience? This Fourth of July head an hour east of Cleveland to Geneva-On-The-Lake, Ohio's own Coney Island-style… READ MORE
.@Lock3Akron Gets Slathered in BBQ Sauce
Wed 7/1 – Sat 7/4 If ribs slathered in BBQ sauce spell "summer" to you, then you'll want to be at Akron's national Rib, White… READ MORE
MANSFIELD: The Price of Forgiving
Much has been made in regards to the magnanimous gesture made by the families of the nine massacred members of Emmanuel AME church in Charleston;… READ MORE
Spiritual Acoustic Reggae From @TrevorHallMusic @MusicBoxCle
Tues 6/30 @ 8PM Wed 7/1 @ 8PM There's something about the languid, almost sleepy, cadences of reggae that appeals to spiritually minded white hippie… READ MORE
MANSFIELD: Don't Murder the Murderer
If, as the Rev. Dr. Martin Luther King, Jr. once said, that, "unmerited suffering is redemptive," then we — as a race of people —… READ MORE
The Star-Spangled Spectacular @CleveOrchestra Moves to Mall B
Wed 7/1 @ 9PM Look for something a little different this year when the Cleveland Orchestra returns downtown for its annual Star Spangled Spectacular. With… READ MORE
Two More Local @Apollos_Fire Concerts Before They Head to Tanglewood
Mon 6/29 @ 7:30PM Tue 6/30 @ 7:30PM Founded in 1992, Apollo's Fire, Cleveland's baroque orchestra, seems to extend its reputation a little more each… READ MORE
Now in Its Fourth Year, @ChamberFestCle Crosses Borders
Wed 6/17-7/1 ChamberFest Cleveland has dubbed its fourth season "Crossing Borders," which expands what it's actually been doing since it launched in 2012, with a… READ MORE


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Munchstache Cookie Cutters.
Now these are so cool! Not only can you make your very own moustache in five different styles, but you can then try them out for size, seeing what on earth you'd look like with a mo, which one you'd suit before eating them! Yummy!
Great fun for kids, who love these, probably more playing with them! A great addition to any party, these are sure to go down a treat! A bestseller and we can see why, they are just so flipping cool! An ideal way to support your man though Movemeber too!
Each set contains 5 moustache cutters, all off different styles made from durable food safe, high tech plastics. They also comes packed in a reusable storage tray. To see all our other bestselling gifts please click here.
© 2015 Flamingo Gifts, VAT Number 142 8589 86


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The new report* states that the UAE's pharmaceutical market is currently dominated by imported branded drugs, however aggressive measures are being taken to encourage patients and physicians to switch to generics.
The UAE's population in 2011 was 8.4 million, but indigenous UAE citizens made up only 11.5% of this total. There is a large expatriate population in the country, primarily from Arab and Asian countries. High numbers of immigrants, a low mortality rate, and high life expectancy are leading to population growth within the UAE. Thus, the disease burden associated with lifestyle-related diseases and an aging population will force the government to allocate more resources to the care of the elderly, imposing financial and logistical burdens on the healthcare system.
For Sample Pages, please click or add the below link to your browser:
The UAE's pharmaceutical market is dominated by expensive branded products imported from the US and Europe, with the UAE domestic pharmaceutical industry comprising only 20% of pharmaceutical sales in the country. This preference causes product shortages in state healthcare facilities. To overcome this, the government has initiated several initiatives to better control the market. It is attempting to put in place price controls, while restricting advertising practices and banning direct-to-consumer marketing for drugs. The Ministry of Health (MOH) also introduced a cost cutting measure in an initiative that caused a price reduction for 565 branded drugs targeting chronic conditions such as diabetes and other lifestyle diseases, with costs being cut by 5-30% since January 1, 2012.
Meanwhile, the Health Authority Abu-Dhabi (HAAD) has announced that the country should adopt more cost-effective drug procurement strategies, including the use of generic substitution, to help to reduce inefficiency in the healthcare and pharmaceutical sectors. The Middle East Generic Association (MEGA) was formed in 2010 to promote both proper regulatory and bioequivalence testing and promote generic drug sales in the region.
The UAE also benefits handsomely from re-exportation of drugs to countries like Iran, Pakistan, Yemen, and Somalia. Since 2003, pharmaceutical imports have grown from a worth of AED800m (US$217.76m)
In 2011, the UAE's pharmaceutical market was estimated to be worth US$1.9 billion, having increased from US$1 billion in 2006. The Compound Annual Growth Rate (CAGR) for this time period was 13.7%.
The market is expected to reach US$3.7 billion in 2020 with a CAGR of 7%
For further details, please click or add the below link to your browser:
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Results 1 to 3 of 3
Thread: New alien mask and sculptures
September 12th, 2009 #1
New alien mask and sculptures
Here is a new alien mask i just finished painting. I am going to have it for sale soon through my website. I also have a few more images of my mask in progress on my blog. I also posted pics of my new clown sculpture in progress. Tell me what you think.
Hide this ad by registering as a memberSeptember 15th, 2009 #2
I really like the eyes!!
and the paint job is very well done, the sculpt is very well designed
oh and the clown is looking good, my only crit is the symetry looks a little off,maybe the pics?
Earhole Bongsplat
September 20th, 2009 #3
New sculpt
Thank you for the critique. I noticed that after you said that. Sometimes you have to take a picture to realise mistakes. It is a lot more noticable in the pic.
Here is another new mask sculpture i just finished. I started off with a ghoul from one of my drawings and then just went off with adding texture and some more character. It reminds me of the pumkinhead character in the face. I was watching the movie in the background and i think some of it rubbed off.
Tell me what you think.


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One reason I want to lose weight is to resume mountaineering. So I bought a magnetic picture of Mount Rainier and put it on the frig where I see it everyday. I also put a picture of a runner with the type of body I hope to have on the inside of my gym locker. Both motivate me on a daily basis.
What has been helping me with losing weight is to be able to visualise how much I've lost (and need to go)... To do this I visualise it in terms of cans of coke (or any canned drink)...Most are 330ml which equates to 330g (in the UK anyway), so it's 3 cans per kg - or if you're using lbs, it's 1lb = 1 and a third cans cans...So when you 'only' lose just under 1lb in a week, it's quite a lot, when you actually pick up a can. 2lb is 2.5 cans, etc, etc.Happy canning!
we collect cans! so on daz when we dont do w/o's, i grab my perdometer, a grabber & i walk , pick up cans. i can steps, & collecting cans cleans up the enviorment, & i get a little money.. did u know 10 bags of crushed cans pays approx 15.00? thats a new gym outfit 4 me. 334
When I think about the weight I have lost, I think of it as the 3 pound cans of Crisco. I have lost over 60 pounds which would be like carrying 20 cans of Crisco. Can you imagine carrying 20 cans of Crisco everywhere you go. I have about 23 cans to go (69 pounds). 334


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Do same sex couples have the same legal rights as other couples?
Employee Benefits Issues in California Following the U.S. Supreme Court's Same-Sex Marriage Decisions
Polsinelli Podcast - Defense of Marriage Act
Weekly Brief: $350K in Wine Leads to $14M Lawsuit
Viewer's Guide to Gay Marriage Oral Arguments
Weekly Brief: Are Scholarships a Bait-and-Switch For Law Students?
Corporate Law Report: Global HR, Textual Harassment, Working Interviews, and Other Workplace Issues
Same-Sex Marriage Cases in 90 Seconds
Did the Supreme Court legalize same-sex marriage?
On October 6, 2014, the Supreme Court of the United States denied review of seven petitions challenging federal court of appeal rulings in the Fourth, Seventh, and...more
In recent months employers around the country, have been scrambling to keep up with developments with respect to the evolving rights of employees in same-sex relationships. This articles touches on some recent guidance in...more
The employee benefits issues to be considered by the U.S. Supreme Court continue to be of great significance to plan sponsors and fiduciaries. This month we review the Court's employee benefit decisions from 2013 and also...more
In the summer of 2013, the Supreme Court issued a decision in U.S. v. Windsor, striking down a key provision of the Defense of Marriage Act (DOMA) and eliminating the requirement that federal law recognize only marriages...more
The year 2013 was anything but boring for labor and employment lawyers: delay of the Affordable Care Act employer mandate, changes to the National Labor Relations Board and questions about the validity of hundreds of past...more
As we approach the end of the year, employers and plan sponsors of qualified retirement plans and health and welfare plans should take time to meet various upcoming deadlines. Failure to comply with the deadlines may result...more
The Internal Revenue Service ("IRS"), the Employee Benefits Security Administration ("EBSA") and the Department of Labor ("DOL") have recently provided new guidance with respect to how lawfully married same-sex spouses will...more
Following a highly-publicized U.S. Supreme Court decision and subsequent guidance from both the Labor Department (DOL) and the Internal Revenue Service (IRS), employers need to rethink how they treat same-sex spouses under...more
Following the lead of the U.S. Internal Revenue Service, Department of the Treasury, the U.S. Department of Labor's Employee Benefits Security Administration has announced that it will apply the term "spouses" and "marriages"...more
The United States Supreme Court's landmark Windsor decision in June of this year invalidated certain key provisions of the Defense of Marriage Act by holding that the disparate tax treatment of validly married same sex...more
The Internal Revenue Service and Department of Labor have issued recent guidance to clarify the impact of the U.S. Supreme Court's ruling in U.S. v. Windsor. The new guidance addresses some of the implications of the federal...more
On June 26, 2013, the United States Supreme Court held that Section 3 the Defense of Marriage Act (DOMA), which prevented the federal government from recognizing state-granted same-sex marriages, was unconstitutional because...more
Employers with benefit plans governed by ERISA should be aware that the U.S. Department of Labor ("DOL") has issued guidance with respect to the eligibility of individuals in same-sex marriages. Spousal eligibility for...more
Health & Welfare Plans -
Health Care Reform: FAQ Part XVI Addresses Insurance Exchange Notice and 90-Day Waiting Period Requirement.
The Treasury, the Department of Labor and the Department of Health and Human...more
Recent guidance issued by the U.S. Department of the Treasury, the Internal Revenue Service (IRS) and the Employee Benefits Security Administration (EBSA) division of the U.S. Department of Labor (DOL) provides some initial...more
On September 18, 2013, the United States Department of Labor ("DOL") issued EBSA Technical Release 2013-04 ("Release"), which provides that same-sex couples who enter into marriages in jurisdictions that recognize such...more
As we previously reported, in United States v. Windsor, 133 S. Ct. 2675 (2013), the U.S. Supreme Court held section 3 of the Defense of Marriage Act to be unconstitutional. Section 3 of the Defense of Marriage Act provides...more
In Revenue Ruling 2013-17 (Ruling), the IRS stated that for purposes of federal tax laws, same-gender couples who have been legally married in a jurisdiction (domestic or foreign) that allows same-gender marriage will be...more
The Internal Revenue Service ("IRS"), the Employee Benefits Security Administration ("EBSA") and the Department of Labor ("DOL") have recently provided new guidance with respect to how lawfully married same-sex spouses will...more
The U.S. Department of Labor (DOL) yesterday announced that same-sex couples legally married in a jurisdiction that recognizes their marriage will be treated as married for purposes of the Employee Retirement Income Security...more
A few weeks after the Internal Revenue Service (IRS) stated that it will apply a "place of celebration" rule in recognizing same-sex spouses for purposes of the Internal Revenue Code (including with respect to employee...more
On August 29, 2013, the Treasury Department and the Internal Revenue Service issued a public announcement and released Revenue Ruling 2013-17 wherein it answered a number of open questions concerning the impact of the U.S....more
On June 26, 2013, in United States v. Windsor, the United States Supreme Court found unconstitutional Section 3 of the Defense of Marriage Act ("DOMA"). Section 3 of DOMA prohibited the federal government from acknowledging...more
On June 26, 2013, the United States Supreme Court, in United States v. Windsor, held that Section 3 of the Defense of Marriage Act ("DOMA") is unconstitutional as a deprivation of the equal liberty of persons that is...more
It has been two months since the release of the U.S. Supreme Court's Windsor decision recognizing same-sex marriage and the guidance on implementing this decision is just beginning....more
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Sun coverage: Religion in the news
Sun coverage of stories pertaining to religion, including the appointment of Edwin F. O'Brien as the replacement for Cardinal William H. Keeler.
May 18, 2009
Rally promotes idea of Sabbath
For Yoel Benyowitz, setting aside work at sundown on Friday, lighting the shabbos candles and spending the next 24 hours in prayer and fellowship with family and friends "recharges our batteries, both physically and spiritually."
May 6, 2009
Wrapping patients in comfort
Vivian Haughee draped the bright green prayer shawl over her shoulders and wrapped it around her body. Then she clutched her arms together over the shawl in a warm embrace. Whatever healing powers the knitted garment possessed, they weren't about to escape.
April 10, 2009
One priest ministers to 6 W. Md. parishes
On Palm Sunday morning, the Rev. Jim Hannon awoke at 5:30, prayed and then exercised on a treadmill for 20 minutes. By 7:30, the priest was set for a day of ministry in Western Maryland.
April 7, 2009
Before Passover, a rare sun blessing
On Wednesday, Jews will observe Passover, remembering the escape of the Hebrews from slavery in Egypt. But well before their Seders, many will mark a rare event: The sun's return to the position it held on the fourth day of creation, at the time that God made a light to rule the day, according to Genesis.
April 5, 2009
Surge in converts to Catholicism
A police officer assigned to watch over a church nursery during Mass overhears the homily and becomes intrigued. A retail manager struggling with the loss of hours at work is inspired by the faith of his fiancee. A married mother of two looks for answers after two siblings are stricken with cancer.
June 28, 2008
The mark of a leader
Archbishop Edwin F. O'Brien will receive his pallium at St. Peter's Basilica at the Vatican tomorrow, a capstone event marking his connection to the Catholic hierarchy and to the church worldwide.
March 29, 2008
Catholic bicentennial
The Archdiocese of Baltimore will celebrate its bicentennial starting next month with work on a new prayer garden near downtown, musical performances in the Basilica of the Assumption and an exhibit of the Catholic community's history at St. Mary's Seminary.
Copyright © 2015, The Baltimore Sun


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An Official Website of the United States Government
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Disaster Press Releases
MS 13130 - March 12 Deadline in Mississippi to Apply for SBA Working Capital Loans is Approaching
ATLANTA - The U.S. Small Business Administration is reminding small businesses, small agricultural cooperatives, small businesses engaged in aquaculture and most private non-profit organizations of all sizes that March 12 is the filing deadline for federal economic injury disaster loans available in Mississippi as a result of the drought that began on January 3, 2012.
These loans are available in Hancock, Harrison, Pearl River and Stone counties in Mississippi and Saint Tammany Parish in Louisiana.
"When the Secretary of Agriculture issues a disaster declaration to help farmers recover from damages and losses to crops, the Small Business Administration issues a declaration to eligible entities affected by the same disaster," said Frank Skaggs, director of SBA's Field Operations Center East in Atlanta.
Under this declaration, the SBA's Economic Injury Disaster Loan program is available to eligible farm-related and nonfarm-related entities that suffered financial losses as a direct result of this disaster. With the exception of aquaculture enterprises, SBA cannot provide disaster loans to agricultural producers, farmers, or ranchers. Nurseries are eligible to apply for economic injury disaster loans for losses caused by drought conditions.
The loan amount can be up to $2 million with a 4 percent interest rate for eligible small businesses and 3 percent for non-profit organizations with terms up to 30 years. The SBA determines eligibility based on the size of the applicant, type of activity and its financial resources. Loan amounts and terms are set by the SBA and are based on each applicant's financial condition. These working capital loans may be used to pay fixed debts, payroll, accounts payable, and other bills that could have been paid had the disaster not occurred. The loans are not intended to replace lost sales or profits.
Applicants may apply online using the Electronic Loan Application (ELA) via SBA's secure website at https://disasterloan.sba.gov/ela.
Disaster loan information and application forms may also be obtained by calling the SBA's Customer Service Center at 800-659-2955 (800-877-8339 for the deaf and hard-of-hearing) or by sending an email to email@example.com. Loan applications can be downloaded from the SBA's website at www.sba.gov. Completed applications should be mailed to: U.S. Small Business Administration, Processing and Disbursement Center, 14925 Kingsport Road, Fort Worth, TX 76155.
Completed loan applications must be returned to SBA no later than March 12, 2013.
# # #
Internet Address:
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Release Date:
Friday, February 8, 2013 - 5:00am
Michael Lampton
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1804 $10 Crosslet 4 MS61 PCGS. Breen-6847, Taraszka-31, BD-1, High R.4....
2011 January Tampa FUN Signature & Platinum Night US Coin Auction #1151
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Impressive 1804 BD-1 Eagle, MS611804 $10 Crosslet 4 MS61 PCGS. Breen-6847, Taraszka-31, BD-1, High R.4. The Guide Book shows that the early gold eagle series concluded in 1804, although the 1803 BD-6 eagles were actually the last coins minted before a long intermission until 1838. The recorded mintage in 1804 was just 3,757 coins, although the actual production of coins bearing the 1804 date was smaller. John Dannreuther suggests that the actual mintage of 1804-dated eagles may have been as low as 2,500 coins. Regardless, the date is a rarity in all grades, and the present Mint State piece is subject to extreme demand.
Both dies were actually first used in 1804, and the reverse die was then mated to a leftover 1803 obverse die to create the 1803 BD-6 eagles. About 100 1804 eagles survive today, along with about a dozen 1803 BD-6 coins. Those survival figures are consistent with a 3% survival rate for the last issues of the denomination.
In addition to die rust in the vicinity of ER of LIBERTY, the obverse has a die crack from the bottom of 18 to stars 1 to 5, and another from the lowest hair curl through the field below the bust to the drapery and the last three stars on the right. Another crack crosses through star 11 to Liberty's mouth. The last two obverse cracks are unmentioned in Dannreuther's reference. The reverse has several die cracks, but it is clearly an earlier state than for the 1803 BD-6 eagles.
This impressive Mint State piece has reflective fields with some minor weakness at Liberty's face and the opposing point on the reverse, the result of light adjustment marks. Other minor blemishes are mostly insignificant, save for a small scratch in the left obverse field that prevents a higher grade.(Registry values: P4) (NGC ID# 262C, PCGS# 8566)
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See how these moms-to-be are dressing up their baby bump!
Let's hear from parents on both sides of the vaccination issue.
As with anything, the world wide web can be used for both good and bad. Know how to protect your family
Men -- what would they do without us?!
Seminars, expos and sales are all coming up this weekend!
Repeated rounds could disrupt gut bacteria, cause unwanted weight gain and odd bone growth
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Moves: A sourcebook of ideas for body awareness and creative movement
Book Details
- Publisher : Routledge
- Published : 1998
- Category :
Expressive Arts Therapies
- Catalogue No : 90454
By the same author
The Embodied Self: Movement and Psychoanalysis
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The aim of this publication is to deepen awareness of the body and the self through meditative movement and dance, rekindle the imagination by developing greater self-awareness, and to provide starting points to create expressive movement.
About the Author(s)
Katya Bloom, Ph.D., is a movement psychotherapist with a private practice in London. She taught on the Dance Movement Therapy training at the University of Surrey Roehampton , and is a Certified Movement Analyst from the Laban/Bartenieff Institute of Movement Studies in New York. She also teaches movement to actors at the Royal Academy of Dramatic Art. She is the co-author of Moves: A Sourcebook of Ideas for Body Awareness and Creative Movement (1998).
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The Ashes 2013
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August 22 2013, 09:47 AM
Orac Zen
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Re: The Ashes 2013
At least he had the decency to mention how irrelevant it is now the series is lost.
Given it was a flat deck and there was some rather ordinary bowling at times, all it really proves is that he's a flat-track bully who only performs when there's no pressure. I don't rate him and I doubt I ever will.
This is a reasonable start but that's all it is. If Watson can make a score then England's lineup ought to be able to do the same.
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A processor complex architecture facilitates accurate passing of transient data among processor complex stages of a pipelined processing engine. The processor complex comprises a central processing unit (CPU) coupled to an instruction memory and a pair of context data memory structures via a memory manager circuit. The context memories store transient "context" data for processing by the CPU in accordance with instructions stored in the instruction memory. The architecture further comprises data mover circuitry that cooperates with the context memories and memory manager to provide a technique for efficiently passing data among the stages in a manner that maintains data coherency in the processing engine. An aspect of the architecture is the ability of the CPU to operate on the transient data substantially simultaneously with the passing of that data by the data mover.
1. An apparatus for passing data among processor complex stages of a pipelined processing engine, the apparatus comprising:
first and second context memories to store the data for processing by a central processing unit (CPU), the CPU to operate on data in the first context memory while the second context memory receives data from an upstream stage;
a data mover coupled to the context memories to pass the data from the first context memory to a second context memory of a downstream stage of the pipelined processing engine;
an instruction memory to store instructions used by the CPU to process the data; and
a memory manager to interconnect the instruction memory, the context memories and the CPU.
2. A method for passing data among processor complex stages of a pipelined processing engine, the method comprising the steps of:
storing the data in first and second context memories;
processing by a CPU the data stored in the first context memory;
passing the data stored in the first context memory by a data mover to a second context memory of a downstream stage;
receiving into the second context memory data from an upstream stage;
storing instructions for processing the stored data in an instruction memory;
determining a current phase using a memory manager; and
specifying, during the current phase, one of first and second context memories for use by the CPU.
3. The apparatus of
4. The apparatus of
5. The apparatus of
synchronization logic configured to receive completion signals from the processor complex stages, including the upstream stage and the downstream stage, and in response to the completion signals to generate a signal indicating a current phase.
6. The apparatus of
7. The apparatus of
a multiplexer having inputs coupled to the first and the second context memory and an output coupled to the data mover, the multiplexer configured to receive data from the first and second context memory and to provide data from a selected one of the context memories to the data mover.
8. The apparatus of
9. The apparatus of
10. The method of
processing by the CPU the data stored in the second context memory; and
passing the data stored in the second context memory by the data mover to a first context memory of the downstream stage.
11. The method of
receiving into the first context memory data from the upstream stage, while the CPU is processing the data stored in the second context memory.
12. The method of
receiving completion signals from the processor complex stages, including the upstream stage and the downstream stage, and in response to the completion signals, generating a signal indicating the current phase.
13. The method of
multiplexing the data in first and second context memory and providing data from a selected one of the context memories to the data mover.
14. The apparatus of
mapping an address space of the CPU to the first and second context memory.
15. The apparatus of
directing write operations to both the first context memory and to the second context memory of the downstream stage.
16. An apparatus comprising:
means for determining a current phase of a pipelined processing engine;
means for specifying, during the current phase, a selected one of a first context memory and a second context memory, for use by a CPU of the pipelined processing engine;
means for processing data stored in the selected one of the first and the second context memory, at the CPU during the current phase;
means passing, during the current phase, data stored in the selected one of the first and the second context memory to a context memory of a downstream stage;
means for receiving, during the current phase, data from a context memory of an upstream stage, and storing the data into the non-selected one of the first and the second context memory.
17. The apparatus of
means for receiving completion signals from a plurality of stages of the pipelined processing engine, including the upstream stage and the downstream stage, and, in response to the completion signals, generating a signal indicating the current phase.
18. The apparatus of
means for multiplexing data in the first and the second context memory and for providing data from the selected one of the first and the second context memory to the downstream stage.
19. The apparatus of
means for mapping an address space of the CPU to the first and second context memory.
20. The apparatus of
means for directing write operations to both the selected one of the first and the second context memory and to the context memory of the downstream stage.
This application is a continuation of U.S. patent application Ser. No. 10/222,277, now-issued as U.S. Pat. No. 6,836,838, filed Aug. 16, 2002, entitled "Architecture for a Processor Complex of an Arrayed Pipelined Processing Engine," which is a continuation of U.S. Ser. No. 09/727,068 filed on Nov. 30, 2000 issued U.S. Pat. No. 6,442,669, issued Aug. 27, 2002, entitled "Architecture for a Processor Complex of an Arrayed Pipelined Processing Engine," which is a continuation of U.S. Ser. No. 09/106,436 filed on Jun. 29, 1998 issued U.S. Pat. No. 6,195,739, issued Feb. 27, 2001, entitled "Method and Apparatus for Passing Data Among Processor Complex Stages of A Pipelined Processing Engine.
This invention is related to the following U.S. Patent Applications:
U.S. patent application Ser. No. 09/106,478, now issued as U.S. Pat. No. 6,513,108, titled, PROGRAMMABLE ARRAYED PROCESSING ENGINE ARCHITECTURE FOR A NETWORK SWITCH;
U.S. patent application Ser. No. 09/106,244, now issued as U.S. Pat. No. 6,101,599, titled, SYSTEM FOR CONTEXT SWITCHING BETWEEN PROCESSING ELEMENTS IN A PIPELINE OF PROCESSING ELEMENTS; and
U.S. patent application Ser. No. 09/106,246, now issued as U.S. Pat. No. 6,119,215, titled, SYNCHRONIZATION AND CONTROL SYSTEM FOR AN ARRAYED PROCESSING ENGINE, each of which was filed on even date herewith and assigned to the assignee of the present invention.
The present invention relates to processing engines of intermediate stations in a computer network and, in particular, to the architecture of a processing element of a programmable processing engine.
Computer architecture generally defines the functional operation, including the flow of information and control, among individual hardware units of a computer. One such hardware unit is the processor or processing engine which contains arithmetic and logic processing circuits organized as a set of data paths. In some implementations, the data path circuits may be configured as a central processing unit (CPU) whose operations are defined by a set of instructions. The instructions are typically stored in a control (instruction) memory and specify a set of hardware functions that are available on the CPU.
Specifically, the fields of an instruction specify commands which supply signals for conditioning and clocking the data paths. If the structure of the instruction allows only the specification of a single command at a time, the instruction is a vertical instruction. Only the necessary commands are specified in this type of instruction, resulting in smaller control memory requirements; yet, it is not possible to take advantage of all possible parallelisms offered by the hardware, since only one command is executed at a time. A horizontal instruction specifies all possible commands which permits programmers to take full advantage of all parallelisms in a processor to build high-performance computers.
A high-performance computer may be realized by using a number of identical CPUs or processors to perform certain tasks in parallel. For a purely parallel multiprocessor architecture, each processor may have shared or private access to non-transient data, such as program instructions (e.g., algorithms) stored in a memory coupled to the processor. Access to an external memory is generally inefficient because the execution capability of each processor is substantially faster than its external interface capability; as a result, the processor often idles while waiting for the accessed data. Moreover, scheduling of external accesses to a shared memory is cumbersome because the processors may be executing different portions of the program. On the other hand, providing each processor with private access to the entire program results in inefficient use of its internal instruction memory.
In an alternative implementation, the data paths may be configured as a pipeline having a plurality of processor stages. This configuration conserves internal memory space since each processor executes only a small portion of the program algorithm. A drawback, however, is the difficulty in apportioning the algorithm into many different stages of equivalent duration. Another drawback of the typical pipeline is the overhead incurred in transferring transient "context" data from one processor to the next in a high-bandwidth application.
One example of such a high-bandwith application involves the area of data communications and, in particular, the use of a parallel, multiprocessor architecture as the processing engine for an intermediate network station. The intermediate station interconnects communication links and subnetworks of a computer network to enable the exchange of data between two or more software entities executing on hardware platforms, such as end stations. The stations typically communicate by exchanging discrete packets or frames of data according to predefined protocols, such as the Transmission Control Protocol/Internet Protocol (TCP/IP), the Internet Packet Exchange (IPX) protocol, the AppleTalk protocol or the DECNet protocol. In this context, a protocol consists of a set of rules defining how the stations interact with each other.
A router is an intermediate station that implements network services such as route processing, path determination and path switching functions. The route processing function determines the type of routing needed for a packet, whereas the path switching function allows a router to accept a frame on one interface and forward it on a second interface. The path determination, or forwarding decision, function selects the most appropriate interface for forwarding the frame. A switch is also an intermediate station that provides the basic functions of a bridge including filtering of data traffic by medium access control (MAC) address, "learning" of a MAC address based upon a source MAC address of a frame and forwarding of the frame based upon a destination MAC address. Modern switches further provide the path switching and forwarding decision capabilities of a router. Each station includes high-speed media interfaces for a wide range of communication links and subnetworks.
The hardware and software components of these stations generally comprise a communications network and their interconnections are defined by an underlying architecture. Modern communications network architectures are typically organized as a series of hardware and software levels or "layers" within each station. These layers interact to format data for transfer between, e.g., a source station and a destination station communicating over the internetwork. Predetermined services are performed on the data as it passes through each layer and the layers communicate with each other by means of the predefined protocols. Examples of communications architectures include the IPX communications architecture and, as described below, the Internet communications architecture.
The Internet architecture is represented by four layers which are termed, in ascending interfacing order, the network interface, internetwork, transport and application layers. These layers are arranged to form a protocol stack in each communicating station of the network. The lower layers of the stack provide internetworking services and the upper layers collectively provide common network application services. For example, the network interface layer comprises physical and data link sublayers that define a flexible network architecture oriented to the implementation of local area networks (LANs). Specifically, the physical layer is concerned with the actual transmission of signals across the communication medium and defines the types of cabling, plugs and connectors used in connection with the medium. The data link layer ("layer 2") is responsible for transmission of data from one station to another and may be further divided into two sublayers: logical link control (LLC) and MAC sublayers.
The MAC sublayer is primarily concerned with controlling access to the transmission medium in an orderly manner and, to that end, defines procedures by which the stations must abide in order to share the medium. In order for multiple stations to share the same medium and still uniquely identify each other, the MAC sublayer defines a hardware or data link MAC address. This MAC address is unique for each station interfacing to a LAN. The LLC sublayer manages communications between devices over a single link of the internetwork.
The primary network layer protocol of the Internet architecture is the Internet protocol (IP) contained within the internetwork layer ("layer 3"). IP is a network protocol that provides internetwork routing and relies on transport protocols for end-to-end reliability. An example of such a transport protocol is the Transmission Control Protocol (TCP) contained within the transport layer. The term TCP/IP is commonly used to refer to the Internet architecture. Protocol stacks and the TCP/IP reference model are well-known and are, for example, described in Computer Networks by Andrew S. Tanenbaum, printed by Prentice Hall PTR, Upper Saddle River, N.J., 1996.
Data transmission over the network therefore consists of generating data in, e.g., a sending process executing on the source station, passing that data to the application layer and down through the layers of the protocol stack where the data are sequentially formatted as a frame for delivery over the medium as bits. Those frame bits are then transmitted over the medium to a protocol stack of the destination station where they are passed up that stack to a receiving process. Although actual data transmission occurs vertically through the stacks, each layer is programmed as though such transmission were horizontal. That is, each layer in the source station is programmed to transmit data to its corresponding layer in the destination station. To achieve this effect, each layer of the protocol stack in the source station typically adds information (in the form of a header) to the data generated by the sending process as the data descends the stack.
For example, the internetwork layer encapsulates data presented to it by the transport layer within a packet having a network layer header. The network layer header contains, among other information, source and destination network addresses needed to complete the data transfer. The data link layer, in turn, encapsulates the packet in a frame, such as a conventional Ethernet frame, that includes a data link layer header containing information, such as MAC addresses, required to complete the data link functions. At the destination station, these encapsulated headers are stripped off one-by-one as the frame propagates up the layers of the stack until it arrives at the receiving process.
Increases in the frame/packet transfer speed of an intermediate station are typically achieved through hardware enhancements for implementing well-defined algorithms, such as bridging, switching and routing algorithms associated with the predefined protocols. Hardware implementation of such an algorithm is typically faster than software because operations can execute in parallel more efficiently. In contrast, software implementation of the algorithm on a general-purpose processor generally performs the tasks sequentially because there is only one execution path. Parallel processing of conventional data communications algorithms is not easily implemented with such a processor, so hardware processing engines are typically developed and implemented in application specific integrated circuits (ASIC) to perform various tasks of an operation at the same time. These ASIC solutions, which are generally registers and combinational logic configured as sequential logic circuits or state machines, distinguish themselves by speed and the incorporation of additional requirements beyond those of the basic algorithm functions. However, the development process for such an engine is time consuming and expensive and, if the requirements change, inefficient since a typical solution to a changing requirement is to develop a new ASIC.
Thus, an object of the present invention is to provide a processor architecture for an intermediate station that approaches the speed of an ASIC solution but with the flexibility of a general-purpose processor
Another object of the present invention is to provide a processing engine having a plurality of processing elements that efficiently execute conventional network service algorithms.
Still another object of the present invention is to provide an architecture of a processing element of a programmable processing engine that enables efficient and accurate context data transfers from one element to the next in a high-bandwidth application.
The invention comprises an architecture for efficiently passing data among processor complex stages of a pipelined processing engine. The processor complex comprises a central processing unit (CPU) coupled to an instruction memory and a pair of context data memory structures via a memory manager circuit. The context memories store transient "context" data for processing by the CPU in accordance with instructions stored in the instruction memory. The memory manager manages interactions among the components of the processor complex by, inter alia, mapping a contiguous memory address space viewed by the CPU to the contents of the various memories residing within the processor complex.
In accordance with the invention, the architecture of the processor complex facilitates accurate passing of transient data among the stages of the engine. To that end, the processor complex further comprises data mover circuitry that cooperates with the context memories and memory manager to provide a technique for efficiently passing data among the stages in a manner that maintains data coherency in the processing engine. Data coherency is maintained by the memory manager constantly "snooping" the data mover and CPU to determine the state of the data accessed by the data mover and CPU. A notable aspect of the architecture is the ability of the CPU to operate on the transient data substantially simultaneously with the passing of that data by the data mover.
Advantageously, the context passing technique described herein enhances the speed of data execution in a pipelined processing engine by substantially reducing the latency involved with passing the data among stages of the engine. The transient data entering the engine is dispatched to a processor complex stage of a pipeline for processing by a CPU prior to serially passing the data to a "downstream" processor complex stage. The processor complex architecture described herein facilitates the passing of transient data from an "upstream" context memory to a corresponding downstream memory as the CPU processes the data. Thus, the invention transforms an otherwise serial data processing/passing procedure to a parallel process via pipelining.
The above and further advantages of the invention may be better understood by referring to the following description in conjunction with the accompanying drawings in which like reference numbers indicate identical or functionally similar elements:
The switch 200 comprises a plurality of interconnected components including an arrayed processing engine 300, various memories, queueing logic 210 and network port interface cards 240. Operations of these components are preferably synchronously controlled by a clock module 270 although the arrayed elements of the processing engine may be operatively configured to function asynchronously. In the illustrative embodiment, the clock module 270 generates clock signals at a frequency of 200 megahertz (i.e., 5 nanosecond clock cycles) and globally distributes them via clock lines to the components of the switch.
The memories generally comprise random access memory (RAM) storage locations addressable by the processing engine and logic for storing software programs and data structures accessed by the components. An operating system, portions of which are typically resident in memory and executed by the engine, functionally organizes the switch by, inter alia, invoking network operations in support of software processes executing on the switch. It will be apparent to those skilled in the art that other memory means, including various computer readable media, may be used for storing and executing program instructions pertaining to the operation of the switch.
The arrayed processing engine 300 is coupled to a memory partitioned into a plurality of external memory (Ext Mem) resources 280. A buffer and queuing unit (BQU) 210 is connected to a packet memory 220 for storing packets and a queue memory 230 for storing network layer headers of the packets on data structures, such as linked lists, organized as queues 235. The BQU 210 further comprises data interface circuitry for interconnecting the processing engine with a plurality of line cards 240 via a selector circuit 250. The line cards 240 may comprise OC12, OC48 and Fast Ethernet (FE) ports, each of which includes conventional interface circuitry that incorporates the signal, electrical and mechanical characteristics, and interchange circuits, needed to interface with the physical media and protocols running over that media. A typical configuration of the switch may include many (e.g., thousands) input/output channels on these interfaces, each of which is associated with at least one queue 235 in the queue memory 230. The processing engine 300 generally functions as a switching processor that modifies packets and/or headers in sequence as the BQU 210 implements queuing operations.
A route processor (RP) 260 executes conventional routing protocols for communication directly with the processing engine 300. The routing protocols generally comprise topological information exchanges between intermediate stations to determine optimal paths through the network based on, e.g., destination IP addresses. These protocols provide information used by the RP 260 to create and maintain routing tables. The tables are loaded into the external partitioned memories 280 as forwarding information base (FIB) tables used by the processing engine to perform forwarding operations. When processing a header in accordance with IP switching, the engine 300 determines where to send the packet by indexing into the FIB using an IP address of the header. Execution of the forwarding operations results in destination media access control (MAC) addresses of the headers being rewritten by the processing engine to identify output ports for the packets.
In the illustrative embodiment, the processing engine 300 comprises a plurality of processing elements (PE) 400 symmetrically arrayed as six (6) rows and six (6) columns in a 6�6 arrayed configuration that is embedded between an input header buffer (IHB) 500 and an output header buffer (OMB) 700. A 64-bit feedback path 350 couples the OHB 700 to the IHB 500 and provides a data path for recycling data through the PE stages of the processing engine. The PEs of each row are configured as stages connected in series by a 100 MHz 64-bit direct memory access (DMA) data path 340 that synchronously transfers data and control "context" from one PE to the next. This arrangement enables data processing to occur as a high-level pipeline that sequentially executes operations on the transient data. The PEs of each column operate in parallel to perform substantially the same operation on that data, but with a shifted phase. An example of an arrayed processing engine and network switch suitable for use with the present invention is described in copending and commonly-owned U.S. patent application Ser. No. 09/106,478 titled Programmable Arrayed Processing Engine Architecture for a Network Switch, which application is hereby incorporated by reference as though fully set forth herein.
The CPU 410 is preferably a small processor core having a dense structure which enables implementation of similar cores on an application specific integrated circuit (ASIC). In the illustrative embodiment described herein, the CPU is a 32-bit, 100 MHz Advanced RISC Machine (ARM) 7TDI core capable of executing 16-bit or 32-bit instructions; however, it will be apparent to those skilled in the art that other CPU cores may be advantageously used with the processor complex architecture described herein. The ARM CPU includes an arithmetic logic unit (ALU), internal registers for storing information processed by the ALU, and an instruction fetch and decode unit that decodes instructions fetched from the instruction memory. The instructions are generally vertical assembly language code manifested in the form of conventional reduced instruction set computer (RISC) instructions.
Each context memory 430 is a 16�64 dual port, byte writable register file containing data for processing by the CPU 410. One context memory (CMA) is associated with a phase A context and the other (CMB) is associated with a phase B context. During a current pipeline phase, the CPU accesses data from its current context, which may be alternately stored in CMA and CMB. Any modification of data is written to the current context memory as well as to the downstream complex's next context memory (e.g., current context memory CMA and downstream context memory CMB).
Each cell in the context memory generally contains header data and "scratch" area for CPU operations. A portion of each memory is accessible to the CPUs for immediate operations without load/store penalities. The scratch area may contain "context" such as status information, information about the original packet and information that instructs the downstream CPU how to process the transient data. For example, assume tree data structure (mtrie) lookup operations are apportioned among several CPUs. A first CPU performs a first lookup and, as a result of its designated processing, retrieves a pointer to the next address location to be accessed. The CPU stores the retrieved pointer in the scratch area of the context memory and passes the pointer as "context" to the downstream CPU at the end of the current phase. The downstream CPU uses the pointer to perform the next lookup operation. Thus, in accordance with the present invention, context data is passed among processor complexes of the pipeline to enable a downstream CPU to take advantage of meaningful work performed by an upstream CPU.
The MM 425 comprises logic circuitry that provides the electrical, mechanical and data signaling needed to interface to a memory bus coupling the processor complex and external memory. The manager further includes data path and control logic for managing the interactions of the individual components within the processor complex. For example, memory manager contains circuitry for mapping a "flat" 4 Gb contiguous memory address space viewed by the CPU 410 to the contents of various physical memories residing internal and external to the processor complex (e.g., instructions stored in memory 420, transient data stored in context memories 430, information stored in the internal control registers of CPU 410 and non-transient data, such as FIB data, stored in the external partitioned memory). The MM 425 further includes a state machine 424 that determines the current phase (A or B) to which all CPUs of the processing engine are synchronized; as noted, the current phase specifies from which context memory (CMA or CMB) the CPU processes data.
In accordance with the invention, the architecture of the PE 400 facilitates accurate passing of transient context data among the PE stages of the engine 300. To that end, the PE 400 further comprises a data mover circuit 450 that cooperates with the context memories 430 and MM 425 to efficiently pass data among the PE stages in a manner that maintains data coherency in the processing engine. The data mover 450 generally comprises an address incrementor and interface logic, coupled to a multiplexer 440, that retrieves context data from a current context memory and loads it into a context memory of an adjacent "downstream" processor complex of the pipeline. Data transfers between context memories generally take place over the memory manager data paths; that is, transfers from the CPU to the downstream context memories and from the data mover to the downstream context memories are all via the memory manager. Illustratively, transfer of an entire 128-byte context from an upstream context memory to a downstream context memory consumes 16 cycles (one 64-bit word transfer per cycle). The data mover further comprises a context size register that specifies a context size (number of 64-bit words or number of cycles) of data to be moved to the available downstream context memory 430.
As described further herein, an aspect of the processor complex architecture is the ability of the CPU 410 to operate on the transient data substantially simultaneously with the passing of that data among adjacent context memories by the data mover 450. Specifically, the context memories CMA and CMB function as ping-pong buffers by allowing the CPU core to process context data stored in one of the buffers as the other buffer is loaded with context data received from an adjacent "upstream" processor complex. Prior attempts to transfer such context generally consumed a significant amount of overhead; according to the inventive processor complex architecture, the ping-pong buffers cooperate with the data mover circuity to enable transfer of such context in an efficient manner.
Data coherency is further ensured with the architecture by the memory manager constantly "snooping" the data mover 450 and CPU core 410 "behind-the-scene" to determine the state of the context data accessed by the data mover and CPU. After data in a current context memory (e.g., CMA) is processed by the CPU 410, the CPU writes the processed data to a downstream context memory (CMB); meanwhile, the data mover 450 transparently (to the CPU) passes the data from CMA to the downstream CMB. At the end of the current phase, the context memories are switched so that the CPU operates on the data in CMB. In the event of write collisions between the CPU and data mover to a same context location, the memory manager 425 provides the CPU with exclusive access to the data item. This aspect of the novel context passing technique ensures data coherency and consistency among the processor complex elements of the engine.
The IHB 500 comprises a plurality of buffer pairs (BUF 510), similar to the context memories 430 of a processor complex element 400, with each pair associated with a pipeline row. As transient data enters the engine, it is sequentially loaded into one of the paired buffers 510 for a particular row before being dispatched to a first stage of that row. The IHB presents a context-in/context-out interface (row I/F logic 520) that provides write enable, data and address signals to and from the buffers and context memories; preferably, the logic 520 is substantially identical to the data mover 450 of each PE 400. This enables the processing engine to scale efficiently, thereby allowing the pipelines to be as "deep" as desired.
The IHB also includes an input logic block (ILB 550) comprising a receive (Rx) state machine 552 coupled to an input control logic circuit 554 and an input buffer 556. The input buffer is preferably organized as a first-in, first-out (Rx FIFO) buffer that sequentially receives and transmits data forwarded to the engine by the BQU 210. The Rx state machine receives the predetermined control signals over path 294 and cooperates with the logic 554 to control the transfer of data from FIFO 556. In addition, the logic circuit 554 controls a multiplexer 560 having inputs coupled to an output of the FIFO and the feedback path 350. The logic 554 enables the multiplexer to select one of its inputs in response to a control signal (feedback_enable) provided by the last PE stages of the pipelines. Furthermore, the logic 554 generates write enable signals (in response to a control signal provided by row synchronization logic 600) and buffer addresses that enable the row I/F logic 520 to transfer the contents of the buffers 510.
The RSL 600 receives processing completion status from each PE stage prior to advancing the pipelines. Specifically as each PE 400 finishes its task, it asserts a global pipeline completion signal (proc_done) that is collected by a logic circuit, schematically shown as an AND gate 610. Other completion signals (done) are provided as inputs to the gate from the control logic 554, 754. In response to assertion of all completion signals, the gate 610 generates a beginning of next phase signal (start_phase). The start_phase signal informs each PE stage that there is valid context data in its context memory that its CPU core can begin processing. In addition, start_phase signal is transformed by an incrementor circuit 620 into incremented row number, while being analyzed by a state sequencer circuit 650 prior to being fed to the input control logic 554.
According to the inventive context passing technique, the IHB 500 enables the multiplexer 440 to effectively switch between the context memories 430 when transferring data. In response to the start_phase command issued by the RSL 600 to each PE 400 signifying the beginning of a next phase, the multiplexer 440 is instructed to switch context for the next data transfer. As the CPU 410 completes processing the data in one of the buffers, e.g., CMA, the MM 425 "switches" the CPU 410 to the other buffer, e.g., CMB, for processing of the next context data. Meanwhile, the data mover 450 loads the context data processed by the CPU into a context memory 430 of the downstream PE 400 as an upstream data mover loads yet a next context data into the now available buffer CMA. In an embodiment of the invention, the CPU core 410 may generally process data stored in a buffer 430 as the data mover 450 moves data in that buffer to a downstream buffer 430. However, the downstream CPU cannot begin operating on the data moved into its context memory until the upstream CPU has completed its processing.
Upon completion of processing by all of its stages, a pipeline row is selected to deliver its data to the OHB 700 in a synchronous manner.
As noted, data coherency is maintained in the processing engine by the memory manager 425 resolving any contention/collisions between the data mover and CPU. More specifically, if the data mover and CPU simultaneously access a data item location, e.g., to move data that is ready for processing by the CPU, the memory manager 425 ensures that the CPU "wins" access to the item. Coherency is further ensured by directing all write operations executed by the CPU to both the current and appropriate downstream context memories. That is, the CPU writes processed data (via the memory manager) to the downstream context memory as the data mover 450 moves data from the current buffer to the downstream memory.
Referring to
Operation of the processor complex to efficiently pass context data among processor complex elements of a pipelined processing engine will now be described in connection with the drawings. At the beginning of each phase, each CPU 410 performs one of the subtasks stored in the instruction memory 420, reads data from one of the two upstream context memories 430 to which it has access and writes processed data to one of the two downstream context memories to which it has access. Simultaneously, the contents of an upstream context memory are moved to a downstream context memory by data mover 450, transparent to the CPU. Note that write operations performed by the CPU to the downstream context are preserved. The minimum number of cycles per phase is at least equal to the number of cycles needed to transparently transfer the data from the upstream context to the downstream context. For a 128-byte context memory and a 64-bit wide data path, a minimum of 16 cycles is required.
The end of a phase is determined when each CPU 410 has finished its task and has issued a special co-processor instruction that is decoded by a coprocessor coupled to each CPU. The special co-processor instruction is preferably a Coprocessor Data oPeration (CDP) instruction that is decoded by a context switch coprocessor (CSCP) 475. The CDP instruction is also used to convey other information to both its CSCP and the downstream CSCP, such as the next code entry point or a prefetch address for the downstream CPU's next task. The CSCP 475 synchronizes context switching with all processor complex elements of a pipeline row by managing phase starts, stops and stalls within the processor complex. In addition, the CSCP passes a program counter to a downstream CSCP (and receives a program counter from an upstream CSCP). The last CSCP in a row indicates to the OHB how to handle the context from the last CPU in a row, i.e., transmit context out the engine, feedback context to a next available row for further processing, transmit and feedback (for multicasts) or neither (discard).
At the end of the phase, context for each processor complex is switched to the alternate upstream and downstream context memories, and a new phase begins. Notably, all CPUs 410 of the engine 300 are synchronized to either phase A or B; the phase further determines from which context memory (CMA or CMB) the CPU fetches data. Thus, the downstream context for one CPU becomes the upstream context for the next CPU in the new phase, allowing seamless transfer of context data from CPU to CPU in a serial manner.
For example as each CPU completes its task for a particular phase, it issues a CDP instruction (e.g., 3rd from last instruction in a subroutine) to the CSCP 475. The CDP instruction contains the program counter (or a vector into a table) to be passed to a downstream CSCP, along with a context switch control (CSC) field that is updated appropriately. Notably, only the last CPU in a row sets bits in the CSC. Upon receiving the CDP instruction, the CSCP asserts a proc_done signal to the IHB signalling completion of the current phase. At this point, each CSCP (except for the last CSCP of a row) stalls the CPU (by, e.g., asserting a halt signal) and waits for two events to occur: receipt of a new program counter from the upstream CSCP and assertion of start_phase by the IHB. In response to these events, the CSCP de-asserts the halt signal and forces the program counter into the CPU as a new phase begins.
In summary, the context passing technique described herein enhances the speed of data execution in a pipelined processing engine by substantially reducing the latency involved with passing the data among stages of the engine. Note that transient context data entering the engine is dispatched to a processor complex stage of a pipeline for processing by a CPU prior to serially passing the data to a downstream processor complex stage. The processor complex architecture described herein facilitates the passing of transient data from an upstream context memory to a corresponding downstream memory as the CPU processes the data. Moreover, the data mover may be programmed to inconspicuously move any type of context data, such as network layer headers in the case of packet switching operations or the contents of entire data frames in the case of encryption operations, from the context memories (ping-pong buffers) during such CPU processing. Thus, the invention transforms an otherwise serial data processing/passing procedure to a parallel process.
While there has been shown and described an illustrative embodiment of a processor complex architecture that facilitates accurate passing of transient context data among processor complex stages of a pipelined processing engine while maintaining data coherency in the engine, it is to be understood that various other adaptations and modifications may be made within the spirit and scope of the invention. For example, in an alternate embodiment of the invention, the CPU core 410 is preferably a custom processor having a 96-bit horizontal microcoded instruction set that improves the performance of the processing engine. Yet despite the type of CPU core used in the processor complex, a significant aspect of the inventive architecture is the programmability of the CPU cores, i.e., the processor logic is not hardwired. Advantages of such a programmability feature include the ability to continuously "tune" the algorithms executed by the processing engine as well as the flexibility in implementing various types of algorithms executed by the engine.
The foregoing description has been directed to specific embodiments of this invention. It will be apparent, however, that other variations and modifications may be made to the described embodiments, with the attainment of some or all of their advantages. Therefore, it is the object of the appended claims to cover all such variations and modifications as come within the true spirit and scope of the invention.
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30 year old woman | Coconut Creek, FL, USA | Seeking men 28-34 within 100 miles of Pompano Beach, FL
Welcome to my profile ...
I am open to the idea of meeting someone who is ambitious and down to earth at the same time. A man I could go out with and actually enjoy myself , it would be a bonus if he also had a great sense of humor :-). The ideal match would enjoy joining me doing a variety of things including shows, fine dining, beach days and get togethers ...and the every day things such as sharing a home cooked meal & talking about our day and watching a movie or playing a game . Alittle about me , I'm a 5'4 Scorpio with about average curves. I work about 50-70 hours a week so it leaves little free time for me to go out and meet new people which is why I joined match. I'm not on this site looking for someone to change my life.... I pretty much have that one all under control and it has been that way for a long time ...I'm hoping to meet my best friend who I can build something amazing with. I'm not going to paint a perfect picture and say I'm easy going because it couldn't be further from the truth, I have an intense personality which I blame partly on my Zodiac ( and yes i believe in some of that stuff) On the other side I wear my heart on my sleeves and care very deeply for my inner circle. I am very nurturing and would go far and beyond for those who deserve it , not only with my partner but also with my family , friends and in business. Okay that's all she wrote ... Thanks for reading
Business networking , Cooking , Dining out , Museums and art , Music and concerts , Exploring new areas , Performing arts , Shopping/Antiques , Wine tasting
I exercise 1-2 times per week.
I have Dogs, Exotic Pets, Fish
I have 2 amazing dogs named Ninja & Samurai
Middle of the Road
Fort Lauderdale beach , Hakkasan @ The Fountaine Bleu , JB's on Deerfield beach
Broward Community College, Fort Lauderdale, FL
Some of my favorite music artist are Bjork, Enya, Sting, U2 and a splash of Lil Wayne and many others. On my days off I enjoy spa time at diamante day spa and spending time with my friends at happy hour ;-)
For fun in my spare time I enjoy learning about new and upcoming technology in the automotive industry to keep up with the trends. I love private get togethers with friends, family, and from time to time I enjoy lounges & night clubs
I read a lot of blogs and articles regarding the automobile industry... The last book I read was the four hour work week by Timothy Ferriss
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|What she is looking for
|5'4" (162cms)
|5'11" (180cms) to 6'4" (193cms)
|Body type:
|About average
|Slender, About average, Athletic and toned
|Blue, Brown, Grey, Green, Hazel
|Dark brown
|Black, Light brown, Dark brown, Blonde, Dark blonde
|No Way
|No Way
|Social Drinker
|Social Drinker, Moderately
|Executive / Management
|No preference
Digital Marketing Manager
|I'll tell you later
|No preference
|Never Married
|Never Married, Divorced
|Have kids:
|Yes, and they sometimes live at home, No, Yes, and they live away from home, Yes, and they live at home
|Wants kids:
|Definitely, Someday
|Black / African descent, Middle Eastern
|Black / African descent, White / Caucasian, Other
I was born on a tiny island named Antigua
|Christian / Other
|No preference
I'm finding my own way now from what I was taught my whole life .... At this point I'm open to all religious beliefs as long as they are open to my personal beliefs
|Some college
|Some college, Associates degree, Bachelors degree, Graduate degree, PhD / Post Doctoral