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A DSP superscalar architecture employing dual multiply accumulate pipelines. Dual MAC pipelines allow for a seem less transition between established RISC instruction sets and extended DSP instructions sets. Relocatable opcodes are provide to allow further extensions of RISC instruction sets. The DSP superscalar architecture also provides memory pointers with hardware circular buffer support, an interruptible and nested zero-overhead loop counter, and prioritized low-overhead interrupts.
1. A circular buffer control circuit, comprising
a first number of circular buffer start registers;
a first number of circular buffer end registers, each associated with a different one of the circular buffer start registers; and
circular buffer control logic including
means for comparing a pointer to a first address stored in a selected one of the circular buffer end registers, and
means for restoring to a register file a second address stored in the one of the circular buffer start registers associated with the selected circular buffer end register, if the pointer matches the first address stored in the selected circular buffer end register.
2. The circular buffer control circuit of
means for modifying the pointer by a stride value.
3. The circular buffer control circuit of
4. A circular buffer control circuit, comprising
a first number of circular buffer start registers;
a first number of circular buffer end registers, each associated with a different one of the circular buffer start registers; and
control logic that compares a pointer to a first address stored in a selected one of the circular buffer end registers and restores to a register file a second address stored in the one of the circular buffer start registers associated with the selected circular buffer end register, if the pointer matches the first address stored in the selected circular buffer end register.
5. The circular buffer control circuit of
6. The circular buffer control circuit of
7. A digital signal processor, comprising:
a register set; and
means for executing a loop of instructions a specified number of times determined by a loop count value, including
first means for executing a first instruction specified by address bits stored in a first portion of a first register of the register set,
second means for decrementing the loop count value stored in a second register of the register set, and
third means for executing a second instruction specified by address bits stored in a second portion of the first register and a third register of the register set.
8. The digital signal processor of
9. A digital signal processor, comprising:
a register set; and
control logic that executes a loop of instructions a specified number of times determined by a loop count value, wherein the control logic
executes a first instruction specified by address bits stored in a first portion of a first register of the register set,
decrements the loop count value stored in a second register within of the register set, and
executes a second instruction specified by address bits stored in a second portion of the first register and a third register of the register set.
10. The digital signal processor of
This application relates to provisional application Ser. No. 60/148,652 filed on Aug. 13, 1999, drawing priority therefrom.
The present invention relates to the field of digital signal processor (DSP) architectures, and more particularly to DSP architectures with optimized architectures.
With the increasing commercial importance of DSP-intensive applications, such as wireless communication, modems, and computer telephony, has come an increasing recognition of the benefit of implementing DSP functions on a CPU. Not only are CPUs usually needed for memory management, user interface and Internet Protocol software, CPUs also have excellent third-party software tool support.
Implementing certain DSP algorithms, such as the FIR Filter or Discrete Cosine Transform (DC7), in software, however, may degrade performance up to an order of magnitude as compared to specialized DSPs. Another difficulty is the problem of deterministic real-time allocation in sophisticated CPUs.
Some vendors have tried to address these problems by offering auxiliary processing components. DSP coprocessors, for example, use separate instruction sets, instruction stores and execution units, and DSP accelerators share the same I-stream with the CPU but have separate execution units. These approaches, however, impose a substantial burden on the CPU in managing DSP functions.
Systems and method consistent with the present invention provide for an alternate DSP architecture configuration that allows for more efficient implementation of DSP algorithms and use of CPU resources.
A digital signal processor consistent with this invention comprises two execution pipelines capable of executing RISC instructions; instruction fetch logic that simultaneously fetches two instructions and routes them to respective pipelines; and control logic to allow the pipelines to operate independently.
Another digital signal processor consistent with this invention and capable of integrating subopcodes into an established CPU instruction set comprises a memory that stores instructions having opcodes; an instruction decoder that identifies a relocatable opcode to designate subopcodes; and a subopcode detector that decodes subopcodes if the instruction decoder identifies the relocatable opcode.
Still another digital signal processor consistent with this invention comprises a register pair; and means for executing a multiply instruction on a number stored in the register pair, including first means for performing multiply instructions on higher-order portions of each register in the register pair, second means for performing multiply instructions on the remaining portions of each register in the register pair, and third means for combining the results from the first and second means.
A circular buffer control circuit consistent with this invention comprises a first number of circular buffer start registers; a first number of circular buffer end registers, each associated with a different one of the circular buffer start registers; and circular buffer control logic including means for comparing a pointer to and address in a selected one of the circular buffer end registers, and means for restoring the address in the one of the circular buffer start registers associated with the selected circular buffer end register if the pointer matches the address in the selected circular buffer end register.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate one embodiment of the invention and, together with the description, serve to explain the objects, advantages, and principles of the invention. In the drawings:
Reference will now be made in detail to embodiments consistent with this invention that are illustrated in the accompanying drawings. The same reference numbers in different drawings generally refer to the same or like parts.
A. Overview
Performance critical DSP algorithms such as FIR filters need to perform multiply-accumulate on memory-based operands. Typically, DSP architecture have a CISC instruction set with memory-based operands. RISCs on the other hand have load/store architectures and register operands. Extending the RISC into DSP with superscalar issue allows one instruction to load the register from memory and another to execute on register-based operands that were loaded earlier.
A RISC-DSP consistent with the present invention can achieve a system clock speed of 200 MHZ and a peak computational power of 400 million multiply-accumulate (MAC) operations per second when implemented in 0.18 μm technology, which is comparable to the highest-performance DSPs available. Also, tightly integrating DSP extensions into an existing instruction set, such as the MIPS ISA, gives access to a wide variety of third-party tools and allows programmers to switch seamlessly from RISC code to DSP code. The extensions include (1) multiply-accumulate (MAC) instructions, including guard bits (with support for fractional arithmetic mode), and saturation and rounding for high-fidelity DSP arithmetic operations that have not previously been available in RISC processors, (2) dual 16-bit versions of all ALU operations, (3) post-modified memory pointers with hardware circular buffer support, (4) zero-overhead loop counter, which can be interrupted and nested, (5) conditional move, (6) specialized ALU operations, (7) prioritized low-overhead interrupts, and (8) load/store of two 32-bit general registers with a single instruction.
These ISA extensions are accomplished by introducing an I-Format opcode called LEXOP, which creates 64 additional subop codes encoded in INST[5:0].
CI (customer interface) 180 acts as an interface to a customer coprocessor and connects to INSTA pathway 163 and DBUS 175. LBC 150 also interfaces to DI (data in) bus 192, DO (data out) bus 194, address bus 198, and control bus 196.
One implementation of the DSP consistent with this invention adds a stage to a dual-issue, five-stage pipeline to form dual-issue six-stage pipelines. The additional stage is a D (Decode) stage. This superpipeline design can achieve higher performance and isolate the processor's logic from customer-supplied instruction memories. Sustained performance near the peak 400 million MACs per second can be realized for inner loops of key DSP algorithms.
One pipeline is preferably a load/store pipe. It includes data memory access and all instructions except multiply and divide operations. Another pipeline is preferably a multiply-accumulate pipe. It includes a MAC and ALU, each with dual 16-bit operations.
Preferably, DSP algorithms will use the load/store pipe to load a pair of operands into a general register while executing dual MAC operations in multiply-accumulate pipe on earlier data. Decoupling register loads from the MAC processing allows loop unrolling and takes effective advantage of the thirty-two general registers for temporary storage. In addition, dual-issue allows the DSP to achieve the memory bandwidth required by DSP within a RISC architecture, and dual 16-bit SIMD operations take full advantage of the 32-bit RISC datapaths.
B. Description of Key Components and Features
1. Superscalar Architecture
As explained above, a DSP consistent with this invention preferably issues dual 32-bit instructions to two distinct six-stage execution pipelines.
The dual-issue design offers significant performance advantages. For example, peak computational performance for DSP algorithms typically requires at least one memory operand per instruction cycle. The dual-issue superscalar design, on the other hand, allows a memory operand to be loaded by one instruction while the MAC operates on earlier register-based data.
The RISC data path is 32-bits, but few DSP algorithms require more than 16-bits of precision. This allows the simultaneous fetching of two values from memory, which further improves performance.
The six stages of the execution pipelines are as follows:
To avoid degrading performance, the superscalar issue logic can operate during the Decode-Stage of the pipeline that occurs after I (Instruction Fetch) and before S (Source Fetch). The D stage allows a better system clock cycle time over that of a five-stage pipeline. Support for fully synchronous instruction memories also isolates the processor logic from the customer-supplied memories, which facilitates integration.
Although the D-Stage incurs a two-cycle penalty on branch prediction failure as compared to the one-cycle penalty from a five-stage pipeline, the effect of this penalty does not usually manifest. For example, because branches are predicted taken in all cases, no wasted cycles are incurred for backward branches used as loop counters except in the final cycle where the loop "falls through."
A two-bit Valid register 220 (V0 and V1) is updated with each fetch to indicate whether instructions I0 230 and I1 235 are valid. The Valid register can indicate three states: (1) "neither valid," which occurs following a cache miss, (2) "both valid," which occurs following a cache hit; or (3) "V0=invalid/V1=valid," which occurs following a branch to I1. Later, one or both instructions may issue to Pipes A and B. If only one instruction from a valid pair (e.g., 10) issues, Valid register 220 will be appropriately updated and instruction fetch will be stalled while the second instruction issues. V0=invalid/V1=valid occurs following a branch to I1. V0=valid/V1=invalid will not occur because preference is given to I0 (the first instruction in program order) if only one instruction can issue. The next instruction I1 issues before fetching a new pair of valid instructions, I0/I1.
Decoding register 220 belongs to instruction analysis logic 240, which, along with the Instruction Select logic, is implemented in the D-Stage. Instruction analysis logic 240 generates five key signals: 0 eA, 1 eA, 0 eB, 1 eB and 1 d 0. 0 eA indicates whether I0 can execute in Pipe A. This decision is based on the I0 opcode and the resources available in Pipe A. For example, if I0 is an ADD and Pipe A can execute an ADD, then 0 eA=1; if I0 is a MAC and Pipe A has no MAC then 0 eA=0. The complexity of this logic can be minimized by careful encoding operations and by careful partitioning of operations between the two Pipes. One simplification could be to partition the DSP partition so that the Pipe B instruction, IB_S_R, is routed only to RALU 120 (
A special signal 1 d 0 indicates that both I0, I1 are valid and I1 (the higher logical order) depends on I0. This will occur if the result of I0 is used as a source by I1. In this case, only I0 will issue. Analysis of the other signals is shown below:
Based on the Instruction Analysis, instructions are issued to Pipes A and B. Three outcomes are possible for each Pipe,
Data flow is effected by input multiplexers 260, 262, instruction registers 264, 266, output multiplexers 268, 270, and output registers 272, 274. An input multiplexer 276 and an output register 278 are associated with Valid register 220.
Instruction select logic 250 controls output multiplexers 268, 270 according to Table 300 in
"V←next" in Table 300 indicates that I0/I1 are updated with a new instruction pair (following cache load) and both are valid, unless a branch to an odd address occurs. In that case, I0 is not valid and I1 is valid. If two instructions are valid, but only one instruction issues, the signal "Stall" will be active to stall the instruction fetch by one cycle until the 2nd instruction has issued.
The Order Register ORD, which lies in instruction memory and issue logic 130 (
To improve performance, the DSP's superscalar implementation can use a "sliding" two-instruction buffer with a third instruction register, I2. If only one instruction (I0) issues, the contents of I1 are shifted into I0, the contents of I2 are shifted into I1 and a new instruction is fetched into I2. As a result, a pair of instructions will always be available in I0 and I1 for potential dual issue, except for the cycle following a branch or jump.
The third instruction buffer register I2 is required because another pair of unaligned instructions must be available for use, following the dual issue of an unaligned instruction pair (I0 and I1 addresses are not both on the same factor-of-8 boundary). If memory fetches only aligned instruction pairs, a third instruction buffer is required.
The compression signal indicates whether code compression has been enabled. When compression is enabled, each 32-bit fetch is interpreted as a pair of 16-bit instructions. Upon fetching I0(32), the first 16-bit instruction of the pair will be loaded into I0 REG and the second into I1 REG. Similarly, when I1(32) is fetched, the first instruction of the pair will be loaded into I0 REG and the second into I1 REG. D-Stage logic follows the approach previously described with the shorter instruction (e.g., 16-bit) opcodes being analyzed for potential issue, then selected into IB REG and IA REG. The critical Register File read addresses for shorter instruction opcodes are resolved during the D-stage so that register file access for shorter instructions, as for longer (e.g., 32-bit) instructions, can begin on the rising edge of the S-Stage clock. The state of I0 valid and I1 invalid does not occur because there is no out-of-order execution.
2. RALU Datapath
An 8-port (4-read/4-write) general register file 410 supports the dual execution pipelines. The 8-port architecture allows a large portion of both pipes to be fully replicated, simplifying design and improving likelihood of two instructions being able to dual issue.
All ALU operations are available in both Pipe A and Pipe B. DSP extensions to memory addressing, such as pointer post-modification and circular buffer addressing described below, are preferably unique to Pipe A. Also, coprocessor operations and all "sequencing control instructions" (branches, jumps) are unique to Pipe A. As a result, Pipe B instructions are not routed to the coprocessors. This is shown in
3. MMD register
Field MS 530 selects saturation boundary in the Dual Mac accumulators as follows. A "0" means saturate at 40 bits, and a "1" means saturate at 32 bits. Field MT 540 selects truncation of 32�32 bit multiplies in the Dual Mac. A "0" means perform full 32�32 bit multiply (sum all four partial products), and a "1" means omit partial product rX[15:00]�rY[15:00] when performing 32�32 bit multiply.
Field RND 550 selects the rounding mode used in the RNDA2 instruction. A "00" means convergent rounding, and a "01" means round to nearest number. In convergent rounding, which is sometimes called "round-to-nearest-even," the numbers are rounded to the nearest number. When the number to be rounded is midway between two numbers representable in the smaller format, round to the number is rounded to the even number. The rounded result will always have 0 in the lsb. If the lsb left of the roundoff point is random, convergent rounding is unbiased.
In rounding to the nearest number, the number is rounded to the more positive number when the number to be rounded is midway between two numbers representable in the smaller format. This rounding mode is common because it is easily implemented by always adding 0 . . . 0.10 . . . 0 to the number to be rounded. Digits to the right of "A" are dropped after rounding. Upon reset all bits in the MMD register 500 are initialized to 0.
4. MAC Datapath
Multiply-accumulate datapaths can operate on 16-bit input data, either individually or in parallel. Preferably, the same assembler mnemonic is used for individual or parallel operation. The output register specified determines whether MAC0 or MAC1 or both, operate. For example,
Each multiplier 610 and 620 can initiate a new 16�16-bit product every cycle (single cycle throughput). Each 16�16-bit multiply-accumulate preferably completes in three cycles.
Temporary registers 612 and 622 and product registers 614 and 624 show that multipliers 610 and 620 require two cycles, but have single cycle throughput. Temporary registers 612 and 622, and product registers 614 and 624, however, are preferably not accessible by the programmer. Thus, there are two delay slots for multiplication or multiply-accumulate. For example,
M1 h can be referenced by MFA in Inst2 (Inst3), but two (one) stall cycles will be incurred. The number of stall cycles in DSP algorithms are expected to be minimal because many products are often accumulated before the accumulator output must be stored. In a 64-tap FIR, for example, sixty-four terms are accumulated before the filter sample is updated in memory. Also, the four accumulator pairs allow loops to be "unrolled" so that up to three additional independent MAC operations can be initiated before the result of the first is available.
Compared to a typical RISC multiply-accumulate unit, a MAC consistent with this invention includes a number of features critical to high-fidelity DSP arithmetic, such as accumulator guard bits, fractional arithmetic, saturation, rounding, and output scaling. These features are optionally selected by opcode and/or mode bits in MMD register 500, and are compatible with conventional integer arithmetic.
Accumulation is preferably performed at 40-bit precision, using eight guard bits for overflow protection. The alternative is to require the programmer to right-shift (scale) products before accumulation, which complicates programming and causes loss of precision. Before accumulation, the product is sign-extended to 40-bits. With guard bits, the only loss of precision will typically occur at the end of a lengthy calculation when the 40-bit result must be stored to the general register file or to memory in 32-bit or 16-bit format.
Fractional arithmetic is implemented by the program's interpretation of the 16-, 32- or 40-bit quantities and is controlled by a bit in the MMD register 500. When fractional mode is selected, the dual MAC shifts the results of any multiply operation left by one bit to maintain the alignment of the implied radix point. Furthermore, since (−1) can be represented in fractional format but +1 cannot, in fractional mode the dual MAC detects when both operands of a multiply are equal to (−1). When this occurs, it generates the approximate product consisting of 0 for the sign bit (representing a positive result) and all 1's ones for the remaining bits. This is true for both 16�16-bit and 32�32-bit multiplications. The least significant bit of a product is always zero in fractional mode (due to the left shift).
The accumulation units can add the product to, or subtract it from, one of the four accumulator registers 618 and 628. This operation can be performed with optional saturation; that is, if a result overflows (underflows), the accumulator is updated with the largest (smallest) positive (negative) number rather than the "wraparound" result with incorrect sign. The DSP instructions preferably include a multiply-add and multiply-sub instruction, each with and without saturation. There are also instructions for adding or subtracting any pair of 40-bit accumulator registers together, with and without saturation. A bit in the MMD register determines whether the saturation is performed on the full 40-bits or whether saturation is performed at 32 bits. The latter capability is useful for emulating the results of other architectures that do not have guard bits.
When the instruction requires multiplication, but no accumulation, the product is passed through the accumulation unit unchanged. (Thus, both 16-bit multiplication and multiply-accumulate require three MAC cycles.)
A Round instruction can also be executed on one (or a pair) of the accumulator registers to reduce precision prior to storage. The rounding mode is selectable in MMD register 500. The output scalers 619 and 629 are used to right shift (scale) the accumulator register when it is transferred to the general register file.
The dual MAC configuration consistent with the present invention is also used to execute the 32-bit MULT(U) and DIV(U) instructions specified in, for example, the MIPS ISA. In the case of MULT(U), one of the 16-bit Multiply-Accumulate datapaths works iteratively to produce the 64-bit product in five cycles. The least significant 32 bits are available one cycle earlier than the most significant 32 bits. MMD register 500 mode bits have no effect on the operation of the standard MIPS ISA instructions. By contrast, the MULTA instruction is subject to MMD register 500 mode bits for fractional arithmetic and truncated 32�32-bit multiplication.
For the DSP MULTA, an accumulator pair M0 h[31:0]/M01[31:0], M1 h[31:0]/M11[3 1:0] etc. is the target. M0 h[31:0] is aliased to HI; M01[31:0] is aliased to LO. Unlike the (dual) 16-bit operations, single-cycle throughput is not available for 32-bit data. Because there are two available data paths, however, two 32�32-bit multiply operations can be initiated every four cycles. The Dual MAC hardware configuration consistent with this invention automatically allocates the second operation to the available data path. If a third 32-bit multiplication is programmed too soon, stall cycles are inserted until one of the data paths is free.
The Dual MAC configuration consistent with this invention also supports a complex multiply instruction, CMULTA. For this instruction, each of the 32-bit general register operands is considered to represent a 16-bit real part (in bits 31:16) and a 16-bit imaginary part (in bits 15:00). One of the multipliers calculates the real part (32 bits) of the complex product (namely XrYr−XiYi) and stores it in the "h" half of the target accumulator pair. The other multiplier calculates the imaginary part (32 bits) of the complex product (namely XrYi+XiYr) and stores it in the "I" half of the target accumulator pair. This instruction can be initiated every two cycles (2-cycle throughput) and takes four cycles to complete. As in the other Dual MAC operations, programming CMULTA instructions too close together causes stall cycles but the correct results are always obtained.
The Dual MAC configuration consistent with this invention includes a separate Divide Unit 630 for executing the 32-bit DIV(U) operations specified by the MIPS ISA. The Divide requires 19 cycles to complete. The quotient is loaded into M01[31:0], M11[31:0], M21[31:0], or M31[31:0], and the remainder is loaded into the lower 32-bits of the other accumulator in the target pair. There is no special support for fractional arithmetic for the DIV operations.
Because the Dual MAC configuration consistent with this invention is capable of consuming four 16-bit operands every cycle (in Pipe B) by performing two 16�16 bit multiply-accumulates, it is desirable to be able to fetch four 16-bit operands from memory every cycle (in Pipe A). Therefore, the DSP extends the MIPS load and store instructions to include twinword accesses and implements a 64-bit data path from memory. A twinword memory operation accesses an (even-odd) pair of 32-bit general registers with a single instruction and executes in a single pipeline cycle.
Like the standard byte, halfword, and word load/store instructions, the twinword load/store instructions use a register and an immediate field to specify the memory address. However, to fit into the format, the available signed 11-bit immediate field (called the displacement) is considered a twinword quantity, so is left-shifted by 3 bits before being added to the base register. This is equivalent to a 14-bit byte offset, in comparison to the full 16-bit immediate byte offset used in the byte, halfword and word instructions. Also, the target register pair for the twinword load/store must be an even-odd pair, so that only 4 bits are used to specify it.
DSP algorithms usually operate on vectors or matrices of data; for example Discrete Cosine Transforms operate on 8�8 pixel blocks. As a result, data memory pointers are incremented from one operand to the next. The extra instruction cycle required to increment RISC memory pointers is eliminated in DSPs with auto-increment. Memory pointers are used unmodified to create the address, then updated in the general register file before the next use:
In the case of Loads (but not Stores) pointer update requires a second general register file write port. An 8 port (4read/4write) register file has two of the four write ports dedicated to register Loads. As a result, twinword loads can execute in parallel with any Pipe B operation.
5. Circular Buffers
For some DSP algorithms, notably filters, DSP data is organized into "circular buffers." In this case, the next reference after the end of the buffer is to the beginning of the buffer. Implementing this structure in RISC requires:
The above example is written so that a branch prediction failure will only be incurred at the end of the buffer. Nevertheless, the combination of post-modified pointers together with hardware support for circular buffers allows reducing this typical DSP addressing operation from four cycles to one.
The DSP supports three circular buffers. To initialize the circular buffers, MTALU (Move to ALU) instructions are used to set the twinword start addresses cbs 0 1010, cbs 1 1013, and cbs 2 1016[31:3] and the twinword end addresses cbe 0 1020, cbe 1 1023, and cbe 2 1026 [31:3]. Circular buffers are only used when memory pointers are post-modified, and consist of an integral number of twinwords.
When a circular buffer pointer is used in a post-modified address calculation, the pointer is compared to the associated cbe address. If they match (and the stride is non-negative), the cbs address (rather than the post-modified address) is restored to the register file. Similarly, to allow for traversing the circular buffer in the reverse direction, the pointer is compared to the cbs address; if they match (and the stride is negative) the cbe address (rather than the post-modified address) is restored to the register file.
Also in
A+BI 1060 is the memory pointer modified by the stride; Select signal 1064 indicates whether the memory pointer matches the circular buffer end address; and ALUREG 1070 is the output of the ALU. In this case, ALUREG 1070 holds the modified pointer that will be used in the next such memory address.
Circular buffers can also be accessed with byte, halfword, or word Load/store with Pointer Increment instructions. In those cases, the several least significant bits of the pointer register are examined to determine if the start or end of the buffer has been reached, taking into account the granularity of the access, before replacing the pointer with the cbs or cbe as appropriate.
Any general register memory pointer can be used with circular buffers using the ".Cn" option. To use general register rP as a circular buffer pointer, for example, the instruction
6. Instruction Extensions
The DSP accommodates extensions to the standard instruction sets, such as the MIPS instruction set, to support dual 16-bit operations, and also introduces a number of additional ALU instructions that improve performance on DSP algorithms. Supporting high-performance, dual 16-bit operations in the RISC-DSP requires supporting not only dual MAC instructions but also dual 16-bit versions of other arithmetic operations that the programmer may require.
In general, 16-bit immediates are not supported because the DSP extensions are encoded using the INST[05:00] "subop" field. Although dual 16-bit versions of logical operations such as AND may not be required, dual 16-bit versions have been provided for all 3-register operand shifts and add/subtracts. In a preferred implementation, the character "2" in the assembler mnemonic indicates an operation on dual 16-bit data.
DSP algorithms are often somewhat tolerant of data errors. A bad audio sample, for example, may cause a brief distortion, but no lasting effect as new audio samples arrive and the bad sample is cleared out of the buffer. Accordingly, the saturated result of signed arithmetic is a closer, more desirable, approximation than the wraparound result. Therefore, all arithmetic operations that may potentially produce arithmetic overflow or underflow, and do not have immediate operands, support optional saturation. For example, not only the dual 16-bit add (ADDR2), but also the 32-bit add (ADDR) have optional saturate. Neither the dual 16-bit instructions nor the 32-bit saturating adds and subtracts cause exceptions.
A DSP consistent with this invention includes several additional ALU instructions for DSP performance analysis. Consistent with the approach described above, each additional instruction has both a 32-bit and a dual 16-bit version. If signed overflow/underflow is possible, a saturation option is provided. These instructions are described in Table 1200 in
Some DSPs provide a more extensive set of microcontrol functions; for example, field "set," "clear," and "extract" functions. In ATM cell processing, for example, these functions are useful in processing the cell headers. In DSPs consistent with systems and methods of the present invention, these operations can readily be executed using one or more RISC operations. For example:
A number of DSPs and RISC processors have deployed extensive conditional execution. In these processors, the branch prediction penalty is three cycles or more. Conditional execution can mitigate the effect of the branch prediction penalty by allowing bypassing of the branch in some cases. Conditional execution is a costly alternative, however, because it uses instruction opcode bits and consequently limits the size of immediates and/or limits the number of general purpose registers visible to the program. The branch prediction penalty in the DSP of the present invention, however, only requires two cycles; therefore the value of conditional execution is minimized and only a restricted set of "conditional move" instructions is needed. The effect of any conditional execution can be "emulated," however, with a sequence of two instructions by using the conditional move. For example:
Processor with conditional execution:
if (rB COND)
MOVE rD, rC //move rC to rD
This conditional move facilitates initial porting of assembler code from processors with conditional execution. Table 1400 in
7. Zero Overhead Loop Facility
DSP algorithms spend much of their time in short real-time critical code loops. To compensate, DSPs often include hardware support for "zero-overhead looping." Zero-overhead looping allows branching from the end-to-beginning of the loop can be accomplished without explicit program overhead if the loop is to be executed a fixed number of times, known at compile time. Typically, loop counters and program start and/or end address registers are required. Zero-overhead looping cannot be nested without additional hardware. Often, zero-overhead loops cannot be interrupted.
A DSP hardware configuration consistent with the disclosed embodiment supplies such a facility but allows the loop count to be determined at run time as well. The facility consists of three Radiax registers, which are accessible by a program running in User mode using Radiax instructions MFRU and MTRU. The operating system should consider these registers as part of the context of the executing process and should save and restore them in the case of an interrupt.
These three registers include:
LPE0[3 1:2]—maintaining a virtual address of the ending instruction of the loop;
LPS0[28:2]—holding low order bits of the virtual address of the "starting" instruction of the loop; and
LPC0[15:0]—holding the loop count value.
Although this feature is intended to operate in loops, the algorithm executed by the hardware can be described more simply. In particular, it should be noted that there is no knowledge of being "inside" the loop. All that matters is the contents of the three registers when an attempt is made to execute the instruction at the address specified by LPE0:
In this embodiment, the order of loading the registers should be LPS, then LPE, then LPC with a non-zero value. Further, there should be at least two (2) instructions between the instruction that loads LPC with a non-zero value, and the instruction at the LPE address. To guarantee that no stall cycles are incurred, at least six (6) instructions should separate the instruction that loads LPC with a non-zero value, and the instruction at the LPE address.
8. Cycle-by-cycle Usage for Dual MAC Instructions
As explained above, a Dual MAC architecture eliminates programming hazards for its instructions by stalling the pipeline when necessary. It does this both to avoid resource conflicts and to wait for results of a first instruction to be ready before attempting to use those results in a second instruction. This means that no programming restrictions are needed to obtain correct results from a sequence of Dual MAC instructions.
The most efficient use of the hardware, however, occurs when the program avoids these stalls, usually by properly scheduling the instructions. Table 1500 in
The following code sequences indicate the most efficient use of the Dual MAC for coding the inner loop of some common DSP algorithms. The algorithms are presented for 16-bit operands with 16-bit results, as well as 32-bit operands with 32-bit results. The algorithms assume that fractional arithmetic is used. Therefore, for the 32-bit results of a 32�32 multiply, only the HI half of the target accumulator pair is retrieved or used.
In these examples, only the Dual MAC instructions are shown. The other pipe is used to fetch and store operands and take care of loop housekeeping functions. The loops may need to be unrolled to take full advantage of the multiple Dual MAC accumulators.
Case 1: 16-bit Inner Product SUM=SUM+Ai*Bi
Assuming packed operands, two multiply-adds per cycle:
Case 2: 16-bit vector product loop. Ci=Ai*Bi
Assuming packed fractional operands, two multiplies per two cycles using two accumulator pairs.
Case 3: 16-bit complex vector product. Ci=Ai *complex Bi
Assuming fractional operands packed as 16-bit real, 16-bit imaginary. One complex multiply every two cycles using two accumulator pairs.
Case 4: 32-bit inner product loop: SUM=SUM+Ai*Bi
Assuming a multiply-add every other cycle using one accumulator.
Case 5: 32-bit vector product loop. Ci=Ai*B1
Assuming fractional 32-bit operands so that the MFA waits for the HI result of the MULTA. Achieves one multiply per two cycles using all the accumulators.
Case 6: 32-bit complex vector product. Ci=Ai *complex Bi
Assuming fractional 32-bit operands so that the ADDMA/SUBMA waits for the HI result of the second MULTA. Achieves one complex multiply per ten cycles using all the accumulators, with two inserted instructions. This is a good example of the cycles needed from MULTA to SUBMA/ADDMA (5 cycles for HI) and from SUBMA/ADDMA to MFA (2 cycles).
9. Low-overhead Interrupts
The DSP consistent with this invention accommodates eight low-overhead hardware interrupt signals that are useful for real-time applications. These Interrupts are supported with three coprocessor 0 registers: ESTATUS (0) 1610, ECAUSE (0) 1620, and INTVEC (0) 1630, which are illustrated in
ESTATUS register 1610 contains the mask bits IM[15–8] for the low priority interrupt signals. IM[15–8] is reset to 0 so that, regardless of the global interrupt enable, IEc, none of the interrupts will be activated. IP[15–8] for the interrupt signals is located in ECAUSE 1620. Each of these fields are similar to IM and IP defined in the R3000 Exception Processing model. One difference is that the interrupts are prioritized in hardware and each have a dedicated Exception Vector.
IP[15] has the highest interrupt priority, IP[14] next, etc. All new interrupts are higher priority than IP[0–7]. The Exception vector for the interrupts is located in INTVEC register 1630. The BASE for these vectors is program-defined. The vector for IP[15] is BASE∥111000∥, for IP[14] BASE ∥110000∥, etc. Thirty-two instructions can be executed at each vector; if more are required the program can jump to any address.
10. Operational Codes
DSP architecture consistent with this invention allows for an extension of a standard instruction set by designating a single I-Format as "LEXOP," then using the INST[5:0] "subop" field to permit up to 64 additional opcodes. Thus, the additional DSP opcodes model the MIPS "special" opcodes encoded in R-Format. The diagrams in
In the present embodiment, the default object code for LEXOP is 011—111. However, the location can be moved using power/ground straps, for example. These straps or similar configurable devices help insure compatibility of the DSP extensions with future MIPS ISA extensions. The code assigned to "LEXOP" can be moved around with external power/ground straps to insure long-term compatibility of the DSP extensions with the MIPS ISA.
The following principles are used to resolve potential ambiguity of encoding between the DSP of the present invention extensions and instructions:
The MIPS add and the LEXOP addr are both signed 32-bit additions. However, on overflow the MIPS instruction triggers the Overflow Exception, while the LEXOP does not. Alternatively, the result of the LEXOP will saturate if the ".s" option is selected (addr.s).
The foregoing description is presented for purposes of illustration and description. It is not exhaustive and does not limit the invention to the precise form disclosed. Modifications and variations are possible in light of the above teachings or may be acquired from practicing the invention. The scope of the invention is defined by the claims and their equivalents.
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Gettin' Dirty with the Wans: 8400 miles - UTBDR, KLIM rally, Canada, WABDR, OBDR +
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You can do it!
Joined: Aug 2009
Location: behind BigWan, trying to keep my feet tucked in :)
Oddometer: 1,792
Day 2: 6/23/12
Mina, NV to Cherry Creek Campground, NV 233 miles
I think we were all tired enough to sleep well.
also, Dump Road was surprisingly quiet!
Got a decent start in the morning. Maybe not early (9-ish), but better than yesterday.
Pretty much the same kind of roads as the previous day.
Had sandwiches for lunch at the Landing Spot (Hadley, NV).
Nice, friendly folks there. FYI theres a bathroom in the attached laundromat.
We were a little concerned about our fuel mileage/range on this trip.
Prior to this ride, the 990 was getting horrible mileage. Really bad - like 23-25 mpg.
So, 2 days before we left Matt used TuneECU to re-map the bike.
He changed the fuel injection map from the Akra map to the 07/08 stock Euro map.
It seemed to have worked - we were getting 36-38 mpg so far - but we didnt trust it.
Matt knew that the next section was going to be pretty long without another gas stop
(cant remember the exact number - 230?)
Just to be safe we filled our tanks, the aux. tank, both MSR bottles,
a 60 oz orange juice bottle (one from home that we had been saving for such an occasion),
and a 1.5 liter Aquafina bottle.
Oh goody. A powerline road. Those are always fun.
This one was no exception.
(note the Molotov cocktail strapped to the duffle)
We drove through
before getting back on the trail.
Back into the sand
Deep sand
Capn underpants was making sand his favorite!
(you got it, Tn Walrus
BigWan and I had just done a bunch of 2up sand in Death Valley,
but it was nice to get more practice before we got to Utah.
Next, it was back on the slab for the ghost town of Belmont.
Fire truck for Bob!
Back in the dirt
Stopped to explore this old homestead...
Okay, we have miles to cover...
After so much monotonous desert and the same boring landscape, it was nice to see some greenery.
And pretty horses.
There were lots of gates, but I didnt mind. It was such a beautiful valley.
This furry guy was so cute...
Run Forest, run!
we were going slow, waiting for him to turn off the road. I didnt want the chunky little fella to have a heart attack.
after looking at this close up, maybe SHE was preggers?
This really was an oasis in the desert
More gates surrounded this house. Cute dog in the back of the truck!
As we were leaving the valley, we saw this huge herd...
Matt said, those are bighorn sheep!
What? really?
he was right!
More bighorn were up on the side of the hill.
A little blurry, but I like this one.
We were really close to
the Lunar Crater,
but with the gas situation we couldnt afford to get off the trail and go fool around.
Oh well. We had plenty of other cool natural features to gawk at.
Like this.
We stopped for a water break in the crotch.
(Hmm. that sounds wrong
Here comes Aaron...
(take us to your leader!)
This next part reminded us of a mini Mengel pass...
Looking back at Aaron...
Down into the valley...
Aw. Poor cow. It looks like the desert is still taking lives.
This is the same place that Boney and Luke saw dead cows on their ride.
Ticking off some miles.
We had been hoping to camp at elevation, but werent sure if it was going to work out...
Yay! It was.
We saw the signs for Cherry Creek Campground and headed up.
It was kind of pretty as we went up the mountain, but it was getting dark and the pictures arent great.
Heres the campsite we chose.
We thought it was Cherry Creek CG, but the
I found
dont match up with what Norm shows:
Never found the pit toilet, either.
Oh well, it had a table, it was free and there was no one around.
So, you may have noticed that Capn underpants was sporting
quite the stache...
Apparently he lost a bet and was forced to grow a handlebar mustache.
He was trying to go as long as he could, but the last couple of days were tough.
The heat, the sweat, the hours in the helmet...it was making him nuts.
He broke out a bottle of tequila (I totally forgot to take a pic, dang it!)
and we had a tequila mustache cutting party!
Was it a bad idea for Aaron to cut his mustache by the light of a headlamp,
using a tiny pocket mirror and some folding scissors from a leatherman knockoff?
All better.
Now thats a happy FF!
Oso bored? you can find the rest of our ride reports
make stupid your favorite!
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Almay Clear Complexion Blemish Healing Makeup
640 reviews
71% would repurchase
Package Quality: 3.1
Price: $$
Package Quality: 3.1
Price: $$
INGREDIENTSNEW FORMULA WITH PUMP >>> (Active Ingredient : Salicylic Acid 0.6%), Water, Cyclopentasiloxane, Cyclohexasiloxane, Butylene Glycol, Nylon-12, Trimethylsiloxysilicate, Dimethicone, Cetyl PEG/PPG-10/1 Dimethicone, Boron Nitride, Isodecyl Neopentanoate, Talc, PEG/PPG-18/18 Dimethicone, Sodium Chloride, Alumina, Dipotassium Glycyrrhizate, Methoxypropylgluconamide, Panthenol, Panthenyl Ethyl Ether, Fomes Officinalis (Mushroom) Extract, Tocopheryl Acetate, Aloe Barbadensis Leaf Juice, Centaurea Cyanus Flower Extract, Spiraea Ulmaria Extract, Chamomilla Recutita (Matricaria) Flower Extract, Hydrolyzed Vegetable Protein, Trisiloxane, Phytantriol, Tribehenin, Sorbitan Sesquioleate, Silica, Methoxy Amodimethicone/Silsesquioxane Copolymer, Dimethicone/Bis-Isobutyl PPG-20 Crosspolymer, Triethoxycaprylylsilane, Methicone, EDTA, Tetrasodium EDTA, Phenoxyethanol, Propylparaben, Methylparaben, Ethylparaben --- MAY CONTAIN (CI 77891/Titanium Dioxide, CI 77491/CI 77492/CI 77499/Iron Oxides, CI 77947/Zinc Oxide)
on 2/6/2011 1:28:00 PM
Age: 18 & Under
Skin: Acne-prone, Fair, Not Sure
Hair: Blond, Other, Other
Eyes: Blue
I like this foundation because it doesn't make me break out. But it doesn't cover amazingly, especially not scars. It also can make your skin look flaky even directly after applying moisturizer. It works so much better if you mix it with your moisturizer though!
on 2/5/2011 10:05:00 AM
Age: 36-43
Skin: Acne-prone, Fair-Medium, Warm
Hair: Brunette, Wavy, Fine
Eyes: Brown
I love this foundation. I am normally a bare essentials girl, but wanted some fuller coverage and o try something new. Beautiful finish, stays on all day, I always set with powder though.
on 2/1/2011 11:58:00 PM
Age: 19-24
Skin: Oily, Fair, Not Sure
Hair: Blond, Straight, Fine
Eyes: Blue
GIRLS. (acne-prone) GIRLS.
Stop, stop, stop buying and trying all different kinds of make-up to cover up your acne.
I am now 20 years old, and have had the most sensitive and oily, breakout-prone skin since I was 13. I can tell you that the majority of products, even the powders, liquids and cremes that claim they "won't cause breakouts," will.
My dermatologist years ago recommended to me this version of Almay's foundation, and I have never turned back!! This is the only foundation I've ever found that has never been the source of my break outs. Each morning, after using this make-up, I have a more even looking skin tone, which really helps with my confidence.
Here are some tips for this make-up:
-The best in-store price I've found for this make-up is always at Bed Bath and Beyond! My local drug stores are always more expensive than good ol' BBAB.
- Always apply with a make-up sponge. Using your fingertips to blend is only spreading bacteria and oil from your hands.
- Almay's liquid make-ups all come in the same type of bottle, so don't grab the wrong type! Make sure it says "Clear Complexion Blemish Healing," rather than something else.
- Enjoy your new make-up!!
I'm so glad to spread the word on this make-up. Enjoy girls!
on 1/25/2011 6:02:00 PM
Age: 18 & Under
Skin: Combination, Fair-Medium, Not Sure
Hair: Brown, Straight, Fine
Eyes: Brown
I bought this in Sand for $10-12 at Walmart (too expensive for what it's worth).
- Lasts for a long time
- Full coverage that generally covers blemishes
- No pump, liquid pours too fast out of bottle (I usually end up with more than I use)
- Cakey (my mom has commented on how cakey it is and I even use a brush that's supposed to give an airbrushed effect)
- Expensive
- Melts off when sweating (I wore sunglasses and you could see my skin where the sunglasses sat because it melted off during a hot day)
I've been using this foundation since I haven't looked into any other options but it's not the greatest drugstore foundation you could find.
on 1/25/2011 10:50:00 AM
Age: 19-24
Skin: Oily, Fair-Medium, Warm
Hair: Black, Straight, Medium
Eyes: Black
Overall, a good, solid drugstore brand that's great for the oily (and of course, acne-prone) girls to wear every day. It has low coverage but you can build it up nicely using a sponge or a brush. I would call the finish simply 'natural' because it's neither matte nor dewy, and looks pretty much like your own skin. That being said, if you want something that looks more airbrushed or has more coverage, this is NOT the foundation to use.
I like the simplicity of this foundation and that it's good for your skin. It evens out my skin tone, hides my years-old acne scars decently well, and feels very soft and light, like you're not wearing anything. I did get a a single dry patch on my cheek one day about 12 hrs after I applied it, but for the most part, I didn't notice this foundation fading noticeably throughout the day or drying out my skin. As for oil control, it's not a miracle BUT it does control the oil on my skin surprisingly well. I looked SLIGHTLY dewy by the end of the day, but it wasn't enough to make me blot (which is great because I normally blot 1-2 times a day when I become unbearably shiny).
Overall, if you don't wear a lot of foundation (like me), have oily or normal skin but would like to even out your complexion, this is a good choice. That being said, I will probably use up my bottle and then move on to try something else, just out of sheer curiosity.
on 1/6/2011 12:03:00 PM
Age: 19-24
Skin: Combination, Medium, Not Sure
Hair: Brunette, Other, Other
Eyes: Hazel
I have very acne prone oily skin. I used this product for over 3 years. Although, it was great at clearing up my skin and keeping the shine away. After a while, I started to notice that it was doing such a good job at keeping my acne away and my skin shine free that it was giving my fine wrinkles. In my opinion the salaic acid kept my skin too dry even with using moisturizers twice a day.
Overall, this is a great foundation for controlling your acne, but I wouldn't plan on using it long term as you may start to notice fine lines. I have just recently switched to Maybelline Age Rewind, I have been using it for about 2 weeks now, and so far so good!!
on 1/5/2011 2:52:00 PM
Age: 30-35
Skin: Combination, Fair-Medium, Not Sure
Hair: Brown, Straight, Medium
Eyes: Blue
I love this foundation! My derm recommended it to me, he said to use almay or Clinique so I started with almay since it's cheaper. I am about to buy my third bottle. I love it! I use a sponge only twice, once each side. I also make sure to wash my face on the nights when I have worn make up, I don't wash at night if I'm not wearing make up. My complexion has improved greatly. I'm even pregnant right now for my second time and my face was a wreck last time! I was using BE then. When I went to my derm in the summer it was actually to ask about the Clarisonic brush. He said not to get it. Just to switch make up. This foundation has made a world of difference. YAAYYY! Oh, and I also use the almay loose powder and the almay blush.
on 1/4/2011 6:56:00 PM
Age: 25-29
Skin: Acne-prone, Fair, Warm
Hair: Brunette, Straight, Medium
Eyes: Brown
Ok, so I have to admit that when I first used this...I thought....no way. It didn't seem to have as much coverage I wanted...it appeared too sheer. But after having horrible breakouts from aquasmooth, and adding some salicylic acid and benzoyl peroxide to my routine, I was on a mission to clear my skin. So, I started using this again. I use probably 15 "dots" with my finger, and blend with a sponge. Because this isn't full coverage, it's necessary to follow up with a concealer if you have blemishes/spots. The almay clear complexion concealer works great for this. And a light dusting of powder is good. This makeup really evens out skin tone but looks so natural at the same time...and is also long lasting for me. I believe that this has really helped to clear my skin because it doesn't cause any new blemishes. I never worry about breaking out when wearing this. I was using aquasmooth because it was quick, heavy coverage, but it took me forever to finally admit it was breaking me out. I would much rather take an extra couple of mins. in the morning and know that my skin will look great still after taking the makeup off. The color selection is great too.
on 1/3/2011 4:41:00 PM
Age: 18 & Under
Skin: Oily, Fair, Not Sure
Hair: Brown, Other, Other
Eyes: Brown
I've been using the Clear Complexion Concealer for as long as I can remember for me acne prone/acne scarred skin. I decided I might as well try the matching foundation. And I am very impressed!
This foundation is medium coverage after just one application. You could probably layer it to get high coverage, but I find that it covers enough for me with just one application. I really only need concealer on actual belmishes and under my eyes--not on every single scar like before! Best of all: It controls oil all day. Normally I have to apply powder in the middle of the day, but I felt like I barely needed any touch ups with this!
The only cons about this are that it is a bit pricey for a drugstore foundation (but worth it, I think) and the bottle. It's a little messy, but nothing major.
HG foundation? I think so :)
on 1/3/2011 2:42:00 PM
Age: 19-24
Skin: Acne-prone, Fair, Cool
Hair: Brown, Straight, Medium
Eyes: Blue
I have sensitive acne prone skin and am now on my second bottle of this foundation. As long as I make sure I regularly change/clean my foundation sponge it doesn't break me out. The only problem I have is the coverage isn't all that great, but you can build it up okay. I would definitely recommend this to someone with acne prone or sensitive skin who is looking for something cheap.
Popular Liquid Foundations


text:
Headline pretty much says all you need to know, but if you must have the names, the Nationals traded away catcher Brian Schneider, and outfielder Ryan Church. Have fun with these two guys, Mets! I love this move. Brian Schneider flirted with the Medonza line for an entire season, and I think we've seen all we're going to see out of Ryan Church. I wish them the best, but Lastings could be 30/30 in 2009. Church wasn't even that different that Milledge in 2007, and Milledge has that big word "potential" floating around him, whereas the word most associated with Ryan Church is "anti-semite." I guess there are some out there still bent out of shape about Milledge high-fiving his way down the first base line after hitting a home run, but I don't think there is any attitude problem that we need to concern ourselves with. It looked like a kid having some fun on a ballfield, which, the last time I checked, was a good thing. I bet he knows better now.
Jesus Flores will take over catching duties, and while he's not exactly a great hitter, he can't be worse than Schneider. I mean that. He can't be worse, or I'll come out of the stands and start catching myself, and I don't need the aggravation or the knee problems.
For your consideration, the numbers in the outfield:
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Thank you for the chance to win! Just started HS for my 2 children last month! Thrilled!
liked on Mothering and Oak Meadow on FB!
Did the evaluation!
I took this for my 6 year old daughter. She was pretty even through all the areas which really describes her and how many ways she can learn.
Like you both on FB
Very interesting assessment with valuable info!!
Already friends of both on FB, will be sharing also. Took the quiz for my 8 year old daughter who we just pulled from public school in October, would love to win this curriculum so we can get her on track with a good solid foundation!
Yeah!! LOVE Oak Meadow!!!
My son learning style in a combo but strongest in Linguistic!!!!
Good Luck!!!!
I took the evaluation for both of my older children. What an eye opener! We hope to begin homeschooling them soon. Also, I "like" Mothering and Oak Meadow on Facebook. Thank you for this great opportunity!
Took the test
I'm a fan of both on facebook
Entry two for "liking." :-)
Took the evaluation for both of my sons. Heading over to like and share on Facebook. Fingers crossed for new curriculum! We love new books :) Thanks.
It was a super "busy" site and it was hard to find the actual evaluation because I thought I was looking for a link with all that underlined text. Anywhoo...I found it! Right there at the bottom of the page!
An interesting tool and an important concept to keep in mind!
Laurie, wife to DH (Aug/04), mom toDS1 (Nov/05) and DS2 (June/12).
"Liked" on FB too. So this is my second entry.
Laurie, wife to DH (Aug/04), mom toDS1 (Nov/05) and DS2 (June/12).
Took the evaluation, got some very useful information!
I also have already liked both pages on facebook.
Took the evaluation...great information to help me assist my son in his learning process!!
Took the evaluation for 2 of my part time homeschooled kiddos! Very helpful!
Liked Oak Meadow and Mothering on FB! :-)
Very interesting evaluation! I'm already a fan of Mothering and I'll "like" OM, as well! Looks like a wonderful curriculum.
Took the survey. Would love to win! (Already a fan of both on FB.) :)
Took it! Thanks!
Thank you I took the evaluation and it is very interesting to learn about these things!
I am already a fan of Oak Meadow and Mothering on FB!!
Took the evaluation- what a great way to get to know your kids!
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How to develop the css framework for mobile base application?
as per our requirement i need to create two css file, one contain only framework and another contain theme.
so my question is that, How to develop class OR ID for the same?
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This year is the sesquicentennial of the founding of the town of Walla Walla, which was formally established and named 150 years ago this month.
After the close of the Indian wars in late 1858, President James Buchanan ratified the treaties with the Walla Walla, Cayuse and Umatilla Indians on March 8, 1859, ceding area lands to the U.S. and opening the Walla Walla region to white settlement.
When A.B. Roberts rode the Nez Perce Trail from the west into what is now Walla Walla in February 1859, what greeted him were eight or nine low buildings just before the trail crossed Mill Creek at what is now First Avenue and Main Street. On the east side of the creek was the old military Fort Walla Walla, near which the village sprang up.
Roberts' later sketch of his memory of those original buildings has been replicated on a bronze plaque to be installed in a sesquicentennial monument at the corner of Second Avenue and Main Street in a ceremony scheduled to take place at 11:30 a.m. Tuesday.
That is the date Walla Walla County commissioners approved a citizens' petition to plat the town, name it Walla Walla, give it a town government and designate it the seat of county government. The city of Walla Walla later received its charter from the territorial legislature in 1862.
Key local events in 1859 began with the appointment of Walla Walla County officials by the Washington Territorial Legislature on Jan. 19. On March 8, treaty ratification created the Umatilla Indian Reservation demanded by the tribes at the 1855 treaty council, and opened all remaining area lands to white settlement.
On March 15, 1859, Walla Walla County commissioners held their first meeting, followed by the first election to county offices in July.
On July 1, Lt. John Mullan and his crew departed Walla Walla on a heroic project to link the Columbia and Missouri rivers by constructing the northwest's first highway. The Mullan Road, completed in 1861, ran from the steamship port at the old Fort Walla Walla trading post at Wallula on the Columbia, through the new military garrison on the hill where the VA hospital is now, and on 624 miles to the steamship port at Fort Benton on the Missouri River.
Other events of 1859 include the establishment of a Catholic church in a small log building, the organization of the first Methodist Church, the establishment of the first Masonic Lodge and the granting of a charter to Whitman Seminary, which later became Whitman College.
To celebrate the founding of the town and related events, a sesquicentennial committee has been organized by the Historic Resources Coordinating Committee. Among planned events at the Nov. 17 is an actor portraying Dorsey Baker, founder of Baker Boyer Bank and one of the signers of the petition to plat the town, along with actors portraying other signers and Walla Walla pioneers of 1859-1862.
During the three years leading up to the 2012 sesquicentennial of the city's charter, members of the committee will contribute additional columns highlighting early events in the city's history. The committee is also encouraging others to organize sesquicentennial events.
If you would like to participate in the planning and coordination of events to honor Walla Walla's early history, contact committee chair Kirsten Schober at Kirkman House Museum.
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Home → Find Wheelchair & Mobility Scooter Owners Manuals → Locate A Wheelchair Or Mobility Scooter Owners Manual → Electric Mobility/Rascal owner's manuals.
Electric Mobility/Rascal offers a large line of mobility scooters. You will need to know the model name of your scooter. All manuals are in Adobe PDF. You will need Adobe Reader installed on your computer in order to view the manuals. Click here to get a free copy of Adobe Reader.
You can get a copy of an owner's manual by following these directions:
1- Go the following page- http://www.rascalscooters.com/index.cfm/mobility/service.manuals
2- Read down the list until you come to your scooter model.
3- Click on the product name to view or download the manual.
In the event that your scooter is not on the list you can obtain the company contact information at:


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Netflix: We're launching Down Under in March of 2015
Netflix will shake up the Australian video-on-demand market when it launches in March of 2015,
Netflix will shake up the Australian video-on-demand market when it launches in March of 2015,
Today belongs to Microsoft with the unveiling of Windows 10. The revised operating system supports big- and small-screened devices alike, including those that are a part of the Internet of Things. People relied on Twitter for breaking news as Microso...
It's official: The next version of Windows is dubbed Windows 10, bizarrely enough, and it's chock-full of tweaks and features designed to make PC enthusiasts smile, including multiple desktop support, a reborn Start menu, new multitasking options, wi...
Microsoft today announced that its new operating system will be called Windows 10, rather than Windows 9. It's a new generation of the Windows operating system that is being hailed by Microsoft as being adaptable to all sorts of devices, from tiny In...
At a press event on Tuesday, Microsoft launched the next version of Windows: Not Windows One, not Windows 9, but Windows 10, which combines the reborn Start menu with Windows 8's colorful live tiles and adjusts its behavior depending on how you're us...
Microsoft has inked a deal with Foxtel to bring its Play content service to the Xbox One -- months after Sony brought the service to its PS4.
It's something we've wanted for a while -- a single, unified place for all Windows notifications. If the latest leaked video of Windows 9 is any indication, it looks like we'll finally get our wish.
The Windows 9 leaks just keep on coming. This week, a barrage of screenshots and a video of the reborn Start menu were both revealed, and Friday, WinFuture posted a video showing off a newfangled virtual desktop feature currently being tested in Wind...
Our first glimpse of Windows 9 may be right around the corner, as the new rapid-fire Microsoft scrambles to put the stigma of Windows 8's disastrous launch in the rear view mirror.
Reports about the next major Windows release keep getting better and better. It looks like Microsoft has finally come to its senses and will dump the Charms bar in Windows 9 (also known as Threshold) slated for release next spring. Even better, Micro...
Education is the latest weapon in online piracy with the launch of a website sponsored by content distributors, creators and associations.
Payments software vendors, PayPal and Braintree, are giving Australian developers the chance to win a round trip to Silicon Valley to compete for $US100,000 against the world's best as part of the global Battle Hack competition.
Presto pledged support for Google's Chromecast when the dongle was launched at the end of May. Today the Foxtel subsidiary has kept its commitment by making it possible to stream Presto from select Android tablets, iPads and PCs to Chromecast equippe...
Microsoft has significantly increased the capacity of OneDrive Cloud storage included with its Office 365 subscriptions from 20 gigabytes (GB) to 1 terabyte (TB).
If you like the way iOS predicts what word you're trying to spell, you can now look forward to it filling in the words that follow.
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First impression on unpacking the Q702 test unit was the solid feel and clean, minimalist styling.
For work use, Microsoft Word and Excel programs pre-installed on the device are adequate for preparing short documents.
The Fujitsu LifeBook UH574 allowed for great mobility without being obnoxiously heavy or clunky. Its twelve hours of battery life did not disappoint.
The screen was particularly good. It is bright and visible from most angles, however heat is an issue, particularly around the Windows button on the front, and on the back where the battery housing is located.
My first impression after unboxing the Q702 is that it is a nice looking unit. Styling is somewhat minimalist but very effective. The tablet part, once detached, has a nice weight, and no buttons or switches are located in awkward or intrusive positions.


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Arnold Murray was the pastor and founder of Shepherd's Chapel, a Christian church in Gravette, Ark. Born in 1929, Murray founded the Shepherd's Chapel in 1985. He died on Feb. 12, 2014.
According to the Christian Apologetics and Research Ministry, Arnold Murray made several claims toward his identity during his lifetime, though most remain unconfirmed. He called himself a doctor though no proof of his doctorate was ever found. Murray also claimed he was a veteran from the Korean War.
In a 2008 study conducted by the Southern Poverty Law Center, which examined the church's Christian Identity movement roots, Murray was criticised for his practices and his teachings. Though he denied any "explicit advocacy" for racism and anti-Semitism, he referred to many Israeli Jews as "Kenites," or descendants from Cain (who Murray believed to be the son of Eve and Satan).
Many Christian groups have warned against Murray's teachings because he did not believe in most of the mainstream Christian beliefs, such as the Holy Trinity, the existence of Hell, and his suggestion that Eve had sexual relations with Satan.
Shepherd's Chapel is a Christian church and broadcast facility in Arkansas. The church is known for its hour-long bible study broadcasts, which were first televised in 1985. It is believed to be one of the largest independent Christian television networks in the world, and is broadcast over DirecTV and Dish Network. It also broadcasts 24 hours a day on their website.
I just heard he died this month on the 15th, of a heart attack.
Do not blindly follow after any man, compare what he has taught you to the word of God. If his teachings do not line up with God's holy word then he doesn't need to be teaching others
Pastor Arnold Murray is 84 years old.
1929. the year 1929.


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On Wednesdays, Knit Luck participates in Ginny's Yarn Along, where craft bloggers of all stripes share what they're making and reading. It's a great way to meet other bloggers and see some amazing projects in action. It's also a great way to get people to visit your blog. Hello Yarn Alongers! Happy to see you here again! Be sure to share your Yarn Along link in the comments and I'd love to visit!
This week, I'm trying very hard to finish the Wonderland Dyeworks socks as part of Team BBMF for Team Training of the Ravelympics, but it's not photographing very well, so I'm sharing the start of my Amari Shawl, which I'm knitting as part of a Knit Along with Project Stash (Hi Evelyn!). I'm loving this shawl. It's soooooo easy and I'm finally getting a chance to use a yarn I've had in my stash for YEARS: Blue Sky Alpacas Melange. Softest yarn next to cashmere.
I was supposed to finish the Diminishing Rib Cardigan, but the likelihood of that was limited anyhow. I'm pretty stoked that I'm almost finished with the body. I bet that I'll have it finished in the next couple of weeks. So here are the socks (maybe done by the end of the week?) and the book I'm reading: What to Expect THE TODDLER YEARS.
My two and a half year old is making me crazy and I have been losing my patience too much, so I've gone back to the most helpful book and it has had some amazing advice for those people who need help maintaining their sanity with their toddlers. It's an ongoing struggle and I have to learn to make being calm and patient my everyday goal. When things are going smoothly it's easy to forget that I can have a temper and that toddlers can push your buttons. So whenever I feel like I'm having problems coping, I need to go back to this book and read the "Building Self Esteem" section, the "Disciplining Your Toddler" section and "Keeping Your Cool" section. I'm also working on developing a schedule for my kids. I'm not usually a big fan of schedules. I prefer to work on a more whimsical and some would say impulsive level, but I don't think that works out very well for toddlers. So here's the schedule that I'm working on:
I'm Angela.
Mom. Wife. Crafter. Succulent Gardener. Co-op Preschool Parent. Housing Activist.
What's going on now?
Became a housing activist. Knitting at city council meetings is much more fun than I imagined.
What I'm knitting:
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Press Releases
Mental illness affects nearly all American families, and addressing this issue is vital to promoting the health of our communities. As part of the National Dialogue on Mental Health, Albuquerque, N....
Secretary of the State Denise Merrill today joined national partners from Everyday Democracy and the National Conference on Citizenship (NCoC) in releasing the first-of-its-kind index of Connecticu
On Jan. 24, 2011, Albuquerque residents taking part in the early childhood development initiative "Strong Starts for Children" will join with legislators and early childhood advocates from around the...
Everyday Democracy has selected five New Mexico groups to be part of "Strong Starts for Children," a new initiative to help communities find ways for people from all walks of life to work together
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Speak with a Hat Expert
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Lanikai Sun Hat
|Size InformationWill fit a size small up to a 7 1/4 comfortably. UPF 50+ Sun Protection The Scala Lanikai Sun Hat is perfect for sunny days! Made from 100% cotton canvas, this hat breathes and easily packs up into a bag or suitcase. Take it to the beach or on your next vacation and you won't be disappointed! Turn the kettle edge brim down when you want the most sun protection and up for a touch of style. Approx. 3" wide brim, 1" upcurlApprox. 3 1/2" high square crown Made of: 100% cotton Cotton poplin linedCotton sweatbandDrawstring inside sweatband for adjustable fit Size: One size fits most. Adjustable drawstring sweatband for comfortable fit. Fits up to size 7 1/4 comfortably. Please note that these hats should not be washed. Only spot cleaned. Once they have been washed or immersed in water, they will not retain their shape.
Lahaina Sun Hat
|UPF 50+Identical to the Scala Lanikai, but, with a small brim, the Lahaina is made from 100% cotton canvas, this hat breathes and easily packs up into a bag or suitcase.The kettle edge brim when turned down provides the ultimate sun protection.The square crown is completely lined in cotton poplin.A drawstring inside the sweatband allows you to adjust for a perfect fit.Approx. 4" crownApprox. 2 5/8" brim, 1" upcurlMade of: 100% cottonCotton drawstring sweatbandCotton poplin linedScala side pinSize: 1-size fits most. Fits up to size 7 1/4 comfortably.
Braid Boater - Petite Size
|Certified Organic Raffia. Do you have trouble finding a hat that fits you comfortably? The petite sized Boater is perfect for you! The Boater shape is classic, one of the most complimentary styles for all faces. Raffia palms thrive in Madagascar and east Africa, reaching heights of more than 45 feet. Their leaves are the longest in the plant kingdom, growing up to 75 inches. As the palm grows, branches produce seed and then drop from the tree for harvesting. The branch fiber, mature seeds and fronds have many uses, but it is the membrane of the underside of each frond that is carefully peeled off and dried to create the beautiful woven raffia hats that are all handmade. Raffia palms are hardy and prolific in their natural habitat, shedding their leaves naturally, they have been recognized as a renewable resource for products that have an especially low impact on the environment. 2 5/8" wide brim, 2 3/8 curl. Made of: Braided Organic Raffia. Black Herringbone Bow Hatband. Scala side pin. Elasticized sweatband. Color: Natural. Size: Small, fits up to size 6 7/8 comfortably.
Knit Roller
|Ladies, you can bask all day in the sun on your island paradise! The Scala Knit Roller is created with a knitted poly straw, perfect for breathability and keeping you cool while out in the warm summer shine. Built with an inner adjustable drawstring, the option to create your perfect fit is easy to accomplish. 4 1/8" crown. 3 3/4" pre-curved brim. Made of: 100% knitted poly straw. Cotton sweatband. Adjustable drawstring for comfortable fit. Size: 1-Size fits most(fits up to size 7 1/8 comfortably)
Sam Snead Coconut Snap Brim
|Featured on the Hallmark Channel's Home and Family Show.PLEASE NOTE: PLAID HAT BANDS ARE ASSORTED AND CANNOT BE SELECTED. Slammin' Sammy Snead won 81 times on the PGA TOUR including 7 majors from 1937-1965. Snead was regarded as having one of the sweetest swings in the game. He was always associated with his coconut straw hat with its telescope crown. 3 3/4" high telescope crown. 2 3/8" wide snap brim. Made of: 100% Coconut Straw. Padded cotton twill sweatband. Pleated madras plaid hat band. SCALA side pin. Unlined.
Turquoise Squares Raffia Straw Fedora Hat
|Designed with summer in mind, this lightweight raffia straw fedora is the perfect hat to throw on when you don't feel like doing your hair. Featuring two turquoise diamond shaped beads on the leather hatband along with a frayed brim, this hat screams summer! Approx. 1 3/4" frayed brim Approx. 4" c-crown Made of: 100% raffia straw Polyester blend sweatband Leather hatband with bead detailing Two turquoise beads Unlined for maximum breathability Size: One size fits most. Fits up to size 7 1/8 comfortably.
Toyo Braid Straw Fedora
|UPF 50+ Designed with sophistication in mind, Scala offers relaxed headwear that looks as good as it feels. The Toyo Braid Straw Fedora Hat is great for sunny days! Complete with UPF 50+ sun protection, this stylish black fedora is perfect for a summer getaway. It's packable and crushable, so you don't have to be extremely fragile with it while packing it away for your next adventure. Just show up in style with this straw fedora and you'll be sure to turn heads for all the right reasons. Approx. 3" brimApprox. 4 1/4" center dent crown Made of: 88% toyo straw12% plyester Grosgrain ribbon hatbandGrosgrain ribbon sweatbandScala side pinUnlined for maximum breathability Size: One size fits most. Fits up to size 7 1/8 comfortably.
Twisted Seagrass Gambler Hat with Leopard Scarf
|Perfect for the woman with fashion sense, who enjoys relaxing bayside or taking part in outdoor activities.Made of twisted seagrass, the open weave allows for maximum ventilation of this gambler hat.A fashionable and attractive leopard scarf wraps around the crown, ending in a bow.4" crown.3 1/4" brim.Made of: 100% twisted seagrass.Leopard scarf.Elasticized terrycloth sweatband.Unlined.Size: 1-size fits most. Fits up to size 7 1/8 comfortably.
C-Crown Panama Hat
|Bodies handwoven in Ecuador & finished in the USAThe Scala C-Crown Panama Hat is a great every day panama. It has a classic style and looks great on almost everyone. Approx. 4" CrownApprox. 2 1/2" Brim Made of: Genuine Panama Grosgrain ribbon hatband Sweatband UnlinedDupont Teflon fabric protectorThe Uncrushable InsertScala side pin
Derby Feather Fascinator
|The Derby Feather Fascinator is sheer elegance. This is a perfect piece for those that want to wear something fashionable with their dress. It's great because you don't have to feel like you are trying to squeeze on a hat to dress up. You simply have to put the headband on and away you go. The blue feathers are such a rich blue you won't be able to keep your eyes off of them. Approx. 14" width Made of: 100% Sinamay Unlined.Headband.Sinamay Bow.Feather Accents. Size: One Size fits most.
C-Crown Toyo Straw Fedora Hat
|Size Alert:Hat runs 1 size too large. We sugguest ordering 1 size below your regular hat size.Designed with sophistication in mind, Scala offers relaxed headwear that looks as good as it feels. The great design of the C-Crown Toyo Straw Fedora compliments every man, from every walk of life. In a handsome white straw along with a black grosgrain ribbon hatband, this lightweight fedora is perfect for the summer time! Approx. 4 1/2" c-crownApprox. 2 5/8" underwelt brim Made of: 100% toyo straw Cotton sweatbandGrosgrain ribbon hatbandScala side pinUnlined for maximum breathability
Solana Straw Fedora Hat
|Designed with sophistication in mind, Scala offers relaxed headwear that looks as good as it feels. The Solana Straw Fedora Hat is handmade with toyo straw. Featuring a multicolored striped hatband, the Solana is a great design that compliments every man. Approx. 4 1/4" center dent crownApprox. 2 1/4" brim Made of: 100% toyo straw. Multicolors grosgrain ribbon hatbandCotton sweatbandScala side pinUnlined for maximum breathability
Wool Campaign Hat w/ Adjustable Chin Strap
|Some call the Campaign Hat the 'Smokey the Bear' Hat or the Forest Ranger Hat, others the Drill Instructor Hat. You also see this style mentioned in literature as a 'Baden-Powell' hat. This distinctive hat historically is associated with the campaigns of WWI or the American Boy Scouts (Baden-Powell is the founder). Specifications: 5" high crown 3" wide brim 100% wool felt Features: Faux leather sweatband Grosgrain ribbon hatband Scala pin on side of hat Four eyelets for breathability Adjustable chin strap
Felt Safari Traveler Hat
|Introducing the Scala Felt Safari Traveler hat by Dorfman Pacfic. This is a great piece that is crushable as well as water repellent. It comes with a gorgeous leather hat band that makes this piece a little unique from the rest. 2 1/2" Brim. Made of:100% Wool Felt Leather Hat Band.Crushable.Water Repellent.
Safari Panama Hat
|Bodies handwoven in Ecuador & finished in the USAThe Scala Safari Panama is a lovely piece for those that enjoy a little bit shorter brim. This piece features the uncrushable insert that helps keep your panama from cracking over time and use. Approx. 4 1/2" CrownApprox. 2 1/2" Brim Made of: Genuine Panama Grosgrain ribbon hatband Sweatband UnlinedDupont Teflon fabric protectorThe Uncrushable InsertScala side pin
Lace Rain Hat
|Scala Lace Rain Hat will keep you dry when the weather takes a turn for the worse. It is designed with 100% polyester enabling the rain to bead and roll off. The Lace Rain Hat has a few frills in mind too. The lining is an intricate design of lace weaving into the polyester material. It also offers an asymmetrical brim that allows better visibility, as well as the option to roll it. Approx. 4 1/4" crown Approx. 2 1/2" front brim Approx. 5" back brim Made of: 100% Polyester Lace lining One size fits most, fits up to size 7 (Medium) comfortably.
Boiled Wool Cloche hat
|Scala Boiled Wool Cloche is reminiscent of Mary Poppins hat, with a flower hatband, could be worn year around. Keep warm in the colder months of the year with the Boiled Wool Cloche. Approx. 4 1/2" crown Approx. 1 3/4" brim Made of: 100% Wool Flower hatband Unlined
PB 5 Inch Brim Floppy Hat
|The PB Swinger from Scala is made from braided paper, a versatile and durable material. The wide brim provides excellent protection from the sun's harmful rays. The round crown has self trim. 4 1/2" crown. 5" brim. Tonal grosgrain ribbon sweatband. Size: 1-size fits most, fits up to a size 7 1/8 comfortably.
McBride Western
|The western style hat has been an American staple in.The McBride is a raffia western shapeable hat, constructed with a wire bound edge, providing you with the capability to create the style you choose to show off.A wax cord with multi-colored beads wraps around the open weave outback style, perfect for keeping you cool on a hot summer day.4 1/2" crown.3 3/4" brim. Made of: Raffia Straw.Elasticized terry cloth sweatband.Color: Tea.Size: 1-Size(fits up to size 7 1/8 comfortably)
Backbow Visor
|The Scala Backbow Visor is great for golf or any outdoor activity. The 4 1/4" wide visor is made from 100% cotton. The bow and tails add a feminine touch. Available size: Adjustable, velcro closure.
Crushable Outback with Earflaps
|A great travel hat with chin cord, this made product can be packed, folded and even crushed. Simply reshape it to its original form after packing and it will look good as new. Waterproofed by SCOTCHGUARD for protection. It has a three inch brim with earflaps which can be folded down if needed for extra warmth. Approx. 4 1/4" C-Crown Approx. 3" brim Material: 100% wool felt.
Fashion Felt Fedora Hat
|Introducing the Scala Fashion Felt Fedora hat by Dorfman Pacfic. This is a great crushable stingy brim hat that will dress up just about any outfit you have hanging in your closet.The striped grosgrain band adds a little extra flair. 4" Crown.1 1/2" Brim. Made of:100% Wool Felt Pinstripe Grosgrain Hat Band.Crushable.Water Repellent.Side Feather.Scala Side Pin.
Faux Leather Rain Hat
|Scala Faux Leather Rain Hat is a classier rain hat than your standard faire. It comes with a leather bound brim and hatband, as well as a leopard print lining. It can be tucked, rolled, and folded into any pocket and bag you want it to go. Approx. 3 3/4" crown Approx. 2 1/2" brim Made of: 100% Polyester Faux leather brimFaux leather hatbandGrosgrain sweatbandSatin lining Size: Fits comfortably up to size 7 1/8 (Medium)
Leather Bow Fedora Hat
|Scala Leather Bow Fedora is a trilby inspired fedora with femininity in mind. A tall crown and a faux leather hatband give this fedora an understated chicness. Approx. 4" crown Approx. 2" brim Made of: 100% Wool Faux Leather Satin drawstring sweatbandUnlined Size: 1-size fits most. Fits up to size 7 1/8 comfortably.
Band Raffia Visor
|Certified Organic Raffia.The Scala Band Raffia Visor is made with two durable materials, raffia straw and cotton. The braided raffia visor is 4" wide, so the sun won't interrupt your gardening or you game of golf. The cotton band has an velcro adjustable back. Available size: Adjustable.
Vinyl and Tweed Rain Hat
|Venture out into the rain with the Scala Vinyl and Tweed Rain Hat! Complete with a unique look and comfortable satin lining, this hat will get you through the wet winter months! Approx. 2 1/8" brimApprox. 3 1/2" crown Made of:50% polyurethane40% polyester10% wool Tweed underbrimSatin lined Size: One size fits all. Fits up to size 7 1/8 comfortably.
Snap Brim Panama Hat
|Bodies handwoven in Ecuador & finished in the USAThe Scala Snap Brim Panama Hat is a great stingy brim fedora for those that love their panamas but would like a smaller brim to not overwhelm them. It's a great spring/summer hat that you will be happy with for years to come. Approx. 4" CrownApprox. 2" Brim Made of: Genuine Panama Grosgrain ribbon hatband Sweatband UnlinedDupont Teflon fabric protectorThe Uncrushable InsertScala side pin
Lace and Flower Fascinator
|Scala Lace + Flower Fascinator has the aesthetic of a crown. It offers a plumage of feathers, flowers, and netting that leaves no extra out. The Lace+ Flower sits atop of a small base that is concealed by the beautiful décor above. Approx. 5" oval diameter Made of: 100% Sinamay Satin hatbandFeathersLarge Rose Satin Netting
Betty Fascinator Headband
|Betty is an attractive wool felt fascinator, trimmed with a self bow, and polka dot netting, sitting atop a tonal satin wrapper headband. 5 1/2" diameter.Made of: 100% wool felt - exclusive of trim.Grosgrain ribbon sweatband.Polka dot netting.Self bow.Satin headband.Size: 1-size fits most.
Bead Decor Cloche Hat
|The Bead Decor Cloche Hat is an adorable hat for ladies. If you're looking for a simple decorative style, look no further. This wool felt cloche features an elegant beaded design on the side of the hat and is perfect for both casual and special outings during the fall and winter months. Approx. 2" underwelt brimApprox. 4 1/2" round crown Made of: 100% wool Satin sweatband with adjustable drawstringBeaded side decorVelvet hatbandUnlined Size: One size fits most. Fits up to size 7 1/8 comfortably.
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This news-press.com file photo shows a poster of Terrance Williams shortly after he went missing in 2004. / news-press.com file photo
Reporting tips
Anyone with information about the disappearances of Terrance Williams and Felipe Santos is asked to call the Collier County Sheriffs Office at 252-9300, or Southwest Florida Crime Stoppers at 800-780-TIPS (8477).
Its been more than eight years since two men mysteriously disappeared in Collier County, but a new tip Wednesday prompted another search.
Law enforcement spent 6½ hours searching a mile of brush on Vanderbilt Drive just north of Wiggins Pass Road, said sheriffs office spokeswoman Karie Partington. They were hoping to find Terrance Williams and Felipe Santos, who vanished within three months of each other in 2004 after receiving a ride from the same Collier County deputy.
We searched this area initially in April of 2004, but in light of the new information, we wanted to search it again, Partington said.
The person who called in the tip saw a patrol car in the area during the time frame the two men went missing. That tip inspired a search using about 30 people and aviation units, K-9 units and a search and rescue dog brought in from Sarasota. Partington said she couldnt say if they found anything because it is an ongoing investigation.
Williams, of East Naples, was 27 when he was last seen on Jan. 12, 2004. His car broke down at the Naples Memorial Gardens cemetery less than five minutes from Wednesdays search site. Former Collier County sheriffs Cpl. Steven Henry Calkins picked up Williams and dropped him off at a Circle K on U.S. 41 and Wiggins Pass Road.
Santos, of Immokalee, was 23 when he was last seen Oct. 14, 2003, in North Naples, after he was in a traffic accident on his way to a construction job. Calkins responded to the crash and drove Santos to a Circle K on Immokalee Road.
Calkins was fired from the sheriffs office in October 2004, after a polygraph test indicated he lied when asked if he saw Williams again after dropping him off. Calkins, who never was charged in the cases, refused to appear before a federal grand jury in 2004.
Marcia Williams, Terrance Williams mother, said she doesnt think her son is still alive.
We talked every day, she said. If he were still alive I would hear from him or someone would call because he would make someone call his mother.
The last time she saw her son, Marcia Williams picked him up from work at a Pizza Hut in Bonita Springs and dropped him off at the house he shared with a roommate.
He got out of the car and said, Ill see you later, Mama, Marcia Williams said. That was it. I didnt see my child again.
Except now she sees him everywhere. Wednesday night, Williams said, she did a double-take when a man with a ponytail walked by, and she had to remind herself it couldnt be her son.
Further details about the tip that led to Wednesdays search have not been revealed. Partington said she didnt know why the tipster waited so long to come forward.
This case has been receiving a lot of media attention lately, which is great because that gets it out there in the public more and makes it more likely that well get the tip we need to solve it, Partington said.
The cases aired on the TV show Disappeared in January, on CNN a few weeks ago, and most recently, on an Anderson Cooper segment. Partington said she doesnt know why the cases found their way back into the spotlight after eight years.
Marcia Williams said she is thankful people still care enough to call in tips. She admitted it will be difficult to get the call if deputies find her sons body, but said the news will bring the closure she needs.
I do not want them to stop, she said. Do not hesitate. If they can remember something, they need to call in and not be afraid.


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New book explores history of Chicago's Polish community
Aug. 20, 2014
We get a recap of the Jackie Robinson West game against Pearland, TX, and we take a look at the deep Polish roots of Chicago's Avondale neighborhood. And, "Reclaimed Soul" host, Ayana Contreras, pays homage to the "Godfather of Soul."
What's next for the city's mental health services?
Aug. 19, 2014
We check in with Chicago's Department of Public Health Commissioner to learn more about the state of mental health care services. And, Waukegan wants to pay homage to a literary native. Plus, we get a taste of an original score to Buster Keaton's 1927 film, "The General."
Comedian Neal Brennan brings some personality to television
Aug. 18, 2014
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What's next for Mount Baldy's trail?
Aug. 15, 2014
We learn more about the holes happening at the Dunes, and take a closer look at the debate over fracking in Illinois. Plus, we have a conversation with an important, but not very well known, music figure in Chicago who's looking to give rebirth to the live music scene on Chicago's South Side.
Mormon feminists advocate for change
Aug. 14, 2014
We get the lowdown on Republican Day down at the Illinois State Fair. And, talk about a group of feminist fighting for their rights within the Mormon community. Plus, Sound Opinion hosts Greg Kot and Jim DeRogatis give us a preview of this year's Summer Music Film Festival.
Playing the political game at the State Fair
Aug. 13, 2014
We check in with our political reporters Tony Arnold and Alex Keefe for the latest from the Illinois State Fair. What issues are gaining traction for voters? And, we talk to a community activist about the effectiveness to taking to the streets to protest police behavior.
Adjusting to college can offer unique challenges for some students
Aug. 12, 2014
We look at the struggles in adjusting to college life when you come from a high school with very little diversity, or when you enter as an older student. And we talk to two improv vets who are bringing a new show to iO theater.
Even with law in effect, drivers still talking and texting on cellphones
Aug. 11, 2014
A study from IDOT showed that 1 in 5 drivers still probably violate the law that bans talking and texting while driving. We talk with the National Safety Council about staying safe on the roads. And, a new program that brings art of prisons.
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