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Why EBay Templates Improve Listing Pages for Sellers
- 23-May-12 |
Vangie Beal
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Templates can help eBay sellers stand out from the crowd. With more than 200 million listings running concurrently on the online marketplace at any time, it's important for sellers to present a unique and professional look that encourages potential buyers to buy.
Chris Taylor, vice president of marketing for Page Mage, Inc., says that templates can help an eBay seller look professional, and it will also save you time. Using an eBay template means you can "click once" and have all your important item and business details automatically included in each listing.
5 Ways to Use eBay Templates
Page Mage, which started as an eBay listing designer tool now offers a Billboards app that lets sellers create custom headers and footers to embed in listing pages. Ranked as one of the "Top 10 Most Popular Applications" in eBay's Apps Center, Billboards is based on the original Page Mage listing designer.
"The big thing we hear from sellers is that they want to look unique," Taylor said in describing the Page Mage listing designer that now runs the Billboards app. "With Billboards you can upload and use product images, your logo and any other graphics or information that is unique to your business."
Taylor said that many eBay sellers use templates to obtain a professional-looking listing page that's well-branded and that conveys a message trust to the potential buyer. It also makes updating some areas of your pages easier, because you add the information once and automatically apply the template to all your eBay listings.
Here are five ways you can use a listing designer tool – or an app like Billboards – to improve your eBay listing:
1. Use Templates for Branding
You can use a professional eBay listing template for branding and to help potential buyers feel connected to you. Include a business logo and a statement in a header; it adds credibility about you and your eBay business.
2. Communicate Special Offers
Include details on free shipping, discount shipping, holiday gift wrap services or any other promotional offer you have running in the template. When you change promotions, a custom header lets you update the details across all your listings.
3. Use Templates for Cross-Selling
You can cross-sell categories or specific products by adding links in the template. For example, if you sell clothing on eBay you can pull a picture of a summer item and remind potential buyers that now is the time to stock up on these seasonally-related products.
4. Communicate Business Policies
If you carry the same policy information across all your listing -- for example shipping policies regarding a second-item purchase, international shipping policies, guarantees or returns -- a footer is a great place to mention these. Because you can apply changes across all listings, it's much easier for a seller to provide this kind of information in a template instead of in the description area of the listing.
5. Display "About Me" Details
A template footer is a good place to display unique information about your business. You can include videos, images or a description of your business to help buyers feel more confident about buying from you.
Want to Sell on EBay?
Are you looking to start an eBay business or sell products online? Try these best tips and guides for small business ecommerce owners:
- Shopping Carts for EBay Sellers
- 21 EBay Inventory Management and Online Selling Tools
- Need an eBay Alternative? Try This List.
- From Small eBay Seller to Successful Entrepreneur
Based in Nova Scotia, Canada, Vangie Beal has spent the last decade contributing featured articles and reviews to more than 20 technology-focused publications, including Webopedia and Ecommerce-Guide. You can tweet with her online @AuroraGG.
|Do you have a comment or question about this article or other e-commerce topics in general? Speak out in the SmallBusinessComputing.com E-Commerce Forum. Join the discussion today!
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Monday, February 22, 2010
© Copyright 2015 Clayton News Daily
By Curt Yeomans
Clayton County Board of Education members, already grappling with $85.2 million in proposed budget cuts, got a request from Clayton County Public Schools Superintendent Edmond Heatley on Monday to purchase new technology at an estimated cost of $1 million.
The technology, called the Enterprise Portal Development project, is designed to reduce the amount of paper used by school system employees to communicate student achievement to parents, according to a video that was the centerpiece of the proposal given to school board members.
The video described the technology as a convenient, online method for a parent to check his or her child's Criterion-Referenced Competency Test (CRCT) scores, class grades, and homework assignments.
"If we're going to talk about preparing our students for the future, this is the future, so I would love for the board to consider this," Heatley told board members. "We have to consider what are we doing to become what we want to be, from where we are now."
School System Director of Information Systems Tony Rogers said the project would be implemented in three phases. The school board will vote on March 1 whether to approve paying $353,170 for Phase I of the project, which would involve setting up the hard-and-general access systems, and the uploading of forms that parents are often asked to sign for their children.
"That would be done this summer," said Rogers, after the board's work session on Monday. He said
Phase II, which would involve the uploading of additional forms, and security measures, would begin "12 to 18 months after Phase I begins." Phase III, which would involve the resolution of any problems in the system, would begin a year after Phase II begins, he said.
"The parents would be brought in during Phase III," Rogers said. "We want to make sure everything is rock-solid before we bring them in."
School district purchasing records list "Unbound Solutions" as the company that would receive the contract for the project, but no company with that name could be found on the Internet.
The estimated $1 million price tag for the project would be spent over three to four years, according to Rogers. "When you look at it, $1 million is $1 million, but when you look at the savings we'll have over a 5-year period, $1 million doesn't look that significant," he said.
But, the school system does not know how much of a savings it will see by implementing this project, Rogers said, because the district does not know what it is currently spending on printing costs.
"The exact price can't be tallied," Rogers said. "We don't necessarily keep up with how much we're spending on printing, and toner cartridges."
That may pose a problem for school board members, who did not seem enamored with the presentation. School Board Member Mary Baker asked for a cost comparison to see how much money the district is spending to print documents and forms, versus how much it would cost to implement the new system.
"It might even be a wash," she said.
Board Member Charlton Bivins suggested that school officials go to other districts that use the technology to see how successful it has been for them. Member Jessie Goree said she had a problem with spending money on new technology, while cutting back spending on personnel.
Goree also pointed out some past efforts by the school system to go to a paperless document system, including the eBoard system, purchased in late 2008, that has not been fully implemented.
"I would hate for us to purchase this, and then we don't utilize this," Goree said. "If we're going to lay down $1 million, then, we need to make sure everybody is doing their part. We don't need to purchase this just because it's the latest technology."
As Heatley and Rogers pitched the project, a dozen school bus drivers sat in the back of the board room, quietly listening to the proposal. The drivers are part of the group of part-time employees who may lose benefits, such as health insurance, under the school system's proposed budget cuts.
The proposal to spend $1 million on new technology, while planning to cut the part-time employees' benefits was an unpleasant surprise for the bus drivers, said James Ojeda, a 12-year driver for Clayton Public Schools.
Ojeda said many bus drivers work as many as three jobs, and chose to work for the school system to get their full-time benefits, he said. He added that many would likely quit without the benefits.
"We came here expecting them to talk about the budget cuts, but they didn't do that, and then we hear they want to spend extra money on new technology," Ojeda said. "That just doesn't sit well with some people."
More like this story
- Clayton Schools may pull technology proposal ( February 26, 2010 )
- School employees, parents criticize budget cuts ( March 1, 2010 )
- School employees, parents criticize budget cuts ( March 2, 2010 )
- Heatley: Schools deficit may top $119 million ( March 22, 2010 )
- Adamson unsure about longer school day ( March 3, 2011 )

subset: commoncrawl


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Wanted by Collector: LP & 7" Vinyl Record Collections
I have been a collector of vinyl for nearly 30 years and I am always on the look out for more collections to buy to trade with other collectors. I will pay good prices for your whole collection. Looking for most music styles except Country, Easy,


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Karen Walker's bright, appealing buttons make a fun, stylish addition to your accessories. Ranging from classic round buttons to quirky ladybirds, toadstools and Russian dolls, you are sure to find something to bring a little fun to your hat, scarf, or handbag. Try them out as charms or attach them to greetings cards or scrapbook pages.
Bookwire is a mobile app for your iPhone that gives you the ability to scan a barcode
or enter ISBN, access book records and add titles to wish lists.


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How Soon is Too Soon To Take a Child to the Movies?
I'm a daddy. I love taking my daughter out to explore new things. So far we've pretty much tackled everything her little body can keep up with. From gymnastics to the art museum. Bouncy castles to outdoor parks and hikes. Now I want her to enjoy a movie theater experience!


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Myanmar's Suu Kyi appeals conviction
YANGON, Myanmar Lawyers for detained opposition leader Aung San Suu Kyi said they have a solid legal argument for their appeal Friday against her recent conviction that extended her house arrest and drew global outrage.
Suu Kyi and reporters were barred from attending the appeal at the Yangon Divisional Court, which was expected to last one day, with a verdict delivered at a later date.
Separately, the junta hastily granted amnesty to thousands of other prisoners expected to be freed Friday. A mass release had been anticipated for months but the timing appeared to be partially aimed at distracting attention from Suu Kyi's hearing.
The 64-year-old Nobel Peace Prize winner was convicted on Aug. 11 for breaking the terms of her house arrest when an American intruder stayed at her home. A three-year sentence was commuted to 18 months of house arrest by the junta chief, Senior Gen. Than Shwe. Two of Suu Kyi's live-in companions received the same sentence.
"We are optimistic that Daw Suu and her two companions will be released because we based our appeal on sound legal points," lawyer Nyan Win said before the hearing started. "Daw" is a term of respect in Myanmar.
Lawyers say the main point of Suu Kyi's appeal is that the law authorities used against her is invalid because it applies to a constitution abolished two decades ago.
Suu Kyi has been detained for 14 of the past 20 years, mostly under house arrest.
Her three-month trial and subsequent conviction sparked global outrage and revived long-standing calls for the release of the country's estimated 2,200 political prisoners, of which Suu Kyi is the most famous.
Late Thursday, the junta announced on state television that 7,114 convicts at prisons across the country would be released for good behavior and on humanitarian grounds. It was not immediately known if they included political detainees.
The junta generally grants amnesties to mark important national days and to deflect criticism ahead of high-profile international gatherings.
Friday is the 21st anniversary of the 1988 seizure of power by the current junta to quash vast pro-democracy demonstrations.
The amnesty also comes just ahead of the opening of this year's U.N. General Assembly session, which will be attended by Prime Minister Gen. Thein Sein, the highest-ranking government leader in more than a decade to participate.
Previous mass releases have involved mostly petty criminals with a handful of political detainees.
The United Nations and independent human rights groups estimate that the military regime holds more than 2,200 political prisoners, though the government insists that all detainees have been convicted of criminal offenses.
An amnesty had been expected since July, when Myanmar's envoy to the United Nations told the Security Council that the government was preparing such a move to allow prisoners to participate in elections next year, the first in two decades.
Suu Kyi's sentence ensures she cannot participate in the elections. Her party swept the last elections in 1990 but the results were never honored by the military, which has ruled the country since 1962.


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Part of the Solution: Climate Change, Agriculture and Land Management
Taking advantage of a handful of different techniques to reduce greenhouse gas emissions, increase energy efficiency, and harness renewable energy can make British agriculture a near-carbon-neutral industry, according to this report from the National Farming Union.
Agriculture currently represents about 7 percent of the U.K.'s carbon emissions, which is notably lower than the 10-12 percent of global emissions due to farming. But in addition to reducing the industry's emissions, the strategy advocated in the groups' report will also increase the number of renewable energy-producing sites on farmlands in the country.
In recent years, emissions from agriculture have slightly decreased in Britain, according to the report's authors. The decline is due largely to a reduction in number of livestock and less nitrogen-based fertilizers in use in the country. But if the industry adopts a few ecologically beneficial practices, it can more significantly decrease its emissions.
Among the recommendations are more focused land-management practices, including yield-increasing measures, minimal-till or no-till farming practices, and more organic manure and straw composting, all of which can increase the amount of carbon sequestered in the soil. Other sustainable farming practices are included in the recommendations, including returning marginally productive lands back to wetlands, peatlands and native vegetation.


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Myanmar's War on the Press
Elections scheduled for November won't be credible if journalists aren't free to do their jobs and inform the public.
July 2, 2015, Thursday
Puerto Rico Needs Debt Relief
Congress must act to help the island restructure its debt, as well as demanding regulatory reforms.
July 2, 2015, Thursday
Time for TV in the Supreme Court
The current justices have offered groundless objections to the televising of sessions.
July 2, 2015, Thursday
Mayor Bill de Blasio Unloads on Governor Andrew Cuomo
The mayor's surprise attack may not help him in his battles with Albany, but everything he said is true.
July 2, 2015, Thursday
End Ethnic Profiling in France
President Hollande must do far more to halt discriminatory stops by the police.
July 1, 2015, Wednesday
Gov. Chris Christie's Phony Truth-Telling
There are lines between brash and belligerent, open and obnoxious, and, most important, between "telling it like it is" and fabricating a record.
July 1, 2015, Wednesday
A Needed Update for Overtime Pay
A Labor Department plan would give millions of American workers a toehold in the middle class by raising the limit to qualify for overtime pay.
July 1, 2015, Wednesday
Give Police Commissioner Bratton's Reforms a Chance
Some of the proposed City Council bills, designed to increase oversight of the New York Police Department and rein in abuses, go too far.
July 1, 2015, Wednesday
Greece's Future, and the Euro's
The way to pull Greece back from the abyss is to start forgiving loans that the weakened country cannot possibly pay.
June 30, 2015, Tuesday
A Divided Court on Three Big Rulings
Dissents in a death penalty case included reasons to end all executions. The justices were also split in redistricting and environmental decisions.
June 30, 2015, Tuesday
Cuba: A New Start
On Dec. 18, the Obama administration announced that it would establish diplomatic ties with Cuba. Take a look back at the Editorial Board's series calling for improved United States-Cuba relations.
The New York Times Calls for Marijuana Legalization
The federal government should follow the growing movement in the states and repeal the ban on marijuana for both medical and recreational use.
Can You Live on the Minimum Wage?
More than 4.8 million workers now earn the lowest legal pay. This calculator shows the hard choices that have to be made living on the smallest paychecks.
A Five-Decade Defense of Food Aid
Since the beginning of the modern food stamp program, The Times editorial board has frequently stood up for the nation's food aid initiatives.
New York Times Endorsements Through the Ages
A collection of The Times's endorsements for the presidency, from Abraham Lincoln in 1860 through the editorial board's choice of Senator Barack Obama.
Talk to The Times: Editorial Page Editor Andrew Rosenthal
Andrew Rosenthal, the editorial page editor, answered readers' questions April 13-17, 2009.
Rss Feeds On Editorials
Subscribe to an RSS feed on this topic. What is RSS?


text:
Darren really wanted to capture the moss, and the geothermal quality of it.
In the meantime, moss would also accompany his mother to work at her graphic design agency.
"I used to remember drawing Sonic the Hedgehog when I was super young," says moss.
Old English meos "moss," related to mos "bog," from Proto-Germanic *musan (cf. Old High German mios, Danish mos, German Moos), also in part from Old Norse mosi "moss, bog," and Medieval Latin mossa "moss," from the same Germanic source, from PIE *meus- "damp," with derivatives referring to swamps and swamp vegetation (cf. Latin muscus "moss," Lithuanian musai "mold, mildew," Old Church Slavonic muchu "moss").
Selden Moseþ þe Marbelston þat men ofte treden. ["Piers Plowman," 1362]All the Germanic languages have the word in both senses, which is natural because moss is the characteristic plant of boggy places. It is impossible to say which sense is original. Scott (1805) revived 17c. moss-trooper "freebooter infesting Scottish border marshes."
Hair; among black people, straightened or processed hair: Moss is hair (1940s+ Black)
Related Terms


text:
- Pump Up Your Home Network
- Safe at Home
- Own the Airwaves
- Control Your Home Remotely
It's been a decade or more since most people walked over to the TV and changed channels by hand (except when the remote goes missing). Imagine controlling your whole housefrom the lights to the temperature to the garage-door openerjust as easily. With new advances in home automation (HA) technology, this is becoming a real-life scenario, and not just the opening scene of The Jetsons.next: Automation Basics >


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Phillys Big Trip (Alaska to Chile or is that Argentina)
View Single Post
Gnarly Adventurer
Joined: Jun 2012
Location: Netherlands
Oddometer: 263
Rolla to Indianapolis, Friday, 17 August 2012, Day 74
The Brickyard[/caption]
Rained a lot that evening which was nice as I have been travelling in some seriously hot weather in the high 90s Fahrenheit* *mid 30s Centigrade the last week and above the 100s Fahrenheit so that is 40 plus Centigrade so when I got up this morning and it was a balmy 72f or 22c it was a pleasant relief. I had done a lot of miles yesterday however a lot of them in the wrong direction so still had a lot of miles to do today and to add to that also wanted to stay off the freeway and follow route 66 as much as possible so going to be a long day again in the saddle. I said goodbye to Route 66 at St Louis which also looked like an interesting place to stay however I had a date with Valentino, Lorenzo, Casey and Danny and the rest of the MotoGP mob so pushed on to Indy.
Illinois Toll Bridge[/caption]
was not walking paid 1 cent![/caption]
Got there about 8.30 had lost an hour going into Indiana or was it Illinois I do not know anymore found the campsite which was right next to the track and set up camp. It has been more than month since I have been under canvas so hopefully all the mossies that I packed last time I camped are all dead if not they are going to be very angry
View Public Profile
Find More Posts by dean10


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A coalition of Jewish groups is providing more than $100,000 in aid to Syrian refugees in Jordan.
The Jewish Coalition for Disaster Relief, which is made up of 14 organizations and coordinated by the American Jewish Joint Distribution Committee, convened Thursday in New York to allocate the money to several groups providing aid to Syrian refugees in refugee camps in Jordan, a JDC spokesman told JTA.
The money is going to the Jordanian Red Crescent, which is the kingdom's version of the Red Cross; Israel Flying Aid, for food distribution; World Jewish Relief, which is working with the Save the Children program in one of the refugee camps; and the Hebrew Immigrant Aid Society (HIAS), for resettlement work.
Approximately 1 million refugees from Syria's two-year-old civil war have fled in roughly equal numbers to Jordan, Turkey and Lebanon.
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10741 Falls Rd
Lutherville-Timonium, MD 21093
Hours of Operation
Monday-Friday: 8am-9pm
Saturday: 9am-8pm
Sunday: closed
From our outstanding selection of Fine Wines, Microbrews, and Spirits to our Gift Baskets, Sandwiches, Deli Platters, and Prepared Foods, The Wine Merchant has you covered.
Featured Wine
A note from the Badger
Dale's Pale Ale: This voluminously hopped mutha delivers a hoppy nose and assertive-but-balanced flavors of pale malts and citrusy floral hops from start to finish. Oskar Blues launched its canning ops in 2002, brewing and hand-canning Dale's Pale Ale in the Lyons, Colorado, brewpub. America's first-craft-canned mountain Pale is a hearty, critically acclaimed trailblazer that changed the way craft beer fiends perceive portable beer (6.5 percent ABV and 65 IBUs).
Dale's Pale Ale


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Naruto shippuden. [DVD set 12]
Format: DVD, Videorecording, Projected Medium, Visual Materials
Summary: Four ninjas with kekkei genkai who have been guarding the Hidden Villages of Cloud Stone Mist and Sand disappear from their respective villages. The Land of Fire comes under suspicion as it is the only country to have suffered no loss. Mounting suspicion among the four countries almost brings about a 4th Great Ninja War. In the Hidden Village of Leaf Tsunade orders her men to keep strict guard against War and to try to find out what really happened.
Current Holds: 1
System Availability: 0 (of 2)
Call Number: DVD NAR4179
Add to my list


text:
An enhanced computer system architecture provides a processor supported by a general cache and a mini-cache wherein the mini-cache will supply requested data words not available in the general cache thus eliminating the extra clock periods necessary to access main memory. The mini-cache stores frequently used data words and is refilled concurrently during processor command execution and is settable for handling data words or code words or both. A data queue storage stores a block of words which duplicate words in main memory. If the requested address matches an address register block in the mini-cache, the data queue store will make the words in the data queue available to requests from the processor. The mini-cache also monitors the system bus for any "write" operations which might change the validity of the data in the address register block of the mini-cache. In this case, the data stored in the mini-cache is invalidated and cannot be used by the processor. Additionally, the mini-cache can be added to or removed from system operations.
1. A computer system having a processor means connected to a bus interface unit holding a mini-cache means wherein said bus interface unit connects to a system bus means providing dual redundant busses to a main memory means, and said processor throughput is enhanced by a mini-cache means, said system comprising:
(a) a system bus means connecting a central processing module to said main memory means said system bus means including dual redundant busses;
(b) said main memory means holding addressable locations for storing data words and instruction code words for said processor means;
(c) a central processor means including:
(c1) said processor means for requesting single memory words using a single memory word address and for executing single word code instructions using a single memory word code address;
(c2) said mini-cache means for holding a block of multiple data words or block of multiple instruction code words and including:
(i) steering block means for routing the addresses of a block of four words, to an internal address register means and for transferring said block of four words to a data queue means for storage during such time when said processor is executing processing instructions;
(ii) said data queue means for storing said block of four words from main memory, said words including data words and instruction code words;
(iii) said internal address register means for holding the said main memory address of each of said block of four words;
(iv) means to compare a single word requested address from said processor with the addresses stored in said internal address register means and to generate a hit signal if a match occurs, for enabling a word transfer to said processor;
(d) means for loading said mini-cache means with multiple data words or multiple instruction code words within one single memory-read request cycle by said processor means during any period that said processor means is executing normal operation cycles;
(e) said bus interface unit connecting to said main memory via said system bus means including:
(e1) means for transferring a four-word block of data words or instruction code words to said steering block means;
(f) internal maintenance means for receiving control signals to configure the storage capability of said general cache memory and said auxiliary cache module so as to enable said auxiliary cache module to expand the storage capacity of said general cache memory or to disable said auxiliary cache module from expanding the storage capacity of said general cache memory, and including:
(f1) means to enable said data queue means to respond only to Read data word commands only;
(f2) means to enable said data queue means to respond only to Read instruction code word commands.
2. The system of claim 1 which includes:
(a) one or more system resource modules connected to said system bus means, said system resource modules having capability of writing into said main memory means.
3. The system of claim 2 wherein said system resource modules include:
(a) I/O controller means and/or auxiliary processor means contending for access to said system bus means.
4. The system of claim 1 wherein said processor means operates in multiple time periods for execution of instruction code words and wherein said mini-cache means is loaded with a said block of multiple data and/or instruction code words during the said any periods when said processor is executing instruction code words subsequent to having completed a single memory access read cycle.
5. The system of claim 1 wherein said mini-cache means includes:
(a) monitoring means for sensing when said system bus means is carrying a Write command for a main memory address which matches the address held in said address register means;
(b) means to generate and to store an invalid signal in said data queue means for a word whose address matches the address of said Write command.
6. A computer system providing enhanced memory access comprising:
(a) processor means for executing instruction code words and processing information data words residing in a main memory means, and including:
(a1) sequential request means for accessing single words of said data or code words from a cache memory means and including:
(a1a) first sequence request means to address a general cache memory for requested code or data words;
(a1b) second sequence request means to address an auxiliary mini-cache memory if said first sequence request results in a "miss";
(a1c) third sequence request means to access a system bus means for transmission of said request to a main memory means if said second sequence request is a "miss";
(b) said main memory means storing said instruction code words and said information data words at addressable locations residing therein;
(c) said cache memory means including:
(c1) said general cache memory for storing frequently used code and data words;
(c2) said mini-cache memory for storing frequently used code and data words which have generally a lower usage than words stored in said general cache memory said mini-cache memory including:
(i) data queue means for storing a block of multiple words which duplicate words in said main memory and including:
(ia) data register means providing a data register for each one of said multiple words stored;
(ii) address register means for listing the address of said block of words in said data queue means;
(iii) comparison means for comparing said processor's request address with said address in said address register means to detect a match (hit) or a miss;
(iv) steering means for selecting the said data register word, corresponding to the request address which resulted in a hit, for transmission to said processor means;
(d) system bus means providing two parallel redundant busses for connecting said processor and main memory means via a bus interface Application Specific Integrated Circuit (ASIC);
(e) said bus interface ASIC enabling multiple word transfers from said main memory means to said mini-cache memory without inhibiting processor operations, and providing circuitry for said mini-cache memory with available surplus circuitry located within said ASIC.
7. The system of claim 6 wherein said computer system includes:
(a) maintenance logic means settable for:
(i) taking said mini-cache off-line, or
(ii) enabling said mini-cache to accept commands for reading only code words or only data words;
(iii) disabling said mini-cache from accepting commands for reading code words or reading data words.
8. The system of claim 7 wherein said mini-cache memory further includes:
(a) monitor means for sensing whether said system bus means is carrying a Write command for a main memory address which matches an address held in said address register means;
(b) means to generate and to store an invalid signal in said data queue means for a word having the same main memory address as that on said system bus.
9. The system of claim 8 wherein said computer system further includes:
(a) maintenance logic means for selecting whether said mini-cache memory is to store instruction code words or information data words or a combination of both.
10. The system of claim 9 wherein said maintenance logic means includes:
(a) means to enable said mini-cache memory to go on-line with said general cache memory and processor means;
(b) means to disable and take off-line said mini-cache memory.
This is a continuation of co-pending application Ser. No. 08/081,048 filed on Jun. 22, 1993.
This disclosure relates to systems for decreasing the average access time for memory access by a processor with the use of cache memory units.
This application is generally related to the type of computer systems described in a co-pending application U.S. Ser. No. 08/019,003 entitled "Synchronous Dual Bus System for Store-through and Non-store-through Cache Memories in Multiple Processor Networks". It is also related to a co-pending application U.S. Ser. No. 08/080,861 entitled "Mini-Cache Operational Module". This application is also related to U.S. Pat. No. 5,404,462 entitled "Dual Bus Interface Transfer System for Central Processing Module" which describes an interface between a processor and dual system busses, such as the interface used in this disclosure.
As seen in FIG. 5 there is shown the basic diagram of a central processing module 5 having a processor 10 which interfaces with a system memory module 40 by means of a dual system bus 22 having system busses 22a and 22b. Other system modules 30 may share the system bus and these may include not only additional central processing modules, but also input/output processors and a maintenance subsystem. Additionally there can be a second identical system bus 22b which is used to increase the system bandpass as shown in the dotted bus lines of FIG. 5. This type of system is typical to that of the Unisys A-11 computer system described in the aforementioned U.S. Ser. No. 08/019,003 entitled "Dual Bus System Operations Network".
Each of the features to be described herein would apply equally to a single bus system or a dual bus system. In a dual bus system, the accessing modules described herein would be able to access either bus as that bus is available. However, for simplicity of discussion, the following disclosure will view the situation of a single bus situation.
Typical of the Unisys A-11 system is a "E-Mode" designated protocol which transfers data on the basis of blocks of four related data words. For example, each word may be a word of 60-bits wherein 52 bits are information data, 7-bits are parity data and 1-bit indicates data corruption.
In a typical situation with a mix of typical system operating software, the processor 10 of FIG. 5 may, on the average, function to require memory accesses about every five clock times of processor operations, that is to say, the processor will execute processing operations for five clocks, then access memory, then process operations for five clocks and then access memory on an average basis. During the "memory access" times, the processor 10 must, of course, wait until the memory function in the main system memory 40 has provided the next data word or the next instruction code word before the processor can proceed with continuing its processing operations.
One recurring problem in digital system design is how to speed up throughput and reduce delaying processor access to memory data and instructions. FIG. 6 is a drawing which indicates the "processor/access cycle" time which is designated as Tap. This time period Tap is made up of the processing time, tp, plus the access time, ta.
The performance of the system, of course, is dependent on the best speed of access to memory data and thus is an "inverse function" of the processor/access time, Tap. Thus if this time period, or either of its sub-elements tp, or ta can be reduced, then the system performance can be increased accordingly.
The presently described mini-cache throughput enhancement system deals with methods and architecture for reducing the average memory access time, ta. It may be noted that the access time may involve several elements which include:
(i) the time for bus arbitration and access grant required;
(ii) the system bus protocols used; and,
(iii) the memory module 40 Read cycle time.
The memory module Read-cycle time, item (iii), is the most significant element and is the focus of the presently described system.
One technique to reduce the memory cycle time is the standard technique of using a general cache memory module 14 as seen in FIG. 4. Thus, as seen in FIG. 4, there is provided the insertion of a general cache memory module 14 between the central processing module with its processor 10 and the system bus 22 which provides a channel to and from the main memory 40.
A cache memory module such as the general cache of 14 of FIG. 4 is made up of a very high speed fast memory cycle, fast data access cycle of operation but it also involves very expensive types of storage units such as RAMs.
The size of the cache units such as cache memory 14 is generally much smaller in addressability than the main system memory 40. However, since processing most often is sequential or repetitive in nature, the algorithms for cache designs have already been derived for filling the cache memory with data words that the processor 10 is most "likely" to need on its next operation or within the next few operations.
The "access time" between the processor 10 and the cache memory 14 is much faster than that which would be required to access main memory. Often, cache cycles are as quick as a single clock time period.
By using the appropriate cache hardware design algorithms, appropriate cache structure and cache size, the average "cache hit" rates may be as high as 80% to 90%, that is to say, that 80% to 90% of the time, the cache memory 14 already contains the data word which is needed by the processor 10.
FIG. 4 shows a generalized system where a central processing module 5 having a processor 10 communicates through an internal bus 12 to a general cache memory 14 which provides communication on a system bus 22 to the main system memory 40. This is a typically used system in order to enhance the data access time for the processor which will enhance throughput of the system.
FIG. 5 shows a generalized system diagram where a central processing module 5 having a processor 10 can communicate over a system bus 22 to the main system memory 40. Additionally, other system modules such as input/output modules, other central processing modules, and other digital units designated by the block 30 may also communicate over the system bus to access main memory. Thus at times, there will be contention for main memory between the processor 10 and the other system modules 30. Further, if one of the other system modules 30 is writing data on the system bus into main memory, then it is possible that the data in a cache memory unit could be invalid and not usable by the processor 10 in certain situations. Thus the presently described mini-cache, FIGS. 1 and 2, has an invalidation block unit 28 which prevents the processor from accessing data in the mini-cache 14i when it is discovered that the system bus is writing new data into the main system memory 40. This will later be described in connection with the mini-cache of FIG. 2.
While better system performance value is seen from the addition of a cache memory module such as cache memory 14, it should be indicated that this gain comes at a considerable system cost in money and hardware and PC board real estate. Thus it is possible also to eliminate the general cache and substitute a less costly mini-cache in certain instances.
The presently described system and architecture provides a considerable improvement in access time and throughput by use of the described mini cache alone or the mini cache in combination with a general cache memory unit.
A computer system using a general cache memory is enhanced by the use of an auxiliary mini-cache available to a processor. A mini-cache unit is added to a computer system structure to interface between the processor and main memory or to interface between a general cache memory and the system main memory.
The mini-cache provides a data queue block which holds frequently used (or the most likely used) data words required by the processor. An address register block holds the address values of each of the data words in the data queue block. A hit control block compares the processor's data address requests with those in the mini-cache and if a "hit" occurs, will cause a Queue Steering Block to select the appropriate data in a data register and transfer it immediately to the processor 10. An invalidation block module monitors the system bus for memory type operations that may be in progress and if an address value held in the mini-cache address register is the same as the address value on the system bus, then the invalidation block will mark the mini-cache address value as invalid since possibly new Write data may be in progress to change the validity of the data in the data queue block which was derived from the main memory module which is now undergoing change.
Absent the invalidation situation, the hit control block will prevent execution of any system bus request to main memory in order that the data residing in the mini-cache can be immediately provided to the processor. Additionally, the mini-cache provides a maintenance block which is used to configure modes of operation for the mini-cache in order to differentiate between information data and instruction code data or whether the mini-cache is to be enabled or disabled.
FIG. 1 is a generalized block diagram of a computer system with its processor having a general cache and an auxiliary mini-cache;
FIG. 2 is a block diagram of the auxiliary mini-cache;
FIG. 2A is a diagram showing the use of the mini-cache with a general cache memory in the system;
FIG. 2B is a drawing showing the exclusive use of a mini-cache in a computer system without the general cache memory;
FIG. 3A is a drawing illustrating how a main memory cycle and a four word block is received from main memory; FIG. 3B illustrates the stacking of the four word block in the Data queue of the mini-cache module;
FIG. 4 is a drawing showing a commonly used architecture for a system with processor cache memory and main system memory;
FIG. 5 is a generalized version of a computer system which may use a single bus for data transfer channels or may have a second system bus to provide for dual system bus operation;
FIG. 6 is a drawing showing the timing factors involved for a processor to access main memory data;
FIG. 7 is a flow chart illustrating the use of a mini-cache module in system operations.
FIG. 1 shows a diagram of the enhanced computer system where a central processing module 5 holds a processor 10 having a general cache memory 14. Communicating with the general cache 14 is an auxiliary mini-cache 14i which supports the general cache and which operates through a bus interface circuit 8 to a system bus means 22. The system bus means may operate as a single bus channel or as dual busses 22a, 22b. Attached to the system bus means 22 is the main system memory 40 and a resource module block 30 which represents other modules on the system bus, such as peripheral controllers, other processors, I/O subsystem or other digital modules.
FIG. 2 shows a block diagram of the functional elements of the presently described mini-cache system architecture. The mini-cache 14i shown in FIG. 2 is seen to have an input from the system bus 22 which can be connected to main memory and/or other units such as I/O subsystem 30. Additionally, the output from the mini-cache is seen to be presented to the processor 10 through the general cache 14.
The mini-cache 14i operates in a system which provides a number of modules developing different functions. FIG. 2 shows the various functional blocks as the queue steering block 24, the Data Queue block 26q, the address register block 26a, the hit control block 27, the invalidation block 28, and the maintenance block 29.
The queue steering block 24 receives data blocks from memory 40 via bus interface 8 from the system bus 22. Steering block 24 also routes the data quene block 269 to general cache 14 or processor 10 directly, if no general cache is used. The steering block 24 also provides bidirectional connection with Data Queue Block 26q.
If the mini-cache structure were not present or if the mini-cache were disabled by the maintenance subsystem 50, then the processor 10 and the general cache memory 14 would connect directly to the system bus through a system bus interface 8. This interface 8 would be typical to that described in a co-pending application Ser. No. 963,304 entitled "Dual Bus Interface Transfer System For Central Processing Module," now U.S. Pat. No. 5,404,462. On the other hand, if the mini-cache unit 14i is present and enabled, then the mini-cache will interface to the system bus interface circuitry 8.
Referring to FIG. 2, the basic logical blocks which provide the functions for the mini-cache 14i are shown in block diagram form. The Data Queue Block 26q is seen to contain four identical 60-bit registers. These registers (15sx) are designated as 15so, 15s1, 15s2, and 15s3. Each of these registers can carry 60 bits of which there are 52 bits of data, 7 bits of parity upon the data and 1 bit indicating whether or not that particular data word is "corrupted" that is to say no longer usable because of errors or invalidation.
The Data Queue Block 26q and the Queue Steering Block 24 are present in the gate array chip logic whether the mini-cache 14i is used or not. Thus the mini-cache function comes virtually free of additive circuitry.
The Queue Steering Block 24 works to direct which one of the four data queue registers 15sx is to be loaded with data from the system bus 22. This block 24 also steers the output of the appropriate register 15 over to the processor 10.
The Address Register Block 26a is circuitry which is loaded by the current processor memory address in order to hold this particular address value either until a new address is loaded or until the mini-cache address is invalidated.
The Hit Control Block 27 is used to monitor the processor's data address request and to compare this with the currently held address values in the address register block 26a. If a true comparison or "match" occurs and if the chosen Data Queue Register 15 is not marked as "corrupted", then the hit control block 27 will specify that a mini-cache "hit" has occurred. This will cause the Queue Steering Block 24 to select the appropriate data register from the data queue block 26q and transfer this data immediately to the processor 10. Additionally, the hit control block 27 acts during the "hit" indication to prevent the system bus interface circuitry 8 (FIG. 1) from initiating a system bus memory operation.
Referring to FIG. 2, the invalidation block 28 will monitor the system bus interface 8 to see if any main memory type operations may be in progress. These main memory operations may be initiated by any system resource module 30 such as another processor in the system, various system input/output modules and so on.
If the system operation is an "invalidation type" of operation, that is to say an operation where data is being written to main memory thus to change old memory data, and if the invalidation block detects that the address value held in the address register 26a is the same (match) as the address value presented on the system bus 22, then this will constitute a "invalidation condition" occurring. The invalidation block then will mark the particular mini-cache address value in 26a as being "invalid". Thus, no more mini-cache "hits" can occur for this particular address until a new address value from the forwarding processor is loaded into the mini-cache 14i on some subsequent memory Read operation.
In FIG. 2, the maintenance block 29 represents the final module of the mini-cache 14i and includes a series of flip-flops which are set by the maintenance subsystem 50. This block, being controlled by an external maintenance subsystem 50, is configured for various mini-cache modes of operation. These modes of operation include:
(a1) ENABLED FLIP-FLOP-ON:--The mini-cache 14i is operational when set by Maintenance Block 29. In this condition, a mini-cache hit acts to prevent a system bus operation.
(a2) DISABLED FLIP-FLOP-OFF:--The mini-cache 14i is off-line, and no mini-cache operations occur.
(b1) DATA FLIP-FLOP-ON:--When set "on" in the Maintenance Block 29 by the Maintenance Subsystem 50, the mini-cache allows
"Processor Read Data" commands to fill the Data Queue 26q and to generate "Hit" signals.
(b2) DATA FLIP-FLOP-OFF:--When set "off" by Maintenance Subsystem 50, the mini-cache 14i will not respond to "Processor Read Data" commands.
(c1) CODE FLIP-FLOP-ON:--When set "on" by the Maintenance Subsystem 50, the mini-cache 141 permits "Processor Read Code" commands to fill the Data Queue 26q and to generate "Hit" signals.
(c2) CODE FLIP-FLOP-OFF:--When this FF is "off" the mini-cache 14i will not respond to "Processor Read Code" commands.
The DATA flip-flop and the CODE flip-flop can be both set "on" concurrently or can be individually set "on" or "off" separately.
It may be observed that the various components of mini-cache 14i such as the data queue 26g, the address register 26a, the queue steering block 24, are made of "normally required" logic even absent the concept of a mini-cache for present usage. The data queue 26q receives, synchronizes and holds data captured from the system bus 22 for the use of the processor 10. The address register 26a holds the current operating address and is useful and necessary for processor diagnostics and testing. The queue steering block 24 directs the stored data for transfer to the processor 10. Thus, the mini-cache is virtually provided free of additional hardware costs since most of its logic is generally already resident in one form or another. Additionally, since this logic is primarily implemented in an application specific integrated circuit (ASIC) gate array, there is an abundant supply of design structure generally available at no extra cost.
The mini-cache provides for an "error word marking" function. As the four memory words A, B, C, D are received by the mini-cache 14i on the system bus 22 they are checked for several possible error conditions as follows:
(i) Bus parity error; or,
(ii) Word corruption error.
The word corruption error will be set by the system memory module 40 indicating that this particular word is corrupted. When either of these error conditions occur on the very first word received (the actual word requested by the processor 10), then system level error recovery procedures will be put into place. However, if an error condition is detected upon any of the "remaining" three words, that is to say the look-ahead words, then no system procedures are enacted but the mini-cache 14i will mark this word as "corrupted" within the data queue block 26q.
On subsequent "Read" operations, if a word marked as "corrupted" is addressed as a mini-cache hit word, it is not sent back to the processor 10 even though it is a "hit" word. Instead this word is treated as a "miss" condition and thereafter a system memory "Read" is initiated on the bus while the mini-cache address is marked as invalid.
If it is assumed that a system memory "Read" operation (and the necessary system bus protocols) will consume 7 clock times, then the following Table I hereinbelow indicates the possible relative performance improvements for memory access of data to a processor. The left hand column indicates the description of the architectural configuration, the middle column shows the "average" access time for the processor to get a data word while the last column shows the percent improvement over a straight access to data from main memory.
The mini-cache architecture in FIG. 2 of the present system can be used either as an addition to a standard general cache memory structure or alternatively can be used in structures without the standard general cache memory module. Further under appropriate circumstances of the bus control used and with the proper design implementation, the mini-cache architecture may be almost free of added hardware material and costs.
FIG. 2B shows a system which exclusively uses only the mini-cache 14i in the system without any general cache memory. Here the processor 10 communicates on an internal bus 12 to the mini-cache 14i and communicates via the system bus 22 to the main system memory 40.
As seen in FIG. 2A, the mini-cache 14i can be used as an enhancement to the general type of cache memory 14 so that the processor 10 will first communicate with the cache memory 14 after which it will communicate with the mini-cache 14i and if neither of these two cache memories can fulfill the processor's data request, then, of course, the processor will use system bus 22 in order to access the main system memory 40.
Like the normal general cache memory, the mini-cache memory 14i can provide to the processor 10 any required memory information without the need for system bus access when the required data is resident in the mini-cache memory. It may be noted that the normal or standard cache memory structures will reduce the memory access time for the processor up to 80 to 90% of the time involved in memory access requests. The addition of the mini-cache 14i will then work on reducing the remaining 10%-20% of the memory access time required. Thus the mini-cache 14i enhances the performance of the standard cache memory 14 additionally by accelerating the "fill time" of the caching operations.
For example in FIG. 2A, since the processor 10 in the central processing module 5 will be processing for several clock times (perhaps 5 clock times on the average) between executing memory accesses, this processing time provides a "window" for filling in the mini-cache 14i behind the back of the processor while it is doing its normal processing functions. Thus the mini-cache can be loaded during this time without interfering with the processor 10.
Also, it may be noted that the system bus 22 shown in FIG. 2A, 2B and 5 are shared with other system modules, it may require several clock times on the average just to request system bus access, then to arbitrate the access to the bus and to be granted control of the bus (bus control). Thus once control of bus resources is gained, it is well to utilize each request for data access in the most efficient manner possible.
During the processing time, tp, (FIG. 6) and with the mini-cache memory 14i being present and enabled, multiple memory words are accessed each time the system memory operation occurs. The bus protocol in the aforementioned A-11 computer system provides bus operators which will read the specifically requested memory word plus three other words (block of words) around the requested word. These words are provided immediately on the system bus 22 (one word per clock time) after the requested word.
The Mini-Cache 14i immediately gives the requested word to the processor 10 and then stores the requested word plus the three extra words into the Data Queue 26q of the mini-cache 14i. The address for this "block of words" is also held in the address register 26a of the mini-cache for future "hit" comparison purposes. FIG. 3A shows the 4-word memory block on the system bus designated as word A, word B, word C, and word D. Whether the processor receives a single word (if the mini-cache 14i is disabled or not present) or the 4-word block is received, the bus protocol in the presently described system requires the same number of clocks, except that there are specifically three additional clock times added to receive the three extra data words. However, these clock times are invisible to the processor 10. The memory block (containing the requested word) is always received with the specifically requested word first in line.
Thus in FIG. 3A it will be seen that during the main memory cycle and after the normal memory cycle access time, (the specific word requested being word A,) then word A is the first received word by the processor 10, but additionally on the next processing cycle, there are three clock times used in order to also receive word B, word C, and word D.
As seen in FIG. 3B there are four data registers (15sx) designated 15so, 15s1, 15s2 and 15s3 which are used to store data words in blocks of four words in the data queue 26q (of FIG. 2). Thus the data queue 26q is seen in FIG. 3B holding the four word block received from main memory 40 as it is stored within the mini-cache 14i. The lower two bits, of the address lines, control which of the four storage registers (within the mini-cache) into which a word is to be placed and held. Thus if the lower address bits of the requested word are binary "00", then the word is held in the register 15so. If the lowest address bits are binary "01", then the word will go to and reside in the register 15s1, etc.
The processor 10 may have requested a memory word of any value on the lower two bits. This word is received from the main memory 40 first and then transferred to the processor 10 for immediate processing as well as being stored in the appropriate mini-cache register of 14i.
The "add-ons" or the following three words which come immediately from the main memory 40 on the following three clocks, will then be a binary count of the lower two address bits.
If, for example, the requested memory word was addressed with the lowest 2 bits as "00", then the return order would be "00", "01", "10"and "11". This is a straight binary Mod 2 Count.
If, however, the requested word was addressed with the lowest two bits being "10", then the return order (to the processor) would be "10", "11", "00", and "01". Again this is a Mod 2 binary count.
These words are then stored in their appropriate Data Queue register 15sx in the mini-cache 14i.
FIG. 3B shows an example where the original processor "Read" request was word "A" and this is placed at the lower address bits of "01", in the register 15s1. In this example, the remaining three words from the memory 40 were placed into the mini-cache 14i and placed at the binary address positions "10" (Word B) at register 15s2, then address bits 11 (Word C) at register 15s3, and then (Word D) at address bits 00 in register 15s0.
Once the mini-cache 14i has been filled from main memory 40 with a particular four word block, the block is marked as "valid" and the address of the currently stored block is held in an address module 26a in the mini-cache for future comparison when requests are made for data. The mini-cache address register, 26a, FIG. 2, holds all of the address bits for the data block involved except the two lower bits.
On the next and subsequent processor "Read" operations and before a system bus memory operation has begun, the "address requested" by the processor 10 is compared with the block addresses held in the mini-cache address register 26a. If a true comparison occurs, that is to say, the mini-cache has a "hit", then the particular appropriate word (of the four words held and stored) is transferred immediately to the processor 10 and no system bus operation is begun. System bus request is prevented by a signal on line 27c from the hit control block 27 of FIG. 2 which prevents any system bus request to occur when a "hit" has occurred in the mini-cache 14i.
In the situation provided in FIG. 2A where a general cache memory structure is present in addition to the mini-cache structure, then the general cache memory 14 is always the first possible source of data to the processor 10. However, if the general cache memory 14 operates under a "miss" condition, that is to say it does not currently hold the requested memory address, then the mini-cache 14i will be the next possible source of data access for the processor before any requirement is initiated to the system bus 22 to access the main system memory 40.
Throughout system operations, a memory block of four words is held in the Data Queue 26q within the mini-cache registers 15sx along with the block address which resides in the address register 26a of FIG. 2. Here the four-word block is marked "valid" until one of two possible actions occur:
(a) a "miss" occurs at the mini-cache 14i for a requested processor memory Read. Under these conditions, a system main memory Read cycle will occur which re-fills the mini-cache 14i with the new data from the new address. The "new" address block 26ais now marked as "Valid". While the mini-cache 14t is being filled with the new data words the requested word is also sent to the processor 10.
(b) An "invalidation type" operation occurs at the address held in the mini-cache address register 26a.
Referring to FIG. 2 indicating the mini-cache 14i, the Steering Block 24 will be seen to connect to the general cache 14 or the processor interface. This interface receives signals from the processor 10 and the general cache memory 14 and will include the following signals:
PROCESSOR REQUEST ADDRESS:--used to compare address on bus with the address in register 26a for possible mini-cache hits;
CMD-VALID:--indicates a valid address from the processor on bus 24p and 14p.
CMD-TYPE:--indicates whether a valid Data-Read or a Code-Read from the processor is on bus 24p and 14p.
CACHE-HIT:--indicates that the general cache memory 14 had a hit for this Read Operation.
Communication via bus 28c to the Invalidation Block 28 from the system bus logic in interface 8 includes the following signals:
SA-Address-In:--is the input address on the system bus A (first system bus 22a).
A-Check-Address:--the system bus Address is active and has a valid-invalidation type operation.
SB-Address-In:--this is the same as the above signal except it is for the second system Bus 22b.
B-Check-Address:--this is the same valid-invalid operation as above but directed toward the second system Bus, 22b.
Mini-Cache-Hit:--this is the output from the mini-cache 14i to inhibit system bus memory requests. It goes to the system bus controller, in interface 8.
The functional elements of the mini-cache 14i may be summarized as follows:
Address Register Block 26a : (i) holds the current valid address blocks in the mini-cache; and, (ii) compares this address value against the incoming address values from the processor 10. A match or equality causes a mini-cache "hit" signal. This block holds a "VALID" flip-flop in 26a (FIG. 2) which when set "on" indicates the block address is valid. It is set "on" when mini-cache 14i has its Data queue filled with a good block from memory 40. This flip-flop can be reset to INVALID by the Invalidation Block 28.
Invalidation Block 28: (i) compares the address on the system bus 22 (or busses) for "Write" Operations with addresses residing in the address register 26a ; and, (ii) if an equality or match occurs, this block marks the address register 26a as "invalid".
Hit Control Block 27: (i) provides the mini-cache "Hit" signal to a system bus controller in interface 8 to prevent system bus operation which might seek main memory access. The system bus interface 8 provides all the required bus protocols.
Queue Steering Block 24: (i) monitors the processor's Read requests, the general code hits, and the processor addresses; and, (ii) steers the appropriate register's 15sx data (on a mini-cache hit signal) to the processor and the general cache memory, 14.
Maintenance Block 29: (i) allows all registers to be loaded (by shifting in) and Read (by shifting out) to the maintenance subsystem 50. Thus the entire mini-cache unit can be tested in this fashion. As seen in FIG. 2, this block connects to all the other block circuitry in the mini-cache 14i to provide for testability and uses flip-flops (settable from the subsystem 50) to set the operational mode.
Referring to FIG. 7, there is seen a flow chart illustrating the use of the mini-cache in a computer system operation.
In FIG. 7, starting from the "idle" condition, there occurs a processor memory Read request. A decision is made as to whether there is a general cache hit which, if indicated as "yes", the general cache memory unit 14 will return data to the processor 10 and that cycle will be terminated.
If there is no general cache hit, then the processor memory Read request is directed to the mini-cache 14i to see whether a hit occurs there. If a hit has occurred, then the mini-cache unit 14i will steer data from the appropriate data queue 26q and the register 15sx to the processor 10 and the general cache unit 14 at which time the Read request cycle will be terminated.
It may be noted that the lowest 2-bits of the address to the mini-cache will determine which register 15sx data word (of the four data words) will be steered out.
If there is no mini-cache 14i hit, then the system bus controller will initiate a system bus Read operation for the memory request. At this time, there is a wait for access to the main memory data block. When this becomes available the requested word will be sent to the processor 10 and to the general cache unit 14. This word resided at the lowest 2-bits of the requested address in the data queue block 26q.
Subsequently, all four words are loaded into the mini-cache data queue 26q.
After this, the command block address is fed into the mini-cache address register 26a and is marked as "valid" after which the Read request cycle has now been ended.
Described herein has been an enhanced throughput computer-mini-cache system which can be functional on its own with a processor and main memory or which can be added to a general cache memory in a computer system in order to reduce the access time for processor-retrieval of memory data. The resulting improvement in processor performance enables substantially greater efficiency for computer system operations at very little cost in hardware or processing effort.
While the basic concept of the architecture and usage of the described computer system with auxiliary mini-cache has been indicated it should be understood that other implementations and configurations could be possible using the same concept and as defined in the following claims.
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A term for an immature vulva, before the labia have developed. Term derives from the similar appearance of a little girl's pussy to an uncracked walnut.
"I'm a virgin! Don't split my little walnut!" "Too late. You're the main ingredient of this Waldorf salad I'm making."
লিখেছেন- Ignominious Bob 25 de অগাস্ট de 2009
20 more definitions
A person who likes to shop or hang out at Wal-Mart a lot.
She is such a walnut.
লিখেছেন- Bed time 31 de মার্চ de 2010
Another name for John McCain.
Did you see Walnuts' speech last night? You know, the one about inflation. Did he look dead to you or what?
লিখেছেন- Iacopus 8 de অগাস্ট de 2008
Someone who is obsessed with walls.
My best friend is a walnut.
লিখেছেন- Nospmoht Fets 29 de জানুয়ারি de 2005
Kind of like nuts, but way more nuts.
Kind of like nuts, but way more nuts.
Dude. That Ron Artest brawl the other night was freaking walnuts.
লিখেছেন- cgp24 13 de ডিসেম্বার de 2010
When your nuts are a little sweaty so they stick to the side of your leg. The pre-cursor to itchy nuts.
"Dude, it's so hot in here I got the worst walnuts."
লিখেছেন- Jawn 29 de মে de 2005


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EPA Wrapping Up Detroit Cleanup
Posted: 10/12/2008 - Work on the Superfund project began in April.
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Posted: 10/10/2008 - Stanley Cup champions will celebrate with President Bush.


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Merchandise for Sale in 23518(1 - 15 of 192)
$1 ZM Racks and Beyond Fall SaleBaby & Kid Stuff · Virginia Beach, VAJULY 30th to AUGUST 1st FALL/WINTER Back to School Sale !! St. Matthew's Catholic School – Gym 3314 Sandra Lane Virginia Beach (India...Nicole C. · 1 week ago
$250 Antique Bed for SaleBeds · Norfolk, VAThere are nice details on the headboard and the wood is very solid. It's very old, yet it's sturdier than most of the modern stuff I have...Dakota C. · 3 weeks ago
$80 One Brand New .....Large ( Cobalt Blue Glass Vase)Other Furniture · Chesapeake, VAYou can get somewhat Of a Idea Of the Size Of the Vase..Can be seen in Chesapeake, Va.
$120 Indain Idems ...All Hand MadeEverything Else · Chesapeake, VASpring Cleaning Time to GO
$120 Have Two Picture Frams Of Coins & Some BillsCoins · Chesapeake, VASorry Don't ask any thing about them because I don't No Coins Or old Bills asking Price is listed Below
$60 A Vintage 6 1/2 Craftsman Skill SawPower Tools · Chesapeake, VAStill works Like New ...Has a hair pin trigger....Can be seen for the Asking ....Located in Chesapeake Va.
$150 Tissot Man Watch...Given out after 10 years of service ..Never worn OutWatches · Chesapeake, VAVery Nice Man Tissot Watch needs a New Battery...
$750 A Apothecary/Medical CabinetAntiques · Chesapeake, VAThis is One very Old Idem.....130 years+ Old....Old Dr. Adams Had one of these In his Office On Gun Smoke...And I've seen only 2 Others.....
$350 Queen bed with night stand dresser w/ mirrorStands · Newport News, VAQueen bed with night stand dresser w/ mirrorTeresa P. · 4 weeks ago
$400 couch and chaiseCouches · Newport News, VAalmost like new. very good condition. no smoke or pet damageTeresa P. · 4 weeks ago
$450 Teller's Under the Counter Station/Safe...Locking Cash drawOffice & Business · Chesapeake, VAI have all the Keys & The Combination for it........ These Sale for new right at $1495.oo..... This one still works Like NewBill H. · 4 weeks ago
$750 14 FOOT 10" CANOE ......iT IS READY FOR THE WATERCanoe · Chesapeake, VAVERY NICE Canoe , No leaks, Do have the Paddle BUT NO Life Vest which is now required by lawBill H. · 4 weeks ago
20' 40' Steel Storage | Cargo | Sea ContainersEverything Else · Norfolk, VANYCONTAINER.COM® : Buy used/new storage/shipping/cargo containers 20' 40'. All used containers are guaranteed wind,watertight,lockable,po...Nycontainer.com · 3 weeks ago
Garage SaleAuctions, Estate, Yard & Garage Sales · Chesapeake, VAMoving out of state! Something for everyone! Yard equipment, children's toys-boys and girls: pre-school to teen, furniture: dressers, twi...Marketplace User ·4 hours ago on gsalrTools
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Yard Sale!! Lawn mower, table saw, tools, children's toysAuctions, Estate, Yard & Garage Sales · Williamsburg, VASelling multiple household items. Children's toys, tools, garage items, kitchen items. All prices to sell!Marketplace User ·1 day ago on gsalrTools
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13 NFL Players Set for Carrie Underwood's 'Waiting All Day for Sunday Night' Opening Theme, Beg. Tonight
Thirteen NFL players will join six-time Grammy Award-winner and multi-platinum recording artist Carrie Underwood for her performance of "Waiting All Day for Sunday Night," the opening theme for Primetime television's No. 1 program, Sunday Night Football on NBC.
Underwood makes her debut on NBC's first SNF broadcast of the 2013 NFL season as the Dallas Cowboys host their NFC East rival New York Giants (photos will be available shortly on NBCSportsGroupPressBox.com). Coverage begins with Football Night in America at 7 p.m. ET, and the opening theme will continue each week of the season to kick off Sunday Night Football.
Thirteen NFL players, who have accounted for 55 Pro Bowl selections, six Super Bowl rings and four Super Bowl MVP trophies, will participate in the open (six, denoted with an asterisk*, took part in a shoot this past June). Following is the complete list:
· Arizona Cardinals WR Larry Fitzgerald
· New Orleans TE Jimmy Graham
· Detroit Lions WR Calvin Johnson
· Indianapolis Colts QB Andrew Luck*
· New York Giants QB Eli Manning*
· Denver Broncos QB Peyton Manning*
· Green Bay Packers LB Clay Matthews*
· Philadelphia Eagles RB LeSean McCoy
· Green Bay Packers QB Aaron Rodgers
· Baltimore Ravens LB Terrell Suggs*
· Dallas Cowboys DE DeMarcus Ware
· Houston Texans DE J.J. Watt*
· San Francisco 49ers LB Patrick Willis
"Waiting All Day for Sunday Night" is set to the original Joan Jett song, "I Hate Myself for Loving You" and marks Underwood's first production with NBC Sports. From 2007-2012, the song was performed by music superstar Faith Hill and in 2006, the inaugural season of Sunday Night Football, Pink performed the open.
Later in this fall, Underwood will star in "The Sound of Music" on NBC in the coveted role of Maria Von Trapp. The three-hour live holiday production airing December 5 will be based on the original 1959 Broadway production of "The Sound of Music," which won the Tony Award as best musical.
Since winning American Idol (season four) and releasing her debut album in 2005, Underwood has sold over 15 million albums, and placed 18 No. 1 singles on the charts, nine of which she co-wrote. Her recent album, Blown Away, made history by debuting at No. 1 on Billboard's Top Country Albums Chart, making Underwood only the second country artist in the 47-year history of the chart to have each of their first four albums debut at No. 1.
The now platinum-selling Blown Away album also debuted at No. 1 on the all-genre Billboard 200 chart, making Underwood only the second country artist in history to have three consecutive albums debut at No. 1. She is a six-time Grammy winner, a two-time Academy of Country Music Entertainer of the Year, a three-time Country Music Association and ACM Female Vocalist winner, and a proud member of the Grand Ole Opry.
SNF NO. 1 Primetime PROGRAM ON TELEVISION FOR 2 YEARS RUNNING: For the second straight Primetime television season in 2012-13, Sunday Night Football ranked as the most-watched (persons 2+) show, and the No. 1 program across the key demographics of Adults 18-49, 18-34, 25-54, as well as Men 18-49, 18-34 and 25-54, based on Nielsen live + same day data. Additionally, SNF was the No. 2 show among Women 18-34, and Women 18-49 based on Nielsen live + same day data.
2013 Sunday Night Football SCHEDULE:
Sun. Sept. 8 Week 1 New York Giants at Dallas Cowboys*
Sun. Sept. 15 Week 2 San Francisco 49ers at Seattle Seahawks
Sun. Sept. 22 Week 3 Chicago Bears at Pittsburgh Steelers
Sun. Sept. 29 Week 4 New England Patriots at Atlanta Falcons
Sun. Oct. 6 Week 5 Houston Texans at San Francisco 49ers
Sun. Oct. 13 Week 6 Washington Redskins at Dallas Cowboys
Sun. Oct. 20 Week 7 Denver Broncos at Indianapolis Colts
Sun. Oct. 27 Week 8 Green Bay Packers at Minnesota Vikings
Sun. Nov. 3 Week 9 Indianapolis Colts at Houston Texans
Sun. Nov. 10 Week 10 Dallas Cowboys at New Orleans Saints
*Sun. Nov. 17 Week 11 Green Bay Packers at New York Giants
*Sun. Nov. 24 Week 12 Denver Broncos at New England Patriots
**Thurs. Nov. 28 Week 13 Pittsburgh Steelers at Baltimore Ravens
*Sun. Dec. 1 Week 13 New York Giants at Washington Redskins
*Sun. Dec. 8 Week 14 Atlanta Falcons at Green Bay Packers
*Sun. Dec. 15 Week 15 Cincinnati Bengals at Pittsburgh Steelers
*Sun. Dec. 22 Week 16 New England Patriots at Baltimore Ravens
*Sun. Dec. 29 Week 17 TBA
*Flex Week
** Thanksgiving Night Game
About Author
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Launch of UNICEF-AIAS partnership for the provision of water and sanitation services in urban areas
MAPUTO, Mozambique 22 March 2012 - In January 2012, a partnership between the Office of Infrastructure of Water and Sanitation (AIAS), the United Nations Children's Fund (UNICEF) and the provincial Directorates of Public Works and Housing in three provinces was created to improve the basic water supply and sanitation in urban areas, specifically in eight small towns in the provinces of Tete, Manica and Nampula.
For more information, please contact
Arild Drivdal, UNICEF Mozambique, tel. (+258) 21 481 100; email: email@example.com
Gabriel Pereira, UNICEF Mozambique, tel. (+258) 21 481 100; email: firstname.lastname@example.com
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HP to make $169 Android tablet, eschewing Windows
Hewlett-Packard Co. is making a tablet computer that uses Google's Android operating system, steering clear of Microsoft's latest tablet-oriented version of Windows, the company said Sunday.
Hewlett-Packard Co. is making a tablet computer that uses Google's Android operating system, steering clear of Microsoft's latest tablet-oriented version of Windows, the company said Sunday.
The future of webOS - the innovative mobile software that three successive CEOs at Hewlett-Packard have struggled to make into a profitable product - may lie somewhere in the windowless rooms of a Stanford Medical School ...
Hewlett-Packard said Wednesday it will make its webOS mobile operating system available to the open source community by September.
The largest trade show in the Americas must be a great place to show off new products, right? Wrong. The International Consumer Electronics Show is quickly becoming a launch pad for products that fall flat.
Hewlett-Packard (HP) is being sued by a stock holder who accuses executives of painting a deceptively rosy picture of the computer company's prospects.
(AP) -- When Hewlett-Packard Co. snapped up Palm Inc. last year for $1.8 billion, it looked like the smartphone pioneer's last chance.
(AP) -- Hackers are out to stymie your smartphone. Last week, security researchers uncovered yet another strain of malicious software aimed at smartphones that run Google's popular Android operating system. ...
A year after Hewlett-Packard Co. purchased flailing Palm, the technology behemoth is rolling out the first tablet that uses Palm's webOS operating system.
(AP) -- Hewlett-Packard Co. will soon include its webOS system for smartphones on all its PCs, upcoming tablet computers and higher-end printers, putting it in competition with operating software from Apple, Google and Microsoft.
The tablet computer market is heating up with new entrants all the time, but Apple's iPad will remain the top device over the next few years, according to technology research company Gartner.
Hewlett-Packard Co. unveiled its first tablet computer that uses smart phone pioneer Palm's technology on Wednesday - a skinny black gadget that the companies believe will help them catch up with Apple Inc.'s ...
(AP) -- The head of smart-phone maker Palm said the company's attempt at a turnaround - which ended earlier this year when it was bought by Hewlett Packard for $1.8 billion in cash - was thwarted by competitors that simply ...


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Baseball... positive aspects of the game..
Yes in my view baseball is like watching snow melt...but,,,but baseball is the only sport where one can go get something to eat and by the time they get back??? the same batter might be up to bat....joking ??
and maybe not,
baseball one can talk during the game to his/her neighbor seated next to them and talk about the family/trips / or just about anything
,baseball I love watching these folks from in and out ,out and in eating hotdogs going back out for more hotdogs ,,
,back out for drinks
I see them as bored....why??
simple basebal is slow...
try doing this at a football game or basketball or soccer???
you'd be asked to either sit or leave.....
I once heard baseball described as "three minutes of action, crammed into 3 hours" :) Yeah, baseball isn't as fast paced as the others you mention, but the depth of strategy, the drama of a team vs. team game being impelled by a series of one-on-one matchups and being mercifully free from a clock makes the sport one of my favorites!
I love baseball why??? the fact one can carry on a conversation without missing much action....
and try hitting a ball coming at you at speeeeds clocked at???MPH with a bat????
No argument here. Hardest thing in sports: hitting a round ball with a round bat. (Especially when there's no guarantee that the pitcher won't try and hit YOU with the ball)
This must be at least the 1000th time that you have posted this blog. That's boring.
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News // Atmosphere
We can't thank you guys enough for another great year at Soundset! Thanks to the fans, artists, and crew that all helped make this possible. Here's the recap. See you next year on May 29, 2016 at the new location: the Minnesota State Fairgrounds!Read More →
4.2.15 Rhymesayers Is For The Gamers
We are proud to announce that we have officially launched our channel on Twitch! For those un…Read More →
4.1.15 A Moment In Rhymesayers: Episode 4…
"History" is a critical piece in the Headshots tapes puzzle. First and foremost, it's a celebr…Read More →
3.13.15 Official Spotify Soundset 2015 Pla…
The Soundset 2015 official Spotify playlist is here and includes songs from your favorite arti…Read More →
3.11.15 A Moment In Rhymesayers: Episode 3…
Episode 3 of "A Moment In Rhymesayers" covers the first three Headshots Tapes; Vol. 1: "WBBOY …Read More →


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Men's Freeflow® 40 Rucksack
Berghaus Customer Service
Ideal for faster paced hikes where weight management is essential – the Men's BIOFLEX® Light 35 Rucksack boasts packing volume and comfort at a minimum weight.
The waist belt is attached to a BIOFLEX® Light pivot; this allows the pack to move with you as you walk providing a higher level of carry comfort and weight transfer. Packed full of Berghaus features and attachment points for a truly versatile, lightweight and comfortable hiking pack.
Dimensions (approx.): 67cm (H) x 29cm (W) x 29cm (D)
Weight (approx.): 1.40kg
We offer two delivery options in the UK.
• UK Saver £1.99.
FREE on orders over £50
approx 5 - 6 working days.


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Single Room Available! City Centre & close and opposite to Uni! available NOW Leeds City Centre&Uni
Call or text, or leave me your number through message service(plz try not email as we do not check regularly) : NO agency fee and registration fee, Deposit required Prices are not include utility bills, epc4 Available to professionals / student
- Date available: 01 Jul 2015
- House


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Double Letter Tray, Two-Tier, Acrylic, Clear
5 stars
Elegant and not cheap plastic. Pros: Looks very elegant and is sturdy Cons: None- Aixa in Nc
Bamboo 4 Tier Desk Organizer
5 stars
It is not that expensive and it fits perfect for my office because it is not that big but works great as organizer- Miro in New Jersey
3 Tier Cabinet Organizer
5 stars
matches description, great product- L Jenkins in Illinois
Workstation Letter Front Load Desk Tray, Wire
5 stars
Had a tight space above a file cabinet that needed a tray. Suits my needs perfectly.- Ben in Seattle, WA
Charge Station in White
5 stars
This product is exactly what I was looking for. Something to disguise all of the wires that didn't look too "techy." It looks great on my desk.- Kristen in Seattle, WA
Fist Pen Holder with Paper Clip Magnet
5 stars
This is a well made, heavy piece which appears to be the actual size of a human hand...it holds pencils and pens...but what else it can hold is up to one's imagination. Nice addition to a desk, book- Paula in SOUTH HADLEY, MA
All In One Caddy
5 stars
Great storage. My husband loved it cause it definitely stores all the office items that were scattered all over the desk- chidinma in springfeild gardens, NY
Wood Tones Letter Desk Tray, Wood, Black
5 stars
So the papers have to go somewhere and this is an attractive, reasonably priced alternative. Simple, contemporary design that very nearly matches existing desk pad and small cigar humidor. After well- Robert in BRADENTON, FL
Shoemark Bookmark
5 stars
Love this unique bookmark. I must say that I have had more conversations on the two feet sticking out of my books than any other bookmark.- Laura in Soldotna, AK
Desk Cube with X Dividers
5 stars
office use helps keep our supply drawer organized. The quality is good- Greg in Pittsburgh, PA
Royce Leather Single Fountain Pen Carrying Case in Genuine Leather
5 stars
My husband just bought a Waterman fountain pen about a month ago and he uses it ALL the time. He carries it in his pocket and the other day he showed me how the cap is getting scratched up, so I went- Carrie in Seymour, IN
Onyx Mesh Desk Organizer
5 stars
I used this on my nightstand to organize books and my phone.- Kerlene in Los Angeles, CA
Onyx Mesh Cube
4 stars
Serves my purpose for a home office desk top organizer. Pros: Easy assembly. Cons: Could be a little more sturdy.- Cynthia in Oakley, CA
Adjustable Curve Notebook Stand, 15 X 11 1/2 X 6
5 stars
This is an excellent product that I use for my laptop. Good quality product I would recommend highly.- Joan in Naples, FL
Rolodex Mesh Pencil Cup Organizer Steel, 4 Compartments
5 stars
Very nicely made organizer this is worth the money. Will stand up for many years.- Dawne in Bend, OR
Horizontal Vertical Desk Organizer
5 stars
Very functional well made product that is well worth the money i paid for it.- Dawne in Bend, OR
Copy Up Freestanding Desktop Copyholder
4 stars
It is easy to use and very functional. It takes minimal space on the desk but serves its purpose well.- jj in MA
Four-Section Wire Catalog Rack, Metal
5 stars
I searched all over for these binder/file holders and love them! They helped me organize my new office! Pros: Great storage Cons: none- Erin in Worthington, OH
Ecotex Desk Mat, Embossed, 19"x24", Clear
4 stars
I like this desk mat. It arrived with a small dent but it is not very visible so I decided to leave it. I like the texture of this mat but it does slide easily on the desk. It does not stick to the- Marina in Calgary, AB
Mini Sorter
5 stars
I am really happy with this mail sorter! It turned out exactly like I was hoping, quality is really nice and I didn't have any issues getting it! Great buy for me :)- D. in TX


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Energy Efficient Homogenous Clustering Algorithm for Wireless Sensor Networks
Date Added: Aug 2010
Format: PDF
Radio transmission and reception consumes a lot of energy in a Wireless Sensor Network (WSN), which are made of low-cost, low-power, small in size, and multifunctional sensor nodes. Thus, one of the important issues in wireless sensor network is the inherent limited battery power within the sensor nodes. Therefore, battery power is crucial parameter in the algorithm design in maximizing the lifespan of sensor nodes. It is also preferable to distribute the energy dissipated throughout the wireless sensor network in order to maximize overall network performance. Much research has been done in recent years in the area of low power routing protocol, but, there are still many design options open for improvement, and for further research targeted to the specific applications, need to be done.


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creative nonfiction
Christina's Field
Virginia Konchan - Christina's Field
Virginia Konchan is the author of Vox Populi (Finishing Line Press) and the short story collection Anatomical Gift (forthcoming, Noctuary…
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How We Live
Tally Brennan - How We Live
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Matt Broaddus - Home
Matt Broaddus is currently a first year PhD student in English at the University of North Carolina at Chapel Hill.…
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September Requiem:
In Which Sköll Swallows the Sun
M.K. Foster -
September Requiem:
In Which Sköll Swallows the Sun
M.K. Foster's poetry won the 2013 Gulf Coast Poetry Prize, has been recognized with an Academy of American Poets Prize,…
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David Hornibrook - Theology
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Used Doors and Windows For Sale
David Wagoner - Used Doors and Windows For Sale
David Wagoner has published 20 books of poems, most recently, After the Point of No Return (Copper Canyon Press, 2012).…
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The Song of a Dog
Caroline Bruckner - The Song of a Dog
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Relating to Time
Rachel Jamison Webster - Relating to Time
Creative Nonfiction
Rachel Jamison Webster is a Professor of Poetry at Northwestern University and author of the full-length collections of poetry, September…
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The Prisoners
Sam Katz - The Prisoners
Sam Katz was born in Korea and now lives in Philadelphia. His fiction has appeared in The Good Men Project,…
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Composed in the Form of Falling
Douglas Smith and Jen Town - Composed in the Form of Falling
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All the Varieties of Hunger
Sean Prentiss - All the Varieties of Hunger
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Jill McDonough - Enchantment
Jill McDonough's books of poems include Habeas Corpus (Salt, 2008), and Where You Live (Salt, 2012). The recipient of three…
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Amy Collini - Definitions
Creative Nonfiction
Amy Collini's essays have appeared or are forthcoming in Slice, Indiana Review, Soundings Review, Pithead Chapel, Rappahannock Review, Ilanot Review,…
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End of Evolution
Karen Skolfield - End of Evolution
Karen Skolfield's book Frost in the Low Areas won the 2014 PEN New England Award in poetry and the First…
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Staying Up All Night
Lynn Gordon - Staying Up All Night
Lynn Gordon's fiction has appeared in Epiphany, The Southampton Review, Hobart, Zone 3, South Dakota Review, and elsewhere. She lives…
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