A groove is formed in a semiconductor layer, and a source region is formed at a part of the groove within the semiconductor layer. A control gate is buried via a first insulating layer within the groove. A floating gate is formed via a second insulating layer on the control gate. The floating gate extends over the first insulating layer. A drain region is formed within the semiconductor layer apart from the groove.

1. Field of the Invention
The present invention relates to a nonvolatile memory device such as an electrical erasable and programable read only memory (EEPROM), and more particularly, to a nonvolatile memory device with compensation for an over-erasing operation.
2. Description of the Related Art
Generally, an EEPROM cell includes a P-type semiconductor substrate having an N.sup.+ -type source region and an N.sup.+ -type drain region, a floating gate via an insulating layer on the semiconductor substrate between the source region and the drain region, and a control gate via another insulating layer on the floating gate. In a write mode, a high positive voltage is applied to the drain region and another high positive voltage is applied to the control gate while the source region is grounded. As a result, hot electrons having an energy larger than an energy barrier of the insulating layer between the floating gate and the semiconductor substrate are introduced into the floating gate, thus completing a writing operation. In this case, the threshold voltage of the EEPROM cell is made higher. On the other hand, in an erase mode, a high positive voltage is applied to the drain region and the control gate is grounded. As a result, the electrons stored in the floating gate are extracted thereform to the drain region utilizing the Fowler-Nordheim tunneling effect. To realize the Fowler-Nordheim tunneling effect, the insulating layers are made very thin.
In the above-mentioned erase mode, however, when more electrons than those introduced in a write mode are extracted from the floating gate, the threshold voltage of the EEPROM cell may be made negative, i.e., the EEPROM cell becomes a depletion type transistor. Such an erasing operation is called an over-erasing operation.
In order to compensate for such an over-erasing operation, there has been known an EEPROM cell having a selection gate (see: K. Naruke et al.: "A NEW FLASH-ERASE EEPROM CELL WITH SIDEWALL SELECT-GATE ON ITS SOURCE SIDE", IDEM Tech. Digest, 1989, pp. 603-606). This prior art EEPROM cell is, however, disadvantageous in terms of integration and characteristics, which will be explained later in detail.

Nonvolatile memory device with compensation for over-erasing operation


Provided herein are systems, devices and methods for applying address translation to network traffic originating from client devices having dynamic Internet Protocol (IP) addresses to support IP based security measures using a gateway configured to connect a plurality of client devices used by a plurality of users to a plurality of cloud based networks. The gateway may receive, from a client device assigned a dynamic IP address, credentials of a user using the respective client device, access a translation record mapping the user, identified by his credentials, to a respective unique static IP address, adjust a source address of each packet received from the client device to include the static IP address, and forward each adjusted packet to a security engine configured to apply security policy(s) to each adjusted packet before transmitting it to the cloud based network(s). The security policy(s) is applied according to the static IP address.

The present invention, in some embodiments thereof, relates to adjusting network traffic to support user centric security measures which are based on Internet Protocol (IP) addresses, and, more specifically, but not exclusively, to applying address translation to cloud based network traffic exchanged with client devices to support IP based security measures.
With the rapid and overwhelming growth of cloud based services, platforms and infrastructures, as well as employees working remotely cloud networking is also gaining a constantly growing share in network deployment for a plurality of applications and infrastructures operated by a plurality of companies, organizations, institutions and/or the like.
Moreover, since cloud networking is offered as a service, for example, Network as a Service (NaaS) by several major information and technology companies, the cloud based networks have long become multi-tenant and multi-regional network environments in which multiple companies, organizations, institutions and/or the like may share the same platform to construct their own private, independent and isolated networks.
Multi-tenant and multi-regional network environments may naturally introduce major security challenges and/or enhance existing security vulnerabilities thus requiring extensive sophisticated security resources to ensure the segregation, privacy and/or security of each of the private cloud based networks.

Implementing a multi-regional cloud based network using network address translation


A circuit converts an analog read channel signal to a digital data signal. A read channel error detector generates an error signal in response to an error in an analog read channel signal. In a set of parallel switches, each parallel switch is connected in series to a pullup resistor and a DC voltage source. A selected parallel switch changes state in response to the error signal so as to provide an adjusted analog read channel signal. A first input of a comparator is coupled to the set of switches, while a second input of the comparator is maintained at a reference voltage. The comparator outputs a digital data signal in response to the adjusted analog read channel signal.

Personal computers typically connect to an optical disk drive such as a CD-ROM to read data from a compact disk. On the compact disk, data is stored in the form of pits and lands patterned in a radial track. The track is formed in one spiral line extending from the inner radius of the disk to the outer edge. A pit is a location on the disk where data has been recorded by creating a depression in the surface of the disk with respect to the lands. The lands are the areas between the pits in the tangential direction. The reflectivity of the pits is less than the reflectivity of the lands. To store audio or digital information, the length of the pits and lands are controlled according to a predefined encoding format.
When reading information from the disc, light from a laser beam is directed onto the track and the light beam is reflected back to a photo-sensor. Since the pits and lands have different reflectivity, the amount of reflected light changes at the transitions between the pits and the lands. In other words, the encoded pattern of the pits and lands modulates the reflected light beam. The photo-sensor receives the reflected light beam, and outputs a modulated signal, typically referred to as an RF signal, that is proportional to the energy of the light in the reflected light beam.
In FIG. 1, the relationship of the RF signal to the pits and lands is shown. A smaller pit or land decreases both the period and the amplitude of the RF signal. The RF signal in the pits and lands has opposite polarity.
One encoding format used in optical disk systems is eight-to-fourteen modulation (EFM). EFM reduces errors by minimizing the number of zero-to-one and one-to-zero transitions. In other words, small pits are avoided. In EFM, the data signal includes no less than two zeros and no more than ten zeros between logical transitions at the pit edges. A zero is indicated by no change in the energy of the reflected beam for at least two clock periods. A one is indicated by a change in the energy of the reflected light beam, that is, a pit edge. Applying the EFM encoding rules, a pit or land will have a length corresponding to the amount of time for at least two and up to ten clock periods and the electronics will output a corresponding voltage as shown in FIG. 1.
The RF signal needs to be decoded into a serial digital data signal. In one circuit, to decode the analog RF signal, a comparator compares the RF signal to a reference voltage to generate a digital data signal. A bias resistor is coupled to the comparator input receiving the read channel signal to center a DC offset voltage of the read channel signal to be substantially equal to the reference voltage.
Compared to magnetic disk drives, the optical disk is much less sensitive to the effects of contamination such as dust and fingerprints. However, contamination does affect the RF signal because the reflectivity of the disk is changed in the contaminated regions. Although various error correction techniques are applied to the decoded digital data that is derived from the RF signal, these techniques are limited as to the number of errors that can be corrected.
Contamination will change the DC offset voltage of the RF signal. Since the bias resistor is fixed, the bias resistor cannot be adjusted to compensate for the changed offset voltage. Therefore, the digital data signal will have an error that may or may not be corrected.
In view of the foregoing, it would be highly desirable to provide a circuit that adjusts the DC offset of the read channel signal in response to an error in the read channel signal. Such a circuit would provide a more resiliant disk drive system by correcting for errors. In addition, integrated resistors consume expensive space on a device and a precise resistance value is difficult to achieve. Therefore, it would also be desirable that the circuit operate with external resistors. External resistors provide more precise resistance values at a reduced cost.

Method and apparatus for decoding a read channel signal


Systems, apparatus, and methods for hydrofoil assemblies with planing blades that may be adjusted, and securely maintained in varying tilts with respect to a support member, using a curved indexing system with a curved ridge and a counterpart groove that utilize interacting position retaining elements to retain a desired tilt in different adjustable positions. In one illustrative system, a planing blade may have a convexly curved ridge disposed on a surface thereof with a series of transverse grooves disposed in the curved ridge. A support member may have a counterpart concavely curved receiver with a series of counterpart transverse grooves formed therein. When a user places the planing blade in position with the convex ridge contacting the concave receiver, the blade may be tilted to a desired position. The counterpart transverse grooves interconnect to provide an indexed positive interlock, securely maintaining the blade in the desired position.

This disclosure relates generally to methods, systems, and devices for the positioning of wings on hydrofoil assemblies. Many current hydrofoil surfboards and water skis include front and rear planing blades, both disposed parallel to the elongate main board, on the front and rear of a support member attached to a strut extending downwards from the board. By running generally parallel to the main board, such planing blades provide essentially no lift when the main ski is horizontal. Such blades typically are not adjustable. One adjustable wing assembly, commercially offered by NAISH, utilizes a longitudinal slot accessible in the upper surface of the support member into which a downwardly extending fin member is inserted. A user may tip the wing to a desired position, then tighten bolts on the side of the support member to tighten the slot. However, such an arrangement does not allow for an exact reproducible adjustment.
An adjustable hydrofoil planing assembly that provided users with the ability to perform exact reproducible adjustments on a planing blade or wing would be an improvement in the art. Such a system that included features for securely maintaining the desired angle during use would be a further improvement in the art.

Hydrofoil assembly with indexing wing adjustment


An intermediate data buffer for prefetching data from main memory and supplying it to a processing element and taking results from the processing element and outputting them to main memory is disclosed. The apparatus, referred to as a windowed programmable data buffer (WPDB), is a programmable, one-port or two-port circular data buffer that can simultaneously input data from or output results to main memory and output data to or input results from a processing element. The transfer of data between the WPDB and main memory is separated from the transfer of data between the WPDB and the processing element by means of a window. The transfers with the main memory use the locations outside the window and the transfers with the processing element use the locations inside of the window. The window may be programmed to increment forward around the circular buffer or remain stationary. The WPDB can operate in two modes. One mode uses offsets sent by the processing element to access data within the window. The other uses offsets programmed into the WPDB to access the window. The latter allows the WPDB to anticipate the data to be read next so that the data can be prefetched and buffered through a FIFO buffer. Data being written to the WPDB can be buffered through a second FIFO buffer.

This invention relates to information processing systems, and more particularly to buffering data between main memory and the processing elements in such systems. Even more particularly this invention relates to means for prefetching vector and array data, which is being accessed according to a fixed pattern and/or within a relatively small locality, from a data store, such as main memory, into a processing element.
Any processing element must receive the data it is to operate on from some form of data store. Ideally, this data would always be instantly available whenever it is needed by the processing element so that the processing element would never have to wait for data to be fetched. In slower processing systems, the data store is main memory since the main memory is fast enough to keep up with the slower processors. As processor speed increases relative to main memory speed, processors spend a significant amount of time waiting for data unless some form of high speed intermediate memory is placed between the main memory and the processor. This waiting time can be reduced by using a very fast technology to construct the intermediate memory. The difference in the speeds of the main memory and processing element is accommodated by the intermediate memory because the processing element tends to use data and intermediate results more than once.
The waiting time can be further reduced by anticipating which data is to be needed, prefetching it from main memory, and then making the data that is needed next immediately available to the processing element. The needed data is more easily anticipated when accessing vectors and arrays in some regular manner. Most numerical techniques follow a regular pattern when accessing vectors and arrays and, at any given time, must access data confined to a small locality. This invention is designed to take advantage of this method of accessing vectors and arrays.
The conventional means of providing an intermediate data memory is to use a data cache such as those discussed by Harold Stone in High-performance Computer Architecture, Addison-Wesley, 1987, pp. 29-74. These caches are widely used, but they do not anticipate which data is needed from main memory. Instead, they retrieve the data from main memory when it is requested by the processing element and retain the data and any intermediate results produced from the data so that they can be reused without further accesses to the main memory. Therefore, there is considerable waiting when the data is originally fetched. Also, these caches are not designed to make data immediately available to the processing element; the cache accesses are limited by the speed of the cache memory.

Windowed programmable data transferring apparatus which uses a selective number of address offset registers and synchronizes memory access to buffer


An active system for isolating vibrations includes: at least one first vibratio-isolating device, arranged between a load and a sstanding surface, for at least partially decoupling the static and dynamic forces acting between the load and the standing surface, the first vibration-isolating device includes a passively isolating coupling element for mechanically decoupling the static and dynamic forces including a natural frequency; at least one second vibration-isolating device, assigned to the load, for imparting control forces to the load for actively damping the substantially decoupled dynamic forces, the second fibratio-isolating device including a coupling element for dynamically coupling said second vibration-isolating device to the load and the first isolating device less than the coupling element including a natural frequency; means for tuning the control forces of the second vibratio-isolating device and the natural frequencies, wherein the control forces of the second vibration-isolating device and the natural frequencies are determined by means of characteristic curves describing the functional dependency of the control forces to the natural frequencies of the passively isolating doupling element and the ratio of the natural frequencies.

Not applicable.
Not applicable.
The invention relates to an apparatus for vibration-isolating bearing of loads including at least one first vibration-isolating device, arranged between a load and a standing surface, for at least partially decoupling the static and dynamic forces acting between the load and the standing surface, the first vibration-isolating device comprising a passively isolating coupling element for mechanically decoupling the static and dynamic forces including a natural frequency, at least one second vibration-isolating device, assigned to the load, for imparting control forces to the load for actively damping the substantially decoupled dynamic forces, said second vibration-isolating device comprising a coupling element for dynamically coupling the second vibration-isolating device to the load and the first isolating device, said coupling element including a natural frequency; means for tuning the control forces of the second vibration-isolating device and the natural frequencies, wherein the control forces of the second vibration-isolating device and the natural frequencies are determined by means of characteristic curves describing the functional dependency of the control forces to the natural frequencies of the passively isolating coupling element and the ratio of the natural frequencies. The invention also relates to a method for isolating vibrations of loads, comprising the following steps:
providing at least one first vibration-isolating device for at least partial decoupling of the static and dynamic forces acting between the load and a standing surface with a passively isolating coupling element including a natural frequency,
providing a second vibration-isolating device for imparting control forces to the load, comprising a coupling element for coupling the second vibration-isolating device to the load, the coupling element including a natural frequency,
tuning the control forces of the second vibration-isolating device and the natural frequencies, wherein the control forces of the second vibration-isolating device and the natural frequencies are determined by means of characteristic curves describing the functional dependency of the control forces to the natural frequencies of the passively isolating coupling element and the ratio of the natural frequencies,
providing the control force of the second vibration-isolating device and the natural frequencies of the coupling elements
imparting the tuned control force to the load for actively damping the at least partially decoupled dynamic forces.
Undesired vibrations and shocks are to be found in a multiplicity of technical applications. Such disturbing vibrations have a negative effect, in particular, in the case of highly sensitive, or else very heavy technical units. A computer tomograph weighing several tons may be named by example. An attempt is made to prevent the transmission of vibrations to such machines by what is termed isolation of vibrations. In this case, a purely passive isolation, for example, by the use of a spring, is frequently employed. However, such systems are no longer adequate for particularly heavy loads and for sensitive units, in particular. Consequently, there is an increased shift to the use of what are termed as active systems. The use of active systems for isolating vibrations is highly limited according to the prior art by the very restricted availability of suitable actuators. Specifically, the prior concepts have proceeded from the fact that the actuator or actuators used would have to act directly on the loads for the purpose of isolating vibrations, and so, as a result, they must always bear the entire weight of the installation in order to obtain an adequate isolation of vibrations. As a consequence of this prevailing view, it has been impossible to date to use a multiplicity of actuators that would be suitable in principle for isolating vibrations because of their technical and physical properties within the scope of the prior vibration isolating systems. In particular, these are here what are termed piezoelectric translators or ceramic solid-state actuators that can convert electric energy directly into mechanical energy and vice versa. Piezoelectric actuators can be used only in a very restrictive fashion, if at all, in the existing systems. The reason for this is that piezoelectric actuators for large static loads are, on the one hand, virtually unavailable industrially and, on the other hand, provide only a slight stroke and static loadability.
It is therefore the object of the invention to provide an apparatus for active isolation of vibrations that can be used flexibly for isolating vibrations of loads of different weight and, in particular, permits the use of actuators for isolating vibrations that it has not yet so far been possible to use under the conditions of the prior art.
This object is achieved in the most surprising way by an active system for isolating vibrations having at least one first vibration-isolating device, arranged between a load and a standing surface, for at least partially decoupling the static and dynamic forces acting between the load and the standing surface, the first vibration-isolating device comprising a passively isolating coupling element for mechanically decoupling the static and dynamic forces including a natural frequency, at least one second vibration-isolating device, assigned to the load, for imparting control forces to the load for actively damping the substantially decoupled dynamic forces, the second vibration-isolating device comprising a coupling element for dynamically coupling the second vibration-isolating device to the load and the first isolating device, the coupling element including a natural frequency, means for tuning the control forces of the second vibration-isolating device and the natural frequencies, wherein the control forces of the second vibration-isolating device and the natural frequencies are determined by means of characteristic curves describing the functional dependency of the control forces to the natural frequencies of the passively isolating coupling element and the ratio of the natural frequencies.
The method is carried out according to the invention, which includes
providing at least one first vibration-isolating device for at least partial decoupling of the static and dynamic forces acting between the load and a standing surface with a passively isolating coupling element including a natural frequency;
providing a second vibration-isolating device for imparting control forces to the load, comprising a coupling element for coupling the second vibration-isolating device to the load, the coupling element including a natural frequency;
tuning the control forces of the second vibration-isolating device and the natural frequencies, wherein the control forces of the second vibration-isolating device and the natural frequencies are determined by means of characteristic curves describing the functional dependency of the control forces to the natural frequencies of the passively isolating coupling element and the ratio of the natural frequencies;
providing the control force of the second vibration-isolating device and the natural frequencies of the coupling elements;
imparting the tuned control force to the load for actively damping the at least partially decoupled dynamic forces.
By virtue of the fact that the invention provides an apparatus that comprises at least one first vibration-isolating device, arranged between a load and a standing surface, for at least partially decoupling the static and dynamic forces acting between the load and the standing surface, and includes at least one second vibration-isolating device assigned to the first one and/or the load, for absorbing the substantially decoupled dynamic forces, the possibility arises for the first time that the dynamic forces acting on the apparatus and/or originating from the apparatus can be decoupled substantially from the static forces in a fashion actively isolating vibrations.
In this context, the apparatus according to the invention comprises at least one dynamic coupling element for the purpose of mechanical decoupling of the vibration-isolating devices. Within the purpose of the invention, the coupling element has a property that it can vibrate both in the vertical and horizontal directions, and thereby ensures, inter alia, passive isolation of vibrations.
In a development of the invention, this can be implemented, in particular, by a rubber spring. In a particularly advantageous development of the subject matter of the invention, the rubber spring can comprise a rubber combination or a plurality of interconnected rubber springs.
In a further development of the subject matter of the invention, the vibration-isolating devices according to the invention are arranged and/or tuned with reference to one another and with reference to the load such that the coupling elements assigned to the vibration-isolating devices alternately effect a dynamic coupling between the vibration-isolating devices and the load.
If, to this extent, a passive isolation of vibrations is set up for the first vibration-isolating device, the first device advantageously substantially bears the complete static load. Furthermore, through its physical properties, the passive isolation substantially defines the vibrational dynamics of the apparatus according to the invention. In this case, it is particularly the degree of damping of the coupling element, or in the case of the use of rubber, the stiffness thereof that are to be considered as parameters. Also important, in addition, are, of course, the weight bearing on the passive isolation and, in some circumstances, also the bearing surface of a coupling element on the floor.
It also holds in this context that, according to the invention, the second vibration-isolating device likewise very advantageously comprises a coupling element in such a way that, with reference to the load, stresses that can occur in particular between the second vibration-isolating device and the load can be reduced or even eliminated.
In a positive development of the subject matter of the invention, the coupling element according to the invention can, of course, be fitted not only with rubber springs. In this connection, of course, it would also be possible to use coupling elements in the form, for example, of metal springs, air cushions and/or magnetic levitation devices.
It has proved to be particularly advantageous within the scope of the invention that the dynamic coupling can very positively be set via the physical and/or technical parameters of the coupling elements, and that, in particular, dynamic transmission of force can very advantageously be set, in particular, to the second vibration-isolating device via the setability of the coupling. There is the particularly positive possibility in this way, above all, of setting the force that can be transmitted by the second vibration-isolating device, in particular to the load. In this case, it is possible, above all, in this way also to set the force that can be transmitted by the second vibration-isolating device, in particular to the load. Moreover, however, there is also the possibility in this case to exert a positive influence on the vibration amplitude of the dynamic vibration produced by the dynamic transmission of force such that said dynamic vibration can be set.
In particular, within the scope of the invention, the above-described measures permit the specific adaptation of, for example, building vibration or floor vibration to the isolation of vibration that is to be provided with reference to the technical and physical parameters of the actuators to be used for the purpose of active isolation of vibrations.
In the case of the use of a plurality of rubber springs for the vibration-isolating devices according to the invention, it has proved that in addition, above all, to the stiffness of the rubber in the coupling element of the second vibration-isolating device, the ratio of the rubber stiffness of the individual springs, in particular, can also be a very good measure of the transmission of force. In this case, the stifffiess can be expressed, in particular, by the natural frequencies of the coupling elements or by the natural frequencies of the rubber.
It was possible in the case of the invention also to show that the dynamic transmission of force can be determined in a very simple way from one or more characteristics that reproduce the functional relationship between the natural frequency of the coupling element of the first vibration-isolating device and the ratio of the natural frequency of the coupling element of the first vibration-isolating device to the natural frequency of the coupling element of the second vibration-isolating device. Within the scope of the invention, it is particularly easy in this way, for example given the knowledge of the potential transmission of force, to use the characteristic or characteristics to define and/or select the suitable coupling elements and/or the suitable actuators. Conversely, when the natural frequencies of the coupling elements are given it is also possible, of course, to use the characteristics to determine the possible transmission of force.
The invention renders it possible for the first time, on the basis of the settability and/or determinability of the dynamic transmission of force or of the dynamic vibration with reference to the load to be borne, to make use, for the purpose of active isolation of vibrations, of actuators that have so far not yet been capable of use for vibration isolating systems because of their technical parameters. For this purpose, standard piezoelectric modules and/or piezoelectric actuators are used according to the invention for the purpose of active isolation of vibrations in a development of the subject matter of the invention. The point is that it is possible according to the invention to compensate the properties of piezoelectric actuators previously regarded as disadvantageous: low loadability with respect to static forces, and small stroke. In this case, the piezoelectric modules in the apparatus can be arranged very advantageously such that they exert an active vibration-isolating effect in all directions in space.
In a further development of the subject-matter of the invention, the latter comprises an additional load-bearing means that is assigned, in particular, to the first vibration-isolating device for bearing the load. The load-bearing means according to the invention offers the advantage that the weight of a load lying on it can be distributed uniformly over a plurality of vibration-isolating devices according to the invention. Moreover, such a load-bearing means offers the possibility of producing a local mechanical coupling between the first vibration-isolating device and the second vibration-isolating device.
Furthermore, it lies within the scope of the invention to provide a system that not only has only actuator properties, but also has tensile properties. It is therefore provided according to the invention also to fit the apparatus with a vibration-sensing unit. According to the invention, the latter transmits the exciting movement to the load to be isolated, and also the vibrations that are caused by disturbing forces that act on the load. For the purpose of active isolation of vibrations, within the scope of the invention, the excitations of vibration are fed back to the second vibration-isolating device via a feedback control and/or forward control, in order thus to compensate and/or damp the undesired vibrations.
To this extent, in addition to an active system or apparatus in the case of which the actuator is addressed in terms of regulation and/or control for the purpose of damping vibrations, the present invention also comprises what is termed an adaptive system or adaptive apparatus with sensor and actuator properties that can simultaneously also take over bearing functions and whose multifunctionality also relies on the fact that on the basis of the possibility of using the most varied actuators it permits very flexible and cost effective individual solutions to the active isolation of vibrations of arbitrary loads.
The scope of the invention also includes, of course, a method for isolating vibrations of loads, particular of heavy loads. In this case, the static and dynamic forces originating from a load or acting on the latter are at least partially decoupled, and the dynamic forces thus decoupled are subsequently separately damped. The decoupling of the forces is performed in the course of the passive isolation of the load. The vibrations occurring during the passive isolation are coupled to at least one actuator. This coupling is advantageously performed to the actuator via a spring. It is particularly positive in this context that according to the invention the transmission of force for the actuator can be determined from one characteristic of dependence of the natural frequency of vibration of the passive isolation on the ratio between the natural frequency of the spring with reference to the actuator and the natural frequency of the passive isolation.

Apparatus and method for vibration-isolating bearing of loads


A method for a user equipment (UE) to provide hybrid automatic repeat request acknowledgement (HARQ-ACK) information includes transmitting physical sidelink shared channels (PSSCHs), where each of the PSSCH transmissions provides a transport block (TB); receiving physical sidelink feedback channels (PSFCHs); and generating values for HARQ-ACK information bits from the PSFCH receptions. The PSFCH receptions correspond to the PSSCH transmissions and the values of the HARQ-ACK information bits correspond to the TBs in the PSSCH transmissions. The method further includes generating a HARQ-ACK codeword that includes the values of the HARQ-ACK information bits arranged in a predetermined order and transmitting the HARQ-ACK codeword in a physical uplink control channel (PUCCH).

5G New Radio Interface/Access (NR) systems support multiple services including enhanced mobile broadband (eMBB), massive machine type communication (mMTC), ultra-reliable low latency communication (uRLLC), and Vehicle-to-Everything (V2X) communication that is also referred to as sidelink communication. These services have enhanced features including higher data rates, higher operating frequency bands, wider bandwidths, greater reliability, shorter latency, and increased number of connections than in previous generations. V2X includes applications such as Vehicle-to-Vehicle (V2V) Communications, Vehicle-to-Infrastructure (V21) Communications, and Vehicle-to-Pedestrian (V2P) Communications. These three types of V2X can use "co-operative awareness" to provide more intelligent services for end-users.

Method and apparatus for configuration of resource sensing in NR V2X resource allocation


A new and distinct cultivar of Aster plant named ‘Victoria Mathilde’, characterized by its uniform, upright and mounded plant habit; freely branching growth habit; uniform and freely flowering habit; and decorative-type inflorescences with red purple-colored ray florets.

The present invention relates to a new and distinct cultivar of Aster plant, botanically known as Aster novi-belgii and hereinafter referred to by the name 'Victoria Mathilde'.
The objective of the breeding program is to create new container-type Aster cultivars with uniform and rounded plant growth habit, good vigor and strong branching habit and strong floret colors.
The new Aster originated from an open-pollination in September, 2003 in Aarslev, Denmark of the Aster novi-belgii cultivar Helen Ballard, not patented, as the female, or seed, parent with an unknown Aster novi-belgii seedling selection, as the male, or pollen, parent. The new Aster was discovered and selected by the Inventor as a single flowering plant within the progeny of the stated open-pollination in a controlled environment in Aarslev, Denmark on Apr. 12, 2004.
Asexual reproduction of the new Aster by vegetative tip cuttings was first conducted in Aarslev, Denmark in May, 2004. Asexual reproduction by cuttings has shown that the unique features of this new Aster are stable and reproduced true to type in successive generations.


A semiconductor device includes a sense-amplifier driving device. The sense-amplifier driving device includes a sense-amplifier driver configured to provide a first pull-up voltage and a first pull-down voltage to a pull-up power line and a pull-down power line, respectively, during a first over-driving time period, provide the second pull-up voltage and the first pull-down voltage to the pull-up power line and the pull-down power line, respectively, during an active time period, and provide a third pull-up voltage and a second pull-down voltage to the pull-up power line and the pull-down power line, respectively, during a second over-driving time period, and a drive-signal generator configured to generate a plurality of drive signals, which is selectively activated during the first over-driving time period, the active time period, and the second over-driving time period, to control an operation of the sense-amplifier driver.

Embodiments of the present disclosure relate to a sense-amplifier driving device and a semiconductor device including the same.
With increases in the degree of integration of semiconductor memory devices, the operation speed of semiconductor memory devices has also been continuously improved. In order to increase the operation speed of a semiconductor memory device, a synchronous memory device operating in synchronization with an external clock has been proposed and developed.
A representative synchronous memory device is a single data rate (SDR) synchronous memory device, which is synchronized with a rising edge of an external clock such that one piece of data is input or output via one data pin during one cycle of the external clock.
However, the ability of an SDR synchronous memory device to satisfy the demands of a high-speed operation of a system is limited. In order to solve the problem of the SDR synchronous memory device, a double data rate (DDR) synchronous memory device capable of processing two pieces of data during one clock cycle has been proposed.
In a DDR synchronous memory device, two contiguous pieces of data are input or output via respective data input/output (I/O) pins, and the two contiguous pieces of data are synchronized with a rising edge and a falling edge of an external clock, respectively. Therefore, although the clock frequency of a DDR synchronous memory device does not increase, the DDR synchronous memory device has a bandwidth that is at least two times larger than that of a SDR synchronous memory device. As a result, a DDR synchronous memory device can operate at a higher speed than a SDR synchronous memory device.
A dynamic random access memory (DRAM) is a representative volatile memory. A memory cell of the DRAM includes one cell transistor and one cell capacitor. The cell transistor controls access to the cell capacitor, and the cell capacitor stores electric charges corresponding to data. Data stored in the cell capacitor is classified into high-level data and low-level data according to the amount of electric charges stored in the cell capacitor.
Since electric charges are applied to or leak out from the cell capacitor of the memory cell of the DRAM by a leakage component, the corresponding data should be periodically re-written into the cell capacitor. The periodic storing operation for maintaining desired data in the memory cell is referred to as a 'refresh' operation.
A memory cell of a DRAM is activated in an active mode. A bit-line sense-amplifier (sense-amp) circuit senses and amplifies data received from the activated memory cell, and re-transmits the amplified data to the memory cell. After that, the memory cell is deactivated in a precharge mode and maintains data stored therein. The refresh operation is performed by repeatedly performing active and precharge operations at intervals of a predetermined time.
However, as the voltage level of an external power-supply voltage VDD decreases, as indicated in the LPDDR4 specification of a DRAM, a core voltage Vcore having a lower voltage level than the power-supply voltage VDD is used as an internal voltage, resulting in reduction of the data retention time of a memory cell. Therefore, refresh characteristics of a DRAM are gradually deteriorated in proportion to the voltage level of the external power-supply voltage VDD when the DRAM operates at a high speed.

Sense-amplifier driving device and semiconductor device including the same


A system for comminuting solid waste material including a casing defining a comminution chamber having two side walls and adapted for connection in a solid waste disposal channel. The system includes a first shredding device and a second shredding device disposed along a line extending perpendicular to a flow direction in the channel to form a pair of interactive shredding members. A rotating screening drum disposed within the casing upstream of the first and second shredding devices and positioned between the first and second shredding devices, the rotating screening drum configured to permit fluid to pass therethrough and to move solids toward one of the shredding devices. The rotating screening drum is configured to rotate clockwise and counter clockwise to alternately distribute solids captured thereon to one of the first and second shredding devices.

Pump stations are required in municipal wastewater collection systems where terrain does not allow for strictly gravity flow of sewage to a treatment facility. Sewage is typically comprised of water and soluble organics, including human waste, however, it may also contain non-soluble items or solids. Examples of solids include: rags, shoes, articles of clothing, condoms, chunks of asphalt, bits of wood, money, wipes, rocks and many other items that are often flushed down the toilet or washed down the drain by industry and the general public. While lift station pumps are typically able to handle the soluble organics, blockages may occur when solids are too large to pass through pump orifices. This behavior is often referred to as pump "ragging". Pump de-ragging is a costly, labor-intensive and hazardous process, and when those costs become significant, municipalities tend to employ either solids removal or solids reduction equipment to ensure the pump operates efficiently and without disruption.
In the wastewater industry, twin-shafted shredders are common solids reduction devices, however, hydraulic capacity limitations of the basic two-shaft configuration have resulted in the implementation of supplemental solids diverter technologies that aim to pass liquid and soluble organics, while classifying out and directing non-soluble items to the shredder mechanism. There are several incarnations of the solids diverter, including: vertically-oriented screen belts; vertical-axis rotating screen drums; stacks of interlaced rotating disks; mechanically-raked horizontal bar screens, and; even fixed perforated plate screens. Arguably, the most common solids diverter technology is based on the rotating screen drum. In this design, the twin-shafted shredder 10 (FIG. 1, FIG. 2) is flanked by one or more cylindrical screen drums 20. While the cutter stack 25 is operating, the screen drum(s) rotate in such a manner as to transport any solids collected on the face of the cylindrical screen to the cutter stack for particle size reduction.
In order to physically support the twin-shafted cutter stack and the rotating screen drum(s), the bearings/seals at the top and bottom of the rotating component shafts are typically mounted in top and bottom end housings 30. These end housings are typically metal castings, welded metal fabrications or hybrid cast/sheet metal assemblies with machined pockets to hold the bearings. On the side of the drum opposite the cutter stack, a baffle or side rail 70 is used to close the gap between the outside of the machine/channel wall 80 and the screen drum. This side rail provides a connection feature between the machine and the mounting frame 90, inhibits bypass of flow around the screen drum 20, and directs flow to the drum. The side rail is also fitted with a sealing element 110 (e.g., plastic strip or brush) making line contact with the drum at a point on the drum surface suitable to optimize solids capture vs. flow capacity.
While performing its function, the shredder may periodically be presented with solids that may require an unusual amount of cutter force to shred. This condition is manifested when the force required by the cutter stack 25 causes the shredder drive motor 40 to exceed its rated output, or causes the cutter stack to jam and the motor to stall. This motor behavior is monitored using current, or power load sensor(s) when electric motors are used, or pressure sensor(s) when hydraulic motors are used. These sensors are commonly incorporated into a motor controller device (FIG. 3) that acts as a switch for the power provided to the shredder and solids diverter motors. The sensor(s) are connected to a logic controller (FIG. 3), or logic circuit, such that when the sensor(s) detect(s) excessive current or power draw by the motor, the logic controller or logic circuit may de-energize the affected motor to limit damage to that motor and the connected equipment. In designs where logic controllers are used, it is common to implement jam clearing logic that attempts to clear the jam by energizing the shredder motor in its "reverse" direction for a portion of a cutter stack rotation followed by re-energizing the shredder motor in its "forward" direction. This action is completed with the purpose of allowing the cutters an additional opportunity to shred the tough solid(s) that caused the jam. Often, multiple iterations of this jam clearing behavior are executed in order to shred tough material. If, after one, or multiple, jam clearing iterations, the solids remain too tough to shred, the logic controller will typically de-energize the shredder motor and set a fault condition and alert facility personnel. When the shredder is stopped, solids will tend to collect on the upstream side of the grinder. Liquid and soluble material continue to pass through any available openings. Given a sufficient period of time, the shredder will become blinded and an overflow condition may result. This occurs when the liquid upstream of the shredder rises to such a level as to surpass the height of the shredder.
The device's need to shut down for mechanical protection creates an undesirable result at the pump station of facility, especially if only one device is present without a sufficient bypass that will contain the waste stream. In the event of an alert, facility personnel are typically required to investigate the cause, clear the obstruction and Fault condition on the device's controller before restating the equipment. While some shredders may easily be accessed, others may be located in confined spaces, possibly at locations remote to facility personnel. In many cases, removal of the device is required to access and remove the offending material. Removal equipment may not be physically present compounding time to correct the fault condition. Should a device jam occur while personnel are off duty, or are otherwise occupied, an overflow event may occur. Overflow events can be costly to a municipality and dangerous to personal or the local community. Fines by the Environmental Protection Agency may be warranted.

Screen diverter and dual comminutor with continual operation


In the disclosed process for forming a fine pattern in a semiconductor device, an upperlayer polymeric film so photosensitive to ultraviolet light as to be opague to deep ultraviolet light upon exposure to ultraviolet light is formed on an underlayer resist photosensitive to deep ultraviolet light, provided on an underlaying layer, optionally with an interlayer formed as a barrier or isolation layer therebetween. After the upperlayer polymeric film is exposed through a mask to ultraviolet light to form therein areas opague to deep ultraviolet light with the other areas remaining transparent to deep ultraviolet light, the upperlayer polymeric film serves as a mask for the underlayer resist in subsequent blanket exposure to deep ultraviolet light. After removal of the upperlayer polymeric film and the interlayer if any, the underlayer resist is developed to form a pattern.

1. Field of the Invention
The present invention relates to a process for forming a fine pattern in a semiconductor device to form a circuit pattern in an IC (integrated circuit), an LSI (large-scale integrated circuit), or the like.
2. Description of the Prior Art
The technique of forming a fine pattern in a semiconductor device are described in "Submicron Ryoiki niokeru Pattern Keisei Gijutsu (Techniques of forming Pattern in Submicron Order)," Okidenki Kenkyu Kaihatsu No. 133 (Okidenki Research and Development No. 133), Vol. 54, No. 1, Jan., pp. 85-86, 1987; J. Vac. Sci. Technol., 19-(4), Nov./Dec., pp. 1313-1319, 1981; etc.
As can be understood from these pieces of literature, the techniques of forming a fine pattern in an IC or an LSI include multiple-layer resist processes, in which a structure comprising different kinds of resist in laminate fashion is used to utilize an effect of planarizing a substrate and/or decreasing light reflection by the underlayer resist to thereby improve the resolution of the upperlayer resist in pattern formation therein, thus enabling a fine pattern to be formed.
The multiple-layer resist processes include a deep UV (hereinafter referred to as "deep ultraviolet light" when necessary) blanket exposure method and an RIE (refractive ion etching) method, which differ from each other in the way of transferring an upperlayer resist pattern to an underlayer resist.
Of them, the deep UV blanket exposure method uses as an underlayer resist a resist having a photosensitivity to deep UV light, and comprises the step of blanket exposure (exposure of a whole surface of a substrate-cum-resist to parallel light without use of a mask except for a resist used as a mask as mentioned below) to deep UV light with an upperlayer resist pattern being used as a mask to transfer the upperlayer resist pattern to the underlayer resist.
FIG. 1 illustrates a representative instance of a double-layer resist process which is carried out according to the deep UV blanket exposure method. The instance illustrated in FIG. 1 is an example of the double-layer resist process which is a technique disclosed in J. Vac. Sci. Technol., 19 (4), Nov./Dec., pp. 1313-1319, 1981, and in which a positive resist photosensitive to UV light (hereinafter referred to as "ultraviolet light" when necessary) is used as the upperlayer resist while a positive resist photosensitive to deep UV light is used as the underlayer resist.
First, an underlayer resist 2 [made of, for example, polymethyl methacrylate (PMMA), a copolymer of methyl methacrylate and methacrylic acid (P(MMA-MAA)), or polymethyl isopropenyl ketone (PMIPK)] as shown in FIG. 1b is formed on a Si substrate 1 as shown in FIG. 1a, followed by formation of an upperlayer resist 3 (made of, for example, AZ 1350, AZ 1450, Hunt HRP 206, Hunt MPR, Polychrome PC 129, or Kodak 809) as shown in FIG. 1c on the underlayer resist 2. When the upperlayer resist 3 is directly deposited on the underlayer resist 2, a mixed layer (hereinafter referred to as an "interfacial layer") is formed in the interface therebetween.
After the formation of the underlayer resist 2 and the upperlayer resist 3, the latter is subjected to photolithography comprising exposure to UV light 6 through a mask 5 as shown in FIG. 1d to form a pattern of the resist 3 as shown in FIG. 1e.
Subsequently, the exposed areas of the interfacial layer 4 are removed using oxygen plasma or a suitable method as shown in FIG. 1f.
Subsequently, the pattern of the upperlayer resist 3 is transferred to the underlayer resist 2 using deep UV light 7 with the pattern of the upperlayer resist 3 being used as a mask according to the deep UV blanket exposure method as shown in FIG. 1g.
Thereafter, the underlayer resist 2 is developed to obtain a final resist pattern as shown in FIG. 1h.
As is apparent from the above description, however, the above-mentioned process has defects in that the steps are complicated and hence it is inevitable that equipment of a complicated structure must be used in practicing the process, because two development operations be carried out.

Process for forming fine pattern in semiconductor device


A semiconductor process and apparatus uses a predetermined sequence of patterning and etching steps to etch an intrinsic polysilicon layer (26) formed over a substrate (11), thereby forming etched gates (62, 64) having vertical sidewall profiles (61, 63). While a blanket nitrogen implant (46) of the intrinsic polysilicon layer (26) may occur prior to gate etch, more idealized vertical gate sidewall profiles (61, 63) are obtained by fully doping the gates (80, 100) during the source/drain implantation steps (71, 77, 91, 97) and after the gate etch.

1. Field of the Invention
The present invention is directed in general to the field of semiconductor devices. In one aspect, the present invention relates to controlling the profile of semiconductor features in semiconductor devices.
2. Description of the Related Art
As semiconductor device sizes are scaled down, the requirements for device design and fabrication continue to be tightened in order to fit more circuitry on smaller chips. As device sizes shrink, increasingly complex etch processes are used to define semiconductor device features, such as polysilicon gates. For example, a typical gate patterning process may use several steps after the doped polysilicon layer is formed and the photoresist ("PR") is patterned, including a PR trim step (to shrink the size of the features being transferred), a hard mask etch step (which uses the PR as a mask), an ARC etch step (which uses the hard mask as a mask), a preliminary cleaning step (which includes some etching action), a break through etch step (to remove oxide and begin the poly etch), a main poly etch step (which can leave some poly on dielectric outside gate), a soft landing etch step, an overetch step (to remove all remaining undesired polysilicon) and a sidewall clean etch step (which etches sidewalls and potentially gouges the silicon substrate). TEOS (tetra ethyl ortho silicate) or silicon nitride may be used as a hard mask. Silicon nitride or amorphous carbon may be used as the ARC layer. Each type of processing may contribute separately to the etching of the polysilicon gate, making it difficult to control the vertical profiles of polysilicon gates. These etch and clean steps—in conjunction with doping, nitrogen implant (for PMOS gates) and implant damage—result in an irregular gate profile that, in many cases, deviates substantially from the ideal vertical sidewall. For example, the gate can have an "hourglass" shape, a "coke-bottle" shape, or can display a "foot" or notches (aka "mouse bites") at the bottom and in some cases at the top of the gate. This is shown in FIG. 1 which illustrates examples of various device feature profiles 2-6 formed over a first layer 8 (e.g., an unetched gate oxide) and substrate 7, including an idealized gate profile 2, an hourglass gate profile 3, a gate profile 4 having notches on the top, a gate profile 5 having foot extensions on the bottom, and a gate profile 6 having notches on the bottom. Such irregular or non-vertical sidewalls can adversely affect gate dimension control, short channel effect (SCE) control, and silicidation robustness, thereby negatively impacting circuit performance and yield.
Accordingly, a need exists for a semiconductor manufacturing process which provides better control of the sidewall profile on semiconductor device features, such as gate electrodes. In addition, there is a need for a fabrication process which forms a gate where hour-glassing, notches and/or mouse bites in the gate sidewall are reduced or eliminated. A gate electrode formation process is also needed that improves circuit performance and yield by improving gate dimension control, short channel effect (SCE) control, and silicidation robustness. There is also a need for improved semiconductor processes and devices to overcome the problems in the art, such as outlined above. Further limitations and disadvantages of conventional processes and technologies will become apparent to one of skill in the art after reviewing the remainder of the present application with reference to the drawings and detailed description which follow.
It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the drawings have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements for purposes of promoting and improving clarity and understanding. Further, where considered appropriate, reference numerals have been repeated among the drawings to represent corresponding or analogous elements.

Undoped gate poly integration for improved gate patterning and cobalt silicide extendibility


In an ultrasound cutting device comprising an ultrasound transducer connected to a generator and provided with a sound conductor which is connected to a cutting blade and extends along a line which deviates from a straight line, the generator includes means for running the ultrasound waves in a controlled manner through a predetermined frequency range.

The invention resides in an ultrasound cutting device with at least one ultrasound transducer, at least one sound conductor and at least one cutting blade, wherein the sound conductor is arranged between the ultrasound transducer the cutting blade so as to interconnect the two and wherein the longitudinal center axis of the sound conductor extends along a line which deviates from a straight line.
Such an ultrasound cutting device for cutting food items such as baked products, cheese, fish or similar products to be cut, is known from DE 43 19 832 A1. The cutting device disclosed therein comprises a cutting blade which extends essentially in a plane and which is connected at its end remote from the blade tip to a sound conductor forming therewith a single piece. A section of the sound conductor spaced from the cutting blade is threaded to an ultrasound transducer so that the ultrasound oscillations can be coupled into the sound conductor in the longitudinal direction of that cutting blade. Between the ultrasound transducer and the cutting blade, the sound conductor includes a 90° bend with a predetermined radius of curvature which extends in a plane normal to the plane in which the cutting blade is disposed and in the longitudinal direction of the cutting blade. At the end, which is connected to the cutting blade, the curved area converges toward the cutting blade Inc continuously differentiable manner. Via a course which deviates from the straight line of the sound conductor, the sound conductor is excited to vibrate in the longitudinal direction of the cutting blade as well as in a plane extending normal to the plane of the cutting blade. Herein, the vibration component in a direction normal to the plane of the cutting blade provides for a reduction of the friction between the flanks of the cutting blade and the product to be cut. Still, during cutting a certain amount of friction will occur, which limits the cutting speed. It has also been found that the cutting blade is subjected by the ultrasound vibrations at different locations to different mechanical loads.
It is therefore the object of the present invention to provide an ultrasound cutting device of the type described above, which is of a compact design but nevertheless has a high cutting speed and facilitates a uniform mechanical stress of the cutting blade.


The logical comparison and arithmetic addition functions are optimally constructed in depth-2 threshold logic circuits employing majority elements arranged into structures corresponding to sparse delta polynomials. A delta polynomial is a polynomial having a relatively large value for a particular set of variable values and having a relatively small value for all other sets of variable values. A delta polynomial can be constructed through a column-by-column consideration of an error-correcting code generator matrix. The sparseness of a delta polynomial constructed in this manner means that the delta polynomial expression for implementing a threshold logic circuig which combines n-bit numbers contains no more than n.sup.c terms. A further benefit of such a delta polynomial is the low values of its coefficients.

The invention concerns the structure and operation of threshold logic circuits which implement the COMPARE and ADD functions.
Specialized circuits which count inputs and provide output signals indicating the relationship of the count with a predetermined threshold are known in the art. These elements are called "threshold gates". Conventionally, a threshold gate produces a binary signal (a "bit") conditioned to a first state if the sum of weighted input bits is equal to or greater than a certain value (the "threshold value"). The threshold gate conditions its output bit to the other binary value when the sum of weighted input bits is less than the threshold value.
The art recognizes a particular class of threshold gates in which a gate conditions its output according to the binary value assumed by the majority of bits input to the gate. Such gates are called "majority gates". It is known to use majority gates in order to combine variables and to sum the variables in such a manner that the summation is described by a polynomial whose terms are given by Boolean variables. In these constructions, a first level of gates receives various combinations of variables, combines them, and provides outputs representing the combinations. Following levels combine these outputs in prescribed ways, generate other outputs, and so on, until, at a last level, all outputs of the preceding level are collected by a majority gate whose output is conditioned according the function it implements. When plural level majority gate circuits are constructed to compute polynomials, the output of the last gate is referred to as the "sign" of the polynomial function. Relatedly, the circuit has a "depth" corresponding to the number of gates of the longest path from the input to the output of the circuit.
In a recent research report (K. Y. Siu and J. Bruck, "On the Dynamic Range of Linear Threshold Elements", IBM Research Report RJ 7237, January 1990), it was proved that it is possible to implement both the logical COMPARISON and ARITHMETIC addition functions in threshold circuits of depth two using majority gates. However, only the existence of the possibility was proved, with the explicit constructions of these circuits left as an open problem.
The challenge of reducing explicit constructions of the COMPARISON and ADDITION functions in depth two majority gate circuits which are described by polynomials using Boolean variables is the necessity to use exponentially large weights. This is because a polynomial used to describe the construction of such a circuit can take on widely varying values, depending upon the number of variables in the polynomial and the values to which the variables may be set by the input bits.

Depth-2 threshold logic circuits for logic and arithmetic functions

International Business Machines Corporation


The present invention provides an actinic ray curable ink composition for inkjet recording, which has a high sensitivity for inhibiting a blocking phenomenon and capability for forming an image, obtained by curing, which exhibits excellent shaping suitability and punching suitability, and which includes: a colorant; a polymerization initiator; a polymerizable monomer; and organic fine particles, the polymerizable monomer containing a monofunctional monomer in an amount of 90% by mass or more with respect to a total mass of the polymerizable monomer, and organic fine particles that are crosslinked.

1. Field of the Invention
The present invention relates to a new actinic ray curable inkjet ink composition, a printed article, a shaped printed product, and a printed article forming method.
2. Description of the Related Art
There are many image-recording methods for forming an image on a recording medium such as paper based on image data signals, including those by an electrophotographic process, a sublimation or fusion heat-transfer process, and an inkjet process. Among them, the inkjet process is advantageous in that it allows printing in a cheaper device, and because it forms an image directly on a recording medium by ejecting ink only in a required image region, and ink can be used efficiently, and a running cost is low.
According to the inkjet method, it is possible to print not only on regular paper but also on a non-absorptive recording medium such as a plastic sheet or a metal plate. However, increased speed at the time of printing and increased image quality are key issues, and it is a property of the inkjet method that the time required for drying and curing droplets after printing greatly affects the productivity of printed materials and the sharpness of printed images.
As one of the inkjet methods, there is a recording method using an inkjet recording ink that is curable by irradiation of radiation. According to this method, by curing ink droplets by irradiating radiation immediately after or after a fixed time after the ink is ejected, the productivity of printing can be increased, and sharp images can be formed.
However, in inkjet printing in which printing is performed in large amounts at high speed, printed recording media are stacked at an outlet in large amounts at high speed. In that case, when curing of printing ink is not sufficient, a phenomenon in which ink is transferred to another printed article in the stack (blocking) may occur. Accordingly, there is demand for inks that cure with higher sensitivity than conventional inks and suppress blocking (inks having favorable sensitivity for preventing blocking).
Meanwhile, when the printed article has insufficient flexibility or stretchability in a subsequent step of processing the same, cracking, white deletion or the like may occur in the obtained image surface during a process in which the printed article is slowly stretched and formed by heating.
Moreover, when the printed article has insufficient impact resistance against a quick impact due to cutting during a subsequent process of punching the printed article into formed products, cracks may be formed at a cut surface of the printed article or in the vicinity thereof. Inferior punching suitability of the printed article may damage its value as a commercial product.
From the viewpoint of producing a film that exhibits favorable adhesiveness, flexibility and strength, Japanese Patent Application Laid-Open (JP-A) No. 2008-37879 proposes an actinic ray curable composition including a photopolymerization initiator, a photopolymerizable compound and rubber fine particles.
From the viewpoint of achieving favorable forming processability, JP-A No. 2008-105393 proposes an ink composition including a monofunctional radical polymerizable monomer having only one unsaturated double bond group, such as a (meth)acrylate group, and at least one group having a cyclic structure.

Actinic ray curable inkjet ink composition, printed article, shaped printed product, and printed article forming method


Dynamically switching between different external RF transceivers for communication with an implantable medical device maintains high communication quality in the face of interference, fading, detuning, or other adverse wireless communication conditions. Quality information associated with communications between an implantable medical device and different external devices is monitored to select one of these external devices to conduct subsequent communication with the implantable medical device. This monitoring is conducted on a repeated basis such that communication is switched to a different RF transceiver whenever such an RF transceiver is able to achieve a higher quality communication than the currently selected RF transceiver. In some embodiments, RF transceivers are deployed in different devices. For example, one or more RF transceivers may be deployed at a portable programmer (e.g., in the form of a computer tablet) and one or more other RF transceivers may be deployed at an associated base station.

Implantable medical devices are employed in various applications. For example, an implantable cardiac device may perform one or more functions including sensing signals generated in a patient's heart, pacing the heart to maintain regular contractions, and providing defibrillation shocks to the heart. Similarly, an implantable stimulation device may be used to apply stimulation signals to a patient's muscular tissue, neurological system, or some other area of the patient's body.
In many cases, there is a need to communicate with an implantable medical device after it has been implanted in a patient. For example, an external monitoring device located in an operating room, a doctor's office, a clinic, a person's home, or some other suitable location may be used to retrieve information collected by and/or stored in the implanted medical device. In the case of an implanted cardiac device, such information may include sensed cardiac activity data that a treating physician may analyze to learn about the patient's health. Similarly, an external programming device (which typically includes monitoring capabilities as well) may be used by a treating physician to change the operating parameters of the implanted medical device. Such parameters include, for example, the timing or magnitude of stimulation pulses generated by the implanted medical device.
Typically, radiofrequency (RF) telemetry is employed for communication between an external device and an implanted medical device. In such a case, the external device and the implanted medical device each Include an RF transceiver that transmits and receives RF signals (e.g., via a designated medical band).
In practice, communication problems may be encountered when an external device and implanted medical device attempt to communicate with one another. For example, a transmitting device typically transmits RF signals at low power levels to reduce the possibility that these RF transmissions will interfere with other nearby RF devices (e.g., an external device and/or an implanted medical device located in a nearby room). However, environmental conditions such as objects in the room and nearby noise sources may interfere with the reception of such low power RF signals. Consequently, under certain circumstances, a receiving device may not be able to accurately acquire the information sent via these RF signals. Thus, there is a need for improved techniques for communicating between an implantable medical device and an external device.

RF transceiver hopping for communication with implantable medical device


A method includes identifying, within a message, first data comprising a priority section and second data comprising a non-priority section. A priority message is generated that includes the first data. The priority message is transmitted using a priority radio access technology (RAT). A non-priority message is generated that includes the second data. The non-priority message is transmitted using a non-priority RAT.

IoT and V2X applications typically involve wireless communications between devices without human intervention. Cooperative driving is one example of an IoT application in which where vehicles transmit messages to share their intentions with other nearby vehicles, roadway infrastructure, or even pedestrians. Such information is used by automated driving applications to enable accurate prediction of what others will do in the near future, and by doing so optimize their own decisions. In synchronized cooperation, autonomous vehicles exchange messages and synchronize their planned trajectories to optimize driving patterns.
Modern devices are capable of radio communication using one or more radio access technologies (RAT). A RAT is a communication protocol according to some standard. Examples of RATs include cellular RAT such as LTE and 5G and 802.11p based "radio" RATs such as DSRC. Communication systems based on the different RAT may be operating on the same spectrum bands or different spectrum bands.

Message splitting for multi-RAT transmission


Disclosed is a pilot multiplexing method in an Orthogonal Frequency Division Multiplexing (OFDM) system. Transmit data is transmitted by an OFDM signal through an OFDM scheme, pilot data is directly spread, and a spread-spectrum signal, which has been obtained by spreading, is transmitted in the same frequency band as that of the OFDM signal at the same time in superposition therewith or time-division multiplexed therewith. The spread-spectrum signal is a CDMA signal that has been obtained by spreading the pilot data by a prescribed spreading code.

This invention relates to a pilot multiplexing method and transceiver apparatus in an Orthogonal Frequency Division Multiplexing (OFDM) system and, more particularly, to a pilot multiplexing method and OFDM transceive apparatus in an OFDM system for transmitting transmit data by an OFDM signal through an OFDM scheme, and transmitting pilot data by a spectrum signal, e.g., a CDMA signal, in a frequency band identical with that of the OFDM signal.
FIG. 17 is a diagram of the structure of an OFDM transmitting apparatus in an OFDM (Orthogonal Frequency Division Multiplexing) transmission system. User data (channel data) is input to an OFDM modulator 1 serially at a prescribed bit rate. A serial/parallel converter la converts input data to M-bit parallel data S1 to SM, i.e., frequency-domain data of subcarriers f1 to fM, by a serial-to-parallel conversion. An IFFT unit 1b, which is for transmitting the frequency-domain data S1 to SM by the subcarriers f1 to fM, applies an IFFT operation to this frequency data and converts the data to time-domain waveform data. In order to remove inter-symbol interference, a GI (Guard Interval) insertion unit 1c attaches a part of the tail-end data of the time-domain data to the leading end of the data as a guard interval and outputs the resultant signal as an OFDM symbol. ADA converter Id converts this to an analog signal. An up-converter 2 up-converts the OFDM modulated signal (OFDM signal), which enters from the OFDM modulator 1, to a high-frequency signal, and a transmit amplifier 3 amplifies the high-frequency signal, which is then emitted into space from an antenna.
FIG. 18 is a diagram useful in describing a serial-to-parallel conversion. Here a pilot P has been time-multiplexed to the front end of one frame of transmit data. It should be noted that the pilot P can also be dispersed within a frame, as illustrated in FIG. 19. If the pilot per frame is, e.g., 4×M symbols and the transmit data is 28×M symbols, then M symbols of the pilot will be output from the serial/parallel converter la as parallel data the first four times, and thereafter M symbols of the transmit data will be output from the serial/parallel converter la as parallel data 28 times. As a result, in the period of one frame the pilot can be time-multiplexed into all subcarriers and transmitted four times. By using this pilot on the receiving side, channel estimation is performed on a per-subcarrier basis and channel compensation (fading compensation) becomes possible.
FIG. 20 is a diagram useful in describing insertion of a guard interval. If an IFFT output signal conforming to M×N subcarrier samples (=1 OFDM symbol) is taken as one unit, then guard-interval insertion signifies copying the tail-end portion of this symbol to the leading-end portion thereof. Inserting a guard interval GI makes it possible to eliminate the effects of inter-symbol interference (ISI) ascribable to multipath.
FIG. 21 is a diagram of the structure of an OFDM receiving apparatus in an OFDM transmission system. A down-converter 5 applies frequency conversion processing to a high-frequency signal that has been sent from a transceiving apparatus, the receive signal obtained by the frequency conversion is subjected to AGC amplification in an AFC amplifier 6, the resultant signal is converted to a digital signal by an AD converter 7 and the digital signal is input to an OFDM demodulator 8.
In the OFDM demodulator, a symbol timing detector 8a detects the timing of the OFDM symbol based upon correlation of the guard interval (GI) (PCT/JP01/08488). As shown in (a) of FIG. 22, the guard interval GI is created by copying, to the leading end of M-number of samples of the OFDM valid symbol, a tail-portion of NG-number of samples. Therefore, by calculating the correlation between the receive signal that prevailed one OFDM valid symbol earlier (M samples earlier) and the present receive signal, the correlation value will be maximized at the portion of the guard interval GI, as indicated at (b) in FIG. 22. The timing t0 at which the correlation value is maximized is the start timing of the OFDM symbol. A GI removal unit 8b removes the guard interval that has been inserted based upon the OFDM-symbol start timing and inputs the resultant signal to an FFT operation unit 8c.
The FFT operation unit 8c executes FFT processing at an FFT window timing and converts the time-domain signal to M-number of subcarrier signals (subcarrier samples) S1′ to SM′. A channel estimation unit 8d performs channel estimation for every subcarrier f1 to fM using the pilot that has been time-multiplexed on the transmitting side, and a channel compensator 8e multiplies the FFT output by channel estimation values CC1 to CCM of each of the subcarriers, thereby compensating for fading.
The channel estimation unit 8d sums, on a per-subcarrier basis, a plurality of symbol's worth of subcarrier components S1′-SM′ of each pilot symbol that is output from the FFT operation unit 8c and calculates the channel estimation values CC1 to CCM of each of the subcarriers based upon the average values. That is, the channel estimation unit 8d estimates the influence exp(jφ) of fading on phase of each subcarrier using the known pilot signal, and a channel compensator 8e multiplies the subcarrier signal component of the transmit symbol by exp(−jφ) to compensate for fading.
A parallel/serial converter 8f converts parallel data (subcarrier components S1′ to SM′), which has been channel-compensated by the channel compensator 8e, to parallel data, inputs this data to a data demodulator (not shown) and decodes the transmit data.
The channel estimation values are obtained from the pilot symbol of a known signal. However, there are instances where an average of several symbols is obtained in order to improve the S/N ratio. With regard to the channel value, since it is known that there is some degree of correlation in both the time direction and subcarrier direction, the average can be calculated in a region that extends in both the time and subcarrier directions. FIG. 23 illustrates an example of frame structure. In this case, the frame extends over eight symbols and averaging is performed two subcarriers at a time (total 2×8=16). The reason for obtaining the channel estimation value by averaging as set forth above is that since each symbol contains noise, the influence of such noise is eliminated by averaging to thereby improve the S/N ratio. If subcarriers are very close in terms of frequency, the channel values are almost the same and therefore no problems are caused by averaging.
With the above-described OFDM communication, only one pilot can be used and it is not possible to cope with a case where use of pilots of a plurality of types is desired. For example, in an arrangement in which the zone of a base station BS is divided into sectors and directional beams are emitted from antennas AT1 to AT3 in respective ones of sectors SC1 to SC3, as shown in FIG. 24, it is necessary to identify mobile stations MS1 to M53 sector by sector. Consequently, it is necessary to use pilots that differ for every sector. With the conventional schemes, however, using pilots of a plurality of types is impossible.
A method that uses orthogonal codes is available as one method of multiplexing pilots of a plurality of types (PCT/JP02/00059). As shown in FIG. 25, this method adopts m (=2) adjacent subcarriers at a time as a set and multiplies a total of 16 subcarrier components of each of the sets in n (=8) pilot symbols by orthogonal codes K0 to K15 shown in FIG. 26. In accordance with this method, pilot signals the number of which is equivalent to the number of orthogonal codes can be multiplexed at the same frequency and same timing.
Problems of the Prior Art
In a conventional OFDM according to the prior art, use is made of guard-interval correlation in order to detect the leading-end timing of an OFDM symbol at initial synchronization. With the prior art, however, a problem is that the correlation characteristic is sluggish and, hence, it is difficult to improve detection precision. A further problem is that this detection precision has an influence on data demodulation performance.
In another example of prior art, a master station transmits a symbol synchronization signal toward a slave station by a CDMA scheme. At the slave station, a CDMA decoder decodes a CDMA receive signal and an OFDM synchronizing circuit transmits an OFDM signal through an OFDM modulator and high-frequency converter in sync with the symbol synchronization signal (JP10-210002A). In accordance with this prior art, timing detection precision can be improved. However, since CDMA transmission is performed only for the sake of synchronization, there are problems in terms of performance and cost.
Further, according to the prior art, the pilots are multiplexed by multiplication using orthogonal code. However, with such prior art, each pilot cannot be demultiplexed until the code is received in its entirety. Consequently, it is not possible to cope with an instance where a momentary channel estimation value is desired at the stage where one or two pilot symbols, for example, have been received. Further, with the method of multiplexing pilots by multiplication using the orthogonal code K0 to K15 of 16 bits, a maximum of only 16 pilots can be multiplexed and there is little degree of freedom.

Pilot multiplexing method and OFDM transceiver apparatus in OFDM system


A system, method, and apparatus for simulating immersion in a confection may comprise a container, a plurality of fanciful elements removably positioned within the container, and one or more structural elements attached to the container. In some embodiments, the present invention may further comprise a platform that may be configured to support one or more surfaces of the container. In some embodiments, the fanciful elements may be synthetic multicolored sprinkles.

Whether for entertainment, renewal, mindfulness, or physical rehabilitation, the reasons for the human proclivity towards immersive activities are endless. A variety of mediums are known to support such activities. Naturally, a variety of containers configured to hold these diverse immersive mediums exist. One common example is a pool configured to hold water. A pool configured to hold fresh water treated with chemicals may provide a cool clean feeling, whereas a saltwater pool may provide more buoyancy. Other containers may be configured to contain other substances intended to offer alternative immersive experiences, such as for example mud for mud baths, gels for resistance training, or even edible gelatin deserts for novelty. However, few if any containers are configured to contain a plurality of fanciful elements. Such a container containing such a medium would offer not only the tactile benefits of partial or total immersion, its fanciful nature could potentially also evoke a transformative emotional, psychological, even spiritual experience of which an aqueous medium may not be capable.
Although various containers configured to encompass various mediums are known in the art, none are sufficiently configured to contain a plurality of fanciful elements. One commonly known container, the pool configured for use with aqueous substances, is unfortunately designed only to contain water. For example, U.S. Pat. No. 5,592,702, incorporated by reference in its entirety herein, discloses a modular above-ground pool system. Its free-standing and adjustable elements may presumably be adjusted and connected to form a circular above ground pool of variable diameter and height. Or, the disclosure of U.S. Pat. No. 3,409,916, incorporated by reference in its entirety herein, provides for a more permanent oval-shaped pool. Further, the disclosure of U.S. Pat. No. 3,256,532, incorporated by reference in its entirety herein, discloses a portable square-shaped pool that may presumably be easily assembled and disassembled. While containers having a pool-like shape are convenient and familiar to users, none of these are configured for use with non-aqueous immersion mediums.
Alternative containers exist as well. For example, U.S. Patent Application Publication No. 2009/0211168, incorporated by reference in its entirety herein, discloses a children's play apparatus that could be filled, for example, with the impact-absorbing foam blocks of U.S. Patent Application Publication No. 2003/0163873, which is also incorporated by reference in its entirety herein. Such a combination would provide a user with a type of immersive experience in the foam blocks. Or, as is disclosed in U.S. Pat. No. D382,618, incorporated by reference in its entirety herein, other containers can be configured to contain balls, and provide another type of "ball pit" immersive experience. Some containers may even contain impact-absorbing substances into which a person may sink, such as the disclosures of U.S. Pat. Nos. 4,245,838 and 4,168,061, both of which disclose impact-absorbing crash pads for use with track and field events, both of which are incorporated by reference in their entireties herein. However therapeutic the feeling of sinking into such pads may be, these disclosures do not enable an immersive experience.
What is needed therefore is a system that provides a container configured for use with non-aqueous fanciful elements that enables partial or total immersion, and a method of using the same.

System, method, and apparatus for simulating immersion in a confection


A series connected light string using LEDs connected to an AC power source is disclosed. In order to make some or all of the lights color change, twinkle, and/or flash, controllers are provided in series with all or some of the LEDs. Because the supply source AC, but the active elements are essentially rectifiers, the circuit becomes a half wave DC circuit. Half wave DC will cause unpredictable behavior in DC circuit components. This will cause the controller to shut down during the zero voltage portion of the pulsating DC cycle. To prevent this a current supplying element is placed in parallel with the controller.

In the past, decorative light strings used a plurality of series or parallel connected incandescent lights. To make one or more of them flash or twinkle, a bimetallic strip was used to either respectively open circuit or short out the filament, or a partial resistive shunt would be applied across the light terminals with a switching circuit to dim or in effect extinguish the bulb.
These dimming circuits were typically not polarity sensitive so they could operate effectively on AC circuits.
With the advent of low cost Light Emitting Diodes (LEDs) especially when they became available in different colors, have caused the decorative light industry to move toward these lower wattage, lower temperature devices. Unfortunately, the circuitry for creating light effects such as flashing, twinkling, shimmering, color changing (such as for LEDs which change color upon application of different voltages or polarities), or the like require more sophisticated controllers to achieve what previously could be done with simple electromechanical solutions.
Furthermore, LED devices are essentially rectifiers in series or parallel which results in problematic results for other devices which require full wave DC when the LEDs on an AC circuit create half wave rectification.
If an LED is removed from the circuit, there are known methods for maintaining the rest of the string illuminated but these methods can sometimes interfere with other features of the light string.
Finally, cost is a critical factor. Whatever solution is required to make the transition from incandescent to LED lighting must maintain the low cost nature of incandescent bulbs.
The present invention addresses these issues.

This patent is subject to a terminal disclaimer.

Controller circuit for half wave LED light strings


An apparatus selectively outputs one negative voltage from among a plurality of negative voltages. The apparatus includes a first switching unit configured to perform a switching operation and output a first voltage-on signal and a first voltage-off signal according to a selection signal and a first negative voltage signal, and a second switching unit configured to perform a switching operation and to output a second voltage-on signal and a second voltage-off signal according to the selection signal and a second negative voltage signal. The apparatus also includes a driving unit to select and output one negative voltage signal from among the first and second negative voltage signals according to the first negative voltage signal, the second negative voltage signal, the first voltage-on signal, the first voltage-off signal, the second voltage-on signal, and the second voltage-off signal.

In general, flash memory devices need an output apparatus for selecting a negative voltage for programming, erasing, or reading memory cells.
FIG. 1 illustrates a circuit diagram of an apparatus for selecting a negative voltage for flash memory devices in accordance with the related art.
As shown in FIG. 1, the apparatus for selecting a negative voltage receives a negative voltage signal VN1 and a selection signal SEL for allowing a desired voltage to be outputted to an output terminal OUT. The apparatus includes an inverter INV0, a first high-voltage PMOS transistor PM11, a second high-voltage PMOS transistor PM12, a first high-voltage NMOS transistor NM11, a second high-voltage NMOS transistor NM12, a third high-voltage NMOS transistor NM13, and a fourth high-voltage NMOS transistor NM14.
The inverter INV0 inverts the selection signal SEL to output an inverted selection signal SELb.
The first high-voltage PMOS transistor PM11 has a source and a bulk to which a supply voltage VDD is applied, a gate connected to a node of the inverted selection signal SELb, and a drain connected to a node of a voltage-off signal VEEOFF.
The second high-voltage PMOS transistor PM12 has a source and a bulk to which the supply voltage VDD is applied, a gate to which the selection signal SEL is applied, and a drain to which a voltage-on signal VEEON is applied.
The first high-voltage NMOS transistor NM11 has a source and a bulk to which a negative voltage signal VN1 is applied, a gate to which the voltage-on signal VEEON is applied, and a drain connected to the node of the voltage-off signal VEEOFF.
The second high-voltage NMOS transistor NM12 that has a source and a bulk to which the negative voltage signal VN1 is applied, a gate connected to the node of the voltage-off signal VEEOFF, and a drain connected to the node of the voltage-on signal VEEON.
The third high-voltage NMOS transistor NM13 has a source and a bulk to which the negative voltage signal VN1 is applied, a gate connected to the node of the voltage-on signal VEEON, and a drain connected to an output terminal OUT.
The fourth high-voltage NMOS transistor NM14 has a source to which a ground voltage VSS is applied, a gate connected to the node of the voltage-off signal VEEOFF, and a drain and a bulk connected to the output terminal OUT.
An operation of the apparatus having the above-described configuration is described as follows.
First, when the selection signal SEL is equal to the ground voltage VSS of a logic low, the ground voltage VSS is applied to the gate of the second high-voltage PMOS transistor PM12, and thus, the second high-voltage PMOS transistor PM12 is turned on to output the supply voltage VDD on the node of the voltage-on signal VEEON.
An inverted selection signal SELb has a supply voltage VDD level equal to a logic high, and is produced by the inverter INV0, which inverts the selection signal SEL. The supply voltage VDD, that corresponds to the inverted selection signal SELb, is supplied to the gate of the first high-voltage PMOS transistor PM11, thereby turning off the first high-voltage PMOS transistor PM11.
The supply voltage VDD on the node of the first voltage-on signal VEEON is inputted to the gate of the first high-voltage NMOS transistor NM11 to turn on the first high-voltage NMOS transistor NM11, and thus, the negative voltage signal VN1 is outputted on the node of the voltage-off signal VEEOFF.
The voltage-off signal VEEOFF on the node receiving the negative voltage signal VN1 is applied to the gate of the second high-voltage NMOS transistor NM12 to turn off the second high-voltage NMOS transistor NM12.
The voltage-off signal VEEOFF on the node receiving the negative voltage signal VN1 is applied to the gate of the fourth high-voltage NMOS transistor NM14 to turn off the fourth high-voltage NMOS transistor NM14.
Therefore, when the supply voltage VDD on the node of the voltage-on signal VEEON is inputted to the gate of the third high-voltage NMOS transistor NM13, the third high-voltage NMOS transistor NM13 is turned on, and the negative voltage signal VN1 is outputted on the output terminal OUT.
Next, when the selection signal SEL is equal to the supply voltage VDD of a logic high, the supply voltage VDD is applied to the gate of the second high-voltage PMOS transistor PM12 to turn off the second high-voltage PMOS transistor PM12.
The selection signal SEL is inputted to the inverter INV0, which inverts the selection signal SEL, and thus the node of the inverted selection signal SELb has a ground voltage VSS equal to a logic low.
The ground voltage VSS on the node of the inverted selection signal SELb is inputted to the gate of the first high-voltage PMOS transistor PM11 to turn on the first high-voltage PMOS transistor PM11, and thus, the supply voltage VDD is outputted on the node of the voltage-off VEEOFF.
The supply voltage VDD on the node of the voltage off VEEOFF is inputted to the gate of the second high-voltage NMOS transistor NM12 to turn on the second high-voltage NMOS transistor NM12, and thus, the negative voltage signal VN1 is outputted on the node of the voltage-on VEEON.
The negative voltage signal VN1 on the node of the voltage on VEEON is inputted to the gate of the first high-voltage NMOS transistor NM11 to turn off the first high-voltage NMOS transistor NM11.
The negative voltage signal VN1 on the node of the voltage on VEEON is inputted to the gate of the third high-voltage NMOS transistor NM13 to turn off the third high-voltage NMOS transistor NM13.
Therefore, when the supply voltage VDD on the node of the voltage-off signal VEEOFF is inputted to the gate of the fourth high-voltage NMOS transistor NM14, the fourth high-voltage NMOS transistor NM14 is turned on, and the ground voltage VSS is outputted on the output terminal OUT.
As described above, the apparatus for selecting a negative voltage outputs the negative voltage signal VN1 or the ground voltage VSS on the output terminal OUT according to the logic level of the selection signal SEL.
However, the apparatus for selecting a negative voltage is dedicated for only one negative voltage signal (VN1) and a ground voltage (VSS). Further, in all modes, only when the negative voltage signal is lower than or equal to 0 V corresponding to the ground voltage VSS, is the apparatus for selecting a negative voltage capable of operating.
On the other hand, in flash EEPROMs using a PMOS transistor as a memory element, a plurality of negative voltages may be used depending on modes (e.g., programming, erasure, or read), and a relatively lower voltage among the plurality of negative voltages may be changed depending on modes. For this reason, the related art apparatus for selecting a negative voltage cannot be applied to the flash EEPROMs. For example, when the levels of negative voltages differ depending on a mode such as programming, erasure, or read, the related art apparatus for selecting a negative voltage cannot select and output a desired negative voltage suitable for each mode.

Voltage output circuit and apparatus for selectively outputting negative voltage using the same