Disclosed is a memory access control device for a memory organized in 2.sup.n byte words and having the capability of addressing each byte in a word under control of byte select signals (BS), through an m-byte wide bus 22, with 2.sup.n /m being an integer k, to write or read data byte bursts comprising a variable count of bytes. For writing, k sets of m bytes received from bus 22 are stored into 2.sup.n registers 40 during each bus period T; they are then transferred into buffer 30 which comprises successive location of 2.sup.n bytes positions, through an alignment and control logic 42, which causes the buffer to be written in such a way that it maps the data arrangement in memory. This depends upon the least significant bits of the memory starting address determining the byte location within the memory words. Once the complete data burst is written into the buffer, the buffer content is transferred to the memory.

In the telecommunication world, communication is the key word. This is true not only for communication controllers, but also for computing systems, where components are embedded in a memory hierarchy, with each level in the hierarchy consisting of modules of larger capacity, slower access time and cheaper cost per bit.
Today, large and very large scale integration allows the manufacturing of fast random access memories which can conveniently used for the lower level of the hierarchy. However, optimization of the access to primary memory i.e. the main memory is still desirable. There is a considerable gap between the access times between the various levels of the hierarchy.
There are two major considerations for the treatment of input-output I/O device operations. First, the speed factor relates to the fact that the faster I/O devices are at least three orders of magnitude slower than the main storage. When the I/O device is fast and when the information block to transfer is several words long, an approach based on a buffering concept can be used. The I/O device requests an information transfer by specifying the memory address and the block length.
Second, the data format factor relates to the fact that because of the variety of the I/O devices and memory organizations, a logical interface must be inserted to adapt the different data structures of the I/O devices and of the memory.
To improve their intrinsic failure rate and thus the service cost, the memories are provided with an Error Correcting Code (ECC) capability. The number of ECC bits needed to reach a given detection/correction level is roughly a logarithmic function of the numbers of bits which are processed.
For example, to achieve a single error correction and a double error detection, six ECC bits are needed for two data bytes, seven ECC bits are needed for four data bytes and eight ECC bits are needed for eight data bytes. Hence it is more economical to organize the main memory in words of several bytes width, preferably matching the width of the processor data path, in order to save ECC bits. All mid-size to large size computers have a main storage with a width of m bytes. Now, a conventional value for m is 4 or 8. However, the information burst received from or to be sent to an I/O device does not generally start on a word boundary and this leads to a great performance degradation because for each I/O write operation, the memory controller must:
read the target word in memory, PA0 check the ECC bits and correct the error if any, PA0 merge the I/O data in the word, PA0 compute the new ECC bits, PA0 write the new data and new ECC bits in memory. PA0 clocking means which provide k non-overlapping pulse streams (T1, T2) having the same period T, PA0 memory format adapting means comprising:
This sequence, which is called a "Read Modify Write", impairs the performance of the memory.
Another problem results from the fact that the I/O device format width does not generally match the memory width.
All these problems are generally solved by putting the burden on the I/O device. This device usually must have its own buffer providing data which matches the memory width. A further burden is put on the software which must cause all the I/O data transfers to start at an memory word boundary. Otherwise the Read Modify Write performance penalty is to be paid.

Adapting device for accommodating different memory and bus formats


A rotary, die cutting anvil system having a rotatable head with a cover mounted on the peripheral surface thereof. The cover includes inner and outer laminated layers. The outer layer is made of a generally tough resilient composition that is softer than the hard inner layer to which it is bonded. The inner layer has holes for receiving pins. The cover is mounted on the head by forcing the pins into the holes. The resilience and shape of the hard inner layer maintains the cover on the anvil until it is pryed off. The pins may be fixed to the anvil head or be fixed on rings or sleeves slidably mounted in grooves on the periphery of the anvil head to permit linear or oscillatory freewheeling.

This invention pertains generally to die cutting. More specifically, this invention relates to anvil covers for use in conjunction with die cutting apparatus.
In the rotary die cutting art, rotary anvil constructions employ covers of tough resilient material, such as rubber, synthetic rubber, polyurethane, and the like, against which the cutting dies work. U.S. Pat. Nos. 3,522,754; 4,073,208; 3,282,142; 3,274,873; and 4,073,207 disclose a number of typical rotary anvil constructions. These patents also disclose several variations of removable anvil covers. The primary function of these covers is to provide a relatively tough uniform surface against which the sharp blade of a die cutter will work when cutting thin sheets or webs such as cardboard, corrugated paper or the like. To be of practical use, such removable covers should be relatively long lasting, inexpensive to manufacture, readily restorable or cheap enough to be disposable, and easy to mount and remove so as to avoid excessive downtimes during replacement.
Those concerned with the development of such removable anvil covers have long recognized that long cover life is best achieved when the cover provides a uniform resistance to the cutter penetration during operation. As can been seen from the above cited patents, attempts to develop such long lasting, easily replaceable anvil covers have included cover and anvil combinations with ribs, grooves, reinforcing materials, interlocking lugs, recesses, and a variety of other complex mounting structures. Although prior art cover structures have resulted in some success at providing more uniform cutting surfaces, thereby increasing cover life, many have been unduly complex. As such, many prior art covers have proved to be relatively expensive to manufacture and often cumbersome to use. For example, it is generally felt that many available covers are unduly time consuming for an operator to mount or replace when worn, thereby resulting in unnecessary downtime. Additionally, many prior art covers have been found to be so complex that users desiring to incorporate them into their present equipment normally have to bear the enormous expense of replacing the entire drum-anvil-cover combination.


A pneumatic rubber tire having an integral innerliner of a sulfur cured rubber composition comprised of an acrylonitrile/diene copolymer rubber with specified Tg range and at least one designated additional rubber having a Tg of a specified range.

The inner surface of pneumatic rubber tires is typically comprised of an elastomeric composition designed to prevent or retard the permeation of air and moisture into the carcass from the tire's inner air chamber. It is often referred to as an innerliner. Innerliners have also been used for many years in tubeless pneumatic vehicle tires to retard or prevent the escape of air used to inflate the tire, thereby maintaining tire pressure. Rubbers which are relatively impermeable to air are often used as a major portion of said innerliners and can include butyl rubber and halobutyl rubbers. U.S. Pat. No. 3,808,177 discloses other polymers which may also be relatively impermeable. It is known that acrylonitrile/butadiene copolymers can be relatively impermeable.
The innerliner is normally prepared by conventional calendering or milling techniques to form a strip of uncured compounded rubber of an appropriate width, which is sometimes referred to as a gum strip. Typically, the gum strip is the first element of the tire to be applied to a tire building drum, over and around which the remainder of the tire is built. When the tire is cured, such innerliner becomes an integral, co-cured, part of the tire. Tire innerliners and methods of preparation are well known to those having skill in such art.
The preparation of a gum strip composed entirely of compounded chlorobutyl or bromobutyl rubber has been observed to have some processing and fabrication problems such as sticking to processing equipment during the milling and calendering operations.
Furthermore, it has sometimes been desired to provide a gum strip composition for the innerliner which has suitable processing properties, building tack in its uncured state and cured adhesion to the tire carcass while also having a satisfactory degree of air impermeability.

Pneumatic tire having air retention innerliner


A voltage control device includes an output module and a control module. The output module provides an output current at an output terminal thereof based on a control voltage. The control module includes a comparing circuit, a capacitor, a charging circuit and a discharging circuit. The comparing circuit compares a to-be-compared voltage, which is associated at least with a to-be-controlled voltage at the output terminal of the output module, with a predetermined reference voltage to generate a comparison signal. The capacitor provides the control voltage. The charging circuit is operable to charge the capacitor based on the comparison signal. The discharging circuit is operable to discharge the capacitor based on the comparison signal.

A conventional power supply device for an LED (light emitting diode) module uses a single-stage power factor correction scheme, and generates, based on an alternating current (AC) input voltage of 50 Hz or 60 Hz, a direct current (DC) driving current to drive the LED module. The driving current generally has a relatively large ripple component at 100 Hz or 120 Hz, resulting in flickering of light emitted from the LED module which may cause visual fatigue of a user.

Voltage control device with gate capacitor charging and discharging


An electronic device, such as an opto-electronic device and an integrated semiconductor memory device, includes at least one integrated memory point structure including a quantum well semiconductor area buried in the substrate of the structure and disposed under the insulated gate of a transistor. A biasing voltage source is adapted to bias the structure to enable charging or discharging of charges in the quantum well or outside the quantum well.

This application is based upon and claims priority from prior French Patent Application No. 0016174, filed on Dec. 12, 2000, the entire disclosure of which is herein incorporated by reference.
1. Field of the Invention
The invention related to integrated circuits and more particularly to semiconductor memory devices and especially, although not exclusively, to so-called xe2x80x9cembeddedxe2x80x9d memories, which are implemented conjointly with other components by the same technological process, for example, and intended to be integrated together into an application-specific integrated circuit (ASIC).
2. Description of the Prior Art
Dynamic random access memories (DRAM) represent close to two thirds of worldwide memory production. At present, in the integration race, there a two dominant architectures, known to those of ordinary skill in the art by the names xe2x80x9ctrench cellsxe2x80x9d and xe2x80x9cstacked cellsxe2x80x9d.
In a trench cells architecture the memory capacitor is implemented by a trench formed in the substrate alongside the memory point access transistor.
In a stacked cells architecture the memory capacitor is implemented on top of the access transistor and projects slightly from it.
Although technologically complex, these two architectures are easier to apply to integrated circuits including only memories, and are difficult to integrate as embedded memories in integrated circuits, especially in CMOS integrated circuits.
Memories available off the shelf include read-only memories and in particular electrically-programmable read-only memories (EPROM). These memories have the advantage of a more compact overall size than a DRAM, but the drawback of a longer read time than a DRAM.
On the other hand, a DRAM has a shorter read and write time than an EPROM, but its overall size is larger.
Accordingly, there exists a need for overcoming the disadvantages of the prior art as discussed above, and in particular for providing a memory device that is small in size while fast in operation.
The invention aims to propose a new integrated semiconductor memory device that combines the advantage of small overall size, like that of an EPROM, with a read and write time comparable to that of a DRAM, i.e. faster than an EPROM.
A preferred embodiment of the present invention therefore proposes an integrated semiconductor memory device including at least one integrated memory point structure including a quantum well semiconductor area buried in the substrate of the structure and disposed under the insulated gate of a transistor. The device also includes biasing means adapted to bias the structure to enable charging or discharging of charges in the quantum well or outside the quantum well.
One benefit of the proposed structure is that the quantity of charge stored is very small, which eliminates the need for a dedicated storage capacitor. The read sensitivity is not destroyed however, thanks to using the gain of the transistor in the read process. The structure according to the invention therefore has the advantage of a charge storage area under the access transistor with a very short read and write time, and accordingly has integration and density capabilities improved over the architectures of memories currently in production.
What is more, the greater sensitivity of the new structure also predisposes it to opto-electronic applications, for example in image sensors, light detectors or opto-electronic components.
Unlike EPROM structures, the barrier that traps the charges is a quantum well, rather than a layer of oxide, which means that the process of charging and discharging the memory according to the invention does not require the passage of a current through an oxide. This is particularly advantageous from the point of view of speed and the reliability of the memory structure according to the invention.
In one embodiment of the invention, the substrate is formed of a first semiconductor material having a first type of conductivity. The first material can be P-doped silicon, for example if the memory is an NMOS structure. The quantum well area is formed of a buried semiconductor layer and composed of a second semiconductor material having the first type of conductivity and a gap between the valency band and the conduction band smaller than the corresponding gap of the first material.
The second material can be a silicon-germanium alloy, for example. The memory point structure also includes buried insulative regions extending laterally between said buried semiconductor layer (the quantum well) and the source and drain regions of the transistor. The memory point structure also includes a channel region of the transistor situated in the upper part of the substrate above the buried semiconductor layer, and weakly doped source and drain extension areas (NLDD areas in the case of an NMOS structure) extending between the channel region and the source and drain regions and over at least part of the buried insulative regions.
In this regard, it is preferable for the length of the quantum well area to be substantially equal to the length of the gate. This is because, the shorter the quantum well area, the less memory effect the structure will have. Conversely, the larger the quantum well area, the higher the risk of recombination of carriers between the quantum well area and the source and drain extension areas.
One of ordinary skill in the art will naturally know how to adjust the length of the quantum well area to suit the intended application.
When the first material is silicon and the second material is a silicon-germanium alloy, the percentage of germanium affects the height of the barrier xe2x80x9cseenxe2x80x9d by the carriers trapped in the quantum well and the connection of the lattices with the silicon during the epitaxial growth process used in the fabrication of the device according to the invention.
To be more precise, the lower the percentage of germanium, the lower the barrier seen by carriers trapped in the quantum well.
Also, the higher the percentage of germanium, the more problematical the linking of the silicon-germanium lattice with the silicon lattice will be during epitaxial growth.
In other words, the higher the percentage of germanium, the greater the risk of relaxation of the silicon-germanium, causing the appearance of dislocations in the silicon, and possibly leading to non-functioning of the memory.
Once again, one of ordinary skill in the art will know how to adjust the percentage of germanium to be used, in particular as a function of the thickness of the material. For example, a percentage of germanium less than or equal to 50% and greater than or equal to 20% would be chosen for a thickness of the order of 10 nanometers. The percentage of germanium could be increased for smaller thicknesses.
The doping of the quantum well area also affects the behavior of the memory point structure. The higher the doping of the quantum well area, the higher the barrier. Conversely, the lower the doping of the quantum well area, the lower the barrier, leading to a shorter charge confinement time, and consequently a faster loss of the memory effect.
The doping used depends on the intended application. For example, the quantum well area can be doped to a concentration from 1017 at/cm3 to 1020 at/cm3.
Similarly, the doping of the substrate is advantageously chosen to be sufficient to enable operation of the transistor. It is also preferable for the doping not to be too high. In the area of the conduction channel of the transistor (in the upper part of the substrate), doping that is too high can modify the drain current due to the presence of confined holes, while in the area of the substrate (in the lower part of the substrate), doping that is too high affects the curvature of the valency band and consequently the tendency of the charges to be evacuated.
For example, the substrate is preferably doped to a concentration less than or equal to 1019 at/cm3 and greater than 1015 at/cm3.

Integrated semiconductor memory device having quantum well buried in a substrate


A dual stretch band includes a first loop sized for receiving a wearer's hand and a second loop sized for receiving a personal computing device. The first loop and the second loop may be joined at one or more dual stretch band seams.

Personal computing devices are ubiquitous in modern society. Many users of personal computing devices prefer to have their personal computing device on them at all times, including when exercising or during other vigorous activity. Indeed, such a computing device may be critical to a particular exercise or routine as an instructional or tracking tool. It is not surprising then that users of personal computing devices are using them during rigorous activity more and more.
The attention of a user may be focused away from a personal computing device during exercise, such as on a jogging route or a breathing routine and other actions of the user may inhibit the user's coordination or attention to the device. Still, the user may find it necessary to view the device during a routine and thus may handle the device while distracted. Thus, it may be more likely that a user fumbles, mishandles, or drops their personal computing device during exercise. Accordingly, apparatuses and methods for preventing such mishandling are necessary.

Dual band apparatus for handling a personal computing device


A negative electrode material powder for a lithium ion secondary battery having a conductive carbon film on the surface of a lower-silicon-oxide powder; wherein a specific surface area in BET measurement ranges from more than 0.3 m2/g to 40 m2/g, and no SiC peak appears at 2θ=35.6°±0.01° or the half-value width of the appeared peak is 2° or more in XRD measurement using CuKα rays. The proportion of said carbon film preferably ranges from 0.2% to 2.5% by mass. Said powder preferably has 100000 Ωcm or less of specific resistance. In XRD, P2/P1<0.01 is preferably satisfied between the highest value P1 of halo of SiOx and a value P2 of the strongest linear peak of Si (111) above the halo.

In association with a recent noticeable development in a portable electronic equipment, communication equipment and the like, development of secondary batteries with high energy density is strongly requested from the viewpoint of the economic efficiency and reduction in size and weight of the equipment. Currently available secondary batteries with high energy density include a nickel-cadmium battery, a nickel hydrogen-battery, a lithium ion secondary battery, a polymer battery and the like. Among these batteries, demand for the lithium ion secondary battery is strongly growing in the power source market due to its dramatically enhanced life and capacity, compared with the nickel cadmium battery or nickel-hydrogen battery.
FIG. 1 is a view showing a configuration example of a coin-shaped lithium ion secondary battery. The lithium ion secondary battery includes, as shown in FIG. 1, a positive electrode 1, a negative electrode 2, a separator 3 impregnated with electrolyte, and a gasket 4 which seals what is contained in the battery while maintaining the electric insulation between the positive electrode 1 and the negative electrode 2. When charging and discharging are performed, lithium ions reciprocate between the positive electrode 1 and the negative electrode 2 through the electrolyte of the separator 3.
The positive electrode 1 includes a counter electrode case 1a, a counter electrode current collector 1b and a counter electrode 1c, and lithium cobaltate (LiCoO2) or manganese spinel (LiMn2O4) is mainly used for the counter electrode 1c. The negative electrode 2 includes a working electrode case 2a, a working electrode current collector 2b and a working electrode 2c, and a negative electrode material used for the working electrode 2c generally includes an active material capable of occluding and releasing lithium ions (negative electrode active material), a conductive auxiliary agent, and a binder.
As the negative electrode active material for lithium ion secondary batteries, conventionally, a composite oxide of lithium and boron, a composite oxide of lithium and transition metal (V, Fe, Cr, Mo, Ni, etc.), a compound including N and O as well as Si, Ge or Sn, Si particle the surface of which is coated with a carbon layer by chemical vapor deposition, and the like are proposed.
However, each of these negative electrode active materials makes deterioration of an electrode significant since dendrite or a passivated compound is generated on the electrode according to repeated charging and discharging, or enhances the expansion or contraction thereof during occlusion and release of lithium ions, although it can improve the charging and discharging capacities to enhance the energy density. Therefore, lithium ion secondary batteries using these negative electrode active materials are insufficient in the maintainability of discharge capacity by repeated charging and discharging (hereinafter referred to as "cycle characteristics").
Meanwhile, it is conventionally attempted to use powders of generic silicon oxide represented by SiOx (0<x≦2), such as SiO, as the negative electrode active material. The silicon oxide can be a negative electrode active material with a larger effective charging and discharging capacity, since it is lower (less noble) in electrode potential than lithium and can reversibly occlude and release lithium ions without deterioration during charging and discharging such as collapse of a crystal structure by the occlusion and release of lithium ions or generation of an irreversible substance. Therefore, the silicon oxide can be used as the negative electrode active material to obtain a lithium ion secondary battery which is higher in capacity than in a case using carbon and is much better in cycle characteristics than in a case using a high-capacity negative electrode material such as Si or Sn alloy.
When the silicon oxide powder is used as the negative electrode active material, in general, carbon powder or the like is mixed thereto as a conductive auxiliary agent for compensating the low electric conductance of the silicon oxide. This allows the electric conductivity to be secured around a contact portion between the silicon oxide powder and the conductive auxiliary agent. However, at locations far away from the contact portion, the silicon oxide powder is less likely to function as the negative electrode active material since the electric conductivity cannot be secured.
In order to solve this problem, proposed in Patent Literature 1 is a conductive silicon composite for a negative electrode material for use in a non-aqueous electrolyte secondary battery which contains a film of carbon formed on the surface of a particle having a structure in which microcrystals of silicon are dispersed in silicon dioxide (conductive silicon composite), and a method for producing the same.

Negative electrode material powder for lithium ion secondary battery, negative electrode for lithium ion secondary battery, negative electrode for capacitor, lithium ion secondary battery, and capacitor

Abstract: Accordingly, said powder can be used in the secondary battery with a large discharge capacity and a preferable cycle characteristics for practical use.


A beneficiation process and apparatus for the continuous treatment of comminuted woody biomass, particularly hog fuel, to substantially remove mineral impurities and bark and to recover white wood therefrom for use as industrial feedstocks.

Current processing of woody biomass using tub grinders, chippers, and horizontal grinder/shredders produces commingled piles of wood, bark, needles, soil, and debris. The primary markets for such material are compost or combustion energy. Our previous characterization suggested that half or more of the comminuted biomass from forest residuals, tree service firms, and whole-tree chipping is bole or branch wood (aka "white wood") which has significant positive value as furnish for particle board, premium grade fuel pellets, fiberboard, and second generation biofuels. The difference in price between hog fuel/compost and white wood chips can be anywhere from $20 to $60 per ton. Thus, if cost-effective sorting technologies can be developed, a substantial amount of new white wood fiber will be added to the marketplace.


A liquid crystal display driver has a 1/4-duty binary-voltage driving system. This driving system generates at least four separate common signals and at least eleven separate segment signals. Although the duty cycle is 1/4. V.sub.on /V.sub.off ratio of the effective value is greater than 1.7. This is accomplished by using four common electrodes and seven segment electrode per each individual pattern generator.

1. Field of the Invention
The present invention relates to a liquid crystal display driver for use in a display unit of a desktop electronic calculator (hereinafter referred to as calculator) or the like.
2. Description of the Prior Art
For duty-driving a liquid crystal display (hereinafter abbreviated LCD), it is necessary to apply a bias voltage so as to obtain a proper on-off effective value. In this operation, at least three voltages have been required inclusive of two intermediate level voltages in addition to a supply voltage. For example, in a dry battery type calculator, a driving operation is performed with 1/3 duty .multidot.1/3 bias or 1/4 duty.multidot.1/3 bias having two values of intermediate level voltage. The above 1/3 duty.multidot.1/3 bias is achieved by signals of the conventional waveforms shown in FIG. 7. Supposing now E=1.5 V, the V.sub.ON /V.sub.OFF ratio .alpha. becomes .sqroot.3.apprxeq.1.73. In a solar battery type calculator (hereinafter referred to as SB calculator), it is customary to perform a driving operation with 1/3 duty.multidot.1/2 bias having three values of a solar battery voltage, a doubled voltage of the battery obtained through a booster and an intermediate level voltage. In the former dry battery type calculator where intermediate level voltages are obtained by division through a bleeder resistor, the current is slight. However, in the latter SB calculator where the set current is as small as 1/2 to 1/3 of the bleeder current in the dry battery type, it is impossible to adopt a means for producing an intermediate level voltage by a bleeder resistor. Therefore, its power source is formed by the use of a booster equipped with two capacitors outside of an LSI. In the above structure, the number of required component parts is increased due to the necessity of a booster, rendering the circuit configuration complicated.
Meanwhile, with regard to another system for duty-driving the LCD at two voltages of a single power source without using such booster which causes the above-mentioned disadvantages, there is a conventional pulse control system that executes driving by pulses of the waveforms shown in FIG. 8 or 9. In the 1/2 duty pulses of FIG. 8: (a) shows a waveform H1 where h1 represents a selection period and h2 a half selection period; and (b) shows another waveform H2 where h2 represents a selection period and h1 a half selection period. The waveform so shaped as to apply a voltage during each selection period has an effective on-value in common, while the waveform so shaped as not to apply any voltage has an effective off-value.
When E=1.5 V, V.sub.ON =.sqroot.3/4.multidot.E=1.3 V and V.sub.OFF =.sqroot.1/4.multidot.E=0.75 V. Therefore the V.sub.ON /V.sub.OFF ratio e becomes .sqroot.3.apprxeq.1.73. Meanwhile, in the 1/3 duty pulse shown in FIG. 9, V.sub.ON =1.22 V and V.sub.OFF =0.87 V, so that .alpha.=1.41. Although it is possible to produce a 1/4 duty waveform in a similar way, the ratio .alpha. comes to be so small as 1.29. Since the contrast of the LCD becomes higher with increase of the ratio .alpha., it is customary in the calculator to adopt a system that ensures a greater value of .alpha. exceeding 1.73.
The number of signals required for driving the LCD elements can be reduced as the denominator in the LCD-driving duty factor becomes greater, in such a manner that 1/3 is superior to 1/2, 1/4 to 1/3 and so forth. Therefore, duty drive with such a greater value is desirable on condition that the same display quality can be achieved.
However, in the conventional structure mentioned above, 1/2 duty is the limit due to the value of a for pulse-driving the liquid crystal display in the calculator, and 1/3 duty is not employable with respect to the display quality or contrast. Meanwhile for LCD drive in the SB calculator, a 1/3 duty.multidot.1/2 bias system is adopted in most cases. In driving an 8-digit LCD, for example, the required signals are 27 in total. As compared therewith, at least 36 signals are required when using 1/2 duty pulses which consequently bring about an increase in the chip size of an LSI and also a larger number of package pins, thereby causing higher costs of production.


An actuating device is provided for closing and opening a door or lid lock and correspondingly switching a light on and off during the opening and closing of the door or lid. This actuating device also makes it possible to switch off the light permanently when the door or lid is open, because the switch is switchable indirectly per se as a result of movements of a rotary latch and can be switched manually into its switch-off position independently of the actuating device.

The invention relates to an actuating device for an electrical switch which switches a light on and off during the opening and closing of a door or lid of a motor-vehicle body. The door or lid is closeable by means of a latch, which provides a mechanism for voluntarily switching the switch into a switch-off position and for keeping it in this switch-off position when the door or lid is open.
An actuating device of this general type can be found in German Offenlegungsschrift 2,003,204. There a pressure switch has an actuating tappet which is longitudinally displaceable and, when the door/lid is closed, is held in a switch-off position with the switch contacts separated and, when the door/lid is open, is brought by spring force into a switch-on position, with the switch contacts connected. That is the generally known functioning of conventional door-lid contact light switches.
To voluntarily switch off a light, switchable on and off by means of the switch contacts, and to relieve the vehicle battery when the door/lid remains open for relatively long periods, the actuating tappet can be pulled out of its switch-position by hand. Then, after overcoming a catch, it assumes a stable third position in which the switch contacts are separated once more. The actuating tappet can be returned to its normal switch-on or switch-off position either by hand, or simply "automatically" as a result of the closing of the door/lid.
There are also vehicles (for example, the VW Passat Variant), in which a boot light is switched on and off as a function of the position of a lock latch by means of an electrical switch assigned to the latch. Here too, it is possible for the light to be switched off voluntarily, with the boot lid open - by bringing the lock latch into a closing position. However, to switch the light on again before the boot lid is closed and to avoid damage at the lock when the boot lid is closed, the outer lock handle then has to be actuated to bring the lock latch again into its release position. An automatic return is not possible.
The object of the invention is to develop the actuating device in such a way that it can be used for a switch which per se is to be switched as a function of positions of a lock latch.
According to the invention, this object is achieved by having a switch-actuating lever acting on the switch in response to an opening and closing of a latch mechanism of the lock into a switch-off position and a switch-on position of the switch and wherein one can voluntarily and independently of the latch move the lever into a stable disengaged position to move the switch into its switch-off position, only when the said latch is in the release position.
It is also advantageous if a driver coupling is provided which couples the switch-actuating lever to movements of the latch and which can be actuated manually to transfer the switch-actuating lever into a stable disengaged position up against a stationary stop and hold it in the disengaged position. The driver coupling is then returnable to an operating position by the latch as it moves into its closing position during the closing of the door or lid. The switch-actuating lever is movably arranged in the lock on a lock carrier and is coupled, via the driver coupling (designed as a bistable catch coupling), to a transmission lever, likewise movably arranged on the lock carrier. The transmission lever is driveable by the lock latch when moved into the closing position. During the voluntary manual transfer of the switch-actuating lever into the disengaged position up against a stop, the catch coupling can be reversed from a first-operational-catch position into a second-disengaged-catch position. When the latch is moved into its closing position, the switch-actuating lever is pressed against the stop by the transmission lever and the catch coupling is returned to the first position again. The transmission lever and the switch-actuating lever are designed as pivoting levers which are mounted on a common shaft axle, fixed to the lock carrier, and which are pivotable through a limited angle .alpha. relative to each other. Both the transmission and the switch actuating levers are two-armed. The transmission lever possesses a recess limited by a spring web and the switch-actuating lever possesses a projecting pin, engaging into the recess. The recess forms a limited path of movement for the pin and is arranged at a radial distance from the common shaft of the two levers and extends over the limited angle .alpha.. The spring web has a catch cam which projects into the recess and by which the first and second catch positions of the catch coupling, or of the pin and of the switch-actuating lever, are defined.
The transmission lever is prestressed resiliently against a buffer, which is fixed to the lock carrier, and against which it rests when the latch is in the release position, and from which it can be lifted off via a lever projection and a nose of the latch moving into its closing position.
It is also advantageous if a take-up structure is provided on the switch-actuating lever for applying the manual disengaging force. A handle with a keyhole, axially aligned with the common pivot shaft is provided on the switch-actuating lever.
A force of a spring prestressing the transmission lever to a switch-on position should be higher than the catching force which can be exerted, in order to reverse the catch coupling when the switch-actuating lever is being transferred into its disengaged position.
Another advantageous structure for the interlock would be to have the switch-actuating lever coupled to the latch itself by a driver coupling to be fixed positively by a detent pawl, disengageable both during the transfer of the switch-actuating lever into its stable disengaged position and during movement of the latch into the closing position. Here the detent pawl, fixing the disengaged position of the switch-actuating lever, is movable together with the latch on the same shaft and is also provided for locking the latch in its closing position. The detent can be returned to its detent position after the release of the latch. Under such an arrangement, the driver coupling possesses a spring which prestresses the switch-actuating lever from the latch towards the detent pawl. This spring is weaker than a spring force prestressing the latch toward its release position and keeping it there. The driver coupling is formed by projections on the latch which are, at least, indirectly in positive contact with the switch-actuating lever. The spring is arranged between an abutment of the switch-actuating lever and one of the projections of the latch and prestresses the switch-actuating lever up against the other projection of the latch towards the release position of the latch. Thus, as a result of the deformation of the spring, the switch-actuating lever can be brought (independently of the latch) into its disengaged position fixed by the detent pawl.
It is also advantageous if the switch-actuating lever is provided with a contour which faces the switch and by means of which the switch is switched into its switch-off position just immediately before the latch returns into its closing position. This preferably occurs when the latch, designed as a rotary latch, is only at an angle of 10.degree. away from its closing position.
It is known (German Offenlegungsschrift 3,500,550) to switch an electrical switch indirectly by a detent pawl as a function of positions of a lock latch. There, the switch is integrated into the control of a central locking system. The detent pawl can be disengaged, counter to a spring force by a lock handle. At the same time as the lock latch is released the switch loaded by the detent pawl, is opened. After the lock handle has been let go, the detent pawl returns to its detent position under the spring force and closes the switch once more. A stable disengaged position of the detent pawl is not provided and would even impair the functioning of the mechanism if provided. In the arrangement according to German Offenlegungsschrift 3,500,550, the switch assumes the same switch (on) position in the two end positions of the lock latch. Only in an intermediate pre-catching position of the detent pawl or the lock latch (which should normally not occur) can it be opened permanently.
In contrast to the general state of the art, in which three switch-contact positions--two "off" and one "on"--are necessary, the actuating device according to the invention can advantageously be combined with a customary two position on/off switch.
In an advantageous development, the disengaged position of the switch-actuating lever, when the lock latch is in the release position, corresponds to its operating position when the latch is in the closing position.
In the actuating device according to the invention, the normal relative position between the switch-actuating lever and the latch can be restored automatically in an especially simple way by closing the door or lid.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.

Actuating device for an electrical switch


The present invention is directed to a method for producing a copolymer and a copolymer product of the method. The copolymer is prepared by a controlled radical polymerization process, typically an atom transfer radical polymerization process, in which polymerizable alkene monomers are polymerized in the presence of a halogenated polyolefin macroinitiator. The copolymer product of this process is useful in a film-forming composition that adheres strongly to polyolefinic substrates and to which non-polyolefinic film-forming compositions strongly adhere. The copolymer can be applied to a substrate in an adhesion-promoting layer or can be incorporated into a film-forming composition, such as a primer, that contains additional resinous compounds.

The present invention relates to adhesion promoters that improve adhesion between film-forming coatings and adhesives and polyolefinic substrates. The adhesion promoters are prepared by controlled radical polymerization using a halogenated polyolefin as a macroinitiator.
Polyolefins, such as polypropylene and polyethylene are used in a wide variety of molding applications including, for example, in preparation of molded parts for use in the automotive, industrial and appliance markets. The preparation of such molded articles generally includes the steps of molding an article from the polyolefin resin and applying to the molded article one or more film-forming coating layers to protect and/or color the article and/or an adhesive to attach the molded article to another article.
One difficulty with use of poyolefinic substrates is that typical film-forming coatings and adhesives do not adhere well to the substrate. In the case of a film-forming coating applied to the substrate, the layer delaminates. In the case of adhesives, adhesive failure is commonplace.
A solution to the failure of coatings and adhesives to adhere to the polyolefinic substrate is to include a layer of a film-forming composition including a chlorinated polyolefin (CPO) between the substrate and the film-forming coating or adhesive. This adds a processing step and, since chlorinated polyolefins are relatively expensive, adding to the cost of using polyolefins to produce molded parts.
U.S. Pat. No. 5,955,545 discloses use of CPO-acrylic graft copolymers as adhesion promoters that assertedly improve adhesion of subsequent coating layers and/or adhesives to polyolefins. However, these graft copolymer adhesion promoters are prepared by standard free radical polymerization methods and suffer from high polydispersity and the presence of non-graft polymer chains and acrylic copolymers and homopolymers in the resin composition as a result of the random nature of standard radical polymerization processes. The high polydispersity and additional non-graft chains present in the same mixture as the graft polymer results in incomplete or inefficient adhesion promotion and interference with the curing dynamics of the resin. Further, these compositions are unstable, readily falling out of solution, especially when incorporated in a film-forming composition, and they absorb and scatter light, giving a hazy appearance. Thus, they are unsuitable for many coating applications.
It is, therefore, desirable to have well defined adhesion promoting material that includes polyolefinic segments or portions that interact strongly with polyolefinic substrates as well as portions or non-polyolefinic segments that interact well with film-forming resins, crosslinkers and/or curing agents and solvents that are present in a typical coating composition. It is also desirable that the adhesion promoter be of a more defined architecture than is typically found in graft copolymers formed by a free radical process. The defined architecture will allow for design of copolymers that interact with other components of the coating composition in a consistent manner with less contamination with undesirable polymer species that typically result from free radical grafting to CPOs. The low polydispersity of the material, combined with the substantial absence of undesirable polymer species would yield a clear, stable coating additive or coating composition that would adhere well to polyolefinic substrates.
A wide variety of radically polymerizable monomers, such as methacrylate and acrylate monomers, are commercially available and can provide a wide range of properties including, for example, hydrophilic and hydrophobic properties, the ability to interact with crosslinkers, or to self crosslink.
U.S. Pat. Nos. 5,807,937; 5,789,487; and 5,763,548 and International Patent Publication Nos. WO 98/40415; WO 98/01480; WO 97/18247; and WO 96/30421 describe a radical polymerization process referred to as atom transfer radical polymerization (ATRP). The ATRP process is described as being a living radical polymerization that results in the formation of (co)polymers having predictable molecular weight and molecular weight distribution. The ATRP process is also described as providing highly uniform products having controlled structure (i.e., controllable topology, composition, etc.). The ""937 and ""548 patents also describe (co)polymers prepared by ATRP, which are useful in a wide variety of applications including, for example, dispersants and surfactants.
U.S. Pat. Nos. 5,478,886; 5,272,201; 5,221,334; 5,219,945; 5,085,698; 4,812,517; and 4,755,563 describe ABC, AB and BAB block copolymers and pigmented ink compositions containing such block copolymers. The block copolymers of the ""886, ""201, ""334, 1945, ""698, ""517 and ""563 patents are described as being prepared by living or stepwise polymerization processes, such as anionic or group transfer polymerization.
A number of initiators and macroinitiators are known to support ATRP polymerization. These initiators are described, for example, in U.S. Pat. Nos. 5,807,937 and 5,986,015. U.S. Pat. No. 5,807,937 discloses a number of initiators, including a macroinitiator, where halide groups attached to an activated benzylic carbon serve as the initiating site. The ""937 patent discloses that benzyl halides can be efficient initiators for ATRP in monomeric form as well as in a polymer.
WO 9840415 A1 discloses ATRP macroinitiators having an activated halogen, which have been prepared by chlorosulfonation of polyethylene. The chlorosulfonyl group is known to be a good ATRP initiator in monomeric form.
Paik et al. (xe2x80x9cSynthesis and Characterization of Graft Copolymers of Poly (vinyl chloride) with Styrene and (Meth) acrylates by Atom Transfer Polymerizationxe2x80x9d, Macromol. Rapid Commun., 19, 47-52(1998)) disclose that polyvinyl chloride is incapable of serving as an initiator in an ATRP process. Paik further discloses that ATRP can be initiated by the activated chlorine in a chloroacetate group attached to a PVC backbone. Paik also discloses that the secondary chlorines on the PVC backbone do not initiate ATRP. Collectively, the prior art indicates that effective ATRP macroinitiators should contain activated halogens.
In accordance with the present invention, an alkenyl (co)polymer is provided that is prepared by polymerizing alkenyl monomers in the presence of an initiator or macroinitiator (collectively xe2x80x9can initiatorxe2x80x9d) having halide groups attached to tertiary carbons under atom transfer radical polymerization conditions. An example of such an initiator is, without limitation, a halogenated polyolefin such as a chlorinated or brominated polypropylene, polybutylene or branched polyethylene. This polymer finds use in a variety of applications, such as, without limitation, in compositions for coating, molding and extruding. A typical use for the copolymer is as an additive to a film-forming resin composition for coating a polyolefinic substrate. The additive both promotes interlayer adhesion between the coating composition layer and the polyolefinic substrate and can be crosslinked into the film-forming resin.
A curable film-forming composition including the alkenyl-halogenated polyolefin copolymer is also provided. The halogen content of the halogenated polyolefin embodiment is typically either chlorine or bromine. The number of halide groups in the initiator can vary, but typically falls between about 15% to 45% by weight of the initiator, as is commonly found in commercially available halogenated polyolefins.
A method of coating a polyolefinic substrate also is provided that includes applying to the polyolefinic substrate a film-forming composition comprising the above-described vinyl-halogenated polyolefin copolymer. A coated article prepared according to the method is also described.

Acrylic-halogenated polyolefin copolymer adhesion promoters


A method and system for changing modes for ultrasonic locationing of a mobile device includes transmitting ultrasonic pulses using a transmit schedule by fixed ultrasonic emitters. When a fixed access point begins serving a new mobile device, those ultrasonic emitters proximal to the access point are deactivated and associated microphones are activated to receive an acoustic tone from the new mobile device. This acoustic tone is used to establish an initial location of the new mobile device using measurements of the received acoustic tone at each proximal microphone. The transmit schedule is adapted to accommodate the new mobile device at the initial location, and the proximal ultrasonic emitters are returned to transmit mode. In this way, an accurate starting position of the new mobile device is established without greatly interrupting other mobile devices that are currently being located.

An ultrasonic receiver can be used to determine its location with reference to one or more ultrasonic emitters, such as locating a mobile device having an ultrasonic receiver and being present within a retail, factory, warehouse, or other indoor environment, for example. The ultrasonic emitter(s) can transmit ultrasonic energy in a short pulse which can be received by an ultrasonic transducer (audio microphone) in the ultrasonic receiver. The use of several ultrasonic emitters distributed within the environment can be used to determine a specific location of a particular device using techniques known in the art such as measuring time-of-flight or signal strength of the emitter signals and using triangulation, trilateration, and the like, as have been used in radio frequency locationing systems.
However, having many mobile devices trying to establish their position within the environment, and interacting with all the emitters in the environment cannot be done simultaneously due to signal interference. One of the most valuable resources for a pulse-based time of flight (TOF) ultrasonic locationing system is time. Therefore, an advanced scheduler algorithm can be used for time-slicing, where each emitter can send its ultrasonic pulse, and there is a wait time for any echoes to settle before subsequent ultrasonic pulses are sent. The scheduler needs to coordinate which emitters are active at particular times so as to not interfere with nearby emitters. As a result, mobile devices are limited in how often they can update their location, i.e. location update rate. The location update rate of the system is directly tied to how efficient the scheduler algorithm is in servicing the available mobile devices that need to be located. Therefore, this solution solves the interference problem, but results in a poor location update rate.
Another problem occurs when enrolling new mobile devices into the locationing system, which requires that the scheduler be interrupted periodically to run an enrollment mode which identifies where any new devices are so that they can be incorporated into the scheduler algorithm. This will periodically interrupt the locationing system for multiple seconds, negatively impacting the system performance and update rate.
Accordingly, there is a need for a technique to locate a mobile device in an indoor environment without modifying the mobile device hardware and while eliminating the aforementioned issues. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing background.
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.
The apparatus and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.

Automatic mode change in ultrasonic locationing


Embodiments of the present invention provide a control information sending method and a communications device. The embodiments of the present invention can resolve a problem that user equipment and a base station device have inconsistent understandings of a total original information bit quantity of a HARQ-ACK of multiple downlink carriers.

Long Term Evolution (LTE for short) is Long Term Evolution of the Universal Mobile Telecommunications System (UMTS) technology standards that is formulated by the 3rd Generation Partnership Project (3GPP for short) organization. Key technologies such as Orthogonal Frequency Division Multiplexing (OFDM for short) and Multiple Input Multiple Output (MIMO for short) are introduced into the Long Term Evolution, obviously increase spectral efficiency and a data transmission rate, and have been widely developed in recent years. A Long Term Evolution-Advanced (LTE-A for short) system is a further evolved and enhanced system of an LTE system. In the LTE-A system, to satisfy a requirement of the International Telecommunication Union for a peak data rate of the fourth generation communications technology, a carrier aggregation (CA for short) technology is introduced, and is also referred to as a spectrum aggregation technology or a bandwidth extension technology. In carrier aggregation, spectrums of two or more component carriers are aggregated to obtain a wider transmission bandwidth, and the spectrums of the component carriers may be adjacent continuous spectrums, or may be nonadjacent spectrums within a same frequency band or even discontinuous spectrums within different frequency bands. LTE Rel-8/9 user equipment (UE) can access only one of the component carriers to receive and send data. However, LTE-A user equipment may access, according to a capability and a service requirement of the user equipment, multiple component carriers at the same time to receive and send data.
The LTE supports two duplex modes: frequency division duplex (FDD for short) and time division duplex (TDD for short). For the FDD, downlink and uplink transmission are performed on different carriers. For a TDD system, uplink and downlink transmission are performed on a same carrier at different times. Specifically, a carrier includes a downlink subframe, an uplink subframe, and a special subframe. The LTE currently supports seven types of different TDD uplink and downlink configurations.
The LTE implements an error detection and correction function by using a hybrid automatic repeat request (HARQ for short) mechanism. A downlink is used as an example. After UE receives a physical downlink shared channel (PDSCH for short), if the physical downlink shared channel is correctly received, the UE feeds back an acknowledgement (ACK for short) on a physical uplink control channel (Physical Uplink Control Channel, PUCCH for short); or if the physical downlink shared channel is not correctly received, the UE feeds back a negative acknowledgement (NACK for short) on a PUCCH. The LTE further supports a carrier aggregation (CA for short) technology, that is, a base station configures multiple carriers for one UE to improve a data rate of the UE. During CA, the multiple carriers sent by the base station are synchronously sent in terms of time. The UE may separately detect and schedule a physical downlink control channel (PDCCH for short) and a corresponding PDSCH of each carrier. A specific detection process of each carrier is similar to that in the foregoing case of a single carrier. The LTE system supports FDD CA, TDD CA, and FDD+TDD CA. The TDD CA is further classified into TDD CA having a same uplink and downlink configuration and TDD CA having different uplink and downlink configurations. In a CA mode, there is one primary carrier and at least one secondary carrier, and a PUCCH carrying an ACK/NACK is sent only on a primary carrier of the UE. When a hybrid automatic repeat request-acknowledgement HARQ-ACK of multiple downlink carriers is transmitted on one PUCCH channel or one PUSCH channel, joint coding is usually used. In the LTE system, uplink control signaling mainly has two coding manners: linear block code Reed Muller (RM for short) and convolutional code. In either coding manner, the base station can perform decoding correctly only when the base station knows a total original information bit quantity of joint coding when using a common decoding manner.
If the total original information bit quantity of the HARQ-ACK joint coding is calculated based on a quantity of PDSCHs on a downlink carrier that are detected by the UE, once a PDSCH on a downlink carrier is missed during detection, a quantity of carriers having PDSCHs that is understood by the UE is less than a quantity of carriers of PDSCHs actually sent by an eNB. However, the eNB does not know whether the UE has missed a PDSCH during detection, and how many PDSCHs are missed during detection. Therefore, the UE and the eNB have inconsistent understandings of the total original information bit quantity of the HARQ-ACK joint coding of multiple downlink carriers. Consequently, a fed back HARQ-ACK cannot be correctly decoded. Therefore, a problem that user equipment and a base station device have inconsistent understandings of a total original information bit quantity (a codebook size of a HARQ-ACK) of a HARQ-ACK of multiple downlink carriers urgently needs to be resolved.

Control information sending method and communications device


A semiconductor memory device includes memory cells. Each memory cell includes three P-channel MOS transistors. The first P-channel MOS transistor is connected between a bit line and a node, and receives on its gate terminal a voltage on a word line. The second P-channel MOS transistor has source and drain terminals connected to the node, and receives a cell plate voltage on its gate terminal. The third P-channel MOS transistor has a gate terminal connected to the node, and receives a cell plate voltage on its source and drain terminals.

1. Field of the Invention
The present invention relates to a semiconductor memory device, and particularly to a semiconductor memory device, which has a long refresh cycle, and can accurately amplify data read from a memory cell.
2. Description of the Background Art
For providing an on-chip large-scale memory in a system LSI (Large Scale Integration), it is necessary to fabricate a memory portion by a CMOS (Complementary MOS) logic process for suppressing increase in cost and preventing lowering of a performance of a logic circuit.
An SRAM (Static Random Access Memory) is a kind of memory, which can be fabricated by the CMOS logic process. However, various problems arise if the capacity of the SRAM is increased.
First, if the SRAM employs memory cells formed of the CMOS, one memory cell requires six transistors, and therefore occupies a large area. Therefore, increase in capacity results in increase in area of the whole system chip, and therefore results in increase in cost and lowering of yield.
As a result of miniaturization in the CMOS process, a non-negligible off-leakage current occurs in the transistors of the memory cell, and standby current unavoidably increases.
In view of the above problems, a planar DRAM (Dynamic Random Access Memory), which can be fabricated by the CMOS logic process, may be used. The planar DRAM has a smaller area than the SRAM, and periodically requires a smaller refresh current so that the standby current can be smaller than that of the SRAM, and thus the planar DRAM is very useful.
Referring to FIG. 17, a memory cell 200 in a planar DRAM is formed of P-channel MOS transistors 201 and 202. P-channel MOS transistor 201 is connected between a bit line BLi (i: natural number satisfying (0xe2x89xa6ixe2x89xa6m), where m is a natural number) and a node NS. P-channel MOS transistor 201 has a gate terminal connected to a word line WLj (j: natural number satisfying (0xe2x89xa6jxe2x89xa6n), where n is a natural number).
P-channel MOS transistor 202 has source and drain terminals connected to a node NS, and receives on its gate terminal a cell plate voltage VCP formed of a ground voltage GND.
Word line WLj carries a power supply voltage Vcc during standby, and carries ground voltage GND when it is active.
When word line WLj is active, P-channel MOS transistor 201 is on so that data is sent to or from a channel region (i.e., node NS) of P-channel MOS transistor 202 via P-channel MOS transistor 201.
FIG. 18 shows a layout of memory cells of a planar DRAM. Referring to FIG. 18, active regions 203 and 204 are formed on a deeper side of a sheet of FIG. 18. A cell plate 205 and word lines WLjxe2x88x921 and WLj are formed on active region 203. A cell plate 206 is formed over both active regions 203 and 204, and a cell plate 207 and word lines WLj+1 and WLj+2 are formed on active region 204. A bit line pair BLi and /BLi is formed in a direction perpendicular to word lines WLjxe2x88x921-WLj+2. A contact 208 is formed between word lines WLjxe2x88x921 and WLj for connecting bit line BLi to a source terminal of a transistor formed under word line WLj. Also, a contact 209 is formed between word lines WLj+1 and WLj+2 for connecting bit line /BLi to a source terminal of a transistor formed under word line WLj+1.
FIG. 19 is a cross section of a region 210 shown in FIG. 18. Referring to FIG. 19, an N-well 221 is formed at a surface layer of a p-type silicon substrate 220. P+diffusion layers 222 and 223 are formed at portions of N-well 221. A gate 224 is formed on N-well 221 located between P+diffusion layers 222 and 223. Word line WLj is formed on gate 224.
A gate 225 is formed on N-well 221 neighboring to P+diffusion layer 223, and a cell plate 204 is formed on gate 225. Contact 208 is formed on P+diffusion layer 222, and connects bit line BLi to P+diffusion layer 222. Insulating portion 208A is formed at N-well 221 of the region neighboring to gate 225. Insulating portion 208A is used for element isolation.
P+diffusion layers 222 and 223 as well as gate 224 form P-channel MOS transistor 201, and P+diffusion layers 223 and gate 225 form P-channel MOS transistor 202.
Cell plate 204 is supplied with cell plate voltage VCP formed of ground voltage GND. Therefore, an inverted layer 226 is formed at the surface of N-well 221 under cell plate 204 when positive charges are accumulated as a result of writing of H-data.
Referring to FIG. 20, an operation of writing H-data will now be described. The xe2x80x9cH-dataxe2x80x9d means data written with a high voltage. When the voltage on word line WLj lowers from power supply voltage Vcc to ground voltage GND, word line WLj becomes active so that P-channel MOS transistor 201 is turned on. Positive charges forming the H-data on bit line BLi flow through P+diffusion layer 222 and the channel region into P+diffusion layer 223. Since ground voltage GND is placed on cell plate 204, a sufficient potential difference is present between P+diffusion layer 223 and cell plate 204 so that a large amount of positive charges flow from P+diffusion layer 223 into the channel region of P-channel MOS transistor 202. Consequently, inverted layer 226 is formed at the channel region of P-channel MOS transistor 202. Therefore, the H-data can be easily written into the memory cell of the planar type. When the H-data is written into the memory cell, the memory cell has a large cell capacity.
Referring to FIG. 21, an operation of writing L-data will now be described. The xe2x80x9cL-dataxe2x80x9d means data written with a low voltage. When the voltage on word line WLj lowers from power supply voltage Vcc to ground voltage GND, word line WLj becomes active so that P-channel MOS transistor 201 is turned on. Negative charges forming the L-data on bit line BLi flow through contact 208 into P+diffusion layer 222. The negative charges in P+diffusion layer 222 do not sufficiently flow into P+diffusion layer 223 through the channel region of P-channel MOS transistor 201 due to a threshold loss in P-channel MOS transistor 201. Since the voltage placed on cell plate 204 is ground voltage GND, a sufficient potential difference does not occur between P+diffusion layer 223 and cell plate 204, and an amount of negative charges flowing from P+diffusion layer 223 into the channel region of P-channel MOS transistor 202 is small. Consequently, inverted layer 226 is not formed at the surface of N-well 221 under cell plate 204. As described above, the cell capacity of the memory cell carrying the L-data is very small.
Description will now be given on an operation of reading data from the memory cell of the planar type. Immediately before the read operation, bit line pair BLi and /BLi is precharged to carry a precharge voltage Vcc/2. When the voltage on word line WLj lowers from power supply voltage Vcc to ground voltage GND, word line WLj becomes active so that P-channel MOS transistor 201 is turned on. The charges held in P-channel MOS transistor 202 flow to bit line BLi through P-channel MOS transistor 201 and contact 208, and the voltage on bit line BLi slightly changes from precharge voltage Vcc/2 in accordance with the logical level of read data.
More specifically, the voltage on bit line BLi changes from precharge voltage Vcc/2 to a voltage of (Vcc/2+xcex94V) when the memory cell has stored H-data. When the memory cell has stored L-data, the voltage on bit line BLi changes from precharge voltage Vcc/2 to a voltage of (Vcc/2xe2x88x92xcex94V).
The data read onto bit line BLi is amplified by a sense amplifier SA. Referring to FIG. 22, sense amplifier SA includes P-channel MOS transistors 227-229 and N-channel MOS transistors 230-232. P-channel MOS transistor 227 is connected between a power supply node NVC and a node N5. P-channel MOS transistor 227 receives on its gate a signal /SOP.
P-channel MOS transistor 228 and N-channel MOS transistor 230 are connected in series between nodes N5 and N8. P- and N-channel MOS transistors 229 and 231 are connected in series between nodes N5 and N8. P- and N-channel MOS transistors 228 and 230 are connected in parallel to P- and N-channel MOS transistors 229 and 231.
P- and N-channel MOS transistors 228 and 230 receive on their gate terminals a voltage placed on a node N7. P- and N-channel MOS transistors 229 and 231 receive on their gate terminals a voltage placed on a node N6.
N-channel MOS transistor 232 is connected between node N8 and ground node GND. N-channel MOS transistor 232 receives a signal SON on its gate terminal. Bit line BLi is connected to node N6 located between P- and N-channel MOS transistors 228 and 230. Bit line /BLi is connected to node N7 located between P- and N-channel MOS transistors 229 and 231.
Sense amplifier SA becomes active when it receives signal /SOP at L-level and signal SON at H-level.
Referring to FIG. 23, description will now be given on an operation of sense amplifier SA. Before reading the data from the memory cell, bit line pair BLi and /BLi is precharged to carry precharge voltage Vcc/2. When the voltage on word line WLj lowers from power supply voltage Vcc to ground voltage GND, word line WLj becomes active so that the H-data is read from the memory cell onto bit line BLi. The voltage on bit line BLi changes from precharge voltage Vcc/2 to a voltage of (Vcc/2+xcex94V). In this case, the voltage on bit line /BLi remains at precharge voltage Vcc/2.
In sense amplifier SA, P- and N-channel MOS transistors 229 and 231 receive the voltage of (Vcc/2+xcex94V) on their gate terminals, and P- and N-channel MOS transistors 228 and 230 receive precharge voltage Vcc/2 on their gate terminals.
Since P-channel MOS transistor 228 receives on its gate terminal a voltage lower than that received by P-channel MOS transistor 229, P-channel MOS transistor 228 is turned on, and the voltage on node N6 rises from the voltage of (Vcc/2+xcex94V) to power supply voltage Vcc. Thereby, P-channel MOS transistor 229 is turned off, and N-channel MOS transistor 231 is turned on so that the voltage on node N7 lowers from precharge voltage Vcc/2 to ground voltage GND. N-channel MOS transistor 230 is turned off.
In this manner, sense amplifier SA raises the voltage on bit line BLi from voltage (Vcc/2+xcex94V) to power supply voltage Vcc, and lowers the voltage on bit line /BLi from precharge voltage Vcc/2 to ground voltage GND. Thus, sense amplifier SA amplifies the H-data read onto bit line BLi.
When L-data is read from the memory cell onto bit line BLi, the voltage on bit line BLi changes from precharge voltage Vcc/2 to the voltage of (Vcc/2xe2x88x92xcex94V). In this case, the voltage on bit line /BLi remains at precharge voltage Vcc/2.
In sense amplifier SA, P- and N-channel MOS transistors 229 and 231 receive the voltage of (Vcc/2xe2x88x92xcex94V) on their gate terminals, and P- and N-channel MOS transistors 228 and 230 receive precharge voltage Vcc/2 on their gate terminals.
Since P-channel MOS transistor 229 receives on its gate terminal the voltage lower than that received by P-channel MOS transistor 228, P-channel MOS transistor 229 is turned on, and the voltage on node N7 rises from precharge voltage Vcc/2 to power supply voltage Vcc. Thereby, P-channel MOS transistor 228 is turned off, and N-channel MOS transistor 230 is turned on so that the voltage on node N6 lowers from the voltage of (Vcc/2xe2x88x92xcex94V) to ground voltage GND. N-channel MOS transistor 231 is turned off.
As described above, sense amplifier SA lowers the voltage on bit line BLi from the voltage of (Vcc/2xe2x88x92xcex94V) to ground voltage GND, and raises the voltage on bit line /BLi from precharge voltage Vcc/2 to power supply voltage Vcc. Thus, sense amplifier SA amplifies the L-data read onto bit line BLi.
As described above, the data read from the memory cell of the planar type is amplified by sense amplifier SA.
However, the sense amplifier SA can amplify the read data only in such a case that a potential difference, which can be amplified by sense amplifier SA, occurs between bit lines BLi and /BLi when the data is read from the memory cell onto bit line BLi or /BLi. Thus, the sense amplifier SA can amplify the read data only when the memory cell holds the charges corresponding to the written data.
As described above, the H-data can be easily written into the memory cell of the planar type, and the memory cell holding the H-data has a large cell capacity. Therefore, when the H-data is read from the memory cell, a potential difference xcex94V0, which can be amplified by sense amplifier SA, occurs between bit lines BLi and /BLi as illustrated in FIG. 24.
However, it is difficult to write the L-data into the memory cell of the planar type, and the cell capacity is small in the memory cell holding the L-data. Therefore, when the L-data is read from the memory cell, a potential difference xcex94V2, which cannot be amplified by sense amplifier SA without difficulty, occurs between bit lines BLi and /BLi, as illustrated in FIG. 25. Thus, a potential difference required for a reliable sense operation cannot be produced when the L-data is written in the memory cell of the conventional planar type.
For writing the L-data into the memory cell of the planar type so that a potential difference required for the reliable sense operation may be produced, the voltage applied to gate 224 of P-channel MOS transistor 201 must be set to xe2x88x920.4 V (nearly equal to the threshold voltage of P-channel MOS transistor 201) lower than ground voltage GND of 0 V, and the voltage of xe2x88x920.4 V must be applied also to cell plate 204.
However, the voltage (xe2x88x920.4 V) lower than the ground voltage GND of the silicon substrate cannot be used in the twin well structure without difficulty, and also increases power consumption.
Therefore, the memory cell of the conventional planar type suffers from such a problem that the potential difference required for the reliable sense operation cannot be obtained easily.
The memory cell of the planar type holds information based on the amount of charges, but the amount of accumulated charges decreases due to a leak current with time. Referring to FIG. 26, a gate leak current 233 is most dominant among leaks currents, and a junction leak current 234 is secondarily dominant.
Gate leak current 233 occurs due to the fact that a gate oxide film forming gate 225 is thin. Gate leak current 233 flows when charges leak from P+diffusion layer 223 forming the storage node to cell plate 204. Therefore, when P+diffusion layer 223 accumulates the charges corresponding to the H-data, gate leak current 233 becomes remarkable.
The junction leak current 234 is a reverse-direction junction current occurring between N-well 221 under the memory cell and P+diffusion layer 223 forming the storage node. Junction leak current 234 becomes particularly remarkable when P+diffusion layer 223 accumulates the charges corresponding to the L-data.
Accordingly, the potential on P+diffusion layer 223 forming the storage node changes as illustrated in FIG. 27. When the H-data is written into the memory cell, P+diffusion layer 223 initially carries a sufficiently high potential of power supply voltage Vcc. As the time elapses, gate leak current 233 occurs, and the potential on P+diffusion layer 223 rapidly lowers.
When the L-data is written into the memory cell, P+diffusion layer 223 initially carries a potential Vthp raised by threshold voltage Vthp of P-channel MOS transistor 201. Thereafter, a junction leak current 234 occurs as the time elapses so that the potential on P+diffusion layer 223 rises. When the potential on P+diffusion layer 223 rises to a certain extent, gate leak current 233 increases so that the rising of the potential stops.
In the memory cell of the planar type, as described above, gate leak current 233 is large, and the data holding time depends on the degree of deterioration of H-data so that the refresh operation must be performed frequently, resulting in increase in power consumption.
Accordingly, an object of the invention is to provide a semiconductor memory device, which can operate with a long refresh cycle, and can accurately amplify data read from a memory cell.
According to the invention, a semiconductor memory device includes a plurality of memory cells and a peripheral circuit. The plurality of memory cells are arranged in rows and columns. The peripheral circuit can provide data into and from each of the plurality of memory cells.
Each of the plurality of memory cells includes a capacity element for storing the data, and the capacity element is formed of first and second elements. The first and second elements accumulate charges corresponding to first write data and second write data different from said first write data, respectively.
According to the invention, therefore, a sufficient potential difference can be produced on a bit line pair in both the cases where first data is read from the memory cell, and where second data is read therefrom.
Further, the data holding time of the memory cell can be significantly longer than that of a memory cell of a conventional planar type, and the number of refresh operations per time can be significantly reduced. This can significantly reduce power consumption.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.

Semiconductor memory device capable of holding write data for long time


In a scissor type automatic cutter 20, as the movable knife 22 pivots, adhesive between the web liner 11a and the continuous label 11b medium is squeezed out from the label paper 11 at the distal end side of the movable knife 22 and sticks to the fixed knife 21 or the movable knife 22. Because a notched opening 44 is formed in the upstream edge 50a in the paper discharge direction at the other edge part in the paper width direction of the substantially horizontal stage surface 40, if adhesive sticking to the fixed knife 21 or movable knife 22 moves to the stage surface 40 side, the adhesive can be removed from the notched opening 44 and does not accumulate on the stage surface 40. As a result, cutting problems caused by penetration of accumulated adhesive between the fixed knife 21 and movable knife 22 can be prevented.

1. Technical Field
The present invention relates to a scissor-type cutter having a movable knife that pivots to and away from a fixed knife, and to a printer having an automatic cutter and a paper exit of which the bottom edge is a substantially horizontal surface and from which the cut-off ends of recording medium (the cut paper) are discharged. More specifically, the invention relates to an automatic cutter whereby defective cuts resulting from adhesive squeezed out from the edges of label paper when the paper is cut do not occur, and to a printer having the automatic cutter.
2. Related Art
One type of label paper used for printing has an uncut label medium of the same constant width as the continuous liner backing to the surface of which the label medium is affixed by adhesive like a continuous tape. Such label paper is referred to as full-surface uncut label paper or continuous label paper, and is used to cut and print labels of different sizes. Printers having an automatic paper cutter for cutting the printed portion of the label paper may be used to produce labels using uncut label paper. The automatic cutter is disposed to the transportation path from the print head or printing position to the paper exit at the downstream end part in the transportation direction, and the printed label that is the cut-off portion of the label paper is discharged from the paper exit.
A scissor type automatic paper cutter that can be disposed in a printer is taught in Japanese Unexamined Patent Appl. Pub. JP-A-H09-19890. In the automatic cutter taught in JP-A-H09-19890 the fixed knife is disposed with the cutting edge facing up, and the movable knife pivots on a support pin at one end in the cutting direction of the movable knife between a standby position where a specific gap is formed between the cutting edge of the movable knife and the cutting edge of the fixed knife, and a cutting-completed position where the cutting edge of the movable knife and the cutting edge of the fixed knife overlap throughout the entire range of the cutting direction. A spring member that pushes the movable knife toward the fixed knife is attached to the support pin, and the compression force between the cutting edge of the movable knife and the cutting edge of the fixed knife is maintained to greater than or equal to the compression force required to cut the recording paper by means of this spring member. The label paper is inserted on the transportation path from the fixed knife side and the cut-off portion is discharged from the movable knife side.
The paper exit disposed to the automatic cutter or a printer with an automatic cutter must have a narrow opening so that foreign matter is not inserted from the outside, and is generally long and narrow in the cutting direction (the paper width direction). More specifically, the bottom edge of the paper exit is commonly positioned slightly below the cutting edge of the fixed knife and the top edge of the paper exit is positioned slightly above the cutting edge of the fixed knife so that the vertical size of the opening is reduced. When the movable knife moves toward the cutting-completed position with this configuration, however, the upstream side end part in the paper discharge direction of the cut-off portion is pushed below the bottom edge of the paper exit by the downward moving movable knife. The cut-off portion also becomes curled. As a result, when the movable knife returns to the standby position, the cut-off portion may spring up as a result of the resilience of the paper when the curled portion returns.
To prevent the cut-off portion from popping out from the paper exit, the bottom edge of the paper exit may have a substantially level stage that extends for a specific width in the cutting direction along the edge of the fixed knife slightly below the cutting edge of the movable knife at the cutting-completed position. Because the stage that determines the bottom edge of the paper exit in this configuration is positioned below the cutting edge of the movable knife at the cutting-completed position, the movable knife does not push the upstream end part of the cut-off portion down when cutting, the upstream end part of the cut-off portion is above the bottom edge of the paper exit and is not caused to curl. In addition, because cut-off portion is placed on the stage when cutting is completed, the cut-off portion rests stably. Rendering the bottom edge of the paper exit from which the cut-off portion is discharged by means of a substantially level stage is therefore beneficial.
However, when the bottom edge of the paper exit is determined by a stage surface that is positioned below the cutting edge of the movable knife when the movable knife has moved to the cutting-completed position of a scissor type automatic cutter, adhesive is squeezed from between the liner and the label and builds up on the stage surface when uncut label paper is cut because the uncut label paper is cut from one edge by the scissor action of the movable knife and the fixed knife. More specifically, because the compression force between the cutting edge of the fixed knife and the cutting edge of the movable knife is applied at the side of the support pin that is the pivot point of the movable knife, the compression force weakens to the other side in the cutting direction away from the support pin. As a result, when the label paper is cut, the adhesive between the liner and the label is pushed from the support pin side of the movable knife to the distal end while being squeezed between the fixed knife and the movable knife, and the adhesive sticks to the edge of the fixed knife and the cutting edge of the movable knife.
More particularly, because the adhesive is pushed out to the distal end side of the movable knife at the cutting end side, there is a tendency for a large amount of adhesive to stick at the distal end side of the movable knife. The adhesive that sticks to the cutting edge of the movable knife then moves gradually down from the movable knife due to gravity and sticks to the stage surface. The adhesive sticking to the edge of the fixed knife is also scraped down with the movement of the movable knife and builds up on the stage surface. When the adhesive accumulates on the stage, the accumulated adhesive gets between the cutting edge of the movable knife and the cutting edge of the fixed knife, interferes with cutting, and thus results in deficient cuts.

Printer cutter with paper exit having a notch


A rectifier circuit comprises two Zener diodes (3,4) having substantially the same characteristic Zener voltage which are connected to receive a sinusoidal input signal via a low impedance buffer (8). A half-wave rectified signal appearing on line (17) has a DC bias equal to the Zener voltage which is removed by the operational amplifier (15). A low pass filter (20) provides a smoothed DC voltage output on line (21). The circuit may be used as an AC to DC converter or for the detection of signals ranging from several volts down to a few millivolts. Its linear response over a wide dynamic range and at small signal levels is an advantage over conventional silicon diode rectifier circuits which suffer distortion at low signal levels.

1. Field of the Invention
This invention relates to electrical rectifying circuits which may be useful in, for example, AC measurement systems or employable as AC to DC voltage converters or as signal dectectors.
2. Discussion of Prior Art
Known methods of signal detection employ at least one semi-conductor junction diode, usually a silicon diode. One disadvantage, which the silicon diode has, is its negligible response below the cut-in voltage. (This is approximated 0.6V at 20.degree. C.). Consequently, its performance as a rectifier or detector is grossly non-linear for small signal voltages. Diode sensitivity may be increased by the known method of incorporating it within the feedback loop of an operational amplifier, which effectively reduces the cut-in voltage almost to zero. However, the linearity of such a circuit as an AC to DC converter suffers at low signal levels due to distortion.

The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and Northern Ireland


A melt distribution manifold for use with first and second mold portions moveable with respect to each other, the melt distribution manifold including a melt inlet means for receiving melt from an injection molding machine, a first manifold portion connected to the first mold portion, wherein the first manifold portion is stationary with respect to the first mold portion, a second manifold portion connecting the first manifold portion to the hot runner nozzle, wherein the second manifold portion is moveable with respect to the first manifold portion such that when the first mold portion moves with respect to the second mold portion, the second manifold portion remains connected to the first manifold portion and to the hot runner nozzle, a hinged joint connecting the first manifold portion to the second manifold portion. Each of the first manifold portion, the second manifold portion, and the hinged joint having respective melt distribution bores in fluid communication with each other.

Prior art injection molding assemblies, for the manufacture of thin-walled containers, or similar items have previously been restricted in the size of container that can possibly be created, while maintaining the desired thin wall. Hot runner nozzles are typically positioned at a top end of the mold and melt is injected throughout the mold from this top end. This poses a difficulty with larger containers where extremely high pressure are required to inject melt to portions of the mold furthest away from the hot runner nozzles. While one solution is to provide for a thicker wall, this is not always feasible. In order to expand beyond this restriction, additional hot runner nozzles may be used, for example, positioned at side portions of the mold.
As known by those skilled in the art, where ribs or other features are to be provided on an external surface of the container, the mold includes side slide elements that provide for the external features on the container. In order to eject the container without causing damage to the external features of the container, the slide elements of the mold must move away, as a core half of the mold pulls away. Providing additional hot runner nozzles in the side portions, as discussed earlier, presents significant problems when portions of the mold are themselves moving.
Various prior art documents have attempted to address the problem of transferring melt into moving mold sections, including the slide elements discussed above, or alternatively, into tandem or stackable molds. Often times, these resulted in overly complex arrangements or requiring valves between interfaces that are prone to leakage. In other cases, the flow of melt has to be stopped when mold portions are in motion. Various other problems associated with the prior art will be evident to those skilled in the art. Various prior art patents and applications have attempted to address the problem of transferring melt into movable mold sections including Patent/Publication Numbers: U.S. Pat. No. 5,069,615 entitled "Stack Mold with Insulated Runner" published Dec. 3, 1991; U.S. Pat. No. 6,851,946 entitled "Hot Runner Distributor System" published Feb. 8, 2005; U.S. Pat. No. 7,614,869 entitled "Manifold Nozzle Connection" published Nov. 10, 2009; U.S. 2007/0193713 entitled "Transfer Of Force From Manifold To Plate Of Hot Runner" published Aug. 23, 2007; U.S. Pat. No. 7,284,979 entitled "Self Aligning Articulated Joint For Use In Hot Runner Systems" published Oct. 23, 2007; U.S. Pat. No. 5,484,275 entitled "Nozzle Construction For Triple Stack Molding Arrangement" published Jan. 16, 1996; U.S. Pat. No. 5,522,720 entitled "Injector Nozzle With Pivotally Movable Surfaces" published Jun. 4, 1996; U.S. Pat. No. 4,702,689 entitled "Side Mounted Manifold Block For Variable Orientation Of Injection Nozzle" published Oct. 27, 1987; Re. 35,256 entitled "Tandem Injection Molding Machine With Direct Feed To Molds" published May 28, 1996; U.S. Pat. No. 5,910,327 entitled "Sprue Bar Assembly For Stack Molds" filed Jun. 8, 1999; U.S. Pat. No. 5,804,231 entitled "Expandable Hot Runner Manifold" published Sep. 8, 1998; U.S. 2008/0193585 entitled "Hot Runner Interface Adaptor" published Aug. 14, 2008; U.S. Pat. No. 4,212,626 entitled "Stack Injection Molding Melt Transfer System" published Jul. 15, 1980; U.S. Pat. No. 7,775,788 entitled "Melt Transfer Components For A Stack Molding System" published Aug. 17, 2010; U.S. Pat. No. 6,955,534 entitled "Valve To Valve Melt Transfer Device" published Oct. 18, 2005; and, U.S. Pat. No. 5,011,646 entitled "Method And Apparatus For Injection Molding Using A Movable Sprue Bar" published Apr. 30, 1991.
Furthermore, the Variofill™ system sold by PSG Plastic Service GmbH discloses a system that permits variable positioning and movement of a hot runner assembly prior to functionally attaching same to a mold. However, once the hot runner is assembled into the mold, the movement of the hot runner assembly is fully constrained, and thus suffers from similar deficiencies as discussed above.
Accordingly, there is a need in the art for a hot runner manifold assembly that mitigates at least one of the aforementioned problems associated with the prior art and/or provides for improved performance in applications where there is a need for uninterrupted flow of melt between manifold portions that move with respect to each other.

Mold arrangement having a melt distribution manifold with a hinged joint


A misfire detecting system for an internal combustion engine, including an intake pipe internal pressure detecting device for detecting an internal pressure of an intake pipe of the internal combustion engine, and a misfire detection inhibiting device for inhibiting the detection of misfire when the internal pressure of the intake pipe detected by the intake pipe internal pressure detecting device is lower than an intake pipe internal pressure in a no-load condition.

1. Field of the Invention
The present invention relates to a misfire detecting system for an internal combustion engine.
2. Description of the Prior Art
As a method for detecting misfire of an internal combustion engine, there has been known a method in which misfire is detected on the basis of a rotational variation of a crankshaft (a variation in the detection cycle for a rotational angle of the crankshaft) in an internal combustion engine.
In some particular operating conditions, however, a variation in the rotation of the crankshaft may occur due to an occasional improper combustion despite a normal operation of the system. There has been an example in which operating conditions are set to forbid the detection of misfire on the ground that the detection of misfire cannot be done accurately (Japanise Patent Application No. 360626/91).
In the above example, as the operating conditions at which the monitor of misfire is forbidden, there are set a condition in which the engine cooling water temperature or the intake air temperature is below a predeterminded value, a fuel cut condition and a lean running condition.
For example, however, during vehicular running at a low load such as driving on a downhill at a highland, an amount of fuel to be injected which is too small to be controlled, is required and actually there sometimes occurs a case where fuel is not injected and the air fuel ratio becomes a lean side, thus causing improper combustion. Heretofore, even in such a case, the detection of misfire has been conducted, sometimes resulting in the occurrence of misdetection.

Misfire detecting system for internal combustion engine


A vehicle seat includes a base frame supported on a base, a seat cushion provided on the base frame, and a seat back, wherein the seat back is structured so that a plurality of seat back pieces are arranged in the up-and-down direction with a predetermined space; and the base frame or a lowermost seat back piece is attached with an attachment member that stands so as to be elastically deformed and be able to be twisted around an axis, and the plurality of seat back pieces are attached to the attachment member, respectively.

1. Field of the Invention
The present invention relates to a vehicle seat by which a user can twist his or her body toward the backside and which is comfortable to sit in.
2. Related Art
Conventionally, vehicle seats have been subjected to various technical developments. One of such techniques provides, for example, a known automobile seat structured so that a backrest is divided to an upper half backrest and a lower half backrest and the upper half backrest is attached to the lower half backrest so that the former can be rotated to the latter around a vertical axis line via a pivot point (see Patent Publication 1).
The automobile seat as described above also allows, when the driver checks the backside or takes a baggage or the like on a backseat, a driver to twist his or her upper body toward the backside in accordance with the rotation of the upper half backrest.
[Patent Publication 1] Japanese Utility Model Unexamined Publication No. 64-002632
By the way, the automobile seat is designed so that a regular position-lock device is provided at a side face of the lower half backrest. This regular position-lock device can be unlocked by a one-touch operation by depressing a lever. By unlocking the regular position-lock device, the upper half backrest can be rotated in the left-and-right direction.
However, this regular position-lock device must be unlocked by manually depressing the lever. Furthermore, this regular position-lock device requires a user to extend his or her arm to the lever at the side face of the lower half backrest, which may cause a situation where the user requires a long time to unlock the device particularly for an operation for moving the vehicle backward.
On the other hand, although the above-described structure of the automobile seat allows the upper half backrest to be rotated to the lower half backrest, this structure does not have a rotation restoration force. Thus, when the upper half backrest is returned to the regular position, this structure has required the driver to return his or her upper body to the original position by rotating his or her body in the reverse direction.
Furthermore, this structure allows only the upper half backrest to be rotated in the left-and-right direction as described above. This has caused an inconvenience where, when the driver twists the upper body, the upper half backrest cannot be rotated in a manner adapted to the contour of the driver, thus failing to provide a fit with the back face of the driver.
Due the situation as described above, such a vehicle seat has been desired that is different from the conventional one in that a driver can twist his or her body toward the backside without requiring a lock mechanism such as the regular position-lock device; in that the vehicle seat can be fit with the back face of the driver; in that the vehicle seat has a rotation restoration force; and in that the vehicle seat is comfortable to sit in.