A method of fabricating a substrate free light emitting diode (LED), includes arranging LED dies on a tape to form an LED wafer assembly, molding an encapsulation structure over at least one of the LED dies on a first side of the LED wafer assembly, removing the tape, forming a dielectric layer on a second side of the LED wafer assembly, forming an oversized contact region on the dielectric layer to form a virtual LED wafer assembly, and singulating the virtual LED wafer assembly into predetermined regions including at least one LED. The tape can be a carrier tape or a saw tape. Several LED dies can also be electrically coupled before the virtual LED wafer assembly is singulated into predetermined regions including at the electrically coupled LED dies.

Field of the Invention
The present invention generally relates to a chip package and a method of manufacturing the same, and more particularly to a light emitting diode (LED) chip package without a substrate and a method of manufacturing the same.
Background
LED chips emit light in response to excitation by an electrical current. One typical LED includes a heterostructure grown on a substrate by metal-organic vapor phase epitaxy or similar techniques. An LED heterostructure includes n and p type semiconductor layers that sandwich light producing layers. Exemplary light producing layers may be quantum wells surrounded by barrier layers. Typically, electrical contacts are attached to n and p semiconductor cladding layers. When a forward bias is applied across electrical contacts, electrons and holes flow from n and p layers into a light producing active region. Light is produced when these electrons and holes recombine with each other in an active region comprising at least one semiconductor material.
LED chips are typically enclosed in a package that extracts the light and protects the chip from being damaged. The LED package typically includes phosphors that convert light generated by the LED into white light, a lens that directs light, contact pads for electrically connecting the LED package to an external circuit, as well as other components. The cost of packaging the LED chip can significantly contribute to the overall cost of making an LED device and is therefore an important factor into whether LED devices can be made commercially viable for consumers.
Therefore, there is a need for an LED device that can be manufactured and packaged in high volumes and delivered to consumers at low cost.


An electronic circuit is connected between input lines of an alternating input power supply and input lines of a boost converter to limit an input inrush current and/or an output short-circuit current supplied to the boost converter in a power supply. The electronic circuit includes a rectifier circuit to rectify alternating input current of the alternating current power supply, and a feedback circuit for feeding back a switching signal to the rectifier circuit circuit to switch the rectifier circuit on and off.

Many power supplies have voltage and current limiters in order to suppress undesirable and spurious current and voltage spikes. Sometimes the voltage spikes are generated by electrical equipment using the same power line, other times the transient surges are caused by the power supply being quickly switched between on and off positions.
In order to avoid damage to the power supply, inrush current needs to be suppressed. In many conventional power supplies there is an input capacitor or a capacitor bank. The input capacitor or the capacitor bank charges when the power supply is initially turned on. In this state, the capacitor or the capacitor bank acts as a short-circuit and does not limit input current. As a result, the inrush current may activate a circuit breaker or even overload a circuit near the power input.
To reduce the inrush current most conventional power supplies are provided with thermistors and relays. For example, U.S. Pat. No. 5,420,780 discloses a circuit for limiting an inrush current in a DC power supply. The inrush limiting circuit is placed between an alternating current (AC) input power line and a power supply input capacitor bank. A thermistor is located between the capacitor bank and an input diode bridge to limit an initial inrush current. Once the input capacitor bank is fully charged, an insulated-gate bipolar transistor (IGBT) switches a rectified line voltage to a boost power factor correction converter circuit to block the thermistor by means of a diode. This switching keeps the thermistor cold to maintain high resistance in case of a new off/on cycle.
Thermistors, however, cannot be used with large power supplies without risking damage to the thermistor. As a result, thermistors are being replaced with a common resistor shunted by a triac or a silicon controlled rectifier (SCR). For example, U.S. Pat. No. 6,055,167 discloses a circuit for limiting an inrush current wherein the input inrush current is reduced by phasing up an input voltage in a controlled manner. The circuit uses a SCR in an input bridge of the circuit to control the input inrush current. This arrangement, however, has its drawbacks in that if the SCR fails, the power supply will ultimately be damaged.
Another problem associated with power supplies is high current peeks and very high currents in the circuit that cause damage to the power supply when short-circuiting the direct current (DC) outputs. Conventional power supplies are provided with high voltage switches to suppress the short-circuit current. These switches are often costly, however, and increase the complexity of the circuit.

Input inrush current control and/or output short-circuit control to a boost converter in a power supply


A radiation therapy system for irradiating a target volume with a particle beam is provided. The radiation therapy system includes a radiation source that is operable to output an adjustable irradiation field that includes a particle beam that is scanned point by point over the target volume. A 3D imaging device may obtain a 3D radiation treatment data set in a radiation treatment phase. An adaptation unit adapts the irradiation field to a change in position and/or shape of the target volume in the radiation treatment phase. The adaptation unit compares the 3D radiation treatment data set with a 3D planning image data set furnished and obtains a transformation that describes the change in position and/or shape of the target volume. The adaptation unit transforms an irradiation field based on the transformation.

The present embodiments relate to a radiation therapy system for irradiating a target volume that may change position and/or shape over time.
Radiation therapy may use high-energy photons or particles. U.S. Pat. No. 6,687,330 B2 discloses radiation therapy that uses high-energy photons. A particle therapy system typically has an accelerator unit and a high-energy beam guidance system. A synchrotron or cyclotron may be used to accelerate the particles, such as protons or carbon or oxygen ions.
The high-energy beam transporting system transports the particles from the accelerator unit to one or more treatment rooms. A distinction is made between "fixed beam" treatment rooms and gantry-based treatment rooms. Particles arrive at the treatment site from a fixed direction in "fixed beam" treatment rooms. In a gantry-based treatment room, the particle beam may be aimed at the patient from various directions using a gantry.
A distinction may also be made between scanning and scattering. Scattering employs a large-area beam adapted to the dimensions of the volume to be irradiated Scanning scans a "pencil beam" with a diameter of a few millimeters to centimeters over the volume to be irradiated. When a scanning system is embodied as a grid scanning system, the particle beam is steered "point by point" to a volume element of a grid until such time as a previously defined number of particles has been applied. The volume elements in the scanning area are irradiated in succession; preferably, the expanse of the "pencil beams" that are side by side overlap. The particles for one volume element contribute to the dose within this volume element and along the entire path struck by the particles.
A monitoring and safety system of the particle therapy system may be used to direct a particle beam, characterized by the parameters wanted, into the appropriate treatment room. The parameters of a radiation treatment procedure, for example, in a treatment plan, are summarized as an irradiation field. The irradiation field includes an association of the particle with the volume element. The irradiation filed is defined by how many particles from which direction and with what energy, are supposed to strike the patient or the volume elements. The energy of the particles determines the penetration depth into the patient. For example, the energy of the particles may determine the site at which the maximum interaction with the tissue takes place in the particle therapy. The energy of the particles defines the site where the maximum dose is deposited. During the treatment, the maximum deposited dose is located inside the tumor (or in the case of other medical applications of the particle beam, in the particle target area).
The monitoring and safety system controls a positioning device, with which the patient is positioned relative to the particle beam. For carrying out the treatment plan, the patient should assume a position for the irradiation that matches the planning. Matching the position to the plan is done, for example, by 2D position verification. 2D position verification includes, for example, before the irradiation is performed, calibrating 2D images with images from the irradiation planning.
European Patent Disclosure EP 0 986 070 and "The 200-MeV Proton Therapy Project at the Paul Scherrer Institute: Conceptual Design and Practical Realization", E. Pedroni et al, Med. Phys. 22, 37-53 (1995) disclose particle therapy systems with a scanning system.
When planning a treatment, typically a plurality of irradiation fields, with different angles of incidence, are planned for individually. Each irradiation field is adapted to the scanning system. For example, each field is planned individually and its expanse is limited by a scanning range of the scanning system. The maximum deflection of the particle beam determines the scanning range. A distinction is made between 2D scanning (the particle beam deflection is in two directions) and 1D scanning. In 1D scanning, the patient is moved in increments, so that even a volume that is extensive in the second dimension can be irradiated.
Irradiation of a target volume in the radiation treatment phase may have a different position and/or size than was determined in the planning phase for setting up the irradiation field. This may be problematic because as a result of the change in location and/or size of the target volume, the target volume may not be located at the planned site in the patient despite position verification of the patient.
A similar situation arises in irradiation of targets that, for example, move because of respiration. These problems are discussed, for example, in E. Rietzel et al, "Four-Dimensional Image Based Treatment Planning: target volume segmentation and dose calculation in the presence of respiratory motion", Int. J. Radiation Oncology Biol. Phys. Vol. 61, No. 5, pp. 1535-1550, 2005. This article also discloses methods for segmentation that may be used for demarcating a tumor tissue. In radiooncology, segmentation and registering of image data are known.

Radiation therapy system and method for adapting an irradiation field


The present invention provides a phase control plate including n layers (n≥4) of overlapping admittance sheets (10-1 to 10-6) each of which includes a plurality of plane unit cells, in which an admittance of a first plane unit cell included in an admittance sheet in a layer a (1≤a≤n) and an admittance of a second plane unit cell being included in an admittance sheet in a layer b (1≤b≤n and b≠a) and overlapping the first plane unit cell are different from each other.

A technology using a dielectric lens is known as a technology of controlling a phase of an electromagnetic wave.
A technology related to the present invention is disclosed in Patent Document 1. Patent Document 1 discloses a device for coupling of an electromagnetic radiation from outside to inside of a biological matter or from inside to outside of the biological matter. The device includes a first metamaterial. The first metamaterial includes a substrate having a thickness equal to or less than a first wavelength of the electromagnetic radiation and a plurality of elements supported by the substrate. Each of the plurality of elements has a first length equal to or less than the first wavelength of the electromagnetic radiation, and at least two of the plurality of elements are not the same.

This patent is subject to a terminal disclaimer.


A method of determining characteristics of a signal and an apparatus using the method. The apparatus for determining characteristics of a signal includes: a level detector receiving sample values of a radio frequency (RF) signal and binary data obtained by binarizing the RF signal, generating selection signals based on the binary data, classifying each of the sample values of the RF signal into one of a plurality of levels using the selection signals, and outputting average values of sample values of each level; and a signal characteristics determiner determining a characteristics value that indicates the characteristics of the RF signal using the average values of the sample values belonging to each level.

1. Field of the Invention
The present invention relates to a method of determining the characteristics of a signal and an apparatus using the method, and more particularly, to a method of determining the characteristics of a RF signal obtained from an optical disc and an apparatus using the same.
2. Description of Related Art
A beam reflected from an optical disc is converted into an electric signal to generate binary data which is recorded in the optical disc by a specified signal processing technique. A signal obtained by converting the beam reflected from the optical disc into the electric signal is called a RF (Radio Frequency) signal. Even though binary data is recorded in the optical disc, the RF signal obtained from the optical disc has analog signal properties due to the characteristics of the optical disc and optical characteristics. The RF signal is binarized to obtain the binary data.
Typically, a variety of indexes that indicate the characteristics of the RF signal obtained from the optical disc exist. Such indexes include, for example, an asymmetry of RF signal and a modulation ratio of the same. The RF signal includes a signal having various periods depending on the modulation of data and which code is used. For example, in a case where the RF signal is modulated using a (2,10) code, a 3T signal that is 3 times the basic feet period is a signal having the shortest period and an 11T signal is a signal having the longest period. The asymmetry is a scale indicating how far the center of a signal having a specified period shorter than the longest period is away from the center of a signal having the longest period. The modulation ratio is a scale indicating how small the size of the signal having a specified period shorter than the longest period is compared to the size of signal having the longest period. FIG. 1 is a graph illustrating an eye-pattern signal in order to describe the asymmetry and modulation ratio. The eye-pattern eye is obtained by simultaneously displaying signals having a variety of periods obtained from the optical disc on an oscilloscope.
Referring to FIG. 1, 11TTOP and 11TBTM indicate the maximum value and the minimum value, respectively, of the 11T signal, which is a signal having the longest period, in a case where a signal is modulated using a (2,10) code. 3TTOP and 3TBTM indicate the maximum value and the minimum value, respectively, of the 3T signal, which is a signal having the shortest period. The asymmetry and modulation ratio of the RF signal are calculated using 11TTOP, 11TBTM, 3TTOP, and 3TBTM. The asymmetry and modulation ratio are disclosed in detail in U.S. Pat. No. 5,490,127.
The foregoing asymmetry and modulation ratio are required to have a value within a specified range so that a data recording and/or reproducing device in which the optical disc is loaded can reproduce the data recorded in the optical disc without error. Therefore, it is essential to exactly measure scale indicating characteristics of the RF signal such as asymmetry and modulation ratio, etc.
However, an increase in recording density of the optical disc and/or deterioration of recording quality thereof result in deteriorating quality of the RF signal obtained from the optical disc. Accordingly, it is difficult to exactly determine a scale that indicates the characteristics of the RF signal such as asymmetry and modulation ratio, etc.

Method for determining characteristics of signal and apparatus using the same


A method for producing a glass panel for silicon device fabrication, which method comprises forming a noncrystalline, or mixed-phase, silicon film on a glass substrate, the glass having a strain point greater than 560.degree. C., and subjecting the filmed glass to a heat treatment comprising heating at a temperature of at least 550.degree. C. for a period of time sufficient to convert the silicon film to polycrystalline silicon and to compact the glass.

Silicon finds wide application in electronic device production. One particular utility is thin film transistors (TFTs). Such transistors are critical components in numerous devices. A device of great interest currently is a liquid crystal display (LCD).
It is a goal of the silicon device industry, and especially active matrix liquid crystal device (AMLCD) production, to achieve higher performance by replacing amorphous silicon (a-Si) thin film transistors (TFTs) with a polycrystalline silicon (poly-Si) version. This change would result in higher on-currents, better frequency response, larger displays, and potentially longer life-times. It would be possible to implement peripheral circuitry, as well as pixel switches, on the glass substrate. This would greatly reduce the number of external connections to the substrate, thus increasing reliability and reducing cost.
Poly-Si TFTs are very attractive for the above reasons. The poly-Si film required for TFT fabrication can be formed directly on a flat glass substrate with a high strain point. Such glasses have been proposed, for example, in U.S. Pat. Nos. 5,116,787 and 5,116,789 (Dumbaugh, Jr. et al.).
Alternatively, a noncrystalline film, or a mixed-phase film, can be deposited and then heat treated to form a polycrystalline film. M. K. Hatalis et al. explain in "Low Temperature Polysilicon Thin Film Transistors on Corning Code 1734 and 1735 Glass Substrates", Proceedings of the Society for Information Display, 1993, pp 724-7, the process for depositing a "mixed-phase" film. The deposited silicon film consists of a mixture of noncrystalline and crystalline regions, with the material becoming completely polycrystalline during a subsequent heat treatment. This procedure is preferred because it produces a film with a larger grain size for higher electron mobility and a smoother surface for subsequent gate dielectric deposition.
Again, a glass exhibiting a high strain point is demanded as is discussed by Hatalis et al., supra. If, however, the glass is compacted via a combined non-damage anneal/crystallization process, then glasses demonstrating somewhat lower strain points, such as Corning Code 7059 glass with a nominal strain point of 593.degree. C., can be utilized. Hatalis et al. reported crystallizing a mixed-phase film by a heat treatment of 12 hours at 550.degree. C. and crystallizing a noncrystalline film by a heat treatment of 36 hours at 550.degree. C. Accordingly, it can be appreciated that heat treating at a higher temperature, i.e., one no lower than about 10.degree. C. below the glass strain point, e.g., 580.degree.-590.degree. C., would result in shorter process times for concurrent compaction and crystallization. A relationship between time and temperature is shown in FIG. 1 of a paper by N. A. Blum and C. Feldman, "The Crystallization of Amorphous Silicon Films", Journal of Non-Crystalline Solids, 11, pp. 242-6 (1972), for silicon films deposited by electron beam deposition. Substrate temperature was 200.degree.-300.degree. C.
Liquid crystal display devices, whether passive or active, customarily embody thin, parallel, spaced glass panels with an intermediate liquid crystal layer.
A passive display device relies upon the threshold properties of the liquid crystal material. In an active device, the back panel, or active plane, has electronic switching devices, such as thin film transistors (TFTs). These are formed on the panel by photolithographic steps, together with attached circuitry. The front panel, or color plane, has transparent, colored dots, or stripes, in the case of a full color display.
Fabrication of the active plane, or active matrix, involves the use of multiple photolithographic steps which require precise alignment. This requires that the panels not only have precise dimensions as formed, but that such precise dimensions be retained during subsequent processing steps. However, these processing steps may involve thermal exposure at temperatures where a glass may undergo structural rearrangement and/or dimensional relaxation. Accordingly, it has become common practice to subject glass panels to a compaction process. This occurs after formation of the panel, and before further thermal processing during device formation.
Compaction involves reheating a glass body to a temperature below the glass softening point, but equal to or above the maximum temperature reached in a subsequent processing step. This achieves structural rearrangement and dimensional relaxation in the glass prior to, rather than during, the subsequent processing. It will be appreciated that the time held at a particular temperature will be based upon the time required for the particular processing step. Structural rearrangement and dimensional relaxation in a glass will take place more rapidly as the temperature is raised. It will be recognized that the time required therefore will be shorter as higher temperatures are utilized. Preliminary compaction is imperative where it is necessary to maintain precise alignment and/or flatness in a glass body during subsequent photolithographic processing. This is often the case in the manufacture of active panels for flat panel display devices.
It is economically attractive to compact glass sheets in stacks. However, this necessitates interleaving, or separating, adjacent sheets with a release material to avoid sticking. At the same time, it is necessary to maintain the sheets extremely flat, and with an optical-quality surface finish.
The panels used in an LCD device must, of course, be of optical quality. Strict cleanliness is a requirement during all processing. Any marring of the surface, such as surface scratches, indentations, or the like, must be avoided.
It has been proposed, in U.S. Pat. No. 5,073,181 (Foster et al.), to substitute a monolayer of submicron silica particles as a parting layer. However, this still requires removal, and, consequently, further handling.
Accordingly, a pending application discloses applying a permanent barrier layer film that performs the dual function of a parting layer during compaction. The film is colorless and transparent, is deposited from an atmosphere of an atomized, or ionized, refractory material, or reactive precursor, and is 50-500 nm thick. The application is Ser. No. 08/132,554, a continuation-in-part of Ser. No. 07/853,587, filed Mar. 18, 1992, in the name of F. P. Fehlner, and assigned to the same assignee as the present application.
Glasses displaying strain points as low as about 560.degree. C. are operable in the present invention. However, the temperatures to which LCD substrates are exposed have been continually increasing in recent years. Therefore, the preferred glasses will exhibit strain points greater than 560.degree. C. and, most preferably, in excess of 650.degree. C.
In order to consistently achieve the requisite optical quality in LCD panels, it would be desirable to avoid separate processing steps to the extent possible. In particular, it would be highly desirable to compact the glass substrate and crystallize a silicon film in one integrated operation. Any interfacial damage could then be annealed out and glasses with lower strain points employed.
It is then a basic purpose of the present invention to provide a method that incorporates these desired features. A specific purpose is to provide an improved method of producing a panel for an AMLCD device. Another specific purpose is to provide a novel means of producing a poly-Si film suitable for TFT fabrication on a compacted glass panel.


A vacuum kiln apparatus and method of using same are disclosed for use in drying corn, other grains, seeds and legumes. The vacuum kiln apparatus can include a support base, a wall, a vacuum pump system, a pressure valve, a top hatch, a machinery access hatch, an anti-overload baffle, a conveyor system, a motor, a chamber vent valve, an air outlet manifold and an air compressor. The wall defines an internal chamber for receiving the grain. The vacuum pump system is used to draw down the pressure within the internal chamber which drives moisture out of the corn while maintaining the integrity of the corn, i.e., drying the corn with little or no cracking. The air outlet manifold along with the air compressor are used to flush high pressure air through the piles of corn to strips off any residual water that may be clinging onto the exterior of the corn grains.

It is preferable to lower the amount of latent moisture in grains in order to extend their shelf life. Drying grains inhibits molds, such as, Diplodia, Gibberella, Fusarium, Aspergillus, and Alfatoxin from compromising the integrity of the grains prior to consumption.
Conventional drying methods for treating freshly harvested grains have been to thermally drive latent moisture water out of the grain by burning fossil fuels and even burning discarded construction materials. These forced hot air methods are expensive and waste and require vast amounts of expensive fuels. As a result, conventional drying methods can exhibit very negative effects, such as releasing untold amounts of pollutants/carbons which in turn contribute to global warming. Accordingly, there is a need to dry grains by using a more economical and ecological means.

Vacuum kiln apparatus and method of using same


A network interface to a data network has a modulator-demodulator. The modulator-demodulator receives a modulated carrier signal from an input connection. A power circuit connected to the input connection receives electrical power from a loop plant and provides the electrical power to the modulator-demodulator.

Exemplary embodiments generally relate to telephonic communications, to digital communications, and to multiplex communications and, more particularly, to transmission of digital signals over telephone lines, to modulator-demodulators, and to pathfinding and routing.
Network interfaces can be improved. A network interface device serves as a demarcation point between a cable or telephone local loop and a customer's network. Because nearly every home, building, and business has a network interface device, improvements are continually desired.

Methods, systems and products for providing modem functions


A method and apparatus is provided for reducing interference in a communication system. A feedback-controlled biased inverting limiter is used to reduce interference power by trapping the interfering signal, while passing the wanted signal through to the output. The amplitude trap triples the frequency of a signal component of a particular amplitude, thus shifting it out of the communication band and into the stopband of the receiver or transponder filter. The feedback-controlled biased inverting limiter uses a hard limiter, window comparator, feedback loop, and an exclusive NOR gate to trap the interfering signal, while allowing the wanted signal to pass through to a receiver.

In various types of communication systems, electromagnetic interference may cause problems with the operation of the communication system. Generally, electromagnetic interference is a disturbance that can affect the operation of a circuit due to electromagnetic induction or electromagnetic radiation emitted from an external source. In a communication system, electromagnetic interference may cause the degradation or loss of data. Exemplary sources of electromagnetic interference include other electronic devices, undesired wireless signals, radio jamming signals, as well as natural phenomenon.
One example of a radio-frequency interference (RFI) suppression technique is described in U.S. Pat. No. 5,742,900 (Arnstein, et al.), which is incorporated by reference herein. In this example, a biased inverting limiter is used to reduce interference. This example requires two signal paths; one path to estimate the amplitude envelope of the interference signal, and a second path to process with the nonlinear biased inverting limiter acting as the "amplitude trap". A carefully calibrated bulk delay line and compensating linear amplifier are required in the second, nonlinear processing path to match the group delay of the control path.
The requirement of a delay element in the nonlinear RF signal path is problematic for implementation, as is the linear booster amplifier to compensate for the attenuation inherent in practical delay elements. In an interference environment, linear amplifiers early in the receiver signal chain are already vulnerable to saturation or undesirable nonlinear effects.

Feedback-controlled biased inverting limiter for RFI suppression


A continuous process is disclosed for preparing dialkyl disulfides by reacting an alkyl alcohol and hydrogen sulfide in one reaction zone, and then passing the reactor effluent into a second reaction zone where it is reacted with elemental sulfur in the presence of a solid, particulate catalyst.

This invention relates to a continuous process for the manufacture of dialkyl disulfides by reacting an alkyl alcohol with hydrogen sulfide over a solid, particulate catalyst, in one reactor zone and then passing the reactor effluent into a second reaction zone, where it is reacted as a vapor with elemental molten sulfur in the presence of the same or different solid, particulate catalyst. More particularly, it relates to a two-reactor process for the continuous manufacture of a dialkyl disulfide from a C.sub.1 -C.sub.12 alkyl alcohol, hydrogen sulfide, and sulfur, in the presence of solid particulate catalysts.
The process reactions are represented by the following equations: EQU catalyst(1)2ROH+2H.sub.2 S.fwdarw.2RSH+2H.sub.2 O(reactor 1) EQU catalyst(2)2RSH+S.fwdarw.RSSR+H.sub.2 S(reactor 2) EQU 2ROH+H.sub.2 S+S.fwdarw.RSSR+2H.sub.2 O(overall process) (3)
When R is methyl, for example, the process can be utilized to prepare dimethyl disulfide (DMDS) from methanol, hydrogen sulfide, and elemental sulfur, according to equation (3) above. DMDS is a well known article of commerce, being used as a sulfiding agent for the pre-treatment and post-regenerative treatment of hydro-desulfurization catalysts in petroleum refining, as a down-hole sulfur solvent for oil wells, and as a chemical intermediate in the manufacture of agricultural compounds in lieu of methyl mercaptan.

Process for the manufacture of dialkyl disulfides


Embodiments of the present invention provide a system for facilitating reconciliation and correlation of work flows. The system is configured for identifying one or more applications associated with an operation, identifying relationships between each of the one or more applications, generating a matrix comprising the relationships between each of the one or more applications, receiving one or more entries from the one or more applications, storing the one or more entries in a ledger, and generating a single reconciliation file combining the one or more entries and the relationships.

Typically, multiple applications are utilized for different workflows that complete an operation. However, using multiple applications that share data, records, files, or the like need a system in place that reconciles each of the applications. Conventional systems do not effectively reconcile and correlate workflows, thereby resulting in inconsistencies. Moreover, it is difficult to verify whether the achieved goal is accurate. As such, there exists a need for a system to reconcile and correlate workflows effectively.

System for facilitating reconciliation and correlation of workflows


A mounted, retractable step for motor vehicles, such as passenger vans, that slides into an extended position for assisting entrance into the side of the passenger van. The step is mounted on the ends of a pair of square rods that slide horizontally under the passenger van. The rods are carried on an outer guide and between a pair of spaced-apart inner guides. The outer guide is attached to a pair of outer guide supports mounted to the edge of the underside of the van. The inner guides are attached to an inner guide support mounted to the underside of the van. Each of the rods has a pair of guide stops, in the form of nipples extending downwardly from the bottom side of the rods, that lock the rods into an extended position and a retracted position depending on which guide they straddle. The step is moved from the retracted position to the extended position by lifting the step slightly and then sliding it out from under the passenger van. This slight lift disengages the outer guide stops from the outer guide, allowing the rods to be slid through the inner guides and over the outer guide. Similarly, to secure the step in the extended position, the step is lifted slightly to cause the inner guide stops to straddle the outer guide. In order to move the step from the extended position to the retracted position, this procedure is reversed.

1. Field of the Invention
The present invention relates to retractable steps for motor vehicles. More particularly, the present invention relates to a step mounted to the underside of a passenger van and that can be pulled out for use and retracted for storage.
2. Discussion of Background
The use of a step or steps, mounted to a motor vehicle, for assisting entrance into the motor vehicle is well known in the art. Moreover, vehicular-mounted steps that retract, either by folding or sliding out of the way when not in use are also known to exist for many types of motor vehicles, especially motor homes and trailers.
For example, U.S. Pat. No. 3,515,406, issued to Endsley, Jr., and U.S. Pat. No. 3,743,320, issued to Clark, both disclose various embodiments of retractable steps preferably for campers that fold out from under the camper bodies. Endsley, Jr. discloses a porch that extends by sliding from underneath a camper. The porch has a step that folds out from a pair of pivoting supports, and a pair of folding legs at either side of the porch that engage the ground to stabilize the porch.
Clark (U.S. Pat. No. 3,743,320) discloses a pair of steps held in spaced relation by a pair of legs. The legs are pivotally connected to the ends of two lateral supports that horizontally extend from a stowage unit located under the camper body. The unit is configured under the camper body so that the step assembly engages the ground for support when extended into operable position.
Evans, in U.S. Pat. No. 2,145,647, discloses a retractable camper step supported by a pair of rods that slide in tubes hung from the frame of the camper by brackets. The step unit has a latch for maintaining the step in its retracted position when not in use.
Also, two foreign patents, GB 1541411, issued to Birch et al, and Canada 561581, issued to Benne, disclose retractable steps that extend out from under various motorized vehicles, preferably motor trucks and trailers. Birch et al feature a retractable, cantilevered step assembly with a spring-loaded plunger that inserts into a corresponding hole along the side of the step supports to maintain either the retracted or extended step position. Benne discloses a retractable, vehicular step that folds out from a pair of supports. The supports hang vertically from a mounting assembly attached to the underside of the vehicle when extended and slide up and back into the mounting assembly when retracted.
Similarly, Wampfler, in U.S. Pat. No. 3,341,223, discloses a retractable safety steps for use in assisting entrance and exit from the back door of a school bus. The steps have textured surfaces and are extended and retracted using rollers. The steps have mechanical stops to limit travel.
Still, the step assemblies discussed above have relatively complex configurations that preclude them from being adapted for easy installation under existing passenger vans. Nothing in the prior art is believed to have a simple, yet effective, construction adaptable for installation under existing passenger vans.
There is a need for a retractable step assembly, having a minimum of elements, that is adaptable for installation on existing passenger vans and similar motor vehicles.


Methods and compounds for inhibiting coke formation in pyrolytic reactors and furnaces are disclosed wherein a molybdenum coke retarding treatment is used. Optionally, but preferably, a boron compound is used in conjunction with the molybdenum to provide optimal coke retarding performance.

Coke deposition is generally experienced when hydrocarbon liquids and vapors contact the hot metal surfaces of processing equipment. While perhaps not entirely technically understood, because of the complex makeup of the hydrocarbons, the hydrocarbons at elevated temperatures and in contact with hot metallic surfaces undergo various changes through either chemical reactions and/or decomposition of various unstable components of the hydrocarbon. The undesired products in many instances include coke, polymerized products, deposited impurities and the like. Whatever the undesired product that may be formed, the result is the same, i.e., reduced economies of the process. If these deposits are allowed to remain unchecked, heat transfer, throughput and overall productivity are detrimentally effected. Moreover, downtime is likely to be encountered due to the necessity of either replacing and/or cleaning of the affected parts of the processing system.
While the formation and type of undesired products are dependent upon the hydrocarbon being processed and the conditions of the processing, it may generally be stated that such products can be produced at temperatures as low as 100.degree. F.; but are much more prone to formation as the temperature of the processing system and the metal surfaces thereof in contact with the hydrocarbon increase. At these temperatures, coke formation is likely to be produced regardless of the type hydrocarbon being charged. The type coke formed, i.e., amorphous, filamentous or pyrolytic, may vary somewhat; however, the probability of the formation of such is quite high.
As indicated in U.S. Pat. Nos. 3,531,394 and 4,105,540 the teachings of which are incorporated herein by reference, coke formation and deposition are common problems in ethylene (olefin) plants which operate at temperatures where the metal surfaces in contact with the hydrocarbon are sometimes at 1600.degree. F. and above. The problem is prevalent in the cracking furnace coils as well as in the transfer line exchanger where pyrolytic type coke formation and deposition is commonly encountered. Ethylene plants, often referred to generally as "olefin plants", originally produced simple olefins such as ethylene, propylene, butanes and butadiene from a feed of ethane, propane, butanes and mixtures thereof. Later developments in the area of technology however, have led to the cracking of heavier feedstocks, because of their availability, to produce aromatics and pyrolysis gasoline as well as light olefins. Feedstocks now include light naphtha, heavy naphtha and gas oil. According to the thermal cracking processes utilized in olefin plants, the feedstocks are cracked generally in the presence of steam in tubular pyrolysis furnaces The feedstock is preheated, diluted with steam and the mixture heated in the pyrolysis furnace to about 1500.degree. F. and above, most often in the range of 1500.degree. F. to 1650.degree. F. The effluent from the furnace is rapidly quenched by direct means or an exchanger which are used to generate high pressure steam at 400 to 800 psig for process use. This rapid quench reduces the loss of olefins by minimizing secondary reactions. The cooled gas then passes to the prefractionator where it is cooled by circulating oil streams to remove the fuel oil fraction. In some designs, the gas leaving the quench exchanger is further cooled with oil before entering the prefractionator. In either case, the heat picked up by the circulating oil stream is used to generate steam and to heat other process streams. The mixture of gas and steam leaving the prefractionator is further cooled in order to condense the steam and most of the gasoline product in order to provide reflux for the prefractionator. Either a direct water quench or heat exchanger are used for this cooling duty.
After cooling, cracked gas at, or close to atmospheric pressure, is compressed in a multistage compression system to much higher pressures. There are usually four or five stages of compression with interstage cooling and condensate separation between stages. Most plants have hydrocarbon condensate stripping facilities. Condensate from the interstage knockout drums is fed to a stripper where the C.sub.2 hydrocarbons and lighter, are separated. The heavier hydrocarbons are fed to the depropanizer.

Method and composition for retarding coke formation during pyrolytic hydrocarbon processing


Surface-treated copper foils that exhibit a material volume (Vm) less than 1.90 μm3/μm2. Where the surface-treated copper foil is treated on the drum side and includes a treatment layer comprising a nodule layer. Such surface-treated copper foils can be used as a conductive material having low transmission loss, for example in circuit boards.

The increasing demands for transmitting massive data requires ever increasing signal transmission speeds between components on circuit boards. To achieve these speeds, frequency ranges are necessarily increasing from below 1 MHz to, 1 GHz, 10 GHz or even higher. In these higher ranges, the currents flow mostly near the surface of the conductor due to the well-known "skin effect" which is the tendency of high frequency current density to be highest at the surface of a conductor and to decay exponentially towards the center. The skin depth, where approximately 67% of the signal is carried, is inversely proportional to the square root of the frequency. Accordingly, at 1 MHz the skin depth is 65.2 μm, at 1 GHz it is 2.1 μm, while at 10 GHz the skin depth is only 0.7 μm. At the higher frequencies, the surface topography or roughness of the conductor becomes ever more important since a roughness on the order of, or greater than, the skin depth will impact the signal transmission through scattering.
An exacerbating factor is that usually the surface of the conductor in printed circuit boards is intentionally roughened to enhance adhesion characteristics to the resin layer used in the laminated structures of circuit boards. A surface roughness, Rz, on the roughened surface on the order of several m is typical and will impact any transmission in the GHz range. The design is therefore constrained by the conflicting need for high roughness to ensure enough adhesion, and low roughness to minimize transmission loss.
One approach to try and provide control of the surface topography is to roughen either the deposited side or the drum side of an electrodeposited copper foil. The deposited side is typically rougher than the drum or "shiny" side. In a normal treated foil, the deposited side is roughened and adhesion to the resin layer is superior since the roughness is typically higher. In order to maintain the quality of signal transmission, reverse treated foil (RTF) has been developed. RTF is roughened at its shiny side, so that roughness is higher than without any roughening but can be controlled to be lower than where roughening is provided on the deposited side. Therefore, RTF provides good adhesion, for example comparable to normal treated foil or at least acceptable for applications such as for use in circuit boards. RTF also ideally has reduced transmission loss of signal when compared to normal treated foil.
Although RTF technologies can provide an improvement with regards to transmission loss, it is not always clear what surface properties of a copper foil provide an acceptable improvement. Although Rz is one parameter that can be used, in some cases this property is not predictive enough. There therefore remains a need for copper foils with low transmission loss for the manufacturing of circuit boards and copper foils with controlled properties to achieve the desired low transmission loss.

Low transmission loss copper foil and methods for manufacturing the copper foil


A method for encoding a video block using reference blocks comprises assigning the video block to one of first and second prediction groups, and encoding the video block according to a motion compensated prediction encoding mode, using the reference blocks depending on the one of the first and second prediction groups to which the video block is assigned, one of the reference blocks being a decoded block, wherein a first prediction group is obtained by a prediction using the reference blocks belonging to a first prediction group, and a second prediction group is obtained by a prediction using the reference blocks belonging to at least one of the second prediction group and the first prediction group.

1. Field of the Invention
The present invention relates to a video encoding method and apparatus and a video decoding method and apparatus with the use of a motion compensated prediction intra frame encoding.
2. Description of the Related Art
As a video compression encoding technique, MPEG 1 (ISO/IEC 11172-2), MPEG2 (ISO/IEC 13818-2), MPEG 4 (ISO/IEC 14496-2) are put to practical use broadly. These video encoding modes are performed by a combination of an intra frame encoding, a forward prediction intra frame encoding, an encoding and a bi-directional prediction intra frame encoding. The frames encoded by these encoding modes are called I picture, P picture and B picture. P picture is encoded using as a reference frame P or I picture just before the former P picture. B picture is encoded using as reference frame P or I picture just before and after the B picture. The forward prediction interframe encoding and bi-directional prediction interframe encoding are referred to as a motion compensated prediction interframe encoding.
When the video encoding data based on the MPEG mode is played back in fast-forward, a method that only I picture that the reference frame is not required is played back or a method that only I and P pictures is decoded while skipping B picture using a nature that B picture cannot be used as a reference frame is conventional. However, when only I picture is played back, if the period of I picture is long, a high-speed fast-forward playback can be carried out but a smooth fast-forward playback cannot be carried out. In a fast-forward playback with the use of I and P pictures, since P picture is encoded by an interframe prediction encoding, all I and P pictures must be decoded. For this reasons, it becomes difficult to change a fast-forward speed freely.
In the video encoding of the conventional MPEG mode, B picture is not used as a reference frame. Therefore, in case of the prediction configuration that plural B pictures continue, B picture must be encoded using P picture separating from B picture with respect to a time as a reference frame. This results in a problem that the encoding efficiency of B picture deteriorates. On the other hand, when the decoded B picture is used as a reference frame in P picture, it is necessary to decode all frames including B picture in the fast-forward playback while skipping B picture. As a result, it becomes difficult to perform the fast-forward playback effectively.
As described above, when the video encoded data obtained by the encoding including a motion compensated prediction interframe encoding such as MPEG is played back with a fast-forward, it is difficult to perform a smooth fast-forward playback at a free playback speed in playing back only I picture. When the fast-forward playback is performed with skipping B picture without decoding it, it is difficult to use the decoded B picture as a reference frame. For this reason, there is a problem that the encoding efficiency deteriorates in a prediction configuration that the B pictures continue.

Video encoding method and apparatus employing motion compensated prediction interframe encoding, and corresponding video decoding method and apparatus


In a relay device, a first memory stores correspondence information representing a correspondence relationship between a node and a port. A second memory stores information by which a port to suppress flooding of a frame is distinguishable. A relay part limits a port, which floods a frame addressed to a node of which information is not stored in the first memory, based on the information stored in the second memory.

FIGS. 1A and 1B are illustrations of a network structure containing a switch stacking. The stacking of switches (layer 2 switches) is to display a plurality of switches as a single switch by stack-connecting the plurality of switches. The stacking of switches may be referred to as virtualization of switches. FIG. 1A illustrates a physical structure of a network. In FIG. 1A, four switches (SW-A through SW-D) are connected through stack links L1 through L4. FIG. 1B illustrates a logical structure of the network of FIG. 1A. In FIG. 1B, the four switches that are stack-connected are displayed logically as a single switch V. In this case, a user can manage the four switches (SW-A through SW-D) integrally as a single switch (the switch V).
In the switch stacking, generally a redundant path is provided as a stack link. This is to permit a frame relay by using the redundant path as an alternative path when a malfunction occurs in one of the stack links. In FIG. 1A, the stack link L4 corresponds to the redundant path. For example, if the stack link L3, which connects between the switch SW-C and the switch SW-D, is out of use due to a failure, frames are sent to the stack link L4 to detour the stack link L3, thereby permitting communications between the switch SW-C and the switch SW-D.
However, if a loop is formed by the redundant path in the network, there is a problem in that a frame storm may occur if an appropriate action is not taken.
As an appropriate action for eliminating such a problem caused by a loop formed by a redundant path, there are the following conventional methods.
1. A control method according to STP (Scanning Tree Protocol).
2. A control method by including TTL (Time to live) in a frame.
3. A method of deciding a relay path at a frame transferer.
FIG. 2 is an illustration for explaining the control method according to STP. According to STP, a redundant path is appropriately cut (blocked) so that a network loop is not formed. In FIG. 2, a port connected to the stack link L4 is blocked in each of the switches SW-A and SW-D. According to STP, even if a problem occurs in an unblocked link and a communication between some switches cannot be performed, the communication between the switches concerned is permitted by switching the path by enabling the redundant path, which has been blocked.
FIG. 3 is an illustration for explaining the control method by including TTL in a frame. According to this method, TTL is included in a frame and the TTL is subjected to subtraction each time the frame passes one of switches so that the frame is discarded when the TTL becomes equal to zero. As a result, the frame is prevented from circulating in a network infinitely, which substantially eliminates formation of a loop. In the example of FIG. 3, a frame F1 containing TTL, which is equal to 1, is sent from the switch SW-D in a direction toward the switch SW-D. The frame F1 is not sent to a stack link beyond the switch SW-A, and a frame F2 is not sent to a stack link beyond the switch SW-B.
FIG. 4 is an illustration for explaining a method of deciding a path at a frame transferer. According to this method, a relay path within a stack is decided by one of switches contained in the stack, which one receives the frame first. In FIG. 4, a path is decided by the switch SW-D, and a frame F3 containing information (path information) regarding the decided path is sent to the switch SW-A. The switch SW-A performs a relay process in accordance with the path information contained in the frame F3.
Moreover, other methods are suggested as a technique to solve the loop problem, such as, for example, in Japanese Laid-Open Patent Application No. 2008-177677.
However, in STP, there is a problem in that a link in a blocked state cannot be utilized. That is, because frames other than a control frame are not transferred by the link in a blocked state in a normal condition, an average hop count becomes large. As a result, a load to a link shared by switches is increased, which generates frame congestion.
Moreover, there is a problem in that the method to include TTL in the frame is effective only for a switch corresponding to the TTL concerned. That is, TTL is not standardized in a layer 2 frame.
Further, in a case where a path is decided at a frame transferer, each switch is required to process a special format frame containing relay information. A function to register a path and seek for a path is required for each switch.


Some examples include an energy harvester for use in an electronic device to convert mechanical energy associated with vibrations of the electronic device into electrical energy. For instance, an energy harvester including rows of piezoelectric cantilevers may be arranged around a proof mass and may be utilized to convert the vibrations into electrical energy. In some examples, the energy harvester may include an electromagnetic energy harvester in addition to, or in place of the piezoelectric energy harvester.

One of the major problems facing manufacturers of portable electronic devices is achieving an effective balance between the size of the portable electronic device and battery life. The manufacturers of these devices typically resort to either reducing power consumption or increasing battery size. However, reducing power consumption is often difficult without reducing feature sets. On the other hand, increasing the battery size also increases the size of the portable electronic device, often making the portable electronic device heavier and more difficult operate. Therefore, manufacturers of electronic devices look to alternative solutions for increasing battery life without reducing function or increasing size of the portable electronic device.


A pressure-compensated fuse assembly may include a first chamber housing a first fluid and a plurality of solid particles. Additionally, the fuse assembly may include a second chamber housing a second fluid. Further, the fuse assembly may include a pressure compensator disposed between the first chamber and the second chamber. The pressure compensator may be configured to transfer pressure from the second fluid in the second chamber to the plurality of solid particles in the first chamber.

This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Natural resources, such as oil and gas, are a common source of fuel for a variety of applications. For example, oil and gas are often used to heat homes, to power vehicles, and to generate electrical power. Drilling and production systems are typically employed to access, extract, and otherwise harvest desired natural resources, such as oil and gas, that are located below the surface of the earth. These systems may be located onshore or offshore depending on the location of the desired natural resource. When a natural resource is located offshore (e.g., below a body of water), a subsea production system may be used to extract the natural resource. Such subsea production systems may include components located on a surface vessel, such as a rig or platform, as well as components located remotely from the surface vessel at a subsea location, typically at or near a subterranean formation (e.g., a well) at which the resource is located. For example, a subsea production system may include one or more subsea wellhead assemblies and Christmas trees for controlling the flow of a natural resource into or out of a well.
Additionally, a subsea production system may include one or more electrical components, such as pumps, motors, compressors, for example. For instance, the innate pressure within a well may decrease as a natural resource is extracted from the well over time, and a subsea pump may be used to facilitate the extraction of the natural resource from the well. The subsea production system may include a subsea power grid to provide power to the various electrical components of the subsea production system. To protect the electrical components from over-currents, the subsea production system may include fuses, which interrupt an electrical connection if the current flowing through the fuse is too high. Conventional fuses (e.g., surface or topside fuses) are designed to operate at a pressure of about one atmosphere (atm). To utilize conventional fuses for subsea applications, the fuses may be placed in one atm pressure vessels. The fuse vessels may be exposed to high pressures at subsea locations. Thus, the fuse vessels typically include thick walls to withstand the high pressures, which may increase the size, weight, and cost of the fuse vessels.


For drivers of different sizes driving signal lines of different lengths, maximum transition time constraints are compared to signal transition times to determine whether a potential noise problem exists with respect to the signal lines. Each driver size has a maximum line length and a maximum transition time associated with it. These maximum transition time constraints are used to determine whether the signal lines connected to respective drivers in the IC will have potential noise problems associated with them. For each signal line in the IC design, the signal transition time is determined and compared to the maximum transition time constraint. If the signal transition time exceeds the maximum transition time constraint, a potential noise problem exists with respect to the signal line.

The present invention is generally related to integrated circuits (ICs) and, more particularly, to using transition times on signal lines in an IC to determine whether the signal lines have potential noise problems associated with them.
As the geometries in integrated circuits (ICs) become ever increasingly smaller, the metallic signal lines on the ICs have become smaller in width and the spacing between the signal lines has decreased. This decrease in the width of the signal lines has increased the resistance of the signal lines. In order to reduce the resistance of the signal lines, the signal lines have been increased in height. However, this increase in height coupled with the reduction in the spacing between the signal lines increases the capacitance between adjacent signal lines. A given signal line has a signal line on each side of it, which results in the line in question coupling charge onto the lines on each side of it. Because the spacing between the lines is becoming smaller, the coupling capacitance between the lines is increasing. In addition, charge is also coupled onto the lines by elements on the IC above and below the signal lines.
This capacitance creates concerns because if, for example, the lines on both sides of the line in question are transitioning from high to low, and the line in question is at a high level, the coupling capacitance between the lines can cause the line in question to dip down to some extent below its high level. If the voltage level on the line in question dips down far enough, then the logic gate that is connected to the line in question sees a transition to a low level, which results in an erroneous state.
Various scenarios exist that make such an erroneous transition a concern. In one scenario, if the erroneous transition occurs simultaneously with, or very close in time to the end of the clock period, then the register that is capturing the next state will receive an erroneous state. Another scenario is, if the line in question is transitioning from low to high as the line on either side of it is transitioning low, the transition speed of the line in question will be reduced. If the transition speed is sufficiently reduced, then the timing requirements of the register downstream will not be met, i.e., the setup time of the downstream register will be violated. The setup time is the amount of time before the clock transitions that the data needs to be valid at the input to the register. In another scenario, if the adjacent lines are transitioning in the same direction as the line in question, then the transition speed of the line in question will be increased, which can cause hold time requirements to be violated. The hold time is the amount of time after the clock transitions that the voltage level (i.e., high or low) on the line must remain valid before it changes.
Accordingly, a need exists to be able to determine whether such transitions will result in noise on signal lines that is sufficient to cause setup and/or hold time requirements to be violated or to cause erroneous data to be latched in a register.
In accordance with the present invention, maximum transition time constraints for drivers of different sizes driving signal lines of respective maximum lengths are compared to signal transition times of an IC design to determine whether a potential noise problem exists with respect to the signal lines. Each driver size has a maximum line length constraint and a corresponding maximum transition time constraint associated with it. These maximum transition time constraints are used to determine whether the signal lines connected to respective drivers in the IC will have potential noise problems associated with them.
In accordance with the preferred embodiment of the present invention, each signal line is checked for potential noise problems. For each signal line in the IC design, the signal transition time is determined and compared to the maximum transition time constraint associated with the size of the driver driving the signal line. If the signal transition time exceeds the maximum transition time constraint, a potential noise problem exists with respect to the signal line.
These and other features and advantages of the present invention will become apparent from the following description, drawings and claims.

Using transition time checks to determine noise problems on signal lines of an integrated circuit


The present invention relates to isolated polypeptides having cellulolytic enhancing activity and isolated polynucleotides encoding the polypeptides. The invention also relates to nucleic acid constructs, vectors, and host cells comprising the polynucleotides as well as methods of producing and using the polypeptides.

1. Field of the Invention
The present invention relates to polypeptides having cellulolytic enhancing activity and polynucleotides encoding the polypeptides. The invention also relates to nucleic acid constructs, vectors, and host cells comprising the polynucleotides as well as methods of producing and using the polypeptides.
2. Description of the Related Art
Cellulose is a polymer of the simple sugar glucose covalently linked by beta-1,4-bonds. Many microorganisms produce enzymes that hydrolyze beta-linked glucans. These enzymes include endoglucanases, cellobiohydrolases, and beta-glucosidases. Endoglucanases digest the cellulose polymer at random locations, opening it to attack by cellobiohydrolases. Cellobiohydrolases sequentially release molecules of cellobiose from the ends of the cellulose polymer. Cellobiose is a water-soluble beta-1,4-linked dimer of glucose. Beta-glucosidases hydrolyze cellobiose to glucose.
The conversion of lignocellulosic feedstocks into ethanol has the advantages of the ready availability of large amounts of feedstock, the desirability of avoiding burning or land filling the materials, and the cleanliness of the ethanol fuel. Wood, agricultural residues, herbaceous crops, and municipal solid wastes have been considered as feedstocks for ethanol production. These materials primarily consist of cellulose, hemicellulose, and lignin. Once the lignocellulose is converted to fermentable sugars, e.g., glucose, the fermentable sugars are easily fermented by yeast into ethanol.
WO 2005/074647 discloses polypeptides having cellulolytic enhancing activity from Thielavia terrestris. WO 2005/074656 discloses polypeptides having cellulolytic enhancing activity from Thermoascus aurantiacus. WO 2007/089290 discloses polypeptides having cellulolytic enhancing activity from Trichoderma reesei. WO 2009/085935; WO 2009/085859; WO 2009/085864; and WO 2009/085868 disclose polypeptides having cellulolytic enhancing activity from Myceliophthora thermophila.
There is a need in the art for polypeptides having cellulolytic enhancing activity with improved properties for use in the degradation of cellulosic materials.
The present invention provides polypeptides having cellulolytic enhancing activity and polynucleotides encoding the polypeptides.

Polypeptides having cellulolytic enhancing activity and polynucleotides encoding same


A shakable lighting element includes a main unit, an inner seat, a conductive rod, a spring, a swing block, an LED and an outer shade. The inner seat is latched into the main unit and is installed with the spring and the LED. The spring is connected with the swing block, an end of the conductive rod penetrates the inner seat to be in contact with a battery and the other end is transfixed in the spring. When the main unit shakes, the swing block drives the spring to swing and when the spring touches the conductive rod, the LED illuminates.

a) Field of the Invention
The present invention relates to device which is able to activate an LED (Light Emitting Diode) to illuminate after shaking.
b) Description of the Prior Art
A conventional lighting element is generally controlled by a touch switch or a push switch to illuminate. However, due to a limitation by an expensive cost of the abovementioned switch, the cost cannot be reduced effectively for this kind of lighting element to develop a novice product;
therefore, improvement is required.


A pouch battery module is provided. The pouch battery module includes a metal housing, wherein a plurality of pouch battery cells arranged along a first direction is disposed inside the metal housing; and a rigid insulation plate being provided between an outermost pouch battery cell and the metal housing along the first direction.

Due to the advancement of new energy power battery technology and the vigorous promotion of government agencies of various countries, the application of new energy power batteries is becoming more and more widespread, especially in the field of electric vehicles. At present, pouch lithium batteries are normally installed in a frame structure. However, the frame structure is composed of a plastic frame and a heat sink plate embedded in the plastic frame. In this way, multiple battery packs will require multiple frame structures, resulting in increased weight and increased cost of the pouch battery module.


A method and apparatus for hanging off a coiled tubing velocity string in an existing, active gas production well. The method allows for the "hot" tapping into a charged coiled tubing run thereby eliminating the need for an end plug and blow out equipment on site. A sealed cutter assembly is connected to the hangoff assembly, the charged coiled tube is cut, and back pressure leakage is avoided by the use of a hangoff head which seals in two directions. The cutter assembly is removed and the coiled tubing velocity string is piped to a new sales line.

The present invention relates to an improved method and apparatus for hanging off a coiled tubing (CT) velocity string in an existing production well.
It is well known that liquid loading in gas wells is a problem which results in decreased gas production and in some cases complete cessation of production, i.e., what is known as a "kill". The gas flowing characteristics of a well may be affected by the normal production from gas reservoirs of condensate or water naturally occurring in the formation. If these liquids are not carried to the surface by the gas they will eventually load up in the downhole tubing and cut off the flow of gas. This occurs when there is insufficient transport energy in the gas phase to overcome the head of liquid in the tubing.
By running a line of smaller diameter CT into the existing production tubing string, a reduction in the gas flow area will result in an increased gas flow velocity sufficient to overcome the critical production velocity (C.P.V.). Thus, there has been considerable interest in methods for more economically (both in terms of time and material costs) hanging off the CT in the existing production string, particularly without having to kill the well. (See Wesson and Shursen, "Coiled Tubing Velocity Strings Keep Wells Unloaded," p. 56-60, WORLD OIL (July 1989)).
Current hangoff methods normally involve the following steps:
a. Setting up necessary rigging; PA1 b. Installing a CT hanger/packoff assembly on the existing production string; PA1 c. Installing a pumpout plug into the end of the CT to allow the CT to be run into the well while it is flowing without gas or liquid entering the CT; PA1 d. Running the CT to the desired depth; PA1 e. Energizing the packoff in the hanger/packoff assembly; PA1 f. Installing and setting slips on the CT; PA1 g. Cutting off the excess and removing the CT above the cut; PA1 h. Installing valves and other flow plumbing; PA1 i. Connecting nitrogen source to CT and blowing out the plug in the downhole end of the CT. PA1 j. Disconnecting nitrogen source and placing well on production through the CT velocity string.
Alternatively, if there is a need to initially blow out fluid in the production string, then the CT may be run into the string without the plug, but attached to a nitrogen source. After the nitrogen source is activated and the well fluids blown out, the CT must be retracted and the end plug placed in the CT. This is an extra step requiring additional time and cost.
As may be seen the current methods require the insertion of the downhole end plug which must be pumped out after the CT is run to the desired depth and cut off and this necessitates having a pumpout gas (nitrogen) and delivery system available on site. The method and apparatus of the present invention eliminates this costly and time-consuming step by allowing the operator to "hot tap" the CT which is loaded with gas or liquid after being inserted into the wellbore.

Coiled tubing velocity string hangoff method and apparatus


The adaptation precedence of an application (or order of adaptation of various components) is given as a directed acyclic graph (DAG), with each vertex being an atomic unit of adaptation, or a component which comprises of atomic units of adaptation. Each such component has an associated DAG specifying the order of adaptation with vertices as sub-components. Relations among sub-components and associated actions are stored as a table. The relations between sub-components of different components follow a set of constraints in order to be compatible relations. A linear order from the partial order is created as represented by the DAG and follows that order for adaptation of each component. Each component x is adapted atomically and then the table of relations is updated appropriately. As and when a component y is to be adapted, the table is looked-up and it is determined which relations and actions are to be enforced upon y while its adaptation is being executed. A new version of the application is the output at the end of the adaptation, which is semantically consistent with the given relations and actions.

A software application is accessed by a computing device and given the heterogeneous characteristics of such devices. The software application has then to be adapted for the characteristics of that device. The software application contains multiple components that are semantically related to each other; for example an image in one view being referred to in another view. (A "view" is a web page which is displayed back to the user in a web application). Another example is components which accept user inputs that may be very important to other components, as their behaviour would be dependant on the inputs. Therefore, any modification of a software application should carefully consider removal, updating or modification of components on which other components depend for correct functioning.
A known approach is translation or adaptation of the application components. This approach is widely used, however adapts the components one-by-one without taking care of the global semantics of the application. In this way, an element is modified without any related element being updated appropriately. For example, an image dropped in 'view 1' should lead to the reference to it being updated in 'view 2'. Since related elements are not updated at the adaptation of a given element, the applications generated as part of adaptation do not remain semantically consistent. This inconsistency may lead to malfunction of the application.
U.S. Pat. No. 5,561,803 (Kilis, issued on Oct. 1, 1996) describes incrementally processing a source representation of a set of objects into an intermediate representation. The object is to re-process only those objects which have been changed in some way when a modification is made. Each changed facet of a changed object is selected in turn for processing. If the selected changed facet affects the object itself, then the previous intermediate representation of the object is modified. If the selected changed facet affects objects referencing or being referenced by the first object, then the references to the first object are detached and the intermediate representation of the objects referencing or being referenced by the object are modified accordingly. If the selected changed facet modifies an attribute of other objects, then due to inter-relationships such as inheritance, etc., the change recursively propagates to the intermediate representations of the objects in the affected objects by repeating the propagating step for each of the affected objects until the attribute changes to each modified object have been propagated to all affected objects. Semantic checking is then performed on each of the objects changed.
It is an objective of the present invention to adapt applications taking into account device characteristics, while maintaining semantic and functional consistency.

Semantically consistent adaptation of software applications

International Business Machines Corporation


A transmitting device for a feeding mechanism of an information recording/reproducing apparatus includes an engaging member adapted to be engaged with a power source of the apparatus for power transmission, a fixing member adapted to be fixed to a pickup module of the apparatus, and a buffer member adapted to dampen shock due to collision. The buffer member includes at least two interconnecting portions which are deformable in a direction of movement of the pickup module, so shock due to sudden collision is effectively dampened.

1. Field of the Invention
The present invention relates to a mechanical transmitting device for a feeding mechanism of an information recording/reproducing apparatus, and particularly to a transmitting device which can effectively dampen shock of an optical pickup unit caused by accidental dropping or bumping.
2. Description of the Prior Art
In recent years, optical discs such as CDs (Compact Discs), DVDs (Digital Video Discs or Digital Versatile Discs) and MDs (Mini Discs) have been developed as large capacity, high-density media for recording a variety of information. It is very convenient to carry around such storage media.
An optical recording/reproducing apparatus can reproduce high-density information recorded on an optical disc, and can record information on an optical disc at a high density. An optical pickup unit of the optical recording/reproducing apparatus moves along radial directions of the optical disc to reproduce or record the information. Because a driving mechanism of the optical pickup unit is precisely designed, a base of the pickup unit seldom sustains accidental shock. Nevertheless, in practice, accidents involving the information recording/reproducing apparatus often happen. On certain of such occasions, for example when the information recording/reproducing apparatus is accidentally dropped to the ground, the optical pickup unit may bump against other parts of the optical recoding/reproducing apparatus and may even itself sustain damage.
Referring to FIG. 4, a typical information recording and reproducing apparatus 9 is shown. A pickup module 2 is movably fixed on a base 3, the pickup module 2 being movable along radial directions of a disc (not shown). The pickup module 2 is driven by a transmitting member 7 transmitting output power of a stepping motor (not labeled). The transmitting member 7 comprises an engaging portion 4 engaged with a feeding screw (not labeled) of the stepping motor, and a linking portion 5 engaged with the base 3. The feeding screw is located between two parallel bearing portions 6a, 6b fixed to a chassis 1. Two stopper projections 5a, 5b respectively extend outwardly from the linking portion 5 in directions parallel to the feeding screw. The stopper projections 5a, 5b are first to against the bearing portions 6a, 6b respectively, such that the base 3 with the pickup module 2 thereon is prevented from severely bumping against other parts of the information recording and reproducing apparatus 9. This kind of mechanism is disclosed in European Patent Application No. EP1058243A1.
However, when the ends of the stopper projections 5a, 5b come into contact with the bearing portions 6a, 6b, a great amount of shock may be transmitted to the pickup module 2 via the base 3. The precision mechanism of the pickup module 2 is liable to sustain damage that causes malfunction or even complete failure.

Transmitting device for feeding mechanism of information recording/reproducing apparatus

Bao-an District, Shenzhen, Guangdong Province

Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd.


A hand-held portable electronic device frame assembly including a heat spreader made from a thermally conductive material; and an overmolded frame member which has been overmolded onto the heat spreader. The overmolded frame member includes a molded polymer material which forms a thermal insulator on the heat spreader. The frame member is adapted to structurally support at least one component of a hand-held portable electronic device thereon.

1. Field of the Invention
The invention relates to heat transfer and, more particularly, to heat transfer in a hand-held portable electronic device.
2. Brief Description of Prior Developments
Heat spreader elements are known which have been used for transferring heat from hot components. Materials such as copper, aluminum, silicon or graphite foil have been used for example. It is known to use a heat spreader encapsulated by using conventional thermoset (e.g. epoxy material).
A conventional method of cooling of a mobile device is based on use of a thermally high conductive printed wiring board (PWB). Heat is conducted from the integrated circuits (ICs) to the PWB; which is capable to spread the heat to the whole PWB area and, furthermore, to mechanics. High thermal conductivity of the PWB is achieved with using large, constant, and thick power and ground (GND) layers made of copper. This has been a sufficient method for cooling the low power devices so far. However, new technologies set totally new environment and requirements for cooling of mobile devices.
In mobile electronics, constantly increasing miniaturization with simultaneous increased need for higher power levels make thermal management of the device demanding due to the maximum temperatures for device surfaces and components. Efficient thermal management is one the elements enabling product functionality and increasing reliability. By enhancing cooling, higher power levels can be applied enabling added functionalities and performance. From a thermal point of view, there are a variety of cooling options to follow starting from chip level and package structural design to system level thermal management optimization. However, if focusing in conventional cooling solutions based on materials or cooling devices, they must be more and more integrated in the current mechanics due to miniaturization requirements.
In mechanics, most of the covers and chassis of mobile devices are currently made of thermoplastics using injection-molding technology. Thermoplastics, as such, are thermal insulators with their very low value of thermal conductivity. In practice, this prevents heat spreading in the mechanics causing localized high temperatures "hot spots".
U.S. patent application Ser. No. 11/157,719, which is hereby incorporated by reference in its entirety, discloses one type of heat transfer system used in a mobile telephone. There is a desire to provide a new type of system for mobile devices, such as hand-held portable electronic devices, which have a different type of heat spreader system, and a method of manufacturing.

Hand-held portable electronic device having a heat spreader


A multi-port status message maintains network connections between virtual ports of two network elements. The network elements negotiate the network connections between first virtual ports on a first network element and corresponding second virtual ports on a second network element. The first network element generates a multi-port status message listing the first virtual ports that are actively connected to the corresponding second virtual ports. The first network element sends the multi-port status message to the second network element to maintain the network connections.

In some networking environments, the operational status of a network connection between ports of two network elements is monitored and maintained via periodically transmitted status messages. At predetermined intervals, one or both network elements transmits a status message from one port to the corresponding port of the network element on the other end of the network connection. Upon receiving the status message, the network element continues to maintain the corresponding port. Failure to receive a status message for a particular network connection using a particular port signals the network element that the port may no longer be required, and the network element may direct resources to other ports.
Virtual networking allows configurable network elements to define virtual ports according to the current needs of the networking environment. As the number and configuration of network connections within the network environment changes, each network element allocates resources to maintaining virtual ports that support the current configuration. Two network elements may support a variable number of network connections between the two physical network devices through a variable number of virtual ports.


Each of first and second cell array groups has a cell array and a row decoder. Circuit blocks including a reset transistor, a Y selector, a write transistor, a block decoder, and a source decoder except the cell array and row decoder are arranged in the area between the first and second cell array groups. Since an address signal, a control signal, and a power supply common to the circuit blocks can be shared, the layout area can be reduced.

The present invention relates to a semiconductor memory device and, more particularly, to its cell array layout.
A semiconductor device is manufactured by forming a number of chips on a wafer by lithography. In this process, the chip area determines the number of chips available from one wafer. That is, the cost of the semiconductor memory device largely depends on the chip area. Especially, most of a semiconductor memory device is occupied by a memory cell array, and its decoders and peripheral circuits. Efficient layout of the memory cell array is the most important factor in determining the manufacturing cost of the memory.
Conventionally, the wiring of the memory is formed by one metal interconnection layer and one or several polysilicon interconnection layers. Therefore, the arrangement and interconnections of the core portion including memory cells and decoders are optimized on the assumption of the single metal layer. In recent years, two or more metal interconnection layers have come to be used even in a memory. However, the arrangement and interconnections of the core portion remain almost the same as those of the conventional structure using one metal layer, so the manufacturing cost of the memory has not lowered significantly. For this reason, demand has arisen for reducing the layout area of the core portion by using a multilevel metal interconnection independently of the conventional layout.
The layout of a core unit using a single metal interconnection and that using a multilevel metal interconnection will be described below while exemplifying a conventional nonvolatile semiconductor memory device, e.g., a flash EEPROM (Electrically Erasable Programmable ROM).
FIG. 9 shows the schematic arrangement of the core portion using a single metal interconnection. In FIG. 9, the core portion of the nonvolatile semiconductor memory device comprises a memory cell array 90a, a row decoder 90b, a Y selector 90c, a reset transistor 90d, a write transistor 90e, a source decoder SOD (L/D: Load/Driver) 90f, an SOD (CONT: control) 90g, and a block decoder BLD 90h. The memory cell array 90a comprises, e.g., NOR EEPROM cells. The row decoder 90b selects the word lines of desired memory cells. The Y selector 90c selects bit lines in accordance with a column selection signal supplied from a column decoder (not shown). The reset transistor 90d resets the bit lines to the ground potential in the standby state or upon completing the program. The write transistor 90e applies a high voltage to the bit lines of desired memory cells in a write. The source decoder SOD (L/D) 90f applies a source potential to the memory cells through a source line SL. The SOD (CONT) 90g controls the source decoder SOD (L/D). The block decoder BLD 90h selects a desired cell array block.
In the case of the single metal interconnection, these circuits has configurations as shown in FIG. 10. FIG. 10 shows a plurality of cell array blocks, and the same reference numerals as in FIG. 9 denote the same parts in FIG. 10. In this case, a data line 100 and a control signal line 101 of the write transistors (write Tr) 90e constituted by a plurality of signals are shared, so two cell arrays 90a are laid out symmetrically about the data line 100 and the control signal line 101.
The Y selector 90c connected to the data line 100 and the write transistor 90e are inserted between the memory cell array 90a, on the one hand, and the data line 100 and control signal line 101, on the other hand. When the Y selector 90c and the write transistor 90e are located at the central portion of the chip, the remaining signal lines and-cell source lines can hardly be arranged at the central portion by the single metal interconnection. Especially, since the source decoder (SOD (L/D)) 90f applies the source potential to the cells, this interconnection must have a low resistance. Inevitably, the source decoders 90f and 90g are disposed on the opposite side of the Y selector 90c with respect to the cell array 90a. The reset transistor (reset Tr) 90d is also located on the upper or lower side of the cell array 90a in FIG. 10 in consideration of easy arrangement of signal and ground (GND) interconnections.
The layout of the core portion using the conventional multilevel metal interconnection will be described next with reference to FIG. 11.
In case of the multilevel metal interconnection, to lower the resistance of the word lines in the core portion, the block is divided. For this purpose, a double word line scheme is used.
For example, 8 to 16 word lines are selected by a row global decoder (RGD) 111a. The output from the row global decoder 111a is connected to a second level metal interconnection (2Al) 111c and formed on the cell array. Each block has a row local decoder (RLD) 111b having a plurality of NAND circuits. The row local decoder (RLD) 111b selects one word line WL in accordance with the output signal from a row partial decoder (RPD) hid through-the first level metal interconnection (1Al) and the output signal from the row global decoder 111a.
The Y selector, the reset transistor, the write transistor, the source decoder SOD (L/D), the SOD (CONT), and the block decoder BLD are located on the upper or lower side of the cell array in FIG. 11, as in the above-described core portion using the first level metal interconnection (1Al).
The address signal and control signal lines of each circuit are arranged on each circuit block using the second level metal interconnection to reduce the layout area.
When the circuit blocks are laid out in the periphery of the cell array, the space cannot be efficiently used because of the following problems.
(1) Since the circuit blocks and cell array are symmetrical about the data line, power supply interconnections including a ground interconnection GND and a power supply interconnection Vdd must be formed on both the upper and lower sides of the cell array, resulting in an increase in layout area.
(2) Since the circuit blocks are arranged on the upper and lower sides of the cell array, wiring for an address and control signal common to a plurality of circuit blocks must be formed on both upper and lower sides of the cell array, resulting in an increase in layout area.
(3) Since the circuit blocks are present on the upper and lower sides of the cell array, even substrate and well potential circuits common to a plurality of circuit blocks must be laid out on both the upper and lower sides of the cell array, resulting in an increase in wasteful layout area at the boundary between the substrate and well.
The prior art and its problems in layout of a core portion having blocks with irregular shapes and sizes and the layout of peripheral circuits will be described while exemplifying a nonvolatile semiconductor memory device, e.g., a flash EEPROM.
The memory cell array of the flash EEPROM is broken up into several units (blocks), and data is erased in units of blocks. The flash EEPROM also has a function of enabling or inhibiting writes/erases in/from cells in units of blocks. Normally, the blocks are formed by regularly dividing the cell array. For example, an 8 Mbit cell array is divided into 16 512-Kbit (64 KB) blocks.
The cell array is sometimes irregularly divided to form blocks. For example, an 8 Mbit cell array is broken up into 15.times.512 Kbit (64 KB)+1.times.256 Kbit (32 KB)+1.times.128 Kbit (16 KB)+2.times.64 Kbit (8 KB) blocks. In this case, the larger number of 512 Kbit (64 KB) blocks are called regular blocks, and the remaining 64 to 256 Kbit blocks are called irregular blocks. The user can write, e.g., fixed data of a peripheral device in this irregular block in accordance with the application purpose.
The cell array having irregular blocks has some unsolved problems of layout, unlike the completely regularly divided cell array.
FIGS. 12 and 13 show the schematic arrangement of a cell array having regular blocks and irregular blocks.
A regular block BLK (0) is divided in units of columns in correspondence with each I/O. Columns COL (0) to (31) corresponding to an I/O (0) (not shown) are connected to a data line DL (0) through a Y selector. Columns COL (32) to (63) are connected to a data line DL (1) through the Y selector. The Y selector is controlled by column selection signals Hi and Di and a block selection signal BLK (i).
Since the columns COL (0) to (31) are adjacent to each other, transistors forming the Y selector are put into a group. The data lines DL (i) are commonly arranged for blocks.
An irregular block BLK (1) is divided in units of columns in correspondence with each I/O, like the regular block. However, the number of columns connected to one I/O changes depending on the block size. In a 64 Kbit block, four columns are connected to one I/O. In a 128 Kbit block, 8 columns are connected to one I/O. In a 256 Kbit block, 16 columns are connected to one I/O (these arrangements correspond to a block with 1,024 rows).
When regular and irregular blocks are to be selected by the same column selection signals Hi and Di and block selection signal BLKi, subdata lines (SDL (0), SDL (1), . . .) stretching across a plurality of irregular blocks are required, as shown in FIG. 13, resulting in an increase in area.
FIG. 14 shows the schematic layout of a core portion having conventional regular blocks and irregular blocks. In an irregular block portion 140a, subdata lines 143 are arranged between a Y selector 141, to which the column selection signals Hi and Di are supplied, and a block selector 142. The size of the core portion increases because of the subdata lines 143. On the other hand, a regular block portion 140b does not need this subdata line area. Most of the area of data lines 144 at the core center corresponds to the regular block portion 140b, so a large free area 145 forms in correspondence with the regular block portion 140b. Therefore, the chip size increases by the free area 145, resulting in high cost.
A conventional layout of peripheral circuits and its problems will be described next.
FIG. 15 shows the conventional layout of a flash EEPROM. Input/output pads are arranged at the peripheral portion of a chip 151. More specifically, I/O pads 152 of the input/output system are formed on the lower side of the chip 151 in FIG. 15, and pads 153 for address signal/control signal systems are mainly formed on the upper side.
A plurality of peripheral circuits 154 for processing input address signals or control signals are arranged near the pads 153. These peripheral circuits 154 include an address buffer, a control buffer, and a redundancy circuit (none are shown). A plurality of peripheral circuits 155 for processing input/output data Din/Dout are provided near the I/O pads 152. These peripheral circuits 155 include an output buffer, an input buffer, a command processing circuit, and an automatic control circuit that operates upon receiving an input command (none are shown). A plurality of pads 156 of the power supply system (Vdd/Vss) are formed to be adjacent to the I/O pads 152. A plurality of peripheral circuits 157 of the power supply system are disposed near the power supply pads 156. These peripheral circuits 157 include a charge pump circuit (C.P) and a power control circuit.
In the above-described conventional chip layout, a plurality of peripheral circuits are distributed to the two end portions along the longitudinal direction of the chip. For this reason, the area where the peripheral circuits 154, 155, and 157 are located has a rectangular shape along the direction of pad arrangement. Since the peripheral circuits 154, 155, and 157 are elongated along the short sides of the chip, a plurality of interconnections 158 formed between the peripheral circuits 154, 155, and 157 become long along the short sides of the chip, so the interconnection area and interconnection resistance and, more particularly, the resistance of power supply interconnections increase.
Since the peripheral circuits 154 and 155 are allotted to the two end portions along the longitudinal direction of the chip, signal transmission/reception between these peripheral circuits increases, so the interconnection area for connecting these peripheral circuits 154 and 155 also increases. Additionally, since the peripheral circuits 157 of the power supply system also have a rectangular shape, like the remaining peripheral circuits, the charge pump circuit (C.P) having a large area in the power supply circuits is also arranged along the short sides of the chip. In this arrangement, the power supply interconnection of the charge pump circuit which provides a large current cannot be widened, and noise is generated in the chip. Furthermore, the arrangement of a capacitor having a large area in the charge pump circuit is also restricted.
As described above, in the conventional semiconductor memory device, the power supply interconnection or signal interconnection can hardly be shared by blocks; a wasteful free space is generated, and the chip area is difficult to sufficiently reduce.
In the chip having irregular blocks, subdata lines are laid out in correspondence with irregular block portions, and free space is generated due to the subdata lines. For this reason, it is difficult to sufficiently reduce the chip area.
In addition, since the peripheral circuits are distributed to the two end portions along the longitudinal direction of the chip, the interconnection area for connecting the peripheral circuits increases. The peripheral circuits having difference functions must be crammed in small rectangular areas. For this reason, the layout of elements making up a peripheral circuit is restricted. Furthermore, since the interconnection must be interposed between the peripheral circuits, the width of interconnection cannot be increased.

Semiconductor memory device having improved cell array layout