The present invention relates to the use of an aqueous composition comprising tin ions optionally further alloy metal ions selected from silver, copper, indium, and bismuth ions and at least one additive comprising a linear or branched polyimidazolium compound comprising the structural unit of formula (L1) for depositing tin or tin alloy containing layers and a process for depositing tin alloy layer onto a substrate.

The invention relates to tin or tin alloy electroplating compositions comprising a leveling agent, their use and processes for tin or tin alloy electroplating.
Metals and metal-alloys are commercially important, particularly in the electronics industry where they are often used as electrical contacts, final finishes and solders. Leadfree solders, such as tin, tin-silver, tin-copper, tin-bismuth, tin-silver-copper, and others, are common metals used in solders. These solders are often deposited on semiconductor substrates by means of metal electroplating plating baths.
A typical tin plating solution comprises dissolved tin ions, water, an acid electrolyte such as methanesulfonic acid in an amount sufficient to impart conductivity to the bath, an antioxidant, and proprietary additives to improve the uniformity of the plating and the quality of the metal deposit in terms of surface roughness and void formation. Such additives usually include surfactants and grain refiners, among others.
Certain applications for lead-free solder plating present challenges in the electronics industry. For example, when used as a capping layer on copper pillars, a relatively small amount of lead-free solder, such as tin-silver solder, is deposited on top of a copper pillar. In plating such small amounts of solder it is often difficult to plate a uniform height of solder composition on top of each pillar, both within a die and across the wafer. The use of known solder electroplating baths also results in deposits having a relatively rough surface morphology.
U.S. Pat. No. 3,577,328 discloses a tin electroplating composition comprising, besides tin and sulfate, imidazoline derivatives as surface active agent optionally in combination with condensates of an alkyl phenol with an alkylene oxide.
U.S. Pat. No. 7,357,853 B2 discloses a composition and method of selectively electroplating a tin or tin alloy on a composite substrate having metallic portions and ceramic portions without loss of adhesion between the metal and ceramic portions. Such compositions may also contain imidazolium compounds, such as coconut oil substituted carboxylated imidazoline.
U.S. Pat. No. 8,083,922 B2 relates to a tin electrolytic plating method using a tin electrolytic plating solution which comprises a nonionic surfactant either alone, or with a suitably selected cationic surfactant and/or a suitably selected alkyl imidazole.
US 2012/0132530 A1 relates to a tin plating solution including a tin ion source, at least one nonionic surfactant, imidazoline dicarboxylate and 1,10-phenanthroline.
US 2013/068626 A relates to a metal, particularly copper electroplating composition comprising a polyimidazolium leveler compound and its use for interconnect electroplating. Tin and copper-tin alloys having up to about 2 percent by weight tin are mentioned.
JP 09-272995 A discloses a tin or tin-lead alloy electroplating composition which may contain besides a complexing agent and an alkali and/or alkaline earth metal ion and ammonium and/or organic amine ion in a molar ratio of 1/5 to 5/1, a polyimidazolium derivative. The alkaline bath is intended for electroplating parts which are subject to corrosion when using acidic compositions, such as ceramic component modules.
However, there is still interest in the electronic industry for a pure tin or tin-alloy electroplating bath which leads to solder deposit with a reduced roughness in combination with an improved uniformity in height, also called coplanarity (COP).
It is an object of the present invention to provide a tin or tin alloy electroplating additive having good leveling properties, in particular leveling agents capable of providing a substantially planar tin or tin alloy layer and filling features on the micrometer scale without substantially forming defects, such as but not limited to voids, with a tin or tin alloy electroplating bath. It is further an object of the invention to provide a tin or tin alloy electroplating bath that provides a uniform and planar tin or tin alloy deposit, in particular in features of 1 micrometer to 200 micrometer width.

Composition for tin or tin alloy electroplating comprising leveling agent


A method and electronic device for radar-based face authentication anti-spoofing for determining access to the electronic device. The electronic device includes a radar transceiver and at least one processor. The at least one processor is configured to transmit, via the transceiver, a first set of signals, generate a channel impulse response (CIR) based on receipt of reflections of the first set of signals, detect a first CIR tap in the CIR, determine a selection of CIR data based on the detected first CIR tap, determine a profile matching metric based on comparison of the selection of CIR data to a set of predetermined reference signals, and determine whether to allow access to the electronic device based on comparison of the profile matching metric to a profile matching threshold.

The use of mobile computing technology such as a portable electronic device has greatly expanded largely due to usability, convenience, computing power, and the like. One result of the recent technological development is that electronic devices are becoming more compact, while the number of functions and features that a given device can perform is increasing. For example, certain electronic devices not only provide voice call services using a mobile communication network, but can also offer video call services, messaging services, data transmission service, multimedia services, as well as provide content to a user. Some of the functions and features that an electronic device can perform, such as documents, files, programs, systems, and information, can include confidential and sensitive information, which require the electronic device to verify the user prior to providing access.
An electronic device can verify a user prior to allowing a user access to certain functions and features by authenticating the user. A user can input credentials such as a user identification and a password, which are specific to the content the user desires to access, for authentication purposes. Camera based face authentication methods can provide secure access for registered users of devices. However, camera-based face authentication methods provide hackers the ability to spoof a human face and gain access to the device.

Systems and methods for radar based face authentication anti-spoofing


A method for preparing ester end-capped polyalkylene ether is disclosed. Cyclic ether monomers are subjected to ring-opening polymerzation at a temperature of 20.degree.-80.degree. C. and a pressure of 0-10 atm in the presence of a solid acid serving as catalyst and a mixture of acid and acid anhydride serving as a promoter. The solid acid is an oxide of group III and group IV elements and has been modified by sulfuric acid, ammonium sulfate or ammonium sulfite.

The present invention relates to a method for preparing ester end-capped polyalkylene ether. In particular, it relates to a method for preparing ester end-capped polyalkylene ether by ring-opening polymerization of cyclic ether in the presence of a solid acid of an oxide of group III and group IV elements, which has been modified by sulfuric acid, ammonium sulfate or ammonium sulfite as a catalyst and a mixture of acid and acid anhydride as a promoter.
Ester end-capped polyalkylene ethers are very important intermediates for industrial applications which can be converted to polyether glycols by hydrolysis or alcoholysis. Polyether glycols are used as a starting material for plastic elastomers such as polyurethanes, and spandex fibers. Due to their superelasticity, superior chemical resistance, and air permeability, they have been extensively used in the manufacture of flexible, air ventilating clothes; panty hose; impact resistant motor parts; adhesives; paints; artificial organs; and artificial blood vessels.
Conventional manufacturing process for polyether glycols involves polymerizing cyclic ether into corresponding acid anion end-capped polyethers by the ring-opening process in the presence of a strong liquid acid as the catalyst, followed by subjecting them to hydrolysis or alcoholysis to form hydroxy group end-capped polyether glycols. For example, U.S. Pat. No. 4,510,333 and EP 0167292 A1 disclose a method in which tetrahydrofurans are polymerized into flurosulfonic anion end-capped polyethers by the ring-opening process in the presence of fluorosulfonic acid as a catalyst. U.S. Pat. No. 3,712,430 and Japan Patent No. Sho 45-13940 disclose the same method but fuming sulfuric acid and perchloric acid are respectively used as catalysts instead of flurosuifonic acid. One disadvantage of these methods are that the molecular weight distribution of the resulting polyether is rather broad, the number average molecular weight ranges from 500 to several ten thousands and the molecular weight distribution (Mw/Mn) is much greater than. 2, Another disadvantage of this method is that the liquid acid catalyst used can not be recycled for use because it is very difficult to separate from the product prior hydrolysis or alcoholysis reactions. This leads to the consumption of a large amount of energy. Furthermore, the corrosion of reaction vessels, and the need of sequential treatment of waste acid require a great deal of labour and cost.
U.S. Pat. Nos. 4,153,786 and 4,202,964 and German Patent GB 2025995 disclose a new process which involves carrying out ring-opening polymerization in the presence of a cationic ion exchange resin bearing --SO.sub.3 H groups as a catalyst and an acetic anhydride as a precursor. However, since the water content of the catalyst must be strictly limited, the raw material tetrahydrofurans must be predehydrated to contain less than 100 ppm of water. Furthermore, as the cationic ion exchange resin used is normally poor-heat resistant, there are difficulties when a regeneration is desired.
U.S. Pat. Nos. 4,564,671. 4,728,722 and 4,803,299 disclose a process for the preparation of polytetramethyl ether acetate(PTMEA), which uses a bleaching earth catalyst or a zeolite catalyst and acetic anhydride. The disadvantage to this process is that the molecular weight distribution of the resulting PTMEA is relatively broad, and the Mw/Mn is about 3.0.
U.S. Pat. No. 4,568,775, Japan Patent Nos. Sho 63-30931, 63-30930, and laid-open Patent Nos. Sho 61-268787 60-158218 disclose a process for directly producing polyether glycols by using a heteropoly-acid as a catalyst. The process can synthesize polyether glycols in a single step, however, as the heteropoly-acid catalyst is readily soluble, it will remain in and stain the final products, and therefore requires of further treatment of the final product. Furthermore, the yield of this process is rather low, usually less than 10%.

Ring-opening polymerization of cyclic ethers

Industrial Technology Research Institute


A method for forming a dynamic verification value. The method includes altering a first data string to form a second data string, and forming a first dynamic verification value using at least a portion of the second data string. The first dynamic verification value is used to authenticate a portable consumer device in a first transaction. The second data string is used to form a third data string. A second dynamic verification value is formed using at least a portion of the third data string. The second dynamic verification value is used to authenticate the portable consumer device in a second transaction.

As methods and devices for engaging in financial transactions have increased, old problems such as fraud and counterfeiting persist.
One of the primary sources of fraud, which is prevalent in the credit card industry is skimming. Skimming refers to the electronic copying of a card's magnetic stripe data to create counterfeit cards.
Skimming is a problem for contactless cards and cards with magnetic stripes. However, in a wireless environment, the opportunity to skim magnetic stripe data is more prevalent. In a wireless environment, a potential skimmer need not physically possess the card to be skimmed nor have access to any of the physical equipment (e.g. POS terminal, communication lines, etc.) which is required for skimming in a wire based environment. A skimmer can, without the knowledge of the consumer or merchant, intercept the wireless transaction and copy the data being transmitted from the card to POS terminal.
To address the above problems, a dCVV or a dynamic card verification value can be used. The dCVV can be generated using an algorithm which uses at least a counter and input data such as an account number, expiration date, and other information. The counter can increase by one each time a transaction is conducted. The dCVV can be independently generated by either a portable consumer device or POS terminal at the front end of a transaction and can be sent to a back end computer. The counter may be sent from the merchant to the back end computer so that it knows the current counter value associated with the portable consumer device. In other cases, the counter may simply be present at the back end computer. In the latter case, the counter increments every time the back end computer sees a transaction. The back end computer, using a similar algorithm to the one that generated the dCVV at the front end, the counter value, and input data, can independently generate a second dCVV. If the received dCVV and the generated dCVV match, the transaction can be considered authentic. If the dCVVs do not match, this may indicate that the transaction is fraudulent.
Although the above-described dCVV process is useful, improvements can be made. For example, in the dCVV process that is described above, a counter is used as a dynamic data element and generally passes unencrypted from a front end of a transaction to the back end of the transaction. Because the counter is in the open, it may still be possible that someone could intercept the counter and that someone could potentially figure out the dCVV (although it would be very difficult to do). Also, the counter itself is a rather simplistic dynamic data element that an unauthorized person could potentially determine. It would be desirable to provide for a verification value generation process that is even stronger than the dCVV method that is described above.
Embodiments of the disclosure address the above problems, and other problems, individually and collectively.

Dynamic verification value system and method


A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low-profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned-in and tested in a more efficient and cost-effective manner than prior known BGA or FBGA semiconductor packages. A high-density, low-profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.

1. Field of the Invention
The present invention generally relates to board-on-chip and chip-on-board ball grid array, including fine ball grid array, semiconductor chip packages. The present invention more particularly relates to constructing ball grid array semiconductor chip packages that are particularly suitable for being burned-in and tested in a more efficient and cost-effective manner. The subject invention further provides stackable ball grid array semiconductor chip packages which may be used to form highly dense, low-profile microelectronic components in which the semiconductor chip, or device, is better protected.
2. State of the Art
Ball grid array (BGA), including fine ball grid array (FBGA), semiconductor device packages are well known in the art. For convenience, a representative prior art BGA package is shown in drawing FIGS. 1 through 3. BGA chip packages, such as exemplary chip package 10, often comprise a substrate 12, such as a printed circuit board, having an elongated aperture 14 extending through the middle thereof. A semiconductor die or device 16, such as a dynamic random access memory (DRAM) device for example, is mounted on the opposite or bottom side of the substrate which is not viewable in drawing FIG. 1. Semiconductor die or device 16 most often will have a plurality of bond pads 20 in single column or multiple columns on an active surface 18 of semiconductor die 16. The active surface 18 of semiconductor die 16 is shown facing upward and can be viewed through aperture 14 in drawing FIG. 1. Substrate 12 is provided with an upwardly facing top surface 22, as shown in drawing FIG. 1, having a plurality of contact or bond pads 24 located along the periphery of aperture 14. Circuit traces 26 located on or within substrate 12 serve to electrically connect bond pads 20 to respective electrically conductive, connective elements such as solder balls 28. The electrically conductive elements typically comprise solder balls in electrical communication with and attached to a contact pad (not shown in FIGS. 1-3), or can merely be a solder ball placed directly upon, or in electrical communication with, the termination point of a selected circuit trace 26. Gold filled or other conductive metal-based solder balls are frequently used. Alternatively, conductive balls made of a conductive-filled epoxy material having specifically preselected conductive qualities are also frequently used. The conductive elements or balls are arranged in a grid array pattern wherein the conductive elements or solder balls 28 are of a preselected size or sizes and are spaced from each other at one or more preselected distances, or pitches. Hence, the term xe2x80x9cfine ball grid arrayxe2x80x9d (FBGA) merely refers to a particular ball grid array pattern having what are considered to be relatively small conductive elements or solder balls 28 being spaced at very small distances from each other resulting in dimensionally small spacings or pitch. As generally used herein, the term xe2x80x9cball grid arrayxe2x80x9d (BGA) encompasses fine ball grid arrays (FBGA) as well as ball grid arrays. Typical solder ball sizes can be approximately 0.6 mm or less and the solder balls may have a spacing or pitch of approximately 0.80 mm or less. However, the present invention is not limited with respect to a particular solder ball diameter or pitch.
Contact or bond pads 20 on active surface 18 of semiconductor die 16 are electrically and, to an extent mechanically, attached to respective contact pads 24 located on active surface substrate 12 by way of respective bond wires 30 by wire bonding methods known and practiced within the art.
Referring now to drawing FIGS. 2 and 3, which are cross-sectional views taken along line 2/3xe2x80x942/3 as shown in drawing FIG. 1, bottom side or surface 32 of substrate 12 and nonactive side 36 of die 16 are denoted. Semiconductor die or device 16 is attached to bottom side 32 of substrate 12 by any suitable adhesive 34. Illustrated in drawing FIG. 3 is an encapsulant 38 disposed over contact pads 24, bond wires 30, and bond pads 20 so as to protect and secure the somewhat fragile bond wires and bond sites from environmentally induced corrosion or other physical harm during immediately subsequent processing, storage, shipment, further processing, and ultimately during end use.
For quality control purposes, as well as manufacturing efficiency, it is standard practice to burn-in and electrically test semiconductor chip packages, such as representative prior art chip package 10, prior to installing the packages on the next-higher level of assembly, such as upon a dual in-line memory module (DIMM). Those chip packages that do not successfully undergo burn-in and testing are either reworked and retested or scrapped in accordance with economic feasibilities of the particular chip package being manufactured. In order to perform such pre-installation burn-in and testing, that is, intentionally subjecting the packages to elevated voltages and temperatures and then running preliminary, and perhaps diagnostic, tests on BGA chip packages such as BGA chip package 10, the chip packages must be mounted in specifically designed test tooling. A simplified illustration of representative test tooling 40 is shown in drawing FIG. 4. Generally, each BGA chip package 10 is placed in chip-receiving cell 44 of tray or holder 42. Chip package 10 usually has, but may not have, encapsulant 38 disposed thereon at the time of burn-in and testing. Upon chip package 10 being properly seated in tray 42, probe head 46 is moved toward chip package 10 in the direction of the arrow so as to engage each probe 48 with a corresponding conductive element such as solder ball 28. Upon BGA chip package 10 being burned-in and tested, probe head 46 is withdrawn from the chip package and the chip package is removed from test tray or holder 42 and forwarded on for further processing depending on the test results.
Because there are typically a large number of such solder balls to be contacted by a like number of probes for each chip package which must be arranged in a precise array or pattern in order to make electrical contact with the underlying solder balls, the test tooling is quite expensive, as well as time consuming, to construct. The time and expense factors of providing specific test tooling for each type of BGA chip having a wide variety of ball grid array patterns is compounded when the particular BGA chips to be burned-in and tested are of the fine ball grid array variety wherein the balls and spacing are quite small, thereby making the construction of the chip package test tooling even more time consuming and expensive. Furthermore, the specific test tooling to be devised must not only accommodate, burn-in, and test a single chip package, but must also be able to simultaneously accommodate, burn-in, and test a significant number of other chip packages, which may or may not have been segmented from a common substrate and are usually positioned and accompanied by respective cells of test tooling so that production quantities can be produced economically. Thus, it can be appreciated that the time and expense of constructing BGA chip package test tooling, which by necessity has a multiplicity of probes specifically sized and arranged in patterns which must exactly correspond to the respective solder ball array being tested, are significant hindrances to quickly introducing BGA chip packages and, in particular, FBGA chip packages having new and different solder ball array patterns to the very competitive semiconductor chip marketplace. Furthermore, the test probes of the test tooling must be designed not to unduly damage the solder balls which will ultimately be used to electrically and mechanically connect the chip package to the next level of assembly by solder ball attachment methods used within the art.
U.S. Pat. No. 5,977,784, issued to Pai on Nov. 2, 1999, and related U.S. Pat. No. 5,831,444, issued to Pai on Nov. 3, 1998, are directed toward a method and apparatus for testing BGA chip packages wherein chip packages are placed within a self-centering test housing wherein contacts of the chip package are brought into contact with respective matching contact pads in order to burn-in and test the chip package. However, the testing apparatus of Pai must be provided with matching test contacts having the same array or pattern of the contact pads of the chip package to be tested in order to properly test the chip package. Thus, the substrate in which the test pads are located must be specifically manufactured to match the specific grid array of the chip package to be tested, giving rise to previously discussed unwanted new product lead times and expenses.
U.S. Pat. No. 6,018,249 issued to Akram et al. on Jan. 25, 2000, and assigned to the assignee of the present invention, provides a further example of a testing system for the testing of chip packages having external contacts or bumps arranged in a BGA or FBGA pattern. Notwithstanding the desirable features of the Akram et al. patent, the disclosed testing system includes matching contacts being provided and suitably positioned for respectively connecting with a correspondingly positioned external contact or bump on the chip package to be tested.
U.S. Pat. No. 5,677,566 issued to King et al. on Oct. 14, 1997, and assigned to the assignee of the present invention, is directed toward overcoming a problem in the industry wherein bare chips are continuously made increasingly smaller yet the chip-molded, plastic resin encapsulated, package-to-external circuit electrical connection typically remains at a previous, industry-set size and configuration when chips were larger. The semiconductor chip package taught by the King et al. U.S. Pat. No. 5,677,566 patent is provided with a lead frame having leads that generally originate near the center of the package and extend generally laterally outwardly over the chip toward and, if desired, beyond the periphery of the encapsulating material which generally defines the chip package. The innermost region of each conductive lead is wire bonded to a respective bond pad located on the active surface of the chip. The conductive leads near the periphery of the chip are exposed for accommodating a solder ball or other conductive element on the upper surface of the package, which is ultimately to be mounted on a printed circuit board in accordance with previous industry standards. The laterally protruding outer end portions of the individual conductive leads facilitate testing of the chip as the ends can be contacted with presently used testing equipment. After testing, the protruding ends can be trimmed flush with the exterior of the plastic resin package. Alternatively, the laterally protruding outer end portions of the conductive leads may be trimmed prior to encapsulating the entire chip package with plastic resin. Although suitable for many applications, providing the separate lead frame and fully encapsulating the chip package of King et al. may unnecessarily add to the complexity and cost of manufacturing chips to be used in other applications.
U.S. Pat. No. 5,731,709, issued to Pastore et al. on Mar. 24, 1998, discloses a ball grid array semiconductor device and apparatus for testing the device. In particular, Pastore et al. disclose a chip mounted on the top surface of a substrate which has a plurality of conductive castellations positioned around the periphery of the substrate serving as redundant electrical connections that are in communication with respective bond pads on the semiconductor chip. The conductive castellations, which are disclosed as being conductive vias that have been formed in the substrate which are subsequently trimmed to define the periphery of the substrate, thereby cutting the conductive vias in half, are engaged by specifically designed test apparatus to avoid directly contacting solder balls located on the top surface of the substrate. The test apparatus includes a test socket designed to accommodate the semiconductor device having contact members to make contact with the conductive castellations located about the periphery. The disclosed test apparatus appears to have been specifically designed to accommodate the disclosed semiconductor device. Thus, it would appear that added monetary costs would be incurred upon constructing and incorporating such test apparatus, or at least the disclosed test socket, into a production line.
In addition to the semiconductor packaging industry being driven to increase the number of solder balls or conductive contacts that is to be included within a BGA chip package of a given surface area, the industry is also being driven to reduce the overall height or profile of packaged semiconductor chips so that components and modules incorporating such chips can be made yet smaller and more compact. Thus, the industry is seeking ways in which BGA chip packages can be constructed so as to further reduce their individual height. Furthermore, the industry is seeking ways in which BGA chip packages may be stacked one upon another, which are, in turn, attached to a substrate or board to provide modules, such as dual in-line memory modules, of ever slimmer profiles.
An example of a lead chip design in a BGA package is shown in U.S. Pat. No. 5,668,405, issued to Yamashita on Sep. 16, 1997. The Yamashita patent discloses a semiconductor device that has a lead frame attached to the semiconductor chip. Through-holes are provided in a base film that allows solder bumps to connect via the lead frame to the semiconductor device. The Yamashita patent requires several steps of attaching the semiconductor device to the lead frame, then providing sealing resin, and then adding a base film and forming through-holes in the base film. A cover resin is added before solder bumps are added in the through-holes to connect to the lead frame. Thus, the resulting structure lacks the ability to stack devices one on top of another and further requires special test tooling be provided to match the particular grid pattern of the solder bumps.
U.S. Pat. No. 5,677,566, issued to King et al. on Oct. 14, 1997, referenced earlier herein, discloses a semiconductor chip package that includes discrete conductive leads with electrical contact bond pads on a semiconductor chip. The lead assembly is encapsulated with a typical encapsulating material and the solder balls or conductive elements are formed to protrude through the encapsulating material to contact the conductive leads and make contact with an external circuit. Although the semiconductor chip has the leads wire bonded to bond pads located in the center of the die, thereby allowing the conductive leads to be more readily protected upon being encapsulated by the encapsulating material, the chip package construction of the King et al. patent lacks the ability to be stacked one upon another.
With respect to stacking semiconductor chip packages, there are various methods of stacking semiconductor devices in three-dimensional integrated circuit packages known within the art. One such design is disclosed in U.S. Pat. No. 5,625,221, issued to Kim et al. on Apr. 29, 1997. The Kim et al. patent discloses a semiconductor package assembly that has recessed edge portions which extend along at least one edge portion of the assembly. An upper surface lead is exposed therefrom and a top recess portion is disposed on a top surface of the assembly. A bottom recess portion is disposed on the bottom surface of the assembly, such that when the assembly is used in fabricating a stacked integrated circuit module, the bottom recess portion accommodates leads belonging to an upper semiconductor assembly to provide electrical interconnection therebetween. Unfortunately, the assembly requires long lead wires from the semiconductor chip to the outer edges of the assembly. These lead wires add harmful inductance and unnecessary signal delay and can form a weak link in the electrical interconnection between the semiconductor chip and the outer edges. Further, the device profile is a sum of the height of the semiconductor chip, the printed circuit board to which it is bonded, the conductive elements, such as the solder balls, and the encapsulant that must cover the chip and any wire bonds used to connect the chip to the printed circuit board. So, reducing the overall profile is difficult because of the geometries required in having the lead pads on the semiconductor chip along the outer periphery with extended lead wires reaching from the chip to the outer edges of the assembly.
It can be appreciated that one of the favorable attributes of BGA chip packages is that the total height or overall thickness of the chip package is quite thin compared to other chip packages. Thus, BGA chip packages lend themselves to be especially suitable for incorporation within memory modules such as SDRAM modules and, in particular, dual in-line memory modules (DIMM).
Accordingly, what is needed within the art is a ball grid array chip package that can be easily burned-in and tested by existing test tooling. Another need within the art is for low-profile ball grid array chip packages that can be stacked so as to have a minimum amount of stack height to allow the production of low-profile dual in-line memory modules, for example. Such low-profile stackable packages would ideally have a lower profile than otherwise provided in the prior art and would ideally be producible with as few production steps as is feasible, yet provide adequate protection of the semiconductor chip during shipping and handling.
According to the present invention, a stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package is disclosed which is particularly suitable for board-on-chip or chip-on-board applications in which low-profile BGA or FBGA semiconductor packages are needed due to space limitations. Such an exemplary need includes, but is not limited to, memory modules used in notebook-sized personal computers, for example.
BGA or FBGA semiconductor packages of the present invention generally comprise a substrate having a semiconductor device attached to a selected surface thereof. The semiconductor device has a plurality of bond pads respectively wire bonded to a plurality of bond pads located on the substrate. Preferably, the wire bonds extend through an aperture extending through the substrate. The substrate is further provided with a plurality of circuit traces leading from the substrate bond pads to a plurality of connective elements, such as solder ball contact pads and associated solder balls, which are arranged in a preselected ball grid array pattern. Additional circuit traces or continuations of the same circuit traces further extend to a plurality of test pads arranged and located on the substrate in a preselected pattern. Preferably, at least the interconnecting circuit traces electrically connecting selected substrate bond pads to intermediately positioned connective elements, preferably including solder ball contact pads and associated solder balls and, in turn, electrically connecting respective test pads are preformed on a tape which can be conveniently and efficiently attached to one or more surfaces of the substrate. Burn-in and testing of the semiconductor chip attached to the substrate is preferably performed by prior existing test tooling having test probes arranged in patterns typically used in prior known semiconductor chip packages to contact the test pads of the semiconductor chip packages of the present invention. Upon the test pads being contacted by the test probes of the test tooling, selected voltages can be applied to selected pads to burn-in and test the semiconductor device attached to the substrate. This feature is a significant improvement over prior known methods of using test probes specifically designed and arranged in the same specific ball grid array pattern that the individual connective elements or solder balls of prior known ball grid array semiconductor packages are arranged.
Preferably, BGA/FBGA semiconductor packages embodying the present invention are provided a plurality of test pads which are arranged in a thin small outline package (TSOP) pin-out pattern because test tooling used for burning-in and testing prior known non-BGA/FBGA semiconductor packages is widely available within the industry. In addition to alleviating the time and expense required to design and construct test tooling specifically designed to contact the connective elements of a BGA semiconductor package arranged in a particular ball grid array, there is no need to contact and perhaps damage the individual connective elements or solder balls.
Upon successfully burning-in and testing a BGA/FBGA semiconductor package constructed in accordance with the present invention, the test pads may be disassociated from the substrate to decrease the final surface area, or footprint of the semiconductor package, if so desired.
Further in accordance with the present invention, the semiconductor device and the connective elements may optionally be provided on the same surface of the substrate of the BGA/FBGA semiconductor package so as to decrease the profile of the semiconductor package. This is particularly useful when stacking and attaching a plurality of BGA/FBGA semiconductor packages on a common board used in a memory module, such as a dual in-line memory module.
These and additional features and benefits of the present invention are further described and illustrated in the following detailed description of the invention and the present drawings.

Method for ball grind array chip packages having improved testing and stacking characteristics


A shift scan chain includes logic circuit blocks 11-18 and scan registers 21-28 connected at stages succeeding them. The shift chain is divided into divisional chains including the scan registers 21-24 and the scan registers 25-28. In the test operation mode of a semiconductor integrated circuit, test input data TI are supplied in synchronism with a multiplied clock signal CKD at a frequency twice of that of a clock signal CK. The test input data TI are converted by a serial/parallel conversion circuit 40 into parallel data S41 and S42, which are respectively supplied to the head scan registers 21 and 25 of the corresponding divisional chains. The length of each divisional chains becomes ½, and a test time period can be shortened.

1. Field of the Invention
The present invention relates to a semiconductor integrated circuit having a test circuit based on scan registers, and a method of testing the semiconductor integrated circuit.
2. Description of the Related Art
As a technique for testing a semiconductor integrated circuit, there has been one called "shift scan system" wherein scan registers are inserted among logic circuit blocks which perform the functional operations of the integrated circuit, and in the test mode of the integrated circuit, the scan registers are connected in the shape of a chain so as to supply testing data to the respective logic circuit blocks and to derive output data from them.
The test circuit of such a shift scan system, however, has had the problem that, as the number of the logic circuit blocks becomes larger, the number of the scan registers to constitute the scan chain enlarges more, so a long time is expended in inputting and outputting the test data.
A semiconductor integrated circuit having a test circuit is disclosed in Japanese unexamined published patent application JP-A-2000-258500.
The semiconductor integrated circuit is constructed of a circuit to-be-tested 102, scan data input terminals 151, 152, scan data output terminals 161, 162, a connection alteration circuit 103, and a code compression circuit 104.
The circuit to-be-tested 102 has scan chains 110, 120, 130, 140, in which scan registers 111-113, 121-123, 131-133, 141-143 are respectively connected so as to be capable of inputting and outputting scan data. Besides, the circuit to-be-tested 102 has partial circuits 171, 172 which are independent like combinational circuits. Here, the scan chains 110, 120 and those 130, 140 belong to the partial circuit 171 and the partial circuit 172, respectively.
The connection alteration circuit 103 branches the scan data input terminal 151 to the scan chains 110 and 130 at a branch point 153, and branches the scan data input terminal 152 to the scan chains 120 and 140 at a branch point 154. The code compression circuit 104 takes the exclusive logic of the scan chains 110 and 130 by a logic gate 163 and delivers it to the scan data output terminal 161, and takes the exclusive logic of the scan chains 120 and 140 by a logic gate 164 and delivers it to the scan data output terminal 162.
With such a semiconductor integrated circuit, the scan data inputted to, for example, the scan data input terminal 151 is simultaneously supplied to the two scan chains 110, 130. Besides, the scan data transferred by successively shifting along the scan chains 110, 130 have their exclusive logic taken by the logic gate 163, and the resulting data is outputted from the scan data output terminal 161. Thus, the test of the scan chains 110-140 being the circuit to-be-tested 102 can be performed in a short time.
As stated before, the semiconductor integrated circuit of the conventional shift scan system has had the problem that, with the enlargement of a circuit scale, a long time is expended in inputting and outputting test data. On the other hand, with the semiconductor integrated circuit disclosed in the above Japanese patent laid open, the same scan data is inputted to the two scan chains 110, 130, and any desired data cannot be held in the individual scan registers 111-113, 131-133. It is consequently impossible to test the operation of each logic circuit by supplying any desired test data to the logic circuit.

Semiconductor integrated circuit with a test circuit


An LED light bulb that includes a base providing an electrical connector and a substantially hollow envelope extending from the base. The light bulb further includes a metal space separator having a top side, bottom side and side wall that has a plurality of holes connected by at least one channel that extends through the interior of the separator, such that air can pass through the separator. At least one LED is mounted on the separator in electrical connection with the base connector.

Incandescent light bulbs are a source of electric light that creates light by running electricity through a resistive filament, thereby heating the filament to a very high temperature, so that it glows and produces visible light. Incandescent bulbs are made in a wide range of sizes and voltages, from 1.5 volts to about 300 volts. The bulbs consist of a generally glass or plastic enclosure with a filament of tungsten wire inside the bulb through which an electrical current is passed. Incandescent lamps are designed as direct "plug-in" components that mate with a lamp socket via a threaded Edison base connector (sometimes referred to as an "Edison base" in the context of an incandescent light bulb), a bayonet-type base connector (i.e., bayonet base in the case of an incandescent light bulb), or other standard base connector to receive standard electrical power (e.g., 120 volts A.C., 60 Hz in the United States, or 230V A.C., 50 Hz in Europe, or 12 or 24 or other D.C. voltage). The base provides electrical connections to the filament. Usually a stem or glass mount anchors to the base, allowing the electrical contacts to run through the envelope without gas/air leaks.
With reference to FIG. 1, a typical incandescent candle bulb is displayed. The envelope 11 generally comprises glass, although other light transmissive material may be used. The envelope 11 encloses a tungsten filament 13, through which an electrical current is passed. The base 15 includes two metal contacts 16, 18 that are attached to the filament. Two stiff wires 17, 19 are mechanically supporting the filament 13. When the bulb is hooked up to a power supply, an electrical current flows from one contact to the other, through the wires 16, 18 and the filament 13. A candle bulb is similar in function and general shape to other incandescent bulbs, but is generally smaller in size.
Incandescent light bulbs are widely used in household and commercial lighting, for portable lighting, such as table lamps, car headlamps, flashlights, and for decorative and advertising lighting. However, incandescent light bulbs are generally inefficient in terms of energy use and are subject to frequent replacement due to their limited lifetime (about 1,000 hours). Approximately 90% of the energy input is emitted as heat. These lamps are gradually being replaced by other, more efficient types of electric light such as fluorescent lamps, high-intensity discharge lamps, light emitting diodes (LEDs), etc. For the same energy input, these technologies give more visible light and generate much less heat. Particularly, LEDs consume a fraction of the energy used to illuminate incandescent bulbs and have a much longer lifetime (e.g. 50,000 to 75,000 hours). Furthermore, LED light sources are a very clean "green" light source and also provide good color reproduction.
However, a drawback of LED light bulbs is that they have a very limited tolerance to high temperature and their efficiency falls as the temperature rises. The LED devices cannot be operated at the temperature of an incandescent filament (rather, the operating temperature should be around room temperature). The lower operating temperature also reduces the effectiveness of radiative cooling. Current LED lamps have trouble with heat dissipation, since the heat exchange occurs in an enclosed volume. LEDs are not incorporated as part of the outer bulb; therefore, their housing had to be used as a heat sink. In a usual approach, the base of the LED replacement lamp included (in addition to the Edison base connector and the electronics) a relatively large mass of heat sinking material positioned such that it was contacting or otherwise in good thermal contact with the LED device(s).
Another issue is that unlike an incandescent filament, an LED chip or other solid state lighting device typically cannot be operated efficiently using standard 120V or 230V A.C. power. Rather, on-board electronics are typically provided to convert the A.C. input power to D.C. power of lower voltage amenable for driving the LED chips. As an alternative, a series string of LED chips of sufficient number can be directly operated at 120V or 230V, and parallel arrangements of such strings with suitable polarity control (e.g., Zener diodes) can be operated at 120V or 230V A.C. power, albeit at substantially reduced power efficiency. In either case, the electronics constitute additional components of the lamp base as compared with the simple Edison base used in integral incandescent or halogen lamps.
Accordingly, it is desirable to provide an LED light bulb with improved heat management and electronics that may be used as a replacement for a typical incandescent light bulb.

LED light source in incandescent shaped light bulb


Provided is a power generating apparatus using piezoelectric elements, which can increase an amount of electricity generated in the piezoelectric elements and can extend the life of the piezoelectric elements. The power generating apparatus includes: a plurality of piezoelectric elements; a main body in which the piezoelectric elements are received and fixed, with spaced apart from one another, so as to protect the piezoelectric elements; a piezoelectric element support reciprocatingly installed in the main body to support the piezoelectric elements such that the piezoelectric elements are deformed by a reciprocating motion of the piezoelectric element support; a driving unit provided in the main body to operate the piezoelectric element support; and a power transmission unit connecting the driving unit to the piezoelectric element support, such that the piezoelectric element support is reciprocated by a driving force of the driving unit.

1. Field of the Invention
Exemplary embodiments of the present invention relates to a power generating apparatus and method using piezoelectric elements. More particularly, to a power generating apparatus using piezoelectric elements, which can increase an amount of electricity generated from the piezoelectric elements and can extend the life of the piezoelectric elements.
2. Discussion of the Background
As depletion of petroleum comes closer, extensive research has recently been conducted throughout the world for seeking a variety of methods and apparatuses for a development of new alternative energy and effective conservation of energy during energy cycle.
For example, a power generating apparatus using the light of the sun has been most actively studied. In such a photovoltaic system, typically a solar cell array can be provided to directly receive the light of the sun, and a current generated from the solar cell array is charged to a battery through a constant voltage circuit which constantly maintains a voltage generated from the solar cell array.
An energy scavenger has recently been developed and applied, which can reduce battery consumption and/or can obtain electric energy from heat, vibration, or the light of the sun obtained from ambient environment, without using a battery system.
As is well known, piezoelectric materials can be implemented to various fields such as a core component of a piezoelectric power generator. A large number of materials including organic and inorganic materials known as a material causes a piezoelectric phenomenon. Materials, for example, PZT, BaTiO3, and Ba2TiO4, have been widely used as piezoelectric materials.
A piezoelectric element manufactured using the piezoelectric material generates an electricity when a force is applied thereto. A different electricity is generated according to a magnitude of an applied force. When manufacturing the piezoelectric power generator using the piezoelectric element, it is important to minimize loss of the piezoelectric element from an external shock or a vibration and effectively to transfer an electricity.
If excessive shock is transferred to the piezoelectric element, the piezoelectric element may be damaged. Therefore, there is a need for a structure that can effectively transfer external mechanical energy, and prevent excessive shock from being transferred. In particular, a piezoelectric element made of a ceramic has a strong brittle property. Therefore, there is a need for a housing that can effectively transfer mechanical energy, and prevent the piezoelectric element from being damaged by an excessive external force.
The conventional power generating apparatus using piezoelectric elements pressurizes the piezoelectric elements by applying shock and vibration to the piezoelectric elements. Therefore, an amount of electricity generated from the piezoelectric elements is small, and the life of the piezoelectric elements is shortened due to shock.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form any part of the prior art nor what the prior art may suggest to a person of ordinary skill in the art.

Generating device using piezoelectric energy harvester


In processes for dimerization of olefins in the presence of potassium catalysts, plugging of the catalyst bed may be avoided by purging with certain aliphatic hydrocarbons.

This invention relates to a process for dimerization of olefins.
It is well known in the art to employ supported alkali metal catalysts for such conversions as propylene dimerization. It is also well known to use alkali metal carbonates as catalyst support. For example, the use of potassium on potassium carbonate for the catalytic dimerization of propylene to 4-methyl-1-pentene has been disclosed in U.S. Pat. No. 4,544,790, U.S. Pat. No. 4,609,637 and U.S. Pat. No. 4,656,154. Typically, in the process of propylene dimerization to 4-methyl-1-pentene, the propylene is passed over a catalyst bed comprising extruded potassium carbonate impregnated with potassium metal. However, when this process is started up or shut down more than twice, it is observed that the catalyst bed is plugged, presumably by polymeric products formed during startups and shutdowns even though on shutdown the temperature is lowered to a range where polymerization would not be expected. The plugged catalyst bed must therefore be replaced, incurring additional cost and time.

Inert purge in catalytic dimerization of olefins


A system, method, and computer readable medium for context controlled data tapping utilizing parallel logic for integrated link monitoring including receiving a signal unit, indexing to a state associated with a current channel to determine a current context of the signal unit in parallel to host processing and assigning a bundle overhead associated with the signal unit.

The present invention is generally related to virtually tapping transmit and receive data links utilized for signaling servers and, more specifically to a context controlled data tap utilizing parallel logic for integrated link monitoring.
Currently, interactively coupling signaling servers to data capture systems requires a multitude of passive taps to monitor message traffic level 2 information. Level 2 information includes components such as sequencing and error checking. An Integrated Link Monitor (ILM) can provide interactive coupling of the signaling server to a data capture system for monitoring message traffic. The signaling server can be of the Signaling System #7 (SS7) type such as the Alcatel Signaling Server Global (SSG) system. Integrated link monitor coupling of the signal server to the data capture system replaces the multitude of passive taps on each of the signaling server links that were previously used to accomplish this purpose. The information previously received by means of the passive taps is now provided by a series of Ethernet connections. Current integrated link monitoring functions that have been implemented in hardware performs the level 2 functions but require the host processor utilization to perform those functions. The use of the host processor to perform level 2 functions adds significant load to the host processor and reduces its availability to perform distributed application services.
Therefore, what is needed is parallel logic to virtually tap the signaling server message traffic to extract level 2 information and perform level 2 functions. More specifically, parallel logic is needed to perform a virtual tap of context-controlled transmit and receive data links to extract level 2 information and perform the level 2 functions. The level 2 functionality is implemented by means of the integrated link monitor which aligns signal units based on context and copies those signal units to the Direct Memory Access (DMA) function which assembles the integrated link monitor data packet bundles in host memory.

Context controlled data tap utilizing parallel logic for integrated link monitoring


There is provided an inkjet printing apparatus which, even in a case where a landing position of ink changes due to a change in a distance between an ejection port of a print head and a support surface of a print medium, the print medium is conveyed by an appropriate conveyance amount. The inkjet printing apparatus detects a changing amount of the landing position of an ink droplet. The conveyance amount of the print medium by a conveying roller and a pinch roller is controlled based upon the detected changing amount.

1. Field of the Invention
The present invention relates to an inkjet printing apparatus which adjusts a conveyance amount of a print medium corresponding to a change in a landing position of an ink droplet generated by a change of a distance between a print head and the print medium.
2. Description of the Related Art
There is proposed an inkjet printing apparatus which performs conveying control of a print medium for performing printing of high image quality on the print medium. For example, in Japanese Patent Laid-Open No. 2008-260170, it is disclosed that a conveyance error of the print medium due to eccentricity of a conveying roller or a variation of a conveyance amount existing for each rotational angle of the conveying roller is corrected. Then the conveyance of the print medium is performed by the corrected conveyance. In the inkjet printing apparatus disclosed in Japanese Patent Laid-Open No. 2008-260170, a test pattern is printed on a print medium, and then is in advance scanned, thereby correcting the conveyance amount of the print medium.
However, there are some cases of adopting an inkjet printing apparatus in which as a distance between the print head and a support surface supporting the print medium changes, a landing position of an ink droplet changes following the change of the distance. In this case, there is a possibility that even if only the conveyance error of the print medium due to eccentricity of the conveying roller or the variation of the conveyance amount existing for each rotational angle of the conveying roller is corrected, it is insufficient for the adjustment of the conveyance amount. Therefore there occurs a possibility of being incapable of performing the printing with an appropriate conveyance amount. In a case where the conveyance is not performed appropriately, there is a possibility that a clearance occurs between images printed by the respective scans, and thereby a white stripe is generated in the image. In addition, when the images printed by the respective scans excessively largely overlap with each other, in some cases there is generated a black stripe in the image. Therefore there is a possibility that a quality of a print image is degraded.


Applying squeezing pressure to a diseased prostate, by means of a urethral and/or rectal catheter incorporating an inflatable prostate balloon, to compress the prostate while it is being irradiated from a microwave antenna, increases the therapeutic temperature to which the prostate tissue more distal to the microwave antenna can be heated without heating any non-prostate tissue beyond a maximum safe temperature, and reduces the temperature differential between the heated more distal and more proximate prostate tissue from the microwave antenna.

This invention relates to the use of microwaves for the treatment of prostate disease and, more particularly, to catheters designed to efficiently irradiate the prostate of a male patient with microwave power.
As known in the art, prostate disease, such as prostate cancer or benign prostatic hypertrophy (BPH), inter alia, results in a narrowing of the urethra in the neighborhood of the prostate caused by the surrounding enlarged prostate. This narrowing restricts the passage of urine. As is also known, a diseased prostate can be treated by irradiating prostate tissue with an amount of microwave power sufficient to heat that prostate tissue to a therapeutic temperature. However, the maximum microwave power that can be used is limited by the fact that it is essential that none of the prostate tissue be overheated beyond a maximum therapeutic temperature and that none of the irradiated non-prostate tissue be heated beyond a maximum safe temperature (which maximum safe temperature for non-prostate tissue is below the maximum therapeutic temperature for prostate tissue).
Catheters designed to be inserted into the urethra that help pass urine and bulb applicators designed to be inserted into the rectum of the patient, which have been fitted with a microwave antenna, have been used in the past to irradiate the prostate tissue of the patient with microwave power. A urethral catheter is often equipped with a so-called Foley balloon located close to the tip thereof, which may be inflated (usually with air) after the tip of the urethral catheter has been inserted into the patient's bladder, thereby to secure the catheter at its fully inserted position within the patient's urethra. A bulb applicator may be made non-symmetrical so that, after full insertion into a patient's rectum, the microwave power preferentially irradiates the patient's prostate tissue.
Regardless of whether the patient's prostate tissue is irradiated with microwave power radiated by the microwave antenna from the patient's urethra or rectum, it is apparent that non-prostate tissue situated between the patient's prostate and urethra or rectum, as the case may be, also will be irradiated. Further, since the microwave field intensity tends to vary as an inverse function (e.g., as an inverse square) of distance from the microwave antenna, this non-prostate tissue will be more highly irradiated than will the prostate tissue (particularly that prostate tissue situated more distal to the microwave antenna), because the irradiated non-prostate tissue is more proximate to the microwave antenna. Therefore, the difference between the respective microwave-field intensities heating the more proximate irradiated non-prostate tissue and the more distal irradiated prostate tissue varies as an inverse function of the ratio of their respective distances from the microwave antenna. Thus, in order to heat the more distal prostate tissue to a higher therapeutic temperature without concurrently either overheating any of the more proximate prostate tissue or heating the more proximate non-prostate tissue beyond a maximum safe temperature, it would be desirable to increase the minimum distance between the microwave antenna and the more proximate non-prostate tissue, without appreciably affecting the distance between the more distal prostate tissue.


A method of scrubbing a gas, such as flue gas or exhaust gas, comprising carbon dioxide to deplete the gas of carbon dioxide (CO2), the method comprising the steps of:                scrubbing the gas in a scrubber (210) with a first alkaline, aqueous scrubbing liquid to dissolve carbon dioxide (CO2) as hydrogen carbonate (HCO3−) and/or as carbonate (CO32−) in the first alkaline, aqueous scrubbing liquid, thereby providing a first spent aqueous scrubbing liquid comprising hydrogen carbonate (HCO3−) and/or carbonate (CO32−), the first spent aqueous scrubbing liquid having a pH from about 7 to about 9;        feeding the first spent aqueous scrubbing liquid to an anode chamber of an electrolytic cell (310) comprising the anode chamber (313) and a cathode chamber (312) separated by a membrane (311);        regenerating the first spent aqueous scrubbing liquid in the electrolytic cell (310) by electrolysis, the electrolysis increasing the pH of the first spent aqueous scrubbing liquid in the cathode chamber (312), the electrolysis further depleting the first spent aqueous scrubbing liquid of hydrogen carbonate (HCO3−) and of carbonate (CO32−) in the anode chamber (313) by decreasing the pH, the regeneration further comprising generating gaseous hydrogen in the cathode chamber (312) and a gaseous mixture of oxygen and carbon dioxide (CO2) in the anode chamber (313) by electrolysis; and        withdrawing regenerated alkaline, aqueous scrubbing liquid from the cathode chamber (312) and re-circulating it to the scrubber (210);        wherein:        the gaseous hydrogen is withdrawn from the cathode chamber (312); and        the gaseous mixture of oxygen and carbon dioxide is withdrawn from the anode chamber (313).

Carbon dioxide (CO2) is a gas that when emitted into the atmosphere is damaging to the climate as it contributes to the green-house effect and rise in global temperature. It is for example produced as a byproduct when fossil fuel, e.g. coal, gasoline or diesel, is burned. Coal- and gas-fired power plants accounts for a large share of CO2 emissions. It is a goal for many sectors to lower carbon dioxide emissions.
Emitted gases resulting from combustion and comprising CO2 are typically denoted flue gases or exhaust gases. Depleting such emitted gases of CO2 by lowering the CO2 content in the emitted gases, can be done by so called scrubbing of the gases, i.e. removing the CO2 from the gas stream by absorbing/dissolving CO2 in a liquid. The primary application for CO2 scrubbing is for removal of CO2 from the exhaust (i.e. flue gas) of coal- and gas-fired power plants, downstream of a power station, before the gas is released into the atmosphere. By using such a process, it would be possible to significantly lower the CO2 emissions involved in coal-fired power generation. In the chemical industry, CO2 scrubbing is used to separate CO2 from natural gas, for use in, for example, the beverage or fertilizer sector.
In a CO2-scrubbing system, a scrubbing solution takes up the carbon dioxide from the flue gas, at low temperatures, in an absorber. Most common is scrubbing of the flue gas using a chemical absorption medium, such as an alkaline, aqueous liquid. In an alkaline, aqueous liquid, CO2 will dissolve and partly be hydrolyzed into carbonic acid (H2CO3). Given the alkaline pH, formed carbonic acid (H2CO3) will be shifted into hydrogen carbonate (HCO3−) and/or carbonate (CO32−), as outlined below.CO2+H2O=>H2CO3 H2CO3OH−=>HCO3−+H2OHCO3−+OH−=>CO32−+H2O
The technology being primarily developed for this process involves the use of aqueous amines, e.g. aqueous monoethanolamine, as absorption solvent. Amine scrubbing has been used to separate carbon dioxide (CO2) from natural gas and hydrogen since 1930. However, it is not yet used on a larger scale for CO2 capture from coal-fired power plants. The process is energy consuming and the technology has not been implemented in large scale because of the capital costs of installing the facility and the operating costs. Scrubbers using aqueous monoethanolamine as absorption solvent for example use large amounts of heat for regeneration of the solvent used in the scrubber. Presently, there are no other industrial applicable technologies that will provide energy-efficient or timely solutions to CO2 emission from conventional coal-fired power plants.
Further key areas in development work on the carbon capture process include process integration and optimization for applications in large-scale power plants.
There is an imperative need for improved scrubbing systems that preferably require less heat for CO2 capture.


A capacitive sensor device and method is configured to respond a stimulus provided in a sensing region with an output signal. A signal generator is configured to apply a carrier signal to the capacitive sensor device. The carrier signal is switched between a plurality of phases at a switching rate, where the switching rate is less than a demodulation filter bandwidth. The result of the carrier phase shifting is that effects of interference in the output signal are frequency shifted away from the effects of user applied stimulus. An interference detection filter is configured to filter from the sensor outputs at least one effect produced by the stimulus. An interference measuring device is configured to determine a level of interference in the at least one interference output. Thus, the system can detect interference in the output of the capacitive sensor device.

Proximity sensor devices (also commonly called touch sensor devices) are widely used in a variety of electronic systems. A proximity sensor device typically includes a sensing region, often demarked by a surface, in which input objects can be detected. Example input objects include fingers, styli, and the like. The proximity sensor device can utilize one or more sensors based on capacitive, resistive, inductive, optical, acoustic and/or other technology. Further, the proximity sensor device may determine the presence, location and/or motion of a single input object in the sensing region, or of multiple input objects simultaneously in the sensor region.
The proximity sensor device can be used to enable control of an associated electronic system. For example, proximity sensor devices are often used as input devices for larger computing systems, including: notebook computers and desktop computers. Proximity sensor devices are also often used in smaller systems, including: handheld systems such as personal digital assistants (PDAs), remote controls, and communication systems such as wireless telephones and text messaging systems. Increasingly, proximity sensor devices are used in media systems, such as CD, DVD, MP3, video or other media recorders or players. The proximity sensor device can be integral or peripheral to the computing system with which it interacts.
One issue with some past proximity sensor devices is effects of interference on the sensor device. In particular, difficulties have long been realized in identifying and reducing the effects of noise and other interferers upon the sensor device. Interference can originate from various sources, including display backlights, power supplies, wireless communication devices and the like. Although many sensors now include filtering that can effectively remove many types of interference, problems remain in identifying and removing interference with frequencies that are close to the sensor sensing frequency or any of its harmonics. These types of interferers are sometimes referred to as "tuned noise", and are difficult to identify or filter out. Specifically, because the effective "beat" frequency of the tuned noise is often very close to the frequency of signals resulting from user-applied stimulus the tuned noise will often appear as a stimulus applied to the sensing region. As a result, distinguishing the effects of undesirable tuned noise from the desirable effects of the stimulus can be quite difficult. Further, the time to observe tuned noise can be significant because the beat frequencies of such noise can be relatively low (e.g. on the order of 10 Hz or less), and therefore the period of an entire beat cycle can be significant (e.g. on the order of ten seconds for a beat frequency of 0.1 Hz). Further, in some instances the beat signal may be indistinguishable from a user input.
Nevertheless, several techniques for reducing the effects of interference, including tuned noise, have been attempted. One conventional interference avoidance technique involves comparing the output signals produced by operating the sensor at two or more different sensing frequencies when no stimulus is present on the sensing region, and then subsequently operating the sensor using the frequency that produces the lesser amount of interference. This technique has several disadvantages, however, in that determining whether the stimulus is present at any given time can be difficult in practice, particularly in the presence of significant external interference. Moreover, because this technique measures interference only when the stimulus is not present, sources of interference present within the stimulus itself (e.g. environmental radio frequency noise coupled to the sensor via the stimulus) are not considered.
Accordingly, it is desirable to provide systems and methods for quickly, effectively and efficiently detecting interference in a proximity sensor device, even when the frequency of the interference noise is close to the sensing frequency. Other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.

System and method for detecting interfernce in a sensor device using phase shifting


The measurement of the diffusion length of minority charge carriers in a semiconductor crystal body is enabled in that the front side and the rear side of the crystal wafer are each respectively brought into contact with an electrolyte in a respective measuring cell and an inhibiting space charge zone is generated at the front side of the wafer. The front side is irradiated with light having a wave length of .lambda.>800 nm and the front side photocurrent I.sub.1 of the minority charge carriers thereby generated is measured. The diffusion length L can be calculated from the photocurrent I.sub.1 with the assistance of a mathematical equation. The topical distribution of the diffusion length L is obtained given point-by-point irradiation and scanning over the crystal wafer. Diffusion lengths of L<150 .mu.m can be measured by selecting a light source having a wave length of .lambda.>800 nm.

1. Field of the Invention
The present invention relates to a method for providing a topically-resolved determination of the diffusion length of minority charge carriers in a semiconductor crystal body in which at least one electrolyte-filled measuring cell is applied to the semiconductor crystal body so that the front side of the body is in contact with the electrolyte, the semiconductor body is connected by way of an ohmic contact to a voltage source with which a voltage is applied between the semiconductor crystal body and an electrode located in the electrolyte, the front side of the semiconductor crystal body then being radiated with light from a light source, with which method defects and contaminants can be detected in a non-destructive manner.
2. Description of the Prior Art
Contaminants and defects in a semiconductor crystal body (generally and hereinafter referred to as a wafer) represent recombination centers for minority charge carriers. The diffusion length L of the minority charge carriers is therefore a measure for the density of defects in the wafer.
A method for the topically-resolved determination of the diffusion length L is disclosed in the European application 0 295 440. The front side and the rear side of the wafer are thereby each brought into contact with a respective electrolyte-filled measuring cell. An inhibiting space charge zone is generated at the rear side of the wafer with the assistance of a connected D.C. voltage source, the other pole of the voltage source being connected to an electrode located in the electrolyte of the measuring cell at the rear side. The front side of the wafer is irradiated with visible light of, for example, a helium-neon laser. The photo current of the generated minority charge carriers is detected at the rear side of the wafer and is normed to that measured at the front surface of the wafer. The diffusion length L is mathematically determined from this quotient.
The above method, however, can only be applied when the diffusion length L is greater than approximately 1/4th of the wafer thickness D since too few minority charge carriers otherwise diffuse up to the rear side of the wafer.

Method for topically-resolved determination of the diffusion length of minority charge carriers in a semiconductor crystal body with the assistance of an electrolytic cell


An emission control system is provided for an engine for reducing NOx emissions, the system comprising an ammonia injector, a controller for controlling the ammonia injector and a catalyst, wherein the controller includes a transmitter for transmitting information regarding the amount of ammonia used and the amount of NOx reduced.

Nitrogen oxide (NOx) emissions contribute significantly to photochemical smog and also to acid rain. NOx includes both nitrogen oxide (NO) and nitrogen dioxide (NO2), both of which will be referred to as NOx. NOx is generated during the combustion of fossil fuels and a major generator of NOx is the diesel engine. Currently, new emissions standards for diesel engines are being proposed. For example, the European Euro-5 and the proposed US-2007 standards require a significant reduction in both NOx and particulate matter (PM) emissions.
In addition, diesel emissions have been classified as Toxic Air Contaminants (TACs) in the State of California. Under the Federal Clean Air Act, California must meet certain clear air requirements established by the Federal Government in order to qualify for federal highway funding. It is unlikely that those guidelines can be met without reducing emissions from mobile sources. Diesel mobile sources produce a disproportionate percentage of all emissions due to the inherent nature of the fuel and the engine.
In response, diesel engine manufacturers are developing systems to treat the exhaust stream of their diesel engines. Most of these solutions, however, make a clear trade off between emissions and fuel consumption. Some proposed systems are even associated with a distinct fuel penalty. Of course, fuel efficiency is extremely important, as the engine operator incurs an increased operational cost.
Another problem is that diesel engines typically last longer than other types of engines, and older engines produce more toxic emissions than newer engines.
Therefore, there exists a need for an emission control system that can reduce both NOx and PM emissions without incurring a fuel penalty, and that can be retrofitted to existing diesel engines.


An imaging medical instrument such as an endoscope, an exoscope or microscope having a shaft, in which an optical fiber bundle extends from the proximal to the distal end for illuminating field and in which a lens system is arranged for transmitting an image of the field. A light source inputs coupling light into the one proximal end of the optical fiber bundle with a multiplicity of selectively actuatable individual light sources arranged in an array-like manner, with a camera for capturing the transmitted image of the field of view and with a control unit for selectively actuating the individual light sources of the light source for adapting the illumination field. Here, the illumination field has a different form to the field of view. The control unit has an apparatus for analyzing the illumination situation, the apparatus being suitable and provided for analyzing the image captured by the camera in respect of changes depending on the selectively actuated individual light sources and for analyzing the field of view relative to the illumination field.

The German patent DE 1113788 B has disclosed an endoscope which exhibits a detached light source, the light of which is coupled into the endoscope by a light guide and guided from the proximal end of the endoscope with the eyepiece to the distal end of the endoscope. In the process, the endoscope is typically in a body cavity and emits the supplied light there in a single direction for the purposes of illuminating the body cavity. The significant heat produced by the detached light source cannot lead to injury to the patient as a result of detaching the light source. Furthermore, the handling of this endoscope is found to be comfortable since the heat loss of the light source does not lead to noticeable heating of the endoscope.
The laid-open application DE 10 2011 054 031 A1 has disclosed an exoscope that serves to observe and illuminate an object field on a patient from a location distant from the body of the patient. By way of a detached light source, the light for illumination purposes is supplied to the exoscope via an optical fiber cable and transmitted with the aid of optical fibers to the distal end with the head part in the exoscope, where said light is used for illuminating the object field. Here, there are two exit openings for the light at the head, into which two partial bundles of the optical fiber bundle arranged in the exoscope open.
DE 10 2007 063 262 A1 has disclosed an illumination apparatus for producing light for endoscopy or microscopy. In order to avoid the problems of the light source heating up, said light source having an array of LEDs, said illumination apparatus exhibits a plurality of cooling apparatus using heat pipes. This cooling is found to be very complicated.
Endoscopes with a variable, adjustable viewing direction are known from EP 2 263 519 A2 and EP 2 446 810 A1. Here, the viewing direction is varied by modifying the position or orientation of individual optical elements of the lens systems. These endoscopes require an accurately fitting illumination of the region that is viewed depending on the set viewing direction. In the process, two options are presented. Firstly, the entire possible viewing region is illuminated over a large area. Secondly, it is proposed not only to selectively choose the viewing direction but also, additionally and parallel thereto, to selectively adapt the illumination direction by virtue of co-pivoting a light guide at the distal end of the endoscope and thereby modifying the illumination direction. This solution is found to be very complicated from a mechanical point of view and requires a significant volume in the region of the distal end, said significant volume significantly restricting the introduction of such a variable illumination in the case of endoscopes with a small tube diameter. The problem of the heat load in the region of the light source clearly becomes apparent in the case of a large-area illumination.
An alternative type of endoscope with a variable adjustable viewing direction is known from the German patent application DE 10 2014 107 572 A1 or the European patent EP 2 143 374 B1. In these, an electronic selection of the image data in the style of an electronic zoom or in the style of a laterally displaced selection of the image data of the large-area CCD chip is undertaken on the basis of a field of view that is widened by a wide-angle lens. These endoscopes regularly exhibit a large-area illumination of the field of view, which regularly goes beyond the field of view that was widened by a wide-angle lens. As a result, significant amounts of heat are introduced into the body cavity during an operation, which may lead to injury of the tissue.
The German patent application DE 10 2013 113 511 A1 has disclosed an endoscope, an exoscope or a microscope that, with the aid of a test arrangement, ascertains an assignment function of the proximal ends of optical fibers to the distal ends of the optical fibers in order to reduce the heat influx by input coupling of light into a selection of proximal ends of optical fibers. This endoscope, exoscope or microscope is very complicated in terms of handling.

Imaging medical instrument such as an endoscope, exoscope or microscope


The present invention relates to a device and method for simulating a radio channel with a defined characteristic between at least one antenna port (102a, 102b) of a first device (101), and a second device (103) in a test environment. The device comprises a first antenna (104a) adapted to receive signals, and arranged to provide a first radio channel (105a) between the first antenna (104a) and the second device (103) and, a second antenna (104b) adapted to receive signals, and arranged to provide a second radio channel (105b) between the second antenna (104b) and the second device (103). A characteristic of the second radio channel (105b) is dissimilar to a characteristic of the first radio channel (105a). The device further comprises a modifying circuit (107a, 107b) adapted to modify an amplitude relation between the received signals, and a multiport circuit (106) arranged to connect the first and second antennas (104a, 104b) with the at least one antenna port (102a, 102b). The multiport circuit (106) is also adapted to combine the modified signals, and to forward the combined signals to the at least one antenna port (102a, 102b), thereby simulating a radio channel between the at least one antenna port (102a, 102b) and the second device (103) with a characteristic which is a combination of the characteristic of the second radio channel (105b) and the characteristic of the first radio channel (105a) in a relation corresponding to the modified amplitude relation.

Wireless equipment usually undergoes many kinds of tests in order to ensure sufficient performance. Some tests are mandated by standards, while others are performed as part of product development and verification. A particular class of tests is that where the over-the-air performance of the communication between one or several wireless transmitter and receivers is tested. The purpose of such a test could be to ensure that handsets are adequately designed and work well in the presence of a human being, which is important for operators when determining whether to subsidize mobile handsets from different vendors, or it could be to evaluate performance under realistic load and channel conditions which would be difficult to achieve at reasonable cost using cabled equipment.
Several different types of over-the-air testing exist. Some examples of the most common ones are described in the following paragraphs.
Reverberation Chamber Testing
Here the transmitting and receiving antennas are placed in a reverberation (or scattered field) chamber, which in its simplest form is a metallic box that gives rise to numerous reflections causing an ideally isotropic multipath distribution. The purpose of reverberation chamber testing is to test radiated performance of mobile stations. Specially designed reverberation chambers, so called Fading Boxes (FBoxes), are used to generate a fading radio environment suitable for system testing of a Radio Access Network. A reverberation chamber is schematically illustrated in FIG. 1.
The mobile station 120 under test, commonly referred to as the device under test (DUT), is either placed physically inside the reverberation chamber 110 or connected via cables to test antennas placed inside the chamber 110. In FIG. 1, the transmitting and receiving antennas 130 of the radio base station (RBS) are placed inside the chamber 110 and are connected to the RBS antenna ports on the outside of the chamber. A rotating stirrer 140 is introduced in the chamber 110 in order to achieve different boundary conditions to obtain fading conditions that vary in time, and thereby simulate that the mobile stations are moving around. A line of sight shield 150, may also be introduced in the chamber to affect e.g. fading or delay conditions.
The reverberation chamber 110 generates a radio environment where the received signals are faded according to a Rayleigh distribution and with a delay spread that is proportional to the size of the reverberation chamber. The radio signals from the mobile stations 120 in such a reverberation chamber are received by the RBS antennas 130 with a rather small delay spread due to the short propagation paths in the reverberation chamber. FIG. 2 shows an example of a channel model, characterized by a distribution of the signal power on a number of taps spread in time, so called delay taps. Each tap is faded and has a specified time distance to other taps as well as a specified power relative to other taps. The reverberation chamber 110 illustrated in FIG. 1 will by design generate a channel having a certain channel impulse response that may be similar to some particular channel model. For instance, the ITU (International Telecommunication Union) have described a set of channel models ranging from low to high time dispersion conditions, to be used for evaluating performance under the expected channel conditions in wireless cellular systems. A particular fading box could be designed to give channel conditions resembling one such model, but not the full range of models.
Anechoic Chamber Testing
In contrast to the reverberation chamber, the inside walls of the anechoic chamber are covered with absorbing material in order to reduce reflections to a minimum. This allows for an ideally deterministic radio environment to be set up, either with a single transmitter and/or receiver forming a line-of-sight link, or using multiple transmitters and/or receivers to create a deterministic multipath distribution.
Field Measurements
This is perhaps the most straight-forward method for testing. In field measurements, also referred to as drive tests, the products are tested in the real environment where they are to be used, or in a semi-controlled environment having characteristics similar to the real environment.
The large potential gains promised by the use of multiple transmit and/or receive antennas, also referred to as Multiple Input Multiple Output (MIMO) techniques, has resulted in such technology becoming an integral part of many wireless standards, such as LTE, WCDMA, WIMAX, etc. It is therefore expected that a multitude of equipment with multiple antennas will enter the market. One challenge is that the performance of MIMO products in particular depends both on the ability of the wireless channel to support multiple orthogonal communication channels, i.e. the channels "richness", and on how well the antenna configurations at both ends of the link allow utilizing the "richness" of the wireless medium to support diversity or multi-stream transmission.
The over-the-air performance of a certain MIMO-capable mobile station can therefore be expected to depend not only on the design of the mobile station itself, but also on both the wireless channel conditions and the antenna configuration at the other end of the wireless link. The performance will thus for example depend on whether spatial diversity or polarization diversity is used, or it may depend on the spatial separation of antennas in a space diversity setup.
As the performance of especially MIMO equipment is expected to depend both on the wireless channel as well as the antenna configurations at both ends of the link, the number of test cases may become large. The need for testing against different antenna configurations at the other end of the link may require physically shifting antennas or switching between multiple pre-installed antennas, which can become very complex and time-consuming.
Furthermore, in the case of reverberation chamber testing, it would be necessary to have reverberation chambers of different sizes in order to create reverberation chamber test environments with different delay spreads, since the delay spread of a reverberation chamber is proportional to the size of the reverberation chamber. A change of delay spread during testing would thus also require complex and time consuming reconfigurations of the test environment. Besides, the size of a reverberation chamber intended to simulate a delay spread that corresponds to a channel model representing for example a rural area environment would have a too large foot print to be placed in a test lab.

Method and device in over-the-air test environment


Systems and methods are provided for selecting a path through which to send data in a host-based multi-path system. In one embodiment, a system includes a management server that determines a topology of the network and analyzes a plurality of paths for sending data through the network. The management server may also create a path quality index based on the topology and the analysis, the path quality index indicating a quality of individual paths within the plurality of paths. The system further includes a host that receives the path quality index from the management server and automatically selects, based on the path quality index, a path from the plurality of paths through which to send data.

Enterprise storage systems store data in large-scale environments and differ from consumer storage systems in both the size of the environment and the types of technologies that store and manage the data. A large-scale environment that stores data is typically referred to as a storage area network (SAN). SANs are commonly used in enterprise storage systems to transfer data between computer systems and storage devices. A typical SAN provides a communication infrastructure, including physical connections between computer systems, storage devices, and a management layer, which organizes the connections, storage devices, and computer systems.
In a SAN environment, computer systems, typically referred to as hosts, connect to the SAN via one or more host bus adapters. In the case of a Fibre Channel SAN, the physical connections between hosts and storage devices may include special Fibre Channel host bus adapters, Fibre Channel switches, Fibre Channel routers, and optical fiber.
Storage devices may include multiple disk drives that combine to form a disk array. A typical disk array includes a disk array controller, a cache, disk enclosures, and a power supply. Examples of disk arrays include the SYMMETRIX Integrated Cache Disk Array System the CLARIION Disk Array System, both available from EMC Corporation of Hopkinton, Mass. A disk array controller is a piece of hardware that provides storage services to computer systems that access the disk array. The disk array controller may attach to a number of disk drives that are located in the disk enclosures. For example, the disk drives may be organized into RAID groups for efficient performance. RAID (redundant array of inexpensive disks) is a system that uses multiple disk drives that share or replicate data among the drives. Accordingly, in a RAID system, instead of identifying several different hard drives, an operating system will identify all of the disk drives as if they are a single disk drive.
Disk array controllers connect to a SAN via a port. A port serves as an interface between the disk array controller and other devices, such as the hosts, in the SAN. Each disk array controller typically includes two or more ports. Disk array controllers may communicate with other devices using various protocols, such as the SCSI (Small Computer System Interface) command protocol over a Fibre Channel link to the SAN. In the SCSI command protocol, each device is assigned a unique numerical identifier, which is referred to as a logical unit number (LUN). Further, communication using the SCSI protocol is said to occur between an "initiator" (e.g., a host) and a "target" (e.g., a storage device) via a path. For example, a path may include a host bus adapter, an associated SCSI bus or Fibre Channel cabling, and a single port of a disk array controller.
Management of a path is provided by path management software. Path management software is a host-based software solution that is used to manage SANs and, among other things, can detect load imbalances for disk array controllers in a SAN and can identify alternate paths through which to route data. An example of path management software is EMC POWERPATH by EMC Corporation of Hopkinton, Mass.
Although prior path management software systems may monitor load balances and identify alternate paths through which to route data, a network administrator must evaluate the alternative paths and select which paths to use for routing data. The number of alternate paths and routing decisions that a network administrator must make increases dramatically as the amount of data and number of physical connections between an initiator and a target increase. This may cause a delay in the network administrator selecting an optimal path, and lead to increased costs due to having network administrators perform path selection. Therefore, conventional techniques are limited and suffer from one or more drawbacks.
In view of the foregoing, there is a need for improved systems and methods for selecting paths in a host-based I/O multi-path system.

Storage array network path analysis server for enhanced path selection in a host-based I/O multi-path system


In a windshield device for a saddle-ride type vehicle equipped with a windshield portion provided adjustably in height, the windshield portion is attached through a rail member 41, the rail member 41 is equipped with an upper elongate hole 48b, a lever member 42 covering the upper elongate hole 48b and a lock pin 46 fixed to a body side are equipped, the rail member 41 is provided slidably relative to the lock pin 46 inserted through the upper elongate hole 48b, and the lever member 42 is equipped with a plurality of holes 68 with which the lock pin 46 is engageable.

Heretofore, in windshield devices for saddle-ride type vehicles, there has been known one wherein a windscreen (windshield portion) is made to be movable about a shaft arranged to be directed in a vehicle width direction and wherein the windscreen is made to be adjustable in height (refer to Patent Literature 1, for example). In Patent Literature 1, the windscreen is supported by guide connecting bars (links) of four in total including those of upper, lower, right and left, and these guide connecting bars are pivotally moved by a motor through the aforementioned shaft to move the windscreen.

Windshield device for saddle-ride type vehicle