text:
|Publication number
|Publication type
|Application number
|Publication date
|May 18, 2010
|Filing date
|Aug 21, 2007
|Priority date
|Dec 21, 2006
|Fee status
|Also published as
|Publication number
|Maxim Kelman, Xuegeng Li, Pingrong Yu, Karel Vanheusden, David Jurbergs
|Original Assignee
|Innovalight, Inc.
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (54), Non-Patent Citations (44), Referenced by (17), Classifications (25), Legal Events (3)
|External Links: USPTO, USPTO Assignment, Espacenet
This application claims the benefit of U.S. Provisional Patent Application Ser. No. 60/876,328, filed Dec. 21, 2006; and U.S. Provisional Patent Application Ser. No. 60/901,768, filed Feb. 16, 2007; the entire disclosures of which are incorporated by reference.
This disclosure relates in general to nanoparticles and in particular to Group IV nanoparticles and films comprising Group IV nanoparticles.
Semiconductors form the basis of modern electronics. Possessing physical properties that can be selectively modified and controlled between conduction and insulation, semiconductors are essential in most modern electrical devices (e.g., computers, cellular phones, photovoltaic cells, etc.). Group IV semiconductors generally refer to those elements in the fourth column of the periodic table (e.g., carbon, silicon, germanium, etc.).
In general, a solid semiconductor tends to exist in three forms: crystalline, polycrystalline, and amorphous. In crystalline form, semiconductor atoms are positioned in a single unbroken crystal lattice with no grain boundaries. In polycrystalline form, the semiconductor atoms are positioned in many smaller and randomly oriented crystallites (smaller crystals). The crystallites are often referred to as grains. In amorphous form, the semiconductor atoms show no long-range positional order.
In general, conduction generally refers to the movement of electrically charged carriers, such as electrons or holes (i.e., lack of electrons), through a transmission medium. Metals tend to have substantial amounts of electrically charged particles available, whereas insulators have very few.
In the absence of impurities (called dopants), a semiconductor tends to behave as insulator, inhibiting the flow of an electric current. However, after the addition of relatively small amounts of dopants, the electrical characteristics of a semiconductor can dramatically change to a conductor increasing the amount of electrically charged carriers.
Depending on the kind of impurity, a doped region of a semiconductor can have more electrons (n-type) or more holes (p-type). For example, in a common configuration, a p-type region is placed next to an n-type region in order to create a (p-n) junction with an electric field. Consequently, electrons on the p-type side of the junction within the electric field may then be attracted to the n-type region and repelled from the p-type region, whereas holes within the electric field on the n-type side of the junction may then be attracted to the p-type region and repelled from the n-type region. Generally, the n-type region and/or the p-type region can each respectively be comprised of varying levels of relative dopant concentration, often shown as n−, n+, n++, p−, p+, p++, etc.
In another example, a junction may be created by placing an intrinsic (undoped) intrinsic semiconductor layer between the n-type region and the p-type region in order to mitigate the effects of quantum tunneling, a quantum-mechanical effect in which an electron transitions through a classically-forbidden energy state. For example, without an intrinsic separation layer, if the p-n junction is small enough, an electron can travel against the electric field and degrade the performance of the p-n junction.
In yet another example, a metal junction may be created by placing the n-type region and/or the p-type region next to a metal region in order to form an ohmic (low-impedance) contact.
One method of adding the impurities into the semiconductor involves depositing a doped glass on a semiconductor substrate, such as a Si wafer. Once exposed to relatively high temperature (e.g., 900-1000° C.), the dopants will tend to diffuse from the highly-doped glass into the substrate.
In addition, the high temperature also tends to anneal the substrate. Annealing is generally the process of heating a material above a critical or recrystallisation temperature in order to reduce the materials internal stresses, and or improve its physical and electrical properties. In the case of a semiconductor substrate, annealing allows the dopant atoms to properly position themselves in the lattice, such that the additional electrons or holes are available for the transmission of current. This is generally called activation and is critical for the creation of an efficient junction.
However, depositing doped glass may be problematic. For example, doped glass is often applied via a silk-screen. Silk-screening is generally a printing technique that makes use of a squeegee to mechanically force a liquid, such as a highly doped glass paste, directly onto a substrate. Consequently, this downward mechanical force tends to subject the substrate to additional stresses, and hence may detrimentally affect the electrical and physically characteristics of the substrate. In addition, creating alternating n-type and p-type regions on the same side of the substrate with a doped glass, such as with back contact solar cells, is difficult without the use of multiple and costly time-consuming printing steps.
Another method of adding the impurities into the semiconductor involves depositing dopants in a crystalline or polycrystalline substrate through ion implantation. Ion implantation generally accelerates dopant ions into the substrate at high energy. Like diffusion doping, the substrate must also generally be annealed at a high temperature to repair the substrate and activate the dopants. However, although dopant dosage may be controlled with high precision, ion implantation tends to be very expense since it requires the use of specialized and expensive semiconductor manufacturing equipment.
In yet a third technique of adding the impurities into the semiconductor, doped (thin) film layers may be formed using deposition techniques such as chemical vapor deposition (CVD). In a typical CVD process, a substrate (which can be an insulator, a semiconductor, or metal) is exposed to one or more volatile precursors, which react and/or decompose on the substrate surface to produce a doped film. However, like ion implantation, CVD is expensive since it requires specialized and expensive semiconductor manufacturing equipment. In addition, CVD also tends to be very slow, as the film layers are built up a single atom at a time.
In view of the foregoing, there is desired a method of producing low cost and efficient junctions for electrical devices, such as solar cells.
The invention relates, in one embodiment, to a set of nanoparticles, wherein each nanoparticle of the set of nanoparticles is comprised of a set of Group IV atoms arranged in a substantially spherical configuration. Each nanoparticle of the set of nanoparticles further having a sphericity of between about 1.0 and about 2.0; a diameter of between about 4 nm and about 100 nm; and a sintering temperature less than a melting temperature of the set of bonded Group IV atoms.
The invention relates, in another embodiment, to a set of doped Group IV nanoparticles made by a process comprising introducing a Group IV precursor gas and a dopant gas into a plasma reactor. The process further includes striking a radiofrequency plasma in the plasma reactor, and forming a set of substantially spherical doped nanoparticles, wherein each nanoparticle of the set of substantially spherical doped nanoparticles has a diameter of between about 4 nm and about 100 nm.
The present invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
The present invention will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present invention.
In an advantageous manner, a set of Group IV nanoparticles may be created such that an efficient junction (e.g., p-n, metal-silicon, etc.) may be formed at a substantially lower cost than alternate methods. In one configuration, the formed junction includes at least one film. In another configuration, the Group IV nanoparticles are substantially spherical and preferably between about 4 nm and about 100 nm in diameter. In yet another configuration, the Group IV nanoparticles are substantially spherical and more preferably between about 4.0 nm and about 20.0 nm in diameter. In yet another configuration, the Group IV nanoparticles are substantially spherical and most preferably 7.0 nm.
In general, a nanoparticle is a microscopic particle with at least one dimension less than 100 nm. The term "Group IV nanoparticle" generally refers to hydrogen terminated Group IV nanoparticles having an average diameter between about 1 nm to 100 nm, and composed of silicon, germanium, carbon, or combinations thereof. The term "Group IV nanoparticle" also includes Group IV nanoparticles that are doped.
In comparison to a bulk material (>100 nm) which tends to have constant physical properties regardless of its size (e.g., melting temperature, boiling temperature, density, conductivity, etc.), nanoparticles may have physical properties that are size dependent, and hence useful for applications such as junctions. For example, semiconductor nanoparticles may be more easily and cheaply patterned p-n junctions when compared to alternate methods, such as silk-screening or deposition.
However, because they have substantially larger surface areas in comparison to bulk solids, Group IV nanoparticles also tend to be very susceptible to contamination. In general, since it is extremely difficult to completely prevent ambient oxygen or water molecules from coming into contact with the Group IV nanoparticles, contamination often occurs from such chemical reactions such as oxidation and/or hydrolysis. Consequently, even small amounts of contamination may inhibit sintering (i.e., interfering with the physical connection of the Group IV nanoparticles), delay dense layer formation (i.e., increasing material porosity and thus decreasing conductivity), and provide electron-hole recombination sites (i.e., attenuating current generation in the assembled junction).
In an advantageous manner, the Group IV nanoparticles may be formed into a substantially spherical shape in order to minimize contamination. In general, of all the solids having a given volume, a sphere is the one with the smallest surface area. Likewise, of all solids having a given surface area, the sphere is the one having the greatest volume. Consequently, a spherical nanoparticle will tend to shield the greatest number of Group IV atoms from contamination, and hence is beneficial to junction creation.
In general, semiconductor nanoparticles typically must be formed into dense connected regions in order to create a junction. One such method is sintering. Generally a method for making particles adhere to each other, interacting nanocrystals sinter before size-dependent melting occurs. A. N. Goldstein, The melting of silicon nanocrystals: Submicron thin-film structures derived from nanocrystal precursors, A
Referring now to
In general, Si atoms have an atomic radius of about 0.118 nm and tend to form a diamond crystal structure with a cell dimension of about 0.5431 nm. In addition, although not shown, Ge with an atomic radius of about 0.125 nm and a cell dimension of about 0.566 nm, will have a area/volume to diameter curve that is substantially similar to that of Si.
Below about 4 nm, in the catastrophic contaminating region 102, the surface area/volume ratio starts to substantially increase, from about 1.5 m−1 (at about 4 nm) to about 6.0 m−1 (at 1 nm). Eventually, all of the Si atoms are essentially surface or shell atoms, and the likelihood of contamination is extremely high. Thus, for purposes of contamination reduction, Group IV nanoparticles should be greater than about 4 mm in diameter.
Referring now to
Particle sizes may be measured by identifying individual particles and drawing a straight line cross a particles shortest and longest dimensions as shown in the graphical example. Uniformity may be defined as the ratio of the maximum diameter over the minimum diameter of a particle. By measuring the particle dimension defined as the ratio of the longest L1 over the shortest dimension L2, one can obtain the metric L1/L2 as the level of sphericity. For example, for an ideal spherical particle, uniformity is equal to about 1.0. For an irregular particle, uniformity is generally substantially larger than about 1.0. For example, if a particle is rod or needle shaped, the L1/L2 ratio may be greater than 5. Optimal sphericity is generally between about 1.0 and about 2.0. Aside from surface contamination, a L1/L2 ratio of below 2 is beneficial to nanoparticle application techniques, such as inkjet printing.
Referring now to
At about a 4 nm diameter, Si particle surface contamination is about 1.02×1021 atoms/cm3, corresponding to a surface area/volume ratio of about 1.5 m−1 as previously shown. As the Si particle surface contamination increases above about 1.02×1021 atoms/cm3 in the catastrophic contaminating region (102), sintering, dense layer formation, and electron-hole recombination are aggravated, as previous stated.
In contrast, below about 13 nm, the sintering temperature of a Si nanoparticle sharply decreases with corresponding decrease in diameter size. Above about 13 nm, it is believed that the sintering temperature gradually increases with a corresponding increase in diameter size, eventually reaching about 947° C., or 67% of the melting temperature of Si (about 1414° C.). Likewise, although not shown in the figure, for germanium, it is believed that the sintering temperature also gradually increases with a corresponding increase in diameter size, eventually reaching about 628° C., or 67% of the melting temperature of Si (about 938° C.).
As previously described, sintering is generally a method for making particles adhere to each other and inducing densification of films. Consequently, because their small radii of curvature, it is believed that nanoparticles generally begin to sinter when a temperature of about ⅔ of the particle melting point is reached. It is further believed that large shear stresses generated by elevated temperatures in neck regions of the nanoparticles tend to cause a plastic deformation between two proximately located nanoparticles. For a given nanoparticles material, smaller nanoparticles generally have a lower sintering temperature than that of larger nanoparticles.
In general, various heat sources may be used to sinter the nanoparticle, such as conventional contact thermal sources (e.g., resistive heaters, etc.), as well as radiative heat sources (e.g., lamps, lasers, microwave processing equipment, plasmas, tungsten-halogen, continuous arc lamps, flash lamps, etc.). In the case of lasers, a wavelength range of between about 0.3 microns and about 10 microns is generally optimal.
In advantageous manner, lowering the sintering temperature reduces thermally induced stress in the underlying substrate that may subsequently damage the wafer and reduce minority carrier lifetime in photo-voltaic applications.
Additionally, a lower sintering temperature also allows the use of alternative materials in or near the junction (i.e., substrate, dielectric layer, etc.) that may have a melting point substantially below the Group IV melting temperature. For example, polyimides (e.g., Kapton, Kaptrex, etc.), with a glass temperature of around 4QO° C., may be used both as a dielectric and as a mask for production of electrical junctions. Consequently, by reducing the Group IV nanoparticle diameter sufficiently (to about 7 nm in this example), a dense nanoparticle layer may be formed on a polyimide layer.
Furthermore, smaller particles may be more readily suspended in a colloidal dispersion. Because of their small size, nanoparticles tend to be difficult to manipulate. Consequently, in an advantageous manner, assembled nanoparticles may be suspended in a colloidal dispersion or colloid, such as an ink, in order to transport and store the nanoparticles.
Generally, colloidal dispersions of Group IV nanoparticles are possible because the interaction of the particle surface with the solvent is strong enough to overcome differences in density, which usually result in a material either sinking or floating in a liquid. That is, smaller nanoparticles disperse more easily than larger nanoparticles.
In general, the Group IV nanoparticles are transferred into the colloidal dispersion under a vacuum, or else an inert substantially oxygen-free environment. In addition, the use of particle dispersal methods and equipment such as sonication, high shear mixers, and high pressure/high shear homogenizers may be used to facilitate dispersion of the nanoparticles in a selected solvent or mixture of solvents.
Examples of solvents include alcohols, aldehydes, ketones, carboxylic acids, esters, amines, organosiloxanes, halogenated hydrocarbons, and other hydrocarbon solvents. In addition, the solvents may be mixed in order to optimize physical characteristics such as viscosity, density, polarity, etc.
In addition, in order to better disperse the Group IV nanoparticles in the colloidal dispersion, nanoparticle capping groups may be formed with the addition of organic compounds, such as alcohols, aldehydes, ketones, carboxylic acids, esters, and amines, as well as organosiloxanes. Alternatively, capping groups may be added in-situ by the addition of gases into the plasma chamber. These capping groups may be subsequently removed during the sintering process, or in a lower temperature pre-heat just before the sintering process.
For example, bulky capping agents suitable for use in the preparation of capped Group IV semiconductor nanoparticles include C4-C8 branched alcohols, cyclic alcohols, aldehydes, and ketones, such as tertiary-butanol, isobutanol, cyclohexanol, methyl-cyclohexanol, butanal, isobutanal, cyclohexanone, and oraganosiloxanes, such as methoxy(tris(trimethylsilyl)silane)(MTTMSS), tris(trimethylsilyl)silane (TTMSS), decamethyltetrasiloxane (DMTS), and trimethylmethoxysilane (TMOS).
Once formulated, the colloidal dispersion may be applied to a substrate and subjected to a heat treatment in order to sinter the Group IV nanoparticles into a densified conductive film. Examples of application methods include, but are not limited to, roll coating, slot die coating, gravure printing, flexographic drum printing, and ink jet printing methods, etc.
In one particular configuration, in an advantageous manner, the colloidal dispersion may be applied in patterned regions by an inkjet printer. Inkjet printers generally are configured with a piezoelectric material in an ink-filled chamber behind each nozzle. When a voltage is applied, the crystal changes shape or size, which generates a pressure pulse in the fluid forcing a droplet of ink from the nozzle.
In the case of Group IV nanoparticles, the colloidal dispersions should disperse well in the selected solvents and should easily filter though a 500 nm filter (more preferably through a 300 nm filter), in order to optimize printability.
Additionally, various configurations of doped Group IV nanoparticle colloidal dispersions can be formulated by the selective blending of doped, undoped, and/or differently doped Group IV nanoparticles. For example, various formulations of blended Group IV nanoparticle colloidal dispersions can be prepared in which the dopant level for a specific layer of a junction is formulated by blending doped and undoped Group IV nanoparticles to achieve the requirements for that layer. Alternatively, the blended Group IV nanoparticle colloidal dispersions may be used to compensate for substrate defects, such as the passivation of oxygen atoms in order to reduce undesirable energy states.
Referring now to
In general, a Group IV precursor gas, a set of inert gases, as well as a dopant gas (if required), are generally flowed through the annular channel and ignited in a reaction zone between a set of electrodes. An RF (radiofrequency) signal is then applied to the powered electrode in order to strike a plasma and subsequently dissociate and form Group IV nanoparticles which are generally collected downstream of the reaction zone.
In general, the concentric flow-through plasma reactor is configured with an outer tube 3214 and an inner tube 3215 concentrically positioned along a longitudinal axis with respect outer tube 3214. An annular channel 3227, defined by the area inside outer tube 3214 and outside inner tube 3215, may be sealed from the ambient atmosphere by inlet port flange 3218 a and outlet port flange 3218 b.
A plasma reaction zone (i.e., the zone in which the nanoparticles are created) is defined as an area inside annular channel 3227 between a tube-shaped outer electrode 3225 (positioned outside outer tube 3214) and a tube-shaped central electrode 3224 (central electrode tube), positioned concentrically along a longitudinal axis with respect to tube-shaped outer electrode 3225 (outer electrode tube), and further positioned inside inner tube 3215. Typically, the precursor gas or gases may be introduced into annular channel 3227 along flow path 3211 from a precursor gas source in fluid communication with an inlet port (not shown) on inlet port flange 3218 a. Similarly, nanoparticles produced within the plasma reactor chamber may exit through an exit port (not shown) on outlet port flange 3218 b into a nanoparticle collection chamber (not shown). Alternatively, the nanoparticles may be collected on a substrate or grid housed in the plasma reactor chamber.
In general, tube-shaped central electrode 3224 is configured to extend along a substantial portion of the plasma reactor. In additional, tube-shaped central electrode 3224 and tube-shaped outer electrode 3225 may be made of any sufficiently electrically conductive materials, including metals, such as copper or stainless steel.
Outer tube 3214 may be further shielded from the plasma by outer tube dielectric layer 3209 disposed on the inner surface of outer tube 3214. In general, outer tube 3214 may be any material that does not substantially interfere with the generated plasma, such as a dielectric material. In an embodiment, outer tube 3214 and outer tube dielectric layer 3209 are comprised of different materials, such as different dielectric materials. In an alternate embodiment, outer tube 3214 and outer tube dielectric layer 3209 are the same physical structure and material, such as quartz. Likewise, inner tube 3215 may be further shielded from the plasma by inner tube dielectric layer 3213. Examples of dielectric materials include, but are not limited to, quartz, sapphire, fumed silica, polycarbonate alumina, silicon nitride, silicon carbide, and borosilicate.
In general, plasma reactor conditions during nanoparticle synthesis have a significant impact on the properties and structure of produced nanoparticles. During the nucleation and growth stages of particles synthesis, each individual particle will have a temperature that will depend on the applied plasma power, reactor pressure, and gas composition and reactor geometry.
Typically, Group IV nanoparticles produced below a certain temperature will be amorphous, whereas particles produced such that they are hotter during synthesis are crystalline. In addition to crystallinity, particle temperature during synthesis will affect dopant activation. Doped nanoparticles that were exposed to higher temperature during synthesis will have dopants that are electrically active, as opposed to the electrically inactive dopants in the low-temperature produced particles. By controlling the plasma synthesis parameters of doped Group IV particles it is possible to modify their electrical and structural properties.
A variety of dopant gases are possible for use for creating doped Group IV nanoparticles. Examples of Group IV precursor gases include silane, disilane, germane, digermane, halide analogs, etc. Examples of n-type dopant gases include phosphine, arsine, etc. Examples of p-type dopant gases include boron diflouride, trimethyl borane, diborane, etc. Examples of the inert gases include argon, helium, neon, etc.
In one configuration, Group IV nanoparticles may be produced in an RF plasma at a total pressure of no greater than about 25 Torr (e.g., about 3 Torr to about 25 Torr). Typical flow rates for the semiconductor precursor gas may be about 2 standard cubic centimeters (sccm) to about 30 seem, while the flow rate for a dopant gas may be about 60 sccm to about 150 seem (e.g., about 0.1% of dopant in inert buffer gas such as Ar). Typically, the ratio of semiconductor precursor gas molecules to dopant gas molecules in the plasma reaction is from about 25:1 to about 1000:1.
The frequency of the RF power source used to ignite and/or sustain the RF plasma may vary within the RF range from 300 kHz to 300 GHz. Typically, however, a frequency of 13.56 MHz will be employed because this is the major frequency used in the radiofrequency plasma processing industry. Typical radiofrequency powers range from about 30 W to about 300 W.
The concentration of dopants in the Group IV nanoparticles may vary depending on factors such as dopant gas concentration and flow rate. For example, silane or germane may be used as the Group IV precursor gas and phosphine may be used as the dopant gas in the present methods to produce phosphorous-doped silicon nanoparticles. However, the present radiofrequency plasma-based methods are capable of producing Group IV nanoparticles having dopant concentrations approaching the solubility limit of the dopant in a crystalline semiconductor.
For example, in the case of crystalline Si nanoparticles, the present methods can provide p-type (e.g., phosphorous or arsenic) doping levels of at least about 2%. This includes embodiments wherein the p-type dopant level in the silicon nanoparticles is between about 0.01% and about 5%.
Similarly, the present methods can provide n-type silicon nanoparticles with doping levels of at least about 1%. This includes embodiments wherein the n-type dopant level is between about 0.01% and about 5%.
In one configuration, doped Group IV nanoparticles may be formed as crystalline nanoparticles with activated dopants. This configuration is advantageous because it may eliminate the need for a high-temperature dopant activation step, thereby rendering the method less expensive, less time-consuming and more efficient.
A set of p-type and intrinsic nanoparticles were prepared in an RF reactor substantially similar to that described for
For the intrinsic nanoparticles, a 10% silane gas in argon was used at a flow rate of 22.5 sccm. As before, the pressure in the RF plasma reactor chamber was maintained at about 10 Torr.
The resulting nanoparticle size distribution for the p-type silicon nanoparticles was 5.2 nm+/−1.0 nm, while the size distribution for the intrinsic silicon nanoparticles was 5.7 nm+/−1.2 nm.
Careful inspection of transmission electron microscope (TEM) images of the p-type nanoparticles versus the intrinsic nanoparticles show the p-type nanoparticles tending to be of more irregular shape than the undoped particles. It is believed that is irregular shape reflects the in-situ incorporation of boron dopant atoms into the nanoparticle.
Colloidal dispersions, made form the p-type and intrinsic nanoparticles of Example 1, were each deposited on a 1″×1″×0.04″ quartz substrates. Prior to deposition, the quartz substrate was cleaned using an argon plasma.
Both colloidal dispersions were formulated as a 20 mg/ml solution in chloroform/chlorobenzene (4:1 v/v), which was sonicated using a sonication horn at 35% power for 15 minutes. A sufficient volume of each colloidal dispersion was delivered to each substrate respectively in order to effectively cover the quartz substrate surface. Porous compacts of between about 650 nm to about 700 nm thick were then formed by spin casting the colloidal dispersions on each substrate at 1000 rpm for 60 seconds.
The substrates were then subjected to a conditioning step at 100° C. for 15 minutes at a pressure of between about 5×10−6 to about 7×10−6 Torr using a 15 minute ramp. This was followed by a heat treatment at a temperature of 765° C., and a pressure of between about 5×10−6 Torr to about 7×10−6 Torr for 6 minutes, after a 15-minute ramp to the targeted fabrication temperature. Consequently, densified films formed were between about 300 nm to about 350 nm thick.
Referring now to
For a depth of up to about 0.3 μm, level of boron in the p-type nanoparticle densified film is about 5×1019 atoms/cc, while the level of boron in the intrinsic nanoparticle densified film is about 5×1017 atoms/cc. In general, the substantial difference in order of magnitude (about 2×) between levels for the p-type densified film versus the instrinsic densified film demonstrates that the boron atoms were generally incorporated into the p-type nanoparticles. That is, the boron atoms were substantially retained during the thermal processing of the p-type nanoparticles.
Referring now to
A set of n-type nanoparticle colloidal dispersions were used in the fabrication of n-type nanoparticle films. In general, the steps for the preparation of each 1″×1″×0.04″ quartz substrate through the preparation of the film were the same as for the preparation of the intrinsic nanoparticle film and p-type film of Example 2, above.
After depositing the intrinsic nanoparticle film on a first quartz substrate and the n-type nanoparticle on a second quartz substrate, each between about 500 nm to about 550 nm in thickness, both quartz substrates were baked in a conditioning step at 100° C. for 30 minutes in an inert atmosphere.
This was followed by a heat treatment in a rapid thermal processing (RTP) apparatus under argon atmosphere using a process profile described as follows:
1) Ramp to 800° C. in 30 seconds, hold for 30 seconds.
2) Ramp to 1100° C. in 5 seconds, followed by ramp back to 800° C. in 5 seconds, and hold for 30 seconds at 800° C.
3) Repeat step 2 for four additional cycles.
4) Ramp to ambient in 30 seconds.
Consequently, a set of densified films formed were between about 215 nm to about 250 nm thick.
Referring now to
Initially, the amorphous n-type nanoparticles (608) and the crystalline n-type nanoparticles were first manufactured, and then dispersed in chloroform/chlorobenzene solution (4:1 v/v ratio) with a concentration of 20 mg of powder per one mL of solvent. Each solution was then agitated using an ultrasonic horn for 15 minutes using a power setting of 35%.
A set of eight films (four amorphous n-type nanoparticle films and four crystalline n-type nanoparticle films) was then created by depositing approximately 300-350 μL of each solution onto eight 1×1 inch square quartz substrates (each substrate corresponding to a particular conductivity reading for either amorphous or crystalline n-type nanoparticles) and spun at 1000 rpm for 60 seconds. Additional solvent drying was performed by placing all the substrates on a hotplate held at 100° C. for 30 minutes.
The substrates were then placed face down on a silicon carrier wafer and heated to temperatures (700° C., 800° C., 900° C., 1000° C.) for 30 seconds in a rapid thermal processor (RTP), in an Ar ambient environment at about 30° C./second. 1500 Å thick aluminum lines were then evaporated onto the substrates with variable spacing.
The conductivity of the film was then measured by applying a voltage between the aluminum lines and measuring the current carried by the Si film across the gap between the two aluminum lines.
For both of the amorphous n-type nanoparticle film (608) and the crystalline n-type nanoparticle film (609), conductivity increases as temperature increases, corresponding to the increasing necking (and hence density) of the nanoparticle layer. At about 900° C., both plots merge, corresponding to the dopant activation, and an increase in crystallinity of the amorphous n-type nanoparticles film (608). That is, from a physical perspective, both the amorphous n-type nanoparticle film (608) and the crystalline n-type nanoparticle film (606) are electrically substantially the same.
Referring now to
In general, particle sizes are measured by comparing the diameter of individual particles from transmission electron microscopy (TEM) images. The average particle size and size distribution may then be calculated by using histograms and standard data processing algorithms. Consequently, a narrow distribution of nanoparticle sizes (here about 13 nm) may be obtained using a process as described in
Referring now to
SAD is generally a crystallographic experimental technique that can be performed inside a transmission electron microscope (TEM). In a TEM, a thin crystalline specimen (here a Si nanoparticle) is subjected to a parallel beam of high-energy electrons. Because the wavelength of high-energy electrons is a fraction of a nanometer, and the spacings between atoms in a solid is only slightly larger, the atoms act as a diffraction grating to the electrons, a portion of which are diffracted to particular angles, determined by the crystal structure of the sample. Since degree of crystallinity is often determined in comparison to a non-crystalline structure, arbitrary units are often used. In general, as the SAD measurements are plotted, the sharper the peak, the greater the crystallinity. A common measure of the peak quality is FWHM (Full Width at Half Maximum), or the horizontal width of a peak at have its intensity height from a plot base.
Here, in comparison to an amorphous Si n-type nanoparticle with a FWHM of about 0.6, the crystalline Si n-type nanoparticle has a FWHM of about 1.8. That is, about 3× greater. Therefore, in an advantageous manner, by using the process as described in
Referring now to
Generally, dynamic light scattering transmits a laser beam through a colloidal dispersion. Consequently, the suspended particles scatter some of the light in all directions. When the particles are generally very small compared with the wavelength of the light, the intensity of the scattered light is uniform in all directions. Thus, it is possible to observe time-dependent fluctuations in the scattered intensity using a suitable detector such as a photomultiplier capable of operating in photon counting mode.
Generally, these fluctuations arise from random thermal (Brownian) particle motion which caused the distance between particles to be varying. Constructive and destructive interference of light scattered by neighboring particles within the illuminated zone gives rise to the intensity fluctuation at the detector plane which, as it arises from particle motion, contains information about this motion.
Analysis of the time dependence of the intensity fluctuation can therefore yield the diffusion coefficient of the particles from which, knowing the viscosity of the medium, the hydrodynamic radius or diameter of the particles can be calculated.
Here, a first colloidal dispersion 906 is loaded with intrinsic Si nanoparticles. A second colloidal dispersion 908 is loaded with n-type Si nanoparticles. And a third colloidal dispersion 910 is loaded with p-type Si nanoparticles. The ratio of silicon nanoparticles to solvent for all three colloidal dispersions was 20 mg/ml.
The colloidal dispersions were prepared using pure IBA (iso-butanol) solvent. Particles and solvent were mixed and the mixture was stirred for 30 min by stirring at about 100° C. followed by about a 15 min ultrasonic horn sonication at about 15% power. The colloidal dispersions were further filtered through 5 micron Nylon filter.
Consequently, in comparison to first colloidal dispersion 906 with intrinsic Si nanoparticles (with an agglomerate size centering at about 1000 nm), the second colloidal dispersion 908 with n-type Si nanoparticles and the third colloidal dispersion 910 with p-type Si nanoparticles each have agglomerate size centering at much smaller colloidal dispersions. That is, the second colloidal dispersion 908 has agglomerate size centering at about 200 nm, while the third colloidal dispersion 910 has agglomerate size centering at about 100 nm.
Consequently, doped Group IV nanoparticles with small agglomerate sizes, and thus small individual particle diameters, can be made using the method as described in
Referring now to
In general, most nanoparticle application techniques, such as inkjet printing, benefit from colloidal dispersions that behave as Newtonian fluids. A Newtonian fluid is generally a fluid that flows like water. That is, its viscosity is substantially the same at a given temperature and pressure regardless of the forces acting on it.
Here, a set of amorphous n-type Si nanoparticle colloidal dispersions were produced, in accordance with the present invention. A first colloidal dispersion was made at 30 mg of amorphous Si nanoparticles per ml of solvent. A second colloidal dispersion was made of amorphous Si nanoparticles at 40 mg of Si nanoparticles per ml of solvent. And a third colloidal dispersion was made of amorphous Si nanoparticles at 50 mg of nanoparticles per ml of solvent. For all of the colloidal dispersions, the solvent used was cyclohexanol/cyclohexanone mixtures (CHOH/CHO 1:1).
The colloidal dispersions were then prepared inside an N2 glove box. About 1205 mg of the n-type type amorphous Si nanoparticles was first dispersed in 12 mL of the dispersant/primary solvent, and then distilled cyclohexanol (CHOH), by heating in 40 mL glass vial for 30 min at 82 C with magnetic stirring (IKA hotplate setting 100 C, stir setting 1000, ⅛″ stir bar).
This suspension (100 mg Si/mL) was processed on a high shear mixer (15,000 RPM, 5 min, 10 mm probe). 7.9 mL of the 100 mg Si/mL suspension was then combined with 7.9 mL of the co-solvent, distilled cyclohexanone (CHO), to form the third colloidal dispersion of 50 mg/mL, CHOH/CHO 1:1. This third colloidal dispersion was processed on the high-shear mixed at 1000 RPM for 5 min. to complete the mixing, then filtered through 41 um Nylon mesh (25 mm diameter, Millipore), followed by filtration through 11 um Nylon and 5 um Nylon 25 mm syringe-type filters.
This pre-filtered 50 mg/mL colloidal dispersion was then used to prepare lower loadings (40 mg/mL and 30 mg/mL) by dilution with equal volumes of CHOH and CHO. All three colloidal dispersions were filtered to 0.45 um Nylon (syringe-type filter) and measured for viscosity. Viscosities were measured at 40° C. on a Brookfield LV DV-I+ viscometer using the CPE40 disk. Viscosity is generally calculated from the torque exerted on a rotating disk by a film of the colloidal dispersion between the disk and stationary cup.
For each colloidal dispersion, 0.5 mL was first loaded into a cup installed on the viscometer, and allowed to equilibrate for 15 minutes prior to taking readings. Viscosities were recorded with the disk rotating at 4, 10, and 20 RPM, in order of RPM (lowest RPM first, highest RPM last).
As can be seen, all of the colloidal dispersions maintained substantially the same viscosity as the shear force was increased from about 4 to about 20 RPM. Consequently, Group IV nanoparticles manufactured using the method as described in
For the purposes of this disclosure and unless otherwise specified, "a" or "an" means "one or more." All patents, applications, references and publications cited herein are incorporated by reference in their entirety to the same extent as if they were individually incorporated by reference.
The invention has been described with reference to various specific and illustrative embodiments. However, it should be understood that many variations and modifications may be made while remaining within the spirit and scope of the invention. Advantages of the invention include the production of low cost and efficient junctions for electrical devices, such as solar cells. Additional advantages include the production stable colloidal dispersions which can be deposited on a substrate, as well as the ability to print a pattern in a single step.
Having disclosed exemplary embodiments and the best mode, modifications and variations may be made to the disclosed embodiments while remaining within the subject and spirit of the invention as defined by the following claims.
|Cited Patent
|Filing date
|Publication date
|Jan 6, 1976
|Aug 9, 1977
|General Electric Company
|Polycrystalline silicon articles by sintering
|Oct 1, 1979
|Apr 21, 1981
|Kubacki Ronald M
|Thin film deposition apparatus using an RF glow discharge
|Jun 17, 1980
|May 18, 1982
|Siemens Aktiengesellschaft
|Method of producing plate- or tape-shaped silicon crystal bodies having crystalline pillar-like structures therein, equivalent to _crystalline columnar structures, for large surface solar cells
|Dec 29, 1981
|Oct 4, 1983
|Siemens Aktiengesellschaft
|Method for producing films of sintered polycrystalline silicon
|Sep 26, 1988
|Oct 24, 1989
|Oy Nokia Ab
|Method of growing GaAs films on Si or GaAs substrates using ale
|Nov 13, 1987
|Mar 20, 1990
|Kopin Corporation
|III-V Semiconductor growth initiation on silicon using TMG and TEG
|May 4, 1988
|Oct 15, 1991
|Astropower, Inc.
|Deposited-silicon film solar cell
|Feb 20, 1991
|Aug 25, 1992
|Ford Microelectronics
|Growth of P type Group III-V compound semiconductor on Group IV semiconductor substrate
|Nov 22, 1991
|Nov 16, 1993
|The Regents Of The University Of California
|Low temperature thin films formed from nanocrystal precursors
|Oct 9, 1992
|Aug 9, 1994
|Astropower, Inc.
|Columnar-grained polycrystalline solar cell and process of manufacture
|Nov 18, 1994
|Dec 19, 1995
|Japan Metals & Chemicals Co., Ltd.
|Apparatus for producing high-purity metallic chromium
|Jan 3, 1995
|Sep 17, 1996
|Texas Instruments Incorporated
|Method of making optically fused semiconductor powder for solar cells
|Mar 24, 1994
|Nov 19, 1996
|Starfire Electronic Development & Marketing, Ltd.
|Group IV semiconductor thin films formed at low temperature using nanocrystal precursors
|Mar 2, 1998
|Aug 29, 2000
|Astropower, Inc.
|Columnar-grained polycrystalline solar cell substrate and improved method of manufacture
|Nov 16, 2000
|Feb 4, 2003
|General Electric Company
|Light-emitting device with organic layer doped with photoluminescent material
|Nov 23, 1999
|May 6, 2003
|Fraunhofer-Gesellscahft Zur Forderung Der Angewandten Forschung E.V.
|Thin-film solar array system and method for producing the same
|Jun 8, 2000
|Nov 9, 2004
|Massachusetts Institute Of Technology
|Methods for manufacturing bioelectronic devices
|Sep 4, 2003
|Apr 12, 2005
|Nanosys, Inc.
|Nanostructure and nanocomposite based compositions and photovoltaic devices
|Dec 29, 2003
|Oct 4, 2005
|Mattson Technology, Inc.
|Pulsed processing semiconductor heating methods using combinations of heating sources
|Oct 5, 2000
|Jan 10, 2006
|Commonwealth Scientific And Industrial Research Organisation
|Three dimensional array films
|Oct 22, 2003
|Jan 31, 2006
|Amberwave Systems Corporation
|Gate material for semiconductor device fabrication
|Feb 22, 2007
|May 20, 2008
|Eastman Kodak Company
|Ex-situ doped semiconductor transport layer
|Jun 15, 2001
|Dec 19, 2002
|Kizilyalli Isik C.
|Formation of silicon on insulator (SOI) devices as add-on modules for system on a chip processing
|Mar 28, 2002
|Jan 2, 2003
|Korgel Brian A.
|Light-emitting nanoparticles and method of making same
|Mar 18, 2003
|Dec 11, 2003
|Alivisatos A. Paul
|Semiconductor-nanocrystal/conjugated polymer thin films
|Oct 11, 2002
|Jan 1, 2004
|Cho Byong Kwon
|Plasma reactor having regions of active and passive electric field
|Jul 8, 2003
|Jan 13, 2005
|Klaus Kunze
|Compositions and methods for forming a semiconducting and/or silicon-containing film, and structures formed therefrom
|Apr 21, 2004
|May 19, 2005
|Sony Corporation
|Semiconductor thin film and method of fabricating semiconductor thin film, apparatus for fabricating single crystal semiconductor thin film, and method of fabricating single crystal thin film, single crystal thin film substrate, and semiconductor device
|Feb 11, 2004
|Jun 16, 2005
|Nanosys, Inc.
|Nanostructure and nanocomposite based compositions and photovoltaic devices
|Feb 19, 2004
|Aug 25, 2005
|Nanosolar, Inc.
|Solution-based fabrication of photovoltaic cell
|Jan 24, 2005
|Sep 22, 2005
|Plasmasol Corporation
|Capillary-in-ring electrode gas discharge generator for producing a weakly ionized gas and method for using the same
|May 4, 2005
|Mar 2, 2006
|California Institute Of Technology
|System and method for making nanoparticles using atmospheric-pressure plasma microreactor
|Jun 17, 2005
|Mar 9, 2006
|Uwe Kortshagen
|Process and apparatus for forming nanoparticles using radiofrequency plasmas
|Mar 10, 2006
|Jul 13, 2006
|Klaus Kunze
|Compositions and methods for forming a semiconducting and/or silicon-containing film, and structures formed therefrom
|Oct 30, 2003
|Oct 26, 2006
|Hewlett-Packard Development Company, L.P.
|Electronic components
|Mar 15, 2007
|Sep 20, 2007
|University Of Central Florida Research Foundation, Inc.
|Deposition of crystalline layers on polymer substrates using nanoparticles and laser nanoforming
|Apr 27, 2006
|Nov 1, 2007
|Ranish Joseph M
|Substrate processing chamber with dielectric barrier discharge lamp assembly
|Aug 21, 2007
|Jun 26, 2008
|Maxim Kelman
|Group iv nanoparticles and films thereof
|Jan 2, 2008
|Jul 3, 2008
|Henry Hieslmair
|Silicon/germanium particle inks, doped particles, printing and processes for semiconductor applications
|Jan 2, 2008
|Jul 3, 2008
|Henry Hieslmair
|Silicon/germanium oxide particle inks, inkjet printing and processes for doping semiconductor substrates
|Jun 27, 2007
|Jan 1, 2009
|Leland Scott Swanson
|Thermally enhanced semiconductor devices
|Oct 19, 2007
|Feb 26, 2009
|Maxim Kelman
|Method for fabrication of semiconductor thin films using flash lamp processing
|Jan 24, 1997
|Mar 23, 1999
|Astropower, Inc.
|Columnar-grained polycrystalline solar cell and process of manufacture
|Sep 16, 1999
|Mar 21, 2001
|Abb Research Ltd.
|Treatment of hydrogen sulfide-containing gaseous compositions
|Aug 15, 2003
|Jul 6, 2005
|JSR Corporation
|Composition for forming silicon film and method for forming silicon film
|Title not available
|Title not available
|Nov 24, 1998
|Jun 3, 1999
|State Of Israel - Ministry Of Defense Rafael - Armament Development Authority
|Modular dielectric barrier discharge device for pollution abatement
|Sep 4, 2003
|Mar 18, 2004
|Nanosys, Inc.
|Nanostructure and nanocomposite based compositions and photovoltaic devices
|Jan 30, 2004
|Aug 12, 2004
|University Of Cape Town
|A thin film semiconductor device and method of manufacturing a thin film semiconductor device
|Jul 28, 2005
|Sep 14, 2006
|Evergreen Solar, Inc.
|Method for preparing group iv nanocrystals with chemically accessible surfaces
|Sep 25, 2007
|Apr 3, 2008
|Innovalight, Inc.
|Semiconductor devices and methods from group iv nanoparticle materials
|Dec 4, 2007
|Jun 19, 2008
|Innovalight, Inc.
|Methods for creating a densified group iv semiconductor nanoparticle thin film
|Dec 12, 2007
|Jun 26, 2008
|Innovalight, Inc.
|Methods of forming an epitaxial layer on a group iv semiconductor substrate
|"Crystalline Silicon Thin-Film Solar Cells," a Product Information Sheet published by Fraunhofer Institut Solare Energie Systeme, Oct. 2001, pp. 1-6.
|A. N. Goldstein et al, "Melting in Semiconductor Nanocrystals," Science, vol. 256, No. 5062, Jun. 5, 1992, pp. 1425-1427.
|A.N. Goldstein, "The Melting of Silicon Nanocrystals: Submicron Thin-film Structures Derived from Nanocrystal Precursors", Applied Physics A, V. 62 (1996) pp. 33-37.
|Ai et al., "Preparation and characterization of Si sheets by renewed SSP technique," Journal of Crystal Growth, vol. 270 (2004), pp. 446-454.
|Bet et al., "Laser Forming of Silicon Films Using Nanoparticle Precursor" Journal of Electronic Materials, vol. 35, No. 5 (2006), pp. 993-1004.
|Britton, D.T. and M. Härting, "Printed Nanoparticulate Composites for Silicon Thick Film Electronics," Pure and Applied Chemistry, vol. 78, No. 9 (2006), 1723-1739.
|Christiansen, T. et al., "Standard Operating Procedure: Spin-on-Glass Surface Level Characterization," Jun. 8, 2000.
|D.V. Melnikov et al., "Quantum Confinement in Phosphorus-Doped Silicon Nanocrystals", Physical Review Letters, vol. 92 (2004), pp. 046802-1-046802-4.
|F. Ercolessi et al., "Melting of Small Gold Particles: Mechanism and Size Effects," Physical Review Letters, vol. 66, No. 7, Feb. 18, 1991, pp. 911-914; published by The American Physical Society.
|G. Samdani et al., "Tiny Particles Aim for Big Markets;" Chemical Eng., Aug. 1994, pp. 35-39.
|Ghosh et al., "Theory of the electrical and photovoltaic properties of polycrystalline silicon" Journal of Applied Physics, vol. 51, No. 1 (1980) pp. 446-454.
|Grovenor, C R M, "Grain boundaries in semiconductors," J. Phys. C: Solid State Phys., vol. 18 (1985), pp. 4079-4119.
|I. Ifuku et al., "Fabrication of Nanocrystalline Silicon with Small Spread of Particle Size by Pulsed Gas Plasma", Japanese Journal of Applied Physics, vol. 36 (1997), pp. 4031-4034.
|International Search Report and Written Opinion for PCT/US2007/076549, mailed Jul. 25, 2008.
|International Search Report and Written Opinion for PCT/US2007/087205, mailed May 28, 2008.
|International Search Report and Written Opinion for PCT/US2008/062182 dated Nov. 4, 2008.
|International Search Report for PCT/IB2004/000221 (WO 2004/068536 A2), mailed Aug. 30, 2004.
|International Search Report for PCT/US2007/070134, mailed Aug. 11, 2008.
|International Search Report for PCT/US2007/077765, mailed Feb. 1, 2008.
|International Search Report for PCT/US2008/059038, mailed Jul. 18, 2008.
|International Search Report/Written Opinion for PCT/US2007/086376, mailed May 28, 2008.
|International Search Report/Written Opinion for PCT/US2007/086432, mailed May 28, 2008.
|J. R. Heath et al., "Nanocrystal Seeding: A low temperature route to polycrystalline Si films," Applied Phys. Lett. vol. 64, No. 26, Jun. 27, 1994, pp. 3569-3571.
|Jang, W. I. et al., "Fabrication of MEMS Devices by Using Anhydrous HF Gas-phase Etching with Alcoholic Vapor" J. Micromech. Microeng., vol. 12, 2002, pp. 297-306; published by IOP Publishing Ltd.
|Kubacki, R. M., "Low Temperature Plasma Deposition of Silicon Nitride to Produce Ultra-Reliable, High Performance, Low Cost Sealed Chip-on-Board (SCOB) Assemblies" IEEE Transactions on Components, Packaging, and Manufacturing Technology-Part A, vol. 18, No. 3, Sep. 1995, pp. 471-477.
|Kubacki, R. M., "Low Temperature Plasma Deposition of Silicon Nitride to Produce Ultra-Reliable, High Performance, Low Cost Sealed Chip-on-Board (SCOB) Assemblies" IEEE Transactions on Components, Packaging, and Manufacturing Technology—Part A, vol. 18, No. 3, Sep. 1995, pp. 471-477.
|Lee, J. H. et al, "Gas-Phase Etching of Sacrificial Oxides Using Anhydrous HF and CH3OH," 10th Annual Internat'l Workshop on MEMS, IEEE, Jan. 26-30, 1997, pp. 448-453.
|Liang et al, "Characterisation of direct epitaxial silicon thin film solar cells on a low-cost substrate," Solar Energy Materials & Solar Cells, vol. 80 (2003), pp. 181-193.
|M. Wautelet, "Estimation of the variation of the melting temperature with the size of small particles, on the basis of a surface-phonon instability model,:" J. Phys. D: Appl Phys, vol. 24 (1991), pp. 343-346; published by IOP Publishing Ltd.
|Mataré, H.F., "Carrier transport at grain boundaries in semiconductors," Journal of Applied Physics, vol. 56, No. 10 (1984), pp. 2605-2631.
|McCann et al, "A Review of Thin Film Crystalline Silicon for Solar Cell Applications. Part 1: Native Substrates," Solar Energy Materials and Solar Cells, vol. 68, No. 2 (May 2001), pp. 135-171.
|Möller et al., "Sintering of Ultrafine Silicon Powder," Journal of the American Ceramic Society, vol. 68, No. 6 (1985), pp. 320-325.
|Office Action in U.S. Appl. No. 11/875,261 dated Apr. 16, 2009.
|Office Action issued in U.S. Appl. No. 11/775,509 mailed Oct. 15, 2009, received Oct. 19, 2009.
|Office Action issued in U.S. Appl. No. 11/875,261 mailed Oct. 14, 2009, received Oct. 19, 2009.
|Orfert, M. et al., "Plasma Enhanced Chemical Vapor Deposition of SiN-films for Passivation of Three-Dimensional Substrates" Surface and Coatings Technology 116-119, 1999, pp. 622-628; published by Elsevier Science S.A.
|Ph. Buffat et al., "Side Effect on the Melting Temperature of Gold Particles," Physical Review A, vol. 13, No. 6, Jun. 1976.
|Q Ban et al., "Study on Preparation Technology of Polycrystalline Silicon Thin Film Solar Cells Based on SSP Substrate", Acta Energiae Solaris Sinica, vol. 25, No. 1 (Feb. 2004), pp. 95-98.
|Q. Ban, et al., "Substrate Materials for Poly-CSiTF Solar Cells: Optimization of Silicon Sheet from Powder", Acta Metallurgica Sinica, vol. 18, No. 3 (Jun. 2005), pp. 184-188.
|R. S. Berry et al., "Melting of Clusters and Melting," Physical Review A, vol. 30, No. 2, Aug. 1984; published by The American Physical Society.
|Schmid, P. et al, "Plasma deposition of Si-N and Si-O passivation layers on three-dimensional sensor devices" Surface and Coating Technology 98, 1998, pp. 1510-1517; published by Elsevier Science S.A.
|T. Shiga et al., "Photovoltaic performance and stability of CdTe/polymeric hybrid solar cells using a C60 buffer layer," Solar Energy Materials and Solar Cells, vol. 90, No. 12, (Jan. 2006), pp. 1849-1858; published by Elsevier Science Publishers, Amsterdam, NL.
|Y.H. Tang et al., "Microstructure and Filed-Emission Characteristics of Boron-Doped SI Nanoparticle Chains", Applied Physics Letters, vol. 79 (2001), pp. 1673-1675.
|Yang et al., "Effect of pressure on melting temperature of silicon," Journal of Physics: Condensed Matter, vol. 15 (2003), pp. 4961-4965.
|Citing Patent
|Filing date
|Publication date
|Aug 3, 2007
|Sep 27, 2011
|Sumitomo Electric Industries, Ltd.
|Method for manufacturing electronic circuit component
|May 17, 2012
|Apr 2, 2013
|Nanogram Corporation
|Solar cell structures, photovoltaic panels and corresponding processes
|Feb 13, 2012
|Aug 12, 2014
|Sunpower Corporation
|Method of forming emitters for a back-contact solar cell
|Dec 22, 2011
|Sep 2, 2014
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|Fabricating solar cells with silicon nanoparticles
|Feb 15, 2008
|Oct 7, 2014
|Nanogram Corporation
|Solar cell structures, photovoltaic panels and corresponding processes
|Apr 6, 2011
|Dec 2, 2014
|Thin Film Electronics Asa
|Epitaxial structures and methods of forming the same
|Jun 11, 2014
|Dec 16, 2014
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|May 23, 2011
|Dec 16, 2014
|Nanogram Corporation
|Silicon substrates with doped surface contacts formed from doped silicon inks and corresponding processes
|Apr 8, 2013
|Apr 14, 2015
|Nanogram Corporation
|Silicon/germanium nanoparticles and inks having low metal contamination
|Nov 26, 2014
|Sep 29, 2015
|Sunpower Corporation
|Method of forming emitters for a back-contact solar cell
|Oct 31, 2012
|May 17, 2016
|Nanogram Corporation
|Solar cell structures, photovoltaic panels and corresponding processes
|Feb 14, 2014
|Jun 28, 2016
|Nanogram Corporation
|Silicon substrates with doped surface contacts formed from doped silicon based inks and corresponding processes
|May 20, 2014
|Oct 25, 2016
|Nanogram Corporation
|Printable inks with silicon/germanium based nanoparticles with high viscosity alcohol solvents
|Feb 15, 2008
|Aug 28, 2008
|Henry Hieslmair
|Solar cell structures, photovoltaic panels and corresponding processes
|Aug 3, 2007
|Jan 7, 2010
|Sumitomo Electric Industries, Ltd.
|Method for manufacturing electronic circuit component
|May 20, 2009
|Nov 25, 2010
|Uma Srinivasan
|Back contact solar cells with effective and efficient designs and corresponding patterning processes
|Nov 26, 2014
|Mar 26, 2015
|Bo Li
|Method of forming emitters for a back-contact solar cell
|U.S. Classification
|516/1, 428/546, 427/212
|International Classification
|Cooperative Classification
|European Classification
|Jan 10, 2008
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text:
Aluminium fan filters keeps the dust from your PC to enhance the cooling performance and longevity of the fan. Available for 12 & 14cm fans. Easy to fit.
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Amazon offering refurbished Kindle Fire at $140, for few hours
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It's safe to say Leonardo DiCaprio has no trouble meeting mates, but what about his mom? She can't just go around saying to everyone 'Hey, I'm Leonardo DiCaprio's mother, take me out.' So he does it for her.
|Leonardo DiCaprio Played Matchmaker For His Mom
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text: I have had 3G watchdog for a few weeks now. I have gone right thru a monthly cycle with it, Mine starts on the 26th of each month. So 3G will reset at midnight on the 25th. Now 3G states my total is 47.27MB Now, if I dial AT&T's data usage number I get Next Bill cycle 12/26/10 Data (MB 83.5 of 2048 Now I am running Advanced Task killer but 3G is NOT registered to be killed..It's black w/o a green star. What gives ?? I am running a 2.1 generic global ROM. It switches to H (HDSPA(sp?) instead of 3g. But my notification icon for 3G WD states I have a clear 3G signal. Is my ROM fooling with 3GWD ? Is the new H symbol and different channel skirting 3GWD's ability to count my bits ?


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University of Sheffield
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Program Description:
The Masters in Governance and Public Policy provides a fascinating insight into the challenges of governing in the twenty-first century.
At the heart of this program is a focus on the transition from 'government' to 'governance' and the implications this shift has for how we understand the capacity of the state, the role of politicians, the expectations of the public and the balance between rights and responsibilities when it comes to collective benefits. The transition from 'government' to 'governance' is also a feature of the international system, having begun with the League of Nations, progressed on to the United Nations and the International Financial Institutions such as the IMF, World Bank and World Trade Organisation.
The program is designed to test students through a range of teaching formats that include guest lectures and case study exercises. As a whole, it provides students with a number of conceptual tools and practical skills that will provide a strong basis for a career in the policy-making arena.
Accreditation:We are pleased to offer the Sheffield Scholarship 2016 to all US students commencing a Taught Masters programme in September 2016. The scholarships are: • £2,000 if your tuition fees are between £14,500 and £16,500 • £2,500 for each student paying fees of
International Student Requirements:Students whose first language is not English must have passed either the TOEFL internet-based test with a minimum of 88 (minimum of 22 in reading and writing, 21 in listening and 23 in speaking), IELTS with a minimum of 7.0 (with a minimum of 6 in essay writing), or Pearson Test of English - Academic, 61 overall (with 61 in writing).
Facts & Figures
Financial Aid: No
International Financial Aid: No
In State Tuition (per year): 12560 GBP