text:
|Publication number
|Publication type
|Application number
|Publication date
|Nov 25, 2003
|Filing date
|Aug 31, 2000
|Priority date
|Aug 31, 2000
|Fee status
|Publication number
|David H. Asher, Brian Lilly, Richard E. Kessler, Michael Bertone
|Original Assignee
|Hewlett-Packard Development Company, L.P.
|Export Citation
|BiBTeX, EndNote, RefMan
|Patent Citations (23), Non-Patent Citations (14), Referenced by (38), Classifications (6), Legal Events (9)
|External Links: USPTO, USPTO Assignment, Espacenet
This application relates to the following commonly assigned applications entitled:
"Apparatus And Method For Interfacing A High Speed Scan-Path With Slow-Speed Test Equipment," Ser. No. 09/653,642, filed Aug. 31, 2000, "Priority Rules For Reducing Network Message Routing Latency," Ser. No. 09/652,322, filed Aug. 31, 2000, "Scalable Directory Based Cache Coherence Protocol, " Ser. No. 09/652,703, Filed Aug. 31, 2000, "Scalable Efficient I/O Port Protocol," Ser. No. 09/652,391, filed Aug. 31, 2000, "Efficient Translation Lookaside Buffer Miss Processing In Computer Systems With A Large Range Of Page Sizes," Ser. No. 09/652,552, filed Aug. 31, 2000, "Fault Containment And Error Recovery Techniques In A Scalable Multiprocessor," Ser. No. 09/651,949, filed Aug. 31, 2000, "Speculative Directory Writes In A Directory Based Cache Coherent Nonuniform Memory Access Protocol," Ser. No. 09/652,834, filed Aug. 31, 2000, "Special Encoding Of Known Bad Data," Ser. No. 09/652,314, filed Aug. 31, 2000, "Broadcast Invalidate Scheme," Ser. No. 09/652,165, filed Aug. 31, 2000, "Mechanism To Track All Open Pages In A DRAM Memory System," Ser. No. 09/652,704, filed Aug. 31, 2000, "Programmable DRAM Address Mapping Mechanism," Ser. No. 09/653,093, filed Aug. 31, 2000, "Computer Architecture And System For Efficient Management Of Bi-Directional Bus," Ser. No. 09/652,323, filed Aug. 31, 2000, "An Efficient Address Interleaving With Simultaneous Multiple Locality Options," Ser. No. 09/652,452, filed Aug. 31, 2000, "A High Performance Way Allocation Strategy For A Multi-Way Associative Cache System," Ser. No. 09/653,092, filed Aug. 31, 2000, "Method And System For Absorbing Defects In High Performance Microprocessor With A Large N-Way Set Associative Cache," Ser. No. 09/651,948, filed Aug. 31, 2000, "Mechanism To Reorder Memory Read And Write Transactions For Reduced Latency And Increased Bandwidth," Ser. No. 09/653,094, filed Aug. 31, 2000, "System For Minimizing Memory Bank Conflicts In A Computer System," Ser. No. 09/652,325, filed Aug. 31, 2000, "Computer Resource Management And Allocation System," Ser. No. 09/651,945, filed Aug. 31, 2000, "Input Data Recovery Scheme," Ser. No. 09/653,643, filed Aug. 31, 2000, "Fast Lane Prefetching," Ser. No. 09/652,451, filed Aug. 31, 2000, "Mechanism For Synchronizing Multiple Skewed Source-Synchronous Data Channels With Automatic Initialization Feature," Ser. No. 09/652,480, filed Aug. 31, 2000, and "Mechanism To Control The Allocation Of An N-Source Shared Buffer," Ser. No. 09/651,924, filed Aug. 31, 2000, and "Chaining Directory Reads And Writes To Reduce DRAM Bandwidth In A Directory Based CC-NUMA Protocol," Ser. No. 09/652,315, filed Aug. 31, 2000, all of which are incorporated by reference herein.
Not applicable.
1. Field of the Invention
The present invention generally relates to reducing latency and directory writes in a multi-processor system. More particularly, the invention relates to reducing latency in a directory-based, multi-processor system. Still more particularly, the invention relates to eliminating directory write operations whenever possible in a directory-based coherence protocol.
2. Background of the Invention
Computer systems typically include one or more processors, memory, and many other devices. Often, the contents of memory are made available by a memory controller to the various other devices in the system. As such, two or more devices (e.g., two processors in a multi-processor system) may attempt to access the same block of memory at substantially the same time. Although being able to provide access to the same block of data by multiple devices in the system is highly desirable from a performance standpoint, it does necessitate taking steps to maintain the "coherency" of each data block.
In a multi-processor computer system, or any system for that matter in which more than one device may request concurrent access to the same piece of data, it is important to keep track of each block of data to keep the data coherent, meaning that the system accurately tracks the status of each data block and prevents two processors from changing two different copies of the same data. If two processors are given copies of the same data block and are permitted to change their copy, then the system at that point would have two different versions of what was previously the same data. The coherency problem is akin to giving two different people the permission to edit two different copies of the same document. Once their editing is complete, two different versions of the same document are present, whereas only one copy of the document is desired. A coherency protocol is needed to prevent this type of situation from happening.
One approach to the coherency problem in a multi-processor computer system is to provide a "directory" for each data block. The directory thus comprises a plurality of entries, one entry for each data block unit. Each directory entry generally includes information that reflects the current state of the associated data block. Such information may include, for example, the identity of which processors have a shared copy of the block or which processor in the system has the exclusive ownership of the block. Exclusive ownership of a data block permits the exclusive owner to change the data. Any processor having a copy of the block, but not having the block exclusive, can examine the data but cannot change the data. A data block may be shared between two or more processors. As such, the directory entry for that block includes information identifying which processors have a shared copy of the block. In general, a directory-based coherency protocol solves the problems noted above.
It is always desirable to enable computer systems to work faster and more efficiently. Anything that can be done to decrease latency in a computer generally makes the computer operate faster. Directory-based coherency computer systems are no exception; reducing the latency involved in such systems is desirable.
The problems noted above are solved in large part by a computer system that has a plurality of processors. Each processor preferably has its own cache memory. Each processor or group of processors may have a memory controller that interfaces to a main memory, such as DRAM-type memory. The main memories include a "directory" that maintains the directory coherence state of each memory block.
One or more of the processors may be members of a "local" group of processors, such as might be the case if multiple processors are fabricated on the same chip. As such, the system might have multiple local processor groupings. Processors outside a local group are referred to as "remote" processors with respect to that local group.
Whenever a remote processor performs a memory reference (e.g., read or write) for a particular block of memory, the processor that maintains the directory for that block normally updates the directory to reflect that the remote processor now has exclusive ownership of the block. In accordance with the preferred embodiment of the invention, however, memory references between processors within a local group, do not result in a directory write. Instead, the cache memory of the local processor that initiated the memory requests places or updates a copy of the requested data in its cache memory and also sets associated tag control bits to reflect the same or similar information as would have been written to the directory. In this way, it is not necessary to write the directory for the requested block because the requesting processor's cache has the same information.
If a subsequent request is received for that same block, the local processor that previously accessed the block examines its cache for the associated tag control bits. Using those bits, that processor will determine that it currently has the block exclusive and provides the requested data to the new processor that is requesting the data. As such, the processor that maintains the directory for the block can ignore the directory entry.
By eliminating directory writes whenever possible, there is a significant latency improvement because of the relatively high bandwidth, low latency nature of processor cache subsystems and the avoidance of directory writes to memory. These and other benefits will become apparent upon reviewing the following disclosure.
For a detailed description of the preferred embodiments of the invention, reference will now be made to the accompanying drawings in which:
FIG. 1 shows a system diagram of a plurality of microprocessors coupled together in accordance with the preferred embodiment of the invention;
FIG. 2 shows a block diagram of one of the microprocessors of FIG. 1;
FIG. 3 illustrates the use of a directory-based coherence protocol in one situations;
FIG. 4 illustrates the use of a directory-based coherence protocol in another situation; and
FIG. 5 shows an alternative embodiment of local groups of processors.
Certain terms are used throughout the following description and claims to refer to particular system components. As one skilled in the art will appreciate, computer companies may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following discussion and in the claims, the terms "including" and "comprising" are used in an open-ended fashion, and thus should be interpreted to mean "including, but not limited to . . . ". Also, the term "couple" or "couples" is intended to mean either an indirect or direct electrical connection. Thus, if a first device couples to a second device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.
The preferred embodiment of the invention includes a directory-based, multi-processor computer system that is implemented in such a way that directory write operations (referred to simply as "directory writes") in certain situations are not performed, whereas in conventional systems, such writes would have been performed. By eliminating at least some directory writes, less memory bandwidth is consumed and certain inter-processor messages may be eliminated also. The end result is a system that operates with less latency and therefore increased efficiency. More broadly, the concepts described herein can apply to any directory-based, electronic system, not necessarily just in multi-processor computer systems. For illustration purposes, however, the following description focuses on a multi-processor computer system.
Referring now to FIG. 1, in accordance with the preferred embodiment of the invention, computer system 90 comprises one or more processors 100 coupled to a memory 102 and an input/output ("I/O") controller 104. As shown, computer system 90 includes 12 processors 100, each processor coupled to a memory and an I/O controller. Each processor preferably includes our ports for connection to adjacent processors. The inter-processor ports are designated "North," "South," "East," and "West" in accordance with the well-known Manhattan grid architecture. As such, each processor 100 can be connected to four other processors. The processors on both ends of the system layout wrap around and connect to processors on the opposite side to implement a 2D torus-type connection. Although 12 processors 100 are shown in the exemplary embodiment of FIG. 1, any desired number of processors (e.g., 256) can be included. The configuration of FIG. 1 is merely one possible configuration and one of ordinary skill in the art will recognize many other possible configurations.
The I/O controller 104 provides an interface to various input/output devices such as disk drives 105 and 106 as shown. Data from the I/O devices thus enters the 2D torus via the I/O controllers.
In accordance with the preferred embodiment, the memory 102 preferably comprises RAMbus™ memory devices, but other types of memory devices can be used if desired. The capacity of the memory devices 102 can be any suitable size. Further, memory devices 102 preferably are implemented as Rambus Interface Memory Modules ("RIMMS").
In general, computer system 90 can be configured so that any processor 100 can access its own memory 102 and 110 devices as well as the memory and I/O devices of all other processors in the network. Preferably, the computer system may have physical connections between each processor resulting in low interprocessor communication times and improved memory and I/O device access reliability. If physical connections are not present between each pair of processors, a pass-through or bypass path is preferably implemented in each processor that permits accesses to a processor's memory and I/O devices by another processor through one or more pass-through processors.
If desired, groups of processors 100 can be arranged to form "local" groups, such as local group 115 shown in FIG. 1. Any number of processors 100 can be included in a local group. A single processor itself can be designated as local. In one embodiment, it may be that the processors in a local group are fabricated on the same semiconductor die. For example, the four processors 100 in local group 115 may all be fabricated on a single chip.
Computer system 90 preferably permits sharing of data between the various processors. To maintain the coherence of the system, system 90 preferably implements a directory-based coherence protocol. As such, each processor 100 is responsible for a predetermined range of memory addresses. Referring to FIG. 2, each processor 100 preferably includes a CPU core 101, a memory controller 103, and a cache subsystem 105, as well as many other components. The processor 100 couples to memory 102 which includes a directory table 111. Each entry in the directory table corresponds to a different block of data in memory 102. For example, each directory entry may be associated with a 64-byte data block. The memory controller 103 of each processor 100 is responsible for reading and writing the directories 111. As should be noticed, reading and writing a directory requires communication across a bus that interconnects the memory 102 to the processor 100. Although such transactions are relatively fast as compared to reading and writing a floppy disk drive, the memory transactions for a directory are relatively slow compared to accessing the cache subsystem 105 as is well known in the art. The preferred embodiment of the invention described further below takes advantage of this fact as will become apparent.
An alternative structure to that shown in FIGS. 1 and 2 is shown in FIG. 5 in which each local group 119 of processors 121 couples to a single memory controller 123. As shown, the memory controller 123 for the local processors interfaces the processors to the memory 102. Although not shown, each processor 121 may have its own cache subsystem as explained above.
Each directory entry provides the directory "state" of the associated block. Table 1 below defines the various preferred directory states.
Local state
Implies that no remote processors have a copy of the block. The block may be
held either shared or exclusive locally (or not held at all).
Incoherent state
An error state. Error status ("ERRResp") is returned in response to a request to
an incoherent block.
Exclusive state
Implies that exactly one remote processor holds the current copy of the block.
The block may be either in the exclusive-clean or dirty states in the cache at
that processor. A request that finds a block in the exclusive state will be
forwarded to the exclusive owner.
Implies that one remote processor may have shared access to a block (as well as
the local processor).
Implies that two processors may have shared copies of the block (as well as the
local processor).
Implies that three processors may have shared copies of the block (as well as the
local processor). This state is used only when the system has 64 processors or
less. It is enabled by ZBOX0_PID_CTL[PIDWIDTH].
SharedM state
Implies that one or more remote processors may have shared copies of the
block, and that the local processor may also have a shared copy of the block.
Each M bit indicates whether the corresponding processor(s) may have a copy
of the block. An M bit is never set for the local processor. IPR settings define
the correspondence between the bits in the mask and the processors in the
system. For example, each bit in the mask may refer to a four-processor quad
in a 80-processor system.
The use of these directory states will be illustrated below with reference to the examples of FIGS. 3 and 4. These illustrations use the terms, "home," "owner," "requester," and "sharer" processor (also referred to as "node"). These terms are defined as follows:
Requestor—a node that initiates a read or write transaction to another node in which the requested data resides.
Home—a node that contains the memory and directory for the referenced data block.
Owner—a remote node that contains an exclusive copy of the block in its cache and has the right to modify the data.
Sharer—a remote node that contains a shared copy of the block in its cache. Nodes that share a data block are not permitted to modify the data, otherwise the data will be incoherent.
Each data block has a home node that preferably never changes. The directory for a block is maintained at its home node. Thus, the home node is responsible for updating the directory entry for each of its data blocks to maintain coherency throughout the system. Either by pre-programming the system or during system initialization, each processor in the system is made aware of which processor is the home processor for each block of memory. Thus, for example, if block A is provided in the memory 102 of processor 100 a shown in FIG. 1, all other processors 100 in the system 90 are made aware of that fact. Armed with this knowledge, each processor in the system can determine to which processor to send a message regarding a particular data block of memory.
A copy of a block can be provided to other nodes that request a copy of the block. If another node requests a block and also desires to modify the block, the requesting node must become the owner of the block thereby being granted the block exclusively. If one or more nodes request a copy of a block, such nodes are called sharers and cannot modify the block.
These principles are, in part, illustrated with reference to FIGS. 3 and 4. FIG. 3 shows a requestor 518, home 520 and owner 522. In this example, the requester 518 desires a copy of the block, but the home 520 has already given the owner 522 the block exclusive. A read request ("ReadReq") message from the requestor 518 is transferred to the home 520. During system initialization, each node in the system is programmed with which nodes are the home nodes for each block of data in memory. Using this information, the requestor 518 knows to send its read request to home node 520. The home 520 examines its directory entry for the requested data block by reading the particular directory from its memory. The directory for that block will indicate that node 522 currently has the block exclusive. As such, home 522 forwards the request to the owner 522 ("ReadFwd"). The owner 522 responds to the ReadFwd message from home 520 by sending a read reply ("BlkShared") message that includes the requested data block to the requestor 518. At this point, owner 522 and requestor 518 both have a shared copy of the block. Owner 522 sends a VictimAckShared message to home 520 indicating that the block is now shared. The home 520 uses this information to update its directory entry for that block to reflect that the block is shared by nodes 522 and 518.
FIG. 4 shows a requestor 530, a home 532 and three sharers 534, 536, and 538. In this example, the sharers 534, 536, 538 currently have shared copy of a particular data block and the requestor 530 desires to modify that block. The directory entry for the block would thus indicate that the block is in the Shared3 state with nodes 534, 536, 538 being the three sharers. The requestor 530 performs a modify request ("ReadMod") that is sent to the home node 532 containing the memory and directory for the referenced block. Home 532 sends invalidation requests ("SharedInv") to sharers 534, 536 and 538 to direct the three sharers give up their shared copy status. The home 532 also a BlkExclCnt message back to the requestor 530. The BlkExclCnt message contains the number of invalidation acknowledgements to expect from sharer nodes. The requestor 530 modifies the data and stores it in cache in a dirty state. Each sharer 534, 536 and 538 replies to the requestor 530 with invalidation acknowledgments ("InvalAck") that indicate that the sharer has understood that requester 530 may modify the block. The requestor 530 may proceed to modify the block as soon as it receives the BIkExclCnt message from the home, but must stall incoming requests and potential write backs of the data blocks until all InvalAcks are received from sharers 534, 536, and 538.
Each directory entry preferably is a 27-bit entry with each bit defined as shown in Table 2 below. It should be recognized that the particular bit definitions for the directory shown in Table 2 are merely one embodiment of a coherence directory that can be implemented; there are many variations for such directories as would be recognized by one of ordinary skill in the art.
Bit Num.
2 11
5 0 21 3 0
Shared with list of one share — S
Shared with list of two shares — T,S
Shared with list of three sharers — U,T,S
Shared with mask
Each symbol's meaning is given below:
X Don't care.
C Error Correction Code ("ECC") storage.
I Tells whether the exclusive owner is a DMA device (1 = DMA).
E Eight bits for the (encoded) exclusive owner when in exclusive state allowing for 256 processors and an additional 256 DMA/IO devices.
M 20 bits for the sharing mask when in shared state.
S 8/6 bits for the first sharer.
T 8/6 bits for the second sharer.
U 6 bits for the third sharer, S and T are 6 bits.
Each block of data that is the target of a memory access preferably is loaded into the cache subsystem 105 (FIG. 2). It is commonly understood that accessing data from the cache subsystem 105 is faster than accessing the corresponding data from memory 102. Cache subsystems are provided in computer systems under the assumption that once a piece of data is needed, it is likely to be needed again in the near future. Thus, by loading the requested data in the cache subsystem 105, future accesses to that same data (referred to as cache "hits") is performed by accessing the data from the cache instead of from memory 102. If the requested data is not in the cache (referred to as a cache "miss"), then the memory controller 103 must access the requested data from memory 102. Experience has shown that, on balance, overall system performance is enhanced with the inclusion of cache subsystem.
Each block of data stored in cache is commonly called a "cache block," such as cache blocks 105 a in FIG. 2. Associated with each cache block is a tag 105 b. The tag portion includes information that lets the cache subsystem 105 determine whether a block of data in a memory reference is in the cache ("hit") or not ("miss"). The tags 105 b also include one or more tag control bits that indicate relevant information about the associated cache block 105 a. For example, the tag control bits may include a valid bit, a shared bit, a dirty bit and a modified bit. The valid bit indicates whether the associated cache block is valid or invalid. In this context valid means the block is available for access by the system, where as invalid means that the system should not use the cache block. A block may become invalid if another processor in the system, for example, was given the block exclusive and modified the block. In this case, the cache copy is "old" and should not be used because a more up-to-date copy exists elsewhere in the system. The shared bit indicates that another processor in the system may have a duplicate copy of the cache block and both processors are sharing the block. The dirty bit indicates that the cache block is different from the copy maintained in memory 102. A block may become dirty, for example, when the block is written, but the updated copy of the data has not yet been written back to memory. The modified bit indicates that an L1 cache contains a more recent copy of the block than what may be contained in an L2 cache (and L1 cache is a smaller, faster storage unit than the L2 cache).
Each cache block has an associated cache state which informs the system as to the state of the block. The tag control bits defined above encode the cache states. In accordance with the preferred embodiment of the invention, the cache states listed in Table 3 below are supported by each processor in the system.
Block is not available for access in the processor's
This processor has an exclusive copy, the value is the
same as memory.
This processor has an exclusive copy, the value may
be different than memory.
This processor has a read-only copy, the value is the
same as memory.
The invalid state means that the block is not available for access in the processor's cache because, for example, another processor in the system may have modified the cache block thereby rendering the cache's copy invalid for subsequent use. The exclusive-clean state means that the processor has the block exclusive and that the cache block is identical to what is stored in memory 102. The exclusive-dirty state is similar to the exclusive-clean state except that the cache block is different from the data that is stored in memory 102. This state may occur when the cache block is modified, and the modified data has not yet been written back to memory 102. The shared state means that the processor may have a copy of the block as well as at least one other processor in the system. None of the shared copies can be written while the block is in the shared state.
In summary, each block of data has an associated directory entry in that block's home processor. The directory entry provides information that informs the system as to the coherence state of the block. In conventional systems, each time a block is accessed (read or write), the directory entry for that block may be read, updated and written back to memory. Directory reads and writes require time and thus impact the performance of the system. In accordance with the preferred embodiment of the invention, some directory write cycles that might have occurred in convention systems are avoided because the same or similar information can be stored in the cache subsystem 105. This being the case, some directory writes that, if they had been performed, would have updated directory information can be avoided.
The directory writes that can be avoided are those writes that result from local memory references. FIG. 1 will be used to illustrate two examples of this principle. In the first example, a directory write cannot be avoided. In the second example, in accordance with the preferred embodiment of the invention, a directory write is avoided. Both examples refer to the local processor group 115 shown in FIG. 1 which includes local processors 100 a-100 d. The examples also refer to remote processors 100 e and 100 f. The examples also refer to a block A of memory (not specifically shown) whose home processor is processor 100 a. As such, the directory entry for block A resides in the memory 102 connected to processor 100 a.
In the first example, the directory state for block A indicates that the block is in the Shared1 state in which remote processor 100 e has a shared copy of block A. In this example, local processor 100 b also has a shared copy of the block. Remote processor 100 f sends a store request for block A. Remote processor 100 f sends the store request to the memory controller for processor 100 a which contains and maintains the directory for block A. All of the local processors in local group 115 receive the store request from remote processor 100 f. The cache subsystems for local processors 100 a-100 d look up their tags to determine if the memory reference is a hit or miss in their respective caches. Because processor 100 b is a sharer of block A, the cache subsystem for processor 100 b detects a hit. The local processors that are not sharers of block A report misses to the memory controller for block A's home processor 100 a.
In response to the store request from remote processor 100 f, which needs block A, local processor 100 b invalidates its copy of block A in its cache subsystem and reports to the memory controller for home processor 100 a that it no longer has the block. The memory controller for processor 100 a, after reading the directory for block A and determining that the block was shared at remote processor 100 e and determining that the local processors have handled their part of the cache coherency scheme sends the requested data to the requestor processor 100 f. Processor 100 a also sends a message to processor 100 e to invalidate its copy of cache block A. Processor 100 a's memory controller must rewrite the directory entry for block A to change the directory state from shared to exclusive to reflect that remote processor 100 f now has the block exclusive. In the foregoing example, the directory write was necessary because the requestor was a remote processor.
In the next example, the requestor is one of the local processors. In this example, processor 100 b is the requestor of block A. Block A's home processor is processor 100 a, both of which are members of local group 115. For this example, the starting directory state for block A reflects that block A is in memory and all of the processor's 100 a-100 f cache subsystem show the block to be invalid. Local processor 100 b desires a store to block A. The memory controller for local processor 100 a receives the store request from local processor 100 b and, in response, provides the requested block to processor 100 b. In accordance with the preferred embodiment of the invention, processor 100 a's memory controller does not write the directory entry for block A to a new state to reflect what has transpired. The cache subsystem for requestor, local processor 100 b makes or changes the tag control information pertaining to block A to the exclusive-dirty state (Table 3) to reflect that processor 100 b 's cache has block A exclusive and the data may differ from the copy of block A that is home processor 100′a memory 102.
Later, a read request for block A may be sent from remote processor 100 e to the memory controller for home processor 100 a. The cache subsystems in each of the processors 100 a-100 d in the local group 115 also receive or intercept the read request for block A. The cache subsystems for processors 100 a, 100 c and 100 d inform the memory controller for processor 100 a that they do not have the requested block (misses). The cache subsystem for processor 100 b detects a cache hit and, upon reading the tag control bits, determines that it has the block exclusive. The cache subsystem for processor 100 b then sends the requested data to processor 100 e and changes its cache state for block A to invalidate its copy of the block. Processor 100 b also informs the memory controller for processor 100 a what has transpired.
The memory controller for processor 100 a, seeing that processor 100 b's cache handled the read request, knows to ignore the directory entry for block A, which the memory controller may have read, and instead updates the directory for block A to reflect that processor 100 e now has the block exclusive.
It should be noted that in this latter example, the directory entry for block A was not updated via a write upon providing the block to the initial requestor, local processor 100 b. Because processor 100 b's cache subsystem provides the correct information that processor 100 b has the block exclusive in its cache, the directory entry for block A did not have to be updated with the same or similar information. It was not until remote processor 100 e submitted its read request for block A that block A's directory was written with new information. This occurred because processor 100 e is not part of the local group 115.
In summary, any time when the requestor for a block of data and that block's home processor are both members of the same local group, the home processor need not write the directory to change the directory state. The requestor, instead, tracks the same or similar information via its cache state information associated with the block.
It should become apparent that in those cases in which a local processor has the requested data exclusive and sends the data to the requester directly, there is a significant latency improvement because of the relatively high bandwidth, low latency nature of processor cache subsystems and the avoidance of directory writes to memory. Further, the standard "3-hop" forwarding sequence such as was exemplified in the first example above becomes a 2-hop sequence. Because many of the references in a computer system of this type preferably are optimized to be from local processors, a large number of directory writes can be avoided, and a large amount of exclusive data can be transferred with reduced latency. The preferred embodiment described herein has leveraged a resource (i.e., the cache subsystem) which already exists for entirely different reasons to remove the need for creating additional hardware to improve performance.
The above discussion is meant to be illustrative of the principles and various embodiments of the present invention. Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. For example, the number of local processors can be raised, as well as the precise coherence protocol used and the interconnect scheme used to couple the processors together. It is intended that the following claims be interpreted to embrace all such variations and modifications.
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|A Logic Design Structure For LSI Testability, E. B. Eichelberger et al., 1977 IEEE (pp. 462-468).
|Alpha Architecture Reference Manual, Third Edition, The Alpha Architecture Committee, 1998 Digital Equipment Corporation (21 p.), in particular pp. 3-1 through 3-15.
|Are Your PLDs Metastable?, Cypress Semiconductor Corporation, Mar. 6, 1997 (19 p.).
|Cellular Disco: resource management using virtual clusters on shared-memory multiprocessors, K. Govil et al., 1999 ACM 1-58113-140-2/99/0012 (16 p.).
|Direct Rambus(TM) RIMM (TM) Module Specification Version 1.0, Rambus Inc., SL-0006-100 (32 p.), 2000.
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|Direct RDRAM(TM) 256/288-Mbit (512Kx16/18x32s), Preliminary Information Document DL0060 Version 1.01) (69 p.).
|Direct RDRAM™ 256/288-Mbit (512K×16/18×32s), Preliminary Information Document DL0060 Version 1.01) (69 p.).
|End-To-End Fault Containment In Scalable Shard-Memory Multiprocessors, D. Teodosiu, Jul. 2000 (148 p.).
|Hardware Fault Containment in Scalable Shared-Memory Multiprocessors, D. Teodosiu et al., Computer Systems Laboratory, Stanford University (12 p.), 1977.
|Rambus(R) RIMM(TM) Module (with 128/144Mb RDRAMs), Preliminary Information, Document DL0084 Version 1.1 (12 p.).
|Rambus® RIMM™ Module (with 128/144Mb RDRAMs), Preliminary Information, Document DL0084 Version 1.1 (12 p.).
|Testability Features of AMD-K6(TM) Microprocessor, R. S. Fetherston et al., Advanced Micro Devices (8 p.).
|Testability Features of AMD-K6™ Microprocessor, R. S. Fetherston et al., Advanced Micro Devices (8 p.).
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|U.S. Classification
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|Aug 31, 2000
Owner name: COMPAQ COMPUTER CORPORATION, TEXAS
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text:
Western Name: Yamatouchi Iori
Eastern Name: 大和内庵
Kana Pronunciation: やまとうちイオリ
Gender: Male
Age: Late 20's - early 30's
Release Date: September 26, 2009
Technical Details
Voiced by: メリヒヨP (MerihiyoP)
Managed by: メリヒヨP (MerihiyoP)
Voicebank Distribution
Current Voicebank Download pass: utau
→Average Frequency: F3
→Japanese-language only with some English phonemes.
→Encoded in kana, and therefore may require conversion for Western users.
Terms of Use
R-18 Content Allowed? Permission Not Required
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Commercial Use of Character Allowed?
Do these terms apply to derivative characters/voices?
Click here to view the terms of use for this UTAU.
[* Click here to view commercial license info for this UTAU.]
Voice Sample(s)
Character Details
Height: Average
Weight: Average
Personality: Calm, gentle and peaceful, doesn't have ambitions.

subset: commoncrawl


text:
Fettuccine with Zucchini
Take advantage of summer's bountiful zucchini crop with this meatless pasta. Enriched with a bit of butter, cream and grated Parmesan, it makes a satisfying supper. Best of all, the dish is simple to toss together, even on busy weeknights.
- Kosher salt
- 1/2 lb. (250 g) fettuccine
- 1 Tbs. olive oil
- 1/2 lb. (250 g) zucchini, cut into planks 1/2 inch (12 mm) thick on a mandoline
- 2 Tbs. chopped shallots
- 2 tsp. minced garlic
- Pinch of red pepper flakes
- 1/4 cup (2 fl. oz./60 ml) white wine
- 2 Tbs. unsalted butter
- 1/4 cup (2 fl. oz./60 ml) heavy cream
- 1 Tbs. fresh lemon juice
- 1/4 cup (1 oz./30 g) grated Parmesan cheese, plus more for serving
Bring a large pot of salted water to a boil over high heat. Add the pasta and cook according to the package instructions until al dente (tender but firm to the bite). Drain, reserving 1/2 cup (4 fl. oz./125 ml) of the cooking water.
Meanwhile, in a large sauté pan over medium heat, warm the olive oil. Working in batches, cook the zucchini, turning as needed, until just barely soft, 1 to 2 minutes. Transfer to a plate.
In the same pan over medium heat, combine the shallots, garlic and red pepper flakes. Cook, stirring occasionally, until the shallots are translucent, about 2 minutes. Add the wine and cook until the liquid is reduced by half, 1 to 2 minutes. Add the butter and cream and cook until the mixture has reduced slightly, 1 to 2 minutes. Add the zucchini, pasta, lemon juice and the 1/4 cup (1 oz./30 g) cheese and toss to combine, adding the reserved cooking water if needed to achieve a silky consistency. Taste and adjust the seasoning with salt.
Divide among pasta bowls and serve immediately, passing additional cheese at the table. Serves 4.
Williams-Sonoma Test Kitchen


text:
1. Spiderman Snuggie (Gifts for the Geek):
Its dorky, in questionable taste, and probably the only thing that we can say makes us both warm and cool at the same time (hehe). And it was the last one so of course I had to grab it!!! There was also an elmo version of this for sale too.
2. William Shatner "Shat Happens" Tee (Gifts for the Geek):
Probably sums up Shatner's attitude to the fate of his latest television venture "$h*! My Dad Says"
3. Dr Who sonic screwdrivers (Popcultcha):
Ok I think I know what film nerd is planning for his next costume……..
4. Potty paper rolls (Global Gear):
Ok my main reason for buying this is to keep guests occupied while they are…umm..occupied, therefore preventing the inevitable peek through our bathroom cabinets. Ok I'm kidding, really I thought they was funny.
5. Pop tarts in cherry flavour (Kings Comics [we think]):
(no picture available…. long since consumed)
Mmm artificial goodness……..ok still too sweet for me, but like an addict, I can't help buying some whenever I see them on sale. Maybe a psychological response to my mother denying these to me as a child? Who knows?
6. 4 pack of Tru Blood (Popcultcha):
This stuff just tastes goods, bought before, will buy again.
7. Batman – Year One:
A graphic novel Film Nerd has wanted for some time… was sold out by Sunday morning!
Ok, that is it (aside from photos)!! Time to start saving for next year!


text: Talk at Pycon 2011 India by - Karan Singh. Summary Multitouch screen enabled devices are now everywhere and all around us. Kivy is an open source Python software library for rapid development of applications equipped with novel user interfaces, such as multi-touch apps. Using Kivy and Python we can quickly create multitouch apps which can run on Windows, MacOS and Linux based platforms. In this talk I will show you how to setup kivy and make useful multitouch input based apps rapidly!


text: Project Syrian Refugees ABOUT THE PROJECT Syrian civilians live with the constant fear of air strikes, snipers, chemical weapons, and extremists. Violence against civilians continues to escalate, creating ever-greater needs for support to the suffering, displaced, injured, and grieving. According to the United Nations High Commissioner for Refugees (UNHCR), more than 4 million people have fled Syria since 2011 and 8.7 million are predicted to be displaced inside Syria this year[1]. Many countries have taken in Syrian refugees to provide protection and ease the suffering. The United States also reaffirmed its commitment to resettle at least 10,000 Syrians in FY 2016. Since January 1, 2010, the United States has admitted more than 3,000 Syrian refugees . To welcome Syrian refugee families arriving in the DC, Maryland and Virginia (DMV) areas, FREE-Syria is working with key members of the Syrian-American community and a number of government and nonprofit organizations. We have designed a support program through which refugee families will become integrated members of American society and attain self-sufficiency. FREE-Syria's refugee support program focuses on providing training and empowerment programs to help Syrian families transition to their new lives. Our goal is to create a support network that can provide refugee families with the tools they need initially to acclimatize and begin the integration process. FREE-Syria mobilizes resources through our network of volunteers, government and non-profit partners, and the Syrian-American community. Salwa Dakheel Addressed Prince George's County Council on Syrian Refugees Salwa spoke to the members of the County Council as they met to vote on a resolution expressing support of diversity and inclusiveness in the county. In her speech, Salwa reminded the County Council that the American people cannot ignore their moral imperative to help Syrian refugees. She added that more must be done to educate Americans on why so many Syrians are refugees and the conditions from which they seek refuge. This will help to dispel the fears of some Americans of Syrian refugees and hopefully reduce the wave of hatred and bigotry that has been directed towards them. The County Council voted unanimously to pass the resolution. See full text here: https://goo.gl/OxoTCH Many of the refugees who will come to the U.S. are ordinary, middle-class families. Many had jobs, homes, and businesses – they led ordinary lives, just like you and me. Their kids went to school and played sports – just like our kids. These Syrians have lost everything, including loved ones. Still other refugees might never have been out of Syria before, and transitioning to American culture may be difficult. Many Americans want to help, but don't know how. They have unanswered questions about who Syrian refugees are and how they might behave in the United States. FREE-Syria, along with key members of the Syrian-American community, is working with a number of U.S. nongovernmental organizations to welcome Syrian refugees. We offer English-language classes and cultural awareness sessions. We also work with other organizations and individuals that offer donations of clothing and furniture. As we can, we create job opportunities. Most importantly, we offer a hearty "Welcome to the Land of the Free." Please join us in showing Syrians that they are no longer refugees without a home; they are a part of our community. #RefugeesWelcome. [1] http://www.unhcr.org/syria-emergency.html Woman walks in shoes of local Syrian refugees Judy Zaal, a devout Christian who describes herself as an open-minded conservative, got the chance to put a face to the refugee crisis. DONATE & MAKE A DIFFERENCE Payment Type One Time Payment Recurring Time Period 15 Day 1 Month 1 YearChoose an amount 25 50 100 Amount (you want to pay) * USD +Gateway fees extra: 0.00 Total Amount to be paid 0.00 USD Select Currency Australian Dollar (A $)Canadian Dollar (C $)Euro (€)British Pound (£)Japanese Yen (¥)U.S. Dollar ($)New Zealand Dollar ($)Swiss FrancHong Kong Dollar ($)Singapore Dollar ($)Swedish KronaDanish KronePolish ZlotyNorwegian KroneHungarian ForintCzech KorunaIsraeli New ShekelMexican PesoBrazilian Real (only for Brazilian members)Malaysian Ringgit (only for Malaysian members)Philippine PesoNew Taiwan DollarThai BahtTurkish Lira (only for Turkish members)Russian Ruble Email * First Name* Please enter your first name Last Name Please enter your last name Phone Optional Address Your Address (Optional) Comment This donation is for... Choose Payment Method PayPal Foundation to Restore Equality and Education in Syria


text:
Bob's Puppy Greeting Him is One of the World's Greatest Joys [WATCH]
Our Sheltie puppy is six months old now and every night he comes to greet me with out-of-control excitement. I love every second of it.
Subscribe to 98.1 KHAK on
I can't believe it's been more than four months since Casey came into our lives, weighing just a few pounds. He's now in his second series of obedience training classes and is growing up fast. He weighs 18 pounds now, the long Sheltie hair is really beginning to show itself, and he and Charlie (our youngest cat) still play fight multiple times each day. This video is from a couple months ago:
Subscribe to 98.1 KHAK on
They're best buds and love each other to death.
Subscribe to 98.1 KHAK on
They even both come at the call of "Bubbles" as they're both enamored by soapy bubbles flying through the air. Charlie was a fan first but of course, Casey had to find out what was so interesting to Charlie. One of these days I'll get that on video too… It's something to see.


text:
$20,600 CARFAX Value
No Accident or
Damage Reported
No accident or damage reported to CARFAX
CARFAX 1-Owner
Purchased on 01/23/10 and owned in CA until 06/12/17.
Personal Use
Driven an estimated 9,127 miles/year.
Service History
Last serviced at 61,078 miles in Woodland Hills, CA on 07/18/16 • Maintenance inspection completed • Tire condition and pressure checked


text: My partner and I are playing against a tough smart doubles team. Both of the players are 6'3" or 6'4" and in their mid 40s in good shape and move well. They make it difficult to get into a good rhythm; most of their shots will be hit soft w/ a lot of spin, but every now and then, they'll hit a fast paced shot. They rarely give us unforced errors. They're very good at net standing nearly on top of it, and also when returning serve, the net man sets up 1-2 feet closer to the middle. They serve similar to their groundstrokes; soft w/ spin w/ the occasional flat serve. Their returns are mainly chips and dinks which they follow by rushing to the net. I am left handed. My partner is right handed. We both have strong serves, and decent groundstrokes and volleys. Although it may seem easy to hit down the line returns, especially with the way they lean to the middle, I'm worried that it's a lot harder to direct a wobbly serve. I've been thinking about using lobs, but as they are tall and have decent overheads (good placement), that might be difficult. Should I hit the ball hard at the net man? Since they're mainly dinking back our serves, is it better just to go for safer spin serves w/ good placement? I'm also worried b/c these tactics involve changes from how we normally play. Are we giving in the first step to their tactics. Although it's hard for me to play them, I recognize that they are a great team and not pushers per se. They just do what they can to make it difficult for you to get into a rhythm. thanks,


text:
For me, 2016 was the year of the lip. As I put together my favorite beauty products of 2016 I kept thinking of really great lip products that have not only taken over my vanity but my Louis Vuitton handbag as well. But I didn't want my 2016 obsession to take over this list so I truly narrowed down my top makeup, hair, nail and skincare picks that I raved about earlier this year (or recently discovered) that I'm still using to this very day.
Laura Geller
My Favorite Beauty Products of 2016
Tagged Buxom, DryBar, First Aid Beauty, Hourglass, Joie, Laura Geller, OPI, Ouai, Pixi by Petra, Stila, Too Faced
Laura Geller Filter Finish Setting Powder
Applying setting powder has never been a priority in my daily makeup routine but lately Laura Geller Filter Finish Setting Powder has me changing my tune. Just a few swirls of these pure pigments help blur flaws, balance my skin tone and illuminate my face with a warm glow.
Tagged Laura Geller, Setting Powder
AM to PM: Lisa Cleary of LivingSocial
"I commute from Baltimore to DC every day. Suffice to say, once you commute for around three hours a day—well, that means I'm an expert at a streamlined morning beauty routine: primer, concealer, bronzer, and blush. Then, a quick blending of eyeshadow. Total time? Probably five minutes.
I start out with Smashbox Photo Finish Color Correcting Foundation Primer. This primer is a magic potion that somehow preps my face with a smooth, even finish. Next, I use Laura Geller Real Deal Concealer in Medium. I've toyed around with a lot of concealers, but I'm sticking with this brand for the long run. I dust my cheeks with Too Faced bronzer in Beach Bunny to help set the concealer and add a healthy glow. Then, I top off my cheekbones with Nars blush in Luster.
For my eyes, I use the Too Faced Natural Eye Shadow Collection. It features nine shades in a fool-proof, portable box that's easy to tote. I'll actually apply my liner on the top lid twice with the Smashbox Limitless Eye Liner in Onyx once before blending a smoky base and then after the base is blended. For my lips, I swear by the C.O. Bigelow Rose Salve. I apply that first, then a matte color by Maybelline in Coral Crush for a bright look. If I want to go glossy, I'll top it all off with Smashbox Reflection High Shine Lip Gloss in Watermelon.
For a night out, I always just reapply—a little more contouring, a little smokier for the eye. Back to my beloved Smashbox—I use the Natural At Night palette this time to emphasize a darker eye. Hair products… this is where I cut corners. I use Dove products and a curling iron to style my hair for a bit of volume. I use Big Sexy Hair Spray if I add a curl.
In the evening, I'm really adamant about having clean skin. Washing my face takes the longest out of everything—even longer than getting ready. I also use Proactiv and swear by it. Each night, I scrub my face with a hot, wet washcloth, usually with Johnson's Baby Wash. If my face feels dry, then I'll use baby lotion in the morning. I have really sensitive skin and am a huge fan of baby products for the face."
Tagged AM to PM, Beauty Routine, Laura Geller, Lisa Cleary, Politics of Pretty, Proactiv, Smashbox


text:
This is Jamie, our director - and hopefully yours. Don't let the TopLine office dog's mopey face fool you; she always looks like that. He's actually a pretty cool guy. Before arriving at TopLine, Jamie cut his teeth freelancing for the likes of ITN, MTV, and The Business Channel, and worked as full-time shooting producer/director.He's got the experience, the credentials, and the moxie required to provide exactly what you need. Whatever your video requirements, he can help.
Here's Jamie with the two best cameras in the world – the Arri Alexa and the Red Epic Dragon – and two members of our production team. He likes Sian and Dan a great deal, but he would throw both of them into an active volcano before he saw either device suffer a scratch. That's true professionalism.
Not only does he love his cameras, he knows how to use them. Need your live event recorded? He'll make it seem like your audience is there in person. Need a TV ad that's better than the actual program? Well, it depends on the show; TV's really good these days. Nevertheless, he'll come up with something that'll make your customers sit up and take notice.If you need to put a little pizzazz in your production, Jamie's your man.
That said, Jamie doesn't need a camera to shine: having produced cartoon explainers, advertisements, case studies, and more, he's equally adept with animation. It's a terrific, versatile medium, and he knows it inside out: he's produced animated films for Admiral and Fidelity Insurance; he's worked with private military contractors and graduate recruiters.No matter the company, no matter the brief, TopLine's production team has the skills and know-how to deliver a video that will engage your target audience.
Contact us today to talk to the man himself about your video project.


text:
Online Class
Wire Weaving Bracelets: Basics & Beyond
with Sarah Thompson
A super fun combination of polymer clay, rough amethyst nuggets, metal charms and a bit of wire work to create a creative, one-of-a-kind necklace that will catch the eye and delight the senses! In this tutorial you will learn: * How to encase a rough nugget in polymer clay * How to make two types of clay flowers * How to make abstract clay embellishments Several variations are shown to help you visualize any design around any natural-shaped stone! More than 45 precisely explained steps and over 100 close-up, sharp photos will ensure you are never left confused. Hey I have a Craftsy Class! Organic Wire-Wrapped Pendants. Check it out: http://craftsy.me/2kH9cwb


text:
Dressing in layers is key in our neck of the woods. Chilly mornings often lead to mild afternoons and then we're back to bundling up by dinner time, but there is a trick to layering without bulking up. Coral Smith of SOLA Boutique gave us a few great ideas for ways to layer your look without looking bulky. The first outfit was very versatile. It's one that can be seen during the work day, and then a night on the town. We paired pleated gaucho pants with black knee-high boots. The model wore a gray top with a pink cardigan, and by keeping the layers thin and using a pop of color, you get a layered look that's easy to transition if things heat up. Another great way to layer without adding too much volume is using a vest. The next look was a simple pair of jeans, green long-sleeved shirt and a long black vest with a belt tied in back to give it more shape. Coral showed us the importance of mixing fitted with oversized pieces with a sleeveless orange sweater top over a white long-sleeve, and a slim a burgundy pencil skirt. She added patterned knee-high socks to give a fun pop without the added layer of tights. SoLa is located at 2005 South Lamar Blvd. You can call 512-441-7370 or go to solastyle.com for their hours or more information.
KXAN.com provides commenting to allow for constructive discussion on the stories we cover. In order to comment here, you acknowledge you have read and agreed to our Terms of Service. Users who violate these terms, including use of vulgar language or racial slurs, will be banned. If you see an inappropriate comment, please flag it for our moderators to review.


text:
been trying to conceive for 2 years now going to try soy iso
View Single Post
June 14th, 2013, 04:16 AM
Mega Super Mommy
Join Date: Jan 2013
Posts: 4,032
How long did it take for your periods to regulate?
It can take some time to see a regulated period and be consecutive. Everyone's body is different when it comes to BC and given you have taken the injections it is completely different than my experience with the oral kind.
Have you been using OPKs or charting your BBT?
This can really help you pinpoint your fertile times (OPKS) and when you actually ovulated (BBT). Going by online calculators is no where accurate given that some months you can O earlier or later than previous months. Another great thing to check is cervical mucus. If you have alot of eggwhite mucus then you know you are ovulating
Using all these methods together really does increase your chances tremendously.
Have you been to the doctor for bloodwork or had your partner's semen analyzed?
This can seem scary but knowing what some of your blood levels are can really help your efforts. You can be tested for PCOS which is an insulin resisted disease that affects your fertility greatly and can cause you to form "empty" follicles each month that are filled with testosterone rather than an actual egg. Many people notice this if they are monitored via ultrasounds each month by their doctor because the ovaries look like they have a pearl necklace aka multiple immature follicles. Other things a doctor will check for is your FSH, LH and prolactin to see what it says about your egg reserve and quality. Allow many women think it is an all female only issue many fertility issues stem from Male infertility so a semen analysis will reveal if that is an issue or not. In other cases, like myself, you can just come up unexplained because neither person has an issue as far as hormones or health BUT they are not getting pregnant by conventional means. So they move on to medicated cycles with Clomid or Femara to help boost their chances.
Okay I may just have super overloaded you BUT these are very important things to remember when it comes to TTC
The ladies here are super helpful and have so much to offer as far as advice goes.
In regards to your Soy Iso, I say give it a try. What you will want to do is take at least 40 mg of it early in your cycle like CD 1-5 or CD 2-6 to help mature your follies. Things like Evening Primrose Oil (tablet formed vitamins) can increase your cervical mucous. Using K Y will completely stop your efforts at TTC because it literally blocks all sperm in so many ways. A more sperm friendly lube like Pre-seed can help tons so you do not have to worry about mucous as much if it is a problem. Taking a daily prenatal along with various vitamins like a super B-complex can also increase your chances as well.
My own story is that DH and I have been TTC since Dec 2010 with no luck. I was truly scared and stubborn about going to the doctor for help. This is our first medicated cycle and so far I am so happy I finally broke down and sought help from my doctor
I was however very lucky with charting, which I started in Jan, I got a
in April but miscarried early on.
Good luck with everything and if you need anything just PM me
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Hilton Head Island, South Carolina (PressExposure) October 18, 2011 -- HILTON HEAD ISLAND, S.C. - Palmetto Dunes Oceanfront Resort on Hilton Head Island is offering a variety of new golf clinics and packages this fall to help golfers of all skill levels improve every part of their game. New offerings range from playing a round of golf one-on-one with a pro, to learning about how your body type affects your swing, to receiving a complete golf makeover.
"Fall is a great time to work on your game," says Doug Weaver, director of instruction at Palmetto Dunes Golf Academy. "The weather is cooler, the kids are back in school and you can take a couple days off to really focus on improving your golf skills through all these new offerings."
Power and Distance The Power and Distance class educates golfers about the five different ways to create power in swinging a golf club. Each golfer has different strengths based on their body type. Taller people usually have gravity and leverage working for them; short people tend have more centrifugal force muscle behind their swing. This class will help golfers assess the best source of power for their body type in order to achieve maximum distance on the fairway. This 50-minute class is for groups of up to six, which allows for hands-on instruction and class participation. The fee is $25 per person.
Between a Bunker and a Hard Place This class focuses on the short game and teaches golfers how to outsmart the most challenging course obstacles. They'll learn how to save strokes by playing off the cart path, pine straw, mulch and side-hill lies. They'll also learn to conquer fairway bunkers and take over-the-water and out-of-the-water shots. About 65 percent of one's golf game takes place within 60 yards of the pin, so learning how the professionals keep their scores low through creativity and strategy is key. This three-hour lesson is for groups of up to six. The fee is $99 per person and includes lunch.
Two- or Three-day Golf School Palmetto Dunes' two-day school is great for new golfers who want to be introduced to the game, as well as advanced players who need a refresher course. Two-day schools include three hours of instruction with PGA-certified instructors, nine holes of golf per day and lunch. Itineraries vary, but players can usually expect to focus on chipping, pitching, swinging, stretching and strengthening techniques. Suitable for groups of up to four, the cost is $595 per person for two days.
The resort's three-day school includes four hours of instruction and 18 holes of golf daily. Lunch is also included. During the extra instruction time, golf pros will teach strategies for successful course management that corresponds to each golfer's game. Three-day schools with six hours of instruction are also available. Suitable for groups of up to four, the cost ranges from $1,295 to $2,200 per person for three days.
Golf with a Pro, Learn as you Go This opportunity for a golfer to play a round of golf with a pro will not only improve performance, but also build confidence and help them learn to "think like a golfer." After a supervised warm up on the range, golfers will play for a minimum of two hours on the Robert Trent Jones course overlooking the ocean, all the while getting instruction on every aspect of their game. Fees begin at $70/hour plus a one-time $75 course fee (includes cart). Suitable for 1 to 3 players.
Golf Makeover
Improve your golf game from your head to your spikes with a Golf Makeover at Palmetto Dunes Oceanfront Resort on Hilton Head Island. Before you play one of Palmetto Dunes' three signature courses, learn your golf personality, get some pointers from former PGA Tour Pros and spend some time in the island's largest Pro Shop making sure your equipment and clothing are up to par. The package includes:
4 days /3 nights in a 2-bedroom resort-view villa at Palmetto Dunes Oceanfront Resort (for 4 players).
Custom, one-hour club fitting between 9 a.m. and noon Mondays, Wednesdays and Fridays.
2 three-hour lessons per person of world-class instruction at the acclaimed Palmetto Dunes Golf Academy, including a focus on tough shots, strength, stretching and more.
Practice range voucher
Mental golf survey online assessment used to determine your golf personality.
One round of golf on any of Palmetto Dunes' golf courses. 10% discount at the Pro Shop.
Rates begin at $549/person for two people and $429/person for four people. Pricing includes taxes and fees.
Palmetto Dunes Oceanfront Resort is a 2000-acre golf resort bounded by 3 miles of ocean beach on one side and an Intracoastal Waterway marina on the other. A top golfing vacation destination in South Carolina, Palmetto Dunes offers three courses -- the Robert Trent Jones Oceanfront Course, the George Fazio Course and the Arthur Hills Course -- in the natural setting of Hilton Head Island. Designed by three legendary golf architects, each of course is distinctly different and challenging. All of Palmetto Dunes' courses have been ranked 4 stars or higher by Fodors, earning the distinction of one of the World's Best Golf Resorts by Travel + Leisure Golf.
For more information about any of the above offerings or golf at Palmetto Dunes, please visit http://www.palmettodunes.com or call 877-567-6513


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Morgan Stanley and Citigroup have settled a dispute over the value of the brokerage firm Morgan Stanley Smith Barney, which they jointly own.
The deal clears the way for Morgan Stanley to buy Citigroup's 49 percent interest in the broker, giving Morgan Stanley full ownership. It will also result in a $2.9 billion after-tax charge for Citi.
Morgan Stanley will purchase Citi's interest in Smith Barney in stages, starting with a 14 percent stake for $1.89 billion. It will buy the rest by June 1, 2015.
The deal values Smith Barney at $13.5 billion. It is a victory for Morgan Stanley, which bought 51 percent of Smith Barney from Citi in January 2009. Chief executive James Gorman is keen to up Morgan Stanley's stake in the brokerage at a time when the bank is struggling to make money.
Regulatory changes have cut some of Morgan Stanley's more lucrative trading businesses, and investment banking and trading carry more risk in a weak economy. In the second quarter, Morgan Stanley reported a 37 percent drop in its investment banking revenue. The deal "is a significant milestone for Morgan Stanley in the implementation of our strategy," Gorman said in a statement.
The agreement ends a tussle over the valuation of Smith Barney. Both banks hired third-party appraisers at the end of August after Citigroup said it had valued Smith Barney at around $22 billion. Morgan Stanley's valuation is about 40 percent of Citi's appraisal value.
Each company's stock rose after the agreement was announced. Morgan Stanley rose 64 cents to $17.25, and Citi rose 83 cents to $32.66.
Citi incurred the charge because it valued its 49 percent Smith Barney stake on its books at $11.3 billion. However, the deal that was announced values Citi's stake at about half of that. -- AP


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ASUS N53S Core i7-2630QM Sandy Bridge 15-in Notebook Review
Design and User Interface
Brushed aluminum has become synonymous with luxury electronics, and the ASUS N53's exterior is clad in it like a suit of armor. The lid and palmrest are both coated the velvet-smooth metal, resulting in an instantly impressive finish. The usage of aluminum on the N53 has a dark gunmetal tint – like the ASUS U33JC Bamboo laptop we reviewed some time ago, the N53 goes for elegance rather than flash, and arguably has even better execution.
The palmrest shares the aluminum finish of the lid, and the touchpad also has the same look, though by texture it seems that it may be made of plastic. The only detraction is the keyboard and its surrounding material all the way up to the attractive silver metal speaker housing. These portions of the laptop are made of a dull charcoal plastic that, although not downright ugly, lack the luxurious appearance of the materials surrounding them.
This cheapening is unfortunate, but not significant. If anything, the charcoal plastic that sticks out as the least appealing part of the laptop feels only slightly low-rent, while the rest of the materials feel a bit better than you might expect for a laptop with this hardware at this price.
While the N53 is visually attractive, the feel of the chassis is just average. There is some quite noticeable material flex around the optical drive if you grip the laptop from that side. Pressure does little to depress the laptop's lid, and there is thankfully no hint of shimmy while typing, but there is room for some flex if one corner of the lid is accidently hit or pressured. Access to the RAM isn't difficult, but opening the hard drive panel required some thought and more effort than most people will feel safe exerting on their laptop. To be clear, I'm not saying the N53 feels cheap or poorly screwed together – but it doesn't seem sturdier or more practical than the chassis found on some significantly cheaper laptops, such as the Toshiba C655.
User Interface
The keyboard on the ASUS N53 is a large, island-styled model complete with numpad. It's entirely what you would expect from a 15.6" laptop, and offers few surprises – a generally negative comment. While the keyboard is extremely comfortable and has a reasonably good layout, the numpad keys are squeezed in and are about two-thirds the size of a normal key as a result. Although usable, the numpad certainly isn't comfortable – and that's a shame, because there is significant room on either side of the laptop.
My biggest beef with the keyboard, however, is the flex. When I press the K key, for example, the flex is significant enough to cause the entire keyboard to move from the G key all the way to the Enter key. That's about six inches of flex, just from depressing one key. The effort required to cause this isn't great, either. Someone who plays games will likely see this frequently while tapping away at WASD in a first-person shooter.
The touchpad inspires better comments. It is reasonably large, well defined from the surrounding material, and responsive. The multi-touch gestures work well. Better yet, the touchpad lives up to the laptop's luxurious appearance in ways the keyboard does not. Although it seems to be made of plastic, the touchpad shares a brushed aluminum look. It also has a solid feel. Although I don't often mention it, some laptops have a slightly hollow feel to the area beneath the touchpad and the palmrest. The ASUS N53 does not have this trait.
Yet there is one thing about the N53's touchpad that bothers me – the buttons, or rather, button. Like several previous ASUS laptops, the N53's touchpad has a single button that is placed on a rocker. The feel of this latest incarnation of the design seems to offer more tactical feedback than previous versions, I still don't like the dead-zone in the center of the button, nor do I like the way feedback becomes progressively worse as you move further way from the edges. Also, for some reason, ASUS decided to make the rocker button out of chrome plastic. Fingerprints are the predictable result.
This article is unreadable under firefox 4
What do you mean? I am reading it under FF4 right now...
Same here, the article is compressed to a one inch column.
what about full hd screen with gt550m graphics? I want to see benchmark scores with msi's new gen crazy models
i own one of these laptops and i play games with it...
yeah it ain't exactly the best thing u can have but there is a good way to play games...
put everythig on high and very high and just lower the resoloution to 1280x720...
fps will go up wildly!
well,u always need to do sth about weakness of ur system... ;)
Not much a computer for the price
Can you comment about the 1080p display available for this series of notebooks?
My muse pad on the Laptop stopped working any idea how to fix it.?
install the drivers found at your manufacturers website.
To ryan shrout....This week in computer hardware is a great podcast. thanks for providing it to the community of hardware nerds like myself, and for someone to finally review my asus n53s laptop properly. Before I bought this laptop no one reviewed it besides a couple of mentions in forums. I think Matt Smith the author spoke graciously and precisely about the asus laptop. this is my first laptop and i enjoy the power and versatility. Also pcper.com is refreshing in a world of websites with articles that read like ad space with lame marketing terminology copied straight from the manufactures website. Not sure if anyone notices the abundance of these misleading, non informal sites but i do. thanks ryan and matt
Also to anyone who buys this laptop it can be upgraded to 16GB of ram...which i did for a mere 60 bucks from amazon....Virtual Machines, Hello. A word of warning my right hands thumb always bumps the mouse pad and takes the focus off of what im typing this is a real nuisance and i have had to consciously keep my hand titled to the right..this is more annoying than a problem to me i am very forgiving and this is a reason this is my first and probably my last laptop ever. I am a desktop junky with the need for gaming horsepower and really dont travel or need a laptop i do however utilize this as a roaming(friends and families homes) gaming machine which it works very well for and you must bring the large power brick with you...(i hit the mouse pad two times while typing that last sentence)and i have medium sized hands ..I played skyrim on this machine and it plays very well(smooth framerates) with everything maxed out with default resolution of 1366x768 side by side with my desktop(firstname.lastname@example.com, 6GB DDR2ram, gtx570, 2.5" velociraptor drive) I think my asus laptop played it a bit more smooth...I am beginning to think my q9450 is showing its age but not sure because i had to reinstall due to strange popping with my audio and extreme stuttering with video playback ...Im not sure what the problem was but after a clean reinstall and more scrutiny to my tinkering habits my desktop is running fine but i havent retested skyrim due to a lack of interest of that game...I cant stop playing team fortress 2 lol I love valve. sorry for the crazy rant im a computer junky.
What RAM did you buy? Having 4 GB of RAM sucks, I'm thinking 8 GB?
the link is below....
Corsair 8GB (2x 4GB) 1333mhz PC3-10666 204-pin DDR3 SODIMM Laptop Memory Kit CMSO8GX3M2A1333C9
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This asus is suppose to have more everything, than the sony fz480e I've had since 2008. The Asus isn't near the computer to me , one of the main things is the wireless connection is not near as good as the sony,normally the sony has 2 more bars than the asus,so if the connection is marginal,which it is where I'm at the sony has much better reception
This computer is not worth the price at all. It is very slow, and crashes a lot. Do not buy this.
Have been using Asus N53S for about 6 months now and I can honestly say it is the WORST laptop I have ever owned, and I have owned a LOT. Even worse than HP!
1. Dark keys, light lettering on keys. In half light you can't see what you are doing. This is one of the most annoying things about it.
2. Keyboard is like a trampoline. Horrible to use.
3. Battery dying at a fast rate - from normal, careful use.
4. BLUE SCREENED REGULARLY until I re installed it and now it blue screens only occasionally - despite running Win 7 64 bit.
5. Blu-Ray looks terrible for a Blu-Ray.
6. NVIDIA Graphics driver frequently comes in "Solve PC Issues"
7. Kept update with required Windows patches IT IS SLOW to boot slow to shut down.
8. Freezes for up to 45 seconds FOR NO REASON often. Yes, OFTEN. Then it comes out of it.
9. Has an overall CHEAP feel about it. Cheap and nasty.
ASUS N53S is truly an annoying, aggrivating P.O.S.
i have had none of the problems you mention what so ever. added 16GM 1600MHz RAM. I LOVE this machine
I agree, this laptop is one of the fastest and best I have had next to a top line mac. blows other pc away.
fast, no delay, 11 second start up to surfing online, 5 seconds from standby. I have the newer version vz2. Anyone who doesn't like it is probably never run a defrag or know anything about computers.
This laptop is totally great! Works soooo well. I used it for more than a year now. I'm working on Adobe softwares a lot (Photoshop, Illustrator, etc.) and works like a charm. This is the best laptop I ever had!
My Asus N53S has the same issues. Its lags make me crazy.
Take anything Matt says with a grain of salt. He is a known Intel fanboy.
Proof of his fanboyism.
New AMD A-Series APUs Win 2012 Best Choice of COMPUTEX
Straight from http://www.techpowerup.com/166813/New-AMD-A-Series-APUs-Win-2012-Best-Ch... And Matt says they are bad. But then again he said "Noone cares about battery life" in that same article.
Sad but true.
J'ai un ASUS N53S
Je voudrais savoir si mon portable possède un tuner TV...
Si ce n'est le cas quelle serait la (ou les) marque(s) que vous me conseilleriez d'acquérir pour pouvoir recevoir la TV sur mon ordinateur portable.
Je possède l'option VOO passionément (TV, Internet, Téléphone)
et je ne sais comment m'organiser...
Merci d'avance pour votre réponse.
Yves Loriau (0495 54 96 30)
i have the 8gb one, i7 2630qm and gt550m model for 2 years now. Its really excellent machine, no problems whatsoever, played the games i wanted really nicely, like skyrim etc, its fast, i really recommend it. Battery is enough for almost 2 movies time which is more than i need.
I have one that was given to me by employer. It is crap. too large and heavy to call it laptop. It is better to name it portable desktop.
I found this model to be very disappointing. The power supply blew TWICE. First time was under warranty and they fixed it but it lasted less than a year. Didn't have the speed I would expect from a 7200 rpm hard drive. All in all, not a good experience. My second and last try with ASUS.
Can the gpu be upgraded or is it permanently on board?
hey guy sorry for my bad english I'am Serbien and live in Australia I have got an Asus N53 SV seconde hand that I want to sell I can't find how much could i seel it for it works well the only thing is missing is the hard driver. thank you very much, have a good one
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Philadelphia Flower Show 2013
Last week I escaped the freezing rain and melting snow that seems to define March in Iowa to attend the Philadelphia Flower Show in our City of Brotherly Love. The 2013 theme was "Brilliant" for all things decidedly British. There was a handsome new million-dollar Hamilton Horticourt for plant competitions, which historically were the reason the show was started in 1829.
According to the Pennsylvania Horticultural Society, the show's producer, the plant entries have doubled in the last decade to almost 6,000. PHS president Drew Becher attributes this to "younger competitors, high school garden clubs, and college students who've had success growing herbs on the kitchen windowsill, and garden clubs and social media spreading the word," he says. "It's become sexy again." Check out the size of this yellow clivia in the Horticourt.
We've always thought plant competitions were sexy around here. But I also loved seeing more emphasis on organic gardening, native plants, and wildlife habitats, and a growing culinary presence under the general theme of "From Garden to Table." However, the centerpiece of the flower show was a high-tech recreation of Big Ben with palace gates and a fast-paced video with rock music, flashing lights, and iconic images such as the royal family and the Beatles.
Loved bumping into my old friend Jerry Fritz from Linden Hill gardens in Ottsville, Pennsylvania. That's us above catching up in front of his retail display. I also loved meeting Trenny Robb and Bob Michaud of Sutton, Vermont. They make the coolest custom Arts and Crafts lamps out of copper and brass with mica lampshades embedded with plants and petals from their own garden. Here's the first one that caught my eye made the leaves of Dutchman's pipe (Aristolochia macrophylla).
Their business is called High Beams (www.highbeams.com). They also had lampshades with bloodroot, horsetail, Solomon's seal, grapevine, even maidenhair fern. Don't be surprised if you read about them in a future issue of Country Gardens.


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Students interested in medicine or medicine with foundation year can take part in our main University mini open days.
Book your place now
Our popular graduate entry medicine open days in May and October offer a great opportunity to meet staff, students and take part in activities associated with the course.
On the day, you will be able to pick up information on the course and chat to staff and students about what it is like being a GEM student here at Nottingham. We also run a series of talks to help you find out more about the essentials such as finding accommodation and applying for funding.
Booking for the next open day in May will open closer to the date.
September 2017
Offer holders Open Day 2017
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Contacts: Please see our 'contact us' page for further details
Connect with the University of Nottingham through social media and our blogs.
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Skiing has changed. The innovation and breakthroughs to new, unexplored sides of skiing are slowly coming to a standstill. As we have witnessed, competition skiing, be it big air, slopestyle or halfpipe, is progressing through stagnation of difficult and technical trickery over stylish and fluid showings. With the current progression, it will be a cold day in hell before a smooth, carved 900 Tail will win over a rotating double flip with a dubious grab.
Some of us blame the competitive nature of extreme sports.
Some of us blame the mainstream exposure.
Some of us blame the interference from the IOC.
I blame Warren Miller.
For decades, Warren Miller has been an influencing figure in the skiing industry, connecting many a family once a year to huddle together in a theater and listen to Miller's soothing narrating while witnessing both the old and new sides of skiing on the big screen.
Until he sold out. For years on end, his famous line closed off the movie night for the viewers:
"If you dont do it this year, you will be one year older when you do."
A truly inspiring, and yet vague philosophy. What is this mysterious 'it'? I believe it was a driving force for many aspiring young skiers and even older, more experienced snowhounds to push themselves a little bit more whilst on the slopes, while still enjoying all the fun in skiing. Now, that era has come to an end.
In Level 1 Productions' 2009 feature film "Refresh", Miller was a special guest star, meant as both a throwback to for the older generations and an introduction to a ski film legend for the young ones. It was nicely glued together, and many alike waited anxiously for his eternally quotable finishing quote. Alas, the legend had been tarnished.
No more did he let us imagine our own fun, how we push the sport forward and how we decide the future of skiing each year. No. This time he had a different agenda. He abused his own infamy in the skiing scene. He knew his influence was close to that of Brangelina's to the blogosphere. He knew, and he had waited for so long to take the reins from us all. Little did we know, that all that time spent listening to his smooth, calm voice was just an act to lure us in through sonic hypnotism. We had all been under his spell even before our births, and due to the ungratefulness of the youngest skiing generation of tall-tee toting, full tilt rustling, Saga sacking afterbangers, he had decided to take the style out of our sport.
"If you don't do a double cork 1260 this year, you'll be one year older when you do."
Just like that, he took away the magic. He sealed us all inside a silent vacuum which exist only of the largest spins, the biggest flips and worst of all, the inability to see how ridiculous one looks with a quadruple layer of man-dresses - on or off the hill.
I blame Warren Miller.


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Jane Austen (16 December 1775 – 18 July 1817) was an English novelist who told it like it is, whose works of romantic fiction set among the gentry have ...
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Jane Austen (16 December 1775 – 18 July 1817) was an English novelist who told it like it is, whose works of romantic fiction set among the gentry have earned her a place as one of the most widely read and most beloved writers in English literature. Amongst scholars and critics, Austen's realism and biting social commentary have cemented her historical importance as a writer. Lesley Castle is an unfinished novel in letters to Henry Thomas Austen. From the preface, "I am now availing myself of the Liberty you have frequently honoured me with of dedicating one of my novels to you. That it is unfinished, I greive; yet fear that from me, it will always remain so; that as far as it is carried, it should be so trifling and so unworthy of you, is another concern to your obliged humble Servant." The Lesley Castle eBook uses the established Standard Works book reader already enjoyed by tens of thousands of users. It's also the same reader which powers our "U.S. Historical Documents" application which received a perfect 10/10 rating from AppCraver.com and was recently featured on the iTunes App Store. The Standard Works book reader is simple to use, but also contains many advanced features not usually found in other eBook readers. Rather than continually flicking through little pages of text like some book readers, the Standard Works book reader displays an entire chapter or book at once for you convenience. The text can even automatically scroll for you in both portrait and landscape modes while reading. You can even highlight important words or phrases using the absolute best highlighting system available on the iPhone platform. Create notes for each paragraph which can be displayed inline and assign bookmarks to any paragraph in any book for future reference. And if that's not enough, quickly and easily find any text from any book with the fastest and most powerful search engine available on the iPhone. The Standard Works book reader contains the following main features: • Auto-scrolling (both variable-speed and tilt-based, portrait and landscape modes are supported) • Adjustable fonts, size, colors, margins, spacing, and alignment (you can even adjust the font size by using a pinching gesture while reading!) • Highlighting - 12 background colors, 12 foreground colors, bold, italic, and underline • Night (low-light) mode - Black background with white text • Application tips • Bookmarks and even folders of bookmarks • Last location in each book is remembered • When re-launched, you're returned to the exact location you were last at while reading • Search for words or phrases with INSTANT search results • Powerful advanced search options • Create notes for each paragraph which can be displayed inline • Animated satin bookmark (similar to the one in the Classics application) • Ability to choose the application's color theme Be sure to check out our Bible and "U.S. Historical Documents" applications as well as more books from world renowned authors like: • Charles Dickens • Edgar Allen Poe • Hans Christian Andersen • Jack London • Jane Austen • Jules Verne • H.G. Wells • Sir Arthur Conan Doyle
Version: 2.1.0
Size: 1.62 MB
Price: 0,99 €
Developed by Standard Works LLC
Day of release: 2010-02-3
Recommended age: 4+