Paderborn University (Germany) has selected a Cray CS500 cluster accelerated by FPGAs as the first phase of its Noctua multi-petaflop supercomputer.
The most unusual feature of the system is the presence of 32 FPGAs, in this case Intel Stratix 10 devices. According to Paderborn’s press announcement, the selected FPGA will have 5,760 variable-precision DSP blocks, which implies this is either the Stratix 10 GX or SX 2800. The SX comes with an embedded quad-core ARM processor, while the GX series does not. In either case, the 2800 is the top-of-the-line Stratix 10 with regard to DSP floating point performance, providing 9.2 single precision teraflops.