32kb×8 read-only memory, hand-written printer's copy of the preliminary data sheet.
The floppy disk controller used in the 1571CR (128DCR internal drive); data composed by William Levak.
A fairly complete description of the NMOS 65xx processors and the Commodore 64.
Describes the basic functionality of the extra NMOS 6502 opcodes. See also 64doc.
Preliminary 6510 CPU data sheets, rev. A, 11/82. At least the pin-out has been changed later; the on-chip I/O port has only 6 bits.
Data sheets for the MCS6520 Peripheral Adapter, which appears to be a Motorola 6821 PIA clone.
6522 Versatile Interface Adapter data sheets converted to text by Frank Kontros. This chip is used in many Commodore disk drives, in the Commodore VIC-20 and in different PET models. The .zip file contains the same information as the .txt file, only the graphics are in IBM Code Page 437 character set instead of plain ASCII.
MCS 6530 (Memory, I/O, Timer array). 1024×8 ROM, 64×8 static RAM, otherwise similar to the 6532.
CSG 6532 (Memory, I/O, Timer array); also called RIOT (RAM, I/O and Timer). Used in simple peripheral devices and e.g. in the Atari VCS 2600 game console. 128×8 static RAM, two 8-bit bidirectional I/O ports, programmable interval timer with interrupt.
CSG 6551 Asynchronous Communication Interface Adapter (ACIA), preliminary information from 12/80.
Visualization of the measurements reported in 656x-luminances.txt. Generated by Philip Timmermann <MOD@STARDATE.WESTFALEN.DE>.
MOS 6567 and 6569 luminance signal voltage levels for different colours, measured by Marko Mäkelä. These measurement results cover the 6569R1, 6569R3 (ceramic), 6569R4, 6569R5, 6567R5 6A and 6567R8 (plastic).
Differences between the Rockwell R65C02 and the Commodore CSG65CE02 used in the 4510 processor of the Commodore 65. Composed by Michael Steil.
Motorola 68B45 Cathode Ray Tube Controller (CRTC), used in the Commodore Model II computers (B128/B256). It is generally not compatible with the 6545 used in the PET computers.
8701 is the clock generator chip used in Commodore 8-bit computers since about 1985. Typical of Commodore, not all contacts of the chip have been documented. Written and uploaded by William Levak <wlevak@cyberspace.org>.
Hitachi Cathode Ray Tube Controller (CRTC), sometimes used in the PET computers.
Detailed description of the VIC-II graphics chip. Updated 26.08.1996 (corrected idle state graphics explanation). English version ("VIC-Article.gz") and German version ("VIC-Artikel.gz").
Almost full description of the MOS 6560/6561 VIC-I chip (used in the Commodore VIC-20). Covers both 6560-101 (NTSC-M) and 6561-101 (PAL-B).
Logic equations in Abel format for the 82S100 PLA chip used in the C64, and a JEDEC file that can used to burn a 82S100 as a C64 PLA.
Pinout of the custom chip used in the C64 BN/E board. Composed by William Levak.
Detailed information about the guts of the MOS 6526 CIA, reverse-engineered by Wolfgang Lorenz. Includes a C++ implementation of the CIA, and test programs for testing emulators.
Information about chips produced by MOS Technologies or its successor, CSG (Commodore Semiconductor Group).
Reveals the most of the timing of the 6569 and 8566 video chips. See also VIC-Article.gz and VIC-Artikel.gz, which are based on this article.
Some aspects about programming the RAM Expansion Units. See reu.registers for detailed REU description.
Synertec 6522 data sheet, page 8 of which describes the problem with the shift register.
Synertec 6530 Memory, I/O, Timer Array. April 1979. Seems to have the same functionality as the MOS Technologies 6530.
Emulator Test Suite version 2.15. Tests 6502 emulation compatibility. Developed as part of PC64 by Wolfgang Lorenz. The files are now in 1541 disk image format, for easier access on all emulators. The test suite now includes IRQ and NMI timing tests.