The Arasan DSI Tx Controller IP is designed to provide MIPI DSI 1.3 – compliant high speed serial connectivity for the host (mobile application processor) using 1 to 4 D-PHYs depending on bandwidth needs. Serial connectivity to the display module’s DSI device is implemented using 1 to 4 D-PHY’s (also available from Arasan), depending on display bandwidth needs. This IP connects to the D-PHYs through the PPI interface.
Initial configuration of Arasan’s MIPI DSI Host Controller can be done through programmed IO over the AHB bus, however, other bus interfaces can be provided upon request.