|ARM Technical Support Knowledge Articles|
Applies to: ARM7TDMI
MAS[1:0] is used to indicate whether a word/half-word or byte access is to be performed, and is described in the ARM7TDMI Technical Reference Manual (1.8MB PDF).
The signal has the following states:
|Bit 1||Bit 0||Data Size|
The memory system must be able to handle word, half word and byte writes.
Memory systems supporting only word writes will have severe difficulties supporting C code because the compilers assume that the underlying access types of the ARM architecture are always available. Furthermore, it will not be possible to set software breakpoints in Thumb code using the EmbeddedICE Interface.
When in Thumb state, A is not driven, and will be held at whatever level it was last driven to, by a 'sticky latch'. Usually, this will be set following a BX instruction (with bit 0 of the register set), or a data transfer to/from an odd address. It would normally be cleared again following a data transfer to/from an even address.
The memory controller should ignore A for Thumb instruction fetches (nOPC=0 and MAS[1:0]=01), and A[1:0] for ARM instruction fetches (nOPC=0 and MAS[1:0]=10).
Article last edited on: 2008-09-09 15:47:35
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