 The WAR latencies are zero cycles and the WAW latencies are single cycle.The principal architects for the ST200 Lx implementation 
were Paolo Faraboschi (HPL, architecture) and Fred Homewood (STM, microarchitecture).Key members of the architecture and microarchitecture team included Geoffrey Brown (HPL co-lead), Giuseppe Desoli (HP), Gary Vondran (HP), Trefor Southwell (ST), Tony Jarvis (ST), and Alex Starr (ST).