 The Lx architecture is closer to the original VLIW architecture defined by the Trace processor series from Multiflow than to the EPIC architectures exemplified by the IA-64.Precisely, the Lx is a symmetric clustered architecture, where clusters communicate through explicit send and receive instructions.Each cluster executes up to 4 instructions per cycle with a maximum of one control instruction (goto, jump, call, return), one memory instruction (load, store, pre-fetch), and two multiply instructions per cycle.