This is accomplished with two separate instructions used to swap their accessibilities: EX AF,AF' exchanges only register pair AF with AF', while the EXX instruction exchanges the three general purpose register pairs HL, DE and BC with their alternates HL', DE' and BC'. Thus the accumulator A can interact independently with any of the general purpose 8-bit registers in the alternate (or primed) register file, or, if HL' contains a pointer to memory, some byte there (DE' and BC' can also transfer 8-bit data between memory and accumulator A). This can become confusing for programmers because after executing EX AF,AF' or EXX what were previously the alternate (primed) registers are now the main registers, and vice versa. The only way for the programmer to tell which set(s) are in context (while "playing computer" while scrutinizing the assembler source text, or worse, poring over code with a debugger) is to trace where each register swap is made at each point in the program. Obviously if many jump and calls are made within these code segments it can quickly become difficult to tell which register file is in context unless carefully commented. Thus it is advisable that exchange instructions be used directly and in short discrete code segments. The Zilog Z280 instruction set includes JAF and JAR instructions which jump to a destination address if the alternate registers are in context (thus officially recognizing this programming complication). Registers As on the 8080, 8-bit registers are typically paired to provide 16-bit versions. The 8080 compatible registers are: AF: 8-bit accumulator (A) and flag bits (F) carry, zero, minus, parity/overflow, half-carry (used for BCD), and an Add/Subtract flag (usually called N) also for BCD BC: 16-bit data/address register or two 8-bit registers DE: 16-bit data/address register or two 8-bit registers HL: 16-bit accumulator/address register or two 8-bit registers SP: stack pointer, 16 bits PC: program counter, 16 bits The new registers introduced with the Z80 are: IX: 16-bit index or base register for 8-bit immediate offsets IY: 16-bit index or base register for 8-bit immediate offsets I: interrupt vector base register, 8 bits R: DRAM refresh counter, 8 bits (msb does not count) AF': alternate (or shadow) accumulator and flags (toggled in and out with EX AF,AF' ) BC', DE' and HL': alternate (or shadow) registers (toggled in and out with EXX) Four bits of interrupt status and interrupt mode status The refresh register,