were generated for each byte received. This generated high rates of interrupts as transfer speeds increased. More critically, with only a 1-byte buffer there is a genuine risk that a received byte will be overwritten if interrupt service delays occur. To overcome these shortcomings, the 16550 series UARTs incorporated a 16-byte FIFO buffer with a programmable interrupt trigger of 1, 4, 8, or 14 bytes. The original 16550 had a bug that prevented this FIFO from being used. National Semiconductor later released the 16550A which corrected this issue. Not all manufacturers adopted this nomenclature, however, continuing to refer to the fixed chip as a 16550. According to another source, the FIFO issue was corrected only in the 16550AF model, with the A model still being buggy. (The C and CF models are okay too, according to this source.) The 16550AFN model added DMA transfers. The 16550 also incorporates a transmit FIFO, though this feature is less critical as delays in interrupt service would only result in sub-optimal transmission speeds and not actual data loss. The 16550A(F) version was a must-have to use modems with a data transmit rate of 9600 baud. Dropouts occurred with 14.4 kbit/s (v.32bis and higher) units and as compression was added with v.42 getting more data per interrupt was critical as data speed continued to increase. See also Universal asynchronous receiver-transmitter (UART) References Further reading External links Serial Programming/8250 UART Programming Input/output integrated circuits