scheduling which does not attempt to merge control flow paths at trace "side entrances". Instead, code can be implemented by more than one schedule, vastly simplifying the code generator. Compiler examples The GNU Compiler Collection is one compiler known to perform instruction scheduling, using the (both instruction set and scheduling) or (only scheduling) flags. It uses descriptions of instruction latencies and what instructions can be run in parallel (or equivalently, which "port" each use) for each microarchitecture to perform the task. This feature is available to almost all architectures that GCC supports. Until version 12.0.0, the instruction scheduling in LLVM/Clang could only accept a (called in LLVM parlance) switch for both instruction set and scheduling. Version 12 adds support for () for x86 only. Sources of information on latency and port usage include: GCC and LLVM; Agner Fog, who compiles extensive data for the x86 architecture; InstLatx64, which uses AIDA64 to collect data on x86 CPUs. LLVM's should be usable on all machines, especially to gather information on non-x86 ones. See also Branch predication Code generation Instruction unit Out-of-order execution References Further reading (Trace scheduling) (Percolation scheduling) (Global scheduling) Compiler optimizations