be assumed because the 6845 imposes no limit on the size of each memory location that it addresses. It is also significant that each word addressed by the 6845 does not have to equal one pixel or one character. As an example, consider the use of the 6845 in the IBM CGA, where the word size is one byte and each word represents four or eight pixels in the medium- or high-resolution graphics modes respectively, or one-half character. In CGA alphanumeric (text) mode, there are two bytes per character, accessed sequentially by the 6845—the first byte is a character code byte and the second byte is a character attribute byte. The character address increases linearly. When the chip signals horizontal sync it increases the row address. If the row address does not equal the programmatically set number of rows per character, then the character address is reset to the value it had at the beginning of the scan line that was just completed. Otherwise the row address is reset to zero and the memory address continues increasing linearly. This causes the same sequence of character values to be re-read from the memory for each raster line of each character row, before the 6845 advances the memory address to the next character row and repeats the same pattern. Therefore, if a character occupies one "word" in the video buffer, a display of l lines and c columns of characters with s scan lines per character requires l × c words of memory to represent a full screen of characters but takes s times that many memory accesses to complete one refresh cycle: each line of character words is repeatedly read s times before the next line is read. This means that character displays using the 6845, compared to all-points-addressable graphics displays of the same resolution, require much less memory but still require high memory bandwidth on the order of the bandwidth required for graphics. A different video display controller that buffers one whole line of character data internally can avoid this repeated reading of each line of characters from the display buffer RAM, reducing the required memory bandwidth and allowing either slower, less expensive memory chips to be used, more time for a system CPU to access the memory, or a combination of both. In the 1970s, 1980s, and to a lesser extent the 1990s, memory was expensive, fast memory was