it reaches zero, and timer 1 can also output pulses (in the interval timer mode) or square waves (in the free-running mode) on pin PB7 (the 8th bit of port B). Timer 2 can be used to provide the clock frequency for the shift register. A useful feature of the free-running mode is that the 16-bit counter latch can be loaded with a new count without reloading the counter, so that it will load the new count only after the current count reaches zero, seamlessly changing the output frequency. This feature of timer 1, combined with its ability to output to pin PB7, can be used to generate complex waveforms, for example pulse-width modulation signals, frequency sweeps, or bi-phase or FM-encoded serial bit streams. Shift register The VIA's shift register is bidirectional, 8 bits wide, and can run from either a timer-generated clock (from timer 2), the CPU clock, or an external source on line CB1. The serial input/output is on line , and can also be programmed to output a bit clock for external clocked serial devices. IRQ output The NMOS 6522 has an open drain IRQ output that may be used in wired-OR interrupt circuits. The WDC W65C22S, in contrast, has a totem pole IRQ output that must be isolated from a wired-OR circuit by a Schottky diode, due to the fact that the totem pole output actively drives the IRQ pin high when the W65C22S is not interrupting. This specific issue is resolved on the WDC W65C22N which is fitted with an open-drain IRQ output. Bugs Due to a design defect, if the edge on falls within a few nanoseconds of the falling edge of the ϕ2 (phase–2) clock, the will be ignored, causing the loss of a bit and framing errors on subsequent data. As a workaround, put the external clock signal into the input of a 74AC74 flip-flop, run the flop's output to the 6522's pin, and clock the flip-flop with ϕ0 or ϕ2. The serial shift register bug was corrected in the California Micro Devices CMD G65SC22, the Western Design Center W65C22 and in the MOS 6526, the latter device which Commodore used in place of the 6522 from the Commodore 64 onwards. Aside from the aforementioned shift register bug, there was a potential register corruption problem that usually only occurred in systems using the 6522 with a microprocessor having a non-6502 bus architecture,