high quality parts, with junction tolerances from −40 to 125 °C, especially suited for demanding out doors environments. It is the mid-level platform, with devices ranging from 800 MHz up to 1.2 GHz. It is designed to replace the PowerQUICC II Pro and PowerQUICC III platforms. The chips include, among other integrated functionality, a 512 kB L2 cache, a security engine, three Gigabit Ethernet controllers, a USB 2.0 controller, a 64-bit DDR2 and DDR3 memory controller with ECC support, dual four-channel DMA controllers, a SD/MMC host controller and high speed SerDes lanes which can be configured as three PCIe interfaces, two RapidIO interfaces and two SGMII interfaces. The chips are packaged in 689-pin packages which are pin compatible with the P1 family processors. P2010 – Includes one 1.2 GHz core P2020 – Includes two 1.2 GHz cores, with shared L2 cache P3 The P3 series is a mid performance networking platform, designed for switching and routing. The P3 family offers a multi-core platform, with support for up to four e500mc cores at frequencies up to 1.5 GHz on the same chip, connected by the CoreNet coherency fabric. The chips include among other integrated functionality, integrated L3 caches, memory controller, multiple I/O-devices such as DUART, GPIO and USB 2.0, security and encryption engines, a queue manager scheduling on-chip events and a SerDes based on-chip high speed network configurable as multiple Gigabit Ethernet, 10 Gigabit Ethernet, RapidIO or PCIe interfaces. The P3 family processors share the same physical package with, and are also software backwards compatible with, P4 and P5. The P3 processors have 1.3 GHz 64-bit DDR3 memory controllers, 18 SerDes lanes for networking, hardware accelerators for packet handling and scheduling, regular expressions, RAID, security, cryptography and RapidIO. The cores are supported by a hardware hypervisor and can be run in symmetric or asymmetric mode meaning that the cores can run and boot operating systems together or separately, resetting and partitioning cores and datapaths independently without disturbing other operating systems and applications. P2040 P2041 P3041 – Quad 1.5 GHz cores, 128 kB L2 cache per core, single 1.3 GHz 64-bit DDR3 controller. Manufactured on a 45 nm process operating in a 12W envelope. P4 The P4 series is a high performance networking platform, designed for backbone networking and enterprise level switching and routing. The P4 family offers an extreme multi-core platform, with support for up to eight e500mc cores at frequencies