transistor if there is a voltage across it (VDS > 0) Never turn off a transistor if there is a current through it (IDS ≠ 0) Never pass current through a diode If these conditions with regard to the inputs, in all the four phases of power clock, recovery phase will restore the energy to the power clock, resulting considerable energy saving. Yet some complexities in adiabatic logic design perpetuate. Two such complexities, for instance, are circuit implementation for time-varying power sources needs to be done and computational implementation by low overhead circuit structures needs to be followed. There are two big challenges of energy recovering circuits; first, slowness in terms of today's standards, second it requires ~50% of more area than conventional CMOS, and simple circuit designs get complicated. See also References Further reading External links Asymptotically Zero Energy Computing Using Split-Level Charge Recovery Logic Digital electronics