t values 224 and 256 are especially mentioned as approved. The SHA-512/t IV generation function evaluates a modified SHA-512 on the ASCII string "SHA-512/t", substituted with the decimal representation of t. The modified SHA-512 is the same as SHA-512 except its initial values h0 through h7 have each been XORed with the hexadecimal constant 0xa5a5a5a5a5a5a5a5. Sample C implementation for SHA-2 family of hash functions can be found in RFC 6234. Comparison of SHA functions In the table below, internal state'' means the "internal hash sum" after each compression of a data block. In the bitwise operations column, "Rot" stands for rotate no carry, and "Shr" stands for right logical shift. All of these algorithms employ modular addition in some fashion except for SHA-3. More detailed performance measurements on modern processor architectures are given in the table below. The performance numbers labeled 'x86' were running using 32-bit code on 64-bit processors, whereas the 'x86-64' numbers are native 64-bit code. While SHA-256 is designed for 32-bit calculations, it does benefit from code optimized for 64-bit processors on the x86 architecture. 32-bit implementations of SHA-512 are significantly slower than their 64-bit counterparts. Variants of both algorithms with different output sizes will perform similarly, since the message expansion and compression functions are identical, and only the initial hash values and output sizes are different. The best implementations of MD5 and SHA-1 perform between 4.5 and 6 cycles per byte on modern processors. Testing was performed by the University of Illinois at Chicago on their hydra8 system running an Intel Xeon E3-1275 V2 at a clock speed of 3.5 GHz, and on their hydra9 system running an AMD A10-5800K APU at a clock speed of 3.8 GHz. The referenced cycles per byte speeds above are the median performance of an algorithm digesting a 4,096 byte message using the SUPERCOP cryptographic benchmarking software. The MiB/s performance is extrapolated from the CPU clockspeed on a single core; real-world performance will vary due to a variety of factors. Implementations Below is a list of cryptography libraries that support SHA-2: Botan Bouncy Castle Cryptlib Crypto++ Libgcrypt Mbed TLS libsodium Nettle LibreSSL OpenSSL GnuTLS wolfSSL Hardware acceleration is provided by the following processor extensions: Intel SHA extensions: Available on some Intel and AMD x86 processors. VIA PadLock ARMv8 Cryptography Extensions IBM z/Architecture: Available since 2005 as part of the Message-Security-Assist Extensions 1 (SHA-256) and 2 (SHA-512) IBM Power ISA since