Each processor could accept two commands every 200 nanoseconds, for an effective cycle rate of 100 ns (10 MHz). A fully equipped system with 1,024,000 processors would have an aggregate processing capability of 32 TFlops. Construction In August 1994 the NSA contracted Cray Computer Corporation (CCC) to build a 512,000 processor design with 2,048 processors per RAM chip. National Semiconductor was selected to produce Iobst's design, where Mark Norder and Jennifer Schrader modified the design and laid it out for production. The first half of the machine, with 256,000 processors, was run for the first time on 2 March 1995. (On March 24, 1995 Cray Computer Corp' filed a voluntary petition under Chapter 11 of the US Bankruptcy Code.) References External links Byte magazine Early 1995 on Cray-3/SSS design SSS attachment 3 Sss Massively parallel computers Supercomputers