Samsung, Micron, SK Hynix, Toshiba Memory and GlobalFoundries, with 7 nanometer process chips in mass production by TSMC and Samsung, although their 7nanometer node definition is similar to Intel's 10 nanometer process. The 5 nanometer process began being produced by Samsung in 2018. As of 2019, the node with the highest transistor density is TSMC's 5nanometer N5 node, with a density of 171.3million transistors per square millimeter. In 2019, Samsung and TSMC announced plans to produce 3 nanometer nodes. GlobalFoundries has decided to stop the development of new nodes beyond 12 nanometers in order to save resources, as it has determined that setting up a new fab to handle sub-12 nm orders would be beyond the company's financial abilities. , Samsung is the industry leader in advanced semiconductor scaling, followed by TSMC and then Intel. List of steps This is a list of processing techniques that are employed numerous times throughout the construction of a modern electronic device; this list does not necessarily imply a specific order, nor that all techniques are taken during manufacture as, in practice the order and which techniques are applied, are often specific to process offerings by foundries, or specific to an integrated device manufacturer (IDM) for their own products, and a semiconductor device may not need all techniques. Equipment for carrying out these processes is made by a handful of companies. All equipment needs to be tested before a semiconductor fabrication plant is started. These processes are done after integrated circuit design. Wafer processing Wet cleans Cleaning by solvents such as acetone, trichloroethylene and ultrapure water Piranha solution RCA clean Surface passivation Photolithography Photoresist coating (often as a liquid, on the entire wafer) Photoresist baking (solidification in an oven) Exposure (in a photolithography mask aligner, stepper or scanner) Development (removal of parts of the resist by application of a development liquid, leaving only parts of the wafer exposed for ion implantation, layer deposition, etching, etc) Ion implantation (in which dopants are embedded in the wafer creating regions of increased or decreased conductivity) Etching (microfabrication) Dry etching (Plasma etching) Reactive-ion etching (RIE) Deep reactive-ion etching (DRIE) Atomic layer etching (ALE) Wet etching Buffered oxide etch Chemical vapor deposition (CVD) Atomic layer deposition (ALD) Physical vapor deposition (PVD) Molecular beam epitaxy (MBE) Plasma ashing (for complete photoresist removal, historically done with a chemical solvent, to allow wafers to undergo another round of photolithography) Thermal treatments Rapid