a sequence of code to retain control following a program interrupt. This can be useful to test for valid addresses in a parameter list, to catch overflow, underflow, and other exceptions during calculations, or really any situation where a program interrupt is possible. BPIs can be used at very low cost for the usually more common case where there is no program interrupt. UMMPS implements the Branch on Program Interrupt (BPI) pseudo instruction using a special type of NOP instruction. The form of the BPI instruction is: BPI M2,D2(B2) [RX] or BC 0,D2(M2,B2) [RX] Op Code Mask1 Mask2 Base Displacement +--------------+-------+-------+-------+------------+ | x'47' | 0 | M2 | B2 | D2 | +--------------+-------+-------+-------+------------+ 0 8 12 16 20 31 Where Mask1 is always zero, Mask2 is a name or value as described in the table below, and the base and displacement specify a branch address. Several BPI instructions may be given in succession. The BPI instruction is available for use in problem-state as well as supervisor-state (that is, within UMMPS itself). When an instruction causes a program interrupt, the following instruction is checked to determine if it is a BPI instruction. If it is, the type of program interrupt that occurred is compared with the type categories specified in the Mask2 portion of the BPI instruction. If there is a match, the condition code is set to reflect the interrupt that occurred and the branch is taken. Otherwise, the next instruction is checked to determine if it is a BPI instruction, etc. If there is no BPI transfer made (either because there was no BPI instruction or because the program interrupt type did not match the mask of any BPIs that were present), the normal processing of the program interrupt occurs. When the BPI instruction is executed normally (when there is no program interrupt on the previous instruction), it is a NOP or "branch never" instruction. BPI interrupt-type categories: {| class="Wikitable" !Mask2Name !Mask2Value !InterruptNumber !InterruptName !Condition Codeon Branch |- | |- align="center" |OPCD |8 |1 |Operation |1 |- align="center" | | |2 |Privileged operation |2 |- align="center" | | |3 |Execute |3 |- | |- align="center" |OPND |4 |4 |Protection |0 |- align="center" | | |5 |Addressing |1 |- align="center" | | |6 |Specification |2 |- align="center" | | |7 |Data |3 |- | |- align="center" |OVDIV |2 |8 |Fixed overflow |0 |- align="center" | | |9 |Fixed divide |1