some hardware assists. The System z10 implements the main IEEE 754 decimal floating point operations in a built-in, integral component of each processor core and instruction set architecture. As examples, Enterprise PL/I, XL C, and the z/OS Java BigDecimal class can exploit hardware decimal floating point. New instructions The System z10 processor adds numerous new instructions, primarily concentrated on improving the efficiency and performance of compiled code. The z/OS Java SDK exploits these additional instructions when running on a z10. On July 7, 2009, IBM disclosed z/VM Version 6.1, a new version which requires the additional instructions only available in the System z10 and future models. z/VM LPAR support On the System z10, and with the appropriate version of z/VM, a single logical partition (LPAR) can now span all processor types. Previously, IFLs (Linux processors) had to reside in their own separate LPAR(s). This capability improves operational efficiency and simplifies configuration. The z10 also supports much faster z/VM startup from DVD-RAM. Consequently, IBM started providing a no-charge, downloadable z/VM Evaluation Edition. Capacity on Demand enhancements System z10 has a simplified, more automated architecture for activation and deactivation of Capacity on Demand processing. In particular, the machine no longer requires immediate, direct contact with IBM for activation of CoD features. IBM also introduced a new Capacity for Planned Events (CPE) offering, which allows mainframe owners to activate CPU capacity temporarily to facilitate moving machines between data centers, upgrades, and other routine management tasks at a much lower cost. InfiniBand coupling System z10 provides InfiniBand coupling options for Parallel Sysplex. Some of these options are available for retrofit to the System z9. HiperDispatch As the number of cores in the System z machines has grown, IBM engineers have continued to find ways to reduce symmetric multiprocessing (SMP) effects. Adding more cores has diminishing returns in performance due to cache, memory, and I/O contention. The latest effort to reduce these penalties is HiperDispatch, a set of intelligent, cooperative dispatching strategies between the System z10 hardware and z/OS, particularly the z/OS Workload Manager and dispatcher. HiperDispatch steers more processing tasks toward the cores that are "closest" to the cached data the tasks will likely require, minimizing contention for memory and I/O. HiperDispatch helps maintain near-linear SMP scalability and is more relevant to the larger models, but it is enabled by default on all System z10 machines. Models Enterprise Class Released on February 26, 2008,