4-bit up to 6-bit and sometimes 7-bit are produced. Designs with power-saving capacitive reference ladders have been demonstrated. In addition to clocking the comparator(s), these systems also sample the reference value on the input stage. As the sampling is done at a very high rate, the leakage of the capacitors is negligible. Recently, offset calibration has been introduced into flash ADC designs. Instead of high-precision analog circuits (which increase component size to suppress variation) comparators with relatively large offset errors are measured and adjusted. A test signal is applied, and the offset of each comparator is calibrated to below the LSB value of the ADC. Another improvement to many flash ADCs is the inclusion of digital error correction. When the ADC is used in harsh environments or constructed from very small integrated circuit processes, there is a heightened risk that a single comparator will randomly change state resulting in a wrong code. Bubble error correction is a digital correction mechanism that prevents a comparator that has, for example, tripped high from reporting logic high if it is surrounded by comparators that are reporting logic low. Folding ADC The number of comparators can be reduced somewhat by adding a folding circuit in front, making a so-called folding ADC. Instead of using the comparators in a flash ADC only once, during a ramp input signal, the folding ADC re-uses the comparators multiple times. If a m-times folding circuit is used in an n-bit ADC, the actual number of comparator can be reduced from to (there is always one needed to detect the range crossover). Typical folding circuits are the Gilbert multiplier and analog wired-OR circuits. Application The very high sample rate of this type of ADC enables high-frequency applications (typically in a few GHz range) like radar detection, wideband radio receivers, electronic test equipment, and optical communication links. More often the flash ADC is embedded in a large IC containing many digital decoding functions. Also a small flash ADC circuit may be present inside a delta-sigma modulation loop. Flash ADCs are also used in NAND flash memory, where up to 3 bits are stored per cell as 8 voltages level on floating gates. References Analog-to-Digital Conversion Understanding Flash ADCs "Integrated Analog-to-Digital and Digital-to-Analog Converters", R. van de Plassche, ADCs, Kluwer Academic Publishers, 1994. "A Precise Four-Quadrant Multiplier with Subnanosecond Response", Barrie Gilbert, IEEE Journal of Solid-State Circuits, Vol. 3, No. 4 (1968),