MPL called NEMPL (Not Exactly MPL). During the course of the semester, it became clear to the course teaching assistant, Randall (Randy) Fisher, that there were a number of issues with MMX that would make it difficult to build the back-end of the NEMPL compiler. For example, MMX has an instruction for multiplying 16-bit data but not multiplying 8-bit data. The NEMPL language did not account for this problem, allowing the programmer to write programs that required 8-bit multiplies. Intel's x86 architecture was not the only architecture to include SIMD-like parallel instructions. Sun's VIS, SGI's MDMX, and other multimedia instruction sets had been added to other manufacturers' existing instruction set architectures to support so-called new media applications. These extensions had significant differences in the precision of data and types of instructions supported. Dietz and Fisher began developing the idea of a well-defined parallel programming model that would allow the programming to target the model without knowing the specifics of the target architecture. This model would become the basis of Fisher's dissertation. The acronym "SWAR" was coined by Dietz and Fisher one day in Hank's office in the MSEE building at Purdue University. It refers to this form of parallel processing, architectures that are designed to natively perform this type of processing, and the general-purpose programming model that is Fisher's dissertation. The problem of compiling for these widely varying architectures was discussed in a paper presented at LCPC98. Some applications of SWAR SWAR processing has been used in image processing, cryptographic pairings, raster processing, computational fluid dynamics, and communications. See also SIMD engines: vector processor, array processor, digital signal processor, stream processor. SWAR on x86 processors: MMX, 3DNow!, SSE, SSE2, SSE3 References External links The Aggregate - SWAR: SIMD Within A Register Parallel computing SIMD computing