The AMD Family 10h, or K10, is a microprocessor microarchitecture by AMD based on the K8 microarchitecture. The first third-generation Opteron products for servers were launched on September 10, 2007, with the Phenom processors for desktops following and launching on November 11, 2007 as the immediate successors to the K8 series of processors (Athlon 64, Opteron, 64-bit Sempron). Nomenclature It appears that AMD has not used K-nomenclature (which originally stood for "Kryptonite" in the K5 processor) from the time after the use of the codename K8 for the AMD K8 or Athlon 64 processor family, since no K-nomenclature naming convention beyond K8 has appeared in official AMD documents and press releases after the beginning of 2005. The name "K8L" was first coined by Charlie Demerjian in 2005, at the time a writer at The Inquirer, and was used by the wider IT community as a convenient shorthand while according to AMD official documents, the processor family was termed "AMD Next Generation Processor Technology". The microarchitecture has also been referred to as Stars, as the codenames for desktop line of processors was named under stars or constellations (the initial Phenom models being codenamed Agena and Toliman). In a video interview, Giuseppe Amato confirmed that the codename is K10. It was revealed, by The Inquirer itself, that the codename "K8L" referred to a low-power version of the K8 family, later named Turion 64, and that K10 was the official codename for the microarchitecture. AMD refers to it as Family 10h Processors, as it is the successor of the Family 0Fh Processors (codename K8). 10h and 0Fh refer to the main result of the CPUID x86 processor instruction. In hexadecimal numbering, 0Fh (h represents hexadecimal numbering) equals the decimal number 15, and 10h equals decimal 16. (The "K10h" form that sometimes pops up is an improper hybrid of the "K" code and Family identifier number.) Schedule of launch and delivery Timeline Historical information In 2003, AMD outlined the features for upcoming generations of microprocessors after the K8 family of processors in various events and analyst meetings, including the Microprocessor Forum 2003. The outlined features to be deployed by the next-generation microprocessors are as follows: Threaded architectures. Chip level multiprocessing. Huge scale MP (multi-processor) machines. 10 GHz operation. Much higher performance superscalar, out of order CPU core. Huge caches. Media/vector processing extensions. Branch and memory hints. Security and virtualization. Enhanced Branch Predictors. Static and