The Atmel AVR instruction set is the machine language for the Atmel AVR, a modified Harvard architecture 8-bit RISC single chip microcontroller which was developed by Atmel in 1996. The AVR was one of the first microcontroller families to use on-chip flash memory for program storage. Processor registers There are 32 general-purpose 8-bit registers, R0–R31. All arithmetic and logic operations operate on those registers; only load and store instructions access RAM. A limited number of instructions operate on 16-bit register pairs. The lower-numbered register of the pair holds the least significant bits and must be even-numbered. The last three register pairs are used as pointer registers for memory addressing. They are known as X (R27:R26), Y (R29:R28) and Z (R31:R30). Postincrement and predecrement addressing modes are supported on all three. Y and Z also support a six-bit positive displacement. Instructions which allow an immediate value are limited to registers R16–R31 (8-bit operations) or to register pairs R25:R24–R31:R30 (16-bit operations ADIW and SBIW). Some variants of the MUL operation are limited to eight registers, R16 through R23. Special purpose registers In addition to these 32 general-purpose registers, the CPU has a few special-purpose registers: PC: 16- or 22-bit program counter SP: 8- or 16-bit stack pointer SREG: 8-bit status register RAMPX, RAMPY, RAMPZ, RAMPD and EIND: 8-bit segment registers that are prepended to 16-bit addresses in order to form 24-bit addresses; only available in parts with large address spaces. Status bits The status register bits are: C Carry flag. This is a borrow flag on subtracts. The INC and DEC instructions do not modify the carry flag, so they may be used to loop over multi-byte arithmetic operations. Z Zero flag. Set to 1 when an arithmetic result is zero. N Negative flag. Set to a copy of the most significant bit of an arithmetic result. V Overflow flag. Set in case of two's complement overflow. S Sign flag. Unique to AVR, this is always N⊕V, and shows the true sign of a comparison. H Half-carry flag. This is an internal carry from additions and is used to support BCD arithmetic. T Bit copy. Special bit load and bit store instructions use this bit. I Interrupt flag. Set when interrupts are enabled. Addressing The following address spaces are available: The general purpose registers are addressed by their numbers (0–31), although the full 5-bit number is not stored in instructions that can