cover the entirety of the fin(s). A 25 nm transistor operating on just 0.7 volt was demonstrated in December 2002 by TSMC (Taiwan Semiconductor Manufacturing Company). The "Omega FinFET" design is named after the similarity between the Greek letter omega (Ω) and the shape in which the gate wraps around the source/drain structure. It has a gate delay of just 0.39 picosecond (ps) for the N-type transistor and 0.88 ps for the P-type. In 2004, Samsung Electronics demonstrated a "Bulk FinFET" design, which made it possible to mass-produce FinFET devices. They demonstrated dynamic random-access memory (DRAM) manufactured with a 90nm Bulk FinFET process. In 2006, a team of Korean researchers from the Korea Advanced Institute of Science and Technology (KAIST) and the National Nano Fab Center developed a 3 nm transistor, the world's smallest nanoelectronic device, based on FinFET technology. In 2011, Rice University researchers Masoud Rostami and Kartik Mohanram demonstrated that FINFETs can have two electrically independent gates, which gives circuit designers more flexibility to design with efficient, low-power gates. In 2012, Intel started using FinFETs for its future commercial devices. Leaks suggest that Intel's FinFET has an unusual shape of a triangle rather than rectangle, and it is speculated that this might be either because a triangle has a higher structural strength and can be more reliably manufactured or because a triangular prism has a higher area-to-volume ratio than a rectangular prism, thus increasing switching performance. In September 2012, GlobalFoundries announced plans to offer a 14-nanometer process technology featuring FinFET three-dimensional transistors in 2014. The next month, the rival company TSMC announced start early or "risk" production of 16 nm FinFETs in November 2013. In March 2014, TSMC announced that it is nearing implementation of several 16 nm FinFETs die-on wafers manufacturing processes: 16 nm FinFET (Q4 2014), 16 nm FinFET+ ( Q4 2014), 16 nm FinFET "Turbo" (estimated in 2015–2016). AMD released GPUs using their Polaris chip architecture and made on 14 nm FinFET in June 2016. The company has tried to produce a design to provide a "generational jump in power efficiency" while also offering stable frame rates for graphics, gaming, virtual reality, and multimedia applications. In March 2017, Samsung and eSilicon announced the tapeout for production of a 14 nm FinFET ASIC in a 2.5D package. Tri-gate transistor A tri-gate transistor, also known as a triple-gate transistor, is a type of MOSFET with a gate