suffer from the undesirable short-channel effect, especially "off-state" leakage current, which increases the idle power required by the device. In a multigate device, the channel is surrounded by several gates on multiple surfaces. Thus it provides better electrical control over the channel, allowing more effective suppression of "off-state" leakage current. Multiple gates also allow enhanced current in the "on" state, also known as drive current. Multigate transistors also provide a better analog performance due to a higher intrinsic gain and lower channel length modulation. These advantages translate to lower power consumption and enhanced device performance. Nonplanar devices are also more compact than conventional planar transistors, enabling higher transistor density which translates to smaller overall microelectronics. Integration challenges The primary challenges to integrating nonplanar multigate devices into conventional semiconductor manufacturing processes include: Fabrication of a thin silicon "fin" tens of nanometers wide Fabrication of matched gates on multiple sides of the fin Compact modeling BSIMCMG106.0.0, officially released on March 1, 2012 by UC Berkeley BSIM Group, is the first standard model for FinFETs. BSIM-CMG is implemented in Verilog-A. Physical surface-potential-based formulations are derived for both intrinsic and extrinsic models with finite body doping. The surface potentials at the source and drain ends are solved analytically with poly-depletion and quantum mechanical effects. The effect of finite body doping is captured through a perturbation approach. The analytic surface potential solution agrees closely with the 2-D device simulation results. If the channel doping concentration is low enough to be neglected, computational efficiency can be further improved by a setting a specific flag (COREMOD = 1). All of the important multi-gate (MG) transistor behavior is captured by this model. Volume inversion is included in the solution of Poisson's equation, hence the subsequent I–V formulation automatically captures the volume-inversion effect. Analysis of electrostatic potential in the body of MG MOSFETs provided a model equation for short-channel effects (SCE). The extra electrostatic control from the end gates (top/bottom gates) (triple or quadruple-gate) is also captured in the short-channel model. See also Three-dimensional integrated circuit Semiconductor device Clock gating High-κ dielectric Next-generation lithography Extreme ultraviolet lithography Immersion lithography Strain engineering Very Large Scale Integration (VLSI) Neuromorphic engineering Bit slicing 3D printing Silicon on insulator (SOI) MOSFET Floating-gate MOSFET Transistor BSIM High-electron-mobility transistor Field-effect transistor JFET Tetrode transistor Pentode transistor Memristor Quantum circuit Quantum gate Transistor model Die shrink References External links Inverted T-FET (Freescale Semiconductor) Omega FinFET (TSMC)