to a delay slot. The demands of high-speed digital signal processing have pushed in the opposite direction—forcing instructions to be implemented in a particular way. For example, to perform digital filters fast enough, the MAC instruction in a typical digital signal processor (DSP) must use a kind of Harvard architecture that can fetch an instruction and two data words simultaneously, and it requires a single-cycle multiply–accumulate multiplier. See also Comparison of instruction set architectures Computer architecture Processor design Compressed instruction set Emulator Simulation Instruction set simulator OVPsim full systems simulator providing ability to create/model/emulate any instruction set using C and standard APIs Register transfer language (RTL) Micro-operation References Further reading External links Programming Textfiles: Bowen's Instruction Summary Cards Mark Smotherman's Historical Computer Designs Page Central processing unit Set architectures Instruction set