surfaces and artificial intelligence software with real-time machine learning and included laser wavelengths for standard i-line resist and DUV 248nm. The MCC system also included circuit editing capabilities for isolating circuits on a programmable wafer design. In 1999, the MCC system was advanced for use in MEMS manufacturing. Interference lithography or holographic exposures are not maskless processes and therefore do not count as "maskless", although they have no 1:1 imaging system in between. Plasmonic direct writing lithography uses localized surface plasmon excitations via scanning probes to directly expose the photoresist. For improved image resolution, ultraviolet light, which has a shorter wavelength than visible light, is used to achieve resolution down to around 100 nm. The main optical maskless lithography systems in use today are the ones developed for generating photomasks for the semiconductor and LCD industries. In 2013, a group at Swinburne University of Technology published their achievement of 9 nm feature size and 52 nm pitch, using a combination of two optical beams of different wavelengths. DLP technology can also be used for maskless lithography. Focused ion beam Focused ion beam systems are commonly used today for sputtering away defects or uncovering buried features. The use of ion sputtering must take into account the redeposition of sputtered material. Probe-tip contact IBM Research has developed an alternative maskless lithography technique based on atomic force microscopy. In addition, Dip Pen Nanolithography is a promising new approach for patterning submicrometer features. Research 2000s Technologies that enable maskless lithography is already used for the production of photomasks and in limited wafer-level production. There are some obstacles ahead of its use in high-volume manufacturing. First, there is a wide diversity of maskless techniques. Even within the electron-beam category, there are several vendors (Multibeam, Mapper Lithography, Canon, Advantest, Nuflare, JEOL) with entirely different architectures and beam energies. Second, throughput targets exceeding 10 wafers per hour still need to be met. Third, the capacity and ability to handle the large data volume (Tb-scale) needs to be developed and demonstrated. In recent years DARPA and NIST have reduced support for maskless lithography in the U.S. There was a European program that would push the insertion of maskless lithography for IC manufacturing at the 32-nm half-pitch node in 2009. Project name was MAGIC, or "MAskless lithoGraphy for IC manufacturing", in frame of EC 7th Framework Programme (FP7). Due to the increased mask costs for multiple patterning, maskless lithography