climate. The machine was being designed during the collapse of the Warsaw Pact and ending of the cold war, which led to a massive downsizing in supercomputer purchases. At the same time, the market was increasingly investing in massively parallel (MP or MPP) designs. Cray was critical of this approach, and was quoted by The Wall Street Journal as saying that MPP systems had not yet proven their supremacy over vector computers, noting the difficulty many users have had programming for large parallel machines. "I don't think they'll ever be universally successful, at least not in my lifetime". Architecture Logical design The Cray-3 system architecture comprised a foreground processing system, up to 16 background processors and up to 2 gigawords (16 GB) of common memory. The foreground system was dedicated to input/output and system management. It included a 32-bit processor and four synchronous data channels for mass storage and network devices, primarily via HiPPI channels. Each background processor consisted of a computation section, a control section and local memory. The computation section performed 64-bit scalar, floating point and vector arithmetic. The control section provided instruction buffers, memory management functions, and a real-time clock. 16 kwords (128 kbytes) of high-speed local memory was incorporated into each background processor for use as temporary scratch memory. Common memory consisted of silicon CMOS SRAM, organized into octants of 64 banks each, with up to eight octants possible. The word size was 64-bits plus eight error-correction bits, and total memory bandwidth was rated at 128 gigabytes per second. CPU design As with previous designs, the core of the Cray-3 consisted of a number of modules, each containing several circuit boards packed with parts. In order to increase density, the individual GaAs chips were not packaged, and instead several were mounted directly with ultrasonic gold bonding to a board approximately square. The boards were then turned over and mated to a second board carrying the electrical wiring, with wires on this card running through holes to the "bottom" (opposite the chips) side of the chip carrier where they were bonded, hence sandwiching the chip between the two layers of board. These submodules were then stacked four-deep and, as in the Cray-2, wired to each other to make a 3D circuit. Unlike the Cray-2, the Cray-3 modules also included edge connectors. Sixteen such submodules were connected together in a 4×4 array to make a single module measuring