The CVAX is a microprocessor chipset developed and fabricated by Digital Equipment Corporation (DEC) that implemented the VAX instruction set architecture (ISA). The chipset consisted of the CVAX 78034 CPU, CFPA floating-point accelerator, CVAX clock chip, and the associated support chips, the CVAX System Support Chip (CSSC), CVAX Memory Controller (CMCTL), and CVAX Q-Bus Interface Chip (CQBIC). CVAX 78034 The CVAX 78034, also known as the MicroVAX 78034, is a second-generation single-chip VAX microprocessor. Systems featuring the CVAX chip set became available in late 1987. It is clocked at frequencies of 12.5 MHz (80 ns) in higher-end systems such as the VAX 6000 Model 200 and at 11.11 MHz (90 ns) in lower-end systems such as the MicroVAX 3500 and 3600. The 78034 was the first VAX microprocessor to have internal caches, a 1 KB combined instruction and data stream cache. The cache is quite unusual as it is implemented with one-transistor DRAM, whereas the majority of microprocessors use SRAM for their internal caches. This was the first microprocessor to use one-transistor DRAM for cache. DEC chose to use DRAM for the cache to reduce the area of the cache array. The designers concluded that to implement this cache with four-transistor DRAM cells or six-transistor SRAM cells would have taken 2.4 to 3 times more area. The internal cache is located in a narrow strip along the left side of the die. An external 64 KB cache complements the 1 KB internal cache. The 78034 contains 134,000 transistors on a die measuring 9.7 by 7.4 mm (71.78 mm2). It is fabricated in DEC's first-generation CMOS process, CMOS-1, a 2.0 μm CMOS process with two layers of aluminium interconnect. The 78034 is packaged in an 84-pin ceramic chip carrier with a heat sink. It uses single +5 volt power supply and dissipates a maximum of 1.5 W. The microprocessor is microprogrammed and partially pipelined and consists of six major functional units, the I-Box, E-Box, M-box, bus interface unit (BIU), cache, and control store and microsequencer. The I-Box fetches VAX instructions from the cache and decodes them (parses) into macroinstructions. The I-Box has an IROM (Instruction decode ROM) that holds the information required to do so. The E-Box consists of a register file, a 32-bit program counter, a constant generator, a shifter and an arithmetic logic unit (ALU). The register file contains 31 single-read-port/single-write-port registers and eight dual-read-port/single-write port registers. The ALU