is 32-bit and is capable of executing addition, subtraction and logic instructions. Although the E-Box contains a dedicated shifter, the ALU also features a shifter, a less powerful one, for the purpose of executing integer multiply and divide instructions. The design of the register file permits these execution units to achieve higher performance by permitting more instances of simultaneous access to the registers. The M-Box is the memory management unit. It has a 28-entry fully associative translation look-aside buffer (TLB) to translate virtual addresses into physical address. In addition to the TLB, it has registers that determine the memory address to read or write to. The M-Box works closely with the BIU, which controls access to the internal cache and interfaces the microprocessor to the 32-bit address data multiplexed external bus. The control store and microsequencer provides the means of controls of the operation of the other functional units with microcode. The control store has a ROM containing 1,600 41-bit words. Each 41-bit word is divided into two, a 28-bit field that controls the functional units, and a 13-bit field that controls the microsequencer. Unlike the MicroVAX 78032, which uses X-shaped cells, the 78034 uses conventional H-shaped cells. The microsequencer's purpose is to supply microaddresses to the control store. CFPA The CFPA (CVAX Floating Point Accelerator) is a floating point coprocessor for the CVAX 78034. The CFPA contains 65,000 transistors on a die measuring 7.3 by 9.1 mm (66.43 mm2). It is fabricated in DEC's first-generation CMOS process, CMOS-1, a 2.0 μm process with two layers of aluminium interconnect. It is packaged in a 68-pin surface mountable chip carrier. Further development CVAX+ CVAX+ referred to an optical shrink of the original CVAX fabricated in DEC's second-generation CMOS process, CMOS-2, a 1.5 μm process with two levels of wiring. The original design team shrunk the CVAX 78034, CFPA and CMCTL, with the other chips left unchanged. The shrunk 78034 was known as the CVAX-60, which taped out in August 1987, before the original 78034 begun volume production, and the CFPA-60 taped out in November 1987. The CVAX+ operated at 16.67 MHz, but power requirements was unchanged. The CVAX+ started to ship in late 1988, as upgrades to all entry-level CVAX-based systems and were also provided as an upgrade to the VAX 6000 when the introduction of Rigel was delayed by yield issues. SOC SOC referred to a microprocessor which contained the