is assigned a value in the RTL program can be implemented as a register. Depending on the functional operation performed when assigning a value to a variable, the register for that variable may be implemented as a straightforward register, a shift register, a counter, or a register preceded by a combinational logic block. The combinational logic block associated with a register may implement an adder, subtracter, multiplexer, or some other type of combinational logic function. Detailed ASM chart Once the datapath is designed, the ASM chart is converted to a detailed ASM chart. The RTL notation is replaced by signals defined in the datapath. See also Flowchart Drakon-chart Mealy machine Moore machine Map-entered variables (MEV) References Sunggu Lee: Computer Design: An Example of Advanced Digital Logic Design, Prentice-Hall 2000, . Sunggu Lee: Advanced Digital Logic Design: Using VHDL, State Machines, and Synthesis for FPGAs, Thomson 2006, . Stephen D. Brown, Zvonko Vranesic: Fundamentals of Digital Logic with VHDL Design. 2nd, McGraw Hill 2004; . 3rd, McGraw Hill 2009; . Further reading (7 pages) (NB. This article caused a number of letters to the editor in subsequent issues of the magazine.) (1 page) (NB. Osborne's method was later published by Clare.) (ix+1+179+3 pages) External links Brief Introduction to ASM Charts ASM++: a modern Algorithmic State Machine methodology for RTL designs Computer engineering Electronic design automation