(VLSI) chips. The ND-110 had three gate arrays: The Micro Instruction Controller, the MIC, also known as RMIC, for Rask MIC (Speedy MIC). It replaced three 74S482 sequencers and about 30 other ICs. The Arithmetical and Logical Unit gate array (ALU, also known as the BUFALU). Replaced four Am2901 bit-slice processors, and some added registers like the data bus register the general purpose register, and the internal register block. The Micro Address Controller (The MAC, also called RMAC, for Rask MAC (Speedy MAC). It implemented hardware address arithmetic, which in the ND-100 had been done in microcode. Along with the macro-instruction cache memory also in the ND-100, the ND-110 had a unique implementation of cache memory on the micro-instruction level. The step termed mapping in the ND-100 was then avoided because the first micro-instruction word of a macro-instruction was written into the control store cache. Unlike the ND-100 CPU, it handled synchronous interrupts as traps, similar to how it was handled by the ND-500. The control store consisted of 4K x 4 bit 40ns static random-access memory (SRAM) chips. This meant that the control store was writable. It was loaded at power up and Master Clear from two 32Kx8 bit erasable programmable read-only memory (EPROM) units. The CPU clock and the bus arbitration network were implemented using 15ns PALs. The main oscillator was a 39.3216 MHz crystal oscillator. ND-110/CX This was the ND-110 with the CX microcode programmable read-only memory (PROM). The added instructions were the same as the /CE. ND-120/CX The ND-120 CPU was a complete reimplementation on an LSI chip (The so-called Delilah chip), and was originally intended to be sold as the ND-1000, to reflect the technology change, which paralleled the change from the ND-500 series to the ND-5000 (codenamed Samson). The Samson/Delilah naming scheme may reflect that around the time of the development of the ND-120, it was increasingly clear that the mixed 16/32-bit architecture was a bottleneck for the ND-500(0) architecture; Internal technical documentation used at Norsk Data for the Delilah chip has a drawing of a grinning woman with hair in her clenched fist. References External links Norsk Data minicomputers 16-bit computers